Memory capacity adjustment method and apparatus, electronic device, and storage medium

By reading and adjusting SPD data without SPD controller memory from the BIOS image, the memory life reduction and operation and maintenance costs caused by manual disassembly are solved, and dynamic adjustment of memory capacity and stable server booting is achieved.

WO2025112645A1PCT designated stage expired Publication Date: 2025-06-05INSPUR SUZHOU INTELLIGENT TECH CO LTD
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Patent Information

Application Number
PCT/CN2024/111516
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-11-30
Filing Date
2024-08-12
Publication Date
2025-06-05

AI Technical Summary

Technical Problem

In the prior art, manual disassembly of memory leads to a reduced memory service life, increasing operation and maintenance costs, and a memory hybrid access server without an SPD controller may result in failure to boot.

Method used

By reading the reserved SPD data of the target memory from the BIOS image, adjusting the memory capacity of the target memory, realizing memory capacity adjustment without SPD controller.

Benefits of technology

It avoids the lifespan caused by frequent memory disassembly, reduces operation and maintenance costs, and solves the problem of the inability to boot into the server with mixed memory plug-in and different capacity in different batches.

✦ Generated by Eureka AI based on patent content.

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Abstract

A memory capacity adjustment method, which is applied to a basic input / output system. The method comprises: from a basic input / output system image, reading reserved memory configuration data of a target memory, wherein the target memory is a physical memory which is not provided with a memory configuration controller; and adjusting the memory capacity of the target memory on the basis of the memory configuration data of the target memory. Also disclosed are a memory capacity adjustment apparatus, an electronic device, and a storage medium.
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Description

Memory capacity adjustment method, device, electronic device and storage medium

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to the Chinese patent application filed with the China Patent Office on November 30, 2023, with application number 202311629028.7, and application name “A memory capacity adjustment method, device, electronic device and storage medium”, all contents of which are incorporated by reference into this application. Technical Field

[0003] The present application relates to the field of memory adjustment technology, and in particular to a memory capacity adjustment method, device, electronic device, and storage medium. Background Art

[0004] In a computer system, data information usually needs to be stored in memory. Even though some processors support a certain amount of cache, these cache functions only provide basic instruction execution requirements for the processor when it is turned on. Similarly, the BIOS (Basic Input Output System) image also needs to be run in a certain amount of memory space. The self-test program that starts when the server is turned on and the applications running under the system all require a certain amount of memory to support them. Therefore, memory is a physical device that must exist in any computer product of any architecture. The memory in the server operation involves the setting of multiple parameters, such as the memory integrated circuit and module manufacturer, operating frequency, operating voltage, speed, capacity, voltage, row and column address bandwidth, etc. These parameters are all controlled by the memory's SPD (Serial Presence Detect).

[0005] SPD is a type of memory on the memory module that stores its parameters. This information is read and saved to the motherboard controller during computer startup, allowing the system to correctly configure the memory controller. Most importantly, it automatically configures the memory's operating frequency to ensure the memory controller operates within the appropriate frequency range, thereby improving computer performance. Depending on the usage environment, traditional memory may need to be converted from a slot-based format to a motherboard surface-mounted format. This conversion merely changes the memory connection method and does not affect actual use. However, in some special cases or to reduce investment costs, it is necessary to remove the memory's SPD controller, i.e., to eliminate the SPD controller.

[0006] Typically, memory without an SPD controller requires maintenance personnel to remove the memory from the server to adjust the memory capacity. This reduces the memory's lifespan and increases maintenance costs. Furthermore, server manufacturers often use memory from different batches and capacities from the same vendor. However, memory modules themselves contain SPD controllers with unique parameter settings. Without an SPD controller, mixing these memory modules in a server can lead to technical issues such as server startup failures.

[0007] Summary of the Invention

[0008] The embodiments of the present application provide a memory capacity adjustment method, device, electronic device and storage medium to solve the problems in the prior art that manual disassembly leads to a reduced memory service life, increased operation and maintenance costs, and mixed insertion of memory sticks into the server will cause the server to be unable to start up.

[0009] In order to solve the above technical problems, the embodiments of the present application are implemented as follows:

[0010] In a first aspect, an embodiment of the present application provides a memory capacity adjustment method, applied to a basic input and output system, the method comprising:

[0011] Reading memory configuration data of a reserved target memory from a basic input / output system image, where the target memory is a physical memory for which a memory configuration controller is not configured;

[0012] Adjust the memory capacity of the target memory based on the memory configuration data of the target memory.

[0013] In some embodiments, before reading the memory configuration data of the reserved target memory from the image of the basic input and output system, the method further includes:

[0014] Obtain memory configuration data for multiple types of memory, including target memory;

[0015] Create a data structure corresponding to each memory parameter in the image;

[0016] According to the memory parameters of each type of memory, the memory configuration data of each type of memory is stored in the corresponding data structure;

[0017] The data structure of each type of memory is stored in the storage address corresponding to each type of memory.

[0018] In some embodiments, based on the memory parameters of each type of memory, the memory configuration data of each type of memory is stored in a corresponding data structure, including:

[0019] Get the memory capacity parameters of each type of memory set by the user;

[0020] Replacing original memory capacity parameters in memory configuration data of each type of memory based on the memory capacity parameters to generate new memory configuration data for each type of memory;

[0021] The memory configuration data and the new memory configuration data are respectively stored in corresponding data structures, and different memory configuration data correspond to different data structures.

[0022] In some embodiments, before storing the memory configuration data and the new memory configuration data in corresponding data structures, the method further includes:

[0023] A data structure corresponding to the new memory configuration data is created in the storage address corresponding to each type of memory to store the new memory configuration data.

[0024] In some embodiments, reading memory configuration data of a reserved target memory from a basic input / output system image includes:

[0025] After the basic input and output system enters an initialization phase in response to the server startup, obtaining a memory capacity parameter set by the user for the target memory;

[0026] Read the target memory's memory configuration data that matches the memory capacity parameter from the image.

[0027] In some embodiments,

[0028] In some embodiments, reading memory configuration data of a target memory that matches a memory capacity parameter from a basic input / output system image includes:

[0029] Determine a target storage address corresponding to the target memory according to the memory type of the target memory;

[0030] Memory configuration data matching the memory capacity parameters is read from the target storage address based on a preset protocol.

[0031] In some embodiments, obtaining a memory capacity parameter set by a user for a target memory includes:

[0032] In response to the basic input and output system entering the initialization phase, displaying an interface of the basic input and output system;

[0033] According to the interface of the input and output system, the memory capacity parameter set by the user for the target memory is obtained.

[0034] In some embodiments, reading memory configuration data matching the memory capacity parameter from the target storage address based on a preset protocol includes:

[0035] Get the target data structure corresponding to the memory capacity parameter;

[0036] Memory configuration data matching the memory capacity parameters in a target data structure is read from a target storage address based on a preset protocol.

[0037] In some embodiments, obtaining a target data structure corresponding to a memory capacity parameter includes:

[0038] Obtain the correspondence between the pre-recorded memory capacity parameters and the data structure;

[0039] According to the memory capacity parameter and the corresponding relationship, a target structure data structure corresponding to the memory capacity parameter is obtained.

[0040] In some embodiments, adjusting the memory capacity of the target memory based on the memory configuration data of the target memory includes:

[0041] Assign the memory configuration data of the target memory to the target memory;

[0042] Initialize the target memory to adjust the memory capacity of the target memory.

[0043] In some embodiments, after adjusting the memory capacity of the target memory based on the memory configuration data of the target memory, the method further includes:

[0044] After the target memory is initialized, check whether there is any uninitialized memory in the memory of the server to which the basic input and output system belongs;

[0045] In the case where uninitialized memory exists in the memory, the uninitialized memory in the memory is identified in sequence;

[0046] The memory configuration data of the uninitialized memory is sequentially read from the image to initialize the uninitialized memory sequentially.

[0047] In some embodiments, after checking whether there is any uninitialized memory in the memory of the server to which the basic input and output system belongs, the method further includes:

[0048] After checking that all memory initialization is complete, determine whether the server starts normally;

[0049] In response to the server not starting normally, memory is reinitialized.

[0050] In some embodiments, reinitializing the memory includes:

[0051] Get the minimum memory parameter of the preset memory;

[0052] Read the target memory configuration data corresponding to the minimum memory parameters from the image;

[0053] Assign the target memory configuration data to the memory and initialize the memory.

[0054] In some embodiments, after reinitializing the memory, the method further includes:

[0055] In response to the server starting normally, the memory configuration data of the memory is sequentially read from the image;

[0056] The memory is initialized based on the memory configuration data of the memory in sequence to adjust the memory capacity of the memory.

[0057] In some embodiments, in response to the server starting normally, sequentially reading memory configuration data of the memory from the image includes:

[0058] In response to the server being started normally, obtaining a memory capacity parameter of each type of memory set again by the user;

[0059] According to the memory capacity parameters, the memory configuration data corresponding to the memory capacity parameters are read from the image in sequence.

[0060] In some embodiments, after determining whether the server is started normally, the method further includes:

[0061] In response to the server starting normally, the memory initialization process ends.

[0062] In some embodiments, the multiple types of memory include at least memories of different models and different memory capacities from different memory manufacturers.

[0063] In a second aspect, an embodiment of the present application provides a memory capacity adjustment device, which is applied to a basic input and output system, and the device includes:

[0064] A memory configuration data reading module is used to read memory configuration data of a reserved target memory from a basic input / output system image, where the target memory is a physical memory that is not provided with a memory configuration controller;

[0065] The memory capacity adjustment module is used to adjust the memory capacity of the target memory based on the memory configuration data of the target memory.

[0066] In some embodiments, the apparatus further comprises:

[0067] A memory configuration data acquisition module is used to acquire memory configuration data of multiple types of memory, including target memory;

[0068] The data structure creation module is used to create a data structure corresponding to each memory parameter in the image;

[0069] A memory configuration data storage module is used to store the memory configuration data of each type of memory in a corresponding data structure according to the memory parameters of each type of memory;

[0070] The data structure storage module is used to store the data structure of each type of memory in the storage address corresponding to each type of memory.

[0071] In some embodiments, the memory configuration data storage module includes:

[0072] A memory capacity parameter acquisition unit, used to acquire the memory capacity parameters of each type of memory set by the user;

[0073] A new memory configuration data generating unit, configured to replace the original memory capacity parameter in the memory configuration data of each type of memory based on the memory capacity parameter, and generate new memory configuration data for each type of memory;

[0074] The memory configuration data storage unit is used to store the memory configuration data and the new memory configuration data in corresponding data structures respectively, and different memory configuration data corresponds to different data structures.

[0075] In some embodiments, the memory configuration data reading module includes:

[0076] A memory parameter setting unit, configured to obtain a memory capacity parameter set by a user for a target memory after the basic input and output system enters an initialization phase in response to the server being started;

[0077] The memory configuration data reading unit is used to read the memory configuration data of the target memory that matches the memory capacity parameter from the image.

[0078] In some embodiments, the memory configuration data reading unit includes:

[0079] A target address determination subunit, configured to determine a target storage address corresponding to the target memory according to a memory type of the target memory;

[0080] The memory configuration data reading subunit is used to read the memory configuration data matching the memory capacity parameters from the target storage address based on a preset protocol.

[0081] In some embodiments, the memory configuration data reading subunit includes:

[0082] The target structure acquisition subunit is used to obtain the target data structure corresponding to the memory capacity parameter;

[0083] The memory configuration data acquisition subunit is used to read the memory configuration data matching the memory capacity parameters in the target data structure from the target storage address based on a preset protocol.

[0084] In some embodiments, the memory capacity adjustment module includes:

[0085] A memory configuration data assignment unit, configured to assign the memory configuration data of a target memory to the target memory;

[0086] The memory capacity adjustment unit is used to initialize the target memory to adjust the memory capacity of the target memory.

[0087] In some embodiments, the apparatus further comprises:

[0088] An uninitialized memory checking module is used to check whether there is any uninitialized memory in the memory of the server connected to the basic input and output system after the target memory is initialized;

[0089] An uninitialized memory identification module is used to sequentially identify uninitialized memory in the memory when there is uninitialized memory in the memory;

[0090] The memory initialization module is used to read the memory configuration data of the uninitialized memory from the image in sequence, so as to initialize the uninitialized memory in sequence.

[0091] In some embodiments, the apparatus further comprises:

[0092] A normal startup determination module is used to determine whether the server has started normally after checking that all memory initialization has been completed;

[0093] The memory reinitialization module is used to reinitialize the memory in response to the server not starting normally.

[0094] In some embodiments, the memory reinitialization module includes:

[0095] A minimum memory parameter obtaining unit, used to obtain a preset minimum memory parameter;

[0096] A target memory configuration data reading unit, configured to read target memory configuration data corresponding to the minimum memory parameter from the image;

[0097] The memory initialization unit is used to assign target memory configuration data to the memory and initialize the memory.

[0098] In some embodiments, the apparatus further comprises:

[0099] A memory configuration data reading module is used to read the memory configuration data of the memory from the image in sequence in response to the normal startup of the server;

[0100] The memory adjustment module is used to perform initialization processing on the memory based on the memory configuration data of the memory in sequence to adjust the memory capacity of the memory.

[0101] In some embodiments, the apparatus further comprises:

[0102] The initialization process ending module is used to end the memory initialization process in response to the normal startup of the server.

[0103] In a third aspect, an embodiment of the present application provides an electronic device, including:

[0104] A memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the computer program is executed by the processor, any one of the above-mentioned memory capacity adjustment methods is implemented.

[0105] In a fourth aspect, an embodiment of the present application provides a computer non-volatile readable storage medium, which, when the instructions in the computer non-volatile readable storage medium are executed by a processor of an electronic device, enables the electronic device to execute any of the above-mentioned memory capacity adjustment methods.

[0106] In an embodiment of the present application, the SPD data of the reserved target memory is read from the BIOS image of the BIOS, and the target memory is a physical memory without an SPD controller. Based on the SPD data of the target memory, the memory capacity of the target memory is adjusted. In an embodiment of the present application, the SPD data of the memory is stored in the BIOS image. When the server starts, it can be directly assigned to the memory through the SPD data reserved in the BIOS image, thereby realizing memory capacity adjustment without an SPD controller. There is no need to manually disassemble and adjust the memory capacity, thereby avoiding the problem of reduced memory life due to frequent memory disassembly, and reducing operation and maintenance costs. At the same time, it can also avoid the problem of the server being unable to start up due to the memory of different batches and different capacities of the same memory manufacturer being connected to the server.

[0107] The above description is only an overview of the technical solution of the present application. In order to more clearly understand the technical means of the present application, it can be implemented in accordance with the contents of the specification. In order to make the above and other purposes, features and advantages of the present application more obvious and easy to understand, the specific implementation methods of the present application are listed below. BRIEF DESCRIPTION OF THE DRAWINGS

[0108] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments of the present application. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0109] FIG1 is a flowchart of a method for adjusting memory capacity according to an embodiment of the present application;

[0110] FIG2 is a flowchart of the steps of an SPD data storage method provided in an embodiment of the present application;

[0111] FIG3 is a flowchart of another SPD data storage method provided by an embodiment of the present application;

[0112] FIG4 is a flowchart of a method for reading SPD data provided by an embodiment of the present application;

[0113] FIG5 is a flowchart of another SPD data reading method provided in an embodiment of the present application;

[0114] FIG6 is a flowchart of another SPD data reading method provided in an embodiment of the present application;

[0115] FIG7 is a flowchart of another method for adjusting memory capacity according to an embodiment of the present application;

[0116] FIG8 is a flowchart of a memory initialization method according to an embodiment of the present application;

[0117] FIG9 is a flowchart of another memory initialization method provided in an embodiment of the present application;

[0118] FIG10 is a flowchart of another memory initialization method provided in an embodiment of the present application;

[0119] FIG11 is a flowchart of another memory adjustment method provided in an embodiment of the present application;

[0120] FIG12 is a schematic diagram of a server memory physical link provided by an embodiment of the present application;

[0121] FIG13 is a schematic diagram of a server startup process provided in an embodiment of the present application;

[0122] FIG14 is a schematic diagram of a hardware structure provided in an embodiment of the present application;

[0123] FIG15 is a schematic structural diagram of a memory capacity adjustment device provided in an embodiment of the present application;

[0124] FIG16 is a schematic structural diagram of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0125] The following will be combined with the drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0126] 1 , a flowchart of a memory capacity adjustment method provided by an embodiment of the present invention is shown. The memory capacity adjustment method can be applied to BIOS. As shown in FIG1 , the memory capacity adjustment method can include: step 101 and step 102 .

[0127] Step 101: Read the SPD data of the reserved target memory from the BIOS image of the BIOS, where the target memory is the physical memory without an SPD controller.

[0128] The embodiments of the present application can be applied to a scenario in which the memory capacity of a memory without an SPD controller is dynamically adjusted.

[0129] The embodiments of the present application can be applied to BIOS, also known as basic input and output system, that is, the execution entity is BIOS.

[0130] In a specific implementation, the memory's SPD data, also known as memory configuration data, can be pre-stored within the BIOS image, eliminating the need for a built-in SPD controller, also known as a memory configuration controller, within the memory. The SPD data storage process is described in detail below with reference to Figure 2.

[0131] 2 , a flowchart of a method for storing SPD data according to an embodiment of the present invention is shown. As shown in FIG2 , the method for storing SPD data may include: step 201 , step 202 , step 203 , and step 204 .

[0132] Step 201: Acquire SPD data of multiple types of memory, where the multiple types of memory include a target memory.

[0133] In this embodiment, when performing SPD data storage, SPD data of multiple types of memories may be acquired, wherein the multiple types of memories may include a target memory.

[0134] In practical applications, the multiple types of memory may include: memories of different models and different memory capacities from different memory manufacturers.

[0135] When storing SPD data, SPD data of various types of memory may be obtained. The SPD data of various types of memory may be SPD data defined by a memory manufacturer when producing the memory.

[0136] After the SPD data of the multiple types of memories are acquired, step 202 is executed.

[0137] Step 202: Create a data structure corresponding to each memory parameter in the BIOS image.

[0138] In this example, a data structure is a data structure used to store data. In the C language, a data structure is a type of aggregate data type. A data structure can be declared as a variable, pointer, or array, to implement complex data structures. A data structure is also a collection of elements, which are called structure members. In this example, SPD data can be stored as a member of a data structure.

[0139] After obtaining the SPD data of multiple types of memory, a data structure corresponding to each memory parameter can be established in the BIOS image. In this example, the SPD data of one memory parameter corresponds to one data structure.

[0140] After the data structure corresponding to each memory parameter is created in the BIOS image, step 203 is executed.

[0141] Step 203: According to the memory parameters of each type of memory, the SPD data of each type of memory is stored in a corresponding data structure.

[0142] After a data structure corresponding to each memory parameter is established in the BIOS image, the memory parameters of each type of memory and the SPD data of each type of memory may be stored in the corresponding data structure.

[0143] Step 204: Store the data structure of each type of memory in the storage address corresponding to each type of memory.

[0144] Furthermore, the data structure of each type of memory can be stored in the storage address corresponding to each type of memory. In a specific implementation, the storage address can be an I2C (Inter-Integrated Circuit) address, each type of memory can correspond to an I2C address, and multiple data structures can be stored in one I2C address. As shown in Figure 12, the SPD address corresponding to memory 0 can include: SPD address A0, SPD address A2, SPD address A4, SPD address A6 under CPU0, and SPD address B0, SPD address B2, SPD address B4, SPD address B6. And SPD address C0, SPD address C2, SPD address C4, SPD address C6 under CPU1, and SPD address D0, SPD address D2, SPD address D4, SPD address D6, etc. The CPU (Central Processing Unit) can read the corresponding SPD data from the SPD address through the I2C protocol.

[0145] The embodiment of the present application stores different types of SPD data in the BIOS image, so that the memory capacity of the memory can be dynamically adjusted even after the SPD controller is removed from the memory.

[0146] In this embodiment, in addition to the SPD data of the memory defined by the memory manufacturer, the user can also set corresponding memory capacity parameters for different memory devices and replace the original memory capacity parameters of the acquired SPD data to generate and store new SPD data. This implementation process is described in detail below with reference to FIG3.

[0147] 3 , a flowchart of another SPD data storage method provided by an embodiment of the present application is shown. As shown in FIG3 , the SPD data storage method may include: step 301 , step 302 , and step 303 .

[0148] Step 301: Obtain the memory capacity parameters of each type of memory set by the user.

[0149] In an embodiment of the present application, after obtaining SPD data of multiple types of memory, the user can set the memory capacity parameters of each type of memory.

[0150] In a specific implementation, the user may set one memory capacity parameter or multiple memory capacity parameters for each type of memory. Specifically, it may be determined according to business needs, and this embodiment does not impose any restrictions on this.

[0151] After the memory capacity parameters of each type of memory set by the user are obtained, step 302 is executed.

[0152] Step 302: replacing the original memory capacity parameter in the SPD data of each type of memory based on the memory capacity parameter to generate new SPD data of each type of memory.

[0153] After the memory capacity parameters of each type of memory set by the user are acquired, the original memory capacity parameters in the SPD data of each type of memory may be replaced based on the memory capacity parameters to generate new SPD data of each type of memory.

[0154] Step 303: Store the SPD data and the new SPD data in corresponding data structures respectively, and different SPD data corresponds to different data structures.

[0155] Furthermore, a data structure corresponding to the new SPD data can be created in the storage address corresponding to each type of memory, and then the SPD data and the new SPD data are respectively stored in the corresponding data structures, and different SPD data corresponds to different data structures.

[0156] In this embodiment, the user can customize the memory capacity parameters of the memory, so that the memory capacity can be adjusted on demand in the future, the physical memory can be set according to the actual needs of the user, and the memory capacity of the server can be dynamically adjusted to meet the actual business needs of the customer.

[0157] After the SPD data is stored, when the target memory is initialized, the reserved SPD data for the target memory can be read from the BIOS image. This target memory is the physical memory without an SPD controller. In a specific implementation, after the BIOS enters the initialization phase, the user can set the memory capacity parameters for the target memory. SPD data matching these memory capacity parameters can then be read from the BIOS image. This implementation process is described in detail below with reference to FIG4 .

[0158] 4 , a flowchart of a method for reading SPD data according to an embodiment of the present invention is shown. As shown in FIG4 , the method for reading SPD data may include: step 401 and step 402 .

[0159] Step 401: After the BIOS enters the initialization phase in response to the server startup, the memory capacity parameter set by the user for the target memory is obtained.

[0160] In an embodiment of the present application, after the server is powered on, the BIOS may start to enter the initialization phase, as shown in Figure 14. After the server is powered on, the BIOS begins to initialize the memory. At this time, the BIOS interface may be displayed, and the user may set the memory capacity parameters for the target memory in the BIOS interface, that is, the user sets the memory capacity required to adjust the target memory.

[0161] After obtaining the memory capacity parameters set by the user for the target memory, step 402 is executed.

[0162] Step 402: Read the SPD data of the target memory that matches the memory capacity parameter from the BIOS image.

[0163] After obtaining the user-set memory capacity parameters for the target memory, the SPD data matching the target memory capacity parameters can be read from the BIOS image. This SPD data contains the user-set memory capacity parameters. As shown in Figure 14, the BIOS can read the memory SPD data via the I2C protocol. First, the BIOS obtains the preset value for the memory capacity option and then reads the BIOS's preset SPD data according to the preset value.

[0164] In the embodiment of the present application, the memory capacity of the target memory can be set according to the actual needs of the user by allowing the user to customize the memory capacity parameters of the target memory, thereby meeting the actual business needs of the user.

[0165] In a specific implementation, when reading SPD data that matches the memory capacity parameter, the storage address corresponding to the target memory can be obtained, and then the corresponding SPD data can be read from the storage address. The implementation process can be described in detail below with reference to FIG5 .

[0166] 5 , there is shown a flowchart of another SPD data reading method provided by an embodiment of the present application. As shown in FIG5 , the SPD data reading method may include: step 501 and step 502 .

[0167] Step 501: Determine a target storage address corresponding to the target memory according to the memory type of the target memory.

[0168] In this embodiment, after obtaining the memory capacity parameters of the target memory set by the user, the target storage address corresponding to the target memory can be determined according to the memory type of the target memory, that is, at least one SPD data of the target memory is stored in the target storage address.

[0169] After determining the target storage address corresponding to the target memory according to the memory type of the target memory, step 502 is executed.

[0170] Step 502: Read SPD data matching the memory capacity parameter from the target storage address based on a preset protocol.

[0171] After determining the target storage address corresponding to the target memory based on the memory type of the target memory, SPD data matching the memory capacity parameters can be read from the target storage address based on a preset protocol. In this example, the target storage address can be an I2C address, and the preset protocol is the I2C protocol. After determining the target storage address, SPD data matching the memory capacity parameters can be read from the I2C address based on the I2C protocol.

[0172] In a specific implementation, after determining the target storage address corresponding to the target memory, the corresponding target data structure can also be determined based on the memory capacity parameter, so that the corresponding SPD data can be read from the target data structure of the target memory. The implementation process can be described in detail below with reference to FIG6.

[0173] 6 , there is shown a flowchart of steps of another SPD data reading method provided by an embodiment of the present application. As shown in FIG6 , the SPD data reading method may include: step 601 and step 602 .

[0174] Step 601: Obtain a target data structure corresponding to a memory capacity parameter.

[0175] In the embodiment of the present application, after obtaining the target memory capacity parameter set by the user, the target data structure corresponding to the memory capacity parameter can be obtained. It is understood that since each type of SPD data corresponds to a corresponding data structure, the BIOS can pre-record this correspondence. Furthermore, after obtaining the target memory capacity parameter set by the user, the target data structure corresponding to the memory capacity parameter can be determined based on this correspondence.

[0176] After the target data structure corresponding to the memory capacity parameter is obtained, step 602 is executed.

[0177] Step 602: Read the SPD data matching the memory capacity parameter in the target data structure from the target storage address based on a preset protocol.

[0178] After obtaining the target data structure corresponding to the memory capacity parameter, the SPD data matching the memory capacity parameter in the target data structure can be read from the target storage address based on a preset protocol.

[0179] The embodiment of the present application sets a corresponding storage address for each memory in advance and designs a corresponding data structure for different SPD data of the memory, so that after obtaining the memory capacity parameters set by the user, the corresponding SPD data can be quickly read, thereby improving the efficiency of data reading and thus improving the efficiency of memory initialization.

[0180] After the SPD data of the reserved target memory is read from the BIOS image of the BIOS, step 102 is executed.

[0181] Step 102: Adjust the memory capacity of the target memory based on the SPD data of the target memory.

[0182] After reading the reserved SPD data of the target memory from the BIOS image of the BIOS, the memory capacity of the target memory can be adjusted based on the SPD data of the target memory. The memory capacity adjustment process can be described in detail below with reference to FIG.

[0183] 7 , there is shown a flowchart of another method for adjusting memory capacity provided by an embodiment of the present application. As shown in FIG7 , the method for adjusting memory capacity may include: step 701 and step 702 .

[0184] Step 701: Assign the SPD data of the target memory to the target memory.

[0185] In this embodiment, after the SPD data of the target memory is read from the BIOS image, the SPD data of the target memory can be assigned to the target memory. As shown in Figure 14, the BIOS can assign the BIOS built-in SPD data to the memory and initialize it.

[0186] Step 702: Initialize the target memory to adjust the memory capacity of the target memory.

[0187] Furthermore, the target memory may be initialized to adjust the memory capacity of the target memory.

[0188] By storing the memory's SPD data in the BIOS image, the present embodiment can directly assign the memory to the memory when the server boots up using the reserved SPD data in the BIOS image. This allows for memory capacity adjustment without an SPD controller, eliminating the need for manual disassembly and adjustment of memory capacity. This avoids the problem of memory lifespan reduction caused by frequent memory removal, reducing operation and maintenance costs. Furthermore, it also avoids the problem of server failure to boot due to memory of different capacities and different batches from the same memory vendor being connected to the server.

[0189] In a specific implementation, after the target memory is initialized, it is also possible to check whether there is any uninitialized memory in the memory of the server to which the BIOS is connected. If there is any uninitialized memory in the memory of the server to which the BIOS is connected, the uninitialized memory can be initialized in sequence. This implementation process can be described in detail below with reference to FIG8.

[0190] 8 , which shows a flow chart of steps of a memory initialization method provided by an embodiment of the present application. As shown in FIG8 , the memory initialization method may include: step 801 , step 802 , and step 803 .

[0191] Step 801: After the target memory is initialized, check whether there is any uninitialized memory in the memory of the server to which the BIOS is connected.

[0192] In the embodiment of the present application, after the target memory is initialized, it is possible to check whether there is any uninitialized memory in the memory of the server to which the BIOS belongs. As shown in Figure 14, after the current memory is initialized, it is possible to determine whether all memory initializations have been completed. If not, the next memory is initialized and the next memory is initialized according to the above-mentioned SPD data reading and assignment process until all memory initializations are completed.

[0193] Step 802: When there is uninitialized memory in the memory, identify the uninitialized memory in the memory in sequence.

[0194] When uninitialized memory exists in the memory of the server to which the BIOS is connected, the uninitialized memory in the memory of the server to which the BIOS is connected can be identified in sequence.

[0195] Step 803: Read the SPD data of the uninitialized memory from the BIOS image in sequence to initialize the uninitialized memory in sequence.

[0196] Furthermore, the SPD data of uninitialized memory can be sequentially read from the BIOS image to initialize the uninitialized memory. For example, if the uninitialized memory includes memory 1, memory 2, and memory 3, then the SPD data of memory 1 can be first read from the BIOS image to assign the value to memory 1 and initialize memory 1. Then, the SPD data of memory 2 can be read from the BIOS image to assign the value to memory 2 and initialize memory 2. Finally, the SPD data of memory 3 can be read from the BIOS image to assign the value to memory 3 and initialize memory 3, etc.

[0197] It can be understood that the above examples are merely examples listed for a better understanding of the technical solutions of the embodiments of the present application, and are not intended to be the sole limitation on the embodiments.

[0198] The embodiment of the present application can complete the initialization of all memories by checking whether all memories have been initialized and performing initialization processing in sequence, thereby avoiding the situation where the computer cannot be started normally due to uninitialized memory.

[0199] In a specific implementation, if all memory in the server is initialized, it can be determined whether the server has booted normally. If so, the memory initialization process ends and the server can be booted normally. If the server does not boot normally, the memory can be reinitialized. This implementation process is described in detail below with reference to Figure 9.

[0200] 9 , there is shown a flowchart of another memory initialization method provided by an embodiment of the present application. As shown in FIG9 , the memory initialization method may include: step 901 and step 902 .

[0201] Step 901: After checking that all memory initialization is complete, determine whether the server is started normally.

[0202] In this embodiment, after checking that all memories of the access server have been initialized, the server continues to start, and the BIOS determines whether the server can start normally.

[0203] If the server is not started normally, execute step 902.

[0204] Step 902: In response to the server not starting normally, reinitialize the memory.

[0205] When it is determined that the server is not started normally, the memory can be reinitialized in response to the server not starting normally, that is, all memories connected to the server are reinitialized.

[0206] In this example, the minimum memory parameters of all memories can be obtained, and all memories can be reinitialized in combination with the SPD data corresponding to the minimum memory parameters. This implementation process can be described in detail below with reference to FIG10.

[0207] 10 , which shows a flowchart of steps of another memory initialization method provided by an embodiment of the present application. As shown in FIG10 , the memory initialization method may include: step 1001 , step 1002 , and step 1003 .

[0208] Step 1001: Obtain a preset minimum memory parameter.

[0209] In this embodiment, when it is determined that the server is not started normally, a preset minimum memory parameter of the memory of the access server may be obtained.

[0210] It can be understood that the minimum memory parameter may be a parameter set by a memory manufacturer when producing the memory.

[0211] After obtaining the preset minimum memory parameter, step 1002 is executed.

[0212] Step 1002: Read target SPD data corresponding to the minimum memory parameter from the BIOS image.

[0213] After obtaining the preset minimum memory parameters of the memory, the target SPD data corresponding to the minimum memory parameters can be read from the BIOS image.

[0214] Step 1003: Assign the target SPD data to the memory and initialize the memory.

[0215] Then, the target SPD data can be assigned to the memory, and the memory can be initialized before the server continues to boot. As shown in Figure 14, if the server boots normally, the memory initialization is complete and the server can boot normally. If the server does not boot normally, it is reinitialized and the minimum capacity of SPD data is loaded.

[0216] The embodiment of the present application can solve the problem that the server cannot start normally after the memory capacity is adjusted by reinitializing the memory according to the SPD data of the minimum memory parameter when the server cannot start normally.

[0217] In a specific implementation, after the memory is reinitialized and the server is started normally, the memory capacity of the memory may not be adjusted, that is, the memory capacity adjustment process is terminated.

[0218] In another specific implementation, after the memory is reinitialized and the server is started normally, the user can set the memory parameters to adjust the memory capacity of the memory. The implementation process can be described in detail below with reference to FIG11.

[0219] 11 , there is shown a flowchart of steps of another memory adjustment method provided by an embodiment of the present application. As shown in FIG11 , the memory adjustment method may include: step 1101 and step 1102 .

[0220] Step 1101: In response to the server starting normally, the SPD data in the memory is read sequentially from the BIOS image.

[0221] In this embodiment, after the memory is reinitialized and the server boots normally, the SPD data of the memory can be sequentially read from the BIOS image in response to the normal server boot. Specifically, the user can re-set the memory capacity parameters of the memory, and then read the SPD data corresponding to the memory capacity parameters from the BIOS image.

[0222] Step 1102: Initialize the memory based on the SPD data of the memory in sequence to adjust the memory capacity of the memory.

[0223] Furthermore, the memory can be initialized based on the SPD data of the memory in sequence to adjust the memory capacity of the memory.

[0224] The embodiment of the present application can achieve dynamic adjustment of memory capacity by adjusting the memory capacity according to SPD data after the server is started.

[0225] The above implementation process can be described in detail as follows in conjunction with FIG13 .

[0226] As shown in Figure 13, after the server boots, BIOS memory initialization begins. First, the BIOS reads the SPD data of the memory I2C address through the I2C protocol. When the BIOS reads the SPD data, it first obtains the memory capacity setting parameters of the memory capacity option on the BIOS interface, that is, the preset value of the memory capacity option. Then, after the BIOS obtains the BIOS option memory parameter setting, it reads the SPD data corresponding to the parameter. After the BIOS obtains the BIOS preset SPD data parameters according to the BIOS option setting, it assigns the parameters to the memory identified at this time and initializes the memory. When the memory module identified by the BIOS has been initialized, the parameters of the next memory are read and initialized. After all memory initialization is completed, the server continues to boot; if the server cannot continue to boot after initialization is completed, the memory is reinitialized and the memory parameters are set to the minimum settings, ignoring the BIOS memory capacity option setting value.

[0227] The memory capacity adjustment method provided in the embodiment of the present application reads the reserved SPD data of the target memory from the BIOS image of the BIOS, where the target memory is the physical memory without an SPD controller. Based on the SPD data of the target memory, the memory capacity of the target memory is adjusted. In the embodiment of the present application, the SPD data of the memory is stored in the BIOS image. When the server starts, it can be directly assigned to the memory through the SPD data reserved in the BIOS image, thereby realizing memory capacity adjustment without an SPD controller. There is no need to manually disassemble and adjust the memory capacity, thereby avoiding the problem of reduced memory life due to frequent memory disassembly and reducing operation and maintenance costs. At the same time, it can also avoid the problem of the server being unable to start up due to the memory of different batches and different capacities of the same memory manufacturer being connected to the server.

[0228] 15, a schematic diagram of a memory capacity adjustment device provided by an embodiment of the present application is shown. The memory capacity adjustment device can be applied to BIOS. As shown in FIG15, the memory capacity adjustment device 1500 may include the following modules:

[0229] An SPD data reading module 1510 is configured to read SPD data of a reserved target memory from a BIOS image of the BIOS, where the target memory is a physical memory without an SPD controller.

[0230] The memory capacity adjustment module 1520 is configured to adjust the memory capacity of the target memory based on the SPD data of the target memory.

[0231] In some embodiments, the apparatus further comprises:

[0232] An SPD data acquisition module is used to acquire SPD data of various types of memory, including target memory;

[0233] A data structure creation module is used to create a data structure corresponding to each memory parameter in the BIOS image;

[0234] An SPD data storage module is used to store the SPD data of each type of memory in a corresponding data structure according to the memory parameters of each type of memory;

[0235] The data structure storage module is used to store the data structure of each type of memory in the storage address corresponding to each type of memory.

[0236] In some embodiments, the SPD data storage module includes:

[0237] A memory capacity parameter acquisition unit, used to acquire the memory capacity parameters of each type of memory set by the user;

[0238] A new SPD data generating unit, configured to replace the original memory capacity parameter in the SPD data of each type of memory based on the memory capacity parameter, and generate new SPD data for each type of memory;

[0239] The SPD data storage unit is used to store the SPD data and new SPD data in corresponding data structures respectively, and different SPD data corresponds to different data structures.

[0240] In some embodiments, the SPD data reading module includes:

[0241] A memory parameter setting unit, configured to obtain a memory capacity parameter set by a user for a target memory after the BIOS enters an initialization phase in response to the server starting up;

[0242] The SPD data reading unit is used to read SPD data matching the memory capacity parameter of the target memory from the BIOS image.

[0243] In some embodiments, the SPD data reading unit includes:

[0244] A target address determination subunit, configured to determine a target storage address corresponding to the target memory according to a memory type of the target memory;

[0245] The SPD data reading subunit is used to read SPD data matching the memory capacity parameters from the target storage address based on a preset protocol.

[0246] In some embodiments, the SPD data reading subunit includes:

[0247] The target structure acquisition subunit is used to obtain the target data structure corresponding to the memory capacity parameter;

[0248] The SPD data acquisition subunit is used to read the SPD data matching the memory capacity parameter in the target data structure from the target storage address based on a preset protocol.

[0249] In some embodiments, the memory capacity adjustment module includes:

[0250] An SPD data assignment unit is used to assign the SPD data of the target memory to the target memory;

[0251] The memory capacity adjustment unit is used to initialize the target memory to adjust the memory capacity of the target memory.

[0252] In some embodiments, the apparatus further comprises:

[0253] An uninitialized memory checking module is used to check whether there is any uninitialized memory in the memory of the server connected to the BIOS after the target memory is initialized;

[0254] An uninitialized memory identification module is used to sequentially identify uninitialized memory in the memory when there is uninitialized memory in the memory;

[0255] The memory initialization module is used to read the SPD data of the uninitialized memory from the BIOS image in sequence, so as to initialize the uninitialized memory in sequence.

[0256] In some embodiments, the apparatus further comprises:

[0257] A normal startup determination module is used to determine whether the server has started normally after checking that all memory initialization has been completed;

[0258] The memory reinitialization module is used to reinitialize the memory in response to the server not starting normally.

[0259] In some embodiments, the memory reinitialization module includes:

[0260] A minimum memory parameter obtaining unit, used to obtain a preset minimum memory parameter;

[0261] A target SPD data reading unit is used to read target SPD data corresponding to the minimum memory parameter from the BIOS image;

[0262] The memory initialization unit is used to assign the target SPD data to the memory and initialize the memory.

[0263] In some embodiments, the apparatus further comprises:

[0264] A memory SPD data reading module is used to read the SPD data of the memory from the BIOS image in sequence in response to the normal startup of the server;

[0265] The memory adjustment module is used to perform initialization processing on the memory based on the SPD data of the memory in sequence to adjust the memory capacity of the memory.

[0266] In some embodiments, the apparatus further comprises:

[0267] The initialization process ending module is used to end the memory initialization process in response to the normal startup of the server.

[0268] The memory capacity adjustment device provided in the embodiment of the present application reads the reserved SPD data of the target memory from the BIOS image of the BIOS, where the target memory is the physical memory without an SPD controller. Based on the SPD data of the target memory, the memory capacity of the target memory is adjusted. In the embodiment of the present application, the SPD data of the memory is stored in the BIOS image. When the server starts, it can be directly assigned to the memory through the SPD data reserved in the BIOS image, thereby realizing memory capacity adjustment without an SPD controller. There is no need to manually disassemble and adjust the memory capacity, thereby avoiding the problem of reduced memory life due to frequent memory disassembly and reducing operation and maintenance costs. At the same time, it can also avoid the problem of the server being unable to start up due to the memory of different batches and different capacities of the same memory manufacturer being connected to the server.

[0269] In addition, an embodiment of the present application further provides an electronic device, comprising: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the computer program implements the above-mentioned memory capacity adjustment method when executed by the processor.

[0270] Figure 16 shows a schematic diagram of the structure of an electronic device 1600 of an embodiment of the present application. As shown in Figure 16, the electronic device 1600 includes a central processing unit (CPU) 1601, which can perform various appropriate actions and processes according to computer program instructions stored in a read-only memory (ROM) 1602 or computer program instructions loaded from a storage unit 1608 into a random access memory (RAM) 1603. In RAM 1603, various programs and data required for the operation of the electronic device 1600 can also be stored. CPU 1601, ROM 1602, and RAM 1603 are connected to each other via a bus 1604. An input / output (I / O) interface 1605 is also connected to the bus 1604.

[0271] Multiple components in electronic device 1600 are connected to I / O interface 1605, including: an input unit 1606, such as a keyboard, mouse, microphone, etc.; an output unit 1607, such as various types of displays, speakers, etc.; a storage unit 1608, such as a magnetic disk, optical disk, etc.; and a communication unit 1609, such as a network card, modem, wireless communication transceiver, etc. The communication unit 1609 allows electronic device 1600 to exchange information / data with other devices via a computer network such as the Internet and / or various telecommunication networks.

[0272] The various processes and procedures described above may be executed by the processing unit 1601. For example, the method of any of the above embodiments may be implemented as a computer software program, which is tangibly contained in a computer-readable medium, such as the storage unit 1608. In some embodiments, part or all of the computer program may be loaded and / or installed on the electronic device 1600 via the ROM 1602 and / or the communication unit 1609. When the computer program is loaded into the RAM 1603 and executed by the CPU 1601, one or more actions in the method described above may be performed.

[0273] The present application also provides a non-volatile computer-readable storage medium having a computer program stored thereon. When the computer program is executed by a processor, the various processes of the above-mentioned memory capacity adjustment method embodiment are implemented, and the same technical effects are achieved. To avoid repetition, the details are not described here. The non-volatile computer-readable storage medium may be a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk.

[0274] The above are only specific embodiments of the present application, but the scope of protection of this application is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in this application should be included in the scope of protection of this application. Therefore, the scope of protection of this application should be based on the scope of protection of the claims.

Claims

1. A memory capacity adjustment method, characterized in that: Applied to a basic input and output system, the method comprises: Reading memory configuration data of a reserved target memory from the image of the basic input / output system, wherein the target memory is a physical memory without a memory configuration controller; Based on the memory configuration data of the target memory, the memory capacity of the target memory is adjusted.

2. The method according to claim 1, characterized in that: Before reading the memory configuration data of the reserved target memory from the image of the basic input and output system, the method further includes: Acquire memory configuration data of multiple types of memory, wherein the multiple types of memory include the target memory; Establishing a data structure corresponding to each memory parameter in the image; According to the memory parameters of each type of memory, the memory configuration data of each type of memory is stored in a corresponding data structure; The data structure of each type of memory is stored in the storage address corresponding to each type of memory.

3. The method according to claim 2, characterized in that According to the memory parameters of each type of memory, the memory configuration data of each type of memory is stored in a corresponding data structure, including: Get the memory capacity parameters of each type of memory set by the user; Replacing original memory capacity parameters in memory configuration data of each type of memory based on the memory capacity parameters to generate new memory configuration data of each type of memory; The memory configuration data and the new memory configuration data are respectively stored in corresponding data structures, and different memory configuration data correspond to different data structures.

4. The method according to claim 3, characterized in that Before storing the memory configuration data and the new memory configuration data in corresponding data structures respectively, the method further includes: A data structure corresponding to the new memory configuration data is created in the storage address corresponding to each type of memory to store the new memory configuration data.

5. The method according to claim 1, characterized in that The step of reading the reserved target memory configuration data from the image of the basic input / output system includes: In response to the server startup, after the basic input and output system enters the initialization phase, obtaining a memory capacity parameter set by the user for the target memory; Memory configuration data of the target memory that matches the memory capacity parameter is read from the image.

6. The method according to claim 4, characterized in that The obtaining of the memory capacity parameter set by the user for the target memory includes: In response to the basic input and output system entering an initialization phase, displaying an interface of the basic input and output system; According to the interface of the input-output system, a memory capacity parameter set by the user for the target memory is obtained.

7. The method according to claim 5, characterized in that The step of reading memory configuration data of the target memory that matches the memory capacity parameter from the image includes: Determining a target storage address corresponding to the target memory according to a memory type of the target memory; Memory configuration data matching the memory capacity parameter is read from the target storage address based on a preset protocol.

8. The method according to claim 7, characterized in that The reading of memory configuration data matching the memory capacity parameter from the target storage address based on a preset protocol includes: Obtaining a target data structure corresponding to the memory capacity parameter; Memory configuration data matching the memory capacity parameter in the target data structure is read from the target storage address based on the preset protocol.

9. The method according to claim 8, characterized in that The step of obtaining a target data structure corresponding to the memory capacity parameter includes: Acquire a pre-recorded correspondence between the memory capacity parameter and the data structure; According to the memory capacity parameter and the corresponding relationship, a target structure data structure corresponding to the memory capacity parameter is obtained.

10. The method according to claim 1, characterized in that The adjusting the memory capacity of the target memory based on the memory configuration data of the target memory includes: Assigning the memory configuration data of the target memory to the target memory; The target memory is initialized to adjust the memory capacity of the target memory.

11. The method according to claim 1, characterized in that: After adjusting the memory capacity of the target memory based on the memory configuration data of the target memory, the method further includes: After the target memory is initialized, checking whether there is any uninitialized memory in the memory of the server to which the basic input and output system belongs; In the case that there is uninitialized memory in the memory, identifying the uninitialized memory in the memory in sequence; The memory configuration data of the uninitialized memory is read sequentially from the image to initialize the uninitialized memory sequentially.

12. The method according to claim 11, characterized in that After checking whether there is uninitialized memory in the memory of the server to which the basic input and output system belongs, the method further includes: After checking that the memory is completely initialized, determining whether the server is started normally; In response to the server not starting normally, the memory is reinitialized.

13. The method according to claim 12, characterized in that The re-initialization of the memory includes: Obtaining a preset minimum memory parameter of the memory; Reading target memory configuration data corresponding to the minimum memory parameter from the image; The target memory configuration data is assigned to the memory, and the memory is initialized.

14. The method according to claim 12, characterized in that After the memory is reinitialized, the method further includes: In response to the server starting normally, reading the memory configuration data of the memory from the image in sequence; The memory is initialized based on the memory configuration data of the memory in turn to adjust the memory capacity of the memory.

15. The method according to claim 14, characterized in that In response to the server starting normally, sequentially reading the memory configuration data of the memory from the image includes: In response to the server starting normally, obtaining a memory capacity parameter of each type of memory set again by the user; According to the memory capacity parameter, the memory configuration corresponding to the memory capacity parameter is read from the image in sequence data.

16. The method according to claim 12, characterized in that After determining whether the server is started normally, the method further includes: In response to the server starting up normally, the memory initialization process ends.

17. The method according to claim 2, characterized in that The multiple types of memories include at least memories of different models and different memory capacities from different memory manufacturers.

18. A memory capacity adjustment device, characterized in that: Applied to a basic input and output system, the device comprises: A memory configuration data reading module, used for reading memory configuration data of a reserved target memory from the image of the basic input and output system, wherein the target memory is a physical memory without a memory configuration controller; A memory capacity adjustment module is used to adjust the memory capacity of the target memory based on the memory configuration data of the target memory.

19. An electronic device, characterized in that: include: A memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the computer program, when executed by the processor, implements the memory capacity adjustment method according to any one of claims 1 to 17.

20. A computer non-volatile readable storage medium, characterized in that: When the instructions in the computer non-volatile readable storage medium are executed by a processor of an electronic device, the electronic device is enabled to execute the memory capacity adjustment method described in any one of claims 1 to 17.

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