Display panel and preparation method therefor, and terminal device

Abstract

Disclosed in the embodiments of the present application are a display panel and a preparation method therefor, and a terminal device. The display panel comprises an integrated circuit substrate, a light-emitting device layer and a second electrode, which are arranged in sequence. The light-emitting device layer comprises a light-emitting region and an insulating barrier region, which are arranged spaced apart from each other, and the light-emitting device layer comprises a light-emitting device arranged in the light-emitting region, and an insulating layer arranged in the insulating barrier region, wherein two ends of the insulating layer are respectively connected to the second electrode and the integrated circuit substrate to form a closed accommodating cavity, and the light-emitting device is arranged in the closed accommodating cavity.

Description

Display panel, manufacturing method thereof, and terminal device

[0001] This application claims priority to Chinese patent application No. 202311641682.X filed on November 30, 2023, the entire contents of which are incorporated by reference into this application. Technical Field

[0002] The present application relates to the field of display technology, and in particular to a display panel, a preparation method thereof, and a terminal device. Background Art

[0003] The size of display panels continues to shrink and the pixel density continues to increase. The traditional display panel preparation process defines each light-emitting device and light-emitting area by etching a step structure. However, the sidewalls of the etched step structure formed by etching will have defects, which can easily form leakage channels and cause leakage current to increase, thereby reducing device performance and luminous efficiency. At the same time, the etched step structure formed by etching will increase the distance between adjacent light-emitting devices, which is not conducive to achieving an increase in pixel density.

[0004] Therefore, the existing display panel has a technical problem of large leakage current leading to low luminous efficiency. SUMMARY OF THE INVENTION

[0005] The embodiments of the present application provide a display panel, a method for manufacturing the same, and a terminal device, which can alleviate the technical problem of low luminous efficiency caused by large leakage current in existing display panels.

[0006] An embodiment of the present application provides a display panel, comprising:

[0007] An integrated circuit substrate, comprising a first substrate and a plurality of first electrodes disposed above the first substrate and spaced apart from each other;

[0008] a light-emitting device layer disposed above the integrated circuit substrate, the light-emitting device layer comprising light-emitting regions arranged in an array and insulating barrier regions disposed between adjacent light-emitting regions; the light-emitting device layer comprising light-emitting devices disposed in the light-emitting regions, a first electrode being electrically connected to a light-emitting device;

[0009] a second electrode, the second electrode being disposed on a side of the light-emitting device layer away from the substrate, and the second electrode being electrically connected to the light-emitting device;

[0010] Among them, the insulating barrier area of ​​the light-emitting device layer is provided with an insulating layer, and the insulating layer is arranged around the light-emitting device. The two ends of the insulating layer are respectively connected to the second electrode and the integrated circuit substrate to form a closed accommodating cavity. The light-emitting device is arranged in the closed accommodating cavity, and the adjacent light-emitting devices are insulated.

[0011] The present invention provides a method for manufacturing a display panel, including:

[0012] An integrated circuit substrate and a light-emitting device layer are provided, wherein the integrated circuit substrate includes a first substrate and a plurality of first electrodes arranged at intervals above the first substrate;

[0013] forming a first bonding layer on one side surface of the integrated circuit substrate, forming a second bonding layer on one side surface of the light-emitting device layer, and laminating the first bonding layer and the second bonding layer relative to each other to prepare a bonding metal layer;

[0014] defining a light-emitting region of the light-emitting device layer and an insulating barrier region surrounding the light-emitting region, and performing ion implantation on the insulating barrier region from one side of the light-emitting device layer to convert at least the light-emitting device layer in the insulating barrier region into an insulating layer, wherein the insulating layer insulates adjacent light-emitting devices;

[0015] A layer of transparent conductive material is formed on the entire surface of the side of the light emitting device layer away from the integrated circuit substrate to prepare a second electrode.

[0016] An embodiment of the present application provides a terminal device, the terminal device including a display panel, the display panel including:

[0017] An integrated circuit substrate, comprising a first substrate and a plurality of first electrodes disposed above the first substrate and spaced apart from each other;

[0018] a light-emitting device layer disposed above the integrated circuit substrate, the light-emitting device layer comprising light-emitting regions arranged in an array and insulating barrier regions disposed between adjacent light-emitting regions; the light-emitting device layer comprising light-emitting devices disposed in the light-emitting regions, a first electrode being electrically connected to a light-emitting device;

[0019] a second electrode, the second electrode being disposed on a side of the light-emitting device layer away from the substrate, and the second electrode being electrically connected to the light-emitting device;

[0020] Among them, the insulating barrier area of ​​the light-emitting device layer is provided with an insulating layer, and the insulating layer is arranged around the light-emitting device. The two ends of the insulating layer are respectively connected to the second electrode and the integrated circuit substrate to form a closed accommodating cavity. The light-emitting device is arranged in the closed accommodating cavity, and the adjacent light-emitting devices are insulated. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0022] FIG1 is a first cross-sectional schematic diagram of a display panel provided by the present application;

[0023] 2A to 2G are process state diagrams of the display panel manufacturing method provided in this application;

[0024] FIG3 is a flow chart of a method for manufacturing a display panel provided in the present application. Modes for Carrying Out the Invention

[0025] The embodiments of the present application merely illustrate exemplary embodiments of the inventive concept, which may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein.

[0026] The technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without making creative work are within the scope of protection of the present application. In addition, it should be understood that the specific implementation methods described herein are only used to illustrate and explain the present application, and are not used to limit the present application. In the present application, unless otherwise specified, the directional words used, such as "upper" and "lower", generally refer to the upper and lower parts of the device in actual use or working state, specifically the drawing direction in the accompanying drawings; and "inside" and "outside" refer to the outline of the device.

[0027] Referring to FIG1 , the display panel 1 provided in the present application includes an integrated circuit substrate 10, a light-emitting device layer 20, and a second electrode 30. The integrated circuit substrate 10 includes a first substrate 101, a plurality of first electrodes 102 arranged at intervals above the first substrate 101, the light-emitting device layer 20 is arranged above the integrated circuit substrate 10, the light-emitting device layer 20 includes light-emitting areas 2 arranged in an array, and an insulating barrier area 3 arranged between adjacent light-emitting areas 2, the light-emitting device layer 20 includes light-emitting devices 4 arranged in the light-emitting areas 2, a first electrode 102 arranged at intervals above the first substrate 101, and a second electrode 30. 2 is electrically connected to the bonding metal layer 201, the second electrode 30 is provided on a side of the light-emitting device layer 20 away from the substrate, and the second electrode 30 is electrically connected to the light-emitting device 4; wherein, the insulating barrier region 3 of the light-emitting device layer 20 is provided with an insulating layer 205, and the insulating layer 205 is provided around the light-emitting device 4, and the two ends of the insulating layer 205 are respectively connected to the second electrode 30 and the integrated circuit substrate 10 to form a closed accommodating cavity, and the light-emitting device 4 is provided in the closed accommodating cavity, and the adjacent light-emitting devices 4 are insulated.

[0028] The light emitting device 4 includes a bonding metal layer 201 , a first doped semiconductor layer 202 , a light emitting layer 203 , and a second doped semiconductor layer 204 , which are sequentially arranged on the integrated circuit substrate 10 .

[0029] The second electrode 30 may be made of a transparent material.

[0030] The second electrode 30 may be provided on the entire surface, or the second electrode 30 may be provided in a grid pattern.

[0031] In this embodiment, an insulating barrier area 3 is provided around the light-emitting area 2, and an insulating layer 205 is provided in the insulating barrier area 3 for insulating adjacent light-emitting devices 4. The two ends of the insulating layer 205 are respectively connected to the second electrode 30 and the integrated circuit substrate 10 to form a closed accommodating cavity. The closed accommodating cavity is used to define the position of the light-emitting device 4. The insulating layer 205 can reduce the lateral leakage current between adjacent light-emitting devices 4, thereby improving the luminous efficiency of the display panel.

[0032] The technical solution of this application is now described in conjunction with specific embodiments.

[0033] The display panel 1 of the present application may be an MLED display panel, and a Micro LED display panel is used as an example for illustration. Other display panels 1 are also included in the protection scope of the present application. The drawings in the specification of the present application only use the blue light-emitting layer 203 as an example for illustration. For white light-emitting layers or light-emitting layers 203 of other colors, the filter layer 40 may be adapted to maintain the light-emitting effect.

[0034] In one embodiment, the ratio of the width of the insulating barrier region 3 to the width of the light-emitting region 2 is in a range of 2:9 to 4:9.

[0035] The ratio of the width of the insulating barrier region 3 to the width of the light-emitting region 2 may be 2:9, 3:9, or 4:9.

[0036] The width of the insulating barrier region 3 refers to the cross-sectional width of the insulating barrier region 3 in any longitudinal section; the width of the light-emitting region 2 refers to the cross-sectional width of the light-emitting region 2 in the aforementioned longitudinal section.

[0037] It is understandable that, since the width of the insulating barrier region 3 can be made very small by ion implantation, the width ratio between the insulating barrier region 3 and the adjacent light-emitting device 4 is reduced, thereby improving the pixel density.

[0038] In this embodiment, the width of the insulating barrier region 3 is reduced by ion implantation, thereby increasing the arrangement density of the light-emitting devices 4 .

[0039] In one embodiment, referring to FIG. 1 , in the thickness direction, the insulating layer 205 is at least disposed through the light-emitting device layer 20 .

[0040] The insulating layer 205 may be disposed only in the light emitting device layer 20 .

[0041] The insulating layer 205 may also be partially disposed on the integrated circuit substrate 10 .

[0042] The insulating layer 205 being disposed at least through the light-emitting device layer 20 means that, in the film thickness direction, the thickness of the insulating layer 205 is greater than or equal to the thickness of the light-emitting device layer 20 in the insulating barrier region 3 .

[0043] The surface of the insulating layer 205 away from the integrated circuit substrate 10 may be flush with the surface of the light emitting device layer 20 away from the integrated circuit substrate 10 .

[0044] It can be understood that the insulating layer 205 needs to be set through the light-emitting device layer 20, so that adjacent light-emitting devices 4 cannot be connected through any of the bonding metal layer 201, the first doped semiconductor layer 202, the light-emitting layer 203, and the second doped semiconductor layer 204, so that adjacent light-emitting devices 4 are insulated; and the insulating layer 205 is formed by ion implantation, and there will be no leakage current caused by etching damage.

[0045] In this embodiment, the insulating layer 205 is provided at least through the light emitting device layer 20 , so that adjacent light emitting devices 4 are insulated from each other, further reducing the lateral leakage current between adjacent light emitting devices 4 , thereby improving the luminous efficiency.

[0046] In one embodiment, referring to Figure 1, the MLED further includes a filter layer 40 disposed on a side of the second electrode 30 away from the light-emitting device layer 20, the filter layer 40 including a filter pattern and a black matrix 404 arranged at intervals, wherein the light-emitting layer 203 is a blue light-emitting layer, the filter pattern including red color resist 401, green color resist 402, and a transparent pattern 403 arranged at intervals, and the preparation material of the transparent pattern 403 is a transparent material, or the light-emitting layer 203 is a white light-emitting layer, the filter pattern including red color resist 401, green color resist 402, and blue color resist arranged at intervals.

[0047] Among them, the preparation material of the red color resist 401 includes cadmium selenide, perovskite or indium phosphide, and the half-width of the red light transmittance of the preparation material of the red color resist 401 ranges from 30 nanometers to 50 nanometers. The preparation material of the green color resist 402 includes cadmium selenide, perovskite or indium phosphide, and the half-width of the green color resist 402 ranges from 30 nanometers to 50 nanometers. The preparation material of the blue color resist includes cadmium selenide, perovskite or indium phosphide, and the half-width of the blue color resist ranges from 30 nanometers to 50 nanometers.

[0048] When the light-emitting layer 203 is a blue light-emitting layer, the light-transmitting pattern 403 may be made of any one of polyacrylate resin, polyimide resin, and silica-based inorganic material.

[0049] The black matrix 404 may be made of a black epoxy resin material.

[0050] In one embodiment, the filter pattern is arranged corresponding to the light-emitting device 4 , and the black matrix 404 is arranged corresponding to the insulating layer 205 , wherein in the film thickness direction, the black matrix 404 and the insulating layer 205 are arranged to overlap.

[0051] The black matrix 404 and the insulating layer 205 being arranged to overlap each other means that, in the thickness direction, the orthographic projection of the black matrix 404 on the insulating layer 205 overlaps with the insulating layer 205 .

[0052] It can be understood that by making the black matrix 404 overlap with the insulating layer 205 , the shielding of the black matrix 404 in the light emitting direction of the light emitting device 4 is reduced, thereby enhancing the light emitting intensity.

[0053] In one embodiment, the bonding metal layer 201 includes a first part abutting against the integrated circuit substrate 10 and a second part abutting against the light-emitting device layer 20, wherein the first part and the second part are made of the same material, and the bonding metal layer 201 includes a first bonding layer and a second bonding layer that are stacked, the first bonding layer is arranged on the surface of the integrated circuit substrate 10 facing the light-emitting device layer 20, and the second bonding layer is arranged on the surface of the light-emitting device layer 20 facing the integrated circuit substrate 10, wherein the first bonding layer and the second bonding layer are made of the same material.

[0054] It can be understood that the bonding metal layer 201 includes a first part and a second part, and the preparation materials of the first part and the second part are the same. In the process of forming the bonding metal layer, the first bonding layer located on the surface of the integrated circuit substrate 10 facing the light-emitting device layer 20 forms the first part, and the second bonding layer located on the surface of the light-emitting device layer 20 facing the integrated circuit substrate 10 forms the second part. Since the first bonding layer and the second bonding layer are made of the same preparation material, the process is simplified and the cost is reduced.

[0055] In one embodiment, the second doped semiconductor layer 204 is made of at least one of gallium nitride, aluminum gallium nitride, and aluminum indium gallium nitride; the first doped semiconductor layer 202 is made of gallium nitride; and the light emitting layer 203 is made of indium gallium nitride or a quantum well material of gallium nitride.

[0056] In one embodiment, the bonding structure in the bonding metal layer 201 includes at least one of gold-gold bonding, gold-tin bonding, gold-indium bonding, titanium-titanium bonding, and copper-copper bonding.

[0057] In one embodiment, the thickness of the bonding metal layer 201 ranges from 0.1 micrometers to 3 micrometers.

[0058] In one embodiment, the bonding metal layer 201 may also be used to reflect light emitted from the light emitting device 4 above, thereby enhancing light extraction.

[0059] In one embodiment, the insulating layer 205 includes at least one of helium ions, carbon ions, nitrogen ions, oxygen ions, and fluorine ions.

[0060] It can be understood that by doping the above-mentioned ions that can increase the resistance of the light-emitting device layer 20 in the insulating barrier area 3, the light-emitting device layer 20 in the insulating barrier area 3 is converted into an insulating layer 205 with insulating properties, and the insulating layer 205 is used to realize the insulation setting between adjacent light-emitting devices 4 and define the setting position of the light-emitting device 4.

[0061] In one embodiment, a first periodic stress adjustment layer and a first current diffusion layer are further provided between the first doped semiconductor layer 202 and the light-emitting layer 203, and a second periodic stress adjustment layer and a second current diffusion layer are further provided between the second doped semiconductor layer 204 and the light-emitting layer 203, wherein the first periodic stress adjustment layer and the second periodic stress adjustment layer are used to reduce the stress inside the light-emitting device layer 20, the first current diffusion layer is used to reduce the contact resistance between the first doped semiconductor layer 202 and the light-emitting layer 203, and the second current diffusion layer is used to reduce the contact resistance between the second doped semiconductor layer 204 and the light-emitting layer 203.

[0062] It can be understood that the periodic stress adjustment layer and the current diffusion layer are used to enable the first doped semiconductor layer 202 and the second doped semiconductor layer 204 to better transmit electrons and holes to the light emitting layer 203 .

[0063] In one embodiment, the second electrode 30 is made of a transparent conductive oxide material.

[0064] The second electrode 30 is made of any one of indium tin oxide, aluminum-doped zinc oxide, nickel oxide, and a gold composite.

[0065] 2A to 2G and 3 , an embodiment of the present application provides a method for manufacturing a display panel 1 , which is used to manufacture the display panel 1 described in any of the above embodiments, including:

[0066] S1: providing an integrated circuit substrate 10 and a light-emitting device layer 20, wherein the integrated circuit substrate 10 includes a first substrate and a plurality of first electrodes disposed above the first substrate and spaced apart from each other;

[0067] S2: forming a first bonding layer on one side surface of the integrated circuit substrate 10, forming a second bonding layer on one side surface of the light-emitting device layer 20, and laminating the first bonding layer and the second bonding layer relative to each other to prepare a bonding metal layer 201;

[0068] S3: defining a light-emitting region 2 of the light-emitting device layer 20 and an insulating barrier region 3 surrounding the light-emitting region 2, and performing ion implantation on the insulating barrier region 3 from one side of the light-emitting device layer 20 to convert at least the light-emitting device layer 20 in the insulating barrier region 3 into an insulating layer 205. The insulating layer 205 insulates the adjacent light-emitting devices 4;

[0069] S4: forming a layer of transparent conductive material on the entire surface of the light-emitting device layer 20 away from the integrated circuit substrate 10 to prepare a second electrode 30 .

[0070] Regarding step S1 , please refer to FIG. 2A . The light-emitting device layer 20 includes a second substrate 60 , a second doped semiconductor layer 204 disposed on one side of the second substrate 60 , a light-emitting layer 203 , and a first doped semiconductor layer 202 .

[0071] 2B to 2C , the integrated circuit substrate 10 and the light-emitting device layer 20 in step S1 are connected via a bonding metal layer 201 , and the first bonding layer and the second bonding layer can be bonded by, but not limited to, welding.

[0072] For step S3, please refer to FIG. 2D and FIG. 2E; for step S4, please refer to FIG. 2F.

[0073] In one embodiment, referring to FIG. 2B , in step S1, the light-emitting device layer 20 further includes a second substrate 60, and a second doped semiconductor layer 204, a light-emitting layer 203, and a first doped semiconductor layer 202 are sequentially arranged on one side surface of the second substrate 60, wherein the preparation material of the second substrate 60 includes at least one of gallium nitride, aluminum nitride, silicon, and silicon carbide.

[0074] It is understandable that, referring to FIG. 2C , the second substrate 60 will be removed after the bonding metal layer 201 is prepared in step S2 , wherein the second substrate 60 can be removed by a laser lift-off process or wet chemical etching.

[0075] In one embodiment, the step of performing ion implantation on the insulating barrier region 3 further includes: converting the electrical property of the insulating barrier region 3 from conductive to insulating by controlling the conditions during ion implantation, such as ion type, dose, ion energy, implantation angle, etc.

[0076] It can be understood that, taking the first doped semiconductor layer 202 as an example, when the thickness of the first doped semiconductor layer 202 is 0.1 micron to 20 microns, when the depth of ion implantation needs to penetrate the first doped semiconductor layer 202, the energy of ion implantation is preferably 10 keV to 500 keV, and the time of ion implantation is preferably 1 minute to 10 minutes.

[0077] In one embodiment, referring to FIG. 2D , a photoresist material is coated on the surface of the second doped semiconductor layer 204 away from the integrated circuit substrate 10 , and the photoresist material is patterned using an exposure and development process to form a photoresist structure 50 , so that a photoresist structure 50 located in the light-emitting region 2 is arranged corresponding to a light-emitting device 4 .

[0078] After the step of performing ion implantation on the insulating barrier region 3 is completed, the photoresist structure 50 is removed.

[0079] In one embodiment, referring to FIG. 2G , after step S4 is completed, step S5 is further included: preparing a filter layer 40 on a side of the second electrode 30 away from the integrated circuit substrate 10 .

[0080] The filter layer 40 may include a red color resist 401 , a green color resist 402 , a light-transmitting pattern 403 , and a black matrix 404 .

[0081] Among them, a layer of red color conversion material is coated on the light-emitting area 2 that needs to emit red light to prepare the red color resist 401. The red color resist 401 may include red phosphor or red quantum dot material. The red quantum dot material may include cadmium selenide, perovskite, or indium phosphide. The half-peak width of the red color resist 401 is in the range of 30 nanometers to 50 nanometers.

[0082] Among them, a layer of green color conversion material is coated on the light-emitting area 2 that needs to emit green light to prepare the green color resist 402. The green color resist 402 may include green phosphor or green quantum dot material. The green quantum dot material may include cadmium selenide, perovskite, or indium phosphide. The half-peak width of the green color resist 402 is in the range of 30 nanometers to 50 nanometers.

[0083] Among them, the light-transmitting pattern 403 is prepared by coating a layer of transmissive material on the light-emitting area 2 that needs to emit blue light. The transmissive material can include any one of polyacrylate resin, polyimide resin, and silica-based inorganic material; it can be understood that at this time, the light-emitting layer 203 is a blue light-emitting layer.

[0084] The black matrix 404 may be made of a black epoxy resin material.

[0085] In the present application, an insulating barrier region 3 is set around the light-emitting region 2, and the insulating layer 205, the second electrode 30, and the integrated circuit substrate 10 in the insulating barrier region 3 are used to jointly define the position of the light-emitting device 4. There is no need to use an etching process to form an etched step structure to achieve the positioning of the light-emitting device 4, which avoids the side walls of the etched step structure being damaged by over-etching, resulting in an increase in the lateral leakage current, thereby reducing the lateral leakage current and improving the luminous efficiency of the display panel 1.

[0086] At the same time, since the insulating barrier region 3 is formed by injecting ions that increase resistance, the insulating barrier region 3 can be made very small, thereby reducing the distance between adjacent light-emitting devices 4 and improving the pixel density of the device.

[0087] At the same time, the present application uses a whole-surface light-emitting device layer 20 to bond with the integrated circuit substrate 10, and then defines the setting position of the light-emitting device 4 through the insulating barrier area 3, avoiding the use of high-precision bonding technology, which not only reduces costs but also improves yield.

[0088] The present application also proposes a display module and a terminal device, both of which include the above-mentioned display panel, which will not be repeated here; wherein, the display module also includes at least one of a back plate, a cover plate, an optical film, and a polarizer, and the terminal device includes but is not limited to a mobile phone, a laptop computer, and a tablet computer.

[0089] The display panel provided by the embodiment of the present application includes an integrated circuit substrate, a light-emitting device layer, and a second electrode. The integrated circuit substrate includes a first substrate, a plurality of first electrodes arranged at intervals above the first substrate, the light-emitting device layer is arranged above the integrated circuit substrate, the light-emitting device layer includes light-emitting areas and insulating barrier areas arranged at intervals, the light-emitting device layer includes light-emitting devices arranged in the light-emitting areas, the light-emitting devices include a bonding metal layer, a first doped semiconductor layer, a light-emitting layer, and a second doped semiconductor layer sequentially arranged above the integrated circuit substrate, the first electrode is electrically connected to the bonding metal layer, the second electrode is arranged on a side of the light-emitting device layer away from the substrate, the second electrode is made of a transparent material, and the second The electrode is electrically connected to the light-emitting device; wherein, in the insulating barrier area, the light-emitting device layer is provided with an insulating layer, the insulating layer is provided around the light-emitting device, and the two ends of the insulating layer are respectively connected to the second electrode and the integrated circuit substrate to form a closed accommodating cavity, the light-emitting device is arranged in the closed accommodating cavity, and the adjacent light-emitting devices are insulated; an insulating barrier area is provided around the light-emitting area, and an insulating layer for insulating adjacent light-emitting devices is provided in the insulating barrier area, and the two ends of the insulating layer are respectively connected to the second electrode and the integrated circuit substrate to form a closed accommodating cavity, and the position of the light-emitting device is defined by the closed accommodating cavity. The insulating layer can reduce the lateral leakage current between adjacent light-emitting devices, thereby improving the luminous efficiency of the display panel.

[0090] In the above embodiments, the description of each embodiment has its own focus. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0091] The above is a detailed introduction to the display panel, preparation method, and terminal device provided in the embodiments of the present application. Specific examples are used herein to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method of the present application and its core idea. At the same time, for those skilled in the art, based on the ideas of the present application, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims

1. A display panel, comprising: An integrated circuit substrate, the integrated circuit substrate comprising a first substrate, and a plurality of first electrodes disposed above the first substrate and spaced apart from each other; A light-emitting device layer is arranged above the integrated circuit substrate, the light-emitting device layer comprises light-emitting areas arranged in an array, and an insulating barrier area arranged between adjacent light-emitting areas; the light-emitting device layer comprises light-emitting devices arranged in the light-emitting areas, and a first electrode is electrically connected to a light-emitting device; a second electrode, the second electrode being disposed on a side of the light-emitting device layer away from the substrate, and the second electrode being electrically connected to the light-emitting device; Among them, the insulating barrier area of ​​the light-emitting device layer is provided with an insulating layer, and the insulating layer is arranged around the light-emitting device. The two ends of the insulating layer are respectively connected to the second electrode and the integrated circuit substrate to form a closed accommodating cavity. The light-emitting device is arranged in the closed accommodating cavity, and the adjacent light-emitting devices are insulated.

2. The display panel according to claim 1, wherein: The ratio of the width of the insulating barrier region to the width of the light emitting region is in a range of 2:9 to 4:

9.

3. The display panel according to claim 2, wherein: The display panel also includes a filter layer arranged on the side of the second electrode away from the light-emitting device layer, the light-emitting device includes a bonding metal layer, a first doped semiconductor layer, a light-emitting layer, and a second doped semiconductor layer arranged in sequence above the integrated circuit substrate, the filter layer includes a filter pattern and a black matrix arranged at intervals, wherein the light-emitting layer is a blue light-emitting layer, the filter pattern includes red color resistance, green color resistance, and a light-transmitting pattern arranged at intervals, and the light-transmitting pattern is made of a transparent material.

4. The display panel according to claim 2, wherein: The display panel also includes a filter layer arranged on the side of the second electrode away from the light-emitting device layer, the light-emitting device includes a bonding metal layer, a first doped semiconductor layer, a light-emitting layer, and a second doped semiconductor layer arranged in sequence above the integrated circuit substrate, the filter layer includes a filter pattern and a black matrix arranged at intervals, wherein the light-emitting layer is a white light-emitting layer, and the filter pattern includes red color resistance, green color resistance, and blue color resistance arranged at intervals.

5. The display panel according to claim 3 or 4, wherein: The filter pattern is arranged corresponding to the light emitting device, and the black matrix is ​​arranged corresponding to the insulating layer, wherein in the film thickness direction, the black matrix and the insulating layer are arranged to overlap.

6. The display panel according to claim 3 or 4, wherein: Any one of the bonding metal layers of two adjacent light-emitting devices, the first doped semiconductor layers of two adjacent light-emitting devices, the light-emitting layers of two adjacent light-emitting devices, and the second doped semiconductor layers of two adjacent light-emitting devices is insulated.

7. The display panel according to claim 5, wherein: The bonding metal layer includes a first portion abutting against the integrated circuit substrate and a second portion abutting against the light-emitting device layer, wherein the first portion and the second portion are made of the same material.

8. The display panel according to claim 3 or 4, wherein: The insulating layer is formed by implanting ions into the light emitting device layer.

9. The display panel according to claim 8, wherein: The insulating layer includes at least one of helium ions, carbon ions, nitrogen ions, oxygen ions, and fluorine ions.

10. The display panel according to claim 9, wherein: A first periodic stress adjustment layer and a first current diffusion layer are also arranged between the first doped semiconductor layer and the light-emitting layer, and a second periodic stress adjustment layer and a second current diffusion layer are also arranged between the second doped semiconductor layer and the light-emitting layer, wherein the first periodic stress adjustment layer and the second periodic stress adjustment layer are used to reduce the stress inside the light-emitting device layer, the first current diffusion layer is used to reduce the contact resistance between the first doped semiconductor layer and the light-emitting layer, and the second current diffusion layer is used to reduce the contact resistance between the second doped semiconductor layer and the light-emitting layer.

11. A method for preparing a display panel, for preparing the display panel according to any one of claims 1 to 10, comprising: Providing an integrated circuit substrate and a light-emitting device layer, wherein the integrated circuit substrate comprises a first substrate and a plurality of first electrodes disposed above the first substrate and spaced apart from each other; Forming a first bonding layer on one side surface of the integrated circuit substrate, forming a second bonding layer on one side surface of the light-emitting device layer, and bonding the first bonding layer and the second bonding layer relative to each other to prepare a bonding metal layer; Defining a light-emitting area of ​​the light-emitting device layer and an insulating barrier area surrounding the light-emitting area, and performing ion implantation on the insulating barrier area from one side of the light-emitting device layer to at least convert the light-emitting device layer of the insulating barrier area into an insulating layer, wherein the insulating layer insulates adjacent light-emitting devices; A layer of transparent conductive material is formed on the entire surface of the side of the light emitting device layer away from the integrated circuit substrate to prepare a second electrode.

12. A terminal device, comprising a display panel, wherein the display panel comprises: An integrated circuit substrate, the integrated circuit substrate comprising a first substrate, and a plurality of first electrodes disposed above the first substrate and spaced apart from each other; A light-emitting device layer is arranged above the integrated circuit substrate, the light-emitting device layer comprises light-emitting areas arranged in an array, and an insulating barrier area arranged between adjacent light-emitting areas; the light-emitting device layer comprises light-emitting devices arranged in the light-emitting areas, and a first electrode is electrically connected to a light-emitting device; a second electrode, the second electrode being disposed on a side of the light-emitting device layer away from the substrate, and the second electrode being electrically connected to the light-emitting device; Among them, the insulating barrier area of ​​the light-emitting device layer is provided with an insulating layer, and the insulating layer is arranged around the light-emitting device. The two ends of the insulating layer are respectively connected to the second electrode and the integrated circuit substrate to form a closed accommodating cavity. The light-emitting device is arranged in the closed accommodating cavity, and the adjacent light-emitting devices are insulated.

13. The terminal device according to claim 12, wherein: The ratio of the width of the insulating barrier region to the width of the light emitting region is in a range of 2:9 to 4:

9.

14. The terminal device according to claim 13, wherein: The display panel also includes a filter layer arranged on the side of the second electrode away from the light-emitting device layer, the light-emitting device includes a bonding metal layer, a first doped semiconductor layer, a light-emitting layer, and a second doped semiconductor layer arranged in sequence above the integrated circuit substrate, the filter layer includes a filter pattern and a black matrix arranged at intervals, wherein the light-emitting layer is a blue light-emitting layer, the filter pattern includes red color resistance, green color resistance, and a light-transmitting pattern arranged at intervals, and the light-transmitting pattern is made of a transparent material.

15. The terminal device according to claim 13, wherein: The display panel also includes a filter layer arranged on the side of the second electrode away from the light-emitting device layer, the light-emitting device includes a bonding metal layer, a first doped semiconductor layer, a light-emitting layer, and a second doped semiconductor layer arranged in sequence above the integrated circuit substrate, the filter layer includes a filter pattern and a black matrix arranged at intervals, wherein the light-emitting layer is a white light-emitting layer, and the filter pattern includes red color resistance, green color resistance, and blue color resistance arranged at intervals.

16. The terminal device according to claim 14 or 15, wherein: The filter pattern is arranged corresponding to the light emitting device, and the black matrix is ​​arranged corresponding to the insulating layer, wherein in the film thickness direction, the black matrix and the insulating layer are arranged to overlap.

17. The terminal device according to claim 16, wherein: The bonding metal layer includes a first portion abutting against the integrated circuit substrate and a second portion abutting against the light-emitting device layer, wherein the first portion and the second portion are made of the same material.

18. The terminal device according to claim 14 or 15, wherein: The insulating layer is formed by implanting ions into the light emitting device layer.

19. The terminal device according to claim 18, wherein: The insulating layer includes at least one of helium ions, carbon ions, nitrogen ions, oxygen ions, and fluorine ions.

20. The terminal device according to claim 19, wherein: A first periodic stress adjustment layer and a first current diffusion layer are also arranged between the first doped semiconductor layer and the light-emitting layer, and a second periodic stress adjustment layer and a second current diffusion layer are also arranged between the second doped semiconductor layer and the light-emitting layer, wherein the first periodic stress adjustment layer and the second periodic stress adjustment layer are used to reduce the stress inside the light-emitting device layer, the first current diffusion layer is used to reduce the contact resistance between the first doped semiconductor layer and the light-emitting layer, and the second current diffusion layer is used to reduce the contact resistance between the second doped semiconductor layer and the light-emitting layer.

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