Semiconductor package, semiconductor device, and method for manufacturing semiconductor package

Abstract

The purpose of the present invention is to correct warpage in a semiconductor package in which a semiconductor chip is mounted on a substrate.　This semiconductor package comprises a substrate, a semiconductor chip, a member, and an underfill. In the semiconductor package, the semiconductor chip is mounted on the surface of the substrate. The member is formed in a region surrounding the periphery of the semiconductor chip within the surface. The member has a higher thermal expansion coefficient than that of the substrate. The underfill is injected between the substrate and the semiconductor chip, and the side surface thereof comes into contact with the member.

Description

Semiconductor package, semiconductor device, and method for manufacturing semiconductor package

[0001] The present technology relates to a semiconductor package, and more particularly to a semiconductor package provided with a semiconductor chip, a semiconductor device, and a method for manufacturing the semiconductor package.

[0002] In recent years, semiconductor packages incorporating semiconductor chips such as HPC (High-Performance Computing) chips and CIS (CMOS Image Sensors) have been miniaturized. As miniaturization continues, there are increasing demands for finer pads and thinner chips. As a result, the adverse effects of warping in the semiconductor chips become more pronounced. To address this issue, a semiconductor package has been proposed in which a stiffener with a different coefficient of thermal expansion (CTE) from that of the printed wiring board is bonded to the periphery of the semiconductor chip (see, for example, Patent Document 1).

[0003] JP 2010-109318 A

[0004] In the above-mentioned conventional technology, the warpage of the semiconductor chip is corrected by bonding a stiffener. However, the stiffener alone may not provide enough stress in the direction to correct the warpage, and the warpage of the semiconductor chip may not be corrected sufficiently.

[0005] This technology was developed in light of these circumstances, and aims to correct warpage in semiconductor packages in which semiconductor chips are mounted on substrates.

[0006] The present technology has been made to solve the above-mentioned problems, and a first aspect thereof is a semiconductor package including a substrate, a semiconductor chip mounted on a surface of the substrate, a member formed on a region of the surface of the substrate surrounding the periphery of the semiconductor chip and having a thermal expansion coefficient higher than that of the substrate, and an underfill injected between the substrate and the semiconductor chip, the side of which contacts the member, and a manufacturing method thereof, which has the effect of correcting warpage of the semiconductor chip.

[0007] In the first aspect, the member may be frame-shaped when viewed from a direction perpendicular to the substrate, thereby suppressing the underfill from spreading outside the substrate.

[0008] In addition, in this first aspect, the member may include a plurality of elongated plates, thereby providing the effect of correcting warpage of the semiconductor chip.

[0009] In addition, in this first aspect, the member may be bonded to the surface of the substrate by a thermosetting adhesive having a glass transition temperature higher than the melting temperature of the solder, thereby providing the effect of enabling reflow and thermocompression bonding to be performed simultaneously.

[0010] In addition, in the first aspect, an additional chip may be mounted adjacent to the semiconductor chip on the surface of the substrate, thereby improving the performance of the semiconductor package.

[0011] In this first aspect, the surfaces of the additional chip and the member may be colored, thereby suppressing light reflection from the surfaces of the additional chip and the member.

[0012] In addition, in this first aspect, the semiconductor device may further include glass bonded to the surfaces of the additional chip and the semiconductor chip via a resin, thereby suppressing imbalance in stress.

[0013] In addition, in the first aspect, the semiconductor device may further include glass bonded to the surface of the semiconductor chip via a resin, thereby providing the effect of reducing the area of ​​the glass.

[0014] In addition, in this first aspect, the additional chip and the semiconductor chip are arranged in a predetermined direction parallel to the substrate, and the width of the member in the predetermined direction may be wider on the additional chip side than on the semiconductor chip side, thereby providing the effect of suppressing cracking and peeling of the member.

[0015] In addition, in this first aspect, a cavity may be formed on the surface of the substrate, the member may be formed around the cavity, and the semiconductor chip may be mounted in the cavity, thereby increasing the contact area between the underfill and the semiconductor chip.

[0016] In this first aspect, the substrate may include a wiring formed along the outer periphery of the substrate, and the member may be a conductive member, thereby providing an effect that the member and the wiring function as a capacitor.

[0017] In addition, in the first aspect, the device may further include glass, and the semiconductor chip may generate image data by photoelectric conversion of incident light that has passed through the glass, thereby producing an effect of capturing an image.

[0018] A second aspect of the present technology is a semiconductor device including a substrate, a semiconductor chip mounted on a surface of the substrate, a member formed in a region of the surface of the substrate surrounding the periphery of the semiconductor chip and having a higher thermal expansion coefficient than the substrate, an underfill injected between the substrate and the semiconductor chip and having a side surface in contact with the member, glass bonded via a resin to a light-receiving surface of the semiconductor chip, and a processing circuit that processes data from the semiconductor chip, thereby providing the effect of correcting warpage of the semiconductor chip in the semiconductor device.

[0019] 1 is a block diagram showing an example of a configuration of a camera module according to a first embodiment of the present technology; FIG. 2 is an example of a cross-sectional view and a top view of a semiconductor package according to the first embodiment of the present technology; FIG. 3 is an example of a cross-sectional view and a top view of a semiconductor package according to the first embodiment of the present technology; FIG. 4 is an example of a cross-sectional view and a top view of a semiconductor package having different glass sizes according to the first embodiment of the present technology; FIG. 5 is a diagram showing an example of stress generated in a semiconductor package according to the first embodiment of the present technology; FIG. 6 is a diagram for explaining a warpage suppression effect according to the first embodiment of the present technology; FIG. 7 is a diagram for explaining a manufacturing method of a semiconductor package according to the first embodiment of the present technology; FIG. 8 is a flowchart showing an example of a manufacturing method of a semiconductor package according to the first embodiment of the present technology; FIG. 9 is an example of a cross-sectional view and a top view of a semiconductor package according to a second embodiment of the present technology; FIG. 10 is an example of a cross-sectional view and a top view of a semiconductor package according to a modified example of the second embodiment of the present technology; FIG. 11 is a diagram for explaining a manufacturing method up to application of underfill according to a modified example of the second embodiment of the present technology; FIG. 12 is an example of a cross-sectional view and a top view of a semiconductor package according to a third embodiment of the present technology; FIG. 13 is an example of a cross-sectional view and a top view of a semiconductor package according to a fourth embodiment of the present technology; Fig. 10 is an example of a cross-sectional view and a top view of a semiconductor package according to a sixth embodiment of the present technology. Fig. 11 is an example of a cross-sectional view and a top view of a semiconductor package according to a seventh embodiment of the present technology. Fig. 12 is an example of a cross-sectional view when a mounting substrate according to the seventh embodiment of the present technology is cut along a plane parallel to a substrate plane. Fig. 13 is a block diagram showing an example of a configuration of a semiconductor package according to the seventh embodiment of the present technology. Fig. 14 is a block diagram showing an example of a schematic configuration of a vehicle control system. Fig. 15 is an explanatory diagram showing an example of installation positions of an outside-vehicle information detection unit and an imaging unit.

[0020] Hereinafter, modes for carrying out the present technology (hereinafter referred to as embodiments) will be described. The descriptions will be made in the following order: 1. First embodiment (an example of correcting warpage using a member and underfill) 2. Second embodiment (an example of correcting warpage using a member and underfill by adding a chip) 3. Third embodiment (an example of correcting warpage using a member with an adjusted width and underfill by adding a chip) 4. Fourth embodiment (an example of correcting warpage using a member and underfill in a cavity structure) 5. Fifth embodiment (an example of correcting warpage using a member and underfill by adding a chip and widening the glass area) 6. Sixth embodiment (an example of correcting warpage using a discontinuous member and underfill) 7. Seventh embodiment (an example of correcting warpage using a member bonded to wiring and underfill) 8. Application to a moving body

[0021] 1 is a block diagram showing an example of the configuration of a camera module 100 according to a first embodiment of the present technology. The camera module 100 is a module that captures image data, and includes an optical unit 110, a sensor chip 220, an imaging control unit 120, and a DSP (Digital Signal Processing) circuit 130. The camera module 100 is an example of a semiconductor device as defined in the claims.

[0022] The optical unit 110 collects incident light and guides it to the sensor chip 220. The sensor chip 220 has, for example, a CIS function and generates image data by photoelectric conversion. The image data is supplied to the DSP circuit 130 via a signal line 209. The sensor chip 220 is an example of a semiconductor chip as defined in the claims.

[0023] The imaging control unit 120 controls the imaging operation of the sensor chip 220. The imaging control unit 120 supplies various signals such as a vertical synchronization signal to the sensor chip 220 via a signal line 208.

[0024] The DSP circuit 130 performs various processes on the image data from the sensor chip 220. The DSP circuit 130 is an example of a processing circuit as defined in the claims.

[0025] In the camera module 100 illustrated in the figure, the sensor chip 220 is disposed in a semiconductor package, which will be described later.

[0026] 2A and 2B are cross-sectional and top views of a semiconductor package 200 according to a first embodiment of the present technology. A cross-sectional view of the semiconductor package 200 is shown in FIG. 2A, and a top view of the semiconductor package 200 is shown in FIG.

[0027] As shown in FIG. 1A, the semiconductor package 200 includes a glass 210, a sensor chip 220, a mounting substrate 230, and a member 240.

[0028] The mounting substrate 230 is a substrate on which the sensor chip 220 and the like are mounted, and an organic substrate or the like is used as the mounting substrate 230. The area of ​​the mounting substrate 230 is larger than the area of ​​the sensor chip 220. The mounting substrate 230 is an example of a substrate as defined in the claims.

[0029] Hereinafter, the axis perpendicular to the substrate surface of the mounting substrate 230 will be referred to as the "Z axis." Furthermore, a predetermined axis parallel to the substrate surface of the mounting substrate 230 will be referred to as the "X axis." An axis perpendicular to the X axis and Z axis will be referred to as the "Y axis." In the same figure, "a" indicates a cross-sectional view seen from the Y axis direction.

[0030] Both surfaces of the mounting substrate 230 are flat, and the sensor chip 220 is mounted in a predetermined area on one of the surfaces by solder balls 254. The sensor chip 220 generates image data by photoelectric conversion of incident light that has passed through the glass 210.

[0031] Here, the coefficient of thermal expansion (CTE) of the sensor chip 220 is assumed to be lower than that of the mounting substrate 230. The sensor chip 220 may be a chip of a single semiconductor substrate, or may be a chip of a laminated structure in which multiple semiconductor substrates are stacked. In the case of a two-layer laminated structure, for example, a substrate on which pixels are arranged is placed on the upper side, and a substrate on which a logic circuit is placed is placed on the lower side. In the case of a three- or more layer laminated structure, a substrate on which a memory is placed is further inserted.

[0032] Stacking technology can be used for a variety of applications because it can connect upper and lower pads at a narrow pitch. However, as the logic generation advances, variations in transistor characteristics become more pronounced, making it more difficult to implement.

[0033] Hereinafter, the direction from the mounting substrate 230 to the sensor chip 220 in the Z-axis direction will be referred to as the "up" direction. The upper surfaces of the glass 210, the sensor chip 220, and the mounting substrate 230 will be referred to as the "front surface," and the lower surfaces will be referred to as the "rear surface."

[0034] Furthermore, a member 240 is bonded to a region of the surface of the mounting substrate 230 that surrounds the periphery of the sensor chip 220 using a thermosetting adhesive 253. The coefficient of thermal expansion (CTE) of this member 240 is higher than that of the mounting substrate 230, and the modulus of elasticity of the member 240 is also higher than that of the mounting substrate 230. Furthermore, a conductive member can be used as the member 240. Furthermore, the glass transition temperature of the thermosetting adhesive 253 is preferably higher than the melting temperature of solder.

[0035] In addition, an underfill 252 is injected between the sensor chip 220 and the mounting substrate 230. As illustrated in the enlarged view at the top right, the side surface of the underfill 252 comes into contact with the member 240.

[0036] Glass 210 is bonded to the surface (i.e., the light-receiving surface) of the sensor chip 220 via resin 251. The glass 210 is also called a cover glass or a seal glass. The coefficient of thermal expansion (CTE) of the glass 210 is higher than that of the silicon that constitutes the sensor chip 220.

[0037] As illustrated in FIG. 1B, the shape of the member 240 when viewed from above is a frame that surrounds the sensor chip 220. The width W of the member 240 is the same in both the X-axis direction and the Y-axis direction.

[0038] The bold frame in the figure, b, indicates the outer periphery of the glass 210. A pixel array section 221 in which a plurality of pixels are arranged is formed on the surface of the sensor chip 220. Note that the resin 251 is omitted in the figure, b. This also applies to the subsequent top view diagrams.

[0039] Because the thermal expansion coefficient of the sensor chip 220 is lower than that of the mounting substrate 230, this difference in thermal expansion coefficient causes stress in the direction in which the sensor chip 220 warps convexly when it contracts after heating. This convex warping direction is also called the cry direction.

[0040] On the other hand, because the thermal expansion coefficient of the glass 210 is higher than that of the sensor chip 220, this difference in thermal expansion coefficient causes stress in the direction that causes the sensor chip 220 to warp concavely when it contracts after heating. This concave warping direction is also called the smile direction. The glass 210 alone cannot sufficiently correct the warp in the smile direction.

[0041] Because the thermal expansion coefficient of the component 240 is higher than that of the mounting substrate 230, this difference in thermal expansion coefficients causes stress in the smile direction when the component 240 contracts after heating. Furthermore, because the side surface of the underfill 252 is in contact with the component 240, stress in the smile direction occurs due to the hardening and shrinkage of the underfill 252. The stress in the smile direction caused by the component 240 and the underfill 252 can sufficiently correct the warp in the cry direction, which could not be corrected by the glass 210 alone. This correction of the warp can reduce the stress on the solder balls 254.

[0042] Furthermore, since the member 240 is frame-shaped, it also functions as a dam that prevents the underfill 252 from spreading outside the substrate.

[0043] The semiconductor chip to be placed in the semiconductor package 200 is not limited to the sensor chip 220 having the function of a CIS. For example, a logic chip or a memory chip may be placed instead of the sensor chip 220, and its warpage may be corrected by the member 240 or the like. In this case, the glass 210 can be eliminated.

[0044] For example, an HPC chip can be used instead of the sensor chip 220. In HPC systems, pad miniaturization is often promoted, and secondary mounting is considered, so substrate warpage is a focus, but chip warpage is not. Secondary mounting requires larger solder diameters, requiring more precise adjustments. HPC systems use thermal compression bonding (TCB) for mounting, which requires a process that takes into account the difference in thermal expansion coefficients between the semiconductor chip and the substrate. When applying this process technology to CIS, reflow mounting is appropriate due to the presence of on-chip lenses (OCLs). Details of the manufacturing process will be discussed later.

[0045] The structures illustrated in a and b in the figure are suitable for miniaturization because the glass 210 is mounted directly on the light-receiving surface of the sensor chip 220. However, when thinning the sensor chip 220, it is necessary to suppress mechanical damage to the sensor chip 220. For this reason, warping of the sensor chip 220 is corrected by using a member 240 with a high thermal expansion coefficient and an underfill 252 whose side surfaces contact the member 240.

[0046] Although the area of ​​the glass 210 is set to be the same as that of the sensor chip 220, the present invention is not limited to this configuration.

[0047] 3A and 3B, the area of ​​the glass 210 can be made smaller than that of the sensor chip 220. The bold frame in b in the figure indicates the outer periphery of the glass 210. As illustrated in b in the figure, the area of ​​the glass 210 can be made smaller than that of the sensor chip 220 as long as it can cover the pixel array section 221.

[0048] 4 is a diagram illustrating an example of stress occurring in the semiconductor package 200 according to the first embodiment of the present technology. Arrows in the diagram indicate the direction of the stress.

[0049] As illustrated in the figure, the thermal expansion coefficient of the glass 210 is higher than that of the sensor chip 220, so stress occurs in the direction in which the sensor chip 220 warps concavely (i.e., in the smile direction). In addition, the thermal expansion coefficient of the member 240 is higher than that of the mounting substrate 230, so stress occurs in the smile direction.

[0050] 5 is a diagram for explaining the warpage suppression effect in the first embodiment of the present technology. In the figure, "a" indicates the effect of each of samples A, B, and C. In the figure, "b" indicates a cross-sectional view of sample A. In the figure, "c" indicates a cross-sectional view of sample B. In the figure, "d" indicates a cross-sectional view of sample C. The dotted line in the figure, "b," exaggerates the outline of the mounting substrate 230 when warpage occurs.

[0051] As shown in b and c in the figure, samples A and B were prepared by bonding only the member 240 to the mounting substrate 230. The thickness of the member 240 in sample A, which is the size in the Z-axis direction, is 50 micrometers (μm). The thickness of the member 240 in sample B is 100 micrometers (μm).

[0052] As shown in d in the figure, sample C was prepared by adhering a member 240 to a mounting substrate 230 and filling the inside with underfill 252. The thickness of the member 240 of sample C was 50 micrometers (μm).

[0053] As shown in the example of "a" in the figure, the effect of suppressing warpage is greater in sample B than in sample A, and greater in sample C than in sample B. From these results, the thicker the member 240 is, the greater the effect of correcting warpage in the smile direction. Also, by bringing the side surface of the underfill 252 into contact with the member 240, the effect of correcting warpage in the smile direction is greater than when there is no contact.

[0054] 6A and 6B are diagrams for explaining a method for manufacturing a semiconductor package 200 according to the first embodiment of the present technology. As illustrated in FIG. 6A, a sensor chip 220 is mounted on a mounting substrate 230, and a thermosetting adhesive 253 is applied around the sensor chip 220.

[0055] Then, as shown in FIG. 1B, the member 240 is mounted and thermocompression-bonded to the member 240. If the glass transition temperature of the thermosetting adhesive 253 is higher than the melting temperature of the solder, the mounting of the sensor chip 220 by reflow and the thermocompression-bonding of the member 240 can be performed simultaneously.

[0056] When reflow and thermocompression bonding are performed simultaneously, the solder balls 254 at the bottom of the sensor chip 220 are not melted at time a in the figure. Note that when reflow and thermocompression bonding are not performed simultaneously, for example, the solder balls 254 are melted by reflow or the like at time a in the figure, and the sensor chip 220 is mounted.

[0057] Then, as illustrated in FIG. 10C, underfill 252 is injected between the sensor chip 220 and the mounting substrate 230 until the side surface comes into contact with the member 240 .

[0058] Then, as shown in d in the figure, a resin 251 is applied to the surface of the sensor chip 220, and the glass 210 is bonded via the resin 251. Then, various subsequent processes are performed as necessary, and the semiconductor package 200 is completed.

[0059] FIG. 7 is a flowchart showing an example of a method for manufacturing the semiconductor package 200 according to the first embodiment of the present technology.

[0060] First, the sensor chip 220 is mounted on the mounting substrate 230, and the thermosetting adhesive 253 is applied around the sensor chip 220 (step S901). Then, the member 240 is mounted and the member 240 is thermocompression bonded (step S902). This thermocompression bonding can be performed simultaneously with reflow.

[0061] Then, underfill 252 is injected between the sensor chip 220 and the mounting substrate 230 until the side surface comes into contact with the member 240 (step S903). Then, resin 251 is applied to the surface of the sensor chip 220, and the glass 210 is bonded via the resin 251 (step S904). After step S904, various subsequent processes are performed as necessary, and the manufacturing process for the semiconductor package 200 is completed.

[0062] As described above, according to the first embodiment of the present technology, the thermal expansion coefficient of the member 240 is higher than that of the mounting substrate 230, and the side surface of the underfill comes into contact with the member 240, so that stress is generated in the smile direction. This stress can sufficiently correct the warpage of the sensor chip 220.

[0063] 2. Second Embodiment In the first embodiment described above, the sensor chip 220 is disposed within the semiconductor package 200, but a single chip alone may not provide sufficient performance. The semiconductor package 200 in this second embodiment differs from the first embodiment in that an additional chip is provided.

[0064] 8A and 8B are examples of a cross-sectional view and a top view of a semiconductor package 200 according to a second embodiment of the present technology. In the figure, "a" shows a cross-sectional view of the semiconductor package 200, and "b" shows a top view of the semiconductor package 200. The semiconductor package 200 according to the second embodiment differs from the first embodiment in that it further includes an additional chip 225.

[0065] As illustrated in a and b in the figure, the additional chip 225 is mounted adjacent to the sensor chip 220 on the surface of the mounting substrate 230. The type of additional chip 225 is not limited, and it may be a logic chip or a memory chip. The multi-chip configuration illustrated in a and b in the figure can improve the performance of the semiconductor package 200.

[0066] In the second embodiment, the area of ​​the glass 210 is the same as that of the first embodiment, and the width of the member 240 is the same as that of the first embodiment.

[0067] As described above, according to the second embodiment of the present technology, the additional chip 225 is further mounted to form a multi-chip, so that the performance of the semiconductor package 200 can be improved.

[0068] In the second embodiment described above, additional chip 225 is further disposed, but incident light may be reflected on the surface of additional chip 225 or the surface of member 240, and this reflected light may cause flare. Semiconductor package 200 in this modification of the second embodiment differs from the second embodiment in that the surfaces of additional chip 225 and member 240 are colored.

[0069] 9A and 9B are an example of a cross-sectional view and a top view of a semiconductor package 200 according to a modification of the second embodiment of the present technology. In the drawing, "a" indicates a cross-sectional view of the semiconductor package 200, and "b" indicates a top view of the semiconductor package 200.

[0070] As illustrated in Fig. 10A and 10B, the semiconductor package 200 according to the modified example of the second embodiment differs from the second embodiment in that a colored resin 255, such as black, is applied to the surfaces of the additional chip 225 and the member 240. Coloring the surfaces of the additional chip 225 and the member 240 can suppress light reflection from those surfaces.

[0071] 10 is a diagram for explaining a manufacturing method according to a modified example of the second embodiment of the present technology up to the application of the underfill 252. As illustrated in FIG. 10A, the sensor chip 220 and the additional chip 225 are mounted on the mounting substrate 230, and a thermosetting adhesive 253 is applied around them.

[0072] Then, as illustrated in b in the figure, the member 240 is mounted and thermocompression-bonded to the member 240. If the glass transition temperature of the thermosetting adhesive 253 is higher than the melting temperature of the solder, the mounting of the sensor chip 220 and the additional chip 225 by reflow and the thermocompression-bonding of the member 240 can be performed simultaneously.

[0073] Then, as illustrated in FIG. 10C, underfill 252 is injected between the sensor chip 220 and the additional chip 225 and the mounting substrate 230 until the side surfaces thereof come into contact with the member 240 .

[0074] 11 is a diagram for explaining a manufacturing method up to coloring in a modified example of the second embodiment of the present technology. As illustrated in FIG. 11 a, a resin 251 is applied to the surface of a sensor chip 220, and a glass 210 is bonded via the resin 251.

[0075] Then, as illustrated in FIG. 1B, the surfaces of the additional chip 225 and the member 240 are colored black or the like by applying a colored resin 255 thereto.

[0076] It should be noted that the modified example of the second embodiment can be applied to the first embodiment. In the first embodiment, since there is no additional chip 225, only the member 240 is colored.

[0077] Thus, according to the modified example of the second embodiment of the present technology, the surfaces of the additional chip 225 and the member 240 are colored by applying the colored resin 255, so that reflected light on those surfaces can be suppressed.

[0078] 3. Third Embodiment In the second embodiment described above, glass 210 is bonded to the surface of sensor chip 220, but in this configuration, an imbalance occurs in the stress applied to member 240 between the additional chip 225 side, which does not have glass 210, and the sensor chip 220 side. Semiconductor package 200 in this third embodiment differs from the second embodiment in that the width of member 240 on the additional chip 225 side is wider than that on the sensor chip 220 side.

[0079] 12A and 12B are an example of a cross-sectional view and a top view of a semiconductor package 200 according to the third embodiment of the present technology. In the drawing, "a" indicates a cross-sectional view of the semiconductor package 200, and "b" indicates a top view of the semiconductor package 200.

[0080] As shown in Fig. 1B, the additional chip 225 and the sensor chip 220 are arranged in the X-axis direction. In this X-axis direction, the width W1 of the member 240 on the additional chip 225 side is set to a value wider than the width W2 on the sensor chip 220 side. The width of the member 240 in the Y-axis direction is arbitrary, but is set to W2, for example.

[0081] By making W1 wider than W2, it is possible to suppress imbalance in stress and prevent peeling or cracking of the member 240 due to the imbalance.

[0082] The third embodiment can be applied to the modified example of the second embodiment.

[0083] As described above, according to the third embodiment of the present technology, the width of the member 240 on the additional chip 225 side is made wider than that on the sensor chip 220 side, so that it is possible to suppress imbalance in stress.

[0084] 4. Fourth Embodiment In the above-described first embodiment, the sensor chip 220 is mounted on a flat surface of the mounting substrate 230, but this configuration may result in an insufficient contact area between the underfill 252 and the sensor chip 220. The semiconductor package 200 in this fourth embodiment differs from the first embodiment in that the mounting substrate 230 has a cavity structure.

[0085] 13A and 13B are examples of a cross-sectional view and a top view of a semiconductor package according to the fourth embodiment of the present technology, in which a indicates a cross-sectional view of the semiconductor package 200, and b indicates a top view of the semiconductor package 200.

[0086] The mounting substrate 230 of the fourth embodiment differs from the first embodiment in that a portion of its surface is countersunk. For example, the area from coordinate X1 to coordinate X2 in the X-axis direction is countersunk by one step, and the space formed by this processing is called a "cavity." The sensor chip 220 is mounted in the cavity, and a component 240 is formed around the cavity. The underfill 252 is injected into the cavity until its side surface contacts the component 240.

[0087] By providing a cavity in the mounting substrate 230 and mounting the sensor chip 220 in that cavity, the contact area between the underfill 252 and the sensor chip 220 can be made larger than in the first embodiment. This increases the effect of the underfill 252 in correcting the warpage of the sensor chip 220. In addition, the injection of the underfill 252 becomes easier.

[0088] The fourth embodiment can be applied to each of the second and third embodiments and the modified example of the second embodiment, in which case an additional chip 225 is further disposed in the cavity.

[0089] As described above, according to the fourth embodiment of the present technology, the sensor chip 220 is mounted in the cavity of the mounting substrate 230, so that the contact area between the underfill 252 and the sensor chip 220 can be increased, thereby increasing the effect of correcting the warpage.

[0090] 5. Fifth Embodiment In the second embodiment described above, the additional chip 225 is further disposed, and the glass 210 is bonded to the surface of the sensor chip 220. However, with this configuration, an imbalance occurs in the stress applied to the member 240 between the additional chip 225 side, which does not have the glass 210, and the sensor chip 220 side. The semiconductor package 200 in this fifth embodiment differs from the second embodiment in that the glass 210 is bonded to the surface of each of the sensor chip 220 and the additional chip 225.

[0091] 14A and 14B are examples of a cross-sectional view and a top view of a semiconductor package according to the fifth embodiment of the present technology, in which a indicates a cross-sectional view of the semiconductor package 200, and b indicates a top view of the semiconductor package 200.

[0092] The area of ​​the glass 210 in the fifth embodiment is larger than that in the second embodiment, and the glass 210 is bonded to the surfaces of the sensor chip 220 and the additional chip 225 via resin 251. By bonding the glass 210 to the surface of the additional chip 225 as well, the stress on the additional chip 225 side can be increased and stress imbalance can be suppressed.

[0093] The fifth embodiment can be applied to both the modified example of the second embodiment and the fourth embodiment.

[0094] As described above, according to the fifth embodiment of the present technology, the glass 210 is bonded to the surface of each of the sensor chip 220 and the additional chip 225, so that imbalance in stress can be suppressed.

[0095] 6. Sixth Embodiment In the second embodiment described above, the member 240 has a frame shape, but is not limited to this shape. The semiconductor package 200 in this sixth embodiment differs from the second embodiment in that a discontinuous member 240 is used.

[0096] 15A and 15B are examples of a cross-sectional view and a top view of a semiconductor package according to a sixth embodiment of the present technology, in which a portion a in the drawing shows a cross-sectional view of the semiconductor package 200, and a portion b in the drawing shows a top view of the semiconductor package 200.

[0097] The semiconductor package 200 of the sixth embodiment differs from the first embodiment in that the member 240 is discontinuous and includes a plurality of elongated plates such as plates 241 to 244. By forming these plates in an area surrounding the periphery of the sensor chip 220, warpage of the sensor chip 220 can be corrected.

[0098] The sixth embodiment can be applied to each of the second, third, fourth and fifth embodiments and the modified example of the second embodiment.

[0099] As described above, according to the sixth embodiment of the present technology, since a plurality of plates are formed in the region surrounding the periphery of the sensor chip 220, warpage of the sensor chip 220 can be corrected.

[0100] 7. Seventh Embodiment In the first embodiment described above, the member 240 is adhered to the surface of the mounting substrate 230. However, if the member 240 is conductive, wiring can be provided underneath the member 240 to allow the member 240 to function as a capacitor. The semiconductor package 200 in this seventh embodiment differs from the first embodiment in that the member 240 is adhered to wiring.

[0101] 16A and 16B are examples of a cross-sectional view and a top view of a semiconductor package according to a seventh embodiment of the present technology, in which a portion a in the drawing shows a cross-sectional view of the semiconductor package 200, and a portion b in the drawing shows a top view of the semiconductor package 200.

[0102] As illustrated in FIG. 11A, the mounting board 230 of the seventh embodiment differs from that of the first embodiment in that wiring 231 is formed below a member 240, and a ground plane 234 is formed below the wiring 231. The member 240 of the seventh embodiment is a conductive member, and is bonded to the wiring 231 with a thermosetting adhesive 253.

[0103] As illustrated in FIG. 1B, one end of a via 245 that penetrates the thermosetting adhesive 253 and reaches the mounting substrate 230 is connected to the member 240. Note that in FIG. 1B, the resin 251 and the underfill 252 are omitted.

[0104] 17 is an example of a cross-sectional view of the mounting substrate 230 according to the seventh embodiment of the present technology, cut along a plane parallel to the substrate plane. The arrow a in the figure shows a cross-sectional view cut along the XY plane passing through the wiring 231, as indicated by the arrow a in Fig. 16, and viewed from the Z-axis direction. The arrow b in the figure shows a cross-sectional view cut along the ground plane 234 and viewed from the Z-axis direction.

[0105] As shown in FIG. 1A, the wiring 231 is formed along the outer periphery of the mounting substrate 230 below the member 240. However, the wiring 231 is formed so as to avoid the area below the via 245. A resistive component 232 is embedded in the mounting substrate 230. One end of the resistive component 232 is connected to the wiring 231, and the other end is connected to a via 233 that reaches the ground plane 234. The wiring 231 is connected to a ground terminal 222 of the sensor chip 220. The via 245 is connected to a power supply terminal 223 of the sensor chip 220. The dotted line in FIG. 1A indicates the outer periphery of the sensor chip 220.

[0106] As illustrated in b in the figure, the ground plane 234 is connected to the via 233. The upper member 240 is connected to the ground plane 234 through the via 233. However, the ground plane 234 is not formed below the via 245.

[0107] With the configurations illustrated in FIGS. 16 and 17, the member 240 and the wiring 231 function as a capacitor.

[0108] 18 is a block diagram showing an example configuration of a semiconductor package 200 according to the seventh embodiment of the present technology. In the semiconductor package 200, a power supply terminal and a ground terminal of the sensor chip 220 are connected to a power supply circuit 260. The power supply circuit 260 is provided in a mounting substrate 230.

[0109] The power supply circuit 260 supplies a power supply voltage VDD. A ground plane 234 is disposed within the power supply circuit 260. A capacitor 261 is inserted between the power supply voltage VDD and the ground plane 234. The capacitor 261 is formed by a member 240 and a wiring 231. A resistive component 232 is inserted between the connection node of the power supply voltage VDD and the capacitor 261 and the ground plane 234.

[0110] The RC filter including the capacitor 261 and the resistor component 232 can reduce noise from the power supply transmitted to the sensor chip 220. This can improve the quality of signals such as image signals in the sensor chip 200.

[0111] The seventh embodiment can be applied to each of the first, second, third, fourth, fifth, and sixth embodiments and the modified example of the second embodiment.

[0112] As described above, according to the seventh embodiment of the present technology, the wiring 231 is formed and the member 240 is bonded to the wiring 231, so that they can function as a capacitor.

[0113] 8. Application Examples to Mobile Bodies The technology according to the present disclosure (the present technology) can be applied to various products. For example, the technology according to the present disclosure may be realized as a device mounted on any type of mobile body, such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, personal mobility, an airplane, a drone, a ship, or a robot.

[0114] FIG. 19 is a block diagram showing a schematic configuration example of a vehicle control system, which is an example of a mobile object control system to which the technology according to the present disclosure can be applied.

[0115] The vehicle control system 12000 includes a plurality of electronic control units connected via a communication network 12001. In the example shown in Fig. 19, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an outside-vehicle information detection unit 12030, an inside-vehicle information detection unit 12040, and an integrated control unit 12050. Also shown as functional components of the integrated control unit 12050 are a microcomputer 12051, an audio / video output unit 12052, and an in-vehicle network I / F (Interface) 12053.

[0116] The drivetrain control unit 12010 controls the operation of devices related to the drivetrain of the vehicle in accordance with various programs. For example, the drivetrain control unit 12010 functions as a control device for a drive force generating device for generating a drive force of the vehicle, such as an internal combustion engine or a drive motor, a drive force transmission mechanism for transmitting the drive force to the wheels, a steering mechanism for adjusting the steering angle of the vehicle, and a braking device for generating a braking force of the vehicle.

[0117] The body system control unit 12020 controls the operation of various devices equipped in the vehicle body according to various programs. For example, the body system control unit 12020 functions as a control device for a keyless entry system, a smart key system, a power window device, or various lamps such as headlamps, backup lamps, brake lamps, turn signals, and fog lamps. In this case, radio waves transmitted from a portable device that serves as a key or signals from various switches can be input to the body system control unit 12020. The body system control unit 12020 receives these radio waves or signals and controls the vehicle's door lock device, power window device, lamps, etc.

[0118] The outside-vehicle information detection unit 12030 detects information outside the vehicle equipped with the vehicle control system 12000. For example, an imaging unit 12031 is connected to the outside-vehicle information detection unit 12030. The outside-vehicle information detection unit 12030 causes the imaging unit 12031 to capture images outside the vehicle and receives the captured images. The outside-vehicle information detection unit 12030 may perform object detection processing or distance detection processing for people, cars, obstacles, signs, characters on the road surface, etc. based on the received images.

[0119] The imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal corresponding to the amount of light received. The imaging unit 12031 can output the electrical signal as an image or as distance measurement information. The light received by the imaging unit 12031 may be visible light or invisible light such as infrared light.

[0120] The in-vehicle information detection unit 12040 detects information inside the vehicle. For example, a driver state detection unit 12041 that detects the state of the driver is connected to the in-vehicle information detection unit 12040. The driver state detection unit 12041 includes, for example, a camera that captures an image of the driver, and the in-vehicle information detection unit 12040 may calculate the degree of fatigue or concentration of the driver based on the detection information input from the driver state detection unit 12041, or may determine whether the driver is dozing off.

[0121] The microcomputer 12051 can calculate control target values ​​for the driving force generating device, steering mechanism, or braking device based on the information inside and outside the vehicle acquired by the outside-vehicle information detection unit 12030 or the inside-vehicle information detection unit 12040, and output control commands to the drive system control unit 12010. For example, the microcomputer 12051 can perform cooperative control aimed at realizing the functions of an ADAS (Advanced Driver Assistance System), including vehicle collision avoidance or impact mitigation, following driving based on the distance between vehicles, maintaining vehicle speed, vehicle collision warning, vehicle lane departure warning, etc.

[0122] In addition, the microcomputer 12051 can perform cooperative control for the purpose of autonomous driving, which allows the vehicle to travel autonomously without relying on driver operation, by controlling the driving force generating device, steering mechanism, braking device, etc. based on information about the surroundings of the vehicle obtained by the outside vehicle information detection unit 12030 or the inside vehicle information detection unit 12040.

[0123] Furthermore, the microcomputer 12051 can output a control command to the body system control unit 12020 based on the information outside the vehicle acquired by the outside information detection unit 12030. For example, the microcomputer 12051 can control the headlamps according to the position of a preceding vehicle or an oncoming vehicle detected by the outside information detection unit 12030, and perform cooperative control aimed at preventing glare, such as switching from high beams to low beams.

[0124] The audio / video output unit 12052 transmits at least one of audio and video output signals to an output device capable of visually or audibly notifying the passengers of the vehicle or the outside of the vehicle of information. In the example of Fig. 19, the output devices are exemplified by an audio speaker 12061, a display unit 12062, and an instrument panel 12063. The display unit 12062 may include, for example, at least one of an on-board display and a head-up display.

[0125] FIG. 20 is a diagram showing an example of the installation position of the imaging unit 12031.

[0126] In FIG. 20, the imaging unit 12031 includes imaging units 12101, 12102, 12103, 12104, and 12105.

[0127] The imaging units 12101, 12102, 12103, 12104, and 12105 are provided, for example, at positions such as the front nose, side mirrors, rear bumper, back door, and the top of the windshield inside the vehicle cabin of the vehicle 12100. The imaging unit 12101 provided on the front nose and the imaging unit 12105 provided on the top of the windshield inside the vehicle cabin mainly acquire images of the front of the vehicle 12100. The imaging units 12102 and 12103 provided on the side mirrors mainly acquire images of the sides of the vehicle 12100. The imaging unit 12104 provided on the rear bumper or back door mainly acquires images of the rear of the vehicle 12100. The imaging unit 12105 provided on the top of the windshield inside the vehicle cabin is mainly used to detect preceding vehicles, pedestrians, obstacles, traffic lights, traffic signs, lanes, etc.

[0128] 20 shows an example of the imaging ranges of the imaging units 12101 to 12104. Imaging range 12111 indicates the imaging range of the imaging unit 12101 provided on the front nose, imaging ranges 12112 and 12113 indicate the imaging ranges of the imaging units 12102 and 12103 provided on the side mirrors, respectively, and imaging range 12114 indicates the imaging range of the imaging unit 12104 provided on the rear bumper or back door. For example, by overlaying the image data captured by the imaging units 12101 to 12104, an overhead image of the vehicle 12100 viewed from above can be obtained.

[0129] At least one of the image capturing units 12101 to 12104 may have a function of acquiring distance information. For example, at least one of the image capturing units 12101 to 12104 may be a stereo camera made up of multiple image capturing elements, or may be an image capturing element having pixels for phase difference detection.

[0130] For example, based on the distance information obtained from the imaging units 12101 to 12104, the microcomputer 12051 can calculate the distance to each three-dimensional object within the imaging ranges 12111 to 12114 and the change in this distance over time (relative speed with respect to the vehicle 12100), thereby extracting as a preceding vehicle, in particular, the three-dimensional object that is the closest three-dimensional object on the path of the vehicle 12100 and traveling in approximately the same direction as the vehicle 12100 at a predetermined speed (e.g., 0 km / h or higher). Furthermore, the microcomputer 12051 can set a vehicle-to-vehicle distance to be maintained in advance in front of the preceding vehicle, and perform automatic braking control (including follow-up stop control), automatic acceleration control (including follow-up start control), etc. In this way, cooperative control can be performed for the purpose of autonomous driving, which runs autonomously without relying on driver operation.

[0131] For example, the microcomputer 12051 classifies and extracts three-dimensional object data regarding three-dimensional objects into two-wheeled vehicles, ordinary vehicles, large vehicles, pedestrians, utility poles, and other three-dimensional objects based on distance information obtained from the imaging units 12101 to 12104, and can use the data for automatic obstacle avoidance. For example, the microcomputer 12051 distinguishes obstacles around the vehicle 12100 into obstacles that are visible to the driver of the vehicle 12100 and obstacles that are difficult to see. The microcomputer 12051 then determines a collision risk that indicates the risk of collision with each obstacle, and when the collision risk is equal to or greater than a set value and a collision is possible, the microcomputer 12051 can provide driving assistance for collision avoidance by outputting an alarm to the driver via the audio speaker 12061 or the display unit 12062, or by performing forced deceleration or avoidance steering via the drive system control unit 12010.

[0132] At least one of the image capturing units 12101 to 12104 may be an infrared camera that detects infrared rays. For example, the microcomputer 12051 can recognize a pedestrian by determining whether a pedestrian is present in the images captured by the image capturing units 12101 to 12104. Such pedestrian recognition is performed, for example, by extracting feature points from the images captured by the image capturing units 12101 to 12104 as infrared cameras and performing pattern matching on a series of feature points that indicate the outline of an object to determine whether the object is a pedestrian. When the microcomputer 12051 determines that a pedestrian is present in the images captured by the image capturing units 12101 to 12104 and recognizes the pedestrian, the audio / image output unit 12052 controls the display unit 12062 to superimpose a rectangular outline on the recognized pedestrian for emphasis. The audio / image output unit 12052 may also control the display unit 12062 to display an icon or the like indicating the pedestrian at a desired position.

[0133] An example of a vehicle control system to which the technology according to the present disclosure can be applied has been described above. The technology according to the present disclosure can be applied to the imaging unit 12031 of the above-described configuration. Specifically, the camera module 100 in FIG. 1 can be applied to the imaging unit 12031. By applying the technology according to the present disclosure to the imaging unit 12031, warping can be corrected and the reliability of the system can be improved.

[0134] Note that the above-described embodiment shows an example for realizing the present technology, and the matters in the embodiment and the matters specifying the invention in the claims correspond to each other. Similarly, the matters specifying the invention in the claims and the matters in the embodiment of the present technology having the same name correspond to each other. However, the present technology is not limited to the embodiment, and can be realized by applying various modifications to the embodiment within the scope of the gist thereof.

[0135] The processing procedures described in the above embodiments may be considered as a method having a series of these procedures, or as a program for causing a computer to execute the series of procedures, or as a recording medium for storing the program. Examples of such a recording medium include a CD (Compact Disc), an MD (MiniDisc), a DVD (Digital Versatile Disc), a memory card, and a Blu-ray (registered trademark) Disc.

[0136] The effects described in this specification are merely examples and are not limiting, and other effects may also be present.

[0137] The present technology may also be configured as follows: (1) A semiconductor package comprising: a substrate; a semiconductor chip mounted on a surface of the substrate; a member formed in a region of the surface of the substrate surrounding the periphery of the semiconductor chip and having a higher thermal expansion coefficient than the substrate; and an underfill injected between the substrate and the semiconductor chip, the underfill having a side surface in contact with the member. (2) The semiconductor package according to (1), wherein the member is frame-shaped when viewed perpendicularly to the substrate. (3) The semiconductor package according to (1), wherein the member includes a plurality of elongated plates. (4) The semiconductor package according to any of (1) to (3), wherein the member is bonded to the surface of the substrate with a thermosetting adhesive having a glass transition temperature higher than the melting temperature of solder. (5) The semiconductor package according to any of (1) to (4), further comprising an additional chip mounted adjacent to the semiconductor chip on the surface of the substrate. (6) The semiconductor package according to (5), wherein the surfaces of the additional chip and the member are colored. (7) The semiconductor package according to (5) or (6), further comprising glass bonded to the surface of each of the additional chip and the semiconductor chip via a resin. (8) The semiconductor package according to (5) or (6), further comprising glass bonded to the surface of the semiconductor chip via a resin. (9) The semiconductor package according to (8), wherein the additional chip and the semiconductor chip are arranged in a predetermined direction parallel to the substrate, and the width of the member in the predetermined direction is wider on the additional chip side than on the semiconductor chip side. (10) The semiconductor package according to any of (1) to (9), wherein a cavity is formed in the surface of the substrate, the member is formed around the cavity, and the semiconductor chip is mounted in the cavity. (11) The semiconductor package according to any of (1) to (10), wherein the substrate includes wiring formed along the periphery of the substrate, and the member is a conductive member. (12) The semiconductor package according to any one of (1) to (11), further comprising glass, wherein the semiconductor chip generates image data by photoelectric conversion of incident light that has passed through the glass.(13) A semiconductor device comprising: a substrate; a semiconductor chip mounted on a surface of the substrate; a member having a higher thermal expansion coefficient than the substrate, formed in a region of the surface of the substrate surrounding the periphery of the semiconductor chip, and having a higher thermal expansion coefficient than the substrate; an underfill injected between the substrate and the semiconductor chip, and having its side surface in contact with the member; glass bonded to a light-receiving surface of the semiconductor chip via a resin; and a processing circuit that processes data from the semiconductor chip. (14) A method for manufacturing a semiconductor package, comprising: a step of forming a member having a higher thermal expansion coefficient than the substrate on which the semiconductor chip is mounted, in a region of the surface surrounding the periphery of the semiconductor chip, and a step of injecting underfill between the substrate and the semiconductor chip until its side surface contacts the member.

[0138] 100 camera module 110 optical section 120 imaging control section 130 DSP circuit 200 semiconductor package 210 glass 220 sensor chip 221 pixel array section 222 ground terminal 223 power supply terminal 225 additional chip 230 mounting substrate 231 wiring 232 resistance component 233, 245 via 234 ground plane 240 member 241 to 244 plate 251 resin 252 underfill 253 thermosetting adhesive 254 solder ball 255 colored resin 260 power supply circuit 261 capacitor 12031 imaging section

Claims

1. A semiconductor package comprising: a substrate; a semiconductor chip mounted on a surface of the substrate; a member having a higher thermal expansion coefficient than the substrate, the member being formed in an area of ​​the surface of the substrate surrounding the semiconductor chip; and an underfill injected between the substrate and the semiconductor chip, the side of which contacts the member.

2. The semiconductor package according to claim 1, wherein the member is frame-shaped when viewed in a direction perpendicular to the substrate.

3. The semiconductor package according to claim 1, wherein said member includes a plurality of elongated plates.

4. The semiconductor package according to claim 1, wherein the member is bonded to the surface of the substrate by a thermosetting adhesive having a glass transition temperature higher than the melting temperature of solder.

5. The semiconductor package according to claim 1, further comprising an additional chip mounted adjacent to said semiconductor chip on the surface of said substrate.

6. The semiconductor package according to claim 5, wherein the surfaces of said additional chip and said member are colored.

7. The semiconductor package according to claim 5, further comprising glass bonded to the respective surfaces of said additional chip and said semiconductor chip via a resin.

8. The semiconductor package according to claim 5, further comprising glass bonded to the surface of the semiconductor chip via a resin.

9. The semiconductor package according to claim 8, wherein the additional chip and the semiconductor chip are arranged in a predetermined direction parallel to the substrate, and the width of the member in the predetermined direction is wider on the additional chip side than on the semiconductor chip side.

10. The semiconductor package according to claim 1, wherein a cavity is formed in the surface of the substrate, the member is formed around the cavity, and the semiconductor chip is mounted in the cavity.

11. The semiconductor package according to claim 1, wherein the substrate includes wiring formed along an outer periphery of the substrate, and the member is a conductive member.

12. The semiconductor package according to claim 1, further comprising glass, wherein the semiconductor chip generates image data by photoelectric conversion of incident light transmitted through the glass.

13. A semiconductor device comprising: a substrate; a semiconductor chip mounted on a surface of the substrate; a member having a higher thermal expansion coefficient than the substrate, the member being formed in a region of the surface of the substrate surrounding the semiconductor chip; underfill injected between the substrate and the semiconductor chip, the side of the underfill being in contact with the member; glass bonded via resin to the light-receiving surface of the semiconductor chip; and a processing circuit for processing data from the semiconductor chip.

14. A method for manufacturing a semiconductor package comprising the steps of: forming a member having a higher thermal expansion coefficient than a substrate on which a semiconductor chip is mounted, in an area of ​​the substrate surrounding the semiconductor chip; and injecting underfill between the substrate and the semiconductor chip until the side surfaces come into contact with the member.

Images