Radio frequency front-end module having adjustable power supply and bias, and radio frequency chip

Abstract

The present invention relates to the technical field of radio frequency, and disclosed are a radio frequency front-end module having an adjustable power supply and bias, and a radio frequency chip. The radio frequency front-end module comprises a signal input end, an input matching circuit, a final amplifier circuit, and a signal output end which are electrically connected in sequence. The radio frequency front-end module further comprises a power supply voltage conversion circuit and a bias current control circuit. An input end of the bias current control circuit is connected to a power supply, and an output end of the bias current control circuit is connected to a first input end of the final amplifier circuit. An input end of the power supply voltage conversion circuit is used for being connected to a power supply voltage, and an output end of the power supply voltage conversion circuit is connected to a second input end of the final amplifier circuit. A power supply switch and a power supply conversion circuit separately implement operation state switching by means of an external first control signal, and a first MOS transistor implements operation state switching by means of an external second control signal. The radio frequency front-end module of the present invention can adjust the power supply voltage and a bias current, thereby achieving optimization of power consumption and performance.

Description

RF front-end modules and RF chips with adjustable power and bias Technical Field

[0001] The present invention relates to the field of radio frequency technology, and in particular to a radio frequency front-end module and a radio frequency chip with adjustable power supply and bias. Background Art

[0002] At present, among RF transceiver chips, the RF front-end of mobile phone terminals is the key component for realizing signal transmission and reception. With the multi-mode and multi-standard communication, the RF front-end is responsible for the transmission and reception of multi-standard and multi-mode signals.

[0003] A typical TDD system RF front-end module, such as a Wi-Fi RF front-end module, consists of the following components: a power amplifier, which amplifies the RF signal output by the RF chip; a receiver circuit, which receives the signal and typically includes a low-noise amplifier (LNA); an RF switch, which switches between transmit and receive paths; and a logic control module, which controls the operating status of other components. These components are assembled on a substrate, connected together by bonding or other means, and packaged into a complete module.

[0004] However, in traditional Wi-Fi RF front-end module designs, the operating voltage and bias current are fixed; thus, when the RF front-end input power changes, it is impossible to balance maximum output capacity and power consumption.

[0005] Summary of the Invention

[0006] The purpose of an embodiment of the present invention is to provide an RF front-end module with adjustable power supply and bias, combining a power supply voltage conversion circuit and a bias current control circuit so that the module can adjust the power supply voltage and bias current at different output powers to solve the problems of high power consumption and poor performance optimization effect of existing RF front-end modules.

[0007] In order to solve the above technical problems, an embodiment of the present invention provides a radio frequency front-end module with adjustable power supply and bias, wherein the radio frequency front-end module with adjustable power supply and bias includes a signal input terminal, an input matching circuit, a final-stage amplifier circuit, and a signal output terminal electrically connected in sequence; the radio frequency front-end module with adjustable power supply and bias also includes a power supply voltage conversion circuit and a bias current control circuit; the input terminal of the bias current control circuit is connected to a power supply, the output terminal of the bias current control circuit is connected to a first input terminal of the final-stage amplifier circuit, the input terminal of the power supply voltage conversion circuit is used to connect to a power supply voltage, and the output terminal of the power supply voltage conversion circuit is connected to a second input terminal of the final-stage amplifier circuit;

[0008] The power supply voltage conversion circuit includes a power switch, a power conversion circuit, a first resistor, a second resistor, a third resistor, and a first MOS transistor; the power switch and the power conversion circuit respectively realize working state switching by an external first control signal, and the first MOS transistor realizes working state switching by an external second control signal;

[0009] The input end of the power switch serves as the input end of the power voltage conversion circuit, the first output end of the power switch is connected to the first end of the first resistor, the second output end of the power switch is connected to the input end of the power conversion circuit, and the logic control end of the power switch is used to connect to the external first control signal;

[0010] The output end of the power conversion circuit is connected to the first end of the first resistor and serves as the output end of the power voltage conversion circuit. The logic control end of the power conversion circuit is used to connect to the external first control signal.

[0011] The second end of the first resistor is respectively connected to the first end of the second resistor, the source of the first MOS transistor and the logic control end of the power conversion circuit, and the second end of the second resistor is grounded;

[0012] The drain of the first MOS transistor is connected in series with the third resistor and then grounded, and the gate of the first MOS transistor is used to connect to an external second control signal.

[0013] Preferably, the bias current control circuit includes a bias circuit and a current mirror circuit; the input end of the bias circuit serves as the input end of the bias current control circuit, and the output end of the bias circuit is connected to the first input end of the current mirror circuit, for providing a bias current for the current mirror circuit; the second input end of the current mirror circuit is used to connect to the power supply, and the output end of the current mirror circuit serves as the output end of the bias current control circuit, for outputting the adjusted bias current to the input end of the final-stage amplifier circuit.

[0014] Preferably, the bias circuit includes a fourth resistor, a fifth resistor, a sixth resistor, a second MOS transistor, a seventh resistor, an eighth resistor, a ninth resistor and a third MOS transistor;

[0015] The first end of the fourth resistor is used to connect to the external first control signal, the second end of the fourth resistor is respectively connected to the first end of the fifth resistor and the gate of the second MOS transistor, the second end of the fifth resistor is grounded, the source of the second MOS transistor is connected to the first end of the sixth resistor, the second end of the sixth resistor serves as the input end of the bias circuit, and the drain of the second MOS transistor serves as the output end of the bias circuit;

[0016] The first end of the seventh resistor is used to connect the external second control signal, the second end of the seventh resistor is respectively connected to the first end of the eighth resistor and the gate of the third MOS transistor, the second end of the eighth resistor is grounded, the source of the third MOS transistor is connected to the first end of the ninth resistor, the second end of the ninth resistor is connected to the power supply, and the drain of the third MOS transistor is connected to the drain of the second MOS transistor.

[0017] Preferably, the current mirror circuit includes a first transistor, a second transistor, a tenth resistor and a third transistor;

[0018] The first end of the tenth resistor serves as the second input end of the current mirror circuit, the second end of the tenth resistor is respectively connected to the collector of the first transistor and the drain of the second MOS transistor, the base of the first transistor is connected to the collector of the first transistor, the collector of the first transistor also serves as the first input end of the current mirror circuit, the base of the first transistor is connected to the base of the third transistor; the emitter of the first transistor is connected to the collector of the second transistor, the collector of the second transistor is connected to the base of the second transistor, and the emitter of the second transistor is grounded; the collector of the third transistor is connected to the first end of the tenth resistor, and the emitter of the third transistor serves as the output end of the current mirror circuit.

[0019] Preferably, the input matching circuit is a first capacitor, and two ends of the first capacitor are respectively connected to the signal input end and the input end of the final-stage amplifier circuit.

[0020] Preferably, the final-stage amplifier circuit includes a fourth transistor, a first inductor and a second capacitor; the base of the fourth transistor serves as the input end of the final-stage amplifier circuit, the emitter of the fourth transistor is grounded, the collector of the fourth transistor is respectively connected to the first end of the first inductor and the first end of the second capacitor, the second end of the first inductor is connected to the output end of the power supply voltage conversion circuit, and the second end of the second capacitor serves as the output end of the final-stage amplifier circuit.

[0021] In a second aspect, an embodiment of the present invention provides a radio frequency chip, which includes the above-mentioned power supply and bias-adjustable radio frequency front-end module.

[0022] Compared to the prior art, the RF front-end module with adjustable power supply and bias in the present invention is configured such that a signal input terminal, an input matching circuit, a final-stage amplifier circuit, and a signal output terminal are electrically connected in sequence; the input terminal of the bias current control circuit is connected to a power supply, the output terminal of the bias current control circuit is connected between the input matching circuit and the first input terminal of the final-stage amplifier circuit, the input terminal of the power supply voltage conversion circuit is connected to the power supply voltage, and the output terminal of the power supply voltage conversion circuit is connected to the second input terminal of the final-stage amplifier circuit; the power switch and the power conversion circuit respectively switch their operating states in response to an external first control signal, and the first MOS transistor switches its operating state in response to an external second control signal; the logic control terminal of the power switch is connected to the external first control signal; the output terminal of the power conversion circuit is connected to the first terminal of the first resistor and serves as the output terminal of the power supply voltage conversion circuit, and the logic control terminal of the power conversion circuit is connected to the external first control signal; the second terminal of the first resistor is respectively connected to the first terminal of the second resistor, the source of the first MOS transistor, and the logic control terminal of the power conversion circuit, and the second terminal of the second resistor is grounded; the drain of the first MOS transistor is connected in series with a third resistor and then to ground, and the gate of the first MOS transistor is connected to the external second control signal. By adding a power supply voltage conversion circuit and a bias current control circuit, the RF front-end module can optimize power consumption and performance by adjusting the power supply voltage and bias current at different output powers. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for describing the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. Those skilled in the art can also derive other drawings based on these drawings without inventive work, among which:

[0024] FIG1 is a circuit diagram of a radio frequency front-end module with adjustable power supply and bias according to an embodiment of the present invention.

[0025] In the figure, 100, a radio frequency front-end module with adjustable power supply and bias, 1, a signal input terminal, 2, an input matching circuit, 3, a final amplifier circuit, 4, a signal output terminal, 5, a bias current control circuit, 51, a bias circuit, 52, a current mirror circuit, and 6, a power supply voltage conversion circuit. DETAILED DESCRIPTION

[0026] The following is a clear and complete description of the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0027] Referring to FIG1 , an embodiment of the present invention provides an RF front-end module 100 with adjustable power and bias. The RF front-end module 100 includes a signal input terminal 1, an input matching circuit 2, a final-stage amplifier circuit 3, and a signal output terminal 4, which are electrically connected in sequence. The RF front-end module 100 also includes a power supply voltage conversion circuit 6 and a bias current control circuit 5. The bias current control circuit 5 has an input connected to a power supply VDD_BIAS, and an output connected between the input matching circuit 2 and a first input of the final-stage amplifier circuit 3. The power supply voltage conversion circuit 6 has an input connected to a power supply voltage VCC, and its output connected to a second input of the final-stage amplifier circuit 3. The RF signal is output through the signal input terminal 1 to the input matching circuit 2 for matching. The RF signal is then output through the input matching circuit 2 to the final-stage amplifier circuit 3 for amplification. The amplified signal is then output through the signal output terminal 4. The bias current control circuit 5 is used to output a bias current for the final amplifier circuit 3, and the power supply voltage conversion circuit 6 is used to convert the power supply VDD_BIAS into an appropriate operating voltage and output the operating voltage to the final amplifier circuit 3, thereby improving the output capacity of the final amplifier circuit 3.

[0028] The power supply voltage conversion circuit 6 includes a power switch S1, a power conversion circuit DCDC1, a first resistor R1, a second resistor R2, a third resistor R3, and a first MOS transistor M1. The power switch S1 and the power conversion circuit DCDC1 are respectively switched in working state by an external first control signal P1, and the gate of the first MOS transistor M1 is switched in working state by an external second control signal P2.

[0029] The power switch S1 is a single-pole double-throw switch, which switches its working state upon receiving a first external control signal.

[0030] The input end of the power switch S1 serves as the input end of the power voltage conversion circuit 6, the first output end of the power switch S1 is connected to the first end of the first resistor R1, the second output end of the power switch S1 is connected to the input end of the power conversion circuit DCDC1, and the logic control end of the power switch is used to connect to the external first control signal P1;

[0031] The output end of the power conversion circuit DCDC1 is connected to the first end of the first resistor R1 and serves as the output end of the power voltage conversion circuit 6. The logic control end VC of the power conversion circuit DCDC1 is used to connect to the external first control signal P1;

[0032] The second end of the first resistor R1 is respectively connected to the first end of the second resistor R2, the source of the first MOS transistor M1 and the logic control end of the power conversion circuit DCDC1, and the second end of the second resistor R2 is grounded;

[0033] The drain of the first MOS transistor M1 is connected in series with the third resistor R3 and then grounded. The gate of the first MOS transistor M1 is used to connect to an external second control signal P2.

[0034] When the logic control terminal VC of the power switch S1 receives a low level signal from the external first control signal P1, the input terminal of the power switch S1 and the first output terminal of the power switch S1 are connected, and the input terminal of the power switch S1 and the second output terminal of the power switch S1 are disconnected. Conversely, the input terminal of the power switch S1 and the second output terminal of the power switch S1 are connected.

[0035] A control signal is output to the power conversion circuit DCDC1 via an external first control signal P1. When the P1 port is at a high level, the power conversion circuit DCDC1 operates, and its output terminal outputs a power signal. Otherwise, the output terminal does not output any power. Simultaneously, the output voltage of the power conversion circuit DCDC1 is controlled by feedback from the first resistor R1, the second resistor R2, the third resistor R3, and the first MOS transistor M1. These resistors form a voltage divider circuit that provides feedback voltage to the BY pin of the power conversion circuit DCDC1.

[0036] The first MOS transistor M1 is a PMOS transistor, and the gate of the first MOS transistor M1 is controlled by an external second control signal. When the external second control signal P2 port is at a low level, the source of the first MOS transistor M1 and the drain of the first MOS transistor M1 are connected; otherwise, they are cut off.

[0037] When the external second control signal P2 port is at a low level, the voltage VBY1 of the power conversion circuit DCDC1-BY is equal to VCC_OUT*(R2 / / R3) / (R1+(R2 / / R3)).

[0038] Where R2 / / R3 is the parallel resistance value of R2 and R3.

[0039] When the external second control signal P2 is at a high level, the voltage VBY2 at the pin of the power conversion circuit DCDC1 -BY = VCC_OUT* R2 / ( R1 + R2 ).

[0040] Comparing VBY1 and VBY2, it is obvious that VBY1 <VBY2。

[0041] When the external first control signal P1 is at a high level and the external second control signal P2 is at a low level, the output voltage of the power conversion circuit DCDC1 is VCC_OUT1; when the external first control signal P1 is at a high level and the external second control signal P2 is at a high level, the output voltage of the power conversion circuit DCDC1 is VCC_OUT2. Obviously, VCC_OUT1>VCC_OUT2.

[0042] Therefore, the output voltage VCC_OUT of DCDC1 when the external second control signal P2 is at a low level is higher than VCC_OUT when the external second control signal P2 is at a high level;

[0043] Combining S1 and DCDC1, when the external first control signal P1 and the external second control signal P2 are both low, VCC_OUT = VCC; when the external first control signal P1 is high and the external second control signal P2 is low, VCC_OUT = VCC_OUT1; when the external first control signal P1 and the external second control signal P2 are both high, VCC_OUT = VCC_OUT2; and VCC_OUT1>VCC_OUT2.

[0044] In this way, the purpose of controlling the VCC_OUT voltage is achieved by controlling the logic state of the external second control signal P2.

[0045] In this embodiment, the bias current control circuit 5 includes a bias circuit 51 and a current mirror circuit 52; the input end of the bias circuit 51 serves as the input end of the bias current control circuit 5, the output end of the bias circuit 51 is connected to the first input end of the current mirror circuit 52, the second input end of the current mirror circuit 52 is connected to the power supply voltage VCC, and the output end of the current mirror circuit 52 serves as the output end of the bias current control circuit 5.

[0046] In this embodiment, the bias circuit 51 includes a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a second MOS transistor M2, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9 and a third MOS transistor M3.

[0047] The first end of the fourth resistor R4 is used to connect to the external first control signal P1, the second end of the fourth resistor R4 is respectively connected to the first end of the fifth resistor R5 and the gate of the second MOS transistor M2, the second end of the fifth resistor R5 is grounded, the source of the second MOS transistor M2 is connected to the first end of the sixth resistor R6, the second end of the sixth resistor R6 serves as the input end of the bias circuit 51, and the drain of the second MOS transistor M2 serves as the output end of the bias circuit 51.

[0048] A first end of the seventh resistor R7 is used to connect to the external second control signal P2, a second end of the seventh resistor R7 is respectively connected to the first end of the eighth resistor R8 and the gate of the third MOS transistor M3, a second end of the eighth resistor R8 is grounded, a source of the third MOS transistor M3 is connected to the first end of the ninth resistor R9, a second end of the ninth resistor R9 is connected to the power supply VDD_BIAS, and a drain of the third MOS transistor M3 is connected to the drain of the second MOS transistor M2.

[0049] In this embodiment, the current mirror circuit 52 includes a first transistor Q1, a second transistor Q2, a tenth resistor R10, and a third transistor Q3. The first end of the tenth resistor R10 serves as the second input end of the current mirror circuit 52. The second end of the tenth resistor R10 is respectively connected to the collector of the first transistor Q1 and the drain of the second MOS transistor M2. The base of the first transistor Q1 is connected to the collector of the first transistor Q1. The collector of the first transistor Q1 also serves as the first input end of the current mirror circuit 52. The base of the first transistor Q1 is connected to the base of the third transistor Q3. The emitter of the first transistor Q1 is connected to the collector of the second transistor Q2. The collector of the second transistor Q2 is connected to the base of the second transistor Q2. The emitter of the second transistor Q2 is grounded. The collector of the third transistor Q3 is connected to the first end of the tenth resistor R10. The emitter of the third transistor Q3 serves as the output end of the current mirror circuit 52.

[0050] Specifically, the gate of the second MOS transistor M2 is controlled by an external first control signal P1 from an external input / output port. When the external first control signal P1 is at a low level, the second MOS transistor M2 is turned on; otherwise, the second MOS transistor M2 is turned off. The gate of the third MOS transistor M3 is controlled by an external second control signal P2 from an external input / output port. When the external second control signal P2 is at a low level, the third MOS transistor M3 is turned on; otherwise, the third MOS transistor M3 is turned off.

[0051] Therefore, when the external first control signal P1 and the external second control signal P2 are both low, the resistance value RAB between points A and B = R6 / / R9 / / R10; when the external first control signal P1 is high and the external second control signal P2 is low, the resistance value RAB between points A and B = R6 / / R10; when the external first control signal P1 and the external second control signal P2 are both high, the resistance value RAB between points A and B = R10; obviously, R10>R9 / / R10>R6 / / R9 / / R10; and the larger RAB is, the smaller the bias current IBIAS is.

[0052] Therefore, the bias current IBIAS is adjusted by controlling the logic states of the external first control signal P1 and the external second control signal P2.

[0053] In this way, by adding the power supply voltage conversion circuit 6 and the bias current control circuit 5, the RF front-end module 100 with adjustable power supply and bias can optimize power consumption and performance by adjusting the power supply voltage and bias current at different output powers.

[0054] In this embodiment, the input matching circuit 2 is a first capacitor C1 , and two ends of the first capacitor C1 are connected to the signal input terminal 1 and the input terminal of the final-stage amplifier circuit 3 , respectively.

[0055] In this embodiment, the final-stage amplifier circuit 3 includes a fourth transistor Q4, a first inductor L1, and a second capacitor C2; the base of the fourth transistor Q4 serves as the input end of the final-stage amplifier circuit 3, the emitter of the fourth transistor Q4 is grounded, the collector of the fourth transistor Q4 is connected to the first end of the first inductor L1 and the first end of the second capacitor C2, respectively, the second end of the first inductor L1 is connected to the output end of the power supply voltage conversion circuit 6, and the second end of the second capacitor C2 serves as the output end of the final-stage amplifier circuit 3.

[0056] Example 2

[0057] An embodiment of the present invention provides a radio frequency chip, which includes the above-mentioned power supply and bias-adjustable radio frequency front-end module 100.

[0058] It should be noted that, in this document, the terms "comprises," "includes," or any other variations thereof are intended to encompass non-exclusive inclusion, such that a process, method, article, or apparatus comprising a series of elements includes not only those elements but also other elements not explicitly listed, or elements inherent to such process, method, article, or apparatus. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of other identical elements in the process, method, article, or apparatus comprising the element.

[0059] The above descriptions are merely embodiments of the present invention and are not intended to limit the patent scope of the present invention. Any equivalent structure or equivalent process transformation made using the contents of the present invention description and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present invention.

Claims

1. A radio frequency front-end module with adjustable power supply and bias, the radio frequency front-end module with adjustable power supply and bias comprises a signal input terminal, an input matching circuit, a final stage amplifier circuit and a signal output terminal which are electrically connected in sequence; characterized in that: The RF front-end module with adjustable power supply and bias further comprises a power supply voltage conversion circuit and a bias current control circuit; the input end of the bias current control circuit is connected to the power supply, the output end of the bias current control circuit is connected to the first input end of the final-stage amplifier circuit, the input end of the power supply voltage conversion circuit is used to connect the power supply voltage, and the output end of the power supply voltage conversion circuit is connected to the second input end of the final-stage amplifier circuit; The power supply voltage conversion circuit includes a power switch, a power conversion circuit, a first resistor, a second resistor, a third resistor and a first MOS transistor; the power switch and the power conversion circuit respectively realize working state switching through an external first control signal, and the first MOS transistor realizes working state switching through an external second control signal; The input end of the power switch serves as the input end of the power voltage conversion circuit, the first output end of the power switch is connected to the first end of the first resistor, the second output end of the power switch is connected to the input end of the power conversion circuit, and the logic control end of the power switch is used to connect the external first control signal; The output end of the power conversion circuit is connected to the first end of the first resistor and serves as the output end of the power voltage conversion circuit, and the logic control end of the power conversion circuit is used to connect the external first control signal; The second end of the first resistor is respectively connected to the first end of the second resistor, the source of the first MOS tube and the logic control end of the power conversion circuit, and the second end of the second resistor is grounded; The drain of the first MOS tube is connected in series with the third resistor and then grounded, and the gate of the first MOS tube is used to connect an external second control signal.

2. The RF front-end module with adjustable power supply and bias as claimed in claim 1, characterized in that: The bias current control circuit includes a bias circuit and a current mirror circuit; the input end of the bias circuit serves as the input end of the bias current control circuit, and the output end of the bias circuit is connected to the first input end of the current mirror circuit, for providing a bias current for the current mirror circuit; the second input end of the current mirror circuit is used to connect to the power supply, and the output end of the current mirror circuit serves as the output end of the bias current control circuit, for outputting the adjusted bias current to the input end of the final amplifier circuit.

3. The RF front-end module with adjustable power supply and bias as claimed in claim 2, characterized in that: The bias circuit includes a fourth resistor, a fifth resistor, a sixth resistor, a second MOS transistor, a seventh resistor, an eighth resistor, a ninth resistor and a third MOS transistor; The first end of the fourth resistor is used to connect the external first control signal, the second end of the fourth resistor is respectively connected to the first end of the fifth resistor and the gate of the second MOS transistor, the second end of the fifth resistor is grounded, the source of the second MOS transistor is connected to the first end of the sixth resistor, the second end of the sixth resistor serves as the input end of the bias circuit, and the drain of the second MOS transistor serves as the output end of the bias circuit; The first end of the seventh resistor is used to connect the external second control signal, the second end of the seventh resistor is respectively connected to the first end of the eighth resistor and the gate of the third MOS tube, the second end of the eighth resistor is grounded, the source of the third MOS tube is connected to the first end of the ninth resistor, the second end of the ninth resistor is connected to the power supply, and the drain of the third MOS tube is connected to the drain of the second MOS tube.

4. The RF front-end module with adjustable power supply and bias as claimed in claim 3, characterized in that: The current mirror circuit comprises a first triode, a second triode, a tenth resistor and a third triode; The first end of the tenth resistor serves as the second input end of the current mirror circuit, the second end of the tenth resistor is respectively connected to the collector of the first transistor and the drain of the second MOS transistor, the base of the first transistor is connected to the collector of the first transistor, the collector of the first transistor also serves as the first input end of the current mirror circuit, the base of the first transistor is connected to the base of the third transistor; the emitter of the first transistor is connected to the collector of the second transistor, the collector of the second transistor is connected to the base of the second transistor, and the emitter of the second transistor is grounded; the collector of the third transistor is connected to the first end of the tenth resistor, and the emitter of the third transistor serves as the output end of the current mirror circuit.

5. The RF front-end module with adjustable power supply and bias as claimed in claim 1, characterized in that: The input matching circuit is a first capacitor, and two ends of the first capacitor are respectively connected to the signal input end and the input end of the final-stage amplifier circuit.

6. The RF front-end module with adjustable power supply and bias as claimed in claim 1, characterized in that: The final stage amplifier circuit includes a fourth transistor, a first inductor and a second capacitor; the base of the fourth transistor serves as the input end of the final stage amplifier circuit, the emitter of the fourth transistor is grounded, the collector of the fourth transistor is respectively connected to the first end of the first inductor and the first end of the second capacitor, the second end of the first inductor is connected to the output end of the power supply voltage conversion circuit, and the second end of the second capacitor serves as the output end of the final stage amplifier circuit.

7. A radio frequency chip, characterized in that: The RF chip comprises a RF front-end module with adjustable power supply and bias as described in any one of claims 1 to 6.

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