Multilayer substrate
Patent Information
- Application Number
- PCT/JP2024/042098
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-12-11
- Filing Date
- 2024-11-28
- Publication Date
- 2025-06-19
AI Technical Summary
Existing multilayer substrates face high alternating current resistance, which hinders efficient signal transmission.
A multilayer substrate design featuring a laminated substrate with alternating current signal lines, where signal lines are spaced apart in the thickness direction and connected by conductors penetrating through insulating layers, with varying thicknesses to optimize signal transmission.
The design effectively reduces alternating current resistance while maintaining a compact thickness, enhancing signal transmission efficiency.
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Figure JP2024042098_19062025_PF_FP_ABST
Abstract
Description
multilayer board
[0001] The present invention relates generally to multilayer substrates, and more particularly to multilayer substrates having AC signal lines.
[0002] Patent Document 1 discloses a multilayer board including a laminate (laminated board) and three signal conductors (signal lines).
[0003] The laminate has a structure in which multiple resin layers (insulating layers) are stacked in the stacking direction. Three signal conductors (signal lines) are positioned at different positions in the stacking direction. The three signal conductors are electrically connected. In the multilayer board disclosed in Patent Document 1, high-frequency signals are transmitted to the three signal conductors.
[0004] International Publication No. 2023 / 037852
[0005] The multilayer substrate disclosed in Patent Document 1 may have high AC resistance.
[0006] An object of the present invention is to provide a multilayer substrate capable of reducing AC resistance.
[0007] A multilayer substrate according to one aspect of the present invention includes a laminate substrate and an AC signal line. The laminate substrate includes a plurality of insulating layers stacked one on top of the other. The laminate substrate has a first main surface and a second main surface. The AC signal line is formed on the laminate substrate. The AC signal line includes a plurality of signal lines spaced apart in a thickness direction of the laminate substrate. In the AC signal line, the signal lines are electrically connected by a plurality of connecting conductors that penetrate one of the insulating layers in the thickness direction of the laminate substrate. The signal lines include a first signal line closest to the first main surface of the laminate substrate in the thickness direction of the laminate substrate, a second signal line closest to the second main surface of the laminate substrate in the thickness direction of the laminate substrate, and a third signal line located between the first signal line and the second signal line in the thickness direction of the laminate substrate. In the thickness direction of the laminate substrate, at least one of the thickness of the first signal line and the thickness of the second signal line is greater than the thickness of the third signal line.
[0008] The multilayer substrate according to the above aspect of the present invention can reduce AC resistance.
[0009] FIG. 1 is a plan view of a portion of a multilayer substrate according to a first embodiment. FIG. 2 is a cross-sectional view of the multilayer substrate taken along line II-II in FIG. 1 . FIG. 3 is a cross-sectional view of the multilayer substrate taken along line III-III in FIG. 1 . FIG. 4 is a cross-sectional view of a multilayer substrate according to a second embodiment. FIG. 5 is a cross-sectional view of a multilayer substrate according to a third embodiment. FIG. 6 is a cross-sectional view of a multilayer substrate according to a fourth embodiment. FIG. 7 is a plan view of a portion of a multilayer substrate according to a fifth embodiment. FIG. 8 is a see-through plan view of a portion of the multilayer substrate taken along line IX-IX in FIG. 7 , showing a second signal line, a second ground electrode, and an RF signal line. FIG. 9 is a cross-sectional view of the multilayer substrate taken along line IX-IX in FIG. 7 . FIG. 10 is a cross-sectional view of a multilayer substrate according to a sixth embodiment. FIG. 11 is a cross-sectional view of a multilayer substrate according to a seventh embodiment. FIG. 12 is a cross-sectional view of a multilayer substrate according to an eighth embodiment. FIG. 13 is a cross-sectional view of a multilayer substrate according to a ninth embodiment. FIG. 14 is a cross-sectional view of a multilayer substrate according to a tenth embodiment. FIG. 15 is a cross-sectional view of a multilayer substrate according to an eleventh embodiment. FIG. 16 is a cross-sectional view of a portion of a multilayer substrate according to a twelfth embodiment.
[0010] Hereinafter, embodiments 1 to 12 will be described with reference to the drawings. The drawings referred to in the following embodiments 1 to 12 are schematic diagrams, and the sizes and thicknesses of the components in the drawings do not necessarily reflect the actual dimensions, and the size ratios and thickness ratios between the components do not necessarily reflect the actual dimensional ratios.
[0011] First Embodiment A multilayer substrate 100 according to a first embodiment will be described with reference to FIGS.
[0012] (1) Configuration of Multilayer Substrate As shown in FIGS. 1 to 3, the multilayer substrate 100 according to the first embodiment includes a laminated substrate 1 and an AC signal line 2.
[0013] 1 to 3, a Cartesian coordinate system is defined having three mutually orthogonal axes, the X-axis, the Y-axis, and the Z-axis, which is the axis along the thickness direction D1 of the multilayer substrate 1 (see FIG. 2), is indicated as the Z-axis. The X-axis, the Y-axis, and the Z-axis are all imaginary axes, and the arrows indicating "X," "Y," and "Z" in the drawings are merely indicated for the purpose of explanation and do not have any physical substance. The multilayer substrate 100 is, for example, a flexible substrate. In the example of FIG. 1, the thickness direction D1 of the multilayer substrate 100 is the direction along the Z-axis, but if the multilayer substrate 100 is bent, this direction may differ depending on the position on the multilayer substrate 100.
[0014] The multilayer substrate 100 is housed in, for example, the housing of an electronic device. The electronic device is, for example, a communication device. The communication device is, for example, a mobile phone (e.g., a smartphone), but is not limited to a mobile phone and may be, for example, a notebook personal computer, a wearable device (e.g., a smart watch), etc.
[0015] (1.1) Laminated Substrate As shown in Figures 2 and 3, the laminated substrate 1 has a first main surface 101 and a second main surface 102. The second main surface 102 of the laminated substrate 1 is the main surface opposite to the first main surface 101. The laminated substrate 1 has multiple (three in the example of Figures 2 and 3) insulating layers 11, 12, and 13, and the multiple insulating layers 11, 12, and 13 are stacked. The thickness direction D1 of the laminated substrate 1 is the stacking direction of the multiple insulating layers 11, 12, and 13. Hereinafter, for convenience of explanation, the insulating layer 11, the insulating layer 12, and the insulating layer 13 may also be referred to as the first insulating layer 11, the second insulating layer 12, and the third insulating layer 13, respectively.
[0016] In the laminated substrate 1, a first insulating layer 11, a second insulating layer 12, and a third insulating layer 13 are laminated in this order.
[0017] The material of each of the multiple insulating layers 11, 12, and 13 includes, for example, a thermoplastic resin. The thermoplastic resin is, for example, a liquid crystal polymer. The thermoplastic resin is not limited to a liquid crystal polymer, and may be, for example, PTFE (polytetrafluoroethylene). In this embodiment, the first insulating layer 11 and the second insulating layer 12 are self-adhered, and no adhesive layer is interposed between the first insulating layer 11 and the second insulating layer 12. Also, in this embodiment, the second insulating layer 12 and the third insulating layer 13 are self-adhered, and no adhesive layer is interposed between the second insulating layer 12 and the third insulating layer 13.
[0018] The thickness of each of the insulating layers 11, 12, and 13 is, for example, not less than 10 μm and not more than 120 μm.
[0019] In this embodiment, the laminated substrate 1 has an elongated shape in which the length along the Y axis is longer than the length along the X axis when viewed from above in the thickness direction D1 of the laminated substrate 1. When viewed from above in the thickness direction D1 of the laminated substrate 1, the laminated substrate 1 may have a shape other than an elongated shape.
[0020] (1.2) AC Signal Line As shown in FIG. 1 , the AC signal line 2 is formed on the laminate substrate 1. The AC signal line 2 is a line through which a signal is transmitted. In the present disclosure, the AC signal line 2 is a line through which a signal whose magnitude changes over time is transmitted. The AC signal line 2 is, for example, an NFC (near field communication) signal line. In this embodiment, the signal transmitted through the AC signal line 2 is, for example, an AC signal having a frequency of 13.56 MHz.
[0021] 2 and 3 , the AC signal line 2 has a plurality of signal lines (signal electrodes) 21, 22, and 23 that are spaced apart from one another in the thickness direction D1 of the laminated substrate 1. In a plan view of the laminated substrate 1 in the thickness direction D1, the signal lines 21, 22, and 23 overlap one another.
[0022] Each of the signal lines 21 to 23 is electrically conductive and may be made of, for example, copper.
[0023] The signal line 21 is laminated on the first insulating layer 11. The signal line 22 is laminated on the second insulating layer 12. The signal line 23 is laminated on the third insulating layer 13. In the multilayer substrate 100, the signal line 21, the first insulating layer 11, the signal line 22, the second insulating layer 12, the signal line 23, and the third insulating layer 13 are laminated in this order: signal line 21, first insulating layer 11, signal line 22, second insulating layer 12, signal line 23, and third insulating layer 13. Hereinafter, for convenience of explanation, the signal line 21, the signal line 23, and the signal line 22 may also be referred to as the first signal line 21, the second signal line 23, and the third signal line 22, respectively. The multiple signal lines 21 to 23 include a first signal line 21 that is closest to the first main surface 101 of the laminated substrate 1 in the thickness direction D1 of the laminated substrate 1, a second signal line 23 that is closest to the second main surface 102 of the laminated substrate 1 in the thickness direction D1 of the laminated substrate 1, and a third signal line 22 that is located between the first signal line 21 and the second signal line 23 in the thickness direction D1 of the laminated substrate 1.
[0024] Each of the multiple signal lines 21 to 23 is formed in a predetermined pattern. In this embodiment, each of the multiple signal lines 21 to 23 is linear when viewed in a plan view from the thickness direction D1 of the laminated substrate 1. Each of the multiple signal lines 21 to 23 may have a shape other than linear when viewed in a plan view from the thickness direction D1 of the laminated substrate 1. The first signal line 21 is formed, for example, by patterning a copper foil (hereinafter also referred to as a first copper foil) attached to the first insulating layer 11. The third signal line 22 is formed, for example, by patterning a copper foil (hereinafter also referred to as a second copper foil) attached to the second insulating layer 12. The second signal line 23 is formed, for example, by patterning a copper foil (hereinafter also referred to as a third copper foil) attached to the third insulating layer 13.
[0025] Each of the signal lines 21, 22, and 23 has a line width. In this embodiment, the line width of each of the signal lines 21 to 23 is the width in the X-axis direction. In this embodiment, the line width of the first signal line 21 is the same as the line width of the second signal line 23. In the multilayer substrate 100, from the viewpoint of increasing the cross-sectional area of the AC signal line 2, the line widths of the signal lines 21 to 23 are preferably the same, and wider, but the line widths of the signal lines 21 to 23 may be different from each other. The "cross-sectional area of the AC signal line 2" refers to the total cross-sectional area of the multiple signal lines 21 to 23 in any cross section perpendicular to the longitudinal direction of the AC signal line 2.
[0026] The thickness of each of the plurality of signal lines 21 to 23 is thinner than the thickness of each of the plurality of insulating layers 11 to 13. The thicknesses T21, T22, and T23 of the plurality of signal lines 21, 22, and 23 will be described in the section "(2) Thickness of each of the plurality of signal lines."
[0027] The AC signal line 2 also has a plurality of connecting conductors that electrically connect the plurality of signal lines 21 to 23. Each of the plurality of connecting conductors is an interlayer connecting conductor that connects signal lines formed in two different insulating layers among the plurality of insulating layers 11 to 13. Each of the plurality of connecting conductors is conductive. In the AC signal line 2, the plurality of signal lines 21 to 23 are electrically connected by a plurality of connecting conductors that penetrate one of the plurality of insulating layers 11 to 13 in the thickness direction D1 of the laminated substrate 1. The plurality of connecting conductors include a plurality of first connecting conductors 31 that penetrate the first insulating layer 11 and a plurality of second connecting conductors 32 that penetrate the second insulating layer 12.
[0028] In this embodiment, the multiple first connecting conductors 31 and the multiple second connecting conductors 32 correspond one-to-one to each other, and corresponding first connecting conductors 31 and second connecting conductors 32 overlap in the thickness direction D1 of the laminated substrate 1. In the AC signal line 2, the first connecting conductors 31 and the second connecting conductors 32 may be arranged with a shift in the signal transmission direction (the Y-axis direction in the examples of FIGS. 2 and 3 ).
[0029] In this embodiment, the multiple first connecting conductors 31 are interposed between the first signal line 21 and the third signal line 22 in the thickness direction D1 of the laminated substrate 1. The multiple first connecting conductors 31 are arranged in two rows, and the first connecting conductors 31 in each row are arranged at a distance in the longitudinal direction of the first signal line 21. The longitudinal direction of the first signal line 21 is a direction along the first signal line 21, a direction perpendicular to the width direction (line width direction) of the first signal line 21, and is the direction in which a signal is transmitted in the first signal line 21.
[0030] Furthermore, the plurality of second connecting conductors 32 are interposed between the third signal line 22 and the second signal line 23 in the thickness direction D1 of the laminated substrate 1. The plurality of second connecting conductors 32 are arranged in two rows, and the second connecting conductors 32 in each row are arranged at a distance in the longitudinal direction of the second signal line 23. The longitudinal direction of the second signal line 23 is a direction along the second signal line 23, a direction perpendicular to the width direction (line width direction) of the second signal line 23, and is the direction in which a signal is transmitted in the second signal line 23. In this embodiment, the first signal line 21 and the third signal line 22 are electrically connected by the plurality of first connecting conductors 31, and the third signal line 22 and the second signal line 23 are electrically connected by the plurality of second connecting conductors 32.
[0031] Each of the plurality of first connecting conductors 31 and the plurality of second connecting conductors 32 is electrically conductive. Each of the plurality of first connecting conductors 31 and the plurality of second connecting conductors 32 contains, for example, copper, a copper-tin alloy, and a resin. The plurality of first connecting conductors 31 are formed, for example, by filling a plurality of via holes formed in the first insulating layer 11 with a conductive paste containing copper, a low-melting-point metal (for example, tin), and a resin, and heating the via holes, with each via hole being blocked by a portion of the first copper foil. The plurality of second connecting conductors 32 are formed, for example, by filling a plurality of via holes formed in the second insulating layer 12 with a conductive paste containing copper, a low-melting-point metal (for example, tin), and a resin, and heating the via holes, with each via hole being blocked by a portion of the second copper foil.
[0032] (2) Thickness of Each of the Multiple Signal Wires The thickness of each of the multiple signal wires 21 to 23 is, for example, 3 μm or more and 40 μm or less. In this embodiment, from the viewpoint of reducing the AC resistance of the AC signal line 2, the thickness T21 of the first signal wire 21 is preferably more than 1 time and not more than 5 times the thickness T22 of the third signal wire 22. More preferably, the thickness T21 of the first signal wire 21 is more than 1 time and not more than 2 times the thickness T22 of the third signal wire 22.
[0033] In this embodiment, as an example, the thickness T21 of the first signal line 21, the thickness T22 of the third signal line 22, and the thickness T23 of the second signal line 23 are 18 μm, 12 μm, and 18 μm, respectively.
[0034] (3) Characteristics of the Multilayer Substrate The multilayer substrate 100 of the present embodiment can reduce the AC resistance of the AC signal line 2 while suppressing an increase in the overall thickness of the multilayer substrate 100, compared to a multilayer substrate including an AC signal line having multiple signal lines with the same thickness.
[0035] In the multilayer substrate 100 of this embodiment, for example, when the thickness T21 of the first signal line 21, the thickness T22 of the third signal line 22, and the thickness T23 of the second signal line 23 are 18 μm, 12 μm, and 18 μm, respectively, the AC resistance can be reduced compared to a multilayer substrate having an AC signal line including three signal lines each having a thickness of 16 μm.
[0036] (4) Manufacturing Method of Multilayer Substrate In the manufacturing method of the multilayer substrate 100 of this embodiment, for example, the first insulating layer 11 having the first signal line 21 formed thereon, the second insulating layer 12 having the third signal line 22 formed thereon, and the third insulating layer 13 having the second signal line 23 formed thereon are stacked on top of each other and placed on a metal plate (not shown), and pressed from above while being heated, thereby forming the multilayer substrate 100.
[0037] (5) Effects The multilayer substrate 100 according to the first embodiment includes a laminated substrate 1 and an AC signal line 2. The laminated substrate 1 is formed by stacking a plurality of insulating layers 11 to 13. The laminated substrate 1 has a first main surface 101 and a second main surface 102. The AC signal line 2 is formed on the laminated substrate 1. The AC signal line 2 has a plurality of signal lines 21 to 23 that are spaced apart from each other in a thickness direction D1 of the laminated substrate 1. In the AC signal line 2, the plurality of signal lines 21 to 23 are electrically connected by a plurality of connecting conductors that penetrate one of the plurality of insulating layers 11 to 13 in the thickness direction D1 of the laminated substrate 1. The multiple signal lines 21 to 23 include a first signal line 21 that is closest to the first main surface 101 of the laminated substrate 1 in the thickness direction D1 of the laminated substrate 1, a second signal line 23 that is closest to the second main surface 102 of the laminated substrate 1 in the thickness direction D1 of the laminated substrate 1, and a third signal line 22 that is located between the first signal line 21 and the second signal line 23 in the thickness direction D1 of the laminated substrate 1. In the thickness direction D1 of the laminated substrate 1, both the thickness T21 of the first signal line 21 and the thickness T23 of the second signal line 23 are thicker than the thickness T22 of the third signal line 22.
[0038] The above configuration makes it possible to reduce the AC resistance of the multilayer substrate 100. More specifically, the multilayer substrate 100 according to the first embodiment can achieve a lower height while still achieving the effect of reducing the AC resistance of the AC signal line 2, compared to when the thicknesses T21, T22, and T23 of the signal lines 21, 22, and 23 are increased, respectively.
[0039] (Embodiment 2) A multilayer substrate 100A according to embodiment 2 will be described with reference to Fig. 4. With regard to the multilayer substrate 100A according to embodiment 2, components that are the same as those in the multilayer substrate 100 according to embodiment 1 (see Figs. 1 to 3) are denoted by the same reference numerals, and description thereof will be omitted. In Fig. 4, as in Figs. 1 to 3, Cartesian coordinates having three mutually orthogonal axes, namely, an X-axis, a Y-axis, and a Z-axis, are defined and expressed.
[0040] (1) Configuration The multilayer substrate 100A according to the second embodiment differs from the multilayer substrate 100 according to the first embodiment in that it further includes a ground electrode 4 disposed on the second main surface 102 of the multilayer substrate 1, as shown in FIG. 4 .
[0041] The ground electrode 4 is laminated on the surface of the third insulating layer 13 opposite to the surface on which the second signal line 23 is laminated.
[0042] In this embodiment, in the thickness direction D1 of the laminated substrate 1, the first signal line 21, the first insulating layer 11, the third signal line 22, the second insulating layer 12, the second signal line 23, the third insulating layer 13, and the ground electrode 4 are arranged in the following order: the first signal line 21, the first insulating layer 11, the third signal line 22, the second insulating layer 12, the third signal line 22, the third insulating layer 13, and the ground electrode 4.
[0043] The ground electrode 4 is electrically conductive and is made of a material that includes, for example, copper.
[0044] The ground electrode 4 is formed in a predetermined pattern. In this embodiment, the ground electrode 4 is linear when viewed from above in the thickness direction D1 of the laminated substrate 1. However, the ground electrode 4 may have a shape other than linear when viewed from above in the thickness direction D1 of the laminated substrate 1.
[0045] In this embodiment, the ground electrode 4 is formed by, for example, patterning a fourth copper foil attached to the third insulating layer 13 .
[0046] In the width direction of the second signal line 23 , the width of the ground electrode 4 is the same as the line width of the second signal line 23 , but may be different from the line width of the second signal line 23 .
[0047] The ground electrode 4 is formed on the second main surface 102 of the multilayer substrate 1. The ground electrode 4 overlaps the signal lines 21 to 23 in a plan view in the thickness direction D1 of the multilayer substrate 1.
[0048] The ground electrode 4 is adjacent to the second signal line 23 of the multiple signal lines 21 to 23 in the thickness direction D1 of the laminated substrate 1. "The ground electrode 4 is adjacent to the second signal line 23 of the multiple signal lines 21 to 23 in the thickness direction D1 of the laminated substrate 1" means that the ground electrode 4 and the second signal line 23 are arranged apart from each other in the thickness direction of the laminated substrate 1, with no other signal lines 21, 22 being arranged between them.
[0049] In this embodiment, from the viewpoint of reducing the AC resistance of the AC signal line 2, the thickness T23 of the second signal line 23 and the thickness T21 of the first signal line 21 are thicker than the thickness T21 of the third signal line 22, and the thickness T23 of the second signal line 23 is thicker than the thickness T21 of the first signal line 21.
[0050] In this embodiment, the thickness of the ground electrode 4 is thinner than the thickness T23 of the second signal line 23. In this embodiment, the thickness of the ground electrode 4 is, for example, the same as the thickness T22 of the third signal line 22, but may be different from the thickness T22 of the third signal line 22.
[0051] (2) Effects The multilayer substrate 100A according to the second embodiment further includes a ground electrode 4 disposed on the second main surface 102 of the laminated substrate 1. In addition, in the multilayer substrate 100A according to the second embodiment, the ground electrode 4 is adjacent to the second signal line 23 in the thickness direction D1 of the laminated substrate 1, and the thickness T23 of the second signal line 23 is greater than the thickness T21 of the first signal line 21.
[0052] According to the above configuration, while improving noise resistance by the ground electrode 4, it is possible to reduce bias in the width direction of the current density of the second signal line 23 that is closest to the ground electrode 4, thereby further reducing the AC resistance of the AC signal line 2. More specifically, in the multilayer substrate 100A according to the second embodiment, bias in the width direction of the current is likely to occur in each of two signal lines 23, 21 among the multiple signal lines 21 to 23 that are spaced apart in the thickness direction D1 of the laminated substrate 1. However, because the second signal line 23 is adjacent to the ground electrode 4 in the thickness direction D1 of the laminated substrate 1, it is possible to improve the width direction of the current density distribution of the second signal line 23. By making the thickness T23 of the second signal line 23 with the improved current density distribution thicker than the thickness T21 of the first signal line 21 and the thickness T22 of the third signal line 22, it is possible to effectively reduce the AC resistance of the AC signal line 2.
[0053] Furthermore, in the multilayer substrate 100A according to the second embodiment, the ground electrode 4 overlaps the entire widthwise area of the second signal line 23 in the thickness direction D1 of the multilayer substrate 1 .
[0054] According to the above configuration, it is possible to further improve noise resistance.
[0055] (Embodiment 3) A multilayer substrate 100B according to embodiment 3 will be described with reference to Fig. 5. With regard to the multilayer substrate 100B according to embodiment 3, components that are the same as those of the multilayer substrate 100 according to embodiment 1 (see Figs. 1 to 3) are denoted by the same reference numerals, and description thereof will be omitted. In Fig. 5, as in Figs. 1 to 3, an orthogonal coordinate system having three mutually orthogonal axes, the X-axis, the Y-axis, and the Z-axis is defined, and the axis along the thickness direction D1 of the multilayer substrate 1 is represented as the Z-axis.
[0056] (1) Structure (1.1) Laminated Substrate The laminated substrate 1 has a first main surface 101 and a second main surface 102. The second main surface 102 of the laminated substrate 1 is the main surface opposite to the first main surface 101. The laminated substrate 1 has multiple (four in the example of FIG. 5 ) insulating layers 11, 12, 13, and 14, and the multiple insulating layers 11, 12, 13, and 14 are stacked. The thickness direction D1 of the laminated substrate 1 is the stacking direction of the multiple insulating layers 11, 12, 13, and 14. Hereinafter, for convenience of explanation, the insulating layer 11, the insulating layer 12, the insulating layer 13, and the insulating layer 14 may be referred to as the first insulating layer 11, the second insulating layer 12, the third insulating layer 13, and the fourth insulating layer 14, respectively.
[0057] In the laminated substrate 1, a first insulating layer 11, a second insulating layer 12, a third insulating layer 13, and a fourth insulating layer 14 are stacked in the order of the first insulating layer 11, the second insulating layer 12, the third insulating layer 13, and the fourth insulating layer 14.
[0058] The material of each of the multiple insulating layers 11, 12, 13, and 14 includes, for example, a thermoplastic resin. The thermoplastic resin is, for example, a liquid crystal polymer. The thermoplastic resin is not limited to a liquid crystal polymer, and may be, for example, PTFE. In this embodiment, the first insulating layer 11 and the second insulating layer 12 are self-adhered, and no adhesive layer is interposed between the first insulating layer 11 and the second insulating layer 12. Also, in this embodiment, the second insulating layer 12 and the third insulating layer 13 are self-adhered, and no adhesive layer is interposed between the second insulating layer 12 and the third insulating layer 13. Also, in this embodiment, the third insulating layer 13 and the fourth insulating layer 14 are self-adhered, and no adhesive layer is interposed between the third insulating layer 13 and the fourth insulating layer 14.
[0059] The thickness of each of the insulating layers 11, 12, 13, and 14 is, for example, not less than 10 μm and not more than 120 μm.
[0060] In this embodiment, the laminated substrate 1 has an elongated shape in which the length along the Y axis is longer than the length along the X axis when viewed from above in the thickness direction D1 of the laminated substrate 1. When viewed from above in the thickness direction D1 of the laminated substrate 1, the laminated substrate 1 may have a shape other than an elongated shape.
[0061] (1.2) AC Signal Line The AC signal line 2 is formed on the laminate substrate 1. The AC signal line 2 is, for example, an NFC signal line. In this embodiment, the signal transmitted through the AC signal line 2 is, for example, an AC signal with a frequency of 13.56 MHz.
[0062] The AC signal line 2 has a plurality of signal lines (signal electrodes) 21, 22, 23, and 24 that are spaced apart from one another in the thickness direction D1 of the laminated substrate 1. In a plan view of the laminated substrate 1 in the thickness direction D1, the signal lines 21, 22, 23, and 24 overlap one another.
[0063] Each of the signal lines 21 to 24 is electrically conductive and may be made of, for example, copper.
[0064] The signal line 21 is laminated on the first insulating layer 11. The signal line 22 is laminated on the second insulating layer 12. The signal line 23 is laminated on the third insulating layer 13. The signal line 24 is laminated on the fourth insulating layer 14. In the multilayer substrate 100B, the signal line 21, the first insulating layer 11, the signal line 22, the second insulating layer 12, the signal line 23, the third insulating layer 13, the fourth insulating layer 14, and the signal line 24 are laminated in this order: signal line 21, first insulating layer 11, signal line 22, second insulating layer 12, signal line 23, the third insulating layer 13, the fourth insulating layer 14, and signal line 24. Hereinafter, for convenience of explanation, the signal line 21, the signal line 24, and the signal line 22 may also be referred to as the first signal line 21, the second signal line 24, and the third signal line 22, respectively. The multiple signal lines 21 to 24 include a first signal line 21 that is closest to the first main surface 101 of the laminated substrate 1 in the thickness direction D1 of the laminated substrate 1, a second signal line 24 that is closest to the second main surface 102 of the laminated substrate 1 in the thickness direction D1 of the laminated substrate 1, and a third signal line 22 that is located between the first signal line 21 and the second signal line 24 in the thickness direction D1 of the laminated substrate 1.
[0065] Each of the multiple signal lines 21 to 24 is formed in a predetermined pattern. In this embodiment, when viewed in a plan view from the thickness direction D1 of the laminated substrate 1, each of the multiple signal lines 21 to 24 is linear. When viewed in a plan view from the thickness direction D1 of the laminated substrate 1, each of the multiple signal lines 21 to 24 may have a shape other than linear. The first signal line 21 is formed, for example, by patterning copper foil (hereinafter also referred to as the first copper foil) attached to the first insulating layer 11. The third signal line 22 is formed, for example, by patterning copper foil (hereinafter also referred to as the second copper foil) attached to the second insulating layer 12. The signal line 23 is formed, for example, by patterning copper foil (hereinafter also referred to as the third copper foil) attached to the third insulating layer 13. The second signal line 24 is formed, for example, by patterning copper foil (hereinafter also referred to as the fourth copper foil) attached to the fourth insulating layer 14.
[0066] In this embodiment, the line width of each of the multiple signal lines 21 to 24 is the width in the X-axis direction. In this embodiment, the line widths of the multiple signal lines 21 to 24 are the same, and it is preferable that the line width be wider, but the line widths of the signal lines 21 to 24 may be different from each other.
[0067] The thickness of each of the signal lines 21 to 24 is thinner than the thickness of each of the insulating layers 11 to 14. The thicknesses T21, T22, T23, and T24 of the signal lines 21, 22, 23, and 24, respectively, will be described later.
[0068] The AC signal line 2 also has a plurality of connecting conductors that electrically connect the plurality of signal lines 21 to 24. Each of the plurality of connecting conductors is an interlayer connecting conductor that connects signal lines formed in two different insulating layers among the plurality of insulating layers 11 to 14. Each of the plurality of connecting conductors is conductive. In the AC signal line 2, the plurality of signal lines 21 to 24 are electrically connected by a plurality of connecting conductors that penetrate one of the plurality of insulating layers 11 to 14 in the thickness direction D1 of the laminated substrate 1. The plurality of connecting conductors include a plurality of first connecting conductors 31 that penetrate the first insulating layer 11, a plurality of second connecting conductors 32 that penetrate the second insulating layer 12, a plurality of third connecting conductors 33 that penetrate the third insulating layer 13, and a plurality of fourth connecting conductors 34 that penetrate the fourth insulating layer 14.
[0069] In this embodiment, the plurality of third connecting conductors 33 and the plurality of fourth connecting conductors 34 correspond one-to-one to each other, and corresponding third connecting conductors 33 and fourth connecting conductors 34 overlap in the thickness direction D1 of the laminated substrate 1. In the AC signal line 2, the second connecting conductors 32 and the third connecting conductors 33 may be arranged with a shift in the signal transmission direction (the Y-axis direction in the example of FIG. 5 ).
[0070] In this embodiment, the multiple first connecting conductors 31 are interposed between the first signal line 21 and the third signal line 22 in the thickness direction D1 of the laminated substrate 1. The multiple first connecting conductors 31 are arranged at intervals in the longitudinal direction of the first signal line 21.
[0071] In this embodiment, the multiple second connection conductors 32 are interposed between the third signal line 22 and the signal line 23 in the thickness direction D1 of the laminated substrate 1. The multiple second connection conductors 32 are arranged at intervals in the longitudinal direction of the third signal line 22.
[0072] In this embodiment, a third connecting conductor 33 connected to the signal line 23 and a fourth connecting conductor 34 overlapping the third connecting conductor 33 are interposed between the signal line 23 and the second signal line 24 in the thickness direction D1 of the laminated substrate 1. The multiple third connecting conductors 33 are arranged in two rows, and the third connecting conductors 33 in each row are arranged at a distance in the longitudinal direction of the signal line 23. The multiple fourth connecting conductors 34 are arranged in two rows, and the fourth connecting conductors 34 in each row are arranged at a distance in the longitudinal direction of the second signal line 24. The longitudinal direction of the second signal line 24 is a direction along the second signal line 24, a direction perpendicular to the width direction (line width direction) of the second signal line 24, and is the direction in which a signal is transmitted in the second signal line 24.
[0073] In this embodiment, the first signal line 21 and the third signal line 22 are electrically connected by a plurality of first connecting conductors 31. In addition, in this embodiment, the third signal line 22 and the signal line 23 are electrically connected by a plurality of second connecting conductors 32. In addition, in this embodiment, the signal line 23 and the second signal line 24 are electrically connected by a plurality of third connecting conductors 33 and a plurality of fourth connecting conductors 34.
[0074] In this embodiment, the thickness T21 of the first signal line 21 and the thickness T24 of the second signal line 24 are thicker than the thickness T22 of the third signal line 22 in the thickness direction D1 of the laminated substrate 1. In this embodiment, as an example, the thickness T21 of the first signal line 21, the thickness T22 of the third signal line 22, the thickness T23 of the signal line 23, and the thickness of the second signal line 24 are 18 μm, 12 μm, 12 μm, and 18 μm, respectively. In this embodiment, the thickness T21 of the first signal line 21 and the thickness T24 of the second signal line 24 are the same, but they may be different from each other. Also, in this embodiment, the thickness T23 of the signal line 23 is the same as the thickness T22 of the third signal line 22, but they may be different from the thickness T22 of the third signal line 22.
[0075] (2) Effects In the multilayer substrate 100B according to the third embodiment, the thickness T21 of the first signal line 21 and the thickness T24 of the second signal line 24 are each thicker than the thickness T23 of the second signal line 23 in the thickness direction D1 of the multilayer substrate 1. This makes it possible to further reduce the AC resistance of the AC signal line 2 while suppressing an increase in the overall thickness of the multilayer substrate 100B.
[0076] (Embodiment 4) A multilayer substrate 100C according to embodiment 4 will be described with reference to Fig. 6. Regarding the multilayer substrate 100C according to embodiment 4, components similar to those of the multilayer substrate 100B according to embodiment 3 (see Fig. 5) are denoted by the same reference numerals, and description thereof will be omitted. In Fig. 6, as in Fig. 5, an orthogonal coordinate system having three mutually orthogonal axes, the X-axis, the Y-axis, and the Z-axis is defined, and the axis along the thickness direction D1 of the multilayer substrate 1 is represented as the Z-axis.
[0077] (1) Configuration In the multilayer substrate 100C according to the fourth embodiment, the thickness T21 of the first signal line 21 is thinner than the thickness T24 of the second signal line 24. In this embodiment, the thickness T21 of the first signal line 21 is the same as the thickness T22 of the third signal line 22 and the thickness T23 of the signal line 23, but they may be different. In this embodiment, as an example, the thickness T21 of the first signal line 21, the thickness T22 of the third signal line 22, the thickness T23 of the signal line 23, and the thickness T24 of the second signal line 24 are 12 μm, 12 μm, 12 μm, and 18 μm, respectively.
[0078] (2) Effect In the multilayer substrate 100C of embodiment 4, in the thickness direction D1 of the multilayer substrate 1, the thickness T24 of the second signal line 24 is thicker than the thickness T22 of the third signal line 22, out of the thickness T21 of the first signal line 21 and the thickness T24 of the second signal line 24.
[0079] According to the above configuration, the AC resistance of the AC signal line 2 can be reduced.
[0080] Furthermore, in the multilayer substrate 100C according to the fourth embodiment, the AC signal line 2 includes the signal line 23 located between the second signal line 24 and the third signal line 22 in the thickness direction D1 of the multilayer substrate 1. This allows the cross-sectional area of the AC signal line 2 to be increased, thereby further reducing the AC resistance of the AC signal line 2.
[0081] Fifth Embodiment A multilayer substrate 100D according to a fifth embodiment will be described with reference to Figures 7 to 9. Regarding the multilayer substrate 100D according to the fifth embodiment, components that are the same as those of the multilayer substrate 100A according to the second embodiment (see Figure 4) are denoted by the same reference numerals, and descriptions thereof will be omitted. In each of Figures 7 to 9, as in Figure 4, an orthogonal coordinate system having three mutually orthogonal axes, the X-axis, the Y-axis, and the Z-axis is defined, and the axis along the thickness direction D1 of the multilayer substrate 1 (see Figure 9) is indicated as the Z-axis.
[0082] (1) Configuration The multilayer substrate 100D according to the fifth embodiment differs from the multilayer substrate 100A according to the second embodiment in that it further includes an RF signal line 6, a first ground electrode 41, and a second ground electrode 44. The multilayer substrate 100D also includes a ground electrode 4. Note that the width of the multilayer substrate 100D in the width direction of the first signal line 21 is wider than the width of the multilayer substrate 100.
[0083] In the present embodiment, the RF signal line 6 is linear in a plan view from the thickness direction D1 of the laminated substrate 1. The RF signal line 6 is formed on the laminated substrate 1. The first ground electrode 41 is formed on the laminated substrate 1. The first ground electrode 41 faces the RF signal line 6 in the thickness direction D1 of the laminated substrate 1, via insulating layers 11 and 12 among the multiple insulating layers 11 to 13. The second ground electrode 44 is formed on the laminated substrate 1. The second ground electrode 44 faces the RF signal line 6 in the thickness direction D1 of the laminated substrate 1, via an insulating layer 13 that is different from the insulating layers 11 and 12 among the multiple insulating layers 11 to 13. In the present embodiment, the first ground electrode 41 and the second ground electrode 44 are linear in a plan view from the thickness direction D1 of the laminated substrate 1. In a plan view from the thickness direction D1 of the laminated substrate 1, the RF signal line 6, the first ground electrode 41, and the second ground electrode 44 may each have a shape other than a linear shape.
[0084] The multilayer substrate 100D further includes a third ground electrode 42 and a fourth ground electrode 43. In the multilayer substrate 100D, the first ground electrode 41, the third ground electrode 42, the fourth ground electrode 43, and the second ground electrode 44 are arranged in the following order in the thickness direction D1 of the laminated substrate 1. The first ground electrode 41, the third ground electrode 42, the fourth ground electrode 43, and the second ground electrode 44 are spaced apart from each other in the thickness direction D1 of the laminated substrate 1. The third ground electrode 42 is divided into two split ground electrodes 421 and 422 in the width direction of the third signal line 22. The fourth ground electrode 43 is divided into two split ground electrodes 431 and 432 in the width direction of the second signal line 23.
[0085] The first ground electrode 41 is located on the first main surface 101 of the laminated substrate 1. In this embodiment, the first signal line 21 and the first ground electrode 41 are arranged side by side in the width direction of the first signal line 21. The first signal line 21 and the first ground electrode 41 are spaced apart in the width direction of the first signal line 21. In this embodiment, the first signal line 21 and the first ground electrode 41 are formed by, for example, patterning a first copper foil attached to the first insulating layer 11.
[0086] In the present embodiment, the third signal line 22, the split ground electrode 421, and the split ground electrode 422 are arranged in this order in the width direction of the third signal line 22. The third signal line 22, the split ground electrode 421, and the split ground electrode 422 are spaced apart in the width direction of the third signal line 22. The distance between the split ground electrode 421 and the split ground electrode 422 in the width direction of the third signal line 22 is longer than the width of the RF signal line 6. In the thickness direction D1 of the laminated substrate 1, the split ground electrode 421 and the split ground electrode 422 do not overlap with the RF signal line 6. In the present embodiment, the third signal line 22, the split ground electrode 421, and the split ground electrode 422 are formed, for example, by patterning a second copper foil attached to the second insulating layer 12.
[0087] In the present embodiment, the second signal line 23 and the RF signal line 6 are aligned in the width direction of the second signal line 23. More specifically, in the present embodiment, the second signal line 23, the split ground electrode 431, the RF signal line 6, and the split ground electrode 432 are aligned in the width direction of the second signal line 23 in the following order: second signal line 23, split ground electrode 431, RF signal line 6, and split ground electrode 432. In the width direction of the second signal line 23, the second signal line 23, the split ground electrode 431, the RF signal line 6, and the split ground electrode 432 are spaced apart from one another. In the present embodiment, the second signal line 23, the split ground electrode 431, the RF signal line 6, and the split ground electrode 432 are formed, for example, by patterning a third copper foil attached to the third insulating layer 13.
[0088] The second ground electrode 44 is located on the second main surface 102 of the laminated substrate 1. In the multilayer substrate 100D of this embodiment, the ground electrode 4 that overlaps the multiple signal lines 21 to 24 in the thickness direction D1 of the laminated substrate 1 is connected to the second ground electrode 44. In this embodiment, the second ground electrode 44 and the ground electrode 4 are integrated and seamlessly connected to each other. In this embodiment, the second ground electrode 44 and the ground electrode 4 are formed, for example, by patterning a fourth copper foil attached to the second main surface of the third insulating layer 13, which is the main surface opposite to the first main surface, which is the main surface to which the third copper foil is attached.
[0089] The RF signal line 6 is designed so that the impedance of the RF signal line 6 is, for example, 50 Ω. As shown in Fig. 9 , the RF signal line 6 is located between the first ground electrode 41 and the second ground electrode 44 in the thickness direction D1 of the laminated substrate 1. Therefore, in the multilayer substrate 100D, the laminated substrate 1, the RF signal line 6, the first ground electrode 41, and the second ground electrode 44 form a strip line.
[0090] (2) Effects In the multilayer substrate 100D according to the fifth embodiment, similarly to the multilayer substrate 100A according to the second embodiment, the thickness T21 of the first signal line 21 and the thickness T23 of the second signal line 23 that overlap the ground electrode 4 in the thickness direction D1 of the laminated substrate 1 are both thicker than the thickness T22 of the third signal line 22, and therefore, the AC resistance of the AC signal line 2 can be reduced.
[0091] Furthermore, the multilayer substrate 100D according to the fifth embodiment includes a strip line including the laminated substrate 1, the RF signal line 6, the first ground electrode 41, and the second ground electrode 44. Therefore, in addition to transmitting signals via the AC signal line 2, the multilayer substrate 100D can also be used to transmit high-frequency signals via the RF signal line 6.
[0092] In the multilayer substrate 100D according to the fifth embodiment, the second signal line 23 and the RF signal line 6 are arranged side by side in the width direction of the second signal line 23. In the thickness direction D1 of the multilayer substrate 1, the thickness T6 of the RF signal line 6 is the same as the thickness T23 of the second signal line 23.
[0093] According to the above configuration, the resistance value of the RF signal line 6 can be reduced, and the transmission loss of the high-frequency signal in the RF signal line 6 can be reduced.
[0094] In the multilayer substrate 100D according to the fifth embodiment, the second ground electrode 44 and the ground electrode 4 are located on the second main surface 102 of the multilayer substrate 1. The second ground electrode 44 is connected to the ground electrode 4.
[0095] According to the above configuration, it is possible to improve noise resistance.
[0096] The RF signal line 6 may be arranged alongside the third signal line 22 in the width direction of the third signal line 22 .
[0097] Sixth Embodiment A multilayer substrate 100E according to a sixth embodiment will be described with reference to Fig. 10. Regarding the multilayer substrate 100E according to the sixth embodiment, the same components as those of the multilayer substrate 100D according to the fifth embodiment (see Figs. 7 to 9) are denoted by the same reference numerals, and description thereof will be omitted. In Fig. 10, as in Figs. 7 to 9, an orthogonal coordinate system having three mutually orthogonal axes, the X-axis, the Y-axis, and the Z-axis is defined, and the axis along the thickness direction D1 of the multilayer substrate 1 is indicated as the Z-axis.
[0098] (1) Configuration The multilayer substrate 100E according to the sixth embodiment differs from the multilayer substrate 100D according to the fifth embodiment in that it includes a plurality of signal conductor lines 71 to 73 (three in FIG. 10).
[0099] The multiple signal conductor lines 71 to 73 are formed on the laminated substrate 1. In this embodiment, when viewed in a plan view from the thickness direction D1 of the laminated substrate 1, each of the multiple signal conductor lines 71 to 73 is, for example, linear. The multiple signal conductor lines 71 to 73 are signal conductor lines through which different signals (for example, digital signals) are transmitted. When viewed in a plan view from the thickness direction D1 of the laminated substrate 1, each of the multiple signal conductor lines 71 to 73 may have a shape other than linear.
[0100] In this embodiment, the first signal line 21 and the first ground electrode 41 are formed, for example, by patterning a first copper foil attached to the first insulating layer 11 .
[0101] In this embodiment, the third signal line 22 and one signal conductor line 73 are aligned in the width direction of the third signal line 22. More specifically, in this embodiment, the third signal line 22, the split ground electrode 421, the split ground electrode 422, and the signal conductor line 73 are aligned in the width direction of the third signal line 22 in the following order: the third signal line 22, the split ground electrode 421, the split ground electrode 422, and the signal conductor line 73. In the width direction of the third signal line 22, the third signal line 22, the split ground electrode 421, the split ground electrode 422, and the signal conductor line 73 are spaced apart from one another. In the thickness direction D1 of the laminated substrate 1, the split ground electrode 421 and the split ground electrode 422 do not overlap with the signal conductor line 71. In this embodiment, the third signal line 22, the split ground electrode 421, the split ground electrode 422, and the signal conductor line 73 are formed, for example, by patterning a second copper foil attached to the second insulating layer 12.
[0102] In this embodiment, the second signal line 23 and the two signal conductor lines 71 and 72 are aligned in the width direction of the second signal line 23. More specifically, in this embodiment, the second signal line 23, the split ground electrode 431, the signal conductor line 71, the split ground electrode 432, and the signal conductor line 72 are aligned in the width direction of the second signal line 23 in the following order: second signal line 23, split ground electrode 431, the signal conductor line 71, the split ground electrode 432, and the signal conductor line 72. In the width direction of the second signal line 23, the second signal line 23, the split ground electrode 431, the signal conductor line 71, the split ground electrode 432, and the signal conductor line 72 are spaced apart from one another. In this embodiment, the second signal line 23, the split ground electrode 431, the signal conductor line 71, the split ground electrode 432, and the signal conductor line 72 are formed, for example, by patterning a third copper foil attached to the third insulating layer 13.
[0103] In this embodiment, the ground electrode 4 and the second ground electrode 44 are formed, for example, by patterning a fourth copper foil attached to a second main surface of the third insulating layer 13 opposite to the first main surface, which is the main surface to which the third copper foil is attached.
[0104] As can be seen from the above description, of the multiple signal conductor lines 71 to 73, the number of signal conductor lines aligned with the second signal line 23 in the width direction of the second signal line 23 is the largest.
[0105] (2) Effects In the multilayer substrate 100E according to the sixth embodiment, similarly to the multilayer substrate 100D according to the fifth embodiment, the thickness T21 of the first signal line 21 and the thickness T23 of the second signal line 23 are both greater than the thickness T22 of the third signal line 22 in the thickness direction D1 of the laminated substrate 1, and therefore the AC resistance of the AC signal line 2 can be reduced.
[0106] Furthermore, the multilayer substrate 100E according to the sixth embodiment further includes a plurality of signal conductor lines 71 to 73, and therefore can be used to transmit a plurality of other signals via the signal conductor lines 71 to 73, respectively, in addition to transmitting a signal via the AC signal line 2.
[0107] Furthermore, in the multilayer substrate 100E of embodiment 6, the number of signal conductor lines that are aligned with the second signal line 23 in the width direction of the second signal line 23 is the largest among the multiple signal conductor lines 71 to 73, and therefore it is possible to reduce the resistance values of more of the multiple signal conductor lines 71 to 73.
[0108] Seventh Embodiment A multilayer substrate 100F according to a seventh embodiment will be described with reference to Fig. 11. Regarding the multilayer substrate 100F according to the seventh embodiment, components similar to those of the multilayer substrate 100E according to the sixth embodiment (see Fig. 10) are denoted by the same reference numerals, and description thereof will be omitted. In Fig. 11, as in Fig. 10, an orthogonal coordinate system having three mutually orthogonal axes, the X-axis, the Y-axis, and the Z-axis is defined, and the axis along the thickness direction D1 of the multilayer substrate 1 is indicated as the Z-axis.
[0109] (1) Configuration The multilayer substrate 100F according to the seventh embodiment differs from the multilayer substrate 100E according to the sixth embodiment in that the signal conductor line 73 is located on the first main surface 101 of the multilayer substrate 1.
[0110] In this embodiment, the first signal line 21 and the signal conductor line 73 are aligned in the width direction of the first signal line 21. More specifically, in the width direction of the first signal line 21, the first signal line 21, the first ground electrode 41, and the signal conductor line 73 are aligned in this order.
[0111] In this embodiment, the thickness of the signal conductor line 73 in the thickness direction D1 of the laminated substrate 1 is the same as the thickness T21 of the first signal line 21. In other words, in this embodiment, the thickness of the signal conductor line 73 is thicker than the thickness T22 of the third signal line 22.
[0112] (2) Effects In the multilayer substrate 100F according to the seventh embodiment, similar to the multilayer substrate 100E according to the sixth embodiment, the thickness T21 of the first signal line 21 and the thickness T23 of the second signal line 23 are both greater than the thickness T22 of the third signal line 22 in the thickness direction D1 of the laminated substrate 1, and therefore the AC resistance of the AC signal line 2 can be reduced.
[0113] Furthermore, in the multilayer substrate 100F of embodiment 7, the first signal line 21 and the signal conductor line 73 are aligned in the width direction of the first signal line 21, and the thickness of the signal conductor line 73 is the same as the thickness T21 of the first signal line 21.
[0114] According to the above configuration, it is possible to reduce the resistance value of the signal conductor line 73 without increasing the thickness of the entire laminated substrate 1, compared to when the thickness of the signal conductor line 73 is the same as the thickness T22 of the third signal line 22.
[0115] Eighth Embodiment A multilayer substrate 100G according to an eighth embodiment will be described with reference to Fig. 12. Regarding the multilayer substrate 100G according to the eighth embodiment, components similar to those of the multilayer substrate 100E according to the sixth embodiment (see Fig. 10) are denoted by the same reference numerals, and description thereof will be omitted. In Fig. 12, as in Fig. 10, an orthogonal coordinate system having three mutually orthogonal axes, the X-axis, the Y-axis, and the Z-axis, is defined, and the axis along the thickness direction D1 of the multilayer substrate 1 is indicated as the Z-axis.
[0116] (1) Configuration In the multilayer substrate 100G according to the eighth embodiment, the width W71 of one of the multiple (three in the example of FIG. 12 ) signal conductor lines 71 to 73 is wider than the width W72 of the signal conductor line 72 and the width W73 of the signal conductor line 73.
[0117] In this embodiment, the first signal line 21 and the first ground electrode 41 are formed, for example, by patterning a first copper foil attached to the first insulating layer 11 .
[0118] In this embodiment, the third signal line 22 and the two signal conductor lines 73, 72 are arranged side by side in the width direction of the third signal line 22. More specifically, in this embodiment, the third signal line 22, the split ground electrode 421, the signal conductor line 73, the split ground electrode 422, and the signal conductor line 72 are arranged in the following order in the width direction of the third signal line 22: the third signal line 22, the split ground electrode 421, the signal conductor line 73, the split ground electrode 422, and the signal conductor line 72. In the width direction of the third signal line 22, the third signal line 22, the split ground electrode 421, the signal conductor line 73, the split ground electrode 422, and the signal conductor line 72 are spaced apart from one another. In this embodiment, the third signal line 22, the split ground electrode 421, the signal conductor line 73, the split ground electrode 422, and the signal conductor line 72 are formed, for example, by patterning a second copper foil attached to the second insulating layer 12.
[0119] In this embodiment, the second signal line 23 and one signal conductor line 71 are aligned in the width direction of the second signal line 23. More specifically, in this embodiment, the second signal line 23, the split ground electrode 431, the signal conductor line 71, and the split ground electrode 432 are aligned in the width direction of the second signal line 23 in the following order: second signal line 23, split ground electrode 431, signal conductor line 71, and split ground electrode 432. In the width direction of the second signal line 23, the second signal line 23, the split ground electrode 431, the signal conductor line 71, and the split ground electrode 432 are spaced apart from one another. In this embodiment, the second signal line 23, the split ground electrode 431, the signal conductor line 71, and the split ground electrode 432 are formed, for example, by patterning a third copper foil attached to the third insulating layer 13.
[0120] In this embodiment, the ground electrode 4 and the second ground electrode 44 are formed, for example, by patterning a fourth copper foil attached to a second main surface of the third insulating layer 13 opposite to the first main surface, which is the main surface to which the third copper foil is attached.
[0121] The width W71 of the signal conductor line 71 is wider than the width W72 of the signal conductor line 72 and the width W73 of the signal conductor line 73. Therefore, in the multilayer substrate 100G, the signal conductor line 71, which is the widest of the multiple signal conductor lines 71 to 73, is aligned with the second signal line 23 in the width direction of the second signal line 23.
[0122] (2) Effects In the multilayer substrate 100G according to the eighth embodiment, similar to the multilayer substrate 100E according to the sixth embodiment, the thickness T21 of the first signal line 21 and the thickness T23 of the second signal line 23 are both greater than the thickness T22 of the third signal line 22 in the thickness direction D1 of the laminated substrate 1, and therefore the AC resistance of the AC signal line 2 can be reduced.
[0123] In the multilayer substrate 100G according to the eighth embodiment, the thickness T23 of the second signal line 23 adjacent to the ground electrode 4 in the thickness direction D1 of the multilayer substrate 1 is greater than the thickness T22 of the third signal line 22.
[0124] According to the above configuration, it is possible to increase the thicknesses T23 and T21 of the second signal line 23 and the first signal line 21, respectively, which are prone to bias in the current distribution in the width direction due to the proximity effect. This makes it possible to reduce the AC resistance of the AC signal line 2 while suppressing an increase in the overall thickness of the multilayer substrate 100G.
[0125] Furthermore, the multilayer substrate 100G according to the eighth embodiment further includes a plurality of signal conductor lines 71 to 73, and therefore can be used to transmit a plurality of other signals via the signal conductor lines 71 to 73, respectively, in addition to transmitting a signal via the AC signal line 2.
[0126] Furthermore, in the multilayer substrate 100G according to the eighth embodiment, the signal conductor line 71, which is the widest of the multiple signal conductor lines 71 to 73, is aligned with the second signal line 23 in the width direction of the second signal line 23.
[0127] According to the above configuration, it is possible to reduce the resistance value of the signal conductor line 71, which is the widest of the plurality of signal conductor lines 71 to 73.
[0128] Ninth Embodiment A multilayer substrate 100H according to a ninth embodiment will be described with reference to Fig. 13. Regarding the multilayer substrate 100H according to the ninth embodiment, components similar to those of the multilayer substrate 100E according to the sixth embodiment (see Fig. 10) are denoted by the same reference numerals, and description thereof will be omitted. In Fig. 13, as in Fig. 10, an orthogonal coordinate system having three mutually orthogonal axes, the X-axis, the Y-axis, and the Z-axis is defined, and the axis along the thickness direction D1 of the multilayer substrate 1 is indicated as the Z-axis.
[0129] (1) Configuration The multilayer substrate 100H according to the ninth embodiment differs from the multilayer substrate 100E according to the sixth embodiment in that the thickness of the second region A2, in which the plurality of signal conductor lines 71 to 73 (three in FIG. 13 ) are formed in the laminated substrate 1, is thinner than the thickness of the first region A1, in which the plurality of signal lines 21 to 23 and the ground electrode 4 are formed in the laminated substrate 1.
[0130] In this embodiment, the first signal line 21 is formed by, for example, patterning a first copper foil attached to the first insulating layer 11 .
[0131] In the present embodiment, the third signal line 22 and the third ground electrode 42 are arranged side by side in the width direction of the third signal line 22. The third signal line 22 and the third ground electrode 42 are spaced apart from each other in the width direction of the third signal line 22. In the present embodiment, the third signal line 22 and the third ground electrode 42 are formed by, for example, patterning a second copper foil attached to the second insulating layer 12.
[0132] In this embodiment, the second signal line 23 and three signal conductor lines 71 to 73 are arranged side by side in the width direction of the second signal line 23. More specifically, in this embodiment, the second signal line 23, the split ground electrode 431, the signal conductor line 71, the signal conductor line 72, the signal conductor line 73, and the split ground electrode 432 are arranged in the following order in the width direction of the second signal line 23: the second signal line 23, the split ground electrode 431, the signal conductor line 71, the signal conductor line 72, the signal conductor line 73, and the split ground electrode 432. In this embodiment, the second signal line 23, the split ground electrode 431, the signal conductor line 71, the signal conductor line 72, the signal conductor line 73, and the split ground electrode 432 are formed, for example, by patterning a third copper foil attached to the third insulating layer 13.
[0133] In this embodiment, the ground electrode 4 and the second ground electrode 44 are formed, for example, by patterning a fourth copper foil attached to a second main surface of the third insulating layer 13 opposite to the first main surface, which is the main surface to which the third copper foil is attached.
[0134] (2) Effects In the multilayer substrate 100H according to the ninth embodiment, similar to the multilayer substrate 100E according to the sixth embodiment, the thickness T21 of the first signal line 21 and the thickness T23 of the second signal line 23 are both greater than the thickness T22 of the third signal line 22 in the thickness direction D1 of the laminated substrate 1, and therefore the AC resistance of the AC signal line 2 can be reduced.
[0135] In the multilayer substrate 100H according to the ninth embodiment, the thickness T23 of the second signal line 23 adjacent to the ground electrode 4 in the thickness direction D1 of the multilayer substrate 1 is greater than the thickness T22 of the third signal line 22.
[0136] According to the above configuration, it is possible to further reduce the bias in current density of the second signal line 23, which is prone to bias in the current distribution in the width direction due to the proximity effect, and it is possible to reduce the AC resistance of the AC signal line 2.
[0137] Tenth Embodiment A multilayer substrate 100I according to a tenth embodiment will be described with reference to Fig. 14. In the multilayer substrate 100I according to the tenth embodiment, components similar to those of the multilayer substrate 100H according to the ninth embodiment (see Fig. 13) are denoted by the same reference numerals, and description thereof will be omitted. In Fig. 14, as in Fig. 13, an orthogonal coordinate system having three mutually orthogonal axes, the X-axis, the Y-axis, and the Z-axis, is defined, and the axis along the thickness direction D1 of the multilayer substrate 1 is represented as the Z-axis.
[0138] (1) Configuration The multilayer substrate 100I of the tenth embodiment differs from the multilayer substrate 100H of the ninth embodiment in that the thickness of the second region A2 in which the multiple (three in FIG. 14 ) signal conductor lines 71 to 73 are formed in the multilayer substrate 1 is the same as the thickness of the insulating layer 13.
[0139] (2) Effects In the multilayer substrate 100I according to the tenth embodiment, similar to the multilayer substrate 100H according to the ninth embodiment, the thickness T21 of the first signal line 21 and the thickness T23 of the second signal line 23 are both greater than the thickness T22 of the third signal line 22 in the thickness direction D1 of the laminated substrate 1, and therefore the AC resistance of the AC signal line 2 can be reduced.
[0140] In addition, in the multilayer substrate 100I according to the tenth embodiment, the thickness T23 of the second signal line 23 adjacent to the ground electrode 4 in the thickness direction D1 of the multilayer substrate 1 is greater than the thickness T22 of the third signal line 22.
[0141] According to the above configuration, it is possible to further reduce the bias in current density of the second signal line 23, which is prone to bias in the current distribution in the width direction due to the proximity effect, and it is possible to reduce the AC resistance of the AC signal line 2.
[0142] (Embodiment 11) A multilayer substrate 100J according to embodiment 11 will be described with reference to Fig. 15. Regarding the multilayer substrate 100J according to embodiment 11, components similar to those of the multilayer substrate 100E according to embodiment 6 (see Fig. 10) are denoted by the same reference numerals, and description thereof will be omitted. In Fig. 15, as in Fig. 10, an orthogonal coordinate system having three mutually orthogonal axes, the X-axis, the Y-axis, and the Z-axis is defined, and the axis along the thickness direction D1 of the multilayer substrate 1 is represented as the Z-axis.
[0143] (1) Configuration The multilayer substrate 100J according to the eleventh embodiment differs from the multilayer substrate 100E according to the sixth embodiment in that it includes a plurality of land electrodes 8. The plurality of land electrodes 8 are formed on the multilayer substrate 1.
[0144] In this embodiment, the first ground electrode 41 is divided into two split ground electrodes 411 and 412. In the width direction of the first signal line 21, the multiple land electrodes 8 are aligned with the first signal line 21. More specifically, in this embodiment, the first signal line 21, split ground electrode 411, land electrode 8, land electrode 8, and split ground electrode 412 are aligned in the following order: first signal line 21, split ground electrode 411, land electrode 8, land electrode 8, and split ground electrode 412.
[0145] In this embodiment, the thickness of the multiple land electrodes 8 is thicker than the thickness T22 of the third signal line 22. In this embodiment, the thickness of the multiple land electrodes 8 is equal to or greater than the thickness T21 of the first signal line 21. Each of the multiple land electrodes 8 includes a conductor portion 81 having the same thickness as the thickness T21 of the first signal line 21, and a plated portion 82 laminated on the conductor portion 81. Each of the multiple land electrodes 8 includes the conductor portion 81 and the plated portion 82, but may also be configured without including the plated portion 82. In other words, each of the multiple land electrodes 8 may be composed of only the conductor portion 81.
[0146] The multilayer substrate 100J further includes a first protective film 110 disposed on the first main surface 101 of the laminated substrate 1 and a second protective film 120 disposed on the second main surface 102 of the laminated substrate 1. Each of the first protective film 110 and the second protective film 120 includes, for example, a polyimide film and an adhesive layer. The material of the adhesive layer includes, for example, an acrylic resin, a silicone resin, an epoxy resin, or a urethane resin. As long as the multilayer substrate 100J does not have a bent portion, each of the first protective film 110 and the second protective film 120 is not limited to a configuration including a polyimide film and an adhesive layer, and may be a protective film formed using, for example, spin coating technology and photolithography technology.
[0147] The first signal line 21, the split ground electrode 411, the conductor portion 81 of the land electrode 8, the conductor portion 81 of the land electrode 8, and the split ground electrode 412 are formed, for example, by patterning a first copper foil attached to the third insulating layer 13.
[0148] In addition, the multilayer substrate 100J according to the eleventh embodiment further includes a plurality of solder portions 9 joined one-to-one to a plurality of land electrodes 8, and an electronic component E1 joined to the plurality of solder portions 9.
[0149] The electronic component E1 is, for example, a connector. The electronic component E1 is not limited to a connector, but may be another electronic component such as an IC chip or a surface-mount electronic component (for example, a chip inductor or a chip capacitor).
[0150] Although the multilayer substrate 100J includes a plurality of solder parts 9 and electronic components E1, it may be configured not to include a plurality of solder parts 9 and electronic components E1.
[0151] (2) Effects In the multilayer substrate 100J according to the eleventh embodiment, similar to the multilayer substrate 100E according to the sixth embodiment, the thickness T21 of the first signal line 21 and the thickness T23 of the second signal line 23 are both greater than the thickness T22 of the third signal line 22 in the thickness direction D1 of the laminated substrate 1, and therefore the AC resistance of the AC signal line 2 can be reduced.
[0152] In the multilayer substrate 100J according to the eleventh embodiment, the thickness T23 of the second signal line 23 adjacent to the ground electrode 4 in the thickness direction D1 of the multilayer substrate 1 is greater than the thickness T22 of the third signal line 22.
[0153] According to the above configuration, it is possible to further reduce the bias in current density of the second signal line 23, which is prone to bias in the current distribution in the width direction due to the proximity effect, and it is possible to reduce the AC resistance of the AC signal line 2.
[0154] Moreover, the multilayer substrate 100J according to the eleventh embodiment further includes a plurality of land electrodes 8 formed on the first main surface 101 of the multilayer substrate 1. The first signal line 21 is formed on the first main surface 101 of the multilayer substrate 1. The thickness of the plurality of land electrodes 8 is equal to or greater than the thickness T21 of the first signal line 21.
[0155] According to the above configuration, the thickness of the plurality of land electrodes 8 is equal to or greater than the thickness T21 of the first signal line 21, which improves mountability when mounting the electronic component E1 on the plurality of land electrodes 8. According to the above configuration, the thickness of each of the plurality of land electrodes 8 is large, which makes it difficult for solder to be eaten away when mounting the electronic component E1 on the plurality of land electrodes 8, thereby improving mountability.
[0156] In addition, the multilayer substrate 100J according to the eleventh embodiment further includes a plurality of solder portions 9 joined one-to-one to a plurality of land electrodes 8, and an electronic component E1 joined to the plurality of solder portions 9.
[0157] According to the above configuration, it is possible to provide a multilayer substrate 100J including an electronic component E1.
[0158] Twelfth Embodiment A multilayer substrate 100K according to a twelfth embodiment will be described with reference to Fig. 16. With regard to the multilayer substrate 100K according to the twelfth embodiment, components that are the same as those of the multilayer substrate 100 according to the first embodiment (see Figs. 1 to 3) are denoted by the same reference numerals, and description thereof will be omitted. In Fig. 16, as in Figs. 1 to 3, Cartesian coordinates having three mutually orthogonal axes, i.e., an X-axis, a Y-axis, and a Z-axis, are defined and expressed.
[0159] (1) Configuration As shown in FIG. 16, a multilayer substrate 100K according to the twelfth embodiment differs from the multilayer substrate 100 according to the first embodiment in that it is curved.
[0160] The multilayer substrate 100K is bent by plastically deforming the thermoplastic resin of the multilayer substrate 1, and the multilayer substrate 100K maintains its shape by itself.
[0161] (2) Effects The multilayer substrate 100K according to the twelfth embodiment can reduce the AC resistance of the AC signal line 2, similar to the multilayer substrate 100 according to the first embodiment.
[0162] Furthermore, the multilayer substrate 100K according to the twelfth embodiment can be easily placed inside the housing of an electronic device, for example, when the housing of the electronic device has a curved space for accommodating the multilayer substrate 100K.
[0163] (Modifications) The above-described embodiments 1 to 12 are merely examples of various embodiments of the present invention. The above-described embodiments 1 to 12 can be modified in various ways depending on the design and the like, and may be combined as appropriate, as long as the object of the present invention can be achieved.
[0164] For example, the material of each of the multiple insulating layers 11-13 may be, for example, polyimide (PI) or modified polyimide (modified-PI). In this case, each of the multiple first connecting conductors 31 and the multiple second connecting conductors 32 may be formed by through-hole plating. Furthermore, the laminated substrate 1 may include an adhesive layer interposed between two adjacent insulating layers among the multiple insulating layers 11-13 in the thickness direction D1 of the laminated substrate 1. The material of each of the multiple insulating layers 11-14 may be, for example, polyimide or modified polyimide. In this case, each of the multiple first connecting conductors 31, the multiple second connecting conductors 32, the multiple third connecting conductors 33, and the multiple fourth connecting conductors 34 may be formed by through-hole plating. Furthermore, the third connecting conductor 33 and the fourth connecting conductor 34, which are connected to each other, may be formed by a single through-hole plating. The material of the through-hole plating may be, for example, copper. Furthermore, the laminated substrate 1 may include an adhesive layer interposed between two of the insulating layers 11 to 14 that are adjacent to each other in the thickness direction D1 of the laminated substrate 1.
[0165] Furthermore, the multilayer substrates 100A to 100J of the second to eleventh embodiments may be curved in the same manner as the multilayer substrate 100K of the twelfth embodiment.
[0166] Furthermore, the multilayer substrates 100, 100A-100I, and 100K may further include at least one of a first cover layer disposed on the first main surface 101 of the laminate substrate 1 and a second cover layer disposed on the second main surface 102 of the laminate substrate 1. Each of the first cover layer and the second cover layer includes, for example, a polyimide film and an adhesive layer. The adhesive layer may be made of, for example, an acrylic resin, a silicone resin, an epoxy resin, or a urethane resin. As long as the multilayer substrates 100, 100A-100I, and 100K do not have any bent portions, each of the first cover layer and the second cover layer is not limited to a configuration including a polyimide film and an adhesive layer, and may be, for example, a resist layer. The resist layer can be formed using, for example, spin coating and photolithography.
[0167] (Aspects) The present specification discloses the following aspects.
[0168] A multilayer substrate (100; 100A; 100B; 100C; 100D; 100E; 100F; 100G; 100H; 100I; 100J; 100K) according to a first aspect includes a laminated substrate (1) and an AC signal line (2). The laminated substrate (1) has a plurality of insulating layers (11-13; 11-14) stacked one on the other. The laminated substrate (1) has a first main surface (101) and a second main surface (102). The AC signal line (2) is formed on the laminated substrate (1). The AC signal line (2) has a plurality of signal lines (21-23; 21-24) spaced apart from one another in a thickness direction (D1) of the laminated substrate (1). In the AC signal line (2), a plurality of signal lines (21-23; 21-24) are electrically connected by a plurality of connecting conductors that penetrate one of the plurality of insulating layers (11-13; 11-14) in the thickness direction (D1) of the laminated substrate (1). The plurality of signal lines (21-23; 21-24) include a first signal line (21) that is closest to a first main surface (101) of the laminated substrate (1) in the thickness direction (D1) of the laminated substrate (1), a second signal line (23; 24) that is closest to a second main surface (102) of the laminated substrate (1) in the thickness direction (D1) of the laminated substrate (1), and a third signal line (22) that is located between the first signal line (21) and the second signal line (23; 24) in the thickness direction (D1) of the laminated substrate (1). In the thickness direction (D1) of the laminated substrate (1), at least one of the thickness (T21) of the first signal line (21) and the thickness (T23; T24) of the second signal line (23; 24) is thicker than the thickness (T22) of the third signal line (22).
[0169] According to this aspect, it is possible to reduce AC resistance.
[0170] In the multilayer substrate (100; 100A; 100B; 100D; 100E; 100F; 100G; 100H; 100I; 100J; 100K) according to the second aspect, in the first aspect, both the thickness (T21) of the first signal line (21) and the thickness (T23; T24) of the second signal line (23; 24) are thicker than the thickness (T22) of the third signal line (22).
[0171] According to this aspect, it is possible to further reduce the AC resistance.
[0172] A multilayer substrate (100A; 100D; 100E; 100F; 100G; 100H; 100I; 100J) according to a third aspect is the second aspect, further comprising a ground electrode (4). The ground electrode (4) is disposed on a second main surface (102) of the laminated substrate (1). The ground electrode (4) is adjacent to a second signal line (23) in a thickness direction (D1) of the laminated substrate (1). A thickness (T23) of the second signal line (23) is greater than a thickness (T21) of the first signal line (21).
[0173] According to this aspect, while improving noise resistance by the ground electrode (4), it is possible to reduce bias in current density in the width direction of the second signal line (23) closest to the ground electrode (4), and it is possible to further reduce AC resistance.
[0174] A multilayer substrate (100D) according to a fourth aspect is the first or second aspect, further comprising an RF signal line (6), a first ground electrode (41), and a second ground electrode (44). The RF signal line (6) is formed on the laminate substrate (1). The RF signal line (6) is aligned with one of the multiple signal lines (21-23) in the width direction of the single signal line (second signal line 23). The first ground electrode (41) is formed on the laminate substrate (1). The first ground electrode (41) faces the RF signal line (6) in the thickness direction (D1) of the laminate substrate (1) via at least one insulating layer (11; 11, 12) of the multiple insulating layers (11-13). The second ground electrode (44) is formed on the laminate substrate (1). The second ground electrode (44) faces the RF signal line (6) via an insulating layer (13) different from the at least one insulating layer (11) among the plurality of insulating layers (11 to 13) in the thickness direction (D1) of the laminated substrate (1).
[0175] According to this aspect, the laminated substrate (1), the RF signal line (6), the strip line including the first ground electrode (41), and the second ground electrode (44) are provided, and therefore, in addition to transmitting signals via the AC signal line (2), the RF signal line (6) can also be used to transmit high-frequency signals.
[0176] In a multilayer substrate (100D) according to a fifth aspect, in the fourth aspect, the one signal line is a second signal line (23). In the thickness direction (D1) of the multilayer substrate (1), a thickness (T6) of the RF signal line (6) and a thickness (T23) of the second signal line (23) are the same.
[0177] According to this aspect, the resistance value of the RF signal line (6) can be reduced, and the transmission loss of the high frequency signal in the RF signal line (6) can be reduced.
[0178] A multilayer substrate (100E; 100F; 100H; 100I) according to a sixth aspect is the second or third aspect, further comprising a plurality of signal conductor lines (71-73) formed on the laminate substrate (1). Of the plurality of signal conductor lines (71-73), the number of signal conductor lines aligned with the second signal line (23) in the width direction of the second signal line (23) is the largest.
[0179] According to this aspect, since the multiple signal conductor lines (71-73) are further provided, the multiple signal conductor lines (71-73) can be used to transmit multiple other signals, respectively, in addition to the signal transmission via the AC signal line (2). Furthermore, according to this aspect, the multiple signal conductor lines (71-73) have the largest number of signal conductor lines aligned with the second signal line (23) in the width direction of the second signal line (23), so it is possible to reduce the resistance values of more of the multiple signal conductor lines (71-73).
[0180] A multilayer substrate (100G) according to a seventh aspect is the second or third aspect, further comprising a plurality of signal conductor lines (71-73) formed on the laminate substrate (1). In the multilayer substrate (100G), the widest signal conductor line (71) among the plurality of signal conductor lines (71-73) is aligned with the second signal line (23) in the width direction of the second signal line (23).
[0181] According to this aspect, since the multiple signal conductor lines (71-73) are further provided, the multiple signal conductor lines (71-73) can be used to transmit multiple other signals, respectively, in addition to the signal transmission via the AC signal line (2). Also, according to this aspect, since the widest signal conductor line (71) of the multiple signal conductor lines (71-73) is aligned with the second signal line (23) in the width direction of the second signal line (23), it is possible to reduce the resistance value of the widest signal conductor line (71) of the multiple signal conductor lines (71-73).
[0182] A multilayer substrate (100J) according to an eighth aspect is any one of the first to seventh aspects, further comprising a plurality of land electrodes (8) formed on a first main surface (101) of the laminated substrate (1). A first signal line (21) is formed on the first main surface (101) of the laminated substrate (1). The thickness of the plurality of land electrodes (8) is equal to or greater than the thickness (T21) of the first signal line (21).
[0183] According to this aspect, since the thickness of the plurality of land electrodes (8) is equal to or greater than the thickness (T21) of the first signal line (21), it is possible to improve the mountability when mounting electronic components (E1) on the plurality of land electrodes (8).
[0184] The multilayer substrate (100J) according to the ninth aspect is the eighth aspect, further comprising a plurality of solder portions (9) joined one-to-one to the plurality of land electrodes (8), and electronic components (E1) joined to the plurality of solder portions (9).
[0185] According to this aspect, it is possible to provide a multilayer substrate (100J) including an electronic component (E1).
[0186] A multilayer substrate (100; 100A; 100B; 100C; 100D; 100E; 100F; 100G; 100H; 100I; 100J; 100K) according to a tenth aspect is any one of the first to ninth aspects, in which the material of each of the plurality of insulating layers (21-23; 21-24) contains a thermoplastic resin.
[0187] According to this aspect, it is possible to improve the bendability of the multilayer substrate (100; 100A; 100B; 100C; 100D; 100E; 100F; 100G; 100H; 100I; 100J; 100K).
[0188] REFERENCE SIGNS LIST 1 laminated substrate 101 first main surface 102 second main surface 11, 12, 13, 14 insulating layer 2 AC signal line 21 signal line (first signal line) 22 signal line (third signal line) 23 signal line (second signal line) 24 signal line (second signal line) 31 first connecting conductor 32 second connecting conductor 33 third connecting conductor 34 fourth connecting conductor 4 ground electrode 41 first ground electrode 44 second ground electrode 6 RF signal line 71, 72, 73 signal conductor line 8 land electrode 9 solder part 100, 100A, 100B, 100C, 100D, 100E, 100F, 100G, 100H, 100I, 100J, 100K multilayer substrate D1 thickness direction E1 electronic component T6 Thickness T21 Thickness T22 Thickness T23 Thickness T24 Thickness
Claims
1. A multilayer substrate comprising: a laminated substrate having a first main surface and a second main surface formed by stacking a plurality of insulating layers; and an AC signal line formed on the laminated substrate, wherein the AC signal line has a plurality of signal lines spaced apart from each other in a thickness direction of the laminated substrate, the plurality of signal lines being electrically connected by a plurality of connecting conductors penetrating one of the plurality of insulating layers in the thickness direction of the laminated substrate, the plurality of signal lines including: a first signal line closest to the first main surface of the laminated substrate in the thickness direction of the laminated substrate; a second signal line closest to the second main surface of the laminated substrate in the thickness direction of the laminated substrate; and a third signal line located between the first signal line and the second signal line in the thickness direction of the laminated substrate, and at least one of a thickness of the first signal line and a thickness of the second signal line is greater than a thickness of the third signal line in the thickness direction of the laminated substrate.
2. The multilayer board according to claim 1, wherein the thickness of the first signal line and the thickness of the second signal line are both greater than the thickness of the third signal line.
3. The multilayer board according to claim 2, further comprising a ground electrode disposed on the second main surface of the laminated board and adjacent to the second signal line in the thickness direction of the laminated board, wherein the thickness of the second signal line is greater than the thickness of the first signal line.
4. The multilayer board according to claim 1 or 2, further comprising: an RF signal line formed on the laminated board and aligned with one of the multiple signal lines in the width direction of the one signal line; a first ground electrode formed on the laminated board and facing the RF signal line in the thickness direction of the laminated board via at least one of the multiple insulating layers; and a second ground electrode formed on the laminated board and facing the RF signal line in the thickness direction of the laminated board via an insulating layer different from the at least one insulating layer of the multiple insulating layers.
5. The multilayer board according to claim 4, wherein the one signal line is the second signal line, and the thickness of the RF signal line and the thickness of the second signal line are the same in the thickness direction of the multilayer board.
6. The multilayer board according to claim 2 or 3, further comprising a plurality of signal conductor lines formed on the laminated board, wherein among the plurality of signal conductor lines, the number of signal conductor lines aligned with the second signal line in a width direction of the second signal line is the largest.
7. The multilayer board according to claim 2 or 3, further comprising a plurality of signal conductor lines formed on the laminated board, the widest of the plurality of signal conductor lines being aligned with the second signal line in a width direction of the second signal line.
8. A multilayer board as claimed in any one of claims 1 to 7, further comprising a plurality of land electrodes formed on the first main surface of the laminated board, the first signal line being formed on the first main surface of the laminated board, and a thickness of the plurality of land electrodes being equal to or greater than the thickness of the first signal line.
9. The multilayer board according to claim 8, further comprising: a plurality of solder parts joined to the plurality of land electrodes in a one-to-one relationship; and an electronic component joined to the plurality of solder parts.
10. The multilayer board according to any one of claims 1 to 9, wherein the material of each of the plurality of insulating layers includes a thermoplastic resin.
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