Quantum encoding circuit for 5-qubit error correction code

Abstract

The present disclosure relates to a quantum circuit, and more particularly, to a quantum encoding circuit for a 5-qubit error correction code. The quantum encoding circuit for a 5-qubit error correction code, according to one embodiment of the present document, can be implemented as a circuit composed of rotation gate(s), CNOT gate(s) and CZ gate(s). The quantum encoding circuit for a 5-qubit error correction code, according to another embodiment of the present document, can be implemented as a circuit composed of rotation gates(s) and CZ gate(s), without CNOT gates.

Description

Quantum encoding circuit for 5-qubit error-correcting codes

[0001] The present disclosure relates to quantum circuits, and more particularly to quantum encoding circuits for 5-qubit error correction codes.

[0002] Quantum computing, unlike classical computing, is a technology that utilizes the principles of quantum mechanics to process information. Quantum computing has demonstrated quantum algorithms, such as Shor's algorithm, that are more efficient than classical computing. However, quantum computing is significantly affected by the microscopic environment, requiring methods to correct errors that occur.

[0003] Qubits (qubits) are the fundamental units of quantum computing. Unlike classical bits, they possess the property of superposition, which allows them to simultaneously assume states of 0 and 1. This allows a single qubit to represent multiple states. Entanglement occurs when two or more qubits are linked, causing the state of one qubit to influence the state of another. Entangled qubits can be considered interconnected.

[0004] While errors in classical computing occur as bit flips, quantum computing can present a variety of errors. For example, qubit bit-flip errors, phase-flip errors, or errors that combine both bit-flips and phase-flips can occur. It is known that at least five physical qubits are required to correct an error occurring in a single logical qubit. A 5-qubit error-correcting code encodes a single logical qubit into five physical qubits, enabling the detection and correction of single-qubit errors. This ensures the integrity of quantum information.

[0005] When performing quantum error correction encoding on a logical qubit with five physical qubits, a method to minimize computation is required. Furthermore, the types of supported computations may be limited depending on the hardware platform implementing quantum computing. When performing quantum error correction encoding in a limited computational environment, a method to minimize computation is required.

[0006] One object of the present disclosure is to provide a quantum encoding circuit that minimizes computation for performing fast and efficient quantum computing.

[0007] One object of the present disclosure is to provide a quantum encoding circuit that minimizes computation in an environment where the types of computation are limited depending on the hardware platform.

[0008] A quantum encoding circuit according to an embodiment of the present disclosure comprises a first layer including a first CNOT gate for performing a CNOT operation on a second physical qubit based on a first physical qubit, a first rotation gate for rotating a third physical qubit by π / 2 about the Y-axis, a second rotation gate for rotating a fourth physical qubit by π / 2 about the Y-axis, and a third rotation gate for rotating a fifth physical qubit by π / 2 about the X-axis, a second layer including a second CNOT gate for performing a CNOT operation on a first physical qubit based on the third physical qubit, and a third CNOT gate for performing a CNOT operation on a second physical qubit based on the fifth physical qubit, a third layer including a fourth rotation gate for rotating the first physical qubit by π / 2 about the Z-axis, and a fourth CNOT gate for performing a CNOT operation on a fifth physical qubit based on the fourth physical qubit, and a third layer including a fourth rotation gate for performing a CNOT operation on a first physical qubit based on the fourth physical qubit. It may include a fourth layer including a fifth CNOT gate and a first CZ gate performing a CZ operation between the third physical qubit and the fifth physical qubit.

[0009] A quantum encoding circuit according to an embodiment of the present disclosure comprises a first layer including a first rotation gate for rotating a first physical qubit by π / 2 about the Z-axis, a second rotation gate for rotating a second physical qubit by π / 2 about the Y-axis, a third rotation gate for rotating a third physical qubit by π / 2 about the Y-axis, a fourth rotation gate for rotating a fourth physical qubit by π / 2 about the Y-axis, and a fifth rotation gate for rotating a fifth physical qubit by π / 2 about the X-axis, a second layer including a first CZ gate for performing a CZ operation between the first physical qubit and the second physical qubit and a second CZ gate for performing a CZ operation between the third physical qubit and the fifth physical qubit, a third layer including a sixth rotation gate for rotating the first physical qubit by π / 2 about the Y-axis, a third CZ gate for performing a CZ operation between the first physical qubit and the fourth physical qubit, and a fourth CZ gate for performing a CZ operation between the second physical qubit and the fifth physical qubit. It may include a fourth layer including a fourth CZ gate performing a CZ operation, a fifth layer including a seventh rotation gate rotating the first physical qubit by π / 2 about the X-axis, and an eighth rotation gate rotating the fifth physical qubit by π / 2 about the Y-axis, and a sixth layer including a fifth CZ gate performing a CZ operation between the first physical qubit and the third physical qubit, and a sixth CZ gate performing a CZ operation between the fourth physical qubit and the fifth physical qubit.

[0010] A quantum encoding circuit according to an embodiment of the present disclosure comprises a first layer including a first rotation gate for rotating a first physical qubit by π / 2 about the Y-axis, a second rotation gate for rotating a second physical qubit by π / 2 about the Y-axis, a third rotation gate for rotating a third physical qubit by π / 2 about the Y-axis, a first CNOT gate for performing a CNOT operation on a fourth physical qubit based on a fifth physical qubit, a second layer including a first CZ gate for performing a CZ operation between the first physical qubit and the second physical qubit, and a second CNOT gate for performing a CNOT operation on the fourth physical qubit based on the third physical qubit, a third layer including a second CZ gate for performing a CZ operation between the third physical qubit and the fifth physical qubit, and a third CZ gate for performing a CZ operation between the second physical qubit and the fourth physical qubit, a third CNOT gate for performing a CNOT operation on the fifth physical qubit based on the second physical qubit, and It may include a fourth layer including a fourth CNOT gate that performs a CNOT operation on a third physical qubit based on the first physical qubit, and a fifth layer including a fifth CNOT gate that performs a CNOT operation on a fifth physical qubit based on the first physical qubit.

[0011] A quantum encoding circuit according to an embodiment of the present disclosure comprises a first layer including a first rotation gate for rotating a first physical qubit by π / 2 about the Y-axis, a second rotation gate for rotating a second physical qubit by π / 2 about the Y-axis, a third rotation gate for rotating a third physical qubit by π / 2 about the Y-axis, and a fourth rotation gate for rotating a fourth physical qubit by π / 2 about the Y-axis, a second layer including a first CZ gate for performing a CZ operation between the first physical qubit and the second physical qubit, and a second CZ gate for performing a CZ operation between the fourth physical qubit and the fifth physical qubit, a third layer including a third CZ gate for performing a CZ operation between the third physical qubit and the fifth physical qubit, a fourth layer including a fourth CZ gate for performing a CZ operation between the third physical qubit and the fourth physical qubit, and a fifth rotation gate for rotating the fifth physical qubit by -π / 2 about the Y-axis, and a third physical A fifth layer including a sixth rotation gate that rotates a qubit by π / 2 about the Y-axis, a seventh rotation gate that rotates a fourth physical qubit by -π / 2 about the Y-axis, and a fifth CZ gate that performs a CZ operation between the first physical qubit and the fifth physical qubit, a sixth layer including a sixth CZ gate that performs a CZ operation between the first physical qubit and the third physical qubit, an eighth rotation gate that rotates the fourth physical qubit by π about the X-axis, and a seventh CZ gate that performs a CZ operation between the second physical qubit and the fifth physical qubit, and a seventh layer including an eighth CZ gate that performs a CZ operation between the second physical qubit and the fourth physical qubit, a ninth rotation gate that rotates the third physical qubit by π / 2 about the Y-axis, and a tenth rotation gate that rotates the fifth physical qubit by π / 2 about the Y-axis.

[0012] A quantum encoding circuit according to an embodiment of the present disclosure can provide fast and efficient quantum computing through 5-qubit quantum error correction encoding with minimum circuit depth.

[0013] A quantum encoding circuit according to an embodiment of the present disclosure can provide 5-qubit quantum error correction encoding that minimizes operations in an environment where the types of operations directly supported by a hardware platform are limited.

[0014] FIG. 1 is a block diagram illustrating a quantum error correction circuit according to an embodiment of the present disclosure.

[0015] FIG. 2 is a quantum circuit diagram showing an example of a quantum encoding circuit according to an embodiment of the present disclosure.

[0016] FIG. 3 is a quantum circuit diagram showing another example of a quantum encoding circuit according to an embodiment of the present disclosure.

[0017] FIG. 4 is a quantum circuit diagram showing another example of a quantum encoding circuit according to an embodiment of the present disclosure.

[0018] FIG. 5 is a quantum circuit diagram showing another example of a quantum encoding circuit according to an embodiment of the present disclosure.

[0019] Below, embodiments of the present disclosure will be described clearly and in detail to such an extent that a person having ordinary skill in the art of the present disclosure can easily practice the present disclosure.

[0020] FIG. 1 is a block diagram illustrating a quantum error correction circuit according to an embodiment of the present disclosure.

[0021] Referring to FIG. 1, a quantum error correction circuit (100) may include a quantum encoding circuit (110), a syndrome measurement circuit (120), and a quantum decoding circuit (130).

[0022] An input qubit (IQ) and auxiliary qubits (AQ) are input to a quantum encoding circuit (110), and encoded qubits (EQ) are output. The input qubit (IQ) may correspond to a logical qubit. The auxiliary qubits (AQ) are used by the quantum encoding circuit (110) to distribute the information of the input qubit (IQ). The encoded qubits (EQ), which are the output of the quantum encoding circuit (110), are five physical qubits.

[0023] The quantum encoding circuit (110) can form a superposed state in which physical qubits are entangled through quantum operations. That is, information of a logical qubit is distributed across five physical qubits. The quantum encoding circuit (110) can perform single-qubit operations or multi-qubit operations on the physical qubits. For example, the quantum encoding circuit (110) can perform a rotation operation on the physical qubits to create a superposed state. The quantum encoding circuit (110) can perform a multi-qubit operation (e.g., a CNOT operation) to create an entangled state between the physical qubits.

[0024] The rotation operation performed by the quantum encoding circuit (110) can be represented by a rotation gate. A rotation gate is a gate that rotates the state of a qubit around a specific axis on a Bloch sphere. The RX gate is one of the rotation gates and can rotate a qubit by an angle θ around the X-axis. The RX gate can be expressed as a matrix of mathematical expression 1.

[0025]

[0026] The RY gate is one of the rotation gates that can rotate a qubit by an angle θ around the Y-axis. The RY gate can be expressed as a matrix in mathematical expression 2.

[0027]

[0028] The RZ gate is one of the rotation gates that can rotate a qubit by an angle θ around the Z-axis. The RZ gate can be expressed as a matrix in mathematical equation 3.

[0029]

[0030] Among the multi-qubit operations performed by the quantum encoding circuit (110), the CNOT operation can be expressed as a CNOT gate. The CNOT gate performs a CNOT operation on a target qubit based on a control qubit. The CNOT gate can maintain the target qubit when the control qubit is |0>, and invert the target qubit when the control qubit is |1>. The CNOT gate can be expressed as a matrix of mathematical expression 4.

[0031]

[0032] Among the multi-qubit operations performed by the quantum encoding circuit (110), the CZ operation can be expressed as a CZ gate. The CZ gate performs a Z operation on the target qubit based on the control qubit. The Z operation is an operation that rotates the qubit around the Z-axis by an angle θ of 180° (i.e., π), and is also referred to as Pauli-Z. The CZ gate inverts the phase when both the control qubit and the target qubit are |1>. The CZ gate can be expressed as a matrix of mathematical expression 5. The CZ gate can produce the same result even if the order of the control qubit and the target qubit is changed.

[0033]

[0034] The quantum encoding circuit (110) can perform various qubit operations in addition to the rotation gates or control gates described above.

[0035] The syndrome measurement circuit (120) measures the syndrome of the encoded qubits (EQ) output from the quantum encoding circuit (110). The syndrome measurement circuit (120) may use syndrome auxiliary qubits (SAQ) to measure the syndrome of the encoded qubits (EQ). In a 5-qubit quantum error correction code scheme, there may be 4 syndrome auxiliary qubits (SAQ).

[0036] The syndrome measurement circuit (120) can form a correlation between the encoded qubits (EQ) and the syndrome auxiliary qubits (SAQ) using a plurality of CNOT gates. The syndrome measurement circuit (120) can classically measure the syndrome auxiliary qubits (SAQ) to obtain a syndrome measurement result (SDR). The syndrome measurement result (SDR) can include information that specifies the location or type of error that occurred. For example, the syndrome measurement result (SDR) can include information about whether the encoded qubits (EQ) correspond to a bit-flip error, a phase-flip error, or a combination of these errors, and the location of the error. The method of interpreting the syndromes included in the syndrome measurement result (SDR) can be determined according to the encoding method of the quantum encoding circuit (110).

[0037] The syndrome measurement circuit (120) can provide encoded qubits (EQ) and syndrome measurement results (SDR) to the quantum decoding circuit (130).

[0038] The quantum decoding circuit (130) can perform a correction operation on a specific qubit among the encoded qubits (EQ) based on the error type and error location included in the syndrome measurement result (SDR). For example, if a bit flip error occurs in a physical qubit at a specific location, the correction can be performed by performing an X operation. If a phase flip error occurs in a physical qubit at a specific location, the correction can be performed by performing a Z operation. If a coupling error occurs in a physical qubit at a specific location, the correction can be performed by performing a Y operation.

[0039] The quantum decoding circuit (130) can combine information distributed across five physical qubits into one logical qubit after error correction. In other words, it can perform the reverse process of the encoding performed by the quantum encoding circuit (110). The quantum decoding circuit (130) can output decoded qubits (DQ). The decoded qubits (DQ) can include a logical qubit corresponding to one input qubit and the remaining auxiliary qubits.

[0040] Meanwhile, when a quantum encoding circuit (110) performs encoding, it is required to have a minimum circuit depth in order to perform operations quickly and efficiently. Below, a quantum encoding circuit having a minimum circuit depth is described.

[0041] FIG. 2 is a quantum circuit diagram showing an example of a quantum encoding circuit according to an embodiment of the present disclosure.

[0042] Referring to FIG. 2, a quantum encoding circuit (110a) can perform encoding operations on five physical qubits (Q1, Q2, ..., Q5).

[0043] The first physical qubit (Q1) corresponds to the input qubit (IQ) of the quantum encoding circuit (110a). The second to fifth physical qubits (Q2-Q5) correspond to auxiliary qubits. The input qubit |Ψ> can be expressed as α|0>+β|1>. The auxiliary qubits can be initialized to |0>. The quantum encoding circuit (110a) can distribute the information of the first physical qubit (Q1) using the second to fifth physical qubits (Q2-Q5). As a result of applying the quantum encoding circuit (110) to the first to fifth physical qubits (Q1-Q5) consisting of five qubits, a logical qubit corresponding to one qubit can be obtained.

[0044] The quantum encoding circuit (110a) may include first to fourth layers (L1, L2, L3, L4). Each of the first to fourth layers (L1-L4) corresponds to a circuit depth. The quantum encoding circuit (110a) may have a circuit depth of 4. Each circuit depth represents the number of computational steps in the quantum circuit. If the gates used in the quantum operation can be applied independently, they may correspond to one circuit depth (i.e., layer). In dependent cases, such as when the computational result of a certain gate is used as an input for the computation of another gate, they may correspond to different circuit depths.

[0045] The first layer (L1) of the quantum encoding circuit (110a) may include a first CNOT gate (201), a first rotation gate (211), a second rotation gate (212), and a third rotation gate (213).

[0046] The first CNOT gate (201) can perform a CNOT operation on the second physical qubit (Q2) based on the first physical qubit (Q1). That is, the first CNOT gate (201) can perform a CNOT operation using the first physical qubit (Q1) as a control qubit and the second physical qubit (Q2) as a target qubit.

[0047] The first rotation gate (211) may be an RY gate that rotates the third physical qubit (Q3) by π / 2 around the Y-axis. The second rotation gate (212) may be an RY gate that rotates the fourth physical qubit (Q4) by π / 2 around the Y-axis. The third rotation gate (213) may be an RX gate that rotates the fifth physical qubit (Q5) by π / 2 around the X-axis.

[0048] The second layer (L2) of the quantum encoding circuit (110a) may include a second CNOT gate (202) and a third CNOT gate (203).

[0049] The second CNOT gate (202) can perform a CNOT operation on the first physical qubit (Q1) based on the third physical qubit (Q3). The third CNOT gate (203) can perform a CNOT operation on the second physical qubit (Q2) based on the fifth physical qubit (Q5).

[0050] The third layer (L3) of the quantum encoding circuit (110a) may include a fourth rotation gate (214) and a fourth CNOT gate (204).

[0051] The fourth rotation gate (214) may be an RZ gate that rotates the first physical qubit (Q1) by π / 2 around the Z-axis. The fourth CNOT gate (204) may perform a CNOT operation on the fifth physical qubit (Q5) based on the fourth physical qubit (Q4).

[0052] The fourth layer (L4) of the quantum encoding circuit (110a) may include a fifth CNOT gate (205) and a first CZ gate (221).

[0053] The fifth CNOT gate (205) can perform a CNOT operation on the first physical qubit (Q1) based on the fourth physical qubit (Q4). The first CZ gate (221) can perform a CZ operation between the third physical qubit (Q3) and the fifth physical qubit (Q5). That is, the first CZ gate (221) can perform a CZ operation using the third physical qubit (Q3) and the fifth physical qubit (Q5) as a control qubit and a target qubit, respectively.

[0054] The quantum encoding circuit (110a) can distribute information of a physical qubit (Q1) corresponding to an input qubit (IQ) to five qubits through the first to fourth layers (L1-L4). Even if a bit flip error, a phase flip error, or a combination thereof occurs in any one of the first to fifth physical qubits (Q1-Q5), a syndrome measurement result (SDR) including information about the type and location of the error can be generated through the syndrome measurement circuit (120), and the quantum decoding circuit (130) can correct the error that occurred in the first to fifth physical qubits (Q1-Q5) and decode it into a logical qubit based on the syndrome measurement result (SDR). The logical qubit can be restored to α|0>+β|1>, which is the input qubit (IQ), by decoding of the quantum decoding circuit (130).

[0055] The quantum encoding circuit (110a) can perform 5-qubit error correction encoding through the first to fourth layers (L1-L4) corresponding to each of the four circuit depths. The quantum encoding circuit (110a) can perform fast and efficient encoding by minimizing the circuit depth.

[0056] Meanwhile, the hardware platform implementing the quantum encoding circuit (110a) may not directly support the CNOT gate. That is, if the hardware platform does not directly support the CNOT operation and only supports the CZ operation, the CNOT gate may be implemented with a CZ gate, an RX(π / 2) rotation gate, and an RY(π / 2) rotation gate. However, if the CNOT gate is implemented through a combination of the CZ gate, the RX(π / 2) rotation gate, and the RY(π / 2) rotation gate, the circuit depth may increase. Therefore, a circuit composed of a CZ gate and rotation gates is required.

[0057] FIG. 3 is a quantum circuit diagram showing another example of a quantum encoding circuit according to an embodiment of the present disclosure.

[0058] Referring to FIG. 3, the quantum encoding circuit (110b) can perform encoding operations on five physical qubits (Q1-Q5).

[0059] The first physical qubit (Q1) corresponds to the input qubit (IQ) of the quantum encoding circuit (110b). The second to fifth physical qubits (Q2-Q5) correspond to auxiliary qubits. The input qubit |Ψ> can be expressed as α|0>+β|1>. The auxiliary qubits can be initialized to |0>. The quantum encoding circuit (110b) can distribute the information of the first physical qubit (Q1) using the second to fifth physical qubits (Q2-Q5).

[0060] The quantum encoding circuit (110b) can be implemented with rotation gates and CZ gates without a CNOT gate.

[0061] The quantum encoding circuit (110b) may include first to sixth layers (L1, L2, L3, …, L6).

[0062] The first layer (L1) of the quantum encoding circuit (110b) may include first to fifth rotation gates (311, 312, ..., 315).

[0063] The first rotation gate (311) may be an RZ gate that rotates the first physical qubit (Q1) by π / 2 about the Z-axis. The second rotation gate (312) may be an RY gate that rotates the second physical qubit (Q2) by π / 2 about the Y-axis. The third rotation gate (313) may be an RY gate that rotates the third physical qubit (Q3) by π / 2 about the Y-axis. The fourth rotation gate (314) may be an RY gate that rotates the fourth physical qubit (Q4) by π / 2 about the Y-axis. The fifth rotation gate (315) may be an RX gate that rotates the fifth physical qubit (Q5) by π / 2 about the X-axis.

[0064] The second layer (L2) of the quantum encoding circuit (110b) may include a first CZ gate (321) and a second CZ gate (322).

[0065] The first CZ gate (321) can perform a CZ operation between the first physical qubit (Q1) and the second physical qubit (Q2). The second CZ gate (322) can perform a CZ operation between the third physical qubit (Q3) and the fifth physical qubit (Q5).

[0066] The third layer (L3) of the quantum encoding circuit (110b) may include a sixth rotation gate (316).

[0067] The sixth rotation gate (316) may be an RY gate that rotates the first physical qubit (Q1) by π / 2 around the Y axis.

[0068] The fourth layer (L4) of the quantum encoding circuit (110b) may include a third CZ gate (323) and a fourth CZ gate (324).

[0069] The third CZ gate (323) can perform a CZ operation between the first physical qubit (Q1) and the fourth physical qubit (Q4). The fourth CZ gate (324) can perform a CZ operation between the second physical qubit (Q2) and the fifth physical qubit (Q5).

[0070] The fifth layer (L5) of the quantum encoding circuit (110b) can perform the seventh rotation gate (317) and the eighth rotation gate (318).

[0071] The seventh rotation gate (317) may be an RX gate that rotates the first physical qubit (Q1) by π / 2 around the X-axis. The eighth rotation gate (318) may be an RY gate that rotates the fifth physical qubit (Q5) by π / 2 around the Y-axis.

[0072] The sixth layer (L6) of the quantum encoding circuit (110b) may include a fifth CZ gate (325) and a sixth CZ gate (326).

[0073] The fifth CZ gate (325) can perform a CZ operation between the first physical qubit (Q1) and the third physical qubit (Q3). The sixth CZ gate (326) can perform a CZ operation between the fourth physical qubit (Q4) and the fifth physical qubit (Q5).

[0074] The quantum encoding circuit (110b) can distribute information of a physical qubit (Q1) corresponding to an input qubit (IQ) into five qubits through the first to sixth layers (L1-L6).

[0075] Fig. 4 is a quantum circuit diagram illustrating another example of a quantum encoding circuit according to an embodiment of the present disclosure. The embodiment of Fig. 4 relates to a quantum encoding circuit that uses all of a rotation gate, a CZ gate, and a CNOT gate, like the embodiment of Fig. 2, but has a circuit depth of 5 and can perform 5-qubit error correction encoding through the first to fifth layers (L1-L5).

[0076] Referring to FIG. 4, the quantum encoding circuit (110c) can perform encoding operations on five physical qubits (Q1-Q5).

[0077] The first to fourth physical qubits (Q1-Q4) correspond to auxiliary qubits. The fifth physical qubit (Q5) corresponds to the input qubit (IQ) of the quantum encoding circuit (110c). The input qubit |Ψ> can be expressed as α|0>+β|1>. The auxiliary qubits can be initialized to |0>. The quantum encoding circuit (110c) can distribute the information of the fifth physical qubit (Q5) using the first to fourth physical qubits (Q1-Q4).

[0078] The first layer (L1) of the quantum encoding circuit (110b) may include a first rotation gate (411), a second rotation gate (412), a third rotation gate (413), and a first CNOT gate (401).

[0079] The first rotation gate (411) may be an RY gate that rotates the first physical qubit (Q1) by π / 2 around the Y-axis. The second rotation gate (412) may be an RY gate that rotates the second physical qubit (Q2) by π / 2 around the Y-axis. The third rotation gate (413) may be an RY gate that rotates the third physical qubit (Q3) by π / 2 around the Y-axis. The first CNOT gate (401) may perform a CNOT operation on the fourth physical qubit (Q4) based on the fifth physical qubit (Q5).

[0080] The second layer (L2) of the quantum encoding circuit (110b) may include a first CZ gate (421) and a second CNOT gate (402).

[0081] The first CZ gate (421) can perform a CZ operation between the first physical qubit (Q1) and the second physical qubit (Q2). The second CNOT gate (402) can perform a CNOT operation on the fourth physical qubit (Q4) based on the third physical qubit (Q3).

[0082] The third layer (L3) of the quantum encoding circuit (110a) may include a second CZ gate (422) and a third CZ gate (423).

[0083] The second CZ gate (422) can perform a CZ operation between the third physical qubit (Q3) and the fifth physical qubit (Q5). The third CZ gate (423) can perform a CZ operation between the second physical qubit (Q2) and the fourth physical qubit (Q4).

[0084] The fourth layer (L4) of the quantum encoding circuit (110a) may include a third CNOT gate (403) and a fourth CNOT gate (404).

[0085] The third CNOT gate (403) can perform a CNOT operation on the fifth physical qubit (Q5) based on the second physical qubit (Q2). The fourth CNOT gate (404) can perform a CNOT operation on the third physical qubit (Q3) based on the first physical qubit (Q1).

[0086] The fifth layer (L5) of the quantum encoding circuit (110a) may include a fifth CNOT gate (405).

[0087] The fifth CNOT gate (405) can perform a CNOT operation on the fifth physical qubit (Q5) based on the first physical qubit (Q1).

[0088] The quantum encoding circuit (110c) can distribute information of a physical qubit (Q1) corresponding to an input qubit (IQ) into five qubits through the first to fifth layers (L1-L5).

[0089] Fig. 5 is a quantum circuit diagram illustrating another example of a quantum encoding circuit according to an embodiment of the present disclosure. The embodiment of Fig. 5 relates to a quantum encoding circuit that uses only rotation gates and CZ gates without CNOT gates, like the embodiment of Fig. 3, but has a circuit depth of 7 and can perform 5-qubit error correction encoding through the first to seventh layers (L1-L7).

[0090] Referring to FIG. 5, the quantum encoding circuit (110d) can perform encoding operations on five physical qubits (Q1-Q5).

[0091] The first to fourth physical qubits (Q1-Q4) correspond to auxiliary qubits. The fifth physical qubit (Q5) corresponds to the input qubit (IQ) of the quantum encoding circuit (110d). The input qubit |Ψ> can be expressed as α|0>+β|1>. The auxiliary qubits can be initialized to |0>. The quantum encoding circuit (110d) can distribute the information of the fifth physical qubit (Q5) using the first to fourth physical qubits (Q1-Q4).

[0092] The quantum encoding circuit (110d) can be implemented with rotation gates and CZ gates without a CNOT gate.

[0093] The quantum encoding circuit (110d) may include first to seventh layers (L1, L2, L3, …, L7).

[0094] The first layer (L1) of the quantum encoding circuit (110d) may include first to fourth rotation gates (511, 512, 513, 514).

[0095] The first rotation gate (511) may be an RY gate that rotates the first physical qubit (Q1) by π / 2 about the Y-axis. The second rotation gate (512) may be an RY gate that rotates the second physical qubit (Q2) by π / 2 about the Y-axis. The third rotation gate (513) may be an RY gate that rotates the third physical qubit (Q3) by π / 2 about the Y-axis. The fourth rotation gate (514) may be an RY gate that rotates the fourth physical qubit (Q4) by π / 2 about the Y-axis.

[0096] The second layer (L2) of the quantum encoding circuit (110d) may include a first CZ gate (521) and a second CZ gate (522).

[0097] The first CZ gate (521) can perform a CZ operation between the first physical qubit (Q1) and the second physical qubit (Q2). The second CZ gate (522) can perform a CZ operation between the fourth physical qubit (Q4) and the fifth physical qubit (Q5).

[0098] The third layer (L3) of the quantum encoding circuit (110d) may include a third CZ gate (523). The third CZ gate (523) may perform a CZ operation between the third physical qubit (Q3) and the fifth physical qubit (Q5).

[0099] The fourth layer (L4) of the quantum encoding circuit (110d) may include a fourth CZ gate (524) and a fifth rotation gate (515).

[0100] The fourth CZ gate (524) can perform a CZ operation between the third physical qubit (Q3) and the fourth physical qubit (Q4). The fifth rotation gate (515) can be an RY gate that rotates the fifth physical qubit (Q5) by -π / 2 around the Y-axis.

[0101] The fifth layer (L5) of the quantum encoding circuit (110d) can perform the sixth rotation gate (516), the seventh rotation gate (517), and the fifth CZ gate (525).

[0102] The sixth rotation gate (516) may be an RY gate that rotates the third physical qubit (Q3) by π / 2 around the Y-axis. The seventh rotation gate (517) may be an RY gate that rotates the fourth physical qubit (Q4) by -π / 2 around the Y-axis. The fifth CZ gate (525) may perform a CZ operation between the first physical qubit (Q1) and the fifth physical qubit (Q5).

[0103] The sixth layer (L6) of the quantum encoding circuit (110d) may include a sixth CZ gate (526), ​​an eighth rotation gate (518), and a seventh CZ gate (527).

[0104] The sixth CZ gate (526) can perform a CZ operation between the first physical qubit (Q1) and the third physical qubit (Q3). The eighth rotation gate (518) can be an RX gate that rotates the fourth physical qubit (Q4) by π around the X-axis. The seventh CZ gate (527) can perform a CZ operation between the second physical qubit (Q2) and the fifth physical qubit (Q5).

[0105] The seventh layer (L7) of the quantum encoding circuit (110d) may include an eighth CZ gate (528), a ninth rotation gate (519), and a tenth rotation gate (510).

[0106] The eighth CZ gate (528) can perform a CZ operation between the second physical qubit (Q2) and the fourth physical qubit (Q4). The ninth rotation gate (519) can be an RY gate that rotates the third physical qubit (Q3) by π / 2 around the Y-axis. The tenth rotation gate (520) can be an RY gate that rotates the fifth physical qubit (Q5) by π / 2 around the Y-axis.

[0107] The quantum encoding circuit (110d) can distribute information of a physical qubit (Q5) corresponding to an input qubit (IQ) into five qubits through the first to seventh layers (L1-L7).

[0108] The quantum encoding circuit (110b) and quantum encoding circuit (110d) can be implemented using rotation gates and CZ gates without the CNOT gate representation. This allows for the implementation of a 5-qubit quantum error correction encoding with minimal circuit depth using only rotation gates and CZ gates, even when the hardware platform does not directly support CNOT gates.

[0109] According to the embodiments described above, a quantum encoding circuit can have a minimal circuit depth. This enables fast and efficient quantum computing. Furthermore, even when the types of operations directly provided by a hardware platform are limited, a quantum encoding circuit with minimal circuit depth can be provided by utilizing the limited types of operations.

[0110] A quantum computer implementing a quantum circuit may be comprised of multiple components performing various functions. For example, a quantum computer implementing the aforementioned quantum circuit may include a central processing unit (CPU) for processing quantum information, memory for storing quantum information, and a bus for transferring information between the CPU and memory.

[0111] A CPU can function as a central processing unit of a quantum computer. The CPU can operate by utilizing the computational space of memory, and a quantum circuit can perform a controlled-rotation gate operation using a control qubit, a target qubit, and an auxiliary qubit under the control of the CPU. The quantum circuit can generate a control qubit, a target qubit, and an auxiliary qubit under the control of the CPU, and perform an operation according to a gate operation on the target qubit based on the state of the control qubit. By utilizing a quantum circuit according to an embodiment of the present invention, the processing speed of quantum information will be improved, and the resources for processing quantum information will be reduced.

[0112] The above-described embodiments are specific examples for implementing the present disclosure. The present disclosure will encompass not only the embodiments described above, but also embodiments that can be easily modified or modified. Furthermore, the present disclosure will also encompass techniques that can be easily modified and implemented using the embodiments. Therefore, the scope of the present disclosure should not be limited to the above-described embodiments, but should be defined not only by the claims set forth below, but also by equivalents of the claims of the present disclosure.

Claims

1. A first layer including a first CNOT gate for performing a CNOT operation on a second physical qubit based on a first physical qubit, a first rotation gate for rotating a third physical qubit by π / 2 around the Y-axis, a second rotation gate for rotating a fourth physical qubit by π / 2 around the Y-axis, and a third rotation gate for rotating a fifth physical qubit by π / 2 around the X-axis; A second layer including a second CNOT gate performing a CNOT operation on the first physical qubit based on the third physical qubit, and a third CNOT gate performing a CNOT operation on the second physical qubit based on the fifth physical qubit; A third layer including a fourth rotation gate that rotates the first physical qubit by π / 2 around the Z-axis, and a fourth CNOT gate that performs a CNOT operation on a fifth physical qubit based on the fourth physical qubit; and A quantum encoding circuit comprising a fourth layer including a fifth CNOT gate performing a CNOT operation on the first physical qubit based on the fourth physical qubit and a first CZ gate performing a CZ operation between the third physical qubit and the fifth physical qubit.

2. In paragraph 1, A quantum encoding circuit wherein the first physical qubit corresponds to an input qubit, and the second to fifth physical qubits correspond to auxiliary qubits.

3. In paragraph 2, A quantum encoding circuit in which the above auxiliary qubits are initialized to the |0> state.

4. A first layer including a first rotation gate that rotates a first physical qubit by π / 2 about the Z-axis, a second rotation gate that rotates a second physical qubit by π / 2 about the Y-axis, a third rotation gate that rotates a third physical qubit by π / 2 about the Y-axis, a fourth rotation gate that rotates a fourth physical qubit by π / 2 about the Y-axis, and a fifth rotation gate that rotates a fifth physical qubit by π / 2 about the X-axis; A second layer including a first CZ gate performing a CZ operation between the first physical qubit and the second physical qubit and a second CZ gate performing a CZ operation between the third physical qubit and the fifth physical qubit; A third layer including a sixth rotation gate that rotates the first physical qubit by π / 2 around the Y-axis; A fourth layer including a third CZ gate performing a CZ operation between the first physical qubit and the fourth physical qubit, and a fourth CZ gate performing a CZ operation between the second physical qubit and the fifth physical qubit; A fifth layer including a seventh rotation gate that rotates the first physical qubit by π / 2 about the X-axis, and an eighth rotation gate that rotates the fifth physical qubit by π / 2 about the Y-axis; and A quantum encoding circuit comprising a sixth layer, wherein the sixth layer comprises a fifth CZ gate performing a CZ operation between the first physical qubit and the third physical qubit, and a sixth CZ gate performing a CZ operation between the fourth physical qubit and the fifth physical qubit.

5. In paragraph 4, A quantum encoding circuit wherein the first physical qubit corresponds to an input qubit, and the second to fifth physical qubits correspond to auxiliary qubits.

6. In paragraph 5, A quantum encoding circuit in which the above auxiliary qubits are initialized to the |0> state.

7. A first layer including a first rotation gate that rotates a first physical qubit by π / 2 about the Y-axis, a second rotation gate that rotates a second physical qubit by π / 2 about the Y-axis, a third rotation gate that rotates a third physical qubit by π / 2 about the Y-axis, and a first CNOT gate that performs a CNOT operation on a fourth physical qubit based on a fifth physical qubit; A second layer including a first CZ gate performing a CZ operation between the first physical qubit and the second physical qubit, and a second CNOT gate performing a CNOT operation on the fourth physical qubit based on the third physical qubit; A third layer including a second CZ gate performing a CZ operation between the third physical qubit and the fifth physical qubit, and a third CZ gate performing a CZ operation between the second physical qubit and the fourth physical qubit; A fourth layer including a third CNOT gate performing a CNOT operation on the fifth physical qubit based on the second physical qubit, and a fourth CNOT gate performing a CNOT operation on the third physical qubit based on the first physical qubit; and A quantum encoding circuit comprising a fifth layer including a fifth CNOT gate performing a CNOT operation on the fifth physical qubit based on the first physical qubit.

8. In paragraph 7, A quantum encoding circuit wherein the first to fourth physical qubits correspond to auxiliary qubits, and the fifth physical qubit corresponds to an input qubit.

9. In paragraph 8, A quantum encoding circuit in which the above auxiliary qubits are initialized to the |0> state.

10. A first layer including a first rotation gate that rotates a first physical qubit by π / 2 about the Y-axis, a second rotation gate that rotates a second physical qubit by π / 2 about the Y-axis, a third rotation gate that rotates a third physical qubit by π / 2 about the Y-axis, and a fourth rotation gate that rotates a fourth physical qubit by π / 2 about the Y-axis; A second layer including a first CZ gate performing a CZ operation between the first physical qubit and the second physical qubit, and a second CZ gate performing a CZ operation between the fourth physical qubit and the fifth physical qubit; A third layer comprising a third CZ gate performing a CZ operation between the third physical qubit and the fifth physical qubit; A fourth layer including a fourth CZ gate for performing a CZ operation between the third physical qubit and the fourth physical qubit, and a fifth rotation gate for rotating the fifth physical qubit by -π / 2 around the Y-axis; A fifth layer including a sixth rotation gate that rotates the third physical qubit by π / 2 around the Y-axis, a seventh rotation gate that rotates the fourth physical qubit by -π / 2 around the Y-axis, and a fifth CZ gate that performs a CZ operation between the first physical qubit and the fifth physical qubit; A sixth layer including a sixth CZ gate that performs a CZ operation between the first physical qubit and the third physical qubit, an eighth rotation gate that rotates the fourth physical qubit by π around the X-axis, and a seventh CZ gate that performs a CZ operation between the second physical qubit and the fifth physical qubit; and A quantum encoding circuit comprising a seventh layer including an eighth CZ gate performing a CZ operation between the second physical qubit and the fourth physical qubit, a ninth rotation gate rotating the third physical qubit by π / 2 around the Y-axis, and a tenth rotation gate rotating the fifth physical qubit by π / 2 around the Y-axis.

11. In paragraph 10, A quantum encoding circuit wherein the first to fourth physical qubits correspond to auxiliary qubits, and the fifth physical qubit corresponds to an input qubit.

12. In paragraph 11, A quantum encoding circuit in which the above auxiliary qubits are initialized to the |0> state.

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