SPAD image sensor and electronic device

Abstract

The present application belongs to the technical field of communications. Disclosed are a SPAD image sensor and an electronic device. The SPAD image sensor in the embodiments of the present application comprises a row control module, a column control module, a sensitivity control module and photosensitive pixel circuits, wherein the sensitivity control module has a first end for outputting a first control signal, the first end of the sensitivity control module is connected to the photosensitive pixel circuits, and the first control signal is used for controlling the light sensitivity of the photosensitive pixel circuits; and the sensitivity control module further has a second end for receiving a second control signal, and the second control signal is used for adjusting the first control signal.

Description

SPAD image sensors and electronics

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to Chinese patent application No. 202311760254.9 filed on December 20, 2023, the entire contents of which are incorporated herein by reference. Technical Field

[0003] The present application belongs to the field of image technology, and specifically relates to a SPAD image sensor and an electronic device. Background Art

[0004] Compared to the pinned photodiode (PPD) in conventional complementary metal-oxide semiconductor (CMOS) SPAD image sensors (CIS), single-photon avalanche diodes (SPADs) have extremely high sensitivity. Each photon that strikes the SPAD generates a corresponding electrical signal, which is rectified into a square wave pulse signal, which is then counted by a counter and output as a pixel signal. In recent years, researchers have begun exploring the use of SPADs as pixel sensors in CISs, replacing PPDs in conventional visible light RGB cameras. This approach leverages the SPAD's ultra-high single-photon sensitivity and enables imaging capabilities that surpass the human eye in polar night scenes.

[0005] However, due to different shooting scenes, SPAD image sensors have different sensitivity requirements for SPAD photosensitive pixel circuits. Therefore, how to effectively adjust the sensitivity of SPAD photosensitive pixel circuits has become an urgent problem to be solved. Summary of the Invention

[0006] The purpose of the embodiments of the present application is to provide a SPAD image sensor and an electronic device that can solve the problem that the SPAD image sensor cannot be used for all visible light shooting scenes.

[0007] In a first aspect, an embodiment of the present application provides a SPAD image sensor, comprising a row control module, a column control module, a sensitivity control module, and a photosensitive pixel circuit;

[0008] The sensitivity control module has a first end for outputting a first control signal, the first end of the sensitivity control module is connected to the photosensitive pixel circuit, and the first control signal is used to control the light sensitivity of the photosensitive pixel circuit;

[0009] The sensitivity control module further has a second terminal for receiving a second control signal, and the second control signal is used to adjust the first control signal.

[0010] In a second aspect, an embodiment of the present application provides an electronic device comprising the SPAD image sensor as described above.

[0011] In an embodiment of the present application, the SPAD image sensor includes a row control module, a column control module, a sensitivity control module and a photosensitive pixel circuit, wherein, when the second end of the sensitivity control module is connected to a second control signal for adjusting the first control signal, the first end of the sensitivity control module can output a corresponding first control signal to control the light sensitivity of the photosensitive pixel circuit. Since the first control signal can be adjusted in time by the second control signal, the light sensitivity of the photosensitive pixel circuit can be more effectively adjusted under different lighting environments, thereby improving accuracy. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] FIG1 is a schematic structural diagram of an electronic device;

[0013] FIG2 is a schematic structural diagram of a SPAD image sensor according to an embodiment of the present application;

[0014] FIG3 is a schematic diagram of the structure of a sensitivity control module according to an embodiment of the present application;

[0015] FIG4 is a schematic diagram of a digital-to-analog conversion circuit in an embodiment of the present application;

[0016] FIG5 is a second structural diagram of the sensitivity control module according to an embodiment of the present application;

[0017] FIG6 is a schematic diagram of a phase-locked loop circuit in an embodiment of the present application;

[0018] FIG7 is a schematic diagram of a decoding circuit in an embodiment of the present application;

[0019] FIG8 is a schematic diagram of a photosensitive pixel circuit according to an embodiment of the present application;

[0020] FIG9 is a second schematic diagram of a photosensitive pixel circuit according to an embodiment of the present application;

[0021] FIG10 is a diagram showing the working principle of the photosensitive pixel circuit shown in FIG9 . DETAILED DESCRIPTION

[0022] The following will be combined with the accompanying drawings in the embodiments of the present application to clearly describe the technical solutions in the embodiments of the present application. Obviously, the embodiments described are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field are within the scope of protection of this application.

[0023] The terms "first," "second," and the like in the specification and claims of this application are used to distinguish similar objects, and are not used to describe a specific order or precedence. It should be understood that the terms used in this manner are interchangeable where appropriate, so that the embodiments of this application can be implemented in an order other than that illustrated or described herein, and that the objects distinguished by "first," "second," and the like are generally of the same type, and do not limit the number of objects; for example, the first object can be one or more. In addition, the term "and / or" in the specification and claims represents at least one of the connected objects, and the character " / " generally indicates that the objects associated with each other are in an "or" relationship.

[0024] For ease of understanding, some of the contents involved in the embodiments of this application are described below:

[0025] Among different types of CIS, SPAD is mainly used in direct Time of Flight (dToF) CIS products as the receiving end chip of infrared / near-infrared 3D depth-sensing cameras. In recent years, researchers have begun to study the use of SPAD to replace PPD as the pixel photosensitive element of ordinary visible light RGB camera CIS. There is no structural difference between SPAD and PPD, but the higher bias voltage (VDD-VSS) causes PPD to operate in the avalanche effect region (Avalanche Region). Compared with PPD, SPAD has extremely high sensitivity, and each photon (Photon) shining on SPAD will stimulate a corresponding electrical signal. Because SPAD has ultra-high sensitivity at the single-photon sensing level, the CIS chip based on SPAD has imaging capabilities that surpass the human eye in polar night scenes.

[0026] In a typical SPAD image sensor architecture under study, a pixel array consisting of SPAD pixels is controlled by row and column controllers for light sensing, photoelectric conversion, and signal output. The pixel output signal is read by a readout circuit and then output off-chip via a port circuit. Each pixel includes a controller, a digital counter, a SPAD, and a readout circuit. When the pixel-specific control stimulus signal reaches the controller, the controller controls the SPAD for photoelectric conversion, which is then counted by the digital counter. The count result is read by the readout circuit and output as the pixel output signal. The counting speed of the digital counter is regulated by a clock signal (CLK). The unified clock signal used by all SPAD pixels is provided by an on-chip phase-locked loop (PLL) module. Sometimes, the PLL module provides clock signals for other modules on the CIS chip and may also be reused as the clock signal for the digital counter within the SPAD pixel.

[0027] The CIS chip, as a photosensitive component, is a core component of the Compact Camera Module (CCM). The system architecture of a typical mobile communication device, currently represented by a mobile phone, is shown in Figure 1. This system may contain N CCM modules. Each CCM module is equipped with a CIS chip, which communicates bidirectionally with the Image Signal Processing (ISP) module in the Application Processor (AP) or System on Chip (SoC) via a port link. The AP / SoC sends control signals to the CIS chip in each CCM. The CIS generates image signals and transmits them back to the ISP module for back-end processing.

[0028] The digital counter in each SPAD photosensitive pixel circuit in a SPAD-based image sensor is controlled by the same clock signal (CLK). By adjusting the frequency of the clock signal, the counting speed of the digital counter in the SPAD pixel can be adjusted, thereby achieving sensitivity adjustment similar to that of the SPAD pixel (not actually adjusting the sensitivity of the SPAD device, but only adjusting it from the reading end). For example, in a strong light environment, slowing down the frequency of the clock signal can achieve an effect similar to that of the SPAD sensitivity becoming worse. In a low light environment, speeding up the frequency of the clock signal can achieve an effect similar to that of the SPAD sensitivity becoming higher.

[0029] However, the sensitivity adjustment of the SPAD photosensitive pixel circuit in the SPAD-based image sensor is uniformly adjusted by the clock signal generated by the PLL or clock generation module within the chip, which has poor accuracy in adapting to the shooting scene. This can lead to high light count errors during visible light imaging and inability to correctly sense light in low-light and high-light environments.

[0030] The SPAD image sensor and electronic device provided in the embodiments of the present application are described in detail below through specific embodiments and their application scenarios in conjunction with the accompanying drawings.

[0031] As shown in FIG2 , a SPAD image sensor according to an embodiment of the present application includes a row control module (ROW Controller) 201 , a column control module (Column Controller) 202 , a sensitivity control module 203 , and a photosensitive pixel circuit 204 ;

[0032] The sensitivity control module 203 has a function for outputting a first control signal Φ SEN The first end 2031 of the sensitivity control module 203 is connected to the photosensitive pixel circuit 204, and the first control signal Φ SEN Used to control the light sensitivity of the photosensitive pixel circuit 204;

[0033] The sensitivity control module 203 further has a second terminal 2032 for receiving a second control signal, where the second control signal is used to adjust the first control signal.

[0034] In this way, the SPAD image sensor of the embodiment of the present application includes a row control module, a column control module, a sensitivity control module and a photosensitive pixel circuit, wherein, when the second end of the sensitivity control module is connected to the second control signal for adjusting the first control signal, the first end of the sensitivity control module can output the first control signal to control the light sensitivity of the photosensitive pixel circuit. Since the first control signal can be adjusted in time by the second control signal, the light sensitivity of the photosensitive pixel circuit can be more effectively adjusted under different lighting environments, thereby improving accuracy.

[0035] The second control signal is autonomously generated by the electronic device based on the lighting environment of the scene, or input by the user according to the lighting environment of the scene.

[0036] The first control signal generated by the sensitivity control module based on the second control signal may be an analog signal or a digital signal.

[0037] It should be noted that the SPAD image sensor may further include a column read / output module and / or a row read / output module to read the pixel signal Φ of the photosensitive pixel circuit based on the column and / or row. PIX , thereby generating an image signal and outputting it to the outside of the SPAD image sensor. For example, as shown in FIG2 , the input end of the column read / output module 205 is connected to the Φ of each column of multiple photosensitive pixel circuits 204. PIX , the output end outputs the image signal.

[0038] In an embodiment of the present application, the photosensitive pixel circuit is a SPAD photosensitive pixel circuit, which may also be referred to as a SPAD pixel.

[0039] Optionally, the SPAD image sensor includes a plurality of photosensitive pixel circuits distributed in an array, and the sensitivity control module has a plurality of the first terminals:

[0040] Any one of the first ends of the sensitivity control module is electrically connected to a plurality of photosensitive pixel circuits located in the same row, or any one of the first ends of the sensitivity control module is electrically connected to a plurality of photosensitive pixel circuits located in the same column.

[0041] For example, as shown in FIG2 , the photosensitive pixel circuit array in the SPAD image sensor may include a plurality of photosensitive pixel circuits 204, wherein the photosensitive pixel circuits are SPAD photosensitive pixel circuits. Among the plurality of first terminals 2031 of the sensitivity control module 203, each first terminal 2031 is connected to a plurality of photosensitive pixel circuits 204 in the same row. Specifically, Φ SEN The data is transmitted to each row of photosensitive pixel circuits through row-parallel wires. Each row of photosensitive pixel circuits shares the same Φ SEN .

[0042] Of course, any first terminal of the sensitivity control module can also be electrically connected to multiple rows or columns of photosensitive pixel circuits. In this way, the sensitivity control module generates a first control signal and can selectively output the first control signal to a row, a column, multiple rows or columns of photosensitive pixel circuits, or even the photosensitive pixel circuits of the entire photosensitive pixel circuit array at a time, as required. The first control signal output each time can be the same or different.

[0043] Optionally, in the SPAD image sensor, as shown in FIG2 , the row control module 201 has a plurality of output terminals 2011 for outputting row control signals Φ ROW Any of the output terminals 2011 of the row control module 201 is electrically connected to a plurality of photosensitive pixel circuits 204 located in the same row, so as to realize the ROWA row of multiple photosensitive pixel circuits 204 is controlled simultaneously.

[0044] Optionally, in the SPAD image sensor, as shown in FIG2 , the column control module 202 also has a plurality of output terminals 2021 for outputting the column control signal Φ COL Any of the output terminals 2021 of the column control module 202 is electrically connected to a plurality of photosensitive pixel circuits 204 located in the same column, so as to realize the COL A column of multiple photosensitive pixel circuits 204 is controlled simultaneously.

[0045] Optionally, the second control signal includes a digital signal, and the sensitivity control module includes a digital to analog converter circuit (DAC) and a decoding circuit;

[0046] The input end of the digital-to-analog conversion circuit serves as the second end of the sensitivity control module for receiving the digital signal;

[0047] The input end of the decoding circuit is electrically connected to the output end of the digital-to-analog conversion circuit, and the output end of the decoding circuit serves as the first end of the sensitivity control module and is electrically connected to the photosensitive pixel circuit;

[0048] The sensitivity control module further has a third terminal for receiving a decoding control signal, and the control terminal of the decoding circuit is electrically connected to the third terminal of the sensitivity control module.

[0049] Specifically, as shown in Figure 3, the sensitivity control module may include a digital-to-analog conversion circuit 301 and a decoding circuit 302. When the second control signal is an M-bit digital signal, the input terminal 3011 of the digital-to-analog conversion circuit 301 receives the second control signal, and the output terminal 3022 of the decoding circuit 302 outputs the first control signal as an analog signal. The output terminal 3012 of the digital-to-analog conversion circuit 301 is electrically connected to the input terminal 3021 of the decoding circuit 302, and the control terminal 3023 of the decoding circuit 302 receives the decoding control signal. Specifically, the decoding circuit may be a 1-to-X decoder. After the second control signal, such as an M-bit digital signal, is input to the digital-to-analog conversion circuit, the 1-to-X decoder outputs a plurality of ΦSENs.

[0050] The digital-to-analog conversion circuit is used to convert the second control signal provided by the chip externally into an analog signal. The second control signal is an M-bit digital signal. The converted analog signal is output through the decoding circuit as one line, multiple lines, or all X lines of parallel Φ SENTo the photosensitive pixel circuit array. Of course, the converted analog signal can also be output in one column, multiple columns, or all X columns in parallel after passing through the decoding circuit. SEN To the photosensitive pixel circuit array.

[0051] Optionally, the digital-to-analog conversion circuit includes M sub-circuits and an integrating operational amplifier module, the M sub-circuits are arranged in parallel, the sub-circuits include a first switching element and a first resistor connected in series, a first end of the first resistor is electrically connected to a fixed end of the first switching element, and the value of M is equal to the number of bits of the digital signal;

[0052] A first end of the integral operational amplifier module is connected to the second end of the first resistor in the M sub-circuits, a second end of the integral operational amplifier module is connected to the input end of the decoding circuit as the output end of the digital-to-analog conversion circuit, and a third end of the integral operational amplifier module is grounded;

[0053] The first switch elements in the M sub-circuits are respectively switched between a first switch state and a second switch state according to the digital signal;

[0054] When the first switching element is in the first switching state, the first end of the first resistor located in the same sub-circuit as the first switching element is connected to a first voltage;

[0055] When the first switching element is in the second switching state, the first end of the first resistor located in the same sub-circuit as the first switching element is connected to a second voltage, which is lower than the first voltage.

[0056] For example, as shown in FIG4 , corresponding to M sub-circuits, the first switch elements are S1-S M , the first resistors are R1-R M For example, the first switch element in sub-circuit 1 is S1, and the first resistor is R1; ...; the first switch element in sub-circuit M is S M , the first resistor is R M Taking subcircuit M as an example, S M The fixed end 403 and R M The first end of the connection, S M The first active terminal 401 is connected to the first voltage, S M The second active terminal 402 is connected to the second voltage. Specifically, the first voltage is V REF , the second voltage is ground voltage, at S M The first switch state, that is, the first movable end 401 is connected to the fixed end 403, R M The first end is connected to V REF ; In S MThe second switch state, that is, the second movable end 402 is connected to the fixed end 403, R M The first end of is grounded. The digital signal is an M-bit digital signal, denoted as [s1, s2, ..., sM], where each bit controls the state switching of the corresponding first switch element, s1 controls the state switching of S1, ..., sM controls the state switching of S M For example, if s1 is 1, S1 is in the first switching state; if s1 is 0, S1 is in the second switching state.

[0057] The first terminal 4001 of the integral operational amplifier module 400 is connected to the first resistor R1-R M The second end 4005 is connected to the first terminal 4002 of the decoder circuit (not shown in the figure), and the third end 4003 is grounded.

[0058] In this way, when a certain voltage is required to be output, SEN , the corresponding first switch element can be connected to the first voltage by inputting or adjusting the second control signal. When the current passes through the corresponding first resistor and converges at the first end of the integral operational amplifier module, the corresponding analog domain Φ is generated after passing through the integral operational amplifier module. SEN .

[0059] Optionally, in this embodiment, the integration operational amplifier module includes a second resistor and an operational amplifier;

[0060] Among them, the inverting input terminal of the operational amplifier is the first terminal of the operational amplifier module, the first terminal of the second resistor is connected to the inverting input terminal of the operational amplifier, the output terminal of the operational amplifier is the second terminal of the integral operational amplifier module connected to the input terminal of the decoding circuit, and the non-inverting input terminal of the operational amplifier is the third terminal of the integral operational amplifier module grounded.

[0061] For example, as shown in FIG4 , the integral operational amplifier module 400 includes a second resistor R AMP and an operational amplifier (AMP) 410. The inverting input terminal of the operational amplifier 410 serves as the first terminal 4001 of the integral operational amplifier module 400, the non-inverting input terminal of the operational amplifier 410 serves as the third terminal 4003 of the integral operational amplifier module 400, and the output terminal of the operational amplifier 410 serves as the second terminal 4002 of the integral operational amplifier module 400. AMP One end of R is connected to the inverting input terminal of the operational amplifier 410, AMP The other end is connected to the output end of the operational amplifier 410.

[0062] Optionally, in this embodiment, the second control signal includes an analog signal, and the sensitivity control module includes a phase-locked loop circuit and a decoding circuit;

[0063] Wherein, the input end of the phase-locked loop circuit serves as the second end of the sensitivity control module for receiving the analog signal;

[0064] The input end of the decoding circuit is electrically connected to the output end of the phase-locked loop circuit, and the output end of the decoding circuit is electrically connected to the photosensitive pixel circuit as the first end of the sensitivity control module;

[0065] The sensitivity control module further has a third terminal for receiving a decoding control signal, and the control terminal of the decoding circuit is electrically connected to the third terminal of the sensitivity control module.

[0066] That is, as shown in Figure 5, the sensitivity control module may include a phase-locked loop circuit 501 and a decoding circuit 502, so that when the second control signal is a PLL input signal, the input terminal 5011 of the phase-locked loop circuit 501 receives the second control signal, and the output terminal 5022 of the decoding circuit 502 outputs a first control signal that is a digital signal with stronger anti-interference capabilities. The output terminal 5012 of the phase-locked loop circuit 501 is electrically connected to the input terminal 5021 of the decoding circuit 502, and the control terminal 5023 of the decoding circuit 502 receives the decoding control signal. The output first control signal may be a digital clock signal. Specifically, the decoding circuit is a 1 to X decoder. After the PLL input signal is input to the PLL, the 1 to X decoder outputs a plurality of Φ SEN .

[0067] The phase-locked loop circuit is used to generate a digital clock signal of a corresponding frequency when a second control signal is input and transmit it to the decoding circuit. The second control signal is the PLL input signal. After passing through the decoding circuit, the digital clock signal outputs one row, multiple rows, or all X rows of parallel Φ SEN To the photosensitive pixel circuit array. Of course, the digital clock signal can also be output in parallel to one column, multiple columns, or all X columns after passing through the decoder. SEN To the photosensitive pixel circuit array.

[0068] Optionally, as shown in FIG6 , the phase-locked loop circuit includes a phase detection element (Phase Detector) 601, a low-pass filter module 602, a DC amplification module 603 and a voltage-controlled oscillation module 604;

[0069] In which, the first end 6011 of the phase detection element 601 is used to access the analog signal, the second end 6012 of the phase detection element 601 is connected to the first end 6021 of the low-pass filtering module 602, the second end 6022 of the low-pass filtering module 602 is connected to the first end 6031 of the DC amplification module 603, the second end 6032 of the DC amplification module 603 is connected to the first end 6041 of the voltage-controlled oscillation module 604 and the input end of the decoding circuit, and the second end 6042 of the voltage-controlled oscillation module 604 is connected to the third end 6013 of the phase detection element 601.

[0070] The DC method module may adopt a DC amplifier (DC Amplifier), the low-pass filter module may adopt a low-pass filter (Low Pass Filter), and the voltage-controlled oscillation module may adopt a voltage-controlled oscillator (VCO).

[0071] In this way, the second control signal is the PLL input signal, which is introduced from outside the chip and then enters the phase detection element to compare the phase with the signal output by the voltage controlled oscillation module. Then, it passes through the low-pass filter module and the DC amplifier module to become a digital signal of the corresponding frequency. While transmitting this digital signal to the decoding circuit, it is also fed back to the voltage controlled oscillation module. Using this second control signal, the output digital signal is a digital signal with variable frequency. By changing Φ SEN The sensitivity of the SPAD pixel is adjusted by the frequency.

[0072] Optionally, in this embodiment, the decoding circuit includes a switch module, a counting module and a decoding module;

[0073] The input end of the counting module serves as the third end of the sensitivity control module to receive the decoding control signal, the output end of the counting module is electrically connected to the input end of the decoding module, and the output end of the decoding module is electrically connected to the switch module;

[0074] The switch module includes a plurality of second switch elements, wherein a first end of the second switch element is an input end of the decoding circuit, a second end of the second switch element is connected to the photosensitive pixel circuit, and a control end of the second switch element is connected to an output end of the decoding module. The decoding circuit controls the second switch element to switch between a third switching state and a fourth switching state according to the decoding control signal;

[0075] When the second switch element is in the third switch state, the second switch element is turned on, and the input end of the decoding circuit is connected to the corresponding photosensitive pixel circuit through the second switch element to adjust the light sensitivity of the photosensitive pixel circuit according to the first control signal;

[0076] When the second switching element is in the fourth switching state, the second switching element is turned off.

[0077] For example, taking the case where any of the first terminals of the sensitivity control module is electrically connected to a plurality of photosensitive pixel circuits located in the same row, as shown in FIG7 , in the decoding circuit, the second switch elements include S1′-S N ', the input terminal 7011 of the counting module 701 receives the decoding control signal, the output terminal 7012 of the counting module 701 is electrically connected to the input terminal 7021 of the decoding module 702, and the output terminal 7022 of the decoding module 702 is connected to the control terminal of the second switch element. In this way, when the decoding control signal includes the digital clock signal CLK and the enable signal EN, the decoding control signal directly controls the counting module 701 to count; the K-bit signal [C1, C2, ..., C K ] directly controls the decoding module 702 to output an X-bit signal [D1, D2, ..., D X ], the output X-bit signal [D1, D2, ..., D X ] Directly control the second switching element S1'-S N ' switches between the third switching state and the fourth switching state. Thus, when Φ SEN The decoding circuit is input, and the second switch element connected to the photosensitive pixel circuit switches its state under the control of the X-bit signal. When the second switch element is in the third switch state, Φ SEN Output to the photosensitive pixel circuit of the corresponding row to adjust the light sensitivity. X Enter S N 'control terminal 706, and control S N When the first end 704 and the second end 705 are connected, S N 'In the third switch state; otherwise, D X Enter S N 'control terminal 706, and control S N When the first end 704 and the second end 705 are disconnected, S N 'In the fourth switch state.

[0078] Specifically, the counting module may adopt a K-bit digital counter (K-bit Digital Counter).

[0079] Specifically, the decoding module may adopt a K to X bit decoder (K ​​to X bit Decoder).

[0080] Optionally, in this embodiment, the value of X is equal to the value of N.

[0081] Optionally, in this embodiment, the photosensitive pixel circuit includes: a first switch device, a first single-photon avalanche transistor, a sensitivity adjustment module and a first counter;

[0082] The first terminal of the first switch device is used to connect to a driving voltage, the second terminal of the first switch device is used to connect to a switch control signal, the third terminal of the first switch device is connected to the first terminal of the first single-photon avalanche transistor, and the second terminal of the first single-photon avalanche transistor is used to connect to a reference voltage, and the reference voltage is lower than the driving voltage;

[0083] The first end of the sensitivity adjustment module is connected to the first end of the first single-photon avalanche transistor to obtain an initial light sensing signal when the switch control signal controls the first switch device to be disconnected. The second end of the sensitivity adjustment module is used to receive the first control signal. The third end of the sensitivity adjustment module is connected to the first end of the first counter. The second end of the first counter is used to output a pixel light sensing signal.

[0084] The first control signal is used to control the sensitivity adjustment module to switch between a first working state and a second working state; the photosensitive pixel circuit has a first light sensitivity when the sensitivity adjustment module is in the first working state, and the photosensitive pixel circuit has a second light sensitivity when the sensitivity adjustment module is in the second working state, and the first light sensitivity is greater than the second light sensitivity.

[0085] For example, as shown in FIG8 , the photosensitive pixel circuit includes a first switching device 801, a first single-photon avalanche transistor 802, a sensitivity adjustment module 803, and a first counter 804. A first terminal 8011 of the first switching device 801 is connected to a driving voltage, which may be a power supply voltage VDD; a third terminal 8013 of the first switching device 801 is connected to a first terminal 8021 of the first single-photon avalanche transistor 802; and a second terminal 8012 of the first switching device 801 is connected to a switch control signal Φ EXPO The second terminal 8022 of the first single-photon avalanche transistor 802 can be connected to a reference voltage, specifically, ground or a negative voltage VSS. The first terminal 8031 ​​of the sensitivity adjustment module 803 is connected to the first terminal 8021 of the first single-photon avalanche transistor 802, and the second terminal 8032 of the sensitivity adjustment module 803 is connected to the Φ SENThe third terminal 8033 of the sensitivity adjustment module 803 is connected to the first terminal 8041 of the first counter 804, and the second terminal 8042 of the first counter 804 outputs the pixel light-sensing signal.

[0086] The first switch device 801 may be a PMOS transistor or an NMOS transistor. When the first switch device 801 is a PMOS transistor, the source of the PMOS transistor is the first terminal of the first switch device 801, the drain of the PMOS transistor is the third terminal of the first switch device 801, and the gate of the PMOS transistor is the second terminal of the first switch device 801. When the first switch device 801 is an NMOS transistor, the drain of the NMOS transistor is the first terminal of the first switch device 801, the source of the NMOS transistor is the third terminal of the first switch device 801, and the gate is the second terminal of the first switch device 801.

[0087] The first switching device 801 can be in an off or on state under the control of the switching control signal. The first single-photon avalanche transistor 802 performs light sensing when the first switching device 801 is off, generates an initial light sensing signal Vc, and inputs it into the sensitivity adjustment module 803, and is reset when the first switching device 801 is on. That is to say, the switching control signal can be used to control the light sensing time. When light sensing is required, the switching control signal output is a voltage signal that disconnects the first switching device. When light sensing is not required or is completed, the switching control signal output is a voltage signal that turns on the first switching device 801.

[0088] The sensitivity adjustment module 803 is located between the output signal of the first single-photon avalanche transistor 802 and the first counter, and its first end is connected to the cathode of the first single-photon avalanche transistor, and its second end is connected to the Φ SEN The third end is connected to the first end of the first counter. The second end of the first counter outputs a counting signal, or a pixel light-sensing signal. The first counter can be a digital counter. The first end of the first counter is the input end of the first counter, and the second end of the first counter is the output end of the first counter.

[0089] During light sensing, the cathode of the first single-photon avalanche transistor outputs an initial light sensing signal Vc, which is a pulse voltage signal. The sensitivity adjustment module is used to shape or compare the initial light sensing signal Vc and output a second light sensing signal Vb, which is a pulse signal, such as a square wave signal, and can be adjusted in Φ SENThe working state is switched under the control of the sensitivity adjustment module. The photosensitive pixel circuit has different light sensitivities in different working states of the sensitivity adjustment module. Accordingly, the number of square wave signals output by the sensitivity adjustment module in a unit light-sensitive time in different working states is different. That is, the sensitivity adjustment module can be adjusted in Φ SEN The light sensitivity of the photosensitive pixel circuit is adjusted under the control of the first counter, and the first counter is used to count the number of square waves output by the sensitivity adjustment module and output a counting signal, which can be converted into a pixel photosensitive signal by a readout circuit.

[0090] Optionally, in this embodiment, the photosensitive pixel circuit includes: a second switch device, a second single-photon avalanche transistor, an inverting module and a second counter;

[0091] Wherein, the first end of the second switch device is used to connect to the driving voltage, the second end of the second switch device is used to receive the switch control signal, the third end of the second switch device is connected to the first end of the second single-photon avalanche transistor, the second end of the second single-photon avalanche transistor is used to connect to the reference voltage, the driving voltage is greater than the reference voltage, the first end of the inverting module is connected to the first end of the second single-photon avalanche transistor, the second end of the inverting module is connected to the first end of the second counter, the second end of the second counter is used to output the pixel light-sensing signal, and the third end of the second counter is used to receive the first control signal;

[0092] The first control signal is used to control the second counter to switch between a third working state and a fourth working state; the photosensitive pixel circuit has a third light sensitivity when the second counter is in the third working state, and the photosensitive pixel circuit has a fourth light sensitivity when the second counter is in the fourth working state, and the third light sensitivity is greater than the fourth light sensitivity.

[0093] For example, as shown in FIG9 , the photosensitive pixel circuit includes a second switch device 901, a second single-photon avalanche transistor 902, an inverting module 903, and a second counter 904. A first terminal 9011 of the second switch device 901 is connected to a driving voltage, which may be a power supply voltage VDD. A third terminal 9013 of the second switch device 901 is connected to a first terminal 9021 of the second single-photon avalanche transistor 902. A second terminal 9012 of the second switch device 901 is connected to a switch control signal Φ EXPOThe second terminal 9022 of the second single-photon avalanche transistor 902 can be connected to a reference voltage, specifically, ground or a negative voltage VSS. The first terminal 9031 of the inverting module 903 is connected to the first terminal 9021 of the second single-photon avalanche transistor 902, the second terminal 9032 of the inverting module 903 is connected to the first terminal 9041 of the second counter 904, the second terminal 9042 of the second counter 904 outputs the pixel light-sensing signal, and the third terminal 9043 of the second counter 904 is connected to the Φ SEN .

[0094] The second switching device may be a PMOS or an NMOS. When a PMOS is selected, the source of the PMOS is the first terminal of the second switching device, the drain is the third terminal of the second switching device, and the gate is the second terminal of the second switching device. When an NMOS is selected, the drain of the NMOS is the first terminal of the second switching device, the source is the third terminal of the second switching device, and the gate is the second terminal of the second switching device.

[0095] As shown in Figures 9 and 10, the second single-photon avalanche transistor generates an initial light sensing signal Vc when receiving a photon. The initial light sensing signal Vc is a pulse voltage signal. Vc is rectified by an inverting module (NOT gate, also called a NOT gate) to form a third light sensing signal Vp. The third light sensing signal Vp is a pulse signal, such as a square wave pulse signal; the second switching device is equivalent to a variable resistor, which mainly controls the size of the pulse signal flowing through the second single-photon avalanche transistor to prevent Vc from being too large or too small; Vp is connected to the second counter (Counter). Theoretically, the second counter will count once after each photon is received by the second single-photon avalanche transistor. If Q photons reach the second single-photon avalanche transistor, the second counter will count Q times.

[0096] It should be noted that the second counter has different counting speeds in the third and fourth operating states. The first control signal controls the switching of the second counter between the different operating states, thereby adjusting the counting speed of the second counter to achieve light sensitivity adjustment. For example, in a strong light environment, the frequency of the first control signal is slowed down, and the second counter is in the fourth operating state. At this time, the counting speed of the second counter is reduced, which will achieve the effect of reducing the light sensitivity of the second single-photon avalanche transistor. In a weak light environment, the frequency of the first control signal is accelerated, and the second counter is in the third operating state. At this time, the counting speed of the second counter is increased, which will achieve the effect of increasing the light sensitivity of the second single-photon avalanche transistor.

[0097] In summary, the SPAD image sensor of the present embodiment includes an independent sensitivity control module that generates a corresponding first control signal based on a second control signal and transmits it to the photosensitive pixel circuit. This causes the photosensitive pixel circuit to adjust its light sensitivity based on the received first control signal, thereby ensuring that the photosensitive pixel circuit outputs the correct signal under different lighting conditions. Of course, as an independent module, the sensitivity control module does not affect the operation or signal processing of other modules.

[0098] An electronic device provided in an embodiment of the present application includes the SPAD image sensor described above.

[0099] This electronic device uses a SPAD image sensor that includes an independent sensitivity control module. The module generates a corresponding first control signal based on a second control signal and transmits it to the photosensitive pixel circuit. This causes the photosensitive pixel circuit to adjust its light sensitivity based on the received first control signal, ensuring that the photosensitive pixel circuit outputs the correct signal under different lighting conditions. As an independent module, the sensitivity control module does not affect the operation or signal processing of other modules.

[0100] The electronic device in the embodiments of the present application may be a terminal or other device other than a terminal. For example, the electronic device may be a mobile phone, a tablet computer, a laptop computer, a PDA, an in-vehicle electronic device, a mobile internet device (MID), an augmented reality (AR) / virtual reality (VR) device, a robot, a wearable device, an ultra-mobile personal computer (UMPC), a netbook, or a personal digital assistant (PDA), etc. It may also be a server, a network attached storage (NAS), a personal computer (PC), a television (TV), an ATM, or an kiosks, etc., and the embodiments of the present application do not specifically limit the above.

[0101] The electronic device in the embodiment of the present application may be a device having an operating system. The operating system may be an Android operating system, an iOS operating system, or other possible operating systems, which are not specifically limited in the embodiment of the present application.

[0102] The electronic device provided in the embodiment of the present application can implement each process implemented by the SPAD image sensor embodiment of Figures 1 to 10. To avoid repetition, they are not described here.

[0103] It should be noted that the electronic devices in the embodiments of the present application include the mobile electronic devices and non-mobile electronic devices mentioned above.

[0104] It should be noted that, in this article, the terms "comprise", "include" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the statement "comprises a ..." does not exclude the presence of other identical elements in the process, method, article or device comprising the element. In addition, it should be noted that the scope of the methods and devices in the embodiments of the present application is not limited to performing functions in the order shown or discussed, and may also include performing functions in a substantially simultaneous manner or in the opposite order according to the functions involved. For example, the described method may be performed in an order different from that described, and various steps may also be added, omitted, or combined. In addition, the features described with reference to certain examples may be combined in other examples.

[0105] Through the description of the above implementation methods, those skilled in the art can clearly understand that the above-mentioned embodiment methods can be implemented by means of software plus the necessary general hardware platform, and of course can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of the present application is essentially or the part that contributes to the prior art can be embodied in the form of a computer software product, which is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk), including a number of instructions for enabling a terminal (which can be a mobile phone, computer, server, or network device, etc.) to execute the methods described in each embodiment of the present application.

[0106] The embodiments of the present application are described above in conjunction with the accompanying drawings, but the present application is not limited to the above-mentioned specific implementation methods. The above-mentioned specific implementation methods are merely illustrative and not restrictive. Under the guidance of this application, ordinary technicians in this field can also make many forms without departing from the purpose of this application and the scope of protection of the claims, all of which are within the protection of this application.

Claims

1. An SPAD image sensor, comprising a row control module, a column control module, a sensitivity control module and a photosensitive pixel circuit; Among them, The sensitivity control module has a first end for outputting a first control signal, the first end of the sensitivity control module is connected to the photosensitive pixel circuit, and the first control signal is used to control the light sensitivity of the photosensitive pixel circuit; The sensitivity control module further has a second end for accessing a second control signal, and the second control signal is used to adjust the first control signal.

2. The SPAD image sensor according to claim 1, wherein, The second control signal includes a digital signal, and the sensitivity control module includes a digital-to-analog conversion circuit and a decoding circuit; Wherein, the input end of the digital-to-analog conversion circuit serves as the second end of the sensitivity control module for accessing the digital signal; The input end of the decoding circuit is electrically connected to the output end of the digital-to-analog conversion circuit, and the output end of the decoding circuit serves as the first end of the sensitivity control module and is electrically connected to the photosensitive pixel circuit; The sensitivity control module further has a third end for accessing a decoding control signal, and the control end of the decoding circuit is electrically connected to the third end of the sensitivity control module.

3. The SPAD image sensor according to claim 2, wherein, The digital-to-analog conversion circuit includes M sub-circuits and an integrating operational amplifier module. The M sub-circuits are arranged in parallel. The sub-circuit includes a first switching element and a first resistor connected in series. The first end of the first resistor is electrically connected to the fixed end of the first switching element, and the value of M is equal to the number of bits of the digital signal; The first end of the integrating operational amplifier module is connected to the second end of the first resistor in the M sub-circuits. The second end of the integrating operational amplifier module serves as the output end of the digital-to-analog conversion circuit and is connected to the input end of the decoding circuit. The third end of the integrating operational amplifier module is grounded; The first switching elements in the M sub-circuits switch between a first switching state and a second switching state respectively according to the digital signal; When the first switching element is in the first switching state, the first end of the first resistor in the same sub-circuit as the first switching element accesses a first voltage; When the first switching element is in the second switching state, the first end of the first resistor in the same sub-circuit as the first switching element accesses a second voltage, and the second voltage is less than the first voltage.

4. The SPAD image sensor according to claim 3, wherein, The integrating operational amplifier module includes a second resistor and an operational amplifier; Wherein, the inverting input end of the operational amplifier is the first end of the operational amplifier module. The first end of the second resistor is connected to the inverting input end of the operational amplifier. The output end of the operational amplifier is the second end of the integrating operational amplifier module and is connected to the input end of the decoding circuit. The non-inverting input end of the operational amplifier is the third end of the integrating operational amplifier module and is grounded.

5. The SPAD image sensor according to claim 1, wherein, The second control signal includes an analog signal, and the sensitivity control module includes a phase-locked loop circuit and a decoding circuit; Wherein, the input end of the phase-locked loop circuit serves as the second end of the sensitivity control module for accessing the analog signal; The input end of the decoding circuit is electrically connected to the output end of the phase-locked loop circuit, and the output end of the decoding circuit is electrically connected to the photosensitive pixel circuit as the first end of the sensitivity control module; The sensitivity control module further has a third end for accessing a decoding control signal, and the control end of the decoding circuit is electrically connected to the third end of the sensitivity control module.

6. The SPAD image sensor according to claim 5, wherein, The phase-locked loop circuit includes a phase detection element, a low-pass filtering module, a direct current amplification module, and a voltage-controlled oscillation module; Among them, the first end of the phase detection element is used for accessing the analog signal, the second end of the phase detection element is connected to the first end of the low-pass filtering module, the second end of the low-pass filtering module is connected to the first end of the direct current amplification module, the second end of the direct current amplification module is connected to the first end of the voltage-controlled oscillation module and the input end of the decoding circuit, and the second end of the voltage-controlled oscillation module is connected to the third end of the phase detection element.

7. The SPAD image sensor according to claim 2 or 5, wherein, The decoding circuit includes a switching module, a counting module, and a decoding module; The input end of the counting module accesses the decoding control signal as the third end of the sensitivity control module, the output end of the counting module is electrically connected to the input end of the decoding module, and the output end of the decoding module is used for being electrically connected to the switching module; The switching module includes a plurality of second switching elements. The first end of the second switching element is the input end of the decoding circuit, the second end of the second switching element is connected to the photosensitive pixel circuit, the control end of the second switching element is connected to the output end of the decoding module, and the decoding circuit controls the second switching element to switch between a third switching state and a fourth switching state according to the decoding control signal; When the second switching element is in the third switching state, the second switching element is turned on, and the input end of the decoding circuit is turned on with the corresponding photosensitive pixel circuit through the second switching element to adjust the light sensitivity of the photosensitive pixel circuit through the first control signal; When the second switching element is in the fourth switching state, the second switching element is turned off.

8. The SPAD image sensor according to claim 1, wherein, The photosensitive pixel circuit includes: a first switching device, a first single-photon avalanche transistor, a sensitivity adjustment module, and a first counter; Among them, the first end of the first switching device is used for connecting a driving voltage, the second end of the first switching device is used for accessing a switching control signal, the third end of the first switching device is connected to the first end of the first single-photon avalanche transistor, the second end of the first single-photon avalanche transistor is used for accessing a reference voltage, and the reference voltage is less than the driving voltage; The first end of the sensitivity adjustment module is connected to the first end of the first single-photon avalanche transistor to obtain an initial light induction signal when the switching control signal controls the first switching device to be turned off. The second end of the sensitivity adjustment module is used for accessing the first control signal, the third end of the sensitivity adjustment module is connected to the first end of the first counter, and the second end of the first counter is used for outputting a pixel photosensitive signal; The first control signal is used to control the sensitivity adjustment module to switch between a first operating state and a second operating state; the photosensitive pixel circuit has a first light sensitivity when the sensitivity adjustment module is in the first operating state, and the photosensitive pixel circuit has a second light sensitivity when the sensitivity adjustment module is in the second operating state, and the first light sensitivity is greater than the second light sensitivity.

9. The SPAD image sensor according to claim 1, wherein, The photosensitive pixel circuit includes: a second switching device, a second single-photon avalanche transistor, an inverting module, and a second counter; Wherein, a first end of the second switching device is used to connect a driving voltage, a second end of the second switching device is used to access a switching control signal, a third end of the second switching device is connected to a first end of the second single-photon avalanche transistor, a second end of the second single-photon avalanche transistor is used to connect a reference voltage, the driving voltage is greater than the reference voltage, a first end of the inverting module is connected to the first end of the second single-photon avalanche transistor, a second end of the inverting module is connected to a first end of the second counter, a second end of the second counter is used to output a pixel photosensitive signal, and a third end of the second counter is used to access the first control signal; The first control signal is used to control the second counter to switch between a third operating state and a fourth operating state; the photosensitive pixel circuit has a third light sensitivity when the second counter is in the third operating state, and the photosensitive pixel circuit has a fourth light sensitivity when the second counter is in the fourth operating state, and the third light sensitivity is greater than the fourth light sensitivity.

10. The SPAD image sensor according to claim 1, wherein, It includes a plurality of the photosensitive pixel circuits distributed in an array, and the sensitivity control module has a plurality of the first ends: Any one of the first ends of the sensitivity control module is electrically connected to a plurality of photosensitive pixel circuits in the same row, or any one of the first ends of the sensitivity control module is electrically connected to a plurality of photosensitive pixel circuits in the same column.

11. An electronic device, comprising the SPAD image sensor according to any one of claims 1 to 10.

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