Binary replacement configurations

Abstract

Existing computer systems using 8-bit binary representations require significant energy and hardware resources for data processing, while also being relatively slow. This invention describes a computer system for accelerating information processing by replacing 8-bit binary representations with single location or transistor configurations mapped through a New Binary Conversion Code (NBCC Code), utilizing multiple mapping methods. The system employs a hardware component configured to map data encoded in NBCC Code to single locations or transistor configurations, using multiple mapping methods, including binary conversion, directional chronologies, location mapping, and image association. The mapping methods, which include binary conversion between 8-bit binary and single location, sequential processing with a time, direction, and distance component, location mapping using chronological data, and three-dimensional representations with a direct correlation of images and associated code, reduce the amount of energy and resources, while dramatically improving the speed of data processing. This system achieves up to an 8 times reduction in energy consumption and up to an 8 times increase in data processing speed when compared with conventional systems using ASCII Code and 8-bit binary representations. Additional benefits also include increased data storage, advanced artificial intelligence learning potential, and novel methods for producing public and private keys for advanced encryption technologies. The systems also create and utilize novel three dimensional languages that further improve data processing and encryption methods.

Description

BINARY REPLACEMENT CONFIGURATIONS

[0001] This invention will accelerate information processing and data activities by up to 8 times faster than prior art. It will also reduce the size required to store information or data by up to a factor of 8. It will also consume up to 8 times less energy to operate than prior art requires.

[0002] This is accomplished by replacing binary machine processes and information activities with a singular location or transistor configuration, instead of using the standard 8 locations or transistor configurations in prior art. One of the simplest ways to implement this, is by using just one location or transistor configuration instead of 8, while replacing ASCII CODE with NBCC Code.

[0003] Examples of how this is accomplished is shown throughout the Figures and explained in their descriptions.

[0004] Another benefit this invention will produce is new physical, three dimensional languages that will improve advanced artificial intelligence applications and learning needs. A deeper scope of it's implementation and abilities are when locations or transistors are stacked.

[0005] The physical three dimensions will also benefit encryption technologies, by producing novel, unexplored, and innumerable options for public and private keys.

[0006] Memory is an important component frequently used in Figures 1 - 26.

[0007] Figure 1 shows the side by side comparison and correlation with the new NBCC Code next to ASCII Code and their binary equivalents.

[0008] Figure 2 represents part of a circuit board, integrated circuitry, or a micorchip that contains 8 rows and 8 columns. The 64 intersections of the rows and columns are locations that can also contain transistors. The locations or transistors can function as switches or amplifiers, among other functions. Figure 2 may also be stacked on top of itself.

[0009] Figure 3 represents Row 1 of Figure 2, wherein the 8 transistors have been turned into an off or on position. The off or on positions are represented by the numbers 1 or 0.

[0010] Figure 3 represents a common standard used in present day technologies.[Oil] The combination of l's and 0's in Figure 3, when correlated with computer programs and "PA" that includes ASCII Code 65 from Figure 1, produce the capital letter "A", that is visible for display on devices such as; Televisions, Laptops, Computers, or Cellphones. Figure 3 is a typical 8 bit configuration.

[0012] Figure 4 is similar to Figures 3, in that Row 1 of Figure 2 is used, wherein the 8 off or on transistor positions are different. The difference results in a binary sequence, when correlated with computer programs and "PA" that includes ASCII Code 66 from Figure 1, produce the capital letter "B", that is visible for display on devices. Figure 4 is also a standard practice in present day technologies.

[0013] Figure 5 represents Row 1, Column 1 of Figure 2, wherein a single transistor is in either an off or on position, represented by the number 2. The number 2 is the NBCC Code from Figure 1, which is an alternative to ASCII Code 65, that also represents the binary version 01000001, or the capital letter "A" when needed.

[0014] Figure 6 is similar to Figure 5, except that the single transistor in either an off or on position is located in Row 1, Column 2, represented by the number 3. The number 3 is the NBCC Code from Figure 1, which is an alternative to ASCII Code 66, that also represents the binary version 01000010, or the capital letter "B" when needed, similar in the way that ASCII Code 66 does.

[0015] In at least Figures 7 through 11, what may be described as a Forward Binary conversion is represented.

[0016] Figure 7 represent (a Step 1) a Figure 3 and a Figure 2. By means of "PA", the hollow arrow depicts the transmission of the 8 transistor positions from a Figure 3 to a Figure 2. Figure 7 is a standard prior art practice in present day technologies.

[0017] Figure 7 B (a Step 1) is similar to Figure 7. However, the hollow arrow depicts the transmission of the 8 transistor positions from a Figure 4 to a Figure 2, by using "PA".

[0018] Figure 8 is (a Step 2) a Figure 3 and a Figure 5. Figure 8 relies on existing computer programs and "PA" that uses the transmission from a Figure 7, by using the 8 transistor configuration of a Figure 3 and instructions from "PA", to turn on or off a single transistor in Row 1, Column 1 of a Figure 2. This action turns the Figure 2 into a Figure 5.

[0019] Figure 9 (a Step 3) is a Figure 5 and a Figure 2 that is similar to Figure 7 in functionality. Figure 9 differs from Figure 7 by using only one location or transistor in an on or off position to transmit with one pulse and or function; by means of "PA" and NBCC Code 2, from a Figure 5 to a Row 1, Column 1 of a Figure 2. The one pulse and or function used, provides substantial improvements over prior art. Figure 9 consumes up to 8 times less energy than Figure 7, while simultaneously functioning up to 8 times faster than Figure 7.

[0020] The actions of Figure 9 produce a Figure 9 B, actions that have turned a Figure 2 into a Figure 5.

[0021] Figure 9 B (a Step 4) represents two examples of Figure 5, wherein the location or on or off position of a single transistor in Row 1, Column 1 is transmitted by means of "PA" and NBCC Code 2 from a Figure 5 to a Figure 2. This action turns the Figure 2 into another Figure 5. This process step can also be used in Mapping Method 3 (see Figures 23-25).

[0022] Figure 10 is a Figure 4 and a Figure 2, similar to a Figure 7 B.

[0023] Figure 10 B (a Step 2) is similar to Figure 8 with regards to functionality. The notable difference being the usage of a Figure 4 and a Figure 6, wherein transmission of the transistor configuration of Figure 7 B is used, turning a Figure 2 into a Figure 6.

[0024] Figure 11 (a Step 4) is similar to Figure 9 B, except two examples of Figure 6 are used. Figures 11 and Figure 9 B can also be used in Mapping Method 3, seen in Figures 23 - 25.

[0025] In at least Figures 12,13,14, and 16 represents what may be described as a Reverse Binary Conversion.

[0026] Figure 12 is a process and result when a Figure 5 has used "PA", by transmitting one or more signals with instructions to a Figure 2, instructing the 8 transistors in Row 1 to turn on or off, in the configuration that produces a Figure 3.

[0027] Figure 13 is similar to Figure 12, except the transmission is from a Figure 6 to a Figure 2, producing a Figure 4.

[0028] Figure 14 represents a present day, standard prior art computer practice of using a configuration of 8 transistors in an off or on position, that is interpreted as binary, using computer programs, "PA", and ASCII Code 65 to make the capital letter "A" visible for display on devices, such as televisions, laptops, computers, cellphones, or other devices.

[0029] Figure 14 may also represent just configurations of locations on a disc, such as Figure 26, or other similar usages of location configurations when needed.

[0030] Figure 15 (a Step 5) is similar in functionality to Figure 14, except that only one location or transistor configuration in either an off or on position is used, instead of the 8 transistors used in Figure 14.

[0031] This makes Figure 15 potentially 8 times faster, and also require 8 times less energy to function and operate than Figure 14 does.

[0032] Figure 15 uses computer programs, "PA", and NBCC Code 2, to make the Capital letter "A" visible for display; instead of using ASCII Code 65, computer programs, and "PA" to make the Capital letter "A" visible for display.

[0033] Figure 16 is similar to Figure 14. The difference is the configuration of 8 transistors, the usage of ASCII Code 66, and results of the capital letter "B" visible for display.

[0034] Figure 17 (a Step 5) is similar to Figure 15, except that the NBCC Code 3 is used with computer programs and "PA", rather than using ASCII Code 66 to make the capital letter "B" visible for display.

[0035] Mapping Method 2 is represented in at least Figures 18 - 22, using a single transistor and or location configuration that can be in either an off or on position; or function simply by using just the position of the location. The Chronology used from a TDDC in Figures 18 - 22 is similar to how the the English language is both written and read; top to bottom, then left to right, then down, then repeat the chronological sequence until complete.

[0036] Instead of using the standard present day practice (see Figures 14 & 16) of using 8 transistor configurations in either an off or on position in combination with computer programs, "PA", and ASCII Codes to make capital letters available for display; Figures 18 - 22 use a Signal Source TTTR with just one location and or transistor configuration in either an off or on position (see Figures 15 & 17) in combination with computer programs, TDDC, NBCC and "PA" to make capital letters available for display, demonstrated in at least Figures 1 - 17.

[0037] Some of the results of Mapping Method 2 results in an "LM".

[0038] Figure 18 illustrates a single transistor that has been turned either on or off with a Signal Source TTTR, by using "PA". The transistor position has been corresponded with the NBCC Code 2, an alternative to ASCII Code 65, located in Row 1, Column 1.

[0039] Figure 19 is similar to Figure 18, except that NBCC Code 3 is used (an alternative to ASCII Code 66), located in Row 1, Column 2.

[0040] Figure 20 uses a single location or transistor configuration of either an off or on position. It is similar to Figure 18 & 19, except that it uses NBCC Code 4, instead of ASCII 67. This represents the capital letter "C", or it's binary equivalent 01000011 when needed.

[0041] Figure 21 shows the extended chronology of a top to bottom, then left to right, then down, and repeat pattern; such as how the the English language is both written and read.

[0042] Figure 21 illustrates the continuation of chronology after the sequential completion of Row 1. It shows the beginning of Row 2, Column 1, where NBCC Code 10 is used for the capital letter "I", rather than ASCII Code 73.

[0043] Figure 22 demonstrates the continued chronology from Figures 18 - 22. It uses NBCC Code 11 for the capital letter "J", instead of ASCII Code 74. It shows the same continued chronology of a top to bottom, starting off left to right, then down, and repeat pattern.

[0044] Figure 23 is similar to Figure 18. It is also additionally contained inside of a TLCC.

[0045] Figure 24 is representative of 2 examples.

[0046] Example 1 is where both TLCC No 1. and TLCC No. 2 have the same programmed instructions and abilities to perform the activities and functions of at least Figures 1 - 23.

[0047] Example 2 is where a TLCC No 1. that has the abilities to perform the activities and functions of at least Figures 1 - 23, uses that information and abilities from at least Figures 1 - 23 to instruct and program machinery in a TLCC No. 2, making the TLCC No 2 capable to perform the activities and functions of at least Figures 1 - 23. This allows and permits a TLCC No 2. the abilities to perform the activities and functions of at least Figures 1 - 23.

[0048] Figure 25 is an example where two TLCC's have the same programmed Mapping Method 2, that also retains the abilities to perform the activities and functions of at least Figures 1 - 24. When a TLCC No. 2 already has the Mapping and Binary Conversion functions and programs of a TLCC No. 1, a Direction and a TDDC component of Mapping Method 2 is all that is needed, alleviating the need for the circuit boards in Figures 23 - 24.

[0049] Figure 26 is a Disc, such as a writable cd / dvd, or hard drive. It can perform all of the activities and functions of Figures 1 -25.

[0050] A Figure 3 has been used for illustration purposes, to point out specific locations on a Disc. Transistors are not used. Typically, space on a disc is given a positive or negative charge to a given location, by using a Signal Source TTTR. The configuration of positive or negative charges at locations on a Disc perform the functions and activities of the locations or transistor configurations in Figures1 - 25. This similarity enables Figure 26 to perform the activities and functions of Figures 1 -25.

[0051] Figure 26 is also another example of LM that can use Mapping Method 1, Mapping Method 2, Mapping Method 3, or Mapping Method 4.Glossary of TermsDefinitions are intended to articulate what most closely apply to the context and pertinence of this Patent Application.And OrOne or more items used or applied. One of the items used or applied. Some of the items used or applied. All of the items used or applied.ASCII CodeAmerican Standard Code for Information Interchange.Binary ConversionThe processes and methods of converting and switching from a typical 8 bit configuration to a singular bit, and or location or transistor configuration. Or, the processes and methods of converting and switching from a singular bit, and or location or transistor configuration to a typical 8 bit configuration.Forward Binary ConversionA process of converting binary information into a singular equivalent (seen in at least Figures 7 - 11, 15, and 17).LMLocation Mapping are maps of locations; wherein the locations and or positions of locations can be used for information processing. LM can be established by using Mapping Methods.Locations, or the locations of transistors and their configurations in an on or off position function as an LM, when PA has been used to instruct the configurations, and retains the memory of the instructions and locations where the instructions occurred.Mapping Method 1Is represented in at least Figures 1 - 17, and predominately focuses on Binary Conversion. Main functions and activities include; replacing 8 transistor configurations with one location or one transistor configurations, and replacing ASCII Code with NBCC Code. This is accomplished by implementing instructional machine and computer programming processes and methods from PA.Mapping Method 1 also shows the correlation with prior art.Mapping Method 2Is represented in at least Figures 18 - 22. It is used to establish and produce LM, by implementing at least a chronology from a TDDC. Other components from TDDC may be used when needed.The chronology implemented in Figures 18 - 22 is similar to how the English language is both written and read. Top to bottom, left to right, down, and repeat. The chronology in Mapping Method 2 is not limited to the examples in Figures 18 -22. Meaning that an application, computer program, or machine requirement may use an opposite chronology; such as a bottom to top, right to left, up, and repeat, or other sequences of chronology.Mapping Method 2 is not binary, yet retains it's binary equivalent with the NBCC Code correlations from Figure 1, by using PA.Mapping Method 3Represented in at least Figures 23 - 25, it includes instructional machine and computer programming processes and methods from Figures 1 -22.It also includes the transference of information without requiring the initial instructional programming, when 2 or more TLCC's already both have the same programmed abilities, therefore only requiring the transfer of information to function. In this instance, only the location or single transistor configuration and NBCC code is needed.Mapping Method 3 also includes an example of just a Directional component from a TDDC. It can additionally use any of TDDC components and their abilities when needed.Mapping Method 4A mapping method by association with images. This is accomplished by adding a direct associating correlation to NBCC Code with images. In Figure 1, an additional column would be added between the NBCC Code column and the Binary column, titled I Code, for Image Code. The I Code column would have its own symbol or numeral representation with the letter I, similar to the way that NBCC Code works.For instance, using the same numerical representation with NBCC Code, produces: 1 2 = NBCC Code 2 = Binary 01000001 = capital letter "A".1 3 = NBCC Code 3 = Binary 01000010 = capital letter "B".The images from the I Code column are stored in a TLCC. The image complexity may range from very simple to extremely detailed, depending on various project applications and uses.Mapping Method 4 benefits include; improvements in encryption technologies, security industries, artificial intelligence developments, and the arts. As with NBCC Code, Mapping Method 4 also permits symbols or other data available for display that may also be used, instead of numbers.NBCC CodeNew Binary Conversion Code. An Alternative to ASCII Code. The particular numerical association in this patent application may be changed, when a given machine, computer program, or application requires or chooses to do so.Meaning, that the number 2 represents the capital letter "A", or binary 01000001, and number 3 represents the capital letter "B", or binary 01000010 in this patent application. A different computer program or application could use the number 10, instead of the number 2 to represent the capital letter "A", and the number 11 to represent the capital letter "B", or other variations. Symbols or other data available for display may also be used, instead of numbers.OrMeans what the word Or does, and also includes the definitions of And Or.PAPrior Art, that is typically computer programs and apparatuses, that can also include ASCII Codes and functions. PA can also include LM, Signal Source TTTR, TLCC, Memory, and buses.The interaction used with a location or transistor in PA has the tools and functions for a mapping method to establish an LM. Among other elements and components, the instructions transmitted to locations or transistors, and the memory of where the instructions occurred is one mapping method used to establish LM, that exists in PA.Reverse Binary ConversionA process of converting singular information into a binary equivalent (seen in at least Figures 12, 13, 14, and 16).Signal Source TTTRA transmitter, transceiver, transistor, or receiver that sends or receives a signal or pulse. The signal or pulse may be one of an electromagnetic, photonic, ferroelectric, magnetoelectic, or other source of a signal or pulse that is transmittable or receivable. Signal Source TTTR. may also include and or use buses and memory.TDDCMeasurable components used to establish LM.Time, Distance, Direction, Chronology, or other measurable components that can be used in any combination of their entirety. Meaning, that a given application or usage of TDDC may require one, two, three, all four components of TDDC, or any combination of the components.For instance, an application or machine requiring a computer program "X" may require the usage of Time and Distance, but not need Direction or Chronology. A machine or computer program "Y" may only need Chronology. A machine, computer program, or application "Z" may need all four components; Time, Distance, Direction, and Chronology.Time is typically the measurable amount of speed required to transmit a signal from a Signal Source TTTR to a given location or another Signal Source TTTR.Distance is typically the measurable length between transceivers, signal source transmitters and given locations or transistors. Distance may also be the length between given devices.Direction is typically the measurable pathway from a given location to another location.Chronology is typically the measurable and repeatable sequence of an initial action to a final action. It may be intentional, and only limited by imagination and it's practical implementation. It may also be random or unintentional, when measured subsequent to results of initial to final actions that lacked original intention. Chronology is unavoidable, and measurable without regard to intent.Each component of TDDC is measurable, individually, combined wholly, or in any combination its components. Their measurable attributes assist the development and production of LM. Memory is also a component of TDDC that is frequently used to assist the establishment of LM. Other measurable components may be included and used in TDDC when necessary.TLCCTelevisions, Laptops, Computers, Cellphones, or other devices. TLCC frequently includes PA.

Claims

ClaimsClaim 1 :A computer system for accelerating information processing, comprising:• (a) a processor;• (b) memory;• (c) a data storage medium configured to store data encoded in a New Binary Conversion Code (NBCC Code), wherein the NBCC Code is defined by a table that correlates numerical values with specific characters, symbols, or other data available for display;• (d) a hardware component configured to process data based on a mapping of NBCC Code values to single locations or transistor configurations;• (e) a non-transitory computer-readable medium storing instructions for performing a method of accelerating information processing, the method comprising: * (i) receiving data encoded in NBCC Code; * (ii) mapping each NBCC Code value to a single location or transistor configuration using the instructions; * (iii) processing the data based on the mapped configurations; * (iv) outputting processed data;• (f) a control unit configured to control the processing of data in accordance with the selected mapping method, wherein the mapping methods are one or more of the following:° Mapping Method 1 : A method for replacing 8-bit binary representations with single location or transistor configurations and for replacing ASCII Code with NBCC Code, implemented through computer program instructions;° Mapping Method 2: A method for establishing location mapping (LM) using a chronology defined by a top-to-bottom, left-to-right, and down pattern, similar to the English language reading sequence, and applying NBCC Code values to single locations or transistor configurations;° Mapping Method 3: A method for transferring information between computer systems using NBCC Code values and single location or transistor configurations, wherein the mapping information can be transferred without requiring initial programming instructions when two or more systems already have the same programmed abilities;° Mapping Method 4: A method for associating images with NBCC Code values by adding a direct correlation between NBCC Code values and image codes (I Code), wherein image codes are stored in a designated memory location and the image complexity can range from simple to detailed;• (g) wherein the processing and instructions are configured to reduce energy consumption by a factor of up to 8 compared to conventional systems using ASCII Code and 8-bit binary representations.• Claim 2: The computer system of Claim 1, wherein the hardware component further comprises specialized circuitry for implementing the mapping of NBCC Code values to single locations or transistor configurations.• Claim 3: The computer system of Claim 1, wherein the data storage medium is a disc, such as a CD, DVD, or hard drive.• Claim 4: The computer system of Claim 1, wherein the hardware component is configured to perform one or more operations based on the state (on or off) of the single location or transistor configuration.• Claim 5: The computer system of Claim 1, wherein the memory comprises locations or transistor configurations corresponding to NBCC Code values.• Claim 6: The computer system of Claim 1, further comprising a signal source for transmitting signals to the single locations or transistor configurations based on the mapped NBCC Code values.• Claim 7: The computer system of Claim 1, further comprising a display unit for generating a visual representation of processed data based on the mapped configurations.• Claim 8: The computer system of Claim 1, wherein the mapping method further includes a directional component for indicating a specific pathway between locations or transistor configurations.• Claim 9: The computer system of Claim 1, wherein the mapping method further includes a time component for measuring the speed of signal transmission between locations or transistor configurations.• Claim 10: The computer system of Claim 1, wherein the mapping method further includes a distance component for measuring the physical distance between locations or transistor configurations.• Claim 11 : The computer system of Claim 1, wherein the mapping method further includes a chronology component for defining a repeatable sequence of operations based on mapped locations or transistor configurations.• Claim 12: The computer system of Claim 1, wherein the mapping method further includes a combination of one or more of the time, distance, direction, and chronology components.• Claim 13: The computer system of Claim 1, further comprising a communication interface for transmitting data encoded in NBCC Code to another computer system.• Claim 14: The computer system of Claim 1, wherein the NBCC Code is used in conjunction with a mapping method that includes a combination of the time, distance, direction, and chronology components.• Claim 15: The computer system of Claim 1, wherein the NBCC Code is defined such that it can be assigned to any numerical representation, including the same numerical representations as those used in ASCII Code, allowing for a direct mapping between NBCC Code values and ASCII Code values.• Claim 16: The computer system of Claim 1, wherein the hardware component is configured to perform both forward and reverse binary conversions, wherein:• (a) forward binary conversion involves mapping the initial binary representation of data to an NBCC Code value and then mapping that NBCC Code value to a single location or transistor configuration; and• (b) reverse binary conversion involves mapping a single location or transistor configuration back to its corresponding NBCC Code value and then converting that NBCC Code value back to the initial binary representation of data.• Claim 17: The computer system of Claim 1, wherein the single location is a specifically addressable location within a memory array.• Claim 18: The computer system of Claim 1, wherein the single location or transistor configuration is a physical location on a disc.• Claim 19: The computer system of Claim 1, wherein the hardware component includes one or more of the following: microcontroller, dedicated ASIC, or main processor.• Claim 20: The computer system of Claim 1, wherein the mapping methods include a combination of any of the mapping methods 1-4.• Claim 21 : The computer system of Claim 1, wherein:• (a) the mapping of NBCC code values to single locations or transistor configurations extends into more complex three dimensions through the stacking of layers of such locations or configurations;• (b) the three-dimensional arrangement of locations or transistor configurations generates a new three-dimensional language suitable for advanced artificial intelligence applications and learning needs, and creates novel and unexplored options for public and private keys used in encryption technologies;• (c) the system is further configured to utilize said three-dimensional language in the encryption and decryption of data, by associating specific three- dimensional patterns with cryptographic keys.

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