Data access switching method and apparatus

Abstract

Disclosed are a data access switching method and apparatus, relating to the technical field of storage. In a data access process, a host establishes different paths to different controllers in a storage system, and the host stores an upgrade waiting delay time of the controller on a currently accessed path. When a current controller transmitting a data access request by the host in the storage system is about to be upgraded, the current controller instructs the host to switch to a path provided by another controller in the storage system, so that the other controller performs a data access service for the host. In this way, during an upgrade waiting delay time of the current controller, the host can continue to access data without having to wait for a long time, thereby reducing service interruption time in the host.

Description

Data access switching method and device

[0001] This application claims priority to the Chinese patent application filed with the State Intellectual Property Office on December 29, 2023, with application number 202311866601.6 and application name “A method and device for switching data access”, the entire contents of which are incorporated by reference into this application. Technical Field

[0002] The present application relates to the field of storage technology, and in particular to a data access switching method and device. Background Art

[0003] With the development of big data, artificial intelligence (AI), and cloud computing technologies, vast amounts of data are constantly being generated. For example, a storage system based on NVMe-oF (non-volatile memory express over Fabrics, NVMe-oF) includes multiple controllers and hard disks. Different controllers provide multiple access paths for hosts, each of which indicates the controller with which the host needs to communicate and the hard disks to be accessed by that controller. While the host is executing a service, if the controller in the access path currently used by the host needs to be upgraded, the host must wait for a predetermined period of time, such as an input / output (IO) timeout or a heartbeat timeout (KATO), before establishing a connection with the controller in another access path in the storage system and resuming data access for the service. However, this long wait time results in a prolonged service interruption for the host.

[0004] Summary of the Invention

[0005] The present application provides a data access switching method and device, which solves the problem of a long waiting time of a host when a controller in a storage system performs an upgrade, thereby reducing the service interruption time in the host.

[0006] This application adopts the following technical solution.

[0007] In a first aspect, the present application provides a data access switching method. The data access switching method is applied to a storage system, which includes multiple controllers and hard disks, such as the multiple controllers include a first storage controller and a second storage controller. The data access switching method includes: the first storage controller sends an identification command to the host and establishes a first path with the host; the identification command includes the upgrade waiting delay time of the first storage controller; and the first storage controller receives the first data access request of the host through the first path and executes the access indicated by the first data access request. The first storage controller sends an upgrade notification command to the host, and the upgrade notification command carries: an identifier instructing the host to send a second data access request to the second storage controller, the second data access request and the first data access request belong to the same business flow; and the first storage controller executes the upgrade process within the above-mentioned upgrade waiting delay time.

[0008] In some optional implementations, the identification command may also be referred to as a first request, a first message, or a first command, etc.; the upgrade notification command may also be referred to as a second request, a second message, or a second command, etc.

[0009] In the controller upgrade scenario in the storage system, the controller actively sends an upgrade notification command to the host. Since the upgrade notification command is used to instruct the host to send data access requests to other controllers, even if the controller with which the host is currently communicating is in the upgrade scenario, the host can respond to the upgrade notification command and send data access requests to other controllers in the storage system. That is, the host's data access service can be quickly switched from the current controller to other controllers for processing, which greatly reduces the problem in conventional technology where the host has to wait for a long time for the controller to switch to other paths, thereby reducing the service interruption time in the host.

[0010] Furthermore, since the current controller executes the upgrade process within the upgrade waiting delay time, even after the host executes data access services through other controllers and the upgrade waiting delay time has elapsed, the process of re-establishing the path between the host and the current controller will not be affected by the controller's upgrade process, thereby further reducing the service interruption time in the host. Furthermore, when the end time of re-establishing the path between the host and the current controller does not reach the aforementioned upgrade waiting delay time, the host's data access services will not be interrupted during the period when the host's data access services are switched from other controllers back to the controller after the upgrade is completed. This is conducive to achieving smooth switching of the host's data access services in the controller upgrade scenario in the storage system, thereby achieving the effect of preventing the host's data access services from falling to zero.

[0011] In combination with the data access switching method provided in the first aspect, in an optional implementation, the switching method provided in the present application also includes: after the upgrade of the first storage controller is completed, the first storage controller receives a connection establishment request from the host, and establishes a second path with the host based on the connection establishment request. In addition, the first storage controller receives a third data access request from the host through the second path, and executes the access indicated by the third data access request; the third data access request and the aforementioned second data access request belong to the same business flow. After the upgrade of the current controller is completed, the controller re-establishes a path with the host. Since the data access business of the host during the upgrade waiting delay time has been executed by other controllers, the business interruption time in the host is reduced, avoiding the problem of the host waiting time being long in the controller upgrade scenario.

[0012] In the second aspect, the present application provides another data access switching method. The data access switching method is executed by the host, and the data access switching method includes: the host receives the identification command of the first storage controller and the identification command of the second storage controller in the storage system, and establishes a first path with the first storage controller and a second path with the second storage controller; the identification command of the first storage controller includes the upgrade waiting delay time of the first storage controller. The host sends a first data access request to the first storage controller through the first path. In addition, the host sends the first data access request to the first storage controller through the first path, and receives the upgrade notification command sent by the first storage controller, the upgrade notification command carries: an identifier instructing the host to send a second data access request to the second storage controller, and the second data access request and the first data access request belong to the same business flow. Finally, the host responds to the upgrade notification command and sends a second data access request to the second storage controller through the second path.

[0013] In a controller upgrade scenario within a storage system, the host switches the path of data access requests from the path provided by the current controller to a path provided by another controller based on the current controller's upgrade notification command. This allows the host's data access services to be quickly switched from the current controller to the other controller for processing. This significantly reduces the issue of conventional technologies requiring the host to wait for a long time before switching to another path, thereby reducing service interruption time for the host. Furthermore, since the current controller executes the upgrade process within the upgrade wait delay time, even after the host executes data access services through another controller for the upgrade wait delay time, the process of re-establishing the path between the host and the current controller will not be affected by the controller's upgrade process, further reducing service interruption time for the host.

[0014] In addition, when the end time of the host re-establishing the path with the current controller does not reach the above-mentioned upgrade waiting delay time, the host's data access service will not be interrupted during the period when the host's data access service is switched from other controllers back to the controller after the upgrade is completed. This is conducive to achieving smooth switching of the host's data access service in the controller upgrade scenario in the storage system, thereby achieving the effect of the host's data access service not falling to zero.

[0015] In combination with the data access switching method provided in the second aspect, in an optional implementation, the switching method provided in the present application further includes: after the host sends a second data access request to the second storage controller via the second path, the data access switching method provided in the present application further includes: the host waits for the upgrade wait delay time of the first storage controller, sends a connection establishment request to the first storage controller and establishes a third path with the first storage controller; and, the host sends a third data access request to the first storage controller via the third path, and the third data access request and the second data access request belong to the same business flow. After the current controller upgrade is completed, the host re-establishes a path with the controller. Since the data access business of the host within the upgrade wait delay time has been executed by other controllers, the business interruption time in the host is reduced, avoiding the problem of the host waiting time being long in the controller upgrade scenario.

[0016] In combination with the data access switching method provided in the first aspect and the second aspect, in an optional implementation method, the above-mentioned upgrade waiting delay time is the control upgrade waiting delay time, the above-mentioned upgrade notification command is the asynchronous event information notification command, and the above-mentioned identifier is the control upgrade start identifier.

[0017] In combination with the data access switching method provided in the first aspect and the second aspect, in an optional implementation, the tail of the above-mentioned identification command includes a first reserved field, and the first reserved field is used to carry the aforementioned control upgrade waiting delay time.

[0018] In combination with the data access switching method provided by the first aspect and the second aspect, in an optional implementation, bytes 1806-1807 in the identification command are used to carry the aforementioned control upgrade waiting delay time.

[0019] In combination with the data access switching method provided in the first aspect and the second aspect, in an optional implementation, the upgrade notification command (asynchronous event information notification command) includes a second reserved field, and the second reserved field is used to carry a control upgrade start identifier.

[0020] In combination with the data access switching method provided by the first aspect and the second aspect, in an optional implementation manner, the value of the second reserved field is F1h.

[0021] In a third aspect, the present application provides a data access switching device, which is applied to a first storage controller in a storage system and includes a module or unit for executing the first aspect or any optional implementation of the first aspect.

[0022] Exemplarily, the switching device includes: a transceiver module, an execution module, and an upgrade module. The transceiver module is configured to send an identification command to a host and establish a first path with the host; the identification command includes an upgrade wait delay time; the execution module is configured to receive a first data access request from the host via the first path and execute the access indicated by the first data access request; the transceiver module is further configured to send an upgrade notification command to the host, the upgrade notification command carrying an identifier instructing the host to send a second data access request to a second storage controller in the storage system, the second data access request and the first data access request belonging to the same service flow; and the upgrade module is configured to execute the upgrade process within the upgrade wait delay time.

[0023] In a fourth aspect, the present application provides another data access switching device, which is applied to a host and includes a module or unit for executing the second aspect or any optional implementation of the second aspect.

[0024] Exemplarily, the switching device includes: a receiving module and a sending module. The receiving module is used to receive an identification command of the first storage controller and an identification command of the second storage controller in the storage system, and to establish a first path with the first storage controller and a second path with the second storage controller; the identification command of the first storage controller includes the upgrade waiting delay time of the first storage controller. The sending module is used to send a first data access request to the first storage controller through the first path. The receiving module is also used to receive an upgrade notification command sent by the first storage controller, and the upgrade notification command carries: an identifier instructing the host to send a second data access request to the second storage controller, and the second data access request and the first data access request belong to the same business flow. The sending module is also used to respond to the upgrade notification command and send a second data access request to the second storage controller through the second path.

[0025] In a fifth aspect, the present application provides a controller. The controller includes a control circuit and an interface circuit. The interface circuit is configured to send an identification command and, in conjunction with the control circuit, implement the functions of the controller (e.g., the first storage controller or the second storage controller) in any optional implementation of the first or second aspects.

[0026] In a sixth aspect, the present application provides a storage system. The storage system comprises: a hard disk and multiple controllers provided in the fifth aspect. The hard disk is used to store data; the controller is used to receive data access requests for the aforementioned data and, in conjunction with the hard disk, implement the method of the first aspect or any optional implementation of the first aspect.

[0027] In a seventh aspect, the present application provides a host. The host includes a processor and a transceiver. The transceiver is configured to receive an identification command and collaborate with the processor to implement the method of the second aspect or any optional implementation of the second aspect.

[0028] In an eighth aspect, the present application provides a data access system. The data access system includes: the storage system provided in the sixth aspect, and the host provided in the seventh aspect. The host and the storage system communicate via a wired or wireless connection and collaboratively implement the method of any optional implementation of the first or second aspect.

[0029] In a ninth aspect, the present application provides a readable storage medium. The readable storage medium includes a computer program or instructions. When the computer program or instructions are executed on an electronic device, the electronic device executes the method in the first aspect or any optional implementation of the first aspect, or the method in the second aspect or any optional implementation of the second aspect. The electronic device may be the controller, storage system, host, or the like described above.

[0030] In a tenth aspect, the present application provides a computer program product. The computer program product includes a computer program or instructions. When the computer program or instructions are executed on an electronic device, the electronic device performs the method in the first aspect or any optional implementation of the first aspect, or the method in the second aspect or any optional implementation of the second aspect. The electronic device may be the controller, storage system, host, or the like described above.

[0031] Regarding the beneficial effects of the technical solutions provided in aspects 3 to 10, reference may be made to the description of any optional implementation in aspects 1 or 2, and no further description is given here. Based on the implementations provided in the above aspects, this application can also be further combined to provide more implementations. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] FIG1 is a schematic diagram of the structure of a data access system provided by this application;

[0033] FIG2 is a flow chart of a data access switching method provided by the present application;

[0034] FIG3 is a second flow chart of a data access switching method provided by the present application;

[0035] FIG4 is a third flow chart of a data access switching method provided by the present application;

[0036] FIG5 is a first structural diagram of a data access switching device provided by the present application;

[0037] FIG6 is a second structural diagram of a data access switching device provided by the present application;

[0038] FIG7 is a schematic diagram of the structure of a host provided in this application. DETAILED DESCRIPTION

[0039] The present application provides a data access switching method. During the data access process, different paths are established between a host and different controllers in a storage system, and the host stores an upgrade wait delay time for the controller on the currently accessed path. When the current controller transmitting the host's data access request in the storage system is about to be upgraded, the current controller notifies the host to switch to the path provided by another controller in the storage system, and the other controller performs the host's data access service. In this way, the host does not need to wait for a long time during the upgrade wait delay time of the current controller, thereby reducing service interruption time in the host.

[0040] Specifically, in a controller upgrade scenario in a storage system, the controller actively sends an asynchronous event information notification command to the host. Since the asynchronous event information notification command is used to instruct the host to send data access requests to other controllers, even if the controller with which the host is currently communicating is in an upgrade scenario, the host can respond to the asynchronous event information notification command to send data access requests to other controllers in the storage system, that is, the host's data access service can be quickly switched from the current controller to other controllers for processing, which greatly reduces the problem in conventional technologies that the host has to wait for a long time for the controller to switch to other paths, thereby reducing the service interruption time in the host. Moreover, since the current controller executes the upgrade process within the (control) upgrade waiting delay time, even after the time for the host to execute the data access service through other controllers reaches the (control) upgrade waiting delay time, the process of the host and the current controller re-establishing the path will not be affected by the controller's upgrade process, thereby further reducing the service interruption time in the host. In addition, when the end time of the host re-establishing the path with the current controller does not reach the above-mentioned (control) upgrade waiting delay time, the host's data access service will not be interrupted during the period when the host's data access service is switched from other controllers back to the controller after the upgrade is completed. This is conducive to achieving smooth switching of the host's data access service in the controller upgrade scenario in the storage system, thereby achieving the effect of the host's data access service not falling to zero.

[0041] The technical solutions involved in this application may be applicable not only to current storage technologies or storage standards, but also to future storage technologies or storage standards. The terms used in the implementation methods of this application are only used to explain the specific embodiments of this application and are not intended to limit this application. The following is a brief introduction to some concepts that may be involved in this application.

[0042] Non-volatile memory (NVM): Computer memory that has the characteristics of non-volatility, byte-by-byte access, high storage density, low energy consumption, and the stored data does not disappear when the current is turned off.

[0043] Non-volatile memory express (NVMe): This is a standard interface protocol developed for the Peripheral Component Interconnect Express (PCIe) protocol. It removes the various restrictions imposed on SSDs by the old standard, supports most operating systems, and has good scalability.

[0044] To ensure clarity and brevity in the description of the following embodiments, we first introduce the data access system and storage system applicable to this application. As shown in Figure 1 , Figure 1 is a schematic diagram of the structure of a data access system provided by this application. The data access system includes a data access device 100 and a storage device 120. In the application scenario shown in Figure 1 , users access data through applications. The computers running these applications can be referred to as "computing devices."

[0045] The data access device 100 may be a physical machine or a virtual machine. The physical machine may include but is not limited to: one or both of a user terminal and a smart network interface card (smart NIC).

[0046] For example, the data access device 100 includes a user end, which may be a client, such as a host, a desktop computer, a server, a notebook computer, a mobile device, and the like.

[0047] For another example, the data access device 100 includes a smart network card (smart NIC). The smart network card, also known as an intelligent network adapter, not only can complete the network transmission function of a standard network card, but also provides a built-in programmable and configurable hardware acceleration engine to improve the performance of applications and significantly reduce the CPU consumption of the host connected to the smart network card in communication, providing more CPU resources for applications. For example, in a highly virtualized environment, the CPU in the host needs to run tasks related to the open virtual switch (OVS). At the same time, the CPU in the host also needs to process storage, online encryption and decryption of data packets or offline encryption and decryption, deep inspection of data packets, firewalls, complex routing and other operations. These operations not only consume a large amount of CPU resources, but also due to the competition for CPU resources between different services, the performance of the service cannot be optimized. As a hub connecting various services, the smart network card accelerates the above services on the smart network card.

[0048] For another example, the data access device 100 includes a client and a smart network card.

[0049] In a possible example, the data access device 100 accesses the storage device 120 through a network to access data. For example, the network may include a switch 110 .

[0050] In another possible example, the data access device 100 may also communicate with the storage device 120 through a wired connection, such as a universal serial bus (USB), a peripheral component interconnect express (PCIe) bus, or other wired connections.

[0051] The storage device 120 shown in Figure 1 can be a centralized storage system. A centralized storage system is characterized by a unified entry point through which all data from external devices must pass. This entry point is the centralized storage system's engine 121. Engine 121 is the core component of the centralized storage system, implementing many of the system's advanced functions.

[0052] As shown in Figure 1, there may be one or more controllers in the engine 121. Figure 1 illustrates the example of an engine 121 including two controllers (such as controller 0 and controller 1 in Figure 1). In one possible example, if the engine 121 has multiple controllers, there may be a mirror channel between any two controllers to achieve the function of backing up any two controllers to each other, thereby avoiding the unavailability of the entire storage device 120 due to hardware failure. In some examples, the controller in the storage device may also be referred to as a storage controller, which is not limited in this application. It should be understood that if the engine 121 includes multiple controllers, the engine 121 may also be referred to as the array controller of the storage device 120.

[0053] The engine 121 further includes a front-end interface 1211 and a back-end interface 1214. The front-end interface 1211 is used to communicate with the data access device 100, thereby providing data access services for the data access device 100. The back-end interface 1214 is used to communicate with the hard disk to expand the capacity of the storage device 120. Through the back-end interface 1214, the engine 121 can connect to more hard disks, thereby forming a very large storage resource pool.

[0054] In terms of hardware, as shown in FIG1 , the controller 0 includes at least a processor 1212 and a memory 1213. The processor 1212 is a central processing unit (CPU) that is used to process data access requests from outside the storage device 120 (server or other storage system), and is also used to process requests generated within the storage device 120. Exemplarily, when the processor 1212 receives write data requests sent by the data access device 100 through the front-end interface 1211, it temporarily stores the data in these write data requests in the memory 1213. When the total amount of data in the memory 1213 reaches a certain threshold, the processor 1212 sends the data stored in the memory 1213 to at least one of the mechanical hard disk 1221, the mechanical hard disk 1222, the solid state drive (SSD) 1223, or the other hard disk 1224 through the back-end port for persistent storage.

[0055] Memory 1213 refers to an internal memory that directly exchanges data with the processor. It can read and write data at any time and at a high speed, and serves as a temporary data storage for the operating system or other running programs. Memory includes at least two types of memory. For example, memory can be either random access memory or read-only memory (ROM). For example, random access memory is DRAM or SCM. DRAM is a semiconductor memory that, like most random access memories (RAM), is a volatile memory device. However, DRAM and SCM are only exemplary in this embodiment. Memory can also include other random access memories, such as static random access memory (SRAM). As for read-only memory, for example, it can be programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), etc.

[0056] In addition, the memory 1213 can also be a dual in-line memory module or a dual in-line memory module (DIMM), that is, a module composed of dynamic random access memory (DRAM), or an SSD. In actual applications, multiple memories 1213 and different types of memories 1213 can be configured in the controller 1. This embodiment does not limit the number and type of memory 1213. In addition, the memory 1213 can be configured to have a power-saving function. The power-saving function means that when the system loses power and then powers on again, the data stored in the memory 1213 will not be lost. A memory with a power-saving function is called a non-volatile memory.

[0057] Memory 1213 stores software programs, and processor 1212 executes the software programs in memory 1213 to manage the hard disks. For example, the hard disks can be abstracted into a storage resource pool, which is then provided to the server in the form of a logical unit number (LUN). The LUN in this context is actually the hard disk seen by the server. Of course, some centralized storage systems are also file servers, providing shared file services to the server.

[0058] As shown in Figure 1, in this system, the engine 121 may not have a hard disk slot, and the hard disk needs to be placed in the hard disk frame 122, and the back-end interface 1214 communicates with the hard disk frame 122. The back-end interface 1214 exists in the engine 121 in the form of an adapter card. Two or more back-end interfaces can be used simultaneously on one engine 121 to connect multiple hard disk frames. Alternatively, the adapter card can also be integrated on the motherboard, in which case the adapter card can communicate with the processor 1212 via the PCIe bus. For example, controller 1 includes a front-end interface 1215, a processor 1216, a memory 1217, and a back-end interface 1218. For the hardware implementation of controller 1, please refer to the content of controller 0, which will not be repeated here.

[0059] It should be noted that FIG1 shows one engine 121 , however, in actual applications, the storage system may include two or more engines 121 , with redundancy or load balancing being performed between the multiple engines 121 .

[0060] The hard disk enclosure 122 includes a control unit 1225 and several hard disks. The control unit 1225 can have various forms. In one case, the hard disk enclosure 122 is an intelligent disk enclosure, as shown in Figure 1. The control unit 1225 includes a CPU and memory. The CPU is used to perform operations such as address translation and reading and writing data. The memory is used to temporarily store data to be written to the hard disk or read from the hard disk to be sent to the controller. In another case, the control unit 1225 is a programmable electronic component, such as a data processing unit (DPU). The DPU has the versatility and programmability of a CPU, but is more specialized and can efficiently operate on network data packets, storage requests, or analysis requests. The DPU is distinguished from the CPU by its high degree of parallelism (it needs to process a large number of requests). Optionally, the DPU can be replaced with a processing chip such as a graphics processing unit (GPU) or an embedded neural network processing unit (NPU). Typically, the number of control units 1225 can be one, two, or more. The functions of the control unit 1225 can be offloaded to the network interface card 1226. In other words, in this embodiment, the hard disk frame 122 does not have a control unit 1225 inside, but the network card 1226 completes data reading and writing, address conversion and other computing functions. At this time, the network card 1226 is an intelligent network card. It can include a CPU and memory. The CPU is used to perform operations such as address conversion and reading and writing data. The memory is used to temporarily store data to be written to the hard disk, or data read from the hard disk to be sent to the controller. It can also be a programmable electronic component, such as a DPU. There is no ownership relationship between the network card 1226 and the hard disk in the hard disk frame 122. The network card 1226 can access any hard disk in the hard disk frame 122 (such as the mechanical hard disk 1221, mechanical hard disk 1222, solid-state drive 1223 and other hard disks 1224 shown in Figure 1), so it is more convenient to expand the hard disk when storage space is insufficient.

[0061] According to the type of communication protocol between the engine 121 and the hard disk frame 122, the hard disk frame 122 may be a serial attached small computer system interface (SAS) hard disk frame, or it may be an NVMe hard disk frame or other types of hard disk frames. The SAS hard disk frame adopts the SAS3.0 protocol, and each frame supports 25 SAS hard disks. The engine 121 is connected to the hard disk frame 122 through an onboard SAS interface or a SAS interface module. The NVMe hard disk frame is more like a complete computer system, and the NVMe hard disk is inserted into the NVMe hard disk frame. The NVMe hard disk frame is then connected to the engine 121 through the RDMA port (or RDMA interface).

[0062] For example, the storage device 120 may refer to a storage array, such as an all-flash storage array in which all storage media are flash memories.

[0063] In an optional implementation, storage device 120 is a centralized storage system with integrated disk and controller. Storage device 120 does not include the aforementioned disk enclosure 122. Instead, engine 121 manages multiple hard disks connected via disk slots. The functions of the disk slots can be implemented by backend interface 1214 or backend interface 1218.

[0064] In another optional implementation, the storage device 120 shown in FIG1 is a distributed storage system comprising a computing device cluster and a storage device cluster. The computing device cluster includes one or more computing devices, each of which can communicate with each other. The computing device can be a computing device, such as a server, desktop computer, or storage array controller. In terms of hardware, the computing device can include a processor, memory, and a network interface card. The processor is a CPU, which processes data access requests from outside the computing device or requests generated within the computing device. For example, when the processor receives a write data request from a user, it temporarily stores the data in the write data request in memory. When the total amount of data in memory reaches a certain threshold, the processor sends the data stored in memory to the storage device for persistent storage. In addition, the processor is used to perform data calculations or processing, such as metadata management, data deduplication, data compression, virtualized storage space, and address translation. In one example, any computing device can access any storage device in the storage device cluster via a network. The storage device cluster includes multiple storage devices. A storage device includes one or more controllers, a network interface card, and multiple hard disks. The network interface card is used to communicate with the computing device.

[0065] It is worth noting that the above examples are merely possible implementations of the data access system provided in this embodiment and should not be construed as limiting the present application. It is understood that in the storage device 120 shown in FIG1 , data can be stored in the form of files on each hard disk. The files stored on each hard disk constitute a file storage system, which can be, for example, a distributed file system. For example, a Network File System (NFS) is both a distributed file system and a network protocol used to access and share files between devices on the same local area network. For example, a NAS system can be implemented using the NFS protocol. The Network File System is a low-cost network file sharing option that enables users and applications to access, store, and update files on remote computers, much like using direct-attached storage. The Network File System uses the Remote Procedure Call protocol to route requests between clients and servers. While participating devices must support the Network File System, they do not need to understand the detailed network information. It is worth noting that remote procedure calls can be insecure, so the Network File System should only be deployed on trusted networks behind firewalls. Although Windows supports this protocol, it is primarily used in Linux environments.

[0066] The following is an exemplary description of the data access switching method provided by the present application based on FIG1 , as shown in FIG2 , which is a flow chart diagram of a data access switching method provided by the present application. A host 21 can be used to implement the functions of the data access device 100 in FIG1 , and a storage system 22 can be used to implement the functions of the storage device 120 in FIG1 . The storage system 22 includes multiple controllers, such as controller 221 that can implement the functions of controller 0 in FIG1 , and controller 222 that can implement the functions of controller 1 in FIG1 . The hardware implementation of the host 21 and the storage system 22 can be referred to the relevant description of FIG1 , and will not be elaborated here.

[0067] In this embodiment, the controller 221 may also be referred to as the first controller, the first storage controller, the current controller that executes the upgrade process, the current storage controller, and the controller 222 may also be referred to as the second controller, the second storage controller, the backup controller for the host 21 to access the storage system 22, or other controller, etc.

[0068] Please refer to FIG. 2 . The data access switching method provided in this application includes the following steps S210 to S250 .

[0069] S210 , the controller 221 sends an identification command to the host and establishes path 1 with the host.

[0070] Corresponding to the process of S210 , the host receives the identification command of the controller 221 and the identification command of the controller 222 in the storage system, and establishes path 1 with the controller 221 .

[0071] In some optional implementations, the identification command is also called an identification message, an authentication command, an authentication message, a first command, a first message, a first request, or other names.

[0072] In this embodiment, the identification command of the controller 221 includes the upgrade wait delay time of the controller 221, and the upgrade wait delay time represents the upgrade wait time of the controller, such as the time difference between the start time and the end time of the controller executing the upgrade process. In some feasible examples, the upgrade wait delay time is also called the control upgrade wait delay time (controller update wait delay time / ctrl update wait delay time), controller upgrade wait delay time, control upgrade wait delay, control upgrade wait delay, or other names, which are not limited in this application.

[0073] Optionally, the tail of the identification command includes a first reserved field, which is used to carry the above-mentioned control upgrade wait delay time. In some optional implementations, the first reserved field can also be called a ctrl update wait delay time field.

[0074] Table 1 below provides a possible example of what each byte in the identification command represents.

[0075] Table 1 Identification command: Identification controller data structure, independent setting of I / O commands

[0076] Table 1 only shows the data structure starting from byte 544. The first reserved field may refer to bytes 1806-1807 in the identification command, i.e., the first two bytes in bytes 2047:1806. In this example, the identification command is counted from byte 0. If the identification command is counted from byte 1, the first reserved field may refer to bytes 1807-1808 in the identification command.

[0077] Exemplarily, bytes 1806-1807 in the identification command (ie, the reserved field in the last row of Table 1) may be used to carry the aforementioned control update wait delay time (ctrl update wait delay time).

[0078] In this embodiment, a reserved field (or reserved field) in the identification command is used to carry the control upgrade wait delay time (ctrl update wait delay time) provided in this application, so that the control upgrade wait delay time can be aligned between the host and the controller, thereby providing effective support for the service switching in the host in the subsequent controller upgrade scenario without falling to zero.

[0079] Path 1 established between the host and controller 221 may refer to a first access path or a first path used by the host to access data from a hard disk in storage system 22. Path 1 includes controller 221 and the hard disk to be accessed by controller 221. In some optional implementations, path 1 may also be referred to as connection 1 (association_1) between host 21 and controller 221.

[0080] In addition, the host 21 may also establish path 2 with the controller 222. Path 2 may refer to a second access path or a second path used by the host to access data on the hard disks in the storage system 22. Path 2 includes the controller 222 and the hard disks to be accessed by the controller 222. In some optional implementations, path 2 may also be referred to as association 2 (association_2) between the host 21 and the controller 222. During the establishment of path 2, the controller 222 sends an identification command to the host 21. The identification command carries the (control) upgrade wait delay time of the controller 222. For specific implementation, refer to the establishment process of path 1 and will not be described in detail here.

[0081] S220 : The host 21 sends a first data access request to the controller 221 through path 1 .

[0082] Correspondingly, the controller 221 receives the first data access request from the host through path 1 and performs the access indicated by the first data access request.

[0083] The first data access request refers to a data access request sent by the host when executing a data access service.

[0084] For example, if the first data access request is a write request, then the first data access request carries data to be written to the hard disk in the storage system 22 . The access indicated by the first data access request executed by the controller 221 is: writing the data carried by the first data access request to the hard disk.

[0085] For another example, if the first data access request is a read request, then the first data access request carries the storage address of the data to be read from the hard disk in the storage system 22. The access indicated by the first data access request executed by the controller 221 is: read the data stored at the storage address in the hard disk according to the storage address carried by the first data access request, and feed the read data back to the host 21.

[0086] In some feasible examples, the data access request provided in this application may also be called a data request, a service request, a service message, an access request or other names, etc., and this application does not limit this.

[0087] S230: The controller 221 sends an upgrade notification command to the host.

[0088] Correspondingly, the host 21 receives the upgrade notification command sent by the controller 221 .

[0089] In some optional implementations, the upgrade notification command is also called an upgrade notification message, an asynchronous event information notification command (asynchronous event information notice command), an asynchronous event information notification message, an asynchronous event (asynchronous event, AEN) message, an AEN command, a second command, a second message, a second request or other names, etc.

[0090] In this embodiment, the upgrade notification command from controller 221 carries an identifier instructing host 21 to send a second data access request to controller 22. In some cases, the identifier is a control update starting identifier (controller update starting / ctrl update starting). Assuming that the upgrade notification command is an asynchronous event information notification command, the asynchronous event information notification command carries the control update starting identifier, which instructs host 21 to send a second data access request to controller 222, and the second data access request and the first data access request belong to the same service flow.

[0091] In some feasible situations, the control upgrade start flag also indicates that the controller 221 has started an upgrade event, such as the controller 221 has started executing an upgrade process or is about to start executing an upgrade process. In some feasible examples, the control upgrade start flag may also be called a controller upgrade start flag, a controller (device) upgrade start flag, a controller (device) upgrade start flag, or other names, which are not limited in this application.

[0092] The service flow provided by this embodiment may include but is not limited to: multimedia streams such as audio streams and video streams, I / O streams to be accessed by the host, etc. For example, taking the service flow as an I / O stream as an example, the second data access request and the first data access request belong to the same service flow, which means that the host 21 needs to send multiple data access requests to implement the data access service, and these multiple data access requests belong to the same data access service, such as the storage areas to be accessed by these multiple data access requests belong to the same hard disk, the same disk, or the storage space indicated by the same logical unit number (LUN). If the data access service corresponds to an I / O stream, the first data access request and the second data access request are both I / O requests in the I / O stream. Regarding the feasible implementation method of the type of the second data access request, please refer to the description of the first data access request above, which will not be repeated here.

[0093] Optionally, the asynchronous event information notification command includes a second reserved field for carrying the aforementioned control upgrade start identifier. Exemplarily, the value of the second reserved field is F1h, indicating that controller 221 has initiated an upgrade event, such as when controller 221 has begun executing an upgrade process. Thus, the asynchronous event information notification command may also be referred to as an upgrade notification command for controller 221.

[0094] Table 2 below provides a possible example of the meanings of different values ​​in the asynchronous event information notification command.

[0095] Table 2 Asynchronous event information notification commands

[0096] Among them, the above F1h is only an optional value of the second reserved field provided in this embodiment. In some optional implementations, other values ​​can also be used to indicate that the controller 221 starts the upgrade event, such as other values ​​between F2h and FFh. This application is not limited to this.

[0097] S240 , the host 21 responds to the upgrade notification command and sends a second data access request to the controller 222 through path 2 .

[0098] Correspondingly, the controller 222 receives the second data access request from the host 21 through the path 2 .

[0099] The specific implementation of the second data access request may refer to the description of the first data access request, which will not be repeated here.

[0100] In the controller upgrade scenario in the storage system, the controller actively sends an upgrade notification command (asynchronous event information notification command) to the host. Since the upgrade notification command is used to instruct the host to send data access requests to other controllers, even if the controller with which the host is currently communicating is in an upgrade scenario, the host can respond to the upgrade notification command and send data access requests to other controllers in the storage system. That is, the host's data access service can be quickly switched from the current controller to other controllers for processing, which greatly reduces the problem in conventional technology where the host has to wait for a long time for the controller to switch to other paths, thereby reducing the service interruption time in the host.

[0101] S250 : The controller 221 executes the upgrade process within the upgrade waiting delay time.

[0102] Since the current controller executes the upgrade process within the upgrade waiting delay time, even after the time the host takes to perform data access services through other controllers reaches the upgrade waiting delay time, the process of the host re-establishing the path with the current controller will not be affected by the controller's upgrade process, thereby further reducing the service interruption time in the host.

[0103] In addition, when the end time of the host re-establishing the path with the current controller does not reach the above-mentioned upgrade waiting delay time, the host's data access service will not be interrupted during the period when the host's data access service is switched from other controllers back to the controller after the upgrade is completed. This is conducive to achieving smooth switching of the host's data access service in the controller upgrade scenario in the storage system, thereby achieving the effect of the host's data access service not falling to zero.

[0104] With respect to the example in FIG. 2 above, this embodiment further provides a possible specific example, as shown in FIG. 3 , which is a second flow diagram of a data access switching method provided by this application. FIG. 3 illustrates an example in which the storage system 22 in FIG. 2 is a non-volatile memory subsystem (NVM subsystem). The hardware implementation of the host 21, controller 221, and controller 222 can be referred to the description in the previous embodiment and will not be elaborated on here.

[0105] Please refer to FIG3 . The switching method provided in this embodiment includes the following steps ① to ④.

[0106] ①. The controller 221 starts the upgrade.

[0107] The upgrade can be started by informing the host 21 through a command, as shown in the following ②.

[0108] ②. The controller 221 sends an abnormal event information notification command (AEN command) to the host 21.

[0109] In this example, the controller 221 notifies the host 21 through an AEN notice event (the event is indicated by an AEN command): the controller 221 starts the upgrade. The specific implementation of the AEN command can be referred to the description of S230 above, which will not be repeated here.

[0110] ③. The host 21 responds to the AEN command and lowers the level of the controller 221.

[0111] Exemplarily, the host 21 downgrades the path 1 provided by the controller 221 or sets the path 1 to a failed state, and starts to establish a new path (or connection) with the controller 221 after controlling the upgrade waiting delay time.

[0112] ④. The host 21 uses the path 2 provided by the controller 222 to smoothly switch the data access service in the NVM subsystem.

[0113] In this way, the data access service to be executed by the host 21 can be smoothly switched from the controller 221 to other controllers, so that the NVM subsystem can continuously execute the data access service, thereby achieving the effect of not dropping the data access service of the host to zero.

[0114] In an optional implementation, to restore the access path between host 21 and storage system 22 to the communication state before the controller upgrade, thereby rationally utilizing the controller resources in storage system 22, the present embodiment further provides a feasible example based on Figures 2 and 3 , as shown in Figure 4 , which is a flow chart diagram of a data access switching method provided by the present application. The hardware implementation of host 21, controller 221, and controller 222 can be found in the description of the aforementioned embodiment and will not be elaborated upon here.

[0115] Referring to FIG. 4 , after the controller 221 is upgraded, the switching method provided in this embodiment includes the following steps S261 to S263 .

[0116] S261 , the host 21 waits for the upgrade waiting delay time of the controller 221 , sends a connection establishment request to the controller 221 , and establishes path 3 with the controller 221 .

[0117] The connection establishment request instructs the host 21 to reconnect the access path with the controller 221, so that the data access service to be executed by the host 21 is switched from other controllers back to the controller 221. In some feasible scenarios, the connection establishment request is also referred to as a connection request, a connection establishment request, a path establishment request, a path request, a path establishment request, a third request, or other names, which are not limited in this application.

[0118] Corresponding to the process of S261 , the controller 221 receives the connection establishment request from the host, and establishes the path 3 with the host 21 according to the connection establishment request.

[0119] In this example, path 3 may refer to a third access path or a third path used by the host to access data from the hard disks in storage system 22. Path 3 includes controller 221 and the hard disks to be accessed by controller 221. In some optional implementations, path 3 may also be referred to as association 3 (association_3) between host 21 and controller 221. During the establishment of path 3, controller 221 sends an identification command to host 21. This identification command carries the (control) upgrade wait delay time for controller 221. The specific implementation can be referred to as the establishment process of path 1 and is not further described here.

[0120] S262 : The host 21 sends a third data access request to the controller 221 through path 3 .

[0121] The third data access request and the second data access request belong to the same service flow. For example, host 21 needs to send multiple data access requests to implement a data access service. These multiple data access requests belong to the same data access service. If the data access service corresponds to an I / O flow, the third data access request and the second data access request are both I / O requests in the I / O flow.

[0122] S263. The controller 222 of the host 21 receives the third data access request from the host through the path 2, and performs the access indicated by the third data access request.

[0123] Regarding feasible implementation methods of the third data access request type, reference may be made to the description of the first data access request, which will not be elaborated here.

[0124] After the current controller upgrade is completed, the controller re-establishes a path with the host. Since the host's data access services during the current controller upgrade waiting delay time have been executed by other controllers, the service interruption time in the host is reduced, avoiding the problem of the host waiting time being long in the controller upgrade scenario.

[0125] It is worth noting that S261 to S263 provided in this embodiment are executed after the upgrade of the controller 221 is completed, but can also be executed after the host 21 waits for the control upgrade wait delay time (ctrl update wait delay time). The difference between the two is that the former can be triggered by the controller 221 actively sending a response message of the upgrade completion to the host 21, and the latter is triggered by the timer in the host 21 after waiting for the ctrl update wait delay time. Both can reduce the service interruption time in the host and avoid the problem of the host waiting time being long in the controller upgrade scenario.

[0126] In summary, during the negotiation phase between the storage system and the host, the storage system can indicate to the host that the storage system supports the smooth switching function for service upgrades, as well as the maximum time supported for control upgrades (upgrade waiting delay time); and in the controller upgrade scenario, the controller proactively sends an asynchronous event (such as the aforementioned AEN command) to the host before the upgrade to notify the host to switch paths, and then reset the current controller for the upgrade. Since the services in the host do not need to wait for a preset time to expire, such as an IO timeout or KATO, it ensures that the services in the host are unaware of the controller upgrade process in the storage system. Finally, after the upgrade time window (control upgrade waiting delay time) of the current controller expires, the host re-initiates the link establishment and path recovery processing with the original path. Through the above handshake mechanism between the storage system and the host, it can be ensured that each controller in the storage system is upgraded in a rolling manner, and that the services in the host never drop to zero.

[0127] For example, when the storage system refers to an NVM subsystem including multiple controllers (or multiple controller nodes / control nodes), the host establishes multiple paths in the form of connections with the multiple controllers respectively. These multiple paths can be used by the host to perform data access services on the NVM subsystem, so that the host can realize multi-path management and smooth switching of services in the controller scenario through the NVMe protocol stack in the NVM subsystem.

[0128] In the accompanying drawings corresponding to the above embodiments, only one data access device and host are shown. However, in some optional implementations, the storage system can be provided for access by multiple different data access devices or hosts, which can still implement the data access switching method provided in this application and will not be described in detail here.

[0129] It is understood that in order to implement the functions in the above embodiments, the host and storage system include hardware structures and / or software modules corresponding to the execution of each function. Those skilled in the art should readily appreciate that, in combination with the units and method steps of each example described in the embodiments disclosed in this application, this application can be implemented in the form of hardware or a combination of hardware and computer software. Whether a function is executed in hardware or in a manner driven by computer software depends on the specific application scenario and design constraints of the technical solution.

[0130] The data access switching method provided by this embodiment is described in detail above with reference to the accompanying drawings. The data access switching device provided by this embodiment will be described below with reference to FIG. 5 and FIG. 6 .

[0131] Figure 5 is a schematic diagram of the structure of a data access switching device provided by this application. The switching device 500 can be used to implement the functions of the controller in the above-mentioned method embodiment, thereby also achieving the beneficial effects of the above-mentioned method embodiment. In this embodiment, the switching device 500 can be controller 0 or controller 1 as shown in Figure 1, or it can be controller 221 or controller 222 provided in subsequent embodiments. It should be understood that the switching device 500 can also be a module (such as a chip) applied to any of the aforementioned controllers.

[0132] Exemplarily, the switching device 500 includes: a transceiver module 510, an execution module 520 and an upgrade module 530. The transceiver module 510 is used to send an identification command to the host and establish a first path with the host. The identification command includes an upgrade waiting delay time. The execution module 520 is used to receive a first data access request from the host through the first path and execute the access indicated by the first data access request. The transceiver module 510 is also used to send an upgrade notification command (asynchronous event information notification command) to the host, and the upgrade notification command carries: an identifier instructing the host to send a second data access request to the second storage controller in the storage system, and the second data access request and the first data access request belong to the same business flow. The upgrade module 530 is used to execute the upgrade process within the upgrade waiting delay time.

[0133] The transceiver module 510, the execution module 520, the upgrade module 530, and other possible modules can collaboratively implement the various steps of the controller in the above-mentioned method embodiment. A more detailed description of the transceiver module 510, the execution module 520, and the upgrade module 530 can be directly obtained by referring to the relevant description of the controller in the method embodiment shown in the above figures, and will not be repeated here.

[0134] FIG6 is a second schematic diagram of the structure of a data access switching device provided by this application. This switching device 600 can be used to implement the functions of the host in the above-mentioned method embodiments, thereby also achieving the beneficial effects of the above-mentioned method embodiments. In this embodiment, the switching device 600 can be the data access device 100 shown in FIG1 , or it can be a host provided in subsequent embodiments. It should be understood that the switching device 600 can also be a module (e.g., a chip) applied to any of the aforementioned hosts.

[0135] Exemplarily, the switching device 600 includes: a receiving module 610 and a sending module 620. The receiving module 610 is used to receive an identification command of the first storage controller and an identification command of the second storage controller in the storage system, and establish a first path with the first storage controller and a second path with the second storage controller; the identification command of the first storage controller includes the upgrade waiting delay time of the first storage controller. The sending module 620 is used to send a first data access request to the first storage controller through the first path. The receiving module 610 is also used to receive an upgrade notification command (asynchronous event information notification command) sent by the first storage controller, and the upgrade notification command carries: an identifier instructing the host to send a second data access request to the second storage controller, and the second data access request and the first data access request belong to the same business flow. The sending module 620 is also used to respond to the upgrade notification command and send a second data access request to the second storage controller through the second path.

[0136] The receiving module 610, the sending module 620, and other possible modules can cooperate to implement the various steps of the host in the above method embodiment. A more detailed description of the above receiving module 610 and the sending module 620 can be directly obtained by referring to the relevant description of the host in the method embodiment shown in the above figures, and will not be repeated here.

[0137] The switching device implements any of the switching methods shown in the aforementioned figures through software. The switching device and its various units may also be software modules. The aforementioned switching method is implemented by a processor calling the software module. The processor may be a central processing unit (CPU), an application-specific integrated circuit (ASIC), or a programmable logic device (PLD). The PLD may be a complex programmable logical device (CPLD), a field programmable gate array (FPGA), a generic array logic (GAL), or any combination thereof.

[0138] It can be understood that the devices shown in Figures 5 and 6 are only examples provided in this embodiment. Depending on the switching process, the switching device may include more or fewer units, and this application is not limited to this.

[0139] When the switching device is implemented by hardware, the hardware can be implemented by a processor, a chip, or a chip system. The chip system includes one or more chips, each chip including an interface circuit and a control circuit. The interface circuit is used to receive data from other devices outside the chip and transmit it to the control circuit, or send data from the control circuit to other devices outside the chip. The control circuit and the interface circuit are used to implement any possible implementation method of the above embodiments through logic circuits or execution code instructions. The beneficial effects can be found in the description of any aspect of the above embodiments, and will not be repeated here.

[0140] It is understood that the processor in the embodiments of the present application may be a CPU, or other general-purpose processor, digital signal processor (DSP), ASIC, FPGA or other programmable logic device, transistor logic device, hardware component or any combination thereof. The general-purpose processor may be a microprocessor or any conventional processor.

[0141] In addition, the devices shown in Figures 5 and 6 can also be implemented using electronic devices. For example, the switching device 500 in Figure 5 can be implemented using a controller. For example, the controller includes a control circuit and an interface circuit. The interface circuit is used to send identification commands and cooperate with the control circuit to execute the data access switching method in any of the aforementioned embodiments. The specific implementation of the controller can be found in the description of Figure 1 above and will not be repeated here.

[0142] The switching device in FIG6 can be implemented by a host, as shown in FIG7 , which is a schematic diagram of the structure of a host provided by the present application. The host can be used to implement the functions of the host in the above-mentioned method embodiment, thereby also achieving the beneficial effects of the above-mentioned method embodiment. In this embodiment, the host can be the data access device 100 shown in FIG1 , or the host 21 in subsequent embodiments, or a module (such as a chip) used in a data access device.

[0143] As shown in FIG7 , the host 700 may include a processor 720. Optionally, the host 700 may further include a memory 730 and / or a transceiver 710. The processor 720 is coupled to the memory 730 and the transceiver 710, for example, by a communication bus. The communication bus may include, but is not limited to, a PCIe bus, an extended industry standard architecture (EISA) bus, a unified bus (Ubus or UB), a compute express link (CXL), a cache coherent interconnect for accelerators (CCIX), and the like.

[0144] The following is a detailed introduction to the various components of the host 700 with reference to FIG7 :

[0145] The processor 720 is the control center of the host 700 and can be a single processor or a collective term for multiple processing elements. For example, the processor 720 can be one or more CPUs, an ASIC, or one or more integrated circuits configured to implement the embodiments of the present application, such as one or more digital signal processors (DSPs) or one or more field programmable gate arrays (FPGAs).

[0146] Optionally, the processor 720 may execute various functions of the host 700 by running or executing software programs stored in the memory 730 and calling data stored in the memory 730. In a specific implementation, as an embodiment, the processor 720 may include one or more CPUs.

[0147] Optionally, the host 700 may also include multiple processors. Each of these processors may be a single-core processor (single-CPU) or a multi-core processor (multi-CPU). The processor herein may refer to one or more devices, circuits, and / or processing cores for processing data (e.g., computer program instructions).

[0148] Wherein, the memory 730 is used to store the software program for executing the solution of the present application, and is controlled by the processor 720 to execute. The specific implementation method can refer to the above method embodiment and will not be repeated here. Exemplarily, the memory 730 can be a ROM or other type of static storage device that can store static information and instructions, a RAM or other type of dynamic storage device that can store information and instructions, or an electrically erasable programmable read-only memory (EEPROM), a compact disc read-only memory (CD-ROM) or other optical disc storage, optical disc storage (including compressed optical disc, laser disc, optical disc, digital versatile disc, Blu-ray disc, etc.), a magnetic disk storage medium or other magnetic storage device, or any other medium that can be used to carry or store the desired program code in the form of instructions or data structures and can be accessed by a computer, but is not limited thereto. The memory 730 can be integrated with the processor 720, or it can exist independently and be coupled to the processor 720 through the interface circuit of the host 700 (not shown in Figure 7). The embodiment of the present application does not specifically limit this.

[0149] Transceiver 710 is used for communication with other devices. For example, if host 700 is a user end (such as a client) or an application server, transceiver 710 can be used to communicate with a storage device or another host. For another example, if host 700 is a Smart Network Interface Card (SNIC), transceiver 710 can be used to communicate with a storage device or another Smart Network Interface Card. For another example, if host 700 is a multi-core chip, transceiver 710 can be used to communicate with another multi-core chip.

[0150] Optionally, the transceiver 710 may include a receiver and a transmitter (not shown separately in FIG7 ). The receiver is used to implement a receiving function, and the transmitter is used to implement a transmitting function. Optionally, the transceiver 710 may be integrated with the processor 720, or may exist independently and be coupled to the processor 720 via an interface circuit of the host 700 (not shown in FIG7 ), which is not specifically limited in this embodiment of the present application.

[0151] In this embodiment, the transceiver 710 is configured to receive an identification command including a control upgrade wait delay time of the first storage controller. The processor 720 is configured to execute the data access switching method of any of the aforementioned embodiments in cooperation with the transceiver 710 according to the identification command.

[0152] The method steps in this embodiment can be implemented by hardware or by a processor executing software instructions. The software instructions can be composed of corresponding software modules, which can be stored in RAM, flash memory, ROM, PROM, EPROM, EEPROM, registers, hard disk, mobile hard disk, CD-ROM or any other form of storage medium well known in the art. An exemplary storage medium is coupled to the processor so that the processor can read information from the storage medium and write information to the storage medium. Of course, the storage medium can also be an integral part of the processor. The processor and storage medium can be located in an ASIC. In addition, the ASIC can be located in a computing device. Of course, the processor and storage medium can also exist as discrete components in a network device or a terminal device.

[0153] The present application provides a storage system. The specific implementation of the storage system can be referred to the description of FIG1 above and will not be described in detail here.

[0154] In the above embodiments, all or part of the embodiments can be implemented by software, hardware, firmware or any combination thereof. When implemented using software, all or part of the embodiments can be implemented in the form of a computer program product. The computer program product includes one or more computer programs or instructions. When the computer program or instructions are loaded and executed on a computer, the process or function described in the embodiments of the present application is performed in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, a network device, a user device or other programmable device. The computer program or instruction can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer program or instruction can be transmitted from one website, computer, server or data center to another website, computer, server or data center via wired or wireless means. The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device such as a server or data center that integrates one or more available media. The available medium can be a magnetic medium, such as a floppy disk, a hard disk, or a tape; it can also be an optical medium, such as a digital video disc (DVD); it can also be a semiconductor medium, such as a solid state drive (SSD).

[0155] The above description is merely a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in the present application, and such modifications or substitutions should be included in the scope of protection of the present application. Therefore, the scope of protection of the present application should be based on the scope of protection of the claims.

Claims

1. A method for switching data access, characterized in that, The method includes: The first storage controller sends an identification command to the host and establishes a first path with the host; the identification command includes an upgrade waiting delay time. The first storage controller receives a first data access request from the host through the first path and performs the access indicated by the first data access request. The first storage controller sends an upgrade notification command to the host, and the upgrade notification command carries: an identifier indicating that the host sends a second data access request to the second storage controller, and the second data access request and the first data access request belong to the same traffic flow. The first storage controller executes an upgrade process within the upgrade waiting delay time.

2. The method according to claim 1, characterized in that, After the first storage controller finishes the upgrade, the method further includes: The first storage controller receives a connection establishment request from the host. The first storage controller establishes a second path with the host according to the connection establishment request. The first storage controller receives a third data access request from the host through the second path and performs the access indicated by the third data access request; the third data access request and the second data access request belong to the same traffic flow.

3. The method according to claim 1 or 2, characterized in that, The upgrade waiting delay time is a controlled upgrade waiting delay time, the upgrade notification command is an asynchronous event information notification command, and the identifier is a controlled upgrade start identifier.

4. The method according to claim 3, characterized in that, The tail of the identification command includes a first reserved field for carrying the controlled upgrade waiting delay time.

5. The method according to claim 4, wherein Bytes 1806 - 1807 in the identification command are used to carry the controlled upgrade waiting delay time.

6. The method according to any one of claims 3 to 5, characterized in that, The asynchronous event information notification command includes a second reserved field for carrying the controlled upgrade start identifier.

7. The method according to claim 6, wherein The value of the second reserved field is F1h.

8. A method for switching data access, characterized in that, The method includes: The host receives the identification commands of the first storage controller and the second storage controller in the storage system, and establishes a first path with the first storage controller and a second path with the second storage controller; the identification command of the first storage controller includes the upgrade waiting delay time of the first storage controller. The host sends a first data access request to the first storage controller through the first path. The host receives the upgrade notification command sent by the first storage controller, and the upgrade notification command carries: an identifier indicating that the host sends a second data access request to the second storage controller, and the second data access request and the first data access request belong to the same traffic flow. The host responds to the upgrade notification command and sends the second data access request to the second storage controller through the second path.

9. The method according to claim 8, wherein After sending the second data access request to the second storage controller through the second path, the method further includes: Waiting for the upgrade waiting delay time of the first storage controller, sending a connection establishment request to the first storage controller, and establishing a third path with the first storage controller. Send a third data access request to the first storage controller through the third path, where the third data access request and the second data access request belong to the same service flow.

10. The method according to claim 8 or 9, characterized in that, The upgrade waiting delay time is the control upgrade waiting delay time, the upgrade notification command is an asynchronous event information notification command, and the identifier is the control upgrade start identifier.

11. The method according to claim 10, characterized in that, The tail of the identification command includes a first reserved field for carrying the control upgrade waiting delay time.

12. The method according to claim 11, wherein Bytes 1806 - 1807 in the identification command are used to carry the control upgrade waiting delay time.

13. The method according to any one of claims 10 to 12, characterized in that, The asynchronous event information notification command includes a second reserved field for carrying the control upgrade start identifier.

14. The method according to claim 13, wherein The value of the second reserved field is F1h.

15. A switching device for data access, characterized in that, Applied to a first storage controller, the device includes: A transceiver module for sending an identification command to the host and establishing a first path with the host; the identification command includes an upgrade waiting delay time. An execution module for receiving a first data access request from the host through the first path and performing the access indicated by the first data access request. The transceiver module is further configured to send an upgrade notification command to the host, where the upgrade notification command carries: an identifier indicating that the host sends a second data access request to a second storage controller in the storage system, and the second data access request and the first data access request belong to the same service flow. An upgrade module for performing an upgrade process within the upgrade waiting delay time.

16. A switching device for data access, characterized in that, The device is applied to a host, and the device includes: A receiving module for receiving an identification command of a first storage controller and an identification command of a second storage controller in the storage system, and establishing a first path with the first storage controller and a second path with the second storage controller; the identification command of the first storage controller includes the upgrade waiting delay time of the first storage controller. A sending module for sending a first data access request to the first storage controller through the first path. The receiving module is further configured to receive an upgrade notification command sent by the first storage controller, where the upgrade notification command carries: an identifier indicating that the host sends a second data access request to a second storage controller, and the second data access request and the first data access request belong to the same service flow. The sending module is further configured to respond to the upgrade notification command and send the second data access request to the second storage controller through the second path.

17. A controller, characterized in that, Includes: A control circuit and an interface circuit; The interface circuit is configured to send an identification command and cooperate with the control circuit to execute the method according to any one of claims 1 - 7.

18. A storage system, characterized in that, Includes: A hard disk and multiple controllers according to claim 17; The hard disk is used to store data; The controller is configured to receive a data access request for the data and cooperate with the hard disk to execute the method according to any one of claims 1 - 7.

19. A host, characterized in that, Includes: A processor and a transceiver; The transceiver is configured to receive an identification command and, in cooperation with the processor, execute the method according to any one of claims 8-14.

20. A readable storage medium, characterized in that, The readable storage medium includes a computer program or instructions, and when the computer program or instructions are run on an electronic device, the electronic device executes the method according to any one of claims 1-7 or the method according to any one of claims 8-14.

21. A computer program product, characterized in that, The computer program product includes a computer program or instructions, and when the computer program or instructions are run on an electronic device, the electronic device executes the method according to any one of claims 1-7 or the method according to any one of claims 8-14.

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