DC-DC circuit applied to voltage regulation mode switching

Abstract

The present application discloses a DC-DC circuit applied to voltage regulation mode switching. In a buck mode, a control circuit controls a buck circuit to step down the voltage applied to a buck switching circuit, and a boost switching circuit outputs a stepped-down voltage; and in a boost mode, the voltage applied to the boost switching circuit is stepped up, and the buck switching circuit outputs a stepped-up voltage.

Description

A DC-DC circuit for voltage regulation mode switching

[0001] This application claims priority to the Chinese patent application filed with the China Patent Office on December 29, 2023, with application number 2023236639489. The entire contents of the above application are incorporated by reference into this application. Technical Field

[0002] The present application relates to the technical field of power supply circuits, and in particular to a DC-DC circuit used for switching voltage adjustment modes. Background Art

[0003] With the rapid development of industrial technology, more and more devices require battery power. Therefore, the charging and discharging processes of the devices are becoming more frequent. During the charging and discharging processes of the devices, the demand for switching between the boost mode and the buck mode of the DCDC (direct current to direct current) circuit is also becoming more and more important.

[0004] The DCDC circuits in the related art are classified into a unidirectional boost mode or a buck mode, and a buck-boost DCDC circuit capable of switching between voltage adjustment modes. Technical issues

[0005] The buck-boost DCDC circuit capable of switching between voltage adjustment modes is relatively complex when switching modes and has a low degree of automation. Technical Solutions

[0006] The present application provides a DC-DC circuit for switching a voltage regulation mode, the DC-DC circuit comprising:

[0007] Control circuit, buck switching circuit, boost switching circuit and buck circuit;

[0008] The first end of the step-down switching circuit is electrically connected to the first voltage input end of the control circuit, the first voltage output end of the control circuit is electrically connected to one end of the step-down circuit, the other end of the step-down circuit is electrically connected to the first end of the boost switching circuit, the second end of the boost switching circuit is electrically connected to the second voltage input end of the control circuit, and the second voltage output end of the control circuit is electrically connected to the second end of the step-down switching circuit;

[0009] When the mode switching control terminal of the control circuit is electrically connected to the auxiliary bias power supply output terminal of the control circuit, the voltage adjustment mode of the DC-DC circuit is the first mode; when the mode switching control terminal of the control circuit is used to be grounded, the voltage adjustment mode of the DC-DC circuit is the second mode. Beneficial effects

[0010] The present application can control the buck circuit in buck mode based on the control circuit to step down the voltage connected to the buck switching circuit, and the boost switching circuit outputs the stepped-down voltage. In boost mode, the voltage connected to the boost switching circuit can be stepped up, and the buck switching circuit outputs the stepped-up voltage. As can be seen, the present application can implement both buck and boost operations of the DC-DC circuit on the input voltage based on the control circuit, enabling flexible switching between buck and boost modes, improving the efficiency and automation of voltage regulation mode switching, and enhancing the stability of the output voltage. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] FIG1 is a schematic structural diagram of a DC-DC circuit for switching a voltage regulation mode disclosed in an embodiment of the present application;

[0012] FIG2 is a schematic structural diagram of another DC-DC circuit for switching voltage regulation modes disclosed in an embodiment of the present application;

[0013] FIG3 is a schematic structural diagram of a buck switching circuit disclosed in an embodiment of the present application;

[0014] FIG4 is a schematic structural diagram of a boost switch circuit disclosed in an embodiment of the present application;

[0015] FIG5 is a schematic structural diagram of a step-down circuit disclosed in an embodiment of the present application;

[0016] FIG6 is a schematic diagram of the structure of a diagnostic circuit disclosed in an embodiment of the present application;

[0017] FIG7 is a schematic structural diagram of a control chip disclosed in an embodiment of the present application;

[0018] FIG8 is a schematic structural diagram of a current limiting circuit disclosed in an embodiment of the present application;

[0019] FIG9 is a schematic structural diagram of another DC-DC circuit for switching voltage adjustment modes disclosed in an embodiment of the present application. Modes for Carrying Out the Invention

[0020] This application discloses a DC-DC circuit for voltage regulation mode switching. This circuit, based on a control circuit, can implement both step-down and step-up operations on an input voltage. It can flexibly switch between step-down and step-up modes, improving the efficiency and automation of voltage regulation mode switching and enhancing output voltage stability. Each of these features is described in detail below.

[0021] Example 1

[0022] Please refer to Figure 1, which is a schematic diagram of the structure of a DC-DC circuit for switching voltage adjustment modes disclosed in an embodiment of the present application. The DC-DC circuit for switching voltage adjustment modes shown in Figure 1 can be applied to the field of digital power supply in computer rooms, but this embodiment of the present application does not limit this. As shown in Figure 1, the DC-DC circuit for switching voltage adjustment modes may include:

[0023] Control circuit 101, buck switch circuit 201, boost switch circuit 301 and buck circuit 401;

[0024] A first terminal of the step-down switch circuit 201 is electrically connected to a first voltage input terminal of the control circuit 101, a first voltage output terminal of the control circuit 101 is electrically connected to one terminal of the step-down circuit 401, the other terminal of the step-down circuit 401 is electrically connected to a first terminal of the boost switch circuit 301, a second terminal of the boost switch circuit 301 is electrically connected to a second voltage input terminal of the control circuit 101, and a second voltage output terminal of the control circuit 101 is electrically connected to a second terminal of the step-down switch circuit 201;

[0025] Among them, when the mode switching control terminal of the control circuit 101 is electrically connected to the auxiliary bias power supply output terminal of the control circuit 101, the voltage adjustment mode of the DC-DC circuit is the first mode; when the mode switching control terminal of the control circuit 101 is used to be grounded, the voltage adjustment mode of the DC-DC circuit is the second mode.

[0026] In some embodiments, the first mode of the DC-DC circuit can be a buck mode. When the voltage adjustment mode of the DC-DC circuit is the buck mode, the third terminal of the buck switch circuit is used to connect to the first input voltage, and the third terminal of the boost switch circuit is used to output the first output voltage. The first output voltage is the voltage obtained after the DC-DC circuit performs a buck operation on the first input voltage, that is, the first input voltage can be stepped down to the first output voltage by the DC-DC circuit. The voltage range of the first input voltage can be 36-56V, the voltage range of the first output voltage can be 11.8-12.2V, the typical value is 12V, and the maximum output current can be 3 5A, the second mode of the DC-DC circuit can be a boost mode. When the voltage adjustment mode of the DC-DC circuit is the boost mode, the third end of the boost switching circuit is used to access the second input voltage, and the third end of the buck switching circuit is used to output the second output voltage. The second output voltage is the voltage obtained after the DC-DC circuit performs a boost operation on the second input voltage, that is, the second input voltage can be boosted to the second output voltage by the DC-DC circuit, wherein the voltage range of the second input voltage can be 8-14V, the voltage range of the second output voltage can be 47-49V, the typical value is 48V, and the maximum output current can be 7A, which is not limited in this embodiment.

[0027] It can be seen that the DC-DC circuit described in Figure 1 for voltage regulation mode switching can realize the buck and boost operations of the DC-DC circuit on the input voltage based on the control circuit, can realize flexible switching between the buck mode and the boost mode, improve the efficiency and automation of voltage regulation mode switching, and improve the stability of the output voltage.

[0028] In some embodiments, as shown in FIG2 , the control circuit 101 includes a control chip 1011 . The DC-DC circuit for switching the voltage regulation mode may further include:

[0029] A first error amplifier circuit 501 and a second error amplifier circuit 601;

[0030] One end of the first error amplifier circuit 501 is electrically connected to the first error amplifier terminal of the control chip 1011, and the other end of the first error amplifier circuit 501 is grounded. One end of the second error amplifier circuit 601 is electrically connected to the second error amplifier terminal of the control chip 1011, and the other end of the second error amplifier circuit 601 is grounded.

[0031] When the voltage adjustment mode is the second mode, the first error amplifier circuit 501 is used to amplify the error signal of the DC-DC circuit. When the voltage adjustment mode is the first mode, the second error amplifier circuit 601 is used to amplify the error signal of the DC-DC circuit.

[0032] In some implementations, the control chip may include LT8228, which is not limited in this embodiment.

[0033] It can be seen that in some embodiments, the error signal of the DC-DC circuit can be amplified by the first error amplifier circuit and the second error amplifier circuit in the boost mode and the buck mode respectively, thereby improving the accuracy of the judgment of the error signal in the DC-DC circuit.

[0034] In some embodiments, as shown in FIG2 , the DC-DC circuit further includes a fault diagnosis circuit 701 ;

[0035] The fault diagnosis circuit 701 includes a diagnosis circuit 7011, a connector 7012 and a power conversion circuit 7013;

[0036] One end of the diagnostic circuit 7011 is electrically connected to the fault diagnosis end of the control chip 1011, the other end of the diagnostic circuit 7011 is electrically connected to one end of the connector 7012, the other end of the connector 7012 is electrically connected to one end of the power conversion circuit 7013, and the other end of the power conversion circuit 7013 is used to receive the third input voltage;

[0037] The power conversion circuit is used to perform voltage conversion on the third input voltage to obtain a power supply voltage, and provide the power supply voltage to the diagnostic circuit.

[0038] It can be seen that in some implementations, the fault diagnosis circuit can be used to diagnose fault information of the DC-DC circuit, thereby improving the operational safety and stability of the DC-DC circuit.

[0039] Example 2

[0040] Please refer to Figure 3, which is a schematic diagram of the structure of a step-down switching circuit disclosed in an embodiment of the present application. The step-down switching circuit shown in Figure 3 can be applied to the field of digital power supply in computer rooms, and this embodiment of the present application does not limit this. As shown in Figure 3, the step-down switching circuit 201 may include:

[0041] The step-down switch circuit 201 includes a first NMOS transistor M1, a second NMOS transistor M2 and a first resistor R1;

[0042] The source of the first NMOS transistor M1 is electrically connected to the source of the second NMOS transistor M2, the first voltage input terminal V1 of the control chip 1011, and the second voltage output terminal V1 of the control chip 1011, respectively. The gate of the first NMOS transistor M1 and the gate of the second NMOS transistor M2 are electrically connected to one end of the first resistor R1. The other end of the first resistor R1 is electrically connected to the first gate driving terminal DG1 of the control chip 1011. The drain of the second NMOS transistor M2 is electrically connected to one end of the step-down circuit 401.

[0043] When the voltage adjustment mode is the first mode, the drain of the first NMOS transistor M1 is used to access the first input voltage. When the voltage adjustment mode is the second mode, the drain of the first NMOS transistor M1 is used to output the second output voltage.

[0044] In some embodiments, the first voltage input terminal and the second voltage output terminal of the control chip can both be the V1 pin of the control chip, that is, when the voltage adjustment mode is the buck mode, the V1 pin is used to input the first input voltage that needs to be bucked, and when the voltage adjustment mode is the boost mode, the V1 pin is used to output the second output voltage after boosting. This embodiment does not limit this.

[0045] It can be seen that this optional embodiment can input a first input voltage in the buck mode and output a second output voltage in the boost mode through the buck switching circuit. It can prevent negative current in both buck and boost modes, control surges, provide isolation protection for the terminals, and improve the overall safety and stability of the DC-DC circuit.

[0046] In some embodiments, as shown in FIG4 , FIG4 is a schematic structural diagram of a boost switch circuit disclosed in an embodiment of the present application. As shown in FIG4 , the boost switch circuit 301 includes a third NMOS transistor M3 , a fourth NMOS transistor M4 , and a second resistor R2 ;

[0047] The drain of the third NMOS transistor M3 is electrically connected to the other end of the step-down circuit 401. The source of the third NMOS transistor M3 is electrically connected to the source of the fourth NMOS transistor M4 and the second voltage input terminal V2 of the control chip 1011. The gate of the third NMOS transistor M3 and the gate of the fourth NMOS transistor M4 are electrically connected to one end of the second resistor R2. The other end of the second resistor R2 is electrically connected to the second gate driving terminal DG2 of the control chip 1011.

[0048] When the voltage adjustment mode is the first mode, the drain of the fourth NMOS transistor M4 is used to output the first output voltage. When the voltage adjustment mode is the second mode, the drain of the fourth NMOS transistor M4 is used to access the second input voltage.

[0049] It can be seen that in some embodiments, the boost switching circuit can output the first output voltage in the buck mode and input the second input voltage in the boost mode, which can prevent negative current and control surges in both buck and boost modes, provide isolation protection for the terminals, and improve the overall safety and stability of the DC-DC circuit.

[0050] In some embodiments, as shown in FIG5 , FIG5 is a schematic structural diagram of a buck circuit disclosed in an embodiment of the present application. As shown in FIG5 , the first voltage output terminal of the control chip 1011 includes a top gate drive terminal TG and a bottom gate drive terminal BG of the control chip 1011 ;

[0051] The step-down circuit 401 includes at least one MOS transistor combination circuit 4011, and the MOS transistor combination circuit 4011 includes a fifth NMOS transistor M5 and a sixth NMOS transistor M6;

[0052] The drain of the fifth NMOS transistor M5 is electrically connected to the drain of the second NMOS transistor M2, the gate of the fifth NMOS transistor M5 is electrically connected to the top gate drive terminal TG of the control chip 1011, the source of the fifth NMOS transistor M5 and the drain of the sixth NMOS transistor M6 are electrically connected to the drain of the third NMOS transistor M3, and the gate of the sixth NMOS transistor M6 is electrically connected to the bottom gate drive terminal BG of the control chip 1011;

[0053] The source of the sixth NMOS transistor M6 is grounded.

[0054] It can be seen that in some embodiments, a step-down circuit of a DC-DC circuit can be implemented by combining at least one group of MOS tubes, which can improve the overall current flow capacity of the circuit, increase the power that the circuit can withstand, and thus improve the circuit stability.

[0055] In some embodiments, as shown in FIG6 , FIG6 is a schematic structural diagram of a diagnostic circuit disclosed in an embodiment of the present application. As shown in FIG6 , the diagnostic circuit 7011 includes a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a first light-emitting diode D1, a second light-emitting diode D2, and a seventh NMOS transistor M7. The fault diagnosis terminal includes a first sub-fault diagnosis terminal REPORT and a second sub-fault diagnosis terminal FAULT.

[0056] One end of the third resistor R3 is electrically connected to the first sub-fault diagnosis terminal REPORT, the other end of the third resistor R3 is respectively electrically connected to one end of the fourth resistor R4, one end of the fifth resistor R5, one end of the sixth resistor R6 and one end of the connector 7012, the other end of the fourth resistor R4 is electrically connected to the anode of the first light-emitting diode D1, the cathode of the first light-emitting diode D1 is electrically connected to the second sub-fault diagnosis terminal FAULT, the other end of the fifth resistor R5 is respectively electrically connected to the mode switching control terminal DRXN and the gate of the seventh NMOS tube M7, the other end of the sixth resistor R6 is electrically connected to the anode of the second light-emitting diode D2, the cathode of the second light-emitting diode D2 is electrically connected to the drain of the seventh NMOS tube M7, and the source of the seventh NMOS tube M7 is used for grounding.

[0057] It can be seen that in some implementations, the fault diagnosis circuit can be used to diagnose fault information of the DC-DC circuit, thereby improving the operational safety and stability of the DC-DC circuit.

[0058] It should be noted that, for information about other pins of the control chip 1011, please refer to Figure 7, where the input and output current limiting of the control chip 1011 can be performed by programming pins ISET1P, ISET1N, ISET2P, and ISET2N. Taking pin ISET1P as an example, the current limiting circuit connected to pin ISET1P can be as shown in Figure 8, which is a structural schematic diagram of a current limiting circuit disclosed in an embodiment of the present application. As shown in Figure 8, the current limiting circuit may include a seventh resistor R7 and an inductor C1, where the seventh resistor R7 is used for current limiting and the inductor C1 is used for filtering.

[0059] It should be noted that the overall circuit diagram of the DC-DC circuit and other connection relationships can be found in FIG9 .

Claims

1. A DC-DC circuit applied to voltage adjustment mode switching, the DC-DC circuit comprising: A control circuit, a buck switch circuit, a boost switch circuit, and a buck circuit; A first end of the buck switch circuit is electrically connected to a first voltage input end of the control circuit, a first voltage output end of the control circuit is electrically connected to one end of the buck circuit, the other end of the buck circuit is electrically connected to a first end of the boost switch circuit, a second end of the boost switch circuit is electrically connected to a second voltage input end of the control circuit, and a second voltage output end of the control circuit is electrically connected to a second end of the buck switch circuit; Wherein, when a mode switching control end of the control circuit is electrically connected to an auxiliary bias power supply output end of the control circuit, the voltage adjustment mode of the DC-DC circuit is a first mode, and when the mode switching control end of the control circuit is grounded, the voltage adjustment mode of the DC-DC circuit is a second mode.

2. The DC-DC circuit applied to voltage regulation mode switching according to claim 1, wherein, The control circuit includes a control chip, and the buck switch circuit includes a first NMOS transistor, a second NMOS transistor, and a first resistor; A source electrode of the first NMOS transistor is electrically connected to a source electrode of the second NMOS transistor, a first voltage input end of the control chip, and a second voltage output end of the control chip respectively. A gate electrode of the first NMOS transistor and a gate electrode of the second NMOS transistor are electrically connected to one end of the first resistor, and the other end of the first resistor is electrically connected to a first gate driving end of the control chip. A drain electrode of the second NMOS transistor is electrically connected to one end of the buck circuit; Wherein, when the voltage adjustment mode is the first mode, a drain electrode of the first NMOS transistor is used to access a first input voltage, and when the voltage adjustment mode is the second mode, the drain electrode of the first NMOS transistor is used to output a second output voltage.

3. The DC-DC circuit applied to voltage regulation mode switching according to claim 2, wherein, The boost switch circuit includes a third NMOS transistor, a fourth NMOS transistor, and a second resistor; A drain electrode of the third NMOS transistor is electrically connected to the other end of the buck circuit. A source electrode of the third NMOS transistor is electrically connected to a source electrode of the fourth NMOS transistor and a second voltage input end of the control chip respectively. A gate electrode of the third NMOS transistor and a gate electrode of the fourth NMOS transistor are electrically connected to one end of the second resistor, and the other end of the second resistor is electrically connected to a second gate driving end of the control chip; Wherein, when the voltage adjustment mode is the first mode, a drain electrode of the fourth NMOS transistor is used to output a first output voltage, and when the voltage adjustment mode is the second mode, the drain electrode of the fourth NMOS transistor is used to access a second input voltage.

4. The DC-DC circuit applied to voltage regulation mode switching according to claim 3, wherein, The first voltage output end of the control chip includes a top gate driving end and a bottom gate driving end of the control chip; The buck circuit includes at least one MOS transistor combination circuit, and the MOS transistor combination circuit includes a fifth NMOS transistor and a sixth NMOS transistor; The drain of the fifth NMOS transistor is electrically connected to the drain of the second NMOS transistor. The gate of the fifth NMOS transistor is electrically connected to the top gate drive terminal of the control chip. The source of the fifth NMOS transistor and the drain of the sixth NMOS transistor are electrically connected to the drain of the third NMOS transistor. The gate of the sixth NMOS transistor is electrically connected to the bottom gate drive terminal of the control chip; Wherein, the source of the sixth NMOS transistor is used for grounding.

5. The DC-DC circuit applied to voltage regulation mode switching according to any one of claims 2-4, wherein, The control chip includes LT8228.

6. The DC-DC circuit applied to voltage regulation mode switching according to claim 3 or 4, wherein, The DC-DC circuit further includes a first error amplification circuit and a second error amplification circuit; One end of the first error amplification circuit is electrically connected to the first error amplification terminal of the control chip, and the other end of the first error amplification circuit is used for grounding. One end of the second error amplification circuit is electrically connected to the second error amplification terminal of the control chip, and the other end of the second error amplification circuit is used for grounding; Wherein, when the voltage adjustment mode is the second mode, the first error amplification circuit is used to amplify the error signal of the DC-DC circuit. When the voltage adjustment mode is the first mode, the second error amplification circuit is set to amplify the error signal of the DC-DC circuit.

7. The DC-DC circuit applied to voltage regulation mode switching according to any one of claims 2-4, wherein, The DC-DC circuit further includes a fault diagnosis circuit; The fault diagnosis circuit includes a diagnosis circuit, a connector, and a power conversion circuit; One end of the diagnosis circuit is electrically connected to the fault diagnosis terminal of the control chip, the other end of the diagnosis circuit is electrically connected to one end of the connector, the other end of the connector is electrically connected to one end of the power conversion circuit, and the other end of the power conversion circuit is used for accessing a third input voltage; Wherein, the power conversion circuit is used to perform voltage conversion on the third input voltage to obtain a supply voltage and provide the supply voltage to the diagnosis circuit.

8. The DC-DC circuit applied to voltage regulation mode switching according to claim 7, wherein, The diagnosis circuit includes a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a first light-emitting diode, a second light-emitting diode, and a seventh NMOS transistor. The fault diagnosis terminal includes a first sub-fault diagnosis terminal and a second sub-fault diagnosis terminal; One end of the third resistor is electrically connected to the first sub-fault diagnosis terminal, and the other end of the third resistor is respectively electrically connected to one end of the fourth resistor, one end of the fifth resistor, one end of the sixth resistor, and one end of the connector. The other end of the fourth resistor is electrically connected to the positive electrode of the first light-emitting diode, the negative electrode of the first light-emitting diode is electrically connected to the second sub-fault diagnosis terminal, the other end of the fifth resistor is respectively electrically connected to the mode switching control terminal and the gate of the seventh NMOS transistor, the other end of the sixth resistor is electrically connected to the positive electrode of the second light-emitting diode, the negative electrode of the second light-emitting diode is electrically connected to the drain of the seventh NMOS transistor, and the source of the seventh NMOS transistor is used for grounding.

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