Electronic device for controlling command provided to display

Abstract

This electronic device comprises: a display comprising a display driving circuit and a display panel; a memory including one or more storage media for storing instructions; and at least one processor comprising one or more processing circuits. The instructions, when executed individually or collectively by the at least one processor, may instruct the electronic device to: obtain a second image as an image that follows after a first image while the first image is displayed on the display panel; store the second image in the memory on the basis of an event; transmit data for the second image to the display driving circuit; and retransmit the data for the second image obtained from the memory to the display driving circuit so as to display the second image again on the display panel on the basis of a reference refresh rate.

Description

An electronic device that controls the commands provided to the display

[0001] The present disclosure relates to an electronic device for controlling commands provided to a display.

[0002] To achieve various visual effects, an electronic device can provide an image composed of multiple layers or images. The electronic device can obtain each layer, synthesize the obtained layers, and provide an image. The electronic device can display the image on a display based on the refresh rate for the composite image.

[0003] The above information may be provided as background art to aid in understanding the present disclosure. No claim or determination is made as to whether any of the above is applicable as prior art related to the present disclosure.

[0004] An electronic device is disclosed. The electronic device may include a display including a display driving circuit and a display panel. The electronic device may further include a memory including one or more storage media for storing instructions. The electronic device may further include at least one processor including one or more processing circuits. The at least one processor may be configured to acquire a second image, acquired using multiple images, as an image to be changed from the first image on the display panel while a first image is displayed on the display panel. The at least one processor may be configured to at least temporarily store the second image in the memory based on an event that transmits data about the image to the display driving circuit at a reference refresh rate higher than a refresh rate for the second image. The at least one processor may be configured to transmit the data about the second image to the display driving circuit for displaying the second image on the display panel. The at least one processor may be configured to retransmit data for the second image obtained from the memory to the display driving circuit to display the second image again on the display panel based on the reference refresh rate while the second image is being displayed on the display panel through the display driving circuit.

[0005] A method is disclosed. The method can be executed in an electronic device comprising a display including a display driving circuit and a display panel. The method can include an operation of acquiring a second image generated using multiple images as an image to be changed from the first image on the display panel while a first image is displayed on the display panel. The method can include an operation of at least temporarily storing the second image in the memory based on an event of transmitting data about the image to the display driving circuit at a reference refresh rate higher than a refresh rate for the second image. The method can include an operation of transmitting the data about the second image to the display driving circuit for displaying the second image on the display panel. The method can include an operation of retransmitting the data about the second image acquired from the memory to the display driving circuit for redisplaying the second image on the display panel based on the reference refresh rate while the second image is displayed on the display panel via the display driving circuit.

[0006] An electronic device is disclosed. The electronic device may include a display including a display driving circuit and a display panel, the display including a first memory configured to store an image. The electronic device may include a second memory including one or more storage media storing instructions. The electronic device may include a plurality of processors, including at least one first processor including one or more processing circuits and a second processor. The second processor may be configured to, based on an event in which the first memory is deactivated, acquire a second image generated using multiple images acquired from the first processor while a first image is displayed on the display panel as an image to be changed from the first image on the display panel. The second processor may be configured to, based on an event in which data for the second image is transmitted to the display driving circuit at a reference refresh rate higher than a refresh rate for the second image, at least temporarily store the second image in the second memory. The second processor may be configured to transmit the data for the second image to the display driving circuit for displaying the second image on the display panel. The second processor may be configured to retransmit data for the second image obtained from the second memory to the display driving circuit to display the second image again on the display panel based on the reference refresh rate while the second image is displayed on the display panel through the display driving circuit.

[0007] A method is disclosed. The method may be executed in an electronic device comprising a display driving circuit including a first memory configured to store an image, a display including a display panel, and a plurality of processors including at least one first processor and a second processor, the first processor including one or more processing circuits. The method may include an operation of acquiring a second image, in which multiple images acquired from the first processor are overlaid, as an image subsequent to the first image, based on an event in which the first memory is deactivated while a first image is displayed on the display panel. The method may include an operation of at least temporarily storing the second image in the second memory based on an event of transmitting data for the second image to the display driving circuit at a reference refresh rate higher than a refresh rate for the second image. The method may include an operation of transmitting the data for the second image to the display driving circuit for displaying the second image on the display panel. The method may include an operation of retransmitting data for the second image obtained from the second memory to the display driving circuit to display the second image again on the display panel based on the reference refresh rate while the second image is displayed on the display panel through the display driving circuit.

[0008] Figure 1 is a simplified block diagram illustrating an exemplary electronic device.

[0009] Figure 2a is a diagram showing the operation of generating an image obtained through multiple layers.

[0010] Figure 2b is a diagram showing an operation of generating an image obtained by replacing some layers of an image obtained through multiple layers.

[0011] Figure 3 is a drawing showing storing an image in memory and transmitting the image stored in the memory to a display driving circuit.

[0012] FIG. 4 is a diagram showing storing an image in memory in response to a first event and transmitting the image stored in the memory to a display driving circuit.

[0013] FIG. 5 is a diagram illustrating storing an image in memory and transmitting the image stored in the memory to a display driving circuit in response to a second event.

[0014] FIG. 6A is a diagram illustrating storing an image in memory and transmitting the image stored in the memory to a display driving circuit in response to a third event.

[0015] FIG. 6b is a diagram showing storing an image in memory and transmitting the image stored in the memory to a display driving circuit in response to a fourth event.

[0016] FIG. 7 is a diagram illustrating storing an image in memory and transmitting the image stored in the memory to a display driving circuit in response to a fifth event.

[0017] FIG. 8 is a block diagram of an electronic device within a network environment according to various embodiments.

[0018] FIG. 9 is a block diagram of a display module according to various embodiments.

[0019] Figure 1 is a simplified block diagram illustrating an exemplary electronic device.

[0020] Referring to FIG. 1, the electronic device (100) may include at least one processor (110), at least one first memory (120), and a display (130). The electronic device (100) may have additional configurations other than those shown in FIG. 1, or some configurations may be omitted.

[0021] At least one processor (110) may include at least a portion of the processor (820) of FIG. 8. At least one processor (110) may be operatively coupled with the display (130) (or the display driving circuit (131) and at least one first memory (120). The operative coupling of the at least one processor (110) with the display (130) and / or the at least one first memory (120) may indicate a direct or indirect connection. For example, the operative coupling of the at least one processor (110) with the display driving circuit (131) of the display (130) may indicate that the at least one processor (110) is connected to the display driving circuit (131) via an interface (135). For example, the interface (135) may be configured for image transmission from the at least one processor (110) to the display driving circuit (131). For example, the interface (135) may be a DSI (display serial interface) of the MIPI (mobile industry process interface) alliance, but is not limited thereto. For example For example, the fact that at least one processor (110) is operatively coupled with the display driver circuit (131) may indicate that the display driver circuit (131) operates based on instructions executed by the at least one processor (110). For example, the fact that at least one processor (110) is operatively coupled with the display driver circuit (131) may indicate that the display driver circuit (131) is controlled by the at least one processor (110). For example, the instructions may cause the electronic device (100) to control the display driver circuit (131) to provide visual information through the display panel (133) when the at least one processor (110) is operated.At least one processor (110) can display an image on a display panel (133) using a display driving circuit (131) based on a video hybrid mode of the DSI.

[0022] At least one processor (110) may include a first processor (111), a second processor (112), and an internal memory (113). The first processor (111) may include a central processing unit (CPU) or a graphics processing unit (GPU). The second processor (112) may include a display controller (or a display processing unit (DPU)). The first processor (111), the second processor (112), and the at least one first memory (120) may be operatively coupled to each other. For example, the fact that the first processor (111), the second processor (112), and the at least one first memory (120) are operatively coupled to each other may indicate that the first processor (111), the second processor (112), and the memory (120) are directly or indirectly connected to each other.

[0023] The first processor (111) can generate visual information through graphic processing. For example, the first processor (111) can generate an image, a video, or a user interface (UI) through graphic processing. The generated visual information can be displayed on the display (130) and provided to the user. The generated visual information can be generated from an image acquired from at least one first memory (120). For example, the first processor (111) can acquire at least two images from at least one first memory (120) and synthesize the acquired at least two images to acquire the generated visual information. The first processor (111) can store the generated visual information in the internal memory (113) or transmit it to the second processor (112). For example, the first processor (111) can transmit commands, controls, information, and / or control signals related to the generated visual information to the second processor (112). The generated visual information can be visual information synthesized from a plurality of layers included in at least two images.

[0024] The second processor (112) may be operatively coupled with the display driving circuit (131). The operative coupling of the second processor (112) with the display driving circuit (131) may indicate that the second processor (112) is connected to the display driving circuit (131) via the interface (135). For example, the interface (135) may be configured to transmit an image from the second processor (112) to the display driving circuit (131). For example, the second processor (112) may be configured to transmit a signal related to an image to the display driving circuit (131) via the interface (135). The signal related to the image may include expression characteristics of the image, such as resolution, refresh rate, or screen brightness. Although the first processor (111) and the second processor (112) are expressed as separate processors, they are not limited thereto. For example, the first processor (111) and the second processor (112) can be implemented as one processor.

[0025] The at least one processor (110) may include the internal memory (113). The internal memory (113) may store images or visual information generated by the at least one processor (110). The internal memory (113) may store various data used by the at least one processor (110). The data may be visual information generated by the first processor (111) or the second processor (112) or expression characteristics of an image, such as resolution, refresh rate, or screen brightness.

[0026] At least one first memory (120) may include at least a portion of the memory (830) of FIG. 8. The at least one first memory (120) may store various data used by at least one processor (110). The data may be visual information generated by the first processor (111) or the second processor (112) or representational characteristics of an image, such as resolution, refresh rate, or screen brightness. The at least one first memory (120) may be a plurality of memories. The first processor (111) and / or the second processor (112) may be operatively connected to at least one first memory (120). For example, the first processor (111) may be connected to one of the plurality of memories, and the second processor (112) may be connected to another of the plurality of memories. The first processor (111) or the second processor (112) may be connected to one of the plurality of memories. The first processor (111) and / or the second processor (112) may include at least one first memory (120). The at least one first memory (120) may include a volatile memory.

[0027] The display driver circuit (131) may include at least a portion of the display driver integrated circuit (DDI) (930) of FIG. 9. The display driver circuit (131) may be operatively coupled with the display panel (133). For example, the display driver circuit (131) being operatively coupled with the display panel (133) may indicate that the display driver circuit (131) is connected to the display panel (133). For example, the display driver circuit (131) being operatively coupled with the display panel (133) may indicate that the display panel (133) is controlled by the display driver circuit (131). However, the present invention is not limited thereto. The display driver circuit (131) may include a second memory (132). The second memory (132) may include at least a portion of the memory (933) of FIG. 9. The second memory (132) may be configured to be selectively activated or deactivated. For example, the second memory (132) may be configured to be selectively connected to the first display driving circuit (131). The display driving circuit (131) may further include a switch (not shown) configured to be selectively connected to the second memory (132). The switch may be connectable to the processor (110).

[0028] The second memory (132) may be a memory within the display driving circuit (131). The second memory (132) may include a graphic random access memory (GRAM) or a video random-access memory (VRAM). The second memory (132) may store image information to be displayed on the display panel (133). An image to be displayed on the display panel (133) may be transmitted to the display panel (133) via the first processor (111), the second processor (112), and the display driving circuit (131). The second memory (132) within the display driving circuit (131) may store the image transmitted to the display panel (133). After displaying an image on the display panel (133), the display driving circuit (131) may display the image stored in the second memory (132) again on the display panel (133) in order to display the image again.

[0029] An electronic device operating based on the DSI command mode can store an image displayed on a display panel (133) in a second memory (132) within a display driving circuit (131). The display driving circuit (131) can read or load the stored image as needed and transmit it to the display panel (133). The operation of storing the image in the second memory (132) and rereading or loading it as needed can be referred to as self-scan. Within the command mode, the display driving circuit (131) can read or load an image stored in the second memory (132) without requiring additional input from at least one processor (110).

[0030] When the electronic device operates in the DSI video hybrid mode, the display driver circuit (131) can display an image on the display panel based on a first state or a second state. The first state may indicate a state in which the second memory (132) is inactivated. The first state may indicate a video mode of the DSI. For example, the display driver circuit (131) may display an image obtained from at least one processor (110) on the display panel (133) based on the first state. The second state may be a state for displaying an image through the second memory (132) within the display driver circuit (131). The second state may indicate a command mode of the DSI. For example, the display driver circuit (131) may store data for displaying an image obtained from at least one processor (110) in the second memory (132) based on the second state. The display driving circuit (131) can display an image on the display panel (133) by scanning data stored in the second memory (132). The display driving circuit (131) can display an image obtained from at least one processor (110) within a video hybrid mode of the DSI that selectively provides a first state and a second state. Within the video hybrid mode, the first state and the second state can be selectively provided. The display driving circuit (131) can display an image obtained from at least one processor (110) based on activation or deactivation of the second memory (132) within the display driving circuit (131).

[0031] According to one embodiment, within the video hybrid mode of the DSI, the electronic device (100) may require self-scanning. According to one embodiment, in the video hybrid mode of the DSI, the display driver circuit (131) may selectively activate the second memory (132), so that instead of the self-scanning operation of the display driver circuit (131), the self-scanning operation by at least one processor (110) may be supported. The self-scanning operation by at least one processor (110) may be the same as the operation in the second state where the second memory (132) is activated below.

[0032] The video hybrid mode of the DSI can reduce the current consumption of the second memory (132) by providing a first state in which the second memory (132) is deactivated in a state in which the image displayed on the display panel (133) is frequently updated. The video hybrid mode of the DSI can reduce the current consumption of the second memory (132) by providing a second state in which the second memory (132) is activated in a state in which the image displayed on the display panel (133) is rarely updated. As a result, the display driving circuit (131) can obtain image data stored in the second memory (132) instead of receiving image data from at least one processor (110). For example, in the second state, the display driving circuit (131) can read an image stored in the second memory (132).

[0033] According to one embodiment, the display panel (133) may include at least a portion of the display (910) of FIG. 9. The display driving circuit (131) may cause at least one first processor (110) to store image data in the internal memory (113) and / or the at least one first memory (120) during a first state in which the second memory (132) is inactive. When both the internal memory (113) and the first memory (120) within the electronic device (100) are utilized, the at least one processor (110) may obtain rendered images or blended images from the first memory (120). The at least one processor (110) may store the image or image data for the images in the internal memory (113) for self-scanning by the processor. When only the first memory (120) among the internal memory (113) and the first memory (120) in the electronic device (100) is used, at least one processor (110) can obtain rendered images or blended images from the first memory (120). The at least one processor (110) can store the image or image data for the images in the first memory (120) for self-scanning by the processor. According to one embodiment, when the image displayed on the display panel (133) has not changed and a self-scanning operation is required to display the same image again on the display panel (133), the at least one processor (110) can store the image displayed on the display panel (133) in the first memory (120) or the internal memory (113) in the first frame for the image.

[0034] According to one embodiment, the display driving circuit (131) can, within the command mode of the DSI, cause at least one processor (110) to store image data in at least one first memory (120). According to one embodiment, at least one processor (110) can obtain image data stored in at least one first memory (120). For example, at least one processor (110) can read image data stored in at least one first memory (120).

[0035] Below in FIG. 2a, the operation of the electronic device (100) in a first state within the command mode of DSI or the video hybrid mode of DSI is described.

[0036] Figure 2a is a diagram illustrating an image generation operation using multiple layers. Figure 2b is a diagram illustrating an image generation operation obtained by replacing some layers of an image included in multiple layers. The image layer may include a transparent portion for combining or overlapping with other image layers, or may be smaller than the image to be synthesized.

[0037] Referring to FIGS. 2A and 2B, at least one processor (110) can generate an image (210) by mixing a plurality of layers (201, 202, 203). The plurality of layers (201, 202, 203) can be configured to overlap each other. At least one processor (110) can obtain an image (210) based on the overlapping and mixed layers (201, 202, 203). For example, at least one processor (110) can generate an image (210) by the overlapping and mixed layers (201, 202, 203). For example, a second processor (112) can obtain the layers (201, 202, 203) generated from a first processor (111). For example, the second processor (112) can obtain layers (201, 202, 203) stored in at least one memory (120). The second processor (112) can blend the obtained layers (201, 202, 203). The second processor (112) can synthesize the layers (201, 202, 203) using software, but is not limited thereto. For example, the second processor (112) can obtain a synthesized image (210) from the layers (201, 202, 203) using another circuit or another component configured to synthesize a plurality of layers.

[0038] Although the second processor (112) has been described as obtaining a synthesized image (210) based on layers (201, 202, 203), it is not limited thereto. For example, the first processor (111) can generate a plurality of layers (201, 202, 203) and synthesize the generated plurality of layers (201, 202, 203). For example, the first processor (111) can generate a plurality of layers (201, 202, 203) and obtain a synthesized image (210) using the generated layers using the other circuit or the other component.

[0039] At least one processor (110) may write back the acquired image (210) to at least one first memory (120). The write back may refer to recording data related to the image (210) to at least one first memory (120) or storing data related to the image (210) in an allocated space (220) within the internal memory (113) or the at least one first memory (120). For example, an instruction to at least temporarily store the image in the internal memory (113) or the at least one first memory (120), when individually or collectively executed by the one or more processors, may cause the electronic device (100) to store the image in the space (220) if there is an empty space for the image in the internal memory (113) or the at least one first memory (120). In order to enable the image to be read again by at least one processor (110), when at least one processor (110) includes an internal memory (113), the image may be stored in the space (220) within the internal memory (113). According to one embodiment, in order to enable the image to be read again by at least one processor (110), when at least one processor (110) does not include an internal memory (113), the image may be stored in the space (220) within the first memory (120). When at least one processor (110) executes instructions stored in the at least one first memory (120), the electronic device may acquire a second image to be displayed next to the first image being displayed on the display panel (133), and remove or delete data regarding the second image stored in the internal memory (113) or the space (220) within the at least one first memory (120) regarding data regarding the image displayed on the display panel (130).The at least one processor (110) can obtain an image (210) recorded in the internal memory (113) or in the at least one first memory (120). For example, the at least one processor (110) can read an image (210) recorded in the internal memory (113) or in the at least one first memory (120).

[0040] At least one processor (110) can omit an operation of blending multiple layers (201, 202, 203) by storing a synthesized image (210) in an internal memory (113) or at least one first memory (120) and obtaining the stored image (210). By reducing the number of blending operations performed by the electronic device (100), the total current consumed by the blending operation can be reduced. By reducing the total current consumed in the blending operation, the total current and power consumption of the electronic device (100) can be reduced.

[0041] At least one processor (110) may be configured to transmit the synthesized image (210) to the display driving circuit (131). For example, at least one processor (110) may transmit the synthesized image (210) to the display driving circuit (131) via the interface (135). At least one processor (110) may be configured to record the acquired image (210) into at least one first memory (120) based on acquisition of the image (210) by mixing a plurality of layers (201, 202, 203), and simultaneously transmit the acquired image (210) to the display driving circuit (131). After transmitting the acquired image (210) to the display driving circuit (131), the at least one processor (110) may transmit the stored image (210) back to the display driving circuit (131). For example, at least one processor (110) may be configured to transmit the acquired image (210) to the display driving circuit (131) and at the same time store the acquired image (210) in the internal memory (113) or at least one first memory (120), and then transmit the acquired image (210) from the internal memory (113) or at least one first memory (120) back to the display driving circuit (131).

[0042] The display driving circuit (131) can be configured to display the received image (210) through the display panel (133).

[0043] Referring to FIG. 2B, at least one processor (110) can record (or store) an image (210) obtained by blending (or mixing) multiple layers (201, 202, 203) in a space (220) within the internal memory (113) or at least one memory (120), and simultaneously transmit the image (210) to the display driving circuit (131) via the interface (135). In a state where the image (210) is recorded in the internal memory (113) or at least one memory (120), at least one processor (110) can synthesize an additional layer (201') and the image (210). For example, at least one processor (110) can obtain a synthesized image (210') based on the image (210) and the additional layer (201'). The additional layer (201') may be a layer similar to the first layer (201) among the multiple layers (201, 202, 203) used to synthesize the image (210). For example, the first layer (201) may be a layer representing a status bar, the second layer (202) may be a layer representing a background image, and the third layer (203) may be a layer representing an icon. For example, the first layer (201) may have a relatively small image area, but may experience more frequent changes, transitions, or conversions of the image compared to the other layers (202, 203).

[0044] At least one processor (110) can obtain an image (210) stored in a space (220). The image (210) may be a layer synthesized from a first layer (201), a second layer (202), and a third layer (203). At least one processor (110) can obtain an image (210') by mixing the image (210) and the additional layer (201'). For example, at least one processor (110) can generate an image (210') based on the image (210) and the additional layer (201'). For example, the second processor (112) can obtain an image (210) and an additional layer (201') stored in an internal memory (113) or at least one memory (120). For example, the second processor (112) can obtain an additional layer (201') generated from the first processor (111) and an image (210) stored in the internal memory (113) or at least one memory (120). The second processor (112) can blend the obtained additional layer (201') and the stored image (210). The second processor (112) can synthesize the additional layer (201') and the stored image (210) using software, but is not limited thereto. For example, the second processor (112) can obtain a synthesized image (210') from the additional layer (201') and the stored image (210) using another circuit or another component configured to synthesize the additional layer (201') and the stored image (210).

[0045] According to one embodiment, the second processor (112) has been described as obtaining a composite image (210') based on the additional layer (201') and the image (210), but is not limited thereto. For example, the first processor (111) may generate an additional layer (201') and obtain an image from the generated additional layer (201') and an image (210) obtained from the internal memory (113) or at least one memory (120). For example, the first processor (111) may generate an additional layer (201') and obtain an image (210') composited from the generated additional layer (201') and an image (210) obtained from the internal memory (113) or at least one memory (120) using the other circuit or the other component.

[0046] According to one embodiment, at least one processor (110) may be configured to remove a portion corresponding to the layer (201) of the image (210) and add the additional layer (201') when synthesizing the image (210) with the additional layer (201'). At least one processor (110), when synthesizing the image (210) or after synthesizing, may record another image obtained by synthesizing the second layer (202) and the third layer (203) into the internal memory (113) or the at least one memory (120). For example, at least one processor (110) may generate an intermediate image obtained by synthesizing the second layer (202) and the third layer (203) to generate the image (210), and may obtain the image (210) by synthesizing the intermediate image with the first layer (201). At least one processor (110) can store (or record) the acquired image (210) and the intermediate image of the second layer (202) and the third layer (203) in the internal memory (113) or in at least one memory (120). At least one processor (110) can store the image (210) in a space (220) within the internal memory (113) or the memory (120), and store (or record) the intermediate image synthesized by the second layer (202) and the third layer (203) in a space different from the space (220).

[0047] At least one processor (110) can obtain an intermediate image that synthesizes a second layer (202) and a third layer (203) that are different from an image (210) stored in a space (220) within an internal memory (113) or at least one memory (120). At least one processor (110) can obtain an image (210') by mixing the intermediate image synthesized with the second layer (202) and the third layer (203) and the additional layer (201'). For example, at least one processor (110) can generate an image (210') based on the intermediate image synthesized with the second layer (202) and the third layer (203) and the additional layer (201'). For example, the second processor (112) can obtain the intermediate image synthesized by the second layer (202) and the third layer (203) stored in the internal memory (113) or at least one memory (120) and the additional layer (201'). For example, the second processor (112) can obtain the intermediate image synthesized by the additional layer (201') generated from the first processor (111) and the second layer (202) and the third layer (203) stored in the internal memory (113) or at least one memory (120). The second processor (112) can blend the obtained additional layer (201') and the intermediate image synthesized by the second layer (202) and the third layer (203). The first processor (111) can generate an additional layer (201'), and obtain a synthesized image (210') by synthesizing the generated additional layer (201') with the second layer (202) and the third layer (203) obtained from the internal memory (113) or at least one memory (120) using the other circuit or the other component. At least one processor (110) can write back the image (210') to the internal memory (113) or at least one first memory (120).

[0048] Although the second processor (112) is described as obtaining a composite image (210') based on an additional layer (201') and an image (210), it is not limited thereto.

[0049] In one embodiment, when an image (210) is displayed on a display panel (133) and a self-scan operation is required to display the same image (210) again on the display panel (133), the electronic device (100) may store the image (210) in the internal memory (113) or at least one first memory (120) while the image (210) is initially displayed on the display panel (133). For example, the self-scan operation may be required to remove afterimages or ghost effects, adjust display brightness and change screen modes (e.g., change the screen to a night mode with a warmer color tone), or correct screen image quality or optical characteristics of the display panel.

[0050] According to one embodiment, at least one processor (110) may be configured to transmit an image stored in the internal memory (113) or the at least one first memory (120) to the display driving circuit (131) at the previous frame timing in the self-scan operation. Since the synthesized image (210') is stored in the internal memory (113) or the at least one memory (120), the synthesis process may be omitted, thereby improving the current consumption used for overlay synthesis. At least one processor (110) may obtain the image (210') recorded in the internal memory (113) or the at least one first memory (120). For example, when the internal memory (113) of at least one processor (110) is supported in the write back operation, the at least one processor (110) may read the image (210') recorded in the internal memory (113). In a write back operation, when the internal memory (113) of at least one processor (110) does not support, the at least one processor (110) can read the image (210') recorded in the at least one first memory (120). The at least one processor (110) can store the image (210') in the internal memory (113) or the at least one first memory (120), and by obtaining the stored image (210'), the repetition of blending the multiple layers (201', 202, 203) can be omitted. By reducing the current consumed in the blending operation, the power usage of the electronic device (100) can be reduced. The at least one processor (110) can be configured to transmit the synthesized image (210') to the display driving circuit (131). The at least one processor (110) can transmit the synthesized image (210') to the display driving circuit (131) through the interface (135).At least one processor (110) may be configured to record the acquired image (210') based on the acquisition of an image (210') in which a plurality of layers (201', 202, 203) are mixed into an internal memory (113) or at least one first memory (120), and simultaneously transmit the acquired image (210') to a display driving circuit (131). After transmitting the acquired image (210') to the display driving circuit (131), the at least one processor (110) may transmit the image (210') to the display driving circuit (131) again. The display driving circuit (131) may be configured to display the received image (210) through a display panel (133).

[0051] The image (210, 210') of FIG. 2A or FIG. 2B may be an image obtained by combining each of a plurality of images. The meaning of combination may refer to combining multiple images, combining multiple images that are a combination of multiple images, or combining at least one image that is a combination of multiple images with another image. For example, the image (210) of FIG. 2A may be an image obtained by combining images composed of a plurality of layers (201, 202, 203). The image (210') of FIG. 2B may be an image obtained by combining a multiple image (210) obtained by combining images composed of a plurality of layers (201, 202, 203) with another image (201'). Combining multiple images may be an image obtained by combining multiple images (210) obtained by combining images composed of multiple layers (201, 202, 203) and multiple images obtained by combining images composed of other multiple layers. Combining may refer to overlaying multiple layers and obtaining a single image using multiple layers.

[0052] The at least one processor (110) includes at least one first processor (111) and a second processor (112), and the instructions, when executed by the second processor (112), can cause the electronic device (100) to obtain a first partial image of the first layer (201) from the at least one first processor (111), obtain an image (210') by synthesizing the first partial image with the image (210) obtained from the internal memory (113) or the memory (120), and transmit the image (210') to the display driving circuit (131). The above instructions, when executed by the second processor (112), may cause the electronic device to obtain a partial image displayed on an additional layer (201') different from the partial image displayed on the first layer (201) from the at least one first processor (111) while the image (210) is displayed on the display panel (133). The above instructions, when executed by the second processor (112), may cause the electronic device to obtain an image (210') by synthesizing the partial image displayed on the additional layer (201') with an image (210) obtained from the internal memory (113) or the memory (120). The above instructions, when executed by the second processor (112), may cause the electronic device (100) to transmit the image (210') to the display driving circuit (131). A partial image can be a region or part of an image or layer (e.g., a subregion of an image or layer).

[0053] Figure 3 is a drawing showing storing an image in memory and transmitting the image stored in the memory to a display driving circuit.

[0054] The blended first image (301), the blended second image (302), the blended third image (303), and the blended fourth image (304) may be images (210, 210') obtained through the synthesis operation of FIG. 2a or FIG. 2b. One or more of the first image (301), the second image (302), the third image (303), and the fourth image (304) may be generated without using the synthesis operation.

[0055] Referring to FIG. 3, at least one processor (110) can transmit a blended first image (301) to a display driving circuit (131) via an interface (135). For example, at least one processor (110) can obtain the first image (301) within a first time length (311) corresponding to a vertical synchronization signal period. For example, the display driving circuit (131) can display the first image (301) obtained from at least one processor (110) via the interface (135) on a display panel (133) based on the vertical synchronization signal.

[0056] At least one processor (110) can identify that a designated event has occurred. After the designated event has occurred, the at least one processor (110) can acquire a blended second image (302) within a second time length (312) corresponding to a vertical synchronization signal cycle. The designated event may be an event requiring self-scan. The designated event may include an operation performed for an event of preventing momentary afterimages, changing screen brightness, or changing screen modes in order to maintain the optical characteristics of the display panel (133). The at least one processor (110) can transmit the blended second image (302) to the display driving circuit (131) through the interface (135). For example, the display driving circuit (131) can acquire the second image (302) from the at least one processor (110) through the interface (135). For example, the display driving circuit (131) can display the second image (302) acquired from at least one processor (110) through the interface (135) on the display panel (133). Although the at least one processor (110) has been described as acquiring the blended second image (302) after a specified event occurs, it is not limited thereto. The at least one processor (110) can acquire the blended second image (302) and identify that the specified event occurs. For example, the at least one processor (110) can acquire the second image (302) as an image to be displayed after the blended first image (301). For example, while the first image (301) is displayed, the at least one processor (110) can acquire the second image (302) as an image to be changed from the first image (301) on the display panel.At least one processor (110) may be configured to at least temporarily store a second image in at least one memory (120) based on a designated event. The designated event may be an event that causes the display drive circuit to transmit data for the second image (302; 332) to the display drive circuit at a reference refresh rate (f2) (e.g., 60 Hz or 120 Hz) that is higher than a refresh rate (f1) (e.g., 30 Hz) for the second image (302). The refresh rate (f1) for the second image (302) may represent a target frequency for displaying the image when acquiring or blending the second image. For example, the second time length (312) may be a time length identified for the second image when acquiring or blending the second image (302). The above reference refresh rate may represent a target frequency for transmitting an image recorded in at least one memory (120) to the display driving circuit (131) via the interface (135). The instructions stored in the at least one memory (120), when executed by the second processor (112), may cause the electronic device (100) to display the second image (302) on the display panel (133) via the display driving circuit (131) until the display driving circuit (131) receives a third image (303) different from the second image (302) via the at least one first processor (111).

[0057] At least one processor (110) can record or store the blended second image (302) at least temporarily in at least one memory (120). For example, at least one processor (110) can at least temporarily store a blended image obtained by overlaying multiple images in the at least one memory (120) and transmit the blended image to the display driving circuit (131). At least one processor (110) can refrain from recording or storing a blended image obtained from a single image in the at least one memory (120) and transmit the blended image to the display driving circuit (131).

[0058] For example, based on identifying that the first image (301) has changed to the second image (302) within a second time length (312) after the occurrence of the above-mentioned specified event, at least one processor (110) can transmit the blended second image (302) to the display driving circuit (131) via the interface (135) and simultaneously record the blended second image (302) in at least one memory (120). For example, the data for the second image (302) can be transmitted to the display driving circuit (131) to display the second image (302) on the display panel (133). At least one processor (110) can transmit the second image (332) stored in at least one memory (120) to the display driving circuit (131) through the interface (135) when it identifies that the second image (302) is maintained within the vertical synchronization signal after acquiring the second image (302). At least one processor (110) can transmit data for the second image (332) acquired from the at least one memory (120) to the display driving circuit (131) to display the second image (302 or 332) again on the display panel (133) based on the reference refresh rate (f2) while the second image (302) is displayed on the display panel (133) through the display driving circuit (131). The display driving circuit (131) can obtain a second image (332) stored in at least one memory (120) from at least one processor (110) through an interface (135). For example, the display driving circuit (131) can display the second image (332) stored in at least one memory (120) obtained from at least one processor (110) through an interface (135) on a display panel (133).The blended image and the blended image stored in at least one memory (120) may be identical. For example, the blended second image (302) and the second image (332) stored in at least one memory (120) may be substantially identical images.

[0059] If self-scan is not used and the second image (302) is not stored in at least one memory (120), at least one processor (110) must repeatedly transmit each blended or blended image for each frame to the display driving circuit (131) through the interface (135) in order to repeatedly display images (302-1, 302-2, 302-3) identical to the second image (302) on the display panel (133) after the first frame. By using the image (332) stored in at least one memory (120), the number of blending operations can be reduced, and the power consumption and total current required for blending can be reduced.

[0060] At least one processor (110) can acquire a blended third image (303) within a third time length (313) corresponding to a vertical synchronization signal period while a designated event is maintained or continuously detected. The at least one processor (110) can transmit the blended third image (303) to the display driving circuit (131) via the interface (135). For example, the display driving circuit (131) can acquire the third image (303) from the at least one processor (110) via the interface (135). For example, the display driving circuit (131) can display the third image (303) acquired from the at least one processor (110) via the interface (135) on the display panel (133).

[0061] At least one processor (110) can record the blended third image (303) into at least one memory (120). For example, based on identifying that the second image (302) changes to the third image (303) within a third length of time (313) after the occurrence of the specified event, the at least one processor (110) can transmit the blended third image (303) to the display driving circuit (131) via the interface (135) and simultaneously record the blended third image (303) into at least one memory (120). When the at least one processor (110) identifies that the third image (303) is maintained within a vertical synchronization signal after acquiring the third image (303), the at least one processor (110) can transmit the third image (333) stored in the at least one memory (120) to the display driving circuit (131) via the interface (135). The display driving circuit (131) can obtain a third image (333) stored in at least one memory (120) from at least one processor (110) through an interface (135). For example, the display driving circuit (131) can display the third image (333) stored in at least one memory (120) obtained from at least one processor (110) through an interface (135) on the display panel (133).

[0062] At least one processor (110) can obtain a blended fourth image (304) within a fourth time length (314) corresponding to a vertical synchronization signal period based on identifying that a designated event has ended. The at least one processor (110) can transmit the blended fourth image (304) to the display driving circuit (131) via the interface (135). For example, the display driving circuit (131) can obtain the fourth image (304) from the at least one processor (110) via the interface (135). For example, the display driving circuit (131) can display the fourth image (304) obtained from the at least one processor (110) via the interface (135) on the display panel (133). For example, at least one processor (110) may bypass or refrain from storing or recording the fourth image (304) acquired by the at least one processor (110) to at least one memory (120) based on identifying that the specified event has ended.

[0063] The above-described designated event may include a mode change of the display panel (133). For example, the mode change of the display panel (133) may include a brightness change of the display panel (133). For example, the above-described designated event may include changing the brightness level of the display panel (133) from a first brightness level to a second brightness level different from the first brightness level within a predetermined number of frames.

[0064] The above-described designated event may include blocking a particular color of light emitted from the display. For example, the above-described designated event may include changing the display to a blue light blocking mode. For example, the above-described designated event may include changing the amount of light emitted from subpixels configured to emit a designated color from a first light level to a second light level different from the first light level within a predetermined number of frames. For example, the above-described designated event may include changing the brightness level of the designated color from a first brightness level to a second brightness level through software processing within a predetermined number of frames.

[0065] The above-described designated event may include preventing afterimages on the display panel. For example, the probability of afterimages occurring due to hysteresis in a driving transistor for driving an organic light-emitting diode within the display panel may increase as the length of time from the end timing of displaying an image to the start timing of displaying the next image increases. The above-described designated event may include the length of time during which one or more images are displayed being longer than a reference length of time. For example, the above-described designated event may include the time during which an image displayed on the display is displayed on the display panel for a reference length of time or longer. For example, the above-described designated event may include the refresh rate for an image displayed on the display panel being lower than the refresh rate for a previously displayed image.

[0066] Examples of the above-described designated events are described in detail in FIGS. 4 to 7.

[0067] FIG. 4 is a diagram showing storing an image in memory in response to a first event and transmitting the image stored in the memory to a display driving circuit.

[0068] Referring to FIG. 4, at least one processor (110) can sequentially display a first image (401) and a second image (402). After displaying the first image (401) on the display panel (133), the at least one processor (110) can display the second image (402) on the display panel (133). For example, the at least one processor (110) can switch the image displayed on the display panel (133) from the first image (401) to the second image (402). The at least one processor (110) can be configured to acquire a second image (402) in which multiple images are overlaid, as an image following the first image (401), while the first image (401) is displayed on the display panel (133). At least one processor (110) can transmit the first image (401) to the display driving circuit (131) via the interface (135) so as to display the first image (401) on the display panel (133).

[0069] At least one processor (110) can obtain a blended second image (402) within a time length (411) corresponding to a vertical synchronization signal cycle. At least one processor (110) can be configured to transmit the data for the second image (402) to the display driving circuit (131) to display the second image (402) on the display panel (133). For example, the at least one processor (110) can transmit the blended second image (402) to the display driving circuit (131) via the interface (135) to display the second image (402) on the display panel (133).

[0070] At least one processor (110) may, based on a first event (e.g., when the first event occurs), at least temporarily store or record a second image (402) in at least one memory (120). The first event may be an event that causes the display driving circuit (131) to transmit data for the second image (402) at a reference refresh rate (f2) higher than a refresh rate (f1) for displaying the second image (402).

[0071] The first event may include an operation while preventing afterimages (e.g., an operation while there is an afterimage effect). The first event may include a time length from the start timing of displaying the first image (401) to the end timing of displaying the first image (401) that is longer than a reference time length. For example, the first event may include a time length (1 / 30 s * 4 frames) during which the first image (401) is displayed on the display panel (133) that is longer than the reference time length (e.g., 1 / 10 s). When the displayed time length is longer than the reference time length, when the second image (402) is displayed on the display panel (133), a part of the first image (401), which is a previous image of the second image (402), may continue to be displayed and cause an afterimage effect. The reference time length varies depending on the display panel (133) and may be the maximum time length for which the display panel (133) can display an image without causing an afterimage effect.

[0072] At least one processor (110) may be configured to re-display an image corresponding to the second image (402) on the display panel (133) to remove the afterimage. For example, the at least one processor (110) may be configured to re-transmit data for the second image (432) acquired from the at least one memory (120) to the display driving circuit (131) to re-display the second image (402) on the display panel (133) based on the reference refresh rate (f2) while the second image (402) is displayed on the display panel (133) through the display driving circuit (131). The at least one processor (110) may at least temporarily record or store the blended second image (302) in the at least one memory (120). For example, based on identifying that the first image (401) changes to the second image (402) within a time period (411) after the first event occurs or identifying that the first event occurs within the time period (411) and the first image (401) changes to the second image (402), at least one processor (110) can transmit the blended second image (402) to the display driving circuit (131) via the interface (135) and simultaneously record the blended second image (402) in at least one memory (120). For example, the data for the second image (402) can be transmitted to the display driving circuit (131) to display the second image (402) on the display panel (133).

[0073] At least one processor (110) can transmit the second image (432) stored in at least one memory (120) to the display driving circuit (131) through the interface (135) when it is identified that the second image (402) is maintained in the vertical synchronization signal after acquiring the second image (402). At least one processor (110) can be configured to retransmit data for the second image (432) acquired from the at least one memory (120) to the display driving circuit (131) to display the second image (402 or 432) again on the display panel (133) based on the reference refresh rate (f2) while the second image (402) is displayed on the display panel (133) through the display driving circuit (131). The display driving circuit (131) can obtain the second image (432) stored in at least one memory (120) from at least one processor (110) through the interface (135). For example, the display driving circuit (131) can display the second image (432) stored in at least one memory (120) on the display panel (133). The at least one processor (110) can display the second image (402) obtained from the at least one processor (110) on the display panel (133) through the display driving circuit (131) and then display the second image (432) stored in the at least one memory (120) on the display panel (133) in a frame. The display panel (133) can reduce or eliminate the afterimage caused by the first image (401) by re-displaying the second image (432) obtained from the at least one memory (120) corresponding to the second image (402).

[0074] FIG. 5 is a diagram illustrating storing an image in memory and transmitting the image stored in the memory to a display driving circuit in response to a second event.

[0075] Referring to FIG. 5, at least one processor (110) can sequentially display a first image (501) and a second image (502). The at least one processor (110) can control the display to display the second image (502) on the display panel (133) after displaying the first image (501) on the display panel (133). For example, the at least one processor (110) can switch the image displayed on the display panel (133) from the first image (501) to the second image (502). The at least one processor (110) can be configured to acquire the second image (502) as the next image to the first image (501) while the first image (501) is displayed on the display panel (133). For example, at least one processor (110) may be configured to generate a second image (502) obtained using multiple images or layers as an image to be changed from the first image (501) (e.g., a next image to be displayed after the first image) while the first image (501) is displayed on the display panel (133). The at least one processor (110) may transmit the first image (501) to the display driving circuit (131) via the interface (135) so as to display the first image (501) on the display panel (133).

[0076] At least one processor (110) may acquire or generate a blended second image (502) within a time length (511) corresponding to a vertical synchronization signal period. At least one processor (110) may be configured to transmit data regarding the second image (502) to the display driving circuit (131) to display the second image (502) on the display panel (133). For example, the at least one processor (110) may transmit the blended second image (502) to the display driving circuit (131) via the interface (135) to display the second image (502) on the display panel (133).

[0077] At least one processor (110) may, based on the second event, at least temporarily store or record a second image (502) within at least one memory (120).

[0078] The second event may include a mode change of the display panel (133) mentioned previously. For example, the mode change of the display panel (133) may include a brightness change of the display panel (133). For example, the second event may include changing the brightness level of the display panel (133) from a first brightness level to a second brightness level different from the first brightness level within a predetermined number of frames. For example, the second event may include changing the brightness level of a specified color from the first brightness level to the second brightness level through software processing within a predetermined number of frames. When the brightness level of an image displayed on the display panel (133) changes from the first brightness level to the second brightness level in the next frame, a user of the electronic device (100) may perceive an unnatural screen transition (e.g., a sudden increase in screen brightness). At least one processor (110) may cause the brightness level of an image displayed through the display panel (133) to change in stages.

[0079] During a specified frame, for example, during a pre-specified number of frames (e.g., 5 frames), to change from the first brightness level to the second brightness level, at least one processor (110) may transfer an image stored in at least one memory to the display driving circuit (131) during at least a portion of the specified frame. For example, the at least one processor (110) may be configured to gradually lower the brightness level during the specified frame so as to adjust the brightness level of the display panel.

[0080] For example, at least one processor (110) may receive a second event while the second image (502) is displayed on the display panel (133), or may receive the second event while the first image (501), which is a previously displayed image of the second image (502), is displayed on the display panel (133). The at least one processor (110) may be configured to record an image to be displayed in a next frame into at least one memory (120) when the second event is identified. For example, when the second event is identified while the second image (502) is displayed on the display panel (133), the at least one processor (110) may record or store the second image (502) into at least one memory (120). For example, when the second event is identified while the first image (501) is displayed on the display panel (133), at least one processor (110) may record or store, in at least one memory (120), the second image (502), which is an image to be displayed in the next frame after receiving the second event. For example, when the second event is identified within the time interval or time distance (l0) during which the first image (501) is displayed, at least one processor (110) may record or store, in at least one memory (120), the second image (502) to be displayed in the next time interval (l1) after the time interval (l0).

[0081] At least one processor (110) can adjust the gray scale of a second image (502) to be displayed on the display panel (133) in the next frame based on identifying the second event that changes the brightness level of a specified color from a first brightness level to a second brightness level through software processing within a predetermined number of frames. The section between the first brightness level and the second brightness level can be divided into steps corresponding to a specified number of frames. For example, the first image (501) can be displayed on the display panel (133) at a first brightness level, and the second image (502) can be converted into a first divided brightness level that divides the first brightness level and the second brightness level into five sub-levels.

[0082] At least one processor (110) may, based on the second event, transmit the second image (502) whose gray scale has been adjusted to the display driving circuit (131) to display the second image (502) with the gray scale adjusted on the display panel (133) at the first divided brightness level. While transmitting the second image (502) whose gray scale has not been adjusted to the display driving circuit (131) based on the second event, the at least one processor (110) may store or record the second image (502) whose gray scale has not been adjusted in at least one memory (120). For example, at least one processor (110) may transmit a second image (502) whose gray scale is adjusted to the display driving circuit (131) to display the second image during the first time period (l1) on the display panel (133) based on the second event, and may store images to be displayed during the second time period (l2) or after the second time period (l2) in at least one memory (120).

[0083] At least one processor (110) can read or obtain an image to be displayed in a second time interval (l2) from at least one memory (120) to adjust the brightness level to a second brightness level. At least one processor (110) can obtain a second image (532) stored in at least one memory (120) to change the brightness of the display panel (133) to a second divided brightness level between the first brightness and the second brightness while the second image (502) is displayed on the display panel (133) through the display driving circuit (131). At least one processor (110) can adjust the gray scale of the second image (532) obtained from at least one memory (120) to have the second brightness level.

[0084] At least one processor (110) may be configured to retransmit data for the second image (532) acquired from the at least one memory (120) to the display driving circuit (131) to re-display the second image (502) on the display panel (133). The at least one processor (110) may transmit the second image (502) with the gray scale adjusted to the display driving circuit (131) to display the second image (532) acquired from the at least one memory (120) with the gray scale adjusted on the display panel (133) for a second time period (12) at the second divided brightness level based on the second event. At least one processor (110) can adjust the gray scale of data for an image acquired from at least one memory (120) in each time interval to a brightness corresponding to each time interval and transmit the adjusted data to the display driving circuit (131) if there is no change in the image displayed from the second time interval (l2) to the fifth time interval (l5).

[0085] At least one processor (110) may be configured to record or store, in at least one memory (120), a third image (503) to be displayed in the next frame of the second image (532), when the image displayed on the display panel (133) during the specified frame changes from the second image (502 or 532) to the third image (503 or 533). For example, when the image displayed on the display panel (133) changes from the second image (532) to the third image (503) displayed in the second time interval (l2), the at least one processor (110) may record or store the third image (503) to be displayed in the at least one memory (120). For example, the at least one processor (110) may record or store, in at least one memory (120), the third image (503) to be displayed in the third time interval (l3).

[0086] At least one processor (110) may, based on the second event, transmit the second image (502) whose gray scale has been adjusted to the display driving circuit (131) to display the second image (502) with the gray scale adjusted on the display panel (133) at the first divided brightness level. While transmitting the second image (502) whose gray scale has not been adjusted to the display driving circuit (131) based on the second event, the at least one processor (110) may store or record the second image (502) whose gray scale has not been adjusted in at least one memory (120). For example, at least one processor (110) may transmit a second image (502) whose gray scale is adjusted to the display driving circuit (131) to display the second image during the first time period (l1) on the display panel (133) based on the second event, and may store images to be displayed during the second time period (l2) or after the second time period (l2) in at least one memory (120).

[0087] At least one processor (110) can acquire a third image (503) to be displayed in a third time interval (l3) so as to adjust the brightness level to a second brightness level. At least one processor (110) can transmit the third image (503) to a display driving circuit (131) via an interface (135) so as to display the third image (503) on a display panel (133), and can at least temporarily store or record the third image (503) in at least one memory (120).

[0088] At least one processor (110) can adjust the gray scale of the blended third image (503) to change the brightness of the display panel (133) to a third split brightness level between the first brightness and the second brightness so that the third image (503) with adjusted brightness is displayed on the display panel (133) via the display driving circuit (131). At least one processor (110) can store the blended third image (503) in at least one memory (120) so as to be reused in the next frame.

[0089] At least one processor (110) can obtain a third image (533) stored in at least one memory (120). At least one processor (110) can adjust the gray scale of the third image (533) obtained from at least one memory (120) to have a second brightness level.

[0090] At least one processor (110) may be configured to retransmit data for the third image (533) acquired from the at least one memory (120) to the display driving circuit (131) to display the third image (503) again on the display panel (133) within the third time interval (l3). At least one processor (110) may transmit the third image (533) with the gray scale adjusted to the display driving circuit (131) to display the third image (533) acquired from the at least one memory (120) with the gray scale adjusted on the display panel (133) during the fourth time interval (l4) at the fourth divided brightness level based on the second event. At least one processor (110) can adjust the gray scale of data for the third image (533) acquired from at least one memory (120) in the fifth time period (l5) to the fifth division brightness and transmit the same to the display driving circuit (131) if there is no change in the image displayed in the fifth time period (l5).

[0091] The brightness change described above is shown as adjusting the color of an image, such as gray scale, by at least one processor (110), but is not limited thereto. At least one processor (110) may be configured to adjust the source voltage and the gate voltage applied to the display panel (133) through the display driving circuit (131) in order to adjust the brightness of the display panel (133). For example, at least one processor (110) may transmit data about an image to the display driving circuit (131). The data about the image may include information related to the magnitude of the source voltage and the gate voltage in order to adjust the brightness of the display panel (133).

[0092] FIG. 6A is a diagram illustrating storing an image in memory and transmitting the image stored in the memory to a display driving circuit in response to a third event.

[0093] Referring to FIG. 6A, at least one processor (110) can sequentially display a first image (601) and a second image (602). After displaying the first image (601) on the display panel (133), the at least one processor (110) can display the second image (602) on the display panel (133). For example, the at least one processor (110) can switch the image displayed on the display panel (133) from the first image (601) to the second image (602). The at least one processor (110) can be configured to acquire a third image (603) in which multiple images are overlaid, as an image following the second image (602) while the second image (602) is displayed on the display panel (133) (e.g., an image to be displayed after the second image). For example, at least one processor (110) may be configured to acquire a second image (602) obtained using multiple images while the first image (601) is displayed on the display panel (133). The at least one processor (110) may transmit the second image (602) to the display driving circuit (131) via the interface (135) so as to display the second image (602) on the display panel (133).

[0094] At least one processor (110) can acquire a blended third image (603) within a time length (t1) corresponding to a vertical synchronization signal cycle. The time length (t1) may be a time length that starts at a timing when the second image (602) starts to be displayed on the display panel (133) and ends at a timing when the second image (602) ends being displayed on the display panel (133). For example, the time length (t1) may start at a timing when the first image (601) ends being displayed on the display panel (133) and end at a timing when the third image (603) starts to be displayed.

[0095] At least one processor (110) may be configured to transmit the data for the third image (603) to the display driving circuit (131) to display the third image (603) on the display panel (133). For example, the at least one processor (110) may transmit the blended third image (603) to the display driving circuit (131) via the interface (135) to display the third image (603) on the display panel (133).

[0096] At least one processor (110) may, based on a third event, at least temporarily store or record a third image (603) in at least one memory (120). The third event may include preventing afterimages on the display panel (133). The third event may include that the time length from the timing at which the display of the second image (602) starts to the timing at which the display of the second image (602) ends is longer than a reference time length. For example, the third event may include that the length of time at which the second image (602) is displayed on the display panel (133) is longer than the reference time length. When the displayed time is longer than the reference time length, when the third image (603) is displayed on the display panel (133), a part of the second image (602), which is a previous image of the third image (603), may be displayed.

[0097] The third event may include preventing afterimages on the display panel (133). The first event may include a time length from the start timing of displaying the first image (601) to the end timing of displaying the first image (601) that is longer than a reference time length. For example, the first event may include a time (1 / 30 s * 4 frames) for which the first image (601) is displayed on the display panel (133) that is longer than the reference time length (e.g., 1 / 10 s). When the displayed time length is longer than the reference time length, when the third image (603) is displayed on the display panel (133), a part of the second image (602), which is a previous image of the third image (603), may be displayed.

[0098] At least one processor (110) may be configured to re-display an image corresponding to the third image (603) on the display panel (133) to remove the afterimage. For example, the at least one processor (110) may be configured to re-transmit data for the third image (633) acquired from the at least one memory (120) to the display driving circuit (131) to re-display the third image (603) on the display panel (133) based on a reference refresh rate associated with reading an image stored in the at least one memory (120) while the third image (603) is displayed on the display panel (133) through the display driving circuit (131). The at least one processor (110) may at least temporarily record or store the blended third image (603) in the at least one memory (120). For example, based on identifying that the time length (t1), which is the display time of the second image (602), is longer than the reference time length (ts), at least one processor (110) can transmit the blended third image (603) to the display driving circuit (131) via the interface (135) and simultaneously record the blended third image (603) in at least one memory (120). For example, the data for the third image (603) can be transmitted to the display driving circuit (131) to display the third image (603) on the display panel (133).

[0099] At least one processor (110) can transmit the third image (633) stored in the at least one memory (120) to the display driving circuit (131) through the interface (135) based on identifying that the third image (603) is maintained in the vertical synchronization signal after acquiring the third image (603). At least one processor (110) can be configured to retransmit data for the third image (633) acquired from the at least one memory (120) to the display driving circuit (131) to re-display the third image (603 or 633) on the display panel (133) based on a reference refresh rate associated with reading the image stored in the at least one memory (120) while the third image (603) is displayed on the display panel (133) through the display driving circuit (131). The display driving circuit (131) can obtain a third image (633) stored in at least one memory (120) from at least one processor (110) through the interface (135). For example, the display driving circuit (131) can display the third image (633) stored in at least one memory (120) on the display panel (133). The at least one processor (110) can display the third image (603) obtained from at least one processor (110) on the display panel (133) through the display driving circuit (131) and then display the third image (633) stored in at least one memory (120) on the display panel (133) in a frame. The display panel (133) can remove an afterimage caused by the second image (602) by re-displaying the third image (633) obtained from at least one memory (120) corresponding to the third image (603).

[0100] FIG. 6b is a diagram showing storing an image in memory and transmitting the image stored in the memory to a display driving circuit in response to a fourth event.

[0101] Referring to FIG. 6B, at least one processor (110) can sequentially display a second image (612) and a third image (613). After displaying the second image (612) on the display panel (133), the at least one processor (110) can display the third image (613) on the display panel (133). For example, the at least one processor (110) can switch the image displayed on the display panel (133) from the second image (612) to the third image (613). The at least one processor (110) can be configured to acquire the third image (613) in which multiple images are overlaid, as an image following the second image (612), while the second image (612) is displayed on the display panel (133). For example, at least one processor (110) may be configured to acquire a third image (613) using multiple images as an image to be changed from the second image (612) while the second image (612) is displayed on the display panel (133). At least one processor (110) may transmit the second image (612) to the display driving circuit (131) via the interface (135) so as to display the second image (612) on the display panel (133).

[0102] At least one processor (110) may obtain a blended third image (613). At least one processor (110) may be configured to display the third image (613) through the display panel (133) for a time length (t2). The time length (t3) may be a time length that starts when the third image (613) starts to be displayed on the display panel (133) and ends when the third image (613) stops being displayed on the display panel (133). For example, the time length (t2) may start when the second image (612) stops being displayed on the display panel (133) and end when the next image of the third image (613) starts to be displayed on the display panel (133). If the above time length (t2) is longer than the time length for the first image (611) and the time length for the second image (612), or if the above time length (t2) is longer than the reference time length, at least one processor (110) may store or record the third image (613) in at least one memory (120) to prevent afterimages.

[0103] At least one processor (110) may be configured to transmit the data for the third image (613) to the display driving circuit (131) to display the third image (613) on the display panel (133). For example, the at least one processor (110) may transmit the blended third image (613) to the display driving circuit (131) via the interface (135) to display the third image (613) on the display panel (133).

[0104] At least one processor (110) may, based on a fourth event, at least temporarily store or record a third image (613) in at least one memory (120). The fourth event may include an event for preventing afterimages of the display panel (133). The fourth event may include that the time length (t2) is longer than the reference time length (ts). When the displayed time length (t2) is longer than the reference time length (ts), when displaying the next image on the display panel (133), a part of the third image (613) may be displayed or continued.

[0105] At least one processor (110) may be configured to re-display an image corresponding to the third image (613) on the display panel (133) so as to remove or reduce the afterimage. For example, the at least one processor (110) may be configured to re-transmit data for the third image (633) acquired from the at least one memory (120) to the display driving circuit (131) to re-display the third image (613) on the display panel (133) based on the reference time length (ts) while the third image (613) is displayed on the display panel (133) through the display driving circuit (131). For example, the at least one processor (110) may identify that the display time length of the third image (613) exceeds the reference time length (ts) while the third image (613) is being displayed on the display panel (133). At least one processor (110) may transmit data on the third image (643) obtained from at least one memory (120) to the display driving circuit (131) through the interface (135) based on the identification. At least one processor (110) may record or store the blended third image (613) at least temporarily in the at least one memory (120). For example, based on identifying that the time length (t2), which is the display time of the third image (613), is longer than the reference time length (ts), the at least one processor (110) may transmit the blended third image (613) to the display driving circuit (131) through the interface (135) and simultaneously record the blended third image (613) in the at least one memory (120). For example, the data for the third image (613) can be transmitted to the display driving circuit (131) to display the third image (613) on the display panel (133).

[0106] At least one processor (110) may transmit the third image (643) stored in at least one memory (120) to the display driving circuit (131) through the interface (135) based on the fact that the display time length of the third image (613) exceeds the reference time length (ts). At least one processor (110) may be configured to retransmit data for the third image (643) acquired from the at least one memory (120) to the display driving circuit (131) to display the third image (613 or 643) again on the display panel (133) based on the fact that the display time length of the third image (613) exceeds the reference time length (ts) while the third image (613) is displayed on the display panel (133) through the display driving circuit (131). The display driving circuit (131) can obtain the third image (643) stored in at least one memory (120) from at least one processor (110) through the interface (135). For example, the display driving circuit (131) can display the third image (643) stored in at least one memory (120) on the display panel (133). The at least one processor (110) can display the third image (613) obtained from the at least one processor (110) on the display panel (133) through the display driving circuit (131) and then display the third image (643) stored in at least one memory (120) on the display panel (133) in a frame. The display panel (133) can reduce or eliminate the afterimage phenomenon in which a part of the third image (643) remains in the image to be displayed again after the third image (643) by re-displaying the third image (643) acquired from at least one memory (120) corresponding to the third image (613).

[0107] FIG. 7 is a diagram illustrating storing an image in memory and transmitting the image stored in the memory to a display driving circuit in response to a fifth event.

[0108] Referring to FIG. 7, at least one processor (110) can sequentially display a first image (701) and a second image (702). After displaying the first image (701) on the display panel (133), the at least one processor (110) can display the second image (702) on the display panel (133). For example, the at least one processor (110) can switch the image displayed on the display panel (133) from the first image (701) to the second image (702). The at least one processor (110) can be configured to acquire or generate a second image (702) in which multiple images are overlaid, as an image subsequent to the first image (701), while the first image (701) is displayed on the display panel (133). For example, at least one processor (110) may be configured to obtain a blended second image (702) using multiple images or layers while the first image (701) is displayed on the display panel (133). The at least one processor (110) may transmit the first image (701) to the display driving circuit (131) via the interface (135) so as to display the first image (701) on the display panel (133).

[0109] At least one processor (110) may obtain a blended second image (702). At least one processor (110) may be configured to display the second image (702) through a display panel (133). The first image (701) and the second image (702) may be the same image or substantially the same image. The first image (701) and the second image (702) may be displayed on the display panel (133) for a time period (t3). The time period (t3) may be a time period that starts when the first image (701) begins to be displayed on the display panel (133) and ends when the second image (702) ends being displayed on the display panel (133). For example, the time length (t3) may start at the timing when the previous image of the first image (701) ends displaying on the display panel (133), and may end at the timing when the next image of the second image (702) begins displaying on the display panel (133). If the time length (t3) is longer than the reference time length (ts), at least one processor (110) may store or record the second image (702) in at least one memory (120) in order to prevent (e.g., reduce or decrease) afterimages.

[0110] At least one processor (110) may be configured to transmit the image data for the second image (702) to the display driving circuit (131) to display the second image (702) on the display panel (133). For example, the at least one processor (110) may transmit the blended second image (702) to the display driving circuit (131) via the interface (135) to display the second image (702) on the display panel (133).

[0111] At least one processor (110) may, based on a fifth event, at least temporarily store or record the second image (702) in at least one memory (120). The fifth event may include an event for preventing afterimages on the display panel (133). The fifth event may include that a time length (t3) from a start timing of displaying the first image (701) to an end timing of displaying the second image (702) is longer than a reference time length (ts). For example, the fifth event may include that a time length (t3) during which substantially the same first image (701) and second image (702) are displayed on the display panel (133) is longer than the reference time length (ts). Substantially the same may include that the images are completely the same, and that the images have some differences in configuration but mostly the same configuration or visual expression. When the time length (t3) during which the first image (701) and the second image (702) are displayed is greater than the reference time length (ts), when displaying the next image of the second image (702) on the display panel (133), a part of the second image (702) may be continuously displayed.

[0112] At least one processor (110) may be configured to re-display an image corresponding to the second image (702) on the display panel (133) so as to remove or reduce the afterimage. For example, the at least one processor (110) may be configured to re-transmit data for the second image (732) acquired from the at least one memory (120) to the display driving circuit (131) based on the reference time length (ts) to re-display the second image (702) on the display panel (133) while the second image (702) is displayed on the display panel (133) through the display driving circuit (131). For example, at least one processor (110) may identify that, while the second image (702) is being displayed on the display panel (133), the display time length (t3), which is the sum of the display times of the first image (701) and the second image (702), exceeds the reference time length (ts). Based on the identification, at least one processor (110) may transmit data for the second image (732) acquired from at least one memory (120) to the display driving circuit (131) through the interface (135). At least one processor (110) may at least temporarily record or store the blended second image (732) in at least one memory (120). For example, based on identifying that the display time length (t3), which is the sum of the display times of the first image (701) and the second image (702), is longer than the reference time length (ts), at least one processor (110) can transmit the blended second image (702) to the display driving circuit (131) via the interface (135) and simultaneously record the blended second image (702) in at least one memory (120).For example, the data for the second image (702) can be transmitted to the display driving circuit (131) to display the second image (702) on the display panel (133).

[0113] At least one processor (110) can transmit the second image (732) stored in at least one memory (120) to the display driving circuit (131) through the interface (135) based on the fact that the display time length (t3), which is the sum of the display times of the first image (701) and the second image (702), exceeds the reference time length (ts). At least one processor (110) may be configured to retransmit data for the second image (732) acquired from the at least one memory (120) to the display driving circuit (131) to display the second image (702 or 732) again on the display panel (133) based on the fact that the display time length (t3), which is the sum of the display times of the first image (701) and the second image (702), exceeds the reference time length (ts) while the second image (702) is displayed on the display panel (133) through the display driving circuit (131). The display driving circuit (131) may acquire the second image (732) stored in the at least one memory (120) from the at least one processor (110) through the interface (135). For example, the display driving circuit (131) can display a second image (732) stored in at least one memory (120) on the display panel (133). The at least one processor (110) can display a second image (702) acquired from at least one processor (110) on the display panel (133) through the display driving circuit (131) and then display the second image (732) stored in at least one memory (120) on the display panel (133) in a frame. The display panel (133) can reduce or decrease an afterimage phenomenon in which a portion of the second image (732) remains in an image to be displayed after the second image (732) by re-displaying the second image (732) acquired from at least one memory (120) corresponding to the second image (702).

[0114] In one embodiment, an electronic device uses multiple images or layers to display images to apply effects to the images displayed on the display. The electronic device consumes significant power during the composite operation of overlapping multiple images. A method for reducing this power consumption is needed.

[0115] The technical tasks to be achieved in this document are not limited to the technical tasks mentioned above, and other technical tasks not mentioned will be clearly understood by those with ordinary knowledge in the technical field to which this document pertains.

[0116] According to the above-described embodiment, an electronic device (e.g., electronic device (100) of FIG. 1) may include a display (130) including a display driving circuit (131) and a display panel (133). The electronic device may further include a memory (120) including one or more storage media for storing instructions. The electronic device may further include at least one processor (110) including one or more processing circuits.

[0117] The instructions, when individually or collectively executed by the at least one processor (110), may cause the electronic device to acquire a second image, in which multiple images are overlaid, as a subsequent image to the first image while the first image is displayed on the display panel (133). The instructions may cause the electronic device to at least temporarily store the second image in the memory (120) based on an event that transmits data for the second image to the display driver circuit (131) at a reference refresh rate higher than the refresh rate for the second image. The instructions may cause the electronic device to transmit the data for the second image to the display driver circuit (131) for displaying the second image on the display panel (133). The above instructions may cause the electronic device (100) to retransmit data for the second image obtained from the memory (120) to the display driving circuit (131) to re-display the second image on the display panel (133) based on the reference refresh rate while the second image is being displayed on the display panel (133) via the display driving circuit (131).

[0118] In one embodiment, the event may include changing the brightness level from a first brightness level to a second brightness level different from the first brightness level within a predetermined number of frames.

[0119] According to one embodiment, the event may include that the time during which the first image is displayed on the display panel (133) is greater than or equal to a reference time.

[0120] In one embodiment, the event may include that the playback rate for the second image is lower than the playback rate for the first image.

[0121] In one embodiment, the event may include changing, within a predetermined number of frames, the amount of light emitted from sub-pixels configured to emit a specified color from a first amount of light to a second amount of light different from the first amount of light.

[0122] According to one embodiment, the at least one processor (110) includes at least one first processor (e.g., the first processor (111) of FIG. 1) and a second processor (e.g., the second processor (112) of FIG. 1), and the instructions, when executed by the second processor (112), may cause the electronic device to obtain a first partial image from the at least one first processor (111). The instructions may cause the electronic device to obtain a third image by synthesizing the first partial image with the second image obtained from the memory (120). The instructions may cause the electronic device (100) to transmit the third image to the display driving circuit (131).

[0123] In one embodiment, the instructions, when executed by the second processor (112), may cause the electronic device to obtain a second partial image, different from the first partial image, from the at least one first processor (111) while the third image is displayed on the display panel (133). The instructions may cause the electronic device (100) to obtain a fourth image by synthesizing the second partial image with the second image obtained from the memory (120). The instructions may cause the electronic device (100) to transmit the fourth image to the display driving circuit (131).

[0124] According to one embodiment, the at least one processor (110) may include at least one first processor (111) and a second processor (112). The instructions, when executed by the second processor (112), may cause the electronic device to obtain a third image different from the second image from the at least one first processor (111). The instructions may cause the electronic device (100) to delete the second image stored in the memory (120) and transmit data for the third image to the display driving circuit (131) in response to obtaining the third image.

[0125] According to one embodiment, the at least one processor (110) may include a circuit including a storage medium of the memory (120) in which the second image is at least temporarily stored.

[0126] According to one embodiment, the instruction to at least temporarily store the second image in the memory (120), when individually or collectively executed by the one or more processors, may cause the electronic device (100) to change the first image stored in the memory (120) to the second image.

[0127] According to one embodiment, the instructions for at least temporarily storing the second image within the memory (120), when individually or collectively executed by the one or more processors, may cause the electronic device (100) to store the second image within the memory (120), if space for the second image is empty.

[0128] The at least one processor (110) includes at least one first processor (111) and a second processor (112), and the instructions, when executed by the second processor (112), may cause the electronic device (100) to display the second image on the display panel (133) through the display driving circuit (131) until a third image different from the second image is received through the at least one first processor (111).

[0129] According to one embodiment, the instructions, when executed by the second processor (112), may cause the electronic device (100) to display a second image stored in the memory (120) on the display panel (133) based on the reference refresh rate while displaying the second image on the display panel (133).

[0130] According to one embodiment, the at least one processor (110) includes at least one first processor (111) and a second processor (112), and the instructions, when executed by the second processor (112), may cause the electronic device to acquire a third image different from the second image as a subsequent image to the second image. The instructions may cause the electronic device (100) to remove data for the second image stored in a space for data for an image displayed on the display panel (133) in the memory (120).

[0131] According to one embodiment, the instructions, when executed by the second processor (112), may cause the second processor (112) to, if the third image is obtained by overlaying multiple images, at least temporarily store the third image in the memory (120) and transmit the data for the third image to the display driving circuit (131). The instructions may cause the electronic device (100) to, if the third image is obtained from a single image, refrain from storing the third image in the memory (120) and transmit the data for the third image to the display driving circuit (131).

[0132] In one embodiment, the event may include, within the video hybrid mode of the DSI, transferring an image acquired from the at least one processor (110) to the display driving circuit (131) bypassing the memory (132) while the memory (132) within the display driving circuit (131) is inactive.

[0133] According to one embodiment, an electronic device (e.g., the electronic device (100) of FIG. 1) may include a display (e.g., the display (130) of FIG. 1) including a display driving circuit (e.g., the display driving circuit (131) of FIG. 1) that includes a first memory (e.g., at least one first memory (113) of FIG. 1) configured to store an image, and a display panel (e.g., the display panel (133) of FIG. 1). The electronic device may include a second memory (e.g., the memory (120) of FIG. 1) that includes one or more storage media that store instructions. The electronic device may include a plurality of processors (e.g., the at least one processor (110) of FIG. 1) that include at least one first processor (e.g., the first processor (111) of FIG. 1) and a second processor (e.g., the second processor (112) of FIG. 1) that include one or more processing circuits. The instructions, when executed by the second processor (112), may cause the electronic device to acquire a second image, in which multiple images acquired from the first processor (111) are overlaid, as an image to be displayed next to the first image while the first image is displayed on the display panel (133) based on an event in which the first memory (120) is deactivated. The instructions may cause the electronic device to at least temporarily store the second image in the second memory (132) based on an event in which data for the second image is transmitted to the display driver circuit (131) at a reference refresh rate higher than the refresh rate for the second image. The instructions may cause the electronic device to transmit the data for the second image to the display driver circuit (131) to display the second image on the display panel (133).The above instructions may cause the electronic device (100) to retransmit data for the second image obtained from the second memory (132) to the display driving circuit (131) to re-display the second image on the display panel (133) based on the reference refresh rate while the second image is being displayed on the display panel (133) via the display driving circuit (131).

[0134] In one embodiment, the event may include one of: changing a brightness level from a first brightness level to a second brightness level different from the first brightness level within a predetermined number of frames; a time for which the first image is displayed on the display panel (133) being equal to or greater than a reference time; a refresh rate for the second image being lower than the refresh rate for the first image; or changing an amount of light emitted from sub-pixels configured to emit a designated color from a first light amount level to a second light amount level different from the first light amount level within a predetermined number of frames.

[0135] According to one embodiment, the instructions, when executed by the second processor (112), may cause the electronic device to obtain a first partial image from the at least one first processor (111). The instructions may cause the electronic device (100) to obtain a third image by synthesizing the first partial image with the second image obtained from the memory (132). The instructions may cause the electronic device (100) to transmit the third image to the display driving circuit (131).

[0136] According to one embodiment, the instruction to at least temporarily store the second image in the second memory (132), when individually or collectively executed by the one or more processors, may cause the electronic device (100) to change the first image stored in the memory (132) to the second image.

[0137] According to one embodiment, an event in which the first memory (120) is deactivated may include that the playback frame of the first image is greater than or equal to a reference frame.

[0138] In one embodiment, the event may include, within the video hybrid mode of the DSI, transmitting an image acquired from at least one of the plurality of processors to the display driving circuit (131) bypassing the memory (120) while the memory (120) within the display driving circuit (131) is inactive.

[0139] FIG. 8 is a block diagram of an electronic device (801) within a network environment (800) according to various embodiments.

[0140] Referring to FIG. 8, in a network environment (800), an electronic device (801) may communicate with an electronic device (802) via a first network (898) (e.g., a short-range wireless communication network), or may communicate with at least one of an electronic device (804) or a server (808) via a second network (899) (e.g., a long-range wireless communication network). In one embodiment, the electronic device (801) may communicate with the electronic device (804) via the server (808). According to one embodiment, the electronic device (801) may include a processor (820), a memory (830), an input module (850), an audio output module (855), a display module (860), an audio module (870), a sensor module (876), an interface (877), a connection terminal (878), a haptic module (879), a camera module (880), a power management module (888), a battery (889), a communication module (890), a subscriber identification module (896), or an antenna module (897). In some embodiments, the electronic device (801) may omit at least one of these components (e.g., the connection terminal (878)), or may have one or more other components added. In some embodiments, some of these components (e.g., the sensor module (876), the camera module (880), or the antenna module (897)) may be integrated into one component (e.g., the display module (860)).

[0141] The processor (820) may, for example, execute software (e.g., a program (840)) to control at least one other component (e.g., a hardware or software component) of the electronic device (801) connected to the processor (820) and perform various data processing or operations. According to one embodiment, as at least a part of the data processing or operations, the processor (820) may store commands or data received from other components (e.g., a sensor module (876) or a communication module (890)) in a volatile memory (832), process the commands or data stored in the volatile memory (832), and store result data in a non-volatile memory (834). According to one embodiment, the processor (820) may include a main processor (821) (e.g., a central processing unit or an application processor) or an auxiliary processor (823) (e.g., a graphics processing unit, a neural processing unit (NPU), an image signal processor, a sensor hub processor, or a communication processor) that can operate independently or together with the main processor (821). For example, when the electronic device (801) includes the main processor (821) and the auxiliary processor (823), the auxiliary processor (823) may be configured to use less power than the main processor (821) or to be specialized for a given function. The auxiliary processor (823) may be implemented separately from the main processor (821) or as a part thereof.

[0142] The auxiliary processor (823) may control at least a portion of functions or states associated with at least one component (e.g., a display module (860), a sensor module (876), or a communication module (890)) of the electronic device (801), for example, on behalf of the main processor (821) while the main processor (821) is in an inactive (e.g., sleep) state, or together with the main processor (821) while the main processor (821) is in an active (e.g., application execution) state. In one embodiment, the auxiliary processor (823) (e.g., an image signal processor or a communication processor) may be implemented as a part of another functionally related component (e.g., a camera module (880) or a communication module (890)). In one embodiment, the auxiliary processor (823) (e.g., a neural network processing unit) may include a hardware structure specialized for processing artificial intelligence models. The artificial intelligence models may be generated through machine learning. This learning can be performed, for example, on the electronic device (801) itself where the artificial intelligence model is executed, or can be performed through a separate server (e.g., server (808)). The learning algorithm can include, for example, supervised learning, unsupervised learning, semi-supervised learning, or reinforcement learning, but is not limited to the examples described above. The artificial intelligence model can include multiple artificial neural network layers.The artificial neural network may be one of a deep neural network (DNN), a convolutional neural network (CNN), a recurrent neural network (RNN), a restricted Boltzmann machine (RBM), a deep belief network (DBN), a bidirectional recurrent deep neural network (BRDNN), a deep Q-network, or a combination of two or more of the above, but is not limited to the examples described above. In addition to, or alternatively to, a hardware structure, an artificial intelligence model may include a software structure.

[0143] The memory (830) can store various data used by at least one component (e.g., the processor (820) or the sensor module (876)) of the electronic device (801). The data can include, for example, software (e.g., the program (840)) and input data or output data for commands related thereto. The memory (830) can include volatile memory (832) or non-volatile memory (834).

[0144] The program (840) may be stored as software in the memory (830) and may include, for example, an operating system (842), middleware (844), or an application (846).

[0145] The input module (850) can receive commands or data to be used in a component of the electronic device (801) (e.g., a processor (820)) from an external source (e.g., a user) of the electronic device (801). The input module (850) can include, for example, a microphone, a mouse, a keyboard, a key (e.g., a button), or a digital pen (e.g., a stylus pen).

[0146] The audio output module (855) can output audio signals to the outside of the electronic device (801). The audio output module (855) can include, for example, a speaker or a receiver. The speaker can be used for general purposes, such as multimedia playback or recording playback. The receiver can be used to receive incoming calls. In one embodiment, the receiver can be implemented separately from the speaker or as part of the speaker.

[0147] The display module (860) can visually provide information to an external party (e.g., a user) of the electronic device (801). The display module (860) may include, for example, a display, a holographic device, or a projector and a control circuit for controlling the device. In one embodiment, the display module (860) may include a touch sensor configured to detect a touch, or a pressure sensor configured to measure the intensity of a force generated by the touch.

[0148] The audio module (870) can convert sound into an electrical signal, or vice versa, convert an electrical signal into sound. According to one embodiment, the audio module (870) can acquire sound through the input module (850), output sound through the sound output module (855), or an external electronic device (e.g., electronic device (802)) (e.g., speaker or headphone) directly or wirelessly connected to the electronic device (801).

[0149] The sensor module (876) can detect the operating status (e.g., power or temperature) of the electronic device (801) or the external environmental status (e.g., user status) and generate an electrical signal or data value corresponding to the detected status. According to one embodiment, the sensor module (876) can include, for example, a gesture sensor, a gyro sensor, a barometric pressure sensor, a magnetic sensor, an acceleration sensor, a grip sensor, a proximity sensor, a color sensor, an IR (infrared) sensor, a biometric sensor, a temperature sensor, a humidity sensor, or an illuminance sensor.

[0150] The interface (877) may support one or more designated protocols that may be used to directly or wirelessly connect the electronic device (801) with an external electronic device (e.g., the electronic device (802)). In one embodiment, the interface (877) may include, for example, a high definition multimedia interface (HDMI), a universal serial bus (USB) interface, an SD card interface, or an audio interface.

[0151] The connection terminal (878) may include a connector through which the electronic device (801) may be physically connected to an external electronic device (e.g., the electronic device (802)). In one embodiment, the connection terminal (878) may include, for example, an HDMI connector, a USB connector, an SD card connector, or an audio connector (e.g., a headphone connector).

[0152] The haptic module (879) can convert electrical signals into mechanical stimuli (e.g., vibration or movement) or electrical stimuli that a user can perceive through tactile or kinesthetic sensations. According to one embodiment, the haptic module (879) can include, for example, a motor, a piezoelectric element, or an electrical stimulation device.

[0153] The camera module (880) can capture still images and videos. According to one embodiment, the camera module (880) may include one or more lenses, image sensors, image signal processors, or flashes.

[0154] The power management module (888) can manage the power supplied to the electronic device (801). According to one embodiment, the power management module (888) can be implemented as, for example, at least a part of a power management integrated circuit (PMIC).

[0155] A battery (889) may power at least one component of the electronic device (801). In one embodiment, the battery (889) may include, for example, a non-rechargeable primary battery, a rechargeable secondary battery, or a fuel cell.

[0156] The communication module (890) may support the establishment of a direct (e.g., wired) communication channel or a wireless communication channel between the electronic device (801) and an external electronic device (e.g., electronic device (802), electronic device (804), or server (808)), and the performance of communication through the established communication channel. The communication module (890) may operate independently from the processor (820) (e.g., application processor) and may include one or more communication processors that support direct (e.g., wired) communication or wireless communication. According to one embodiment, the communication module (890) may include a wireless communication module (892) (e.g., a cellular communication module, a short-range wireless communication module, or a global navigation satellite system (GNSS) communication module) or a wired communication module (894) (e.g., a local area network (LAN) communication module, or a power line communication module). Any of these communication modules may communicate with an external electronic device (804) via a first network (898) (e.g., a short-range communication network such as Bluetooth, wireless fidelity (WiFi) direct, or infrared data association (IrDA)) or a second network (899) (e.g., a long-range communication network such as a legacy cellular network, a 5G network, a next-generation communication network, the Internet, or a computer network (e.g., a LAN or WAN)). These various types of communication modules may be integrated into a single component (e.g., a single chip) or implemented as multiple separate components (e.g., multiple chips). The wireless communication module (892) may use subscriber information (e.g., an international mobile subscriber identity (IMSI)) stored in the subscriber identification module (896) to identify or authenticate the electronic device (801) within a communication network such as the first network (898) or the second network (899).

[0157] The wireless communication module (892) can support 5G networks and next-generation communication technologies following the 4G network, such as NR access technology (new radio access technology). The NR access technology can support high-speed transmission of high-capacity data (eMBB (enhanced mobile broadband)), minimizing terminal power and connecting multiple terminals (mMTC (massive machine type communications)), or high reliability and low latency (URLLC (ultra-reliable and low-latency communications)). The wireless communication module (892) can support, for example, a high-frequency band (e.g., mmWave band) to achieve a high data transmission rate. The wireless communication module (892) can support various technologies for securing performance in a high-frequency band, such as beamforming, massive multiple-input and multiple-output (MIMO), full dimensional MIMO (FD-MIMO), array antenna, analog beam-forming, or large scale antenna. The wireless communication module (892) can support various requirements specified in the electronic device (801), an external electronic device (e.g., the electronic device (804)), or a network system (e.g., the second network (899)). According to one embodiment, the wireless communication module (892) can support a peak data rate (e.g., 20 Gbps or more) for eMBB realization, a loss coverage (e.g., 164 dB or less) for mMTC realization, or a U-plane latency (e.g., 0.5 ms or less for downlink (DL) and uplink (UL), or 1 ms or less for round trip) for URLLC realization.

[0158] The antenna module (897) can transmit or receive signals or power to or from an external device (e.g., an external electronic device). In one embodiment, the antenna module (897) may include an antenna including a radiator formed of a conductor or a conductive pattern formed on a substrate (e.g., a PCB). In one embodiment, the antenna module (897) may include a plurality of antennas (e.g., an array antenna). In this case, at least one antenna suitable for a communication method used in a communication network, such as the first network (898) or the second network (899), may be selected from the plurality of antennas by, for example, the communication module (890). A signal or power may be transmitted or received between the communication module (890) and an external electronic device via the selected at least one antenna. In some embodiments, in addition to the radiator, another component (e.g., a radio frequency integrated circuit (RFIC)) may be additionally formed as a part of the antenna module (897).

[0159] According to various embodiments, the antenna module (897) may form a mmWave antenna module. In one embodiment, the mmWave antenna module may include a printed circuit board, an RFIC disposed on or adjacent a first side (e.g., a bottom side) of the printed circuit board and capable of supporting a designated high frequency band (e.g., a mmWave band), and a plurality of antennas (e.g., an array antenna) disposed on or adjacent a second side (e.g., a top side or a side side) of the printed circuit board and capable of transmitting or receiving signals in the designated high frequency band.

[0160] At least some of the above components can be interconnected and exchange signals (e.g., commands or data) with each other via a communication method between peripheral devices (e.g., a bus, GPIO (general purpose input and output), SPI (serial peripheral interface), or MIPI (mobile industry processor interface)).

[0161] According to one embodiment, commands or data may be transmitted or received between the electronic device (801) and an external electronic device (804) via a server (808) connected to a second network (899). Each of the external electronic devices (802 or 804) may be the same or a different type of device as the electronic device (801). According to one embodiment, all or part of the operations executed in the electronic device (801) may be executed in one or more of the external electronic devices (802, 804, or 808). For example, when the electronic device (801) is to perform a certain function or service automatically or in response to a request from a user or another device, the electronic device (801) may, instead of or in addition to executing the function or service itself, request one or more external electronic devices to perform the function or at least a part of the service. One or more external electronic devices that receive the request may execute at least a portion of the requested function or service, or an additional function or service related to the request, and transmit the result of the execution to the electronic device (801). The electronic device (801) may process the result as is or additionally and provide it as at least a portion of a response to the request. For this purpose, cloud computing, distributed computing, mobile edge computing (MEC), or client-server computing technology may be used, for example. The electronic device (801) may provide an ultra-low latency service by using distributed computing or mobile edge computing, for example. In one embodiment, the external electronic device (804) may include an Internet of Things (IoT) device. The server (808) may be an intelligent server utilizing machine learning and / or a neural network. According to one embodiment, the external electronic device (804) or the server (808) may be included in the second network (899).The electronic device (801) can be applied to intelligent services (e.g., smart home, smart city, smart car, or healthcare) based on 5G communication technology and IoT-related technology.

[0162] FIG. 9 is a block diagram (900) of a display module (960) according to various embodiments.

[0163] Referring to FIG. 9, the display module (960) may include a display (910) and a display driver IC (DDI) (930) for controlling the display (910). The DDI (930) may include an interface module (931), a memory (933) (e.g., a buffer memory), an image processing module (935), or a mapping module (937). The DDI (930) may receive, for example, image information including image data or an image control signal corresponding to a command for controlling the image data, from another component of the electronic device (901) through the interface module (931). For example, according to one embodiment, image information may be received from a processor (920) (e.g., a main processor (821) (e.g., an application processor)) or an auxiliary processor (823) (e.g., a graphics processing unit) that operates independently of the function of the main processor (821). The DDI (930) may communicate with a touch circuit (950) or a sensor module (976) through the interface module (931). In addition, the DDI (930) may store at least some of the received image information in the memory (933), for example, on a frame basis. The image processing module (935) may, for example, perform preprocessing or postprocessing (e.g., resolution, brightness, or size adjustment) on at least some of the image data based on at least a characteristic of the image data, an image display characteristic, or a characteristic of the display (910). The mapping module (937) may generate a voltage value or a current value corresponding to the image data that has been preprocessed or postprocessed through the image processing module (935). According to one embodiment, the generation of voltage values ​​or current values ​​may be performed at least in part based on properties of the pixels of the display (910), for example, the arrangement of the pixels (RGB stripe or pentile structure), or the size of each of the sub-pixels.At least some pixels of the display (910) may be driven based at least in part on, for example, the voltage value or current value, so that visual information (e.g., text, an image, or an icon) corresponding to the image data may be displayed through the display (910).

[0164] According to one embodiment, the display module (960) may further include a touch circuit (950). The touch circuit (950) may include a touch sensor (951) and a touch sensor IC (953) for controlling the same. The touch sensor IC (953) may control the touch sensor (951) to detect, for example, a touch input or a hovering input for a specific location of the display (910). For example, the touch sensor IC (953) may detect a touch input or a hovering input by measuring a change in a signal (e.g., voltage, light amount, resistance, or charge amount) for a specific location of the display (910). The touch sensor IC (953) may provide information (e.g., location, area, pressure, or time) regarding the detected touch input or hovering input to the processor (920). According to one embodiment, at least a portion of the touch circuit (950) (e.g., touch sensor IC (953)) may be included as part of the display driver IC (930), or as part of the display (910), or as part of another component (e.g., auxiliary processor (823)) disposed external to the display module (960).

[0165] According to one embodiment, the display module (960) may further include at least one sensor (e.g., a fingerprint sensor, an iris sensor, a pressure sensor, or an illuminance sensor) of the sensor module (976), or a control circuit therefor. In this case, the at least one sensor or the control circuit therefor may be embedded in a part of the display module (960) (e.g., the display (910) or the DDI (930)) or a part of the touch circuit (950). For example, if the sensor module (976) embedded in the display module (960) includes a biometric sensor (e.g., a fingerprint sensor), the biometric sensor may obtain biometric information (e.g., a fingerprint image) associated with a touch input through a part of the display (910). As another example, if the sensor module (976) embedded in the display module (960) includes a pressure sensor, the pressure sensor may obtain pressure information associated with a touch input through a part or the entire area of ​​the display (910). According to one embodiment, the touch sensor (951) or sensor module (976) may be positioned between pixels of a pixel layer of the display (910), or above or below the pixel layer.

[0166] Electronic devices according to the various embodiments disclosed in this document may take various forms. Electronic devices may include, for example, portable communication devices (e.g., smartphones), computer devices, portable multimedia devices, portable medical devices, cameras, wearable devices, or home appliances. Electronic devices according to the embodiments of this document are not limited to the aforementioned devices.

[0167] The various embodiments of this document and the terminology used therein are not intended to limit the technical features described in this document to specific embodiments, but should be understood to include various modifications, equivalents, or substitutes of the embodiments. In connection with the description of the drawings, similar reference numerals may be used for similar or related components. The singular form of a noun corresponding to an item may include one or more of the items, unless the context clearly indicates otherwise. In this document, each of the phrases "A or B", "at least one of A and B", "at least one of A or B", "A, B, or C", "at least one of A, B, and C", and "at least one of A, B, or C" can include any one of the items listed together in the corresponding phrase among those phrases, or all possible combinations thereof. Terms such as "first," "second," or "first" or "second" may be used merely to distinguish one component from another, and do not limit the components in any other respect (e.g., importance or order). When a component (e.g., a first component) is referred to as "coupled" or "connected" to another component (e.g., a second component), with or without the terms "functionally" or "communicatively," it means that the component can be connected to the other component directly (e.g., wired), wirelessly, or through a third component.

[0168] The term "module" used in various embodiments of this document may include a unit implemented in hardware, software, or firmware, and may be used interchangeably with terms such as logic, logic block, component, or circuit. A module may be an integral component, or a minimum unit or part of such a component that performs one or more functions. For example, according to one embodiment, a module may be implemented in the form of an application-specific integrated circuit (ASIC).

[0169] Various embodiments of the present document may be implemented as software (e.g., a program (840)) including one or more instructions stored in a storage medium (e.g., an internal memory (836) or an external memory (838)) readable by a machine (e.g., an electronic device (801)). For example, a processor (e.g., a processor (820)) of the machine (e.g., an electronic device (801)) may call at least one instruction among the one or more instructions stored from the storage medium and execute it. This enables the machine to operate to perform at least one function according to the at least one called instruction. The one or more instructions may include code generated by a compiler or code executable by an interpreter. The machine-readable storage medium may be provided in the form of a non-transitory storage medium. Here, 'non-transitory' simply means that the storage medium is a tangible device and does not contain signals (e.g., electromagnetic waves), and the term does not distinguish between cases where data is stored semi-permanently or temporarily on the storage medium.

[0170] According to one embodiment, the method according to various embodiments disclosed in this document may be provided as included in a computer program product. The computer program product may be traded as a commodity between a seller and a buyer. The computer program product may be distributed in the form of a machine-readable storage medium (e.g., compact disc read-only memory (CD-ROM)), or may be distributed online (e.g., downloaded or uploaded) via an application store (e.g., Play Store™) or directly between two user devices (e.g., smart phones). In the case of online distribution, at least a portion of the computer program product may be temporarily stored or temporarily generated in a machine-readable storage medium, such as the memory of a manufacturer's server, an application store's server, or an intermediary server.

[0171] According to various embodiments, each component (e.g., a module or a program) of the above-described components may include one or more entities, and some of the entities may be separated and placed in other components. According to various embodiments, one or more components or operations of the aforementioned components may be omitted, or one or more other components or operations may be added. Alternatively or additionally, a plurality of components (e.g., a module or a program) may be integrated into a single component. In such a case, the integrated component may perform one or more functions of each of the plurality of components identically or similarly to those performed by the corresponding component among the plurality of components prior to the integration. According to various embodiments, the operations performed by a module, program, or other component may be executed sequentially, in parallel, iteratively, or heuristically, or one or more of the operations may be executed in a different order, omitted, or one or more other operations may be added.

Claims

1. In electronic devices, A display including a display driving circuit and a display panel; A memory including one or more storage media storing instructions; and At least one processor comprising one or more processing circuits, The above instructions, when individually or collectively executed by the at least one processor: While the first image is displayed on the display panel, a second image generated using multiple images is acquired as an image to be changed from the first image on the display panel, Based on an event that includes setting a reference refresh rate higher than the refresh rate for said second image, at least temporarily storing said second image in said memory, Transmitting the second image to the display driving circuit to display the second image on the display panel; Causing the electronic device to retransmit the second image acquired from the memory to the display driving circuit to re-display the second image on the display panel based on the reference refresh rate while the second image is displayed on the display panel. Electronic devices.

2. In paragraph 1, The above event comprises changing the brightness level of the display panel from a first brightness level to a second brightness level different from the first brightness level within a predetermined number of frames. Electronic devices.

3. In any one of the above-mentioned clauses, The above event includes identifying that the time for which the first image is displayed on the display panel is longer than a reference time. Electronic devices.

4. In any one of the above-mentioned clauses, The above event comprises that the playback rate for the second image is lower than the playback rate for the first image. Electronic devices.

5. In any one of the above-mentioned clauses, The event comprises changing, within a predetermined number of frames, the amount of light emitted from sub-pixels of the display panel configured to emit a specified color from a first light amount level to a second light amount level different from the first light amount level. Electronic devices.

6. In any one of the above-mentioned clauses, The at least one processor comprises at least one first processor and a second processor, The above instructions, when executed by the second processor, Obtaining a first partial image from at least one first processor, A third image is obtained by synthesizing the first partial image with the second image obtained from the memory, causing said electronic device to transmit said third image to said display driving circuit; Electronic devices.

7. In paragraph 6, The above instructions, when executed by the second processor, While the third image is displayed on the display panel, a second partial image different from the first partial image is acquired from the at least one first processor, A fourth image is obtained by synthesizing the second partial image to the second image obtained from the memory, causing said electronic device to transmit said fourth image to said display driving circuit; Electronic devices.

8. In any one of paragraphs 1 to 5, The at least one processor comprises at least one first processor and a second processor, The above instructions, when executed by the second processor, Obtaining a third image different from the second image from at least one first processor, In response to acquiring said third image, causing said electronic device to delete said second image stored in said memory and transmit data for said third image to said display driving circuit. Electronic devices.

9. In any one of the preceding clauses, At least one processor of the above, Further comprising an internal memory including a circuit including a storage medium of said memory in which said second image is at least temporarily stored; Electronic devices.

10. In any one of the preceding clauses, Instructions for at least temporarily storing the second image in the memory, When executed individually or collectively by said one or more processors, causing said electronic device to change said first image stored in said memory into said second image, Electronic devices.

11. In any one of the preceding clauses, Instructions for at least temporarily storing the second image in the memory, When executed individually or collectively by said one or more processors, causing said electronic device to store said second image in said space if there is no space for said second image in said memory, Electronic devices.

12. In any one of paragraphs 1 to 5, The at least one processor comprises at least one first processor and at least one second processor, The above instructions, when executed by the second processor, Causing the electronic device to display the second image on the display panel through the display driving circuit until a third image different from the second image is received through the at least one first processor. Electronic devices.

13. In paragraph 12, The above instructions, when executed by the second processor, Causing the electronic device to display the second image stored in the memory on the display panel based on the reference refresh rate while displaying the second image on the display panel. Electronic devices.

14. A non-transitory computer-readable storage medium storing instructions, wherein the instructions, when executed by at least one processor of a wearable device, While the first image is displayed on the display panel, a second image generated using multiple images is acquired as an image to be changed from the first image on the display panel, Based on an event that includes setting a reference refresh rate higher than the refresh rate for said second image, storing said second image at least temporarily in memory, Transmitting the second image to the display driving circuit to display the second image on the display panel; Causing the electronic device to retransmit the second image acquired from the memory to the display driving circuit to re-display the second image on the display panel based on the reference refresh rate while the second image is displayed on the display panel. A non-transitory computer-readable storage medium.

15. In the method of an electronic device, An operation of acquiring a second image generated using multiple images as an image to be changed from the first image on the display panel while the first image is displayed on the display panel; An action of at least temporarily storing the second image in memory based on an event that includes setting a reference refresh rate higher than the refresh rate for the second image; An operation of transmitting the second image to a display driving circuit to display the second image on the display panel; and, An operation of retransmitting the second image acquired from the memory to the display driving circuit to display the second image again on the display panel based on the reference refresh rate while the second image is displayed on the display panel. method.

Images