Face recognition method and electronic device

Abstract

The present application discloses a face recognition method and an electronic device. The method comprises: in response to receiving a face recognition starting operation, generating M image frames on the basis of a first exposure parameter; performing face recognition on the basis of the first image frame among the M image frames; when the face recognition fails, generating N image frames on the basis of a second exposure parameter, wherein N is a positive integer greater than zero; performing frame drop processing on some of the M image frames to obtain M1 image frames, wherein M1 is a positive integer less than M; and performing face recognition on the basis of the M1 image frames, and then performing face recognition on the basis of a target image frame among the N image frames. In this way, by performing frame drop processing on some of the M image frames, the processing time of face recognition performed on the basis of the image frames collected on the basis of the first exposure parameter is shortened, so that a face recognition TA can perform, as soon as possible, face recognition processing on image frames having better image quality, so as to increase the unlocking speed.

Description

Face recognition method and electronic device

[0001] This application claims priority to the Chinese patent application filed with the State Intellectual Property Office on January 5, 2024, with application number 202410024045.6 and invention name “A Face Recognition Method and Electronic Device”, the entire contents of which are incorporated by reference into this application. Technical Field

[0002] The present application belongs to the field of terminal technology, and in particular relates to a face recognition method and electronic device. Background Art

[0003] Facial recognition technology is widely used in electronic devices for identity authentication and secure unlocking. However, facial recognition technology that uses two-dimensional facial features for recognition is vulnerable to false attacks such as photos and videos, and is therefore not very secure.

[0004] To improve the security of face recognition, three-dimensional facial features can be used for recognition. For example, a TOF camera can be used to collect three-dimensional facial features, and then face recognition can be performed based on the three-dimensional facial features.

[0005] However, the current speed of facial recognition based on three-dimensional facial features is slow, resulting in longer identity authentication and security unlocking times, affecting user experience. Summary of the Invention

[0006] This application provides a face recognition method that can speed up unlocking and improve user experience.

[0007] In a first aspect, the present application provides a face recognition method, which is applied to an electronic device, and the method includes: in response to receiving a start-up operation for face recognition, generating M image frames based on a first exposure parameter; performing face recognition based on the first image frame in the M image frames; wherein M is a positive integer greater than zero; in the event of face recognition failure, generating N image frames based on a second exposure parameter; wherein the first exposure parameter is different from the second exposure parameter; wherein N is a positive integer greater than zero; performing frame drop processing on some image frames in the M image frames to obtain M1 image frames; wherein M1 is a positive integer less than M; after performing face recognition on the M1 image frames, performing face recognition based on the target image frame in the N image frames.

[0008] In this way, by dropping some of the M image frames, the face recognition processing time of the image frames collected based on the first exposure parameters is shortened, so that the face recognition TA can perform face recognition processing on the image frames with better image quality as quickly as possible, thereby improving the unlocking speed.

[0009] In one implementable manner, frame drop processing is performed on some image frames in M ​​image frames, including: sending M image frames and N image frames in sequence to an image cache area, the image cache area including an image cache queue; obtaining the i-th image frame from the image cache queue, and performing face recognition based on the i-th image frame; the i-th image frame is any image frame in the image cache queue; in the event that face recognition based on the i-th image frame fails, obtaining the i+1th to i+mth image frames from the image cache queue, and discarding the i+1th to i+mth image frames; wherein m is a positive integer greater than 0.

[0010] In the case that face recognition of the i-th image frame fails, the face recognition results of the image frames after the i-th image frame are likely to also fail. Therefore, in the case that face recognition based on the i-th image frame fails, the present application can skip one or more image frames for face recognition. In this way, the face recognition TA can perform face recognition processing on the image frames collected based on the second exposure parameters as soon as possible.

[0011] In one implementable manner, the target image frame does not belong to any image frame from the (i+1)th to (i+m)th image frames, and the target image frame is the first image frame among the N image frames obtained from the image cache queue.

[0012] In one implementable method, frame dropping processing is performed on some image frames in M ​​image frames, including: sending the k-th image frame to an image cache area; the k-th image frame is any image frame among the M image frames and the N image frames; when the number of image frames cached in the image cache queue of the image cache area reaches a preset number, discarding the k-th image frame.

[0013] In this way, the present application can reduce the maximum number of image frames cached in the image cache queue, so that some image frames in the M frames are discarded due to the lack of free cache bits in the image cache queue. In this way, the face recognition TA can perform face recognition processing on the image frames in the N frames as quickly as possible.

[0014] In one implementation, the preset number is less than 8.

[0015] In one implementation, the preset number is 3.

[0016] In one implementation, m is equal to 1.

[0017] In one achievable manner, the time required to generate one image frame is less than the time required to perform face recognition on one image frame.

[0018] In a second aspect, the present application also provides an electronic device comprising a memory and a processor; the memory and the processor are coupled; the memory is used to store computer program code, the computer program code comprising computer instructions, and when the processor executes the computer instructions, the electronic device executes a method as described in any one of the first aspects.

[0019] In a third aspect, the present application also provides a chip system, which includes a processor; the processor is coupled to a memory, the memory is used to store computer program code, the computer program code includes computer instructions, and when the processor executes the computer instructions, the method as described in any one of the first aspects is executed.

[0020] In a fourth aspect, the present application further provides a computer-readable storage medium, in which a computer program or instruction is stored. When the computer program or instruction is run on a computer, the computer executes any method as in the first aspect. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] FIG1 is a schematic diagram of the hardware structure of an electronic device provided in an embodiment of the present application;

[0022] FIG2 is a schematic diagram of a software structure of an electronic device provided in an embodiment of the present application;

[0023] FIG3 is a module interaction diagram of a face recognition method provided in an embodiment of the present application;

[0024] FIG4 is a flowchart of a face recognition method according to an embodiment of the present application;

[0025] FIG5 is an example diagram of a face recognition interface provided in an embodiment of the present application;

[0026] FIG6 is a flowchart illustrating a face recognition method according to an embodiment of the present application;

[0027] FIG7A is an example diagram of a cached image frame when the maximum cache quantity is 8, provided by an embodiment of the present application;

[0028] FIG7B is an example diagram of cached image frames when the maximum cache quantity is 3, provided by an embodiment of the present application;

[0029] FIG8 is a flowchart of a further face recognition method provided in an embodiment of the present application;

[0030] FIG9 is a flowchart of a further face recognition method according to an embodiment of the present application;

[0031] FIG10 is a structural block diagram of a chip provided in an embodiment of the present application. DETAILED DESCRIPTION

[0032] To facilitate understanding of the technical solution of the application, some concepts involved in this application are first explained below.

[0033] A rich execution environment (REE), also known as a rich execution environment, common execution environment, or untrusted execution environment, is a system runtime environment for electronic devices, capable of running operating systems such as Android, iOS, and Linux. REEs are open and scalable, but lack high security.

[0034] A trusted execution environment (TEE), also known as a secure side or secure zone, is an area requiring authorization for access. The TEE coexists with the REE in an electronic device. Through hardware-based isolation from the REE, the TEE provides security and resistance to software attacks that are common to the REE. The TEE has its own operating space and defines strict protections, offering a higher level of security than the REE. It protects TEE assets, such as data and software, from software attacks and certain types of security threats.

[0035] The REE+TEE architecture combines a TEE and REE to provide services for applications. In other words, the TEE and REE coexist within an electronic device. For example, the TEE, supported by hardware, operates in isolation from the REE. The TEE has its own operating space, offering a higher level of security than the REE, protecting assets within the TEE from software attacks. Only authorized security software can execute within the TEE, which also protects the confidentiality of the software's resources and data. Compared to the REE, the TEE offers better protection for data and resources due to its isolation and permission control mechanisms.

[0036] TA, or trusted application, is an application running in TEE that can provide security services to CA running outside TEE, such as password input, transaction signature generation, face recognition, etc.

[0037] A TOF camera (or TOF camera module) includes a transmitter (TX) and a receiver (RX). The TX is used to transmit infrared light or laser pulses, and the RX is used to receive reflected light and form an image. Because TOF cameras can capture 3D image information, applying images captured by TOF cameras to unlocking services can improve the security of facial recognition.

[0038] When a TOF camera captures images, the initial exposure parameters are fixed. Therefore, the quality of the first frame is often poor, affected by factors such as ambient light and the distance between the face and the electronic device. Consequently, facial recognition cannot be successfully performed based on the first frame, resulting in unlocking failure. If facial recognition fails, the electronic device adjusts the exposure parameters. Then, facial recognition is performed based on the adjusted exposure parameters, improving the recognition success rate.

[0039] However, currently, facial recognition must be performed on all image frames captured using the initial exposure parameters before facial recognition can be performed on image frames captured using the adjusted exposure parameters. This delays the effective date of the adjusted exposure parameters, and as a result, multiple unlocking failures are required before facial recognition can be performed on image frames captured using the adjusted exposure parameters, resulting in slower unlocking speeds.

[0040] The present application provides a face recognition method that can reduce the maximum number of image frames cached in an image cache queue and / or periodically discard image frames cached in the image cache queue, thereby discarding some image frames. In this way, the face recognition TA only needs to perform face recognition processing on some image frames, thereby shortening the face recognition processing time for image frames acquired based on initial exposure parameters, and enabling the face recognition TA to perform face recognition processing on image frames with better image quality as quickly as possible.

[0041] The face recognition method provided in the embodiments of the present application can be applied to electronic devices. In some implementations, the electronic devices can be mobile phones, tablet computers, personal computers (PCs), personal digital assistants (PDAs), wearable devices, and other electronic devices that include a TOF camera. The embodiments of the present application do not limit the specific form of the electronic devices.

[0042] The structure of the electronic device in the embodiment of the present application is described below by taking a mobile phone as an example.

[0043] Figure 1 is a schematic diagram of the hardware structure of an electronic device provided in an embodiment of the present application. As shown in Figure 1, the electronic device 100 may include a processor 110, an external memory interface 120, an internal memory 121, a universal serial bus (USB) interface 130, a charging management module 140, a power management module 141, a battery 142, an antenna 1, an antenna 2, a mobile communication module 150, a wireless communication module 160, an audio module 170, a speaker 170A, a receiver 170B, a microphone 170C, an earphone interface 170D, a sensor module 180, a button 190, a motor 191, an indicator 192, a camera 193, a display 194, and a subscriber identification module (SIM) card interface 195. The sensor module 180 may include a pressure sensor 180A, a gyroscope sensor 180B, an air pressure sensor 180C, a magnetic sensor 180D, an acceleration sensor 180E, a distance sensor 180F, a proximity light sensor 180G, a fingerprint sensor 180H, a temperature sensor 180J, a touch sensor 180K, an ambient light sensor 180L, a bone conduction sensor 180M, etc.

[0044] It should be understood that the structure illustrated in the embodiments of the present invention does not constitute a specific limitation on the electronic device 100. In other embodiments of the present application, the electronic device 100 may include more or fewer components than shown, or may combine or separate certain components, or arrange the components differently. The illustrated components may be implemented in hardware, software, or a combination of software and hardware.

[0045] The processor 110 may include one or more processing units. For example, the processor 110 may include an application processor (AP), a modem processor, a graphics processing unit (GPU), an image signal processor (ISP), a controller, a video codec, a digital signal processor (DSP), a baseband processor, and / or a neural-network processing unit (NPU). The different processing units may be independent devices or integrated into one or more processors.

[0046] The controller can generate operation control signals according to the instruction operation code and timing signal to complete the control of instruction fetching and execution.

[0047] Processor 110 may also include a memory for storing instructions and data. In some embodiments, the memory in processor 110 is a cache memory. This memory can store instructions or data that have just been used or are being recycled by processor 110. If processor 110 needs to use the same instruction or data again, it can directly retrieve it from the memory. This avoids duplicate accesses, reduces processor 110 latency, and thus improves system efficiency.

[0048] In some embodiments, the processor 110 may include one or more interfaces. The interfaces may include an inter-integrated circuit (I2C) interface, an inter-integrated circuit sound (I2S) interface, a pulse code modulation (PCM) interface, a universal asynchronous receiver / transmitter (UART) interface, a mobile industry processor interface (MIPI), a general-purpose input / output (GPIO) interface, a subscriber identity module (SIM) interface, and / or a universal serial bus (USB) interface 130, among others.

[0049] The charging management module 140 is configured to receive charging input from a charger. The charger can be either a wireless charger or a wired charger. In some wired charging embodiments, the charging management module 140 can receive charging input from the wired charger via the USB interface 130. In some wireless charging embodiments, the charging management module 140 can receive wireless charging input via the wireless charging coil of the electronic device 100. While charging the battery 142, the charging management module 140 can also provide power to the electronic device via the power management module 141.

[0050] The power management module 141 is used to connect the battery 142, the charging management module 140, and the processor 110. The power management module 141 receives input from the battery 142 and / or the charging management module 140, and provides power to the processor 110, the internal memory 121, the display 194, the camera 193, and the wireless communication module 160. The power management module 141 can also be used to monitor parameters such as battery capacity, battery cycle count, and battery health status (leakage, impedance). In some other embodiments, the power management module 141 can also be set in the processor 110. In other embodiments, the power management module 141 and the charging management module 140 can also be set in the same device.

[0051] The wireless communication function of the electronic device 100 can be implemented through the antenna 1, the antenna 2, the mobile communication module 150, the wireless communication module 160, the modem processor and the baseband processor.

[0052] Antenna 1 and Antenna 2 are used to transmit and receive electromagnetic wave signals. Each antenna in electronic device 100 can be used to cover a single or multiple communication frequency bands. Different antennas can also be reused to improve antenna utilization. For example, antenna 1 can be reused as a diversity antenna for a wireless local area network. In other embodiments, the antennas can be used in conjunction with a tuning switch.

[0053] The mobile communication module 150 can provide solutions for wireless communications including 2G / 3G / 4G / 5G applied to the electronic device 100. The mobile communication module 150 may include at least one filter, a switch, a power amplifier, a low noise amplifier (LNA), etc. The mobile communication module 150 can receive electromagnetic waves from the antenna 1, and filter, amplify, and process the received electromagnetic waves, and transmit them to the modulation and demodulation processor for demodulation. The mobile communication module 150 can also amplify the signal modulated by the modulation and demodulation processor, and convert it into electromagnetic waves for radiation through the antenna 1. In some embodiments, at least some of the functional modules of the mobile communication module 150 can be set in the processor 110. In some embodiments, at least some of the functional modules of the mobile communication module 150 can be set in the same device as at least some of the modules of the processor 110.

[0054] The modem processor may include a modulator and a demodulator. The modulator is used to modulate the low-frequency baseband signal to be transmitted into a medium-high frequency signal. The demodulator is used to demodulate the received electromagnetic wave signal into a low-frequency baseband signal. The demodulator then transmits the demodulated low-frequency baseband signal to the baseband processor for processing. After being processed by the baseband processor, the low-frequency baseband signal is passed to the application processor. The application processor outputs a sound signal through an audio device (not limited to the speaker 170A, the receiver 170B, etc.) or displays an image or video through the display screen 194. In some embodiments, the modem processor may be an independent device. In other embodiments, the modem processor may be independent of the processor 110 and be set in the same device as the mobile communication module 150 or other functional modules.

[0055] The wireless communication module 160 can provide wireless communication solutions including wireless local area networks (WLAN) (such as wireless fidelity (Wi-Fi) networks), Bluetooth (BT), global navigation satellite system (GNSS), frequency modulation (FM), near field communication (NFC), infrared (IR), etc., which are applied to the electronic device 100. The wireless communication module 160 can be one or more devices that integrate at least one communication processing module. The wireless communication module 160 receives electromagnetic waves via the antenna 2, frequency modulates and filters the electromagnetic wave signals, and sends the processed signals to the processor 110. The wireless communication module 160 can also receive the signal to be sent from the processor 110, frequency modulate it, amplify it, and convert it into electromagnetic waves for radiation through the antenna 2.

[0056] In some embodiments, antenna 1 of electronic device 100 is coupled to mobile communication module 150, and antenna 2 is coupled to wireless communication module 160, so that electronic device 100 can communicate with a network and other devices via wireless communication technology. Wireless communication technology may include global system for mobile communications (GSM), general packet radio service (GPRS), code division multiple access (CDMA), wideband code division multiple access (WCDMA), time-division code division multiple access (TD-SCDMA), long term evolution (LTE), BT, GNSS, WLAN, NFC, FM, and / or IR technology. GNSS may include the global positioning system (GPS), the global navigation satellite system (GLONASS), the Beidou navigation satellite system (BDS), the quasi-zenith satellite system (QZSS) and / or the satellite based augmentation system (SBAS).

[0057] Electronic device 100 implements display functionality through a GPU, display screen 194, and an application processor. A GPU is a microprocessor for image processing that connects display screen 194 and the application processor. The GPU is used to perform mathematical and geometric calculations for graphics rendering. Processor 110 may include one or more GPUs that execute program instructions to generate or modify display information.

[0058] Display screen 194 is used to display images, videos, and the like. Display screen 194 includes a display panel. The display panel can be a liquid crystal display (LCD), an organic light-emitting diode (OLED), an active-matrix organic light-emitting diode (AMOLED), a flexible light-emitting diode (FLED), a MiniLED, a MicroLED, a Micro-oLed, or a quantum dot light-emitting diode (QLED). In some embodiments, electronic device 100 may include one or N display screens 194, where N is a positive integer greater than one.

[0059] The electronic device 100 can implement a shooting function through an ISP, a camera 193, a video codec, a GPU, a display screen 194, and an application processor.

[0060] The ISP processes data fed back by camera 193. For example, when taking a photo, the shutter is opened, and light is transmitted through the lens to the camera's photosensitive element. The light signal is converted into an electrical signal, which is then passed to the ISP for processing and transformed into a visible image. The ISP can also perform algorithmic optimization on image noise, brightness, and skin tone. It can also optimize parameters such as exposure and color temperature of the captured scene. In some embodiments, the ISP can be located within camera 193.

[0061] The camera 193 is used to capture still images or videos. The object generates an optical image through the lens and projects it onto the photosensitive element. The photosensitive element can be a charge coupled device (CCD) or a complementary metal-oxide-semiconductor (CMOS) phototransistor. The photosensitive element converts the light signal into an electrical signal, and then transmits the electrical signal to the ISP to be converted into a digital image signal. The ISP outputs the digital image signal to the DSP for processing. The DSP converts the digital image signal into an image signal in a standard format such as RGB, YUV, etc.

[0062] In some embodiments, the electronic device 100 may include 1 or N cameras 193 , where N is a positive integer greater than 1.

[0063] Exemplarily, the electronic device 100 includes a front camera and a rear camera, wherein the front camera includes a TOF camera.

[0064] The digital signal processor is used to process digital signals. In addition to processing digital image signals, it can also process other digital signals. For example, when the electronic device 100 selects a frequency point, the digital signal processor is used to perform Fourier transform on the frequency point energy.

[0065] Video codecs are used to compress or decompress digital video. Electronic device 100 may support one or more video codecs. This allows electronic device 100 to play or record videos in various encoding formats, such as Moving Picture Experts Group (MPEG) 1, MPEG2, MPEG3, and MPEG4.

[0066] The NPU is a neural network (NN) computing processor. Drawing on the structure of biological neural networks, such as the transmission patterns between neurons in the human brain, it rapidly processes input information and can continuously self-learn. The NPU can enable intelligent cognitive applications in electronic device 100, such as image recognition, face recognition, speech recognition, and text comprehension.

[0067] The external memory interface 120 can be used to connect an external memory card, such as a Micro SD card, to expand the storage capacity of the electronic device 100. The external memory card communicates with the processor 110 via the external memory interface 120 to implement data storage functions. For example, files such as music and videos can be stored on the external memory card.

[0068] The internal memory 121 can be used to store computer executable program codes, which include instructions. The internal memory 121 may include a program storage area and a data storage area. Among them, the program storage area may store an operating system, an application required for at least one function (such as a sound playback function, an image playback function, etc.), etc. The data storage area may store data created during the use of the electronic device 100 (such as audio data, a phone book, etc.), etc. In addition, the internal memory 121 may include a high-speed random access memory, and may also include a non-volatile memory, such as at least one disk storage device, a flash memory device, a universal flash storage (UFS), etc. The processor 110 executes various functional applications and data processing of the electronic device 100 by running instructions stored in the internal memory 121 and / or instructions stored in a memory provided in the processor.

[0069] The electronic device 100 can implement audio functions such as music playback and recording through the audio module 170, the speaker 170A, the receiver 170B, the microphone 170C, the headphone jack 170D, and the application processor.

[0070] The buttons 190 include a power button, a volume button, and the like. The buttons 190 may be mechanical buttons or touch buttons. The electronic device 100 may receive key inputs and generate key signal inputs related to user settings and function control of the electronic device 100.

[0071] Motor 191 can generate vibration prompts. Motor 191 can be used for incoming call vibration prompts, and can also be used for touch vibration feedback. For example, touch operations acting on different applications (such as taking pictures, audio playback, etc.) can correspond to different vibration feedback effects. For touch operations acting on different areas of the display screen 194, motor 191 can also correspond to different vibration feedback effects. Different application scenarios (for example: time reminders, receiving messages, alarm clocks, games, etc.) can also correspond to different vibration feedback effects. The touch vibration feedback effect can also support customization.

[0072] The indicator 192 may be an indicator light, which may be used to indicate the charging status, power level changes, messages, missed calls, notifications, etc.

[0073] The SIM card interface 195 is used to connect a SIM card. The SIM card can be connected to or disconnected from the electronic device 100 by inserting it into or removing it from the SIM card interface 195. The electronic device 100 can support 1 or N SIM card interfaces, where N is a positive integer greater than 1. The SIM card interface 195 can support Nano SIM cards, Micro SIM cards, SIM cards, and the like. Multiple cards can be inserted into the same SIM card interface 195 at the same time. The types of the multiple cards can be the same or different. The SIM card interface 195 can also be compatible with different types of SIM cards. The SIM card interface 195 can also be compatible with external memory cards. The electronic device 100 interacts with the network through the SIM card to implement functions such as calls and data communications. In some embodiments, the electronic device 100 uses an eSIM, i.e., an embedded SIM card. The eSIM card can be embedded in the electronic device 100 and cannot be separated from the electronic device 100.

[0074] The software system of the electronic device 100 can adopt a layered architecture, an event-driven architecture, a micro-kernel architecture, a micro-service architecture, or a cloud architecture. In the embodiment of the present invention, the Android system with a layered architecture is used as an example to illustrate the software structure of the electronic device 100.

[0075] FIG2 is a block diagram of the software structure of the electronic device 100 according to an embodiment of the present application.

[0076] The layered architecture divides the software into several layers, each with a clear role and division of labor. The layers communicate with each other through software interfaces. In some embodiments, the Android system can be divided into five layers, from top to bottom, namely the application layer, the application framework layer, the Android runtime (Android runtime) and system library, the hardware abstraction layer (HAL) and the kernel layer. It should be noted that the embodiment of the present application is illustrated by taking the Android system as an example. In other operating systems (such as Hongmeng system, IOS system, etc.), as long as the functions implemented by each functional module are similar to those of the embodiment of the present application, the solution of the present application can also be implemented.

[0077] The application layer can include a series of application packages.

[0078] As shown in Figure 2, the application package may include applications such as camera, gallery, calendar, call, map, game, WLAN, Bluetooth, music, video, short message, lock screen application, setting application, etc. The application layer may also include other application packages, such as payment application, shopping application, banking application, chat application or financial application, etc., which are not limited in this application.

[0079] Among them, the settings application has the function of recording a face, which is used for face unlocking. Lock screen applications, payment applications, shopping applications, banking applications, chat applications, or financial applications can have the function of unlocking in response to the user's unlocking operation.

[0080] The application framework layer provides an application programming interface (API) and programming framework for applications in the application layer. The application framework layer includes some predefined functions.

[0081] As shown in Figure 2, the application framework layer may include a window manager, a content provider, a view system, a telephony manager, a resource manager, a notification manager, a camera service, and a face recognition service, etc.

[0082] The window manager is used to manage window programs. The window manager can obtain the display size, determine whether there is a status bar, lock the screen, take screenshots, etc.

[0083] Content providers are used to store and retrieve data and make it accessible to applications. The data may include videos, images, audio, calls made and received, browsing history and bookmarks, phone books, etc.

[0084] The view system includes visual controls, such as those for displaying text and images. The view system is used to build applications. A display interface can consist of one or more views. For example, a display interface containing a text notification icon might include a view for displaying text and a view for displaying images.

[0085] The phone manager is used to provide communication functions of the electronic device 100, such as management of call status (including answering, hanging up, etc.).

[0086] The resource manager provides various resources for applications, such as localized strings, icons, images, layout files, video files, and so on.

[0087] The Notification Manager allows applications to display notifications in the status bar. These messages can be displayed briefly and then disappear automatically without user interaction. For example, the Notification Manager is used to notify users of completed downloads and message reminders. The Notification Manager can also display notifications in the top status bar of the system as icons or scrolling text, such as notifications from background applications, or as dialog windows on the screen. Examples include text messages in the status bar, beeps, vibrations on electronic devices, and flashing indicator lights.

[0088] Android Runtime includes core libraries and a virtual machine. Android runtime is responsible for scheduling and management of the Android system.

[0089] The core library consists of two parts: one is the function that needs to be called by the Java language, and the other is the Android core library.

[0090] The application layer and application framework layer run in a virtual machine. The virtual machine executes Java files in the application layer and application framework layer as binary files. The virtual machine manages object lifecycles, stack management, thread management, security and exception management, and garbage collection.

[0091] The system library can include multiple functional modules, such as surface manager, media library, 3D graphics processing library (such as OpenGL ES), 2D graphics engine (such as SGL), etc.

[0092] The surface manager is used to manage the display subsystem and provide fusion of 2D and 3D layers for multiple applications.

[0093] The media library supports playback and recording of a variety of common audio and video formats, as well as static image files. The media library can support a variety of audio and video encoding formats, such as MPEG4, H.264, MP3, AAC, AMR, JPG, PNG, etc.

[0094] The 3D graphics processing library is used to implement 3D graphics drawing, image rendering, compositing, and layer processing.

[0095] A 2D graphics engine is a drawing engine for 2D drawings.

[0096] The HAL layer is an abstract interface for device kernel drivers, providing access to underlying device APIs to higher-level Java API frameworks. The HAL layer includes Wi-Fi HAL, audio HAL, display HAL, camera HAL, and face recognition modules. The face recognition module includes the face recognition HAL and face recognition CA.

[0097] Face Trusted Application (Face TA): An application for face recognition that runs in a TEE environment. In the embodiments of this application, Face TA is referred to as a face recognition TA.

[0098] The kernel layer is the layer between hardware and software. The kernel layer includes at least display driver, camera driver, audio driver, and sensor driver.

[0099] The hardware of the embodiment of the present application may include a display, a TOF camera, and a secure buffer, etc. The secure buffer refers to a memory with a security protection function, which can be used to store data collected by the TOF camera.

[0100] Below, taking the face recognition scenario of the lock screen application as an example, the interaction process between the software module and the hardware module involved in the face recognition method provided in the embodiment of the present application is explained.

[0101] As shown in Figure 3, the lock screen application in the application layer can interact with the face recognition service in the framework layer by calling a preset application programming interface (API). The face recognition service can interact with the face recognition module in the HAL layer. The face recognition module can interact with the camera HAL in the HAL layer through the camera service in the framework layer. The camera HAL can interact with the camera driver module in the kernel layer, which can be used to drive the time-of-flight camera in the hardware layer to collect image data. The image data collected by the time-of-flight camera is stored in secure memory.

[0102] The facial recognition system (TA) can read image data from secure memory and process it. This processing can include time-of-flight (TOF) and facial recognition algorithms. The TOF algorithm calculates adaptive exposure parameters based on the image data, while the facial recognition algorithm performs facial recognition based on the image data.

[0103] After processing the image data, the facial recognition TA can feed back the processing results (facial recognition success or failure) to the facial recognition module. The facial recognition module can then feed back the processing results to the lock screen application through the facial recognition service, so that the lock screen application can determine whether to unlock the device. For example, if facial recognition is successful, the device is unlocked; if facial recognition fails, the device is not unlocked, indicating that the unlocking has failed.

[0104] It should be noted that the above description is only an example of the face recognition scenario of the lock screen application. The face recognition method provided in the embodiment of the present application can also be applied to face recognition verification in scenarios such as payment, transfer, and secure login.

[0105] The face recognition method provided in the embodiment of the present application is described below.

[0106] FIG4 is a flowchart of a face recognition method provided in an embodiment of the present application. As shown in FIG4 , the following steps may be included:

[0107] S201: In response to receiving a face recognition start operation, generate M image frames based on a first exposure parameter, where M is a positive integer greater than zero.

[0108] The embodiments of this application do not limit the initiation operation of facial recognition. For example, a user can trigger the facial recognition process by pressing the power button of an electronic device. For another example, when a user uses a payment application to pay, clicking the payment button can trigger the facial recognition process.

[0109] For example, as shown in (a) and (b) of Figure 5, the user's face is close to the electronic device to unlock the lock screen application through the face recognition function of the electronic device. As shown in (b) of Figure 5, when the electronic device performs face recognition, a face recognition reminder field can be displayed on the screen of the electronic device. At the same time, when the face recognition reminder field is displayed on the screen of the electronic device, the TOF camera of the electronic device can collect the user's facial image according to the preset collection frequency, and the face recognition TA can perform face recognition processing based on the collected facial image.

[0110] The initial exposure parameters of the TOF camera for capturing images are fixed. The first exposure parameter may be the initial exposure parameter of the TOF camera or an updated exposure parameter.

[0111] S202: Perform face recognition based on the first image frame among the M image frames.

[0112] In some embodiments, the TOF camera may store the captured image frames based on the first exposure parameter in a secure memory. Then, the face recognition TA may retrieve the first image frame from the secure memory for face recognition processing.

[0113] S203: If face recognition fails, generate N image frames based on the second exposure parameter, where N is a positive integer greater than zero.

[0114] For example, taking the first exposure parameter as the initial exposure parameter, since the initial exposure parameter is fixed, the quality of the first image frame is usually poor due to factors such as ambient light and the distance between the face and the electronic device. As a result, the face recognition result based on the first image frame is a face recognition failure.

[0115] After facial recognition fails on the first image frame, the electronic device can adjust the first exposure parameter to a second exposure parameter to improve the quality of the captured image. In other words, the image quality of the N image frames generated based on the second exposure parameter is better than that of the M image frames generated based on the first exposure parameter. The second exposure parameter is different from the first exposure parameter. The first and second exposure parameters may include exposure duration, exposure gain, etc., which are not limited in this application.

[0116] Among them, the method for the electronic device to adjust the first exposure parameter to the second exposure parameter can be referred to the relevant technology, and will not be repeated here.

[0117] It should be noted that during the process of adjusting the first exposure parameter to the second exposure parameter, the TOF camera continues to capture image frames based on the first exposure parameter until the exposure parameter of the electronic device is updated to the second exposure parameter, at which point the TOF camera begins capturing image frames based on the second exposure parameter.

[0118] Exemplarily, as shown in FIG6 , the secure memory may include an image cache area, which may include an image cache queue. After the TOF camera captures image frames, they are sequentially stored in the image cache queue. For example, the first, second, and third image frames captured by the TOF camera based on the first exposure parameters, as well as the fourth image frame captured based on the second exposure parameters, are sequentially stored in the image cache queue. The face recognition TA can then retrieve image frames from the image cache queue for face recognition processing.

[0119] In the embodiments of the present application, the time it takes for a TOF camera to capture one image frame can be less than the time it takes for a facial recognition system to perform facial recognition on one image frame. For example, the time it takes for a TOF camera to capture one image frame is 66 milliseconds, while the time it takes for a facial recognition system to perform facial recognition on one image frame is 163 milliseconds. It should be noted that in some embodiments, the time it takes for a facial recognition system to perform facial recognition on one image frame may be less than or greater than 163 milliseconds, and this application does not limit this.

[0120] Therefore, even if the fourth image frame is captured based on the second exposure parameters, the three frames preceding the fourth image frame in the image cache queue must be consumed before face recognition processing can begin on the fourth image frame. This delays the actual implementation of the second exposure parameters, resulting in slower unlocking speeds.

[0121] Therefore, the facial recognition method provided in this embodiment of the application can perform facial recognition on only a portion of the image frames captured using the first exposure parameters, and then perform facial recognition on the image frames captured using the second exposure parameters. This shortens the waiting time for facial recognition on the image frames captured using the second exposure parameters, thereby improving unlocking speed. For details, please refer to the description of steps S204 and S205.

[0122] S204: Perform frame drop processing on some of the M image frames to obtain M1 image frames, where M1 is a positive integer smaller than M.

[0123] S205 , after performing face recognition on the M1 image frames, perform face recognition based on the target image frame among the N image frames.

[0124] In the embodiment of the present application, after the TOF camera captures image frames, it caches the image frames in an image cache queue. The face recognition TA obtains the image frames from the image cache queue and performs face recognition processing on the image frames. To enable the face recognition TA to perform face recognition processing on image frames with better image quality as quickly as possible, the embodiment of the present application can perform frame drop processing on some of the M image frames. In this way, the face recognition TA only needs to perform face recognition processing on some of the image frames, thereby shortening the face recognition processing time for the image frames captured based on the first exposure parameters.

[0125] The embodiment of the present application can implement frame dropping processing for some of the M frames through two solutions: the first solution is to reduce the maximum number of image frames cached in the image cache queue, and the second solution is to periodically discard image frames cached in the image cache queue.

[0126] Two schemes for performing frame dropping processing on part of the M image frames are described below.

[0127] For the first solution, the embodiment of the present application can set the maximum cache number of image frames that can be cached by the image cache queue to a positive integer less than 8. For example, the maximum cache number of image frames that can be cached by the image cache queue can be set to 3. In this way, when the k-th image frame is sent to the image cache area, if the number of image frames cached by the image cache queue of the image cache area reaches the maximum cache number (also known as the preset number), the k-th image frame is discarded. If the number of image frames cached by the image cache queue of the image cache area does not reach the maximum cache number, the k-th image frame is cached in the image cache queue.

[0128] Similarly, when N image frames captured based on the second exposure parameters are cached in the image cache queue, if the number of image frames cached in the image cache queue of the image cache area reaches the maximum cache capacity, the image frame is discarded. In other words, the k-th image frame can be any of the M image frames and the N image frames. This application does not limit this.

[0129] In this way, the embodiment of the present application can discard some image frames in the M frames by reducing the maximum cache number of image frames cached by the image cache queue, so that the face recognition TA can perform face recognition processing on the image frames in the N frames as quickly as possible.

[0130] It should be noted that, in this solution, the target image frame among the N image frames refers to the first image frame among the N image frames obtained by the face recognition TA from the image cache queue.

[0131] Exemplarily, if the first image frame among the N image frames is not discarded, the target image frame is the first image frame among the N image frames. In another exemplary embodiment, if the first image frame among the N image frames is discarded and the second image frame among the N image frames is not discarded, the target image frame is the second image frame among the N image frames.

[0132] The following takes the capture of seven image frames based on the first exposure parameter and the capture of one image frame based on the second exposure parameter as examples, and takes the maximum number of cached image frames in the cache queue as 8 and 3 respectively as examples to illustrate the effect of improving the unlocking speed.

[0133] For example, as shown in FIG7A , when the maximum number of cached image frames in the image cache queue is 8, the first, second, third, fourth, fifth, sixth, and seventh image frames captured based on the first exposure parameters, as well as the eighth image frame captured based on the second exposure parameters, can all be stored in the cache queue, with the eighth image frame queued after the seventh image frame. In this way, the face recognition system (TA) can only perform face recognition on the eighth image frame after performing face recognition on the first, second, third, fourth, fifth, sixth, and seventh image frames. In other words, in this solution, the face recognition system (TA) must perform face recognition on at least seven image frames captured based on the first exposure parameters before it can perform face recognition on the eighth image frame captured based on the second exposure parameters.

[0134] For example, if the maximum number of image frames that can be cached in the image cache queue is 3, when the three cache locations in the image cache queue are full, subsequent image frames sent by the TOF camera will be discarded due to the lack of remaining cache locations. New image frames will not be allowed to be stored in the image cache queue until there are free cache locations in the image cache queue.

[0135] In a specific example, as shown in FIG7B , when the fifth image frame captured by the TOF camera is cached in the image cache queue, the image cache queue already contains the second, third, and fourth image frames. Thus, the fifth image frame is discarded because there are no free cache locations in the image cache queue. Similarly, when the seventh image frame captured by the TOF camera is cached in the image cache queue, the image cache queue already contains the third, fourth, and sixth image frames. Thus, the seventh image frame is discarded because there are no free cache locations in the image cache queue.

[0136] As can be seen, when the maximum buffer size is 3, the two image frames acquired based on the first exposure parameter can be discarded. In this way, after the face recognition TA performs face recognition processing on the remaining five image frames acquired based on the first exposure parameter, it can then perform face recognition processing on the eighth image frame acquired based on the second exposure parameter. In this way, compared to the solution with a maximum buffer size of 8, face recognition processing can be performed on the image frames acquired based on the second exposure parameter two frames earlier.

[0137] Because the image frames captured based on the second exposure parameters have better image quality, facial recognition is more likely to succeed when performed on the image frames captured based on the second exposure parameters. In other words, the embodiments of the present application provide for reducing the maximum number of image frames cached in the image cache queue to more quickly perform facial recognition processing on the image frames captured based on the second exposure parameters, thereby accelerating the success of facial recognition.

[0138] It should be noted that the embodiment of the present application does not limit the specific implementation method of setting the maximum number of buffered image frames that the image buffer queue can buffer. For example, the parameter persist.vendor.cemera.maxBuffersSecureCamera can be set to a value of 3 in the parameter setting file of the camera path.

[0139] For the second solution, the embodiment of the present application can be implemented using the method shown in Figure 8. As shown in Figure 8, the method may include the following steps:

[0140] S301 : Sending M image frames and N image frames to an image buffer area in sequence. The image buffer area includes an image buffer queue.

[0141] In some embodiments, the method of sending M image frames and N image frames to the image buffer in sequence may adopt the first method provided in the above embodiment.

[0142] For example, the maximum number of image frames that can be cached in the image cache queue is set to 3. When the three cache slots in the image cache queue are full, subsequent image frames sent by the TOF camera will be discarded due to the lack of free cache slots. New image frames will not be allowed to be stored in the image cache queue until free cache slots are available.

[0143] S302, obtaining the i-th image frame from the image cache queue, and performing face recognition based on the i-th image frame; the i-th image frame is any image frame in the image cache queue.

[0144] It should be understood that the i-th image frame can be any image frame stored in the image cache queue among the M and N image frames. In other words, the i-th image frame is not an image frame discarded due to lack of remaining cache space.

[0145] S303, when face recognition based on the i-th image frame fails, obtain the i+1-th to i+m-th image frames from the image cache queue, and discard the i+1-th to i+m-th image frames; where m is a positive integer greater than 0.

[0146] In the case where face recognition of the i-th image frame fails, the face recognition results of the image frames after the i-th image frame are likely to also fail. Therefore, in the embodiment of the present application, in the case where face recognition based on the i-th image frame fails, one or more image frames can be skipped for face recognition, so that the face recognition TA can perform face recognition processing on the image frames collected based on the second exposure parameters as soon as possible.

[0147] The embodiment of the present application does not limit the value of m. For example, m can be 1 or 2. When m is 1, if face recognition based on the i-th image frame fails, the i+1-th image frame following the i-th image frame is obtained from the image cache queue, and the i+1-th image frame is discarded. When m is 2, if face recognition based on the i-th image frame fails, the i+1-th image frame and the i+2-th image frame following the i-th image frame are obtained from the image cache queue, and the i+1-th image frame and the i+2-th image frame are discarded.

[0148] For example, as shown in Figure 9, taking m as 1, the TOF camera captures a first image frame based on the first exposure parameter and sends the first image frame to the image cache queue for caching. The face recognition TA obtains the first image frame from the image cache queue and performs face recognition processing on the first image frame. While the face recognition TA performs face recognition processing on the first image frame, the TOF camera captures a second image frame and a third image frame based on the first exposure parameter and sends the second image frame and the third image frame to the image cache queue for caching.

[0149] If the face recognition result of the first image frame is a recognition failure, the face recognition TA obtains the second image frame from the image buffer queue and discards the second image frame. In other words, the face recognition TA does not perform face recognition processing on the second image frame.

[0150] Next, the face recognition TA obtains the third image frame from the cache queue and performs face recognition processing on the third image frame. While the face recognition TA performs face recognition processing on the third image frame, the TOF camera can capture the fourth and fifth image frames based on the first exposure parameters and send the fourth and fifth image frames to the image cache queue for caching.

[0151] When the face recognition result of performing face recognition on the third image frame is recognition failure, the face recognition TA obtains the fourth image frame from the cache queue and discards the fourth image frame.

[0152] In this way, the face recognition TA repeatedly performs the above steps of performing face recognition processing on the image frames and discarding the image frames until the face recognition TA obtains the eighth image frame collected based on the second exposure parameter and performs face recognition processing on the eighth image frame.

[0153] It can be seen that the embodiment of the present application can consume the image frames collected based on the first exposure parameters as soon as possible by discarding every other image frame, so that the face recognition TA can perform face recognition processing on the image frames collected based on the second exposure parameters as soon as possible.

[0154] It should be noted that the target image frame among the N image frames in this solution refers to the first image frame among the N image frames obtained by the face recognition TA from the image cache queue and has not been discarded by the face recognition TA.

[0155] Exemplarily, if the first image frame among N image frames is stored in the image cache queue and has not been discarded by the face recognition TA, then the target image frame is the first image frame among the N image frames. If the first image frame and the second image frame among N image frames are both stored in the image cache queue, but the first image frame among the N image frames is discarded by the face recognition TA, and the second image frame among the N image frames is not discarded by the face recognition TA, then the target image frame is the second image frame among the N image frames.

[0156] It should also be noted that the two frame loss solutions provided in the above embodiments can be implemented separately or in combination, and the embodiments of the present application do not limit this.

[0157] For example, when the two frame dropping schemes provided in the above embodiments are combined, the maximum number of image frames cached in the image cache queue can be reduced and image frames cached in the image cache queue can be discarded at intervals. This allows, on the one hand, by reducing the maximum number of cached frames, some image frames to be discarded during the image cache queue storage phase; on the other hand, by discarding image frames cached in the image cache queue at intervals, some image frames can be discarded during the face recognition TA's phase of retrieving image frames from the cache queue.

[0158] In a specific example, based on Figure 7B, when the two solutions are combined and implemented, two image frames can be discarded during the stage of storing image frames in the image cache queue. Two image frames can also be discarded during the stage of the face recognition TA retrieving image frames from the image cache queue. This allows the face recognition TA to perform face recognition processing on the remaining three image frames acquired based on the first exposure parameters before performing face recognition processing on the eighth image frame acquired based on the second exposure parameters. This allows face recognition processing on image frames acquired based on the second exposure parameters to be performed two frames earlier than in a solution with a maximum cache size of three. This also allows face recognition processing on image frames acquired based on the second exposure parameters to be performed four frames earlier than in a solution with a maximum cache size of eight.

[0159] It should be noted that the result of face recognition processing on the image frame captured based on the second exposure parameter may be either a successful recognition or a failed recognition. If recognition fails, a third exposure parameter may be calculated and an image frame captured based on the third exposure parameter. For details, please refer to the description of steps S203, S204, and S205 above and will not be repeated here.

[0160] For example, as shown in (c) and (d) in FIG5 , after successful face recognition, the user can use methods such as making a call and sliding the screen to enter the main interface of the electronic device.

[0161] The various method embodiments described herein may be independent solutions or may be combined according to internal logic, and all of these solutions fall within the scope of protection of this application.

[0162] It can be understood that, in the above-mentioned various method embodiments, the methods and operations implemented by the electronic device can also be implemented by components (such as chips or circuits) that can be used in the electronic device.

[0163] The above embodiments introduce the face recognition method provided by the present application. It is understandable that, in order to implement the above functions, the electronic device includes a hardware structure and / or software module corresponding to each function. Those skilled in the art should easily realize that, in combination with the units and algorithm steps of each example described in the embodiments disclosed herein, the present application can be implemented in the form of hardware or a combination of hardware and computer software. Whether a function is executed in hardware or in a computer software-driven hardware manner depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0164] The present application also provides a processing device including at least one processor and a communication interface, wherein the communication interface is used to provide information input and / or output to the at least one processor, and the at least one processor is used to execute the method in the above method embodiment.

[0165] It should be understood that the processing device described above can be a chip. For example, see Figure 10, which is a block diagram of the structure of a chip provided in an embodiment of the present application. The chip shown in Figure 10 can be a general-purpose processor or a dedicated processor. The chip 400 can include at least one processor 401. The at least one processor 401 can be used to support the technical solutions corresponding to any of the above embodiments.

[0166] Optionally, the chip 400 may further include a transceiver 402, which is configured to accept control of the processor 401 and support the technical solutions corresponding to any of the above embodiments. Optionally, the chip 400 shown in FIG10 may further include a storage medium 403. Specifically, the transceiver 402 may be replaced by a communication interface, which provides information input and / or output to the at least one processor 401.

[0167] It should be noted that the chip 400 shown in Figure 10 can be implemented using the following circuits or devices: one or more field programmable gate arrays (FPGA), programmable logic devices (PLD), application specific integrated circuits (ASIC), system on chip (SoC), central processor unit (CPU), network processor (NP), digital signal processor (DSP), microcontroller unit (MCU), controller, state machine, gate logic, discrete hardware components, any other suitable circuits, or any combination of circuits that can perform the various functions described throughout this application.

[0168] During implementation, each step of the above method can be completed by an integrated logic circuit of the hardware in the processor or by instructions in the form of software. The steps of the method disclosed in conjunction with the embodiments of the present application can be directly embodied as being executed by a hardware processor, or can be executed by a combination of hardware and software modules in the processor. The software module can be located in a storage medium mature in the art such as a random access memory, a flash memory, a read-only memory, a programmable read-only memory or an electrically erasable programmable memory, a register, etc. The storage medium is located in the memory, and the processor reads the information in the memory and completes the steps of the above method in conjunction with its hardware. To avoid repetition, it will not be described in detail here.

[0169] It should be noted that the processor in the embodiments of the present application can be an integrated circuit chip with signal processing capabilities. During implementation, each step of the above method embodiment can be completed by an integrated logic circuit of the hardware in the processor or by instructions in the form of software. The above processor can be a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA) or other programmable logic device, a discrete gate or transistor logic device, or a discrete hardware component. The various methods, steps, and logic block diagrams disclosed in the embodiments of the present application can be implemented or executed. The general-purpose processor can be a microprocessor or the processor can also be any conventional processor. The steps of the method disclosed in the embodiments of the present application can be directly embodied as being executed by a hardware decoding processor, or can be executed by a combination of hardware and software modules in the decoding processor. The software module can be located in a storage medium mature in the art, such as random access memory, flash memory, read-only memory, programmable read-only memory, or electrically erasable programmable memory, registers, etc. The storage medium is located in the memory, and the processor reads the information in the memory and completes the steps of the above method in combination with its hardware.

[0170] It is understood that the memory in the embodiments of the present application may be a volatile memory or a non-volatile memory, or may include both volatile and non-volatile memories. Among them, the non-volatile memory may be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The volatile memory may be a random access memory (RAM), which is used as an external cache. By way of example and not limitation, many forms of RAM are available, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), and direct RAM bus RAM (DR RAM). It should be noted that the memory of the systems and methods described herein is intended to include, but is not limited to, these and any other suitable types of memory.

[0171] According to the method provided in the embodiment of the present application, the embodiment of the present application also provides a computer program product, which includes: a computer program or instructions, which, when the computer program or instructions are run on a computer, enables the computer to execute the method of any one of the method embodiments.

[0172] According to the method provided in the embodiment of the present application, the embodiment of the present application also provides a computer storage medium, which stores a computer program or instruction. When the computer program or instruction is run on a computer, the computer executes the method of any one of the embodiments of the method.

[0173] According to the method provided in an embodiment of the present application, an embodiment of the present application also provides an electronic device, including a memory and a processor; the memory and the processor are coupled; the memory is used to store computer program code, and the computer program code includes computer instructions. When the processor executes the computer instructions, the electronic device executes the method of any one of the embodiments of the method.

[0174] According to the method provided in the embodiments of the present application, the embodiments of the present application also provide a chip system, which includes a processor coupled to a memory and configured to execute a computer program or instructions stored in the memory. When the computer program or instructions are executed, the chip system can implement all or part of the steps in the method embodiments. The chip system can be composed of a chip or can include a chip and other discrete devices.

[0175] Those skilled in the art will appreciate that the various illustrative logical blocks and steps described in conjunction with the embodiments disclosed herein can be implemented using electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians may use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0176] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art, or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions for enabling a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk.

[0177] The computer storage medium, computer program product, and electronic device provided in the above-mentioned embodiments of the present application are all used to execute the method provided above. Therefore, the beneficial effects that can be achieved can refer to the corresponding beneficial effects of the method provided above, and will not be repeated here.

[0178] It should be understood that in each embodiment of the present application, the execution order of each step should be determined by its function and internal logic. The size of the sequence number of each step does not mean the order of execution and does not limit the implementation process of the embodiment.

[0179] The various sections of this specification are described in a progressive manner. Similar portions between embodiments can be referenced to each other, and each embodiment focuses on the differences between the other embodiments. In particular, the embodiments of the apparatus, computer storage medium, computer program product, and electronic device are generally similar to the method embodiments, so their descriptions are simplified. For relevant details, refer to the descriptions of the method embodiments.

[0180] Although the preferred embodiments of the present application have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the present application.

[0181] The above-described embodiments of the present application do not constitute a limitation on the scope of protection of the present application.

Claims

1. A face recognition method, characterized in that The method is applied to an electronic device, and the method includes: In response to receiving a start operation for face recognition, generating M image frames based on a first exposure parameter; Performing face recognition based on the first image frame among the M image frames; where M is a positive integer greater than zero; In the case where the face recognition fails, generating N image frames based on a second exposure parameter; where the first exposure parameter is different from the second exposure parameter; where N is a positive integer greater than zero; Performing frame dropping processing on some of the M image frames to obtain M1 image frames; where M1 is a positive integer less than M; After performing face recognition on the M1 image frames, performing face recognition based on a target image frame among the N image frames.

2. The method according to claim 1, wherein The performing frame dropping processing on some of the M image frames includes: Sequentially sending the M image frames and the N image frames to an image buffer, and the image buffer includes an image buffer queue; Obtaining the i-th image frame from the image buffer queue and performing face recognition based on the i-th image frame; the i-th image frame is any image frame in the image buffer queue; In the case where the face recognition based on the i-th image frame fails, obtaining the (i + 1)-th to (i + m)-th image frames from the image buffer queue and discarding the (i + 1)-th to (i + m)-th image frames; where m is a positive integer greater than 0.

3. The method according to claim 2, wherein The target image frame does not belong to any of the (i + 1)-th to (i + m)-th image frames, and the target image frame is the first image frame belonging to the N image frames obtained from the image buffer queue.

4. The method according to any one of claims 1 to 3, characterized in that, The performing frame dropping processing on some of the M image frames includes: Sending the k-th image frame to the image buffer; The k-th image frame is any one of the M image frames and the N image frames; In the case where the number of image frames cached in the image buffer queue of the image buffer reaches a preset number, discarding the k-th image frame.

5. The method according to claim 4, wherein The preset number is less than 8.

6. The method according to claim 5, wherein The preset number is 3.

7. The method according to claim 2, wherein The m is equal to 1.

8. The method according to claim 1, characterized in that The time for generating one image frame is less than the time for performing face recognition on one image frame.

9. An electronic device, characterized in that, Including a memory and a processor; the memory and the processor are coupled; the memory is used to store computer program code, and the computer program code includes computer instructions. When the processor executes the computer instructions, the electronic device executes the method according to any one of claims 1-8.

10. A chip system, characterized in that, The chip system includes a processor; the processor is coupled with a memory, and the memory is used to store computer program code. The computer program code includes computer instructions. When the processor executes the computer instructions, the method according to any one of claims 1-8 is executed.

11. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program or instruction. When the computer program or instruction runs on a computer, the computer executes the method according to any one of claims 1-8.

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