Touch display substrate and display apparatus

Abstract

The present disclosure belongs to the technical field of display. Provided are a touch display substrate and a display apparatus. The touch display substrate of the present disclosure has a display area and a peripheral area surrounding the display area, wherein the touch display substrate comprises a base substrate, touch electrodes arranged on the base substrate and located in the display area, and touch leads, electrostatic protection circuits and a first power signal line which are located in the peripheral area, wherein the orthographic projection of the first power signal line on the base substrate overlaps with the orthographic projections of the touch leads on the base substrate; and by means of the electrostatic protection circuits, the touch leads are electrically connected to bonding area pins located in the peripheral area.

Description

Touch display substrate and display device Technical Field

[0001] The present disclosure belongs to the field of display technology, and particularly relates to a touch display substrate and a display device. Background Art

[0002] In the display panel manufacturing process, electrostatic discharge (ESD) is generated during the vacuum lamination D-lami process, such as the lamination of film layers such as glass cover plates. When large current ESD flows through some signal lines, it is easy to cause electrostatic breakdown with other signal lines, resulting in short circuits, causing a large proportion of panel burns, affecting product yield. Summary of the Invention

[0003] The present disclosure aims to solve at least one of the technical problems existing in the prior art and provide a touch display substrate and a display device.

[0004] In a first aspect, a technical solution adopted to solve the technical problem of the present disclosure is a touch display substrate having a display area and a peripheral area surrounding the display area; wherein the touch display substrate includes a base substrate, touch electrodes disposed on the base substrate and located in the display area, and touch leads, an electrostatic protection circuit, and a first power signal line located in the peripheral area;

[0005] The orthographic projection of the first power signal line on the base substrate overlaps with the orthographic projection of the touch lead on the base substrate; the touch lead is electrically connected to the binding area pin located in the peripheral area through the electrostatic protection circuit.

[0006] In some embodiments, the touch display substrate further includes a second power signal line and a third power signal line provided on the base substrate; a voltage signal transmitted by the second power signal line and a voltage signal transmitted by the third power signal line have a voltage difference;

[0007] The electrostatic protection circuit includes at least one electrostatic ring unit; the electrostatic ring unit is configured to introduce static electricity on the touch lead into the second power signal line or the third power signal line.

[0008] In some embodiments, the electrostatic ring unit includes a first transistor and a second transistor;

[0009] The first electrode of the first transistor is electrically connected to the second power signal line, the second electrode is electrically connected to the touch lead, and the control electrode is electrically connected to the second power signal line;

[0010] A first electrode of the second transistor is electrically connected to the touch lead, a second electrode is electrically connected to the third power signal line, and a control electrode is electrically connected to the touch lead.

[0011] In some embodiments, the touch display substrate includes a semiconductor layer, a first conductive layer, a second conductive layer, and a third conductive layer sequentially disposed on the base substrate;

[0012] The active layer of the first transistor and the active layer of the second transistor are both located in the semiconductor layer;

[0013] The control electrode of the first transistor, the control electrode of the second transistor, the second power signal line and the third power signal line are all located in the first conductive layer;

[0014] The first electrode and the second electrode of the first transistor, the first electrode and the second electrode of the second transistor, and the first portion of the touch lead are all located in the second conductive layer;

[0015] The touch electrodes and the second portions of the touch leads are located in the third conductive layer.

[0016] In some embodiments, the first portion of the touch lead includes a main lead portion and a plurality of first branches connected to both sides of the main lead portion in an extending direction, and a first region is defined between two adjacent first branches located on the same side of the main lead portion in the extending direction.

[0017] One of the first areas is provided with one electrostatic ring unit.

[0018] In some embodiments, the electrostatic ring units located on both sides of the main body lead portion in an extending direction are arranged in a one-to-one correspondence, and the two corresponding electrostatic ring units are symmetrically arranged with the main body lead portion as a symmetry axis;

[0019] The two adjacent electrostatic ring units located on the same side of the extending direction of the main body lead portion are symmetrically arranged with the first branch portion therebetween as a symmetry axis.

[0020] In some embodiments, for the two electrostatic ring units located on both sides of the extension direction of the main lead portion and symmetrically arranged, the control electrodes of the two first transistors are connected as an integrated structure; the control electrodes of the two second transistors are connected as an integrated structure.

[0021] In some embodiments, the second power signal line includes a plurality of second sub-power signal lines extending along the extending direction of the first branch portion; the third power signal line includes a plurality of third sub-power signal lines extending along the extending direction of the first branch portion; the second sub-power signal lines and the third sub-power signal lines are alternately arranged;

[0022] For the electrostatic ring units located on both sides of the extending direction of the second sub-power signal line, the first electrodes of the first transistors are electrically connected to the same second sub-power signal line;

[0023] For the electrostatic ring units located on both sides of the extending direction of the third sub-power signal line, the second electrodes of the second transistors are electrically connected to the same third sub-power signal line.

[0024] In some embodiments, the first branches located on both sides of the main lead portion in the extending direction are arranged in a one-to-one correspondence;

[0025] A partial orthographic projection of the second sub-power signal line on the base substrate falls within the orthographic projection of the two corresponding first branches and the portion of the main lead portion between the two first branches on the base substrate;

[0026] A partial orthographic projection of the third sub-power signal line on the base substrate falls within the orthographic projection of the two corresponding first branches and a portion of the main lead portion between the two first branches on the base substrate.

[0027] In some embodiments, the first portion of the touch lead further includes a plurality of second branch portions connected to both sides of the main lead portion in an extending direction, and the second branch portions are located in the first area;

[0028] The second branch portion is multiplexed as the second electrode of the first transistor and the first electrode of the second transistor in the same first region.

[0029] In some embodiments, the control electrode of the first transistor is electrically connected to the second transfer portion through a first transfer portion, and the second transfer portion is electrically connected to the first electrode of the first transistor;

[0030] The first transition portion is located in the second conductive layer; and the second transition portion is located in the semiconductor layer.

[0031] In some embodiments, the control electrode of the second transistor is electrically connected to the fourth transfer portion through the third transfer portion, and the fourth transfer portion is electrically connected to the first electrode of the second transistor;

[0032] The third transition portion is located in the second conductive layer; and the fourth transition portion is located in the semiconductor layer.

[0033] In some embodiments, the electrostatic protection circuit further includes a first resistor electrically connected to the touch lead; the electrostatic ring unit includes a first transistor and a second transistor;

[0034] The first transistor has a first electrode electrically connected to the second power signal line, a second electrode electrically connected to the first resistor, and a control electrode electrically connected to the second power signal line;

[0035] A first electrode of the second transistor is electrically connected to the first resistor, a second electrode is electrically connected to the third power signal line, and a control electrode is electrically connected to the first resistor.

[0036] In some embodiments, the electrostatic protection circuit includes a second resistor electrically connected to the touch lead.

[0037] In some embodiments, the touch display substrate includes a semiconductor layer, a first conductive layer, a second conductive layer, and a third conductive layer sequentially disposed on the base substrate;

[0038] The first part of the touch lead includes a first sub-lead segment and a second sub-lead segment located in the second conductive layer; the second resistor is a semiconductor connecting line located in the semiconductor layer; the first sub-lead segment and the second sub-lead segment are respectively connected to the two ends of the semiconductor connecting line.

[0039] In a second aspect, an embodiment of the present disclosure further provides a display device, which includes the touch display substrate as described in any one of the first aspects. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] FIG1 is a schematic diagram of a touch display substrate provided by an embodiment of the present disclosure;

[0041] FIG2 is a schematic diagram of a partial structure of a touch display substrate provided in an embodiment of the present disclosure;

[0042] FIG3 is a schematic diagram of a partial structure of a touch display substrate provided in an embodiment of the present disclosure;

[0043] FIG4 is a schematic circuit diagram of the electrical connection of multiple electrostatic ring units provided by an embodiment of the present disclosure;

[0044] FIG5 is a circuit diagram of an electrostatic ring unit provided in an embodiment of the present disclosure;

[0045] FIG6 is a schematic diagram of a film layer stack of a touch display substrate provided by an embodiment of the present disclosure;

[0046] FIG7 is a partial structural diagram of a touch display substrate provided by an embodiment of the present disclosure;

[0047] FIG8 is a layout of touch leads provided by an embodiment of the present disclosure;

[0048] FIG9 is an enlarged view of the electrostatic ring unit in the AA′ region in FIG7 ;

[0049] FIG10 is a circuit diagram of an electrostatic protection circuit provided in an embodiment of the present disclosure;

[0050] FIG11a is a partial structural diagram of another touch display substrate provided by an embodiment of the present disclosure;

[0051] FIG11b is a partial enlarged view of the BB' region in the structure shown in FIG11a;

[0052] FIG12 is a diagram showing the stacked film layers of the touch-sensitive flexible circuit board after back-folding provided by an embodiment of the present disclosure;

[0053] FIG13 is a circuit diagram of another electrostatic protection circuit provided in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0054] In order to make the purpose, technical solutions and advantages of the embodiments of the present disclosure clearer, the technical solutions in the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings in the embodiments of the present disclosure. Obviously, the described embodiments are only part of the embodiments of the present disclosure, not all of the embodiments. The components of the embodiments of the present disclosure generally described and shown in the drawings herein can be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present disclosure provided in the drawings is not intended to limit the scope of the disclosure for which protection is sought, but merely represents selected embodiments of the present disclosure. Based on the embodiments of the present disclosure, all other embodiments obtained by those skilled in the art without making creative work are within the scope of protection of the present disclosure.

[0055] Unless otherwise defined, the technical or scientific terms used in this disclosure should have the usual meanings understood by people with ordinary skills in the field to which this disclosure belongs. The words "first", "second" and similar words used in this disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. Similarly, words such as "one", "an" or "the" do not indicate a quantity limitation, but rather indicate the existence of at least one. Words such as "include" or "comprise" mean that the elements or objects appearing before the word include the elements or objects listed after the word and their equivalents, without excluding other elements or objects. Words such as "connect" or "connected" are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the object being described changes, the relative positional relationship may also change accordingly.

[0056] In this disclosure, "multiple or several" refers to two or more. "And / or" describes the relationship between associated objects, indicating that three possible relationships exist. For example, "A and / or B" can mean: A exists alone, A and B exist simultaneously, or B exists alone. The character " / " generally indicates that the associated objects are in an "or" relationship.

[0057] In related technologies, Flexible Multi-Layer On Cell (FMLOC) technology involves fabricating the touch screen layer (TSP) after the display backplane packaging process is complete. The TSP layer, for example, includes a first touch screen layer (TMA), a touch insulation layer (TLD), and a second touch screen layer (TMB). The second touch screen layer (TMB) typically includes touch electrodes (e.g., touch drive electrodes Tx and touch sensing electrodes Rx). These electrodes are electrically connected to the driver chip via a touch flexible printed circuit (FPC).

[0058] In the touch display panel manufacturing process, electrostatic discharge (ESD) is generated during the vacuum lamination D-lami process, for example, after the touch layer TSP process is completed, and then during the lamination of film layers such as the glass cover. The touch electrodes and the Touch FPC are electrically connected through touch leads, and the touch leads partially overlap with some power signal lines (such as the ELVSS signal lines in the peripheral area). Therefore, when high current ESD passes through the touch leads, it is easy to cause electrostatic breakdown between the touch leads and the power signal lines, causing a short circuit. This can cause a large proportion of touch display panel burns, affecting product yield.

[0059] Not only does the D-lami process generate static ESD, but the film removal process also generates transient high levels of static ESD. Related process protection measures, such as adding ion fans to dissipate this static, are limited by the distance and air volume, making it impossible to completely prevent short circuits, severely impacting mass production.

[0060] In view of this, an embodiment of the present disclosure provides a touch display panel, which adds an electrostatic protection circuit to the touch lead and utilizes the electrostatic protection circuit to effectively eliminate the large current ESD flowing into the touch lead, thereby avoiding electrostatic breakdown and short circuit between the touch lead and the first power signal line, thereby improving product yield.

[0061] FIG1 is a schematic diagram of a touch display substrate provided in an embodiment of the present disclosure, FIG2 is a schematic diagram of a partial structure of the touch display substrate provided in an embodiment of the present disclosure, and FIG3 is a schematic diagram of a partial structure of the touch display substrate provided in an embodiment of the present disclosure. Compared with FIG2 , FIG3 reduces the first power signal line 6 .

[0062] As shown in FIG1 , the touch display substrate includes a base substrate 1 , a display substrate 2 disposed on the base substrate 1 , and a touch substrate TSP disposed on a side of the display substrate 2 away from the base substrate 1 .

[0063] Exemplarily, the base substrate 1 is made of a flexible substrate material, such as polyimide (PI), a flexible plastic material such as colorless polyimide (CPI), polyethylene terephthalate (PET), thermoplastic urethane (TUP), or ultra-thin glass (UTG). The touch display substrate is a flexible touch display substrate.

[0064] The display substrate 2 includes a plurality of pixel units, each of which includes a plurality of sub-pixels and a pixel driving circuit for driving the sub-pixels. Exemplarily, the display substrate 2 is an organic electroluminescence display (OLED) substrate. Exemplarily, the sub-pixels include red, green, or blue light-emitting devices.

[0065] The touch substrate TSP includes a first touch layer TMA, a touch insulating layer TLD, and a second touch layer TMB. The second touch layer TMB typically includes touch electrodes (e.g., touch drive electrodes Tx and touch sensing electrodes Rx). The touch drive electrodes Tx and touch sensing electrodes Rx are arranged in a cross-connected pattern, with one of the touch drive electrodes Tx and the touch sensing electrodes Rx connected by the first touch layer TMA. The touch electrodes are electrically connected to the driver chip via a touch flexible printed circuit (Touch FPC).

[0066] As shown in Figures 2 and 3, the touch display substrate has a display area AA and a peripheral area BB surrounding the display area AA. The display area AA refers to the area where the touch display panel actually displays images. Touch electrodes 3 are located in the display area AA; the touch flexible circuit board TFPC is located in the peripheral area BB. Touch electrodes 3 and the touch flexible circuit board TFPC are electrically connected via touch leads 4. Touch leads 4 are located in the peripheral area BB or extend from the display area AA to the peripheral area BB. Touch leads 4 are bonded to the touch flexible circuit board TFPC at the TFPC bonding area.

[0067] Exemplarily, the touch electrodes 3 may be touch driving electrodes Tx and / or touch sensing electrodes Rx. One touch electrode 3 is electrically connected to one touch lead 4 .

[0068] As shown in FIG. 2 , the touch display substrate further includes a first power signal line 6 , and the orthographic projection of the first power signal line 6 on the base substrate 1 overlaps with the orthographic projection of the touch lead 4 on the base substrate 1 .

[0069] Here, the first power signal line 6 and the touch lead 4 are arranged in layers, with an insulating layer provided therebetween.

[0070] Exemplarily, the first power signal line 6 may include, but is not limited to, a negative driving voltage signal line ELVSS of electroluminescence (EL).

[0071] As shown in Figure 3, the touch display substrate further includes an electrostatic protection circuit 5 located in the peripheral area BB. The touch leads 4 are electrically connected to the binding area pins located in the peripheral area via the electrostatic protection circuit 5. The binding area pins herein may be pins located in the binding area of ​​the touch flexible circuit board TFPC.

[0072] The electrostatic protection circuit 5 is electrically connected to the touch lead 4 and is configured to limit the high current ESD on the touch lead 4 or to lead out the high current ESD flowing into the touch lead 4 .

[0073] Exemplarily, one touch driving electrode Tx is electrically connected to one electrostatic protection circuit 5 ; and one touch sensing electrode Rx is electrically connected to one electrostatic protection circuit 5 .

[0074] The present disclosure utilizes the electrostatic protection circuit 5 to effectively eliminate the large current ESD flowing into the touch lead 4, thereby avoiding electrostatic breakdown of the insulation layer between the touch lead 4 and the first power signal line 6, causing a short circuit between the touch lead 4 and the first power signal line 6, thereby avoiding the phenomenon of large-scale burning of the touch display panel and improving the product yield.

[0075] Exemplarily, the present disclosure adopts FMLOC 2T2R top / bottom wiring, that is, as shown in Figure 3, two touch drive electrodes Tx and two touch sensing electrodes Rx are respectively connected to four electrostatic protection circuits 5, thereby eliminating the high current ESD introduced into the touch lead 4 through each touch electrode 3.

[0076] In some embodiments, Figure 4 is a circuit diagram of the electrical connection of multiple electrostatic ring units provided in an embodiment of the present disclosure. As shown in Figure 4, the touch display substrate also includes a second power signal line VGH and a third power signal line VGL arranged on the base substrate 1; there is a voltage difference between the voltage signal transmitted by the second power signal line VGH and the voltage signal transmitted by the third power signal line VGL.

[0077] For example, the second power signal line VGH may include, but is not limited to, a high voltage signal line; and the third power signal line VGL may include, but is not limited to, a low voltage signal line. For ease of understanding, this disclosure uses the second power signal line VGH as a high voltage signal line and the third power signal line VGL as a low voltage signal line as an example.

[0078] As shown in FIG4 , the electrostatic protection circuit 5 includes at least one electrostatic ring unit 51 ; the electrostatic ring unit 51 is configured to introduce static electricity ESD on the touch lead 4 into the second power signal line VGH or the third power signal line VGL.

[0079] The first end N1 of the electrostatic ring unit 51 is electrically connected to the second power signal line VGH; the second end N2 of the electrostatic ring unit 51 is electrically connected to the third power signal line VGL; and the third end N3 of the electrostatic ring unit 51 is electrically connected to the touch lead 4. Static electricity (ESD) generated on the touch lead 4 can be introduced into the second power signal line VGH through the first end N1 of the electrostatic ring unit 51, or into the third power signal line VGL through the second end N2. The magnitude of the electrostatic ESD potential determines whether it is ultimately introduced into the second power signal line VGH or the third power signal line VGL.

[0080] Exemplarily, as shown in FIG4 , a plurality of electrostatic ring units 51 are arranged in parallel and connected to the same second power signal line VGH and the same third power signal line VGL, thereby simplifying circuit design.

[0081] In some embodiments, Figure 5 is a circuit diagram of an electrostatic ring unit provided in an embodiment of the present disclosure. As shown in Figure 5, the electrostatic ring unit 51 includes a first transistor T1 and a second transistor T2; wherein, the first electrode of the first transistor T1 is electrically connected to the second power signal line VGH, the second electrode of the first transistor T1 is electrically connected to the contact lead 4, and the control electrode of the first transistor T1 is electrically connected to the second power signal line VGH; the first electrode of the second transistor T2 is electrically connected to the contact lead 4, the second electrode of the second transistor T2 is electrically connected to the third power signal line VGL, and the control electrode of the second transistor T2 is electrically connected to the contact lead 4.

[0082] The first electrode and the control electrode of the first transistor T1 are electrically connected, and the first electrode and the control electrode of the second transistor T2 are electrically connected. For example, the first electrode and the control electrode of the first transistor T1 can be directly electrically connected, and the first electrode and the control electrode of the second transistor T2 can be directly electrically connected. Here, "direct electrical connection" means that there is no other switching conductor between the first electrode and the control electrode; alternatively, the first electrode and the control electrode of the first transistor T1 can be switched through a switching structure, and the first electrode and the control electrode of the second transistor T2 can be switched through the switching structure. The switching structure can be a conductor, a semiconductor, or a combination of a conductor and a semiconductor.

[0083] The transistors used in the embodiments of the present disclosure may be thin film transistors or field effect transistors or other devices with the same characteristics. Since the source and drain of the transistors used are symmetrical, there is no difference between the source and drain. In the embodiments of the present disclosure and the subsequent description, in order to distinguish the source and drain of the transistor, one of the electrodes is called the first electrode, the other electrode is called the second electrode, and the gate is called the control electrode. In addition, transistors can be divided into N-type and P-type according to the characteristics of the transistor. Among them, N-type thin film transistor refers to N-type ion doping in the active layer of the thin film transistor; P-type thin film transistor refers to P-type ion doping in the active layer of the thin film transistor. The working level signal of the N-type thin film transistor is a high level signal; the working level signal of the P-type thin film transistor is a low level signal. In the following embodiments, the transistor is described as a P-type thin film transistor, but the present disclosure is not limited to P-type thin film transistors, and can also be an N-type thin film transistor.

[0084] Exemplarily, when the generated electrostatic ESD is at a first level, the first transistor T1 is turned on and the electrostatic ESD is introduced into the second power signal line VGH; when the generated electrostatic ESD is at a second level, the second transistor T2 is turned on and the electrostatic ESD is introduced into the third power signal line VGL.

[0085] The first transistor T1 and the second transistor T2 having specific threshold voltages may be selected based on a pre-determined maximum potential and a minimum potential at which static electricity ESD is generated.

[0086] The first level potential Vd1 is higher than the potential of the voltage signal Vs1 generated by the second power signal line VGH, and Vds1 ≥ Vgs1 - Vth1. Vds1 ≥ Vgs1 - Vth1, the first transistor T1 is turned on, and electrostatic discharge (ESD) is introduced into the second power signal line VGH. Vgs1 represents the turn-on voltage of the first transistor T1 (i.e., the voltage between the control electrode and the first electrode). Since the first electrode and the control electrode of the first transistor T1 are electrically connected, Vgs1 = 0. Vth1 represents the threshold voltage of the first transistor T1, which is fixed due to the characteristics of the transistor.

[0087] The voltage difference between the second-level potential Vs2 and the control electrode Vg2 is Vg2-Vs2=Vgs2≤Vth2, the second transistor T2 is turned on, and electrostatic discharge (ESD) is introduced into the third power signal line VGL. Vgs2 represents the turn-on voltage of the second transistor T2 (i.e., the voltage between the control electrode and the first electrode). Since the first electrode and the control electrode of the second transistor T2 are electrically connected, Vgs2=0. Vth2 represents the threshold voltage of the second transistor T2, which is fixed due to the characteristics of the transistor.

[0088] Exemplarily, the first level is a high level, and the second level is a low level.

[0089] In this embodiment, no matter whether the generated instantaneous large current ESD is positive or negative, the electrostatic ring unit 51 can be used to implement electrostatic protection, thereby effectively protecting the signal transmission of the touch electrodes 3 .

[0090] In some embodiments, Figure 6 is a schematic diagram of the film layer stack of the touch display substrate provided in an embodiment of the present disclosure. As shown in Figure 6, the touch display substrate includes a semiconductor layer poly, a first conductive layer Gate, a second conductive layer SD and a third conductive layer TMB sequentially arranged on a base substrate 1.

[0091] It should be noted that an insulating layer is provided between the semiconductor layer poly and the first conductive layer Gate, and an insulating layer is provided between any two conductive layers among the first conductive layer Gate, the second conductive layer SD and the third conductive layer TMB.

[0092] Specifically, as shown in Figure 6, along the thickness direction of the touch display substrate, there are arranged in sequence: base substrate 1, buffer layer, semiconductor layer poly, gate insulation layer GI, first conductive layer Gate, interlayer insulation layer ILD, second conductive layer SD, passivation layer PVX, flat layer PLN, encapsulation layer OC, first touch layer TMA, touch insulation layer TLD, third conductive layer TMB (also known as second touch layer TMB), and touch protection layer TOC.

[0093] As shown in FIG6 , the active layer of the first transistor T1 and the active layer of the second transistor T2 are both located in the semiconductor layer poly; the control electrode of the first transistor T1, the control electrode of the second transistor T2, the second power signal line VGH, and the third power signal line VGL are all located in the first conductive layer Gate; the first electrode and the second electrode of the first transistor T1, the first electrode and the second electrode of the second transistor T2, and the first portion 4 a of the touch lead 4 are all located in the second conductive layer SD; the touch electrode 3 and the first portion 4 b of the touch lead 4 are located in the third conductive layer TMB.

[0094] The embodiment of the present disclosure adopts the structure of supporting or reusing the original film layer of the touch display substrate as the added electrostatic protection circuit 5, without changing the thickness of the original product, thereby ensuring that the product is light and thin.

[0095] FIG7 is a partial structural layout of a touch display substrate provided in an embodiment of the present disclosure, FIG8 is a layout of touch leads provided in an embodiment of the present disclosure, and FIG9 is an enlarged view of the electrostatic ring unit in the AA' area in FIG7;

[0096] In some embodiments, as shown in Figure 8, the first part 4a of the touch lead 4 includes a main lead portion 40 and a plurality of first branch portions 41 connected on both sides of the extension direction Y of the main lead portion 40, and a first area DD is defined between two adjacent first branch portions 41 located on the same side of the extension direction Y of the main lead portion 40.

[0097] The main lead portion 40 extends in the Y direction, and the first branch portion 41 extends in the X direction. The Y direction and the X direction are arranged perpendicularly, which facilitates wiring and saves space.

[0098] As shown in FIG. 7 , FIG. 8 and FIG. 9 , one first region DD is provided with one electrostatic ring unit 51 .

[0099] The original touch lead 4 has an X-direction width (which can be either the minimum width or the average width) equal to the sum of the X-direction widths of the main lead portion 40 and the two first branches 41. This embodiment hollows out a portion of the touch lead 4 to form a first area DD for accommodating the electrostatic ring unit 51, thereby preserving the layout space of the original touch display substrate. This means that the present disclosure adds an electrostatic protection circuit 5 without changing the layout space of the original touch display substrate, facilitating a narrow bezel design.

[0100] In some embodiments, as shown in FIG8 , the first branches 41 on either side of the main lead portion 40 extending in the direction Y are provided in a one-to-one correspondence, thereby correspondingly providing the first regions DD on either side of the main lead portion 40 extending in the direction Y. Furthermore, as shown in FIG7 , the electrostatic ring units 51 on either side of the main lead portion 40 extending in the direction Y are provided in a one-to-one correspondence. As shown in FIG9 , the two corresponding electrostatic ring units 51 are symmetrically arranged with the main lead portion 40 as the axis of symmetry; the axis of symmetry here can be specifically understood as the centerline of the main lead portion 40 extending in the direction Y of the main lead portion 40.

[0101] The first branches 41 have the same shape and size, and only the positions are different. The first regions DD have the same shape and size, and only the positions are different.

[0102] As shown in FIG7 , two adjacent electrostatic ring units 51 located on the same side of the main lead portion 40 in the extension direction Y are symmetrically arranged with the first branch portion 41 therebetween as the axis of symmetry. The axis of symmetry here can be specifically understood as the centerline of the first branch portion 41 extending in the extension direction X of the first branch portion 41.

[0103] In the embodiment of the present disclosure, the electrostatic ring units 51 are symmetrically arranged to facilitate wiring and save space.

[0104] In some embodiments, as shown in FIG9 , two electrostatic ring units 51 are symmetrically arranged on either side of the main lead portion 40 in the extension direction Y, wherein the control electrodes G1 of the two first transistors T1 are connected as an integral structure; and the control electrodes of the two second transistors T2 are connected as an integral structure. Here, the integrally formed control electrodes facilitate manufacturing and improve manufacturing efficiency.

[0105] The control electrodes G1 of the two first transistors T1 connected into an integral structure extend from the first region DD on one side of the main lead portion 40 to the first region DD on the other side along the extension direction X of the first branch portion 41, and the orthographic projections of the control electrodes G1 on the base substrate 1 overlap with the orthographic projections of the active layers of the two first transistors T1.

[0106] The control electrodes G2 of the two second transistors T2 connected as an integral structure extend from the first region DD on one side of the main lead portion 40 to the first region DD on the other side along the extension direction X of the first branch portion 41, and the orthographic projections of the control electrodes G2 on the base substrate 1 overlap with the orthographic projections of the active layers of the two second transistors T2.

[0107] For example, as shown in FIG9 , the control electrodes G1 of the two first transistors T1 connected in an integrated structure include multiple first main body segments G11 extending along the extension direction X of the first branch portion 41, and first connecting segments (not shown) connected at both ends of the multiple first main body routing segments. There is a certain gap between the multiple first main body segments G11. Optionally, the control electrodes G1 of the two first transistors T1 connected in an integrated structure include two first main body segments G11.

[0108] For example, as shown in FIG9 , the control electrode G2 of the two second transistors T2 connected in an integrated structure includes multiple second main body segments G21 extending along the extension direction X of the first branch portion 41, and second connecting segments (not shown) connected to both ends of the multiple second main body routing segments. There is a certain gap between the multiple second main body segments G21. Optionally, the control electrode G2 of the two second transistors T2 connected in an integrated structure includes two second main body segments G21.

[0109] In some embodiments, as shown in Figure 7 or Figure 9, the second power signal line VGH includes a plurality of second sub-power signal lines VGH1 extending along the extension direction X of the first branch portion 41; the third power signal line VGL includes a plurality of third sub-power signal lines VGL1 extending along the extension direction X of the first branch portion 41; the second sub-power signal lines VGH1 and the third sub-power signal lines VGL1 are alternately arranged.

[0110] As shown in FIG9 , the electrostatic ring units 51 connected to the same second sub-power signal line VGH1 are symmetrically arranged with the main lead portion 40 as the symmetry axis and the second sub-power signal line VGH1 as the symmetry axis.

[0111] As shown in FIG. 7 , the electrostatic ring units 51 connected to the same third sub-power signal line VGL1 are symmetrically arranged with the main lead portion 40 as the symmetry axis and the third sub-power signal line VGL1 as the symmetry axis.

[0112] For the electrostatic ring units 51 located on both sides of the second sub-power signal line VGH1 in the direction of extension, the first electrodes of each first transistor T1 are electrically connected to the same second sub-power signal line VGH1. The second sub-power signal line VGH1 here refers to the second sub-power signal line VGH1 between two first transistors T1. For the electrostatic ring units 51 located on both sides of the third sub-power signal line VGL1 in the direction of extension, the second electrodes of each second transistor T2 are electrically connected to the same third sub-power signal line VGL1. The third sub-power signal line VGL1 here refers to the third sub-power signal line VGL1 between two second transistors T2.

[0113] As shown in FIG. 9 , the M structure is a middle section connecting the first electrodes of two adjacent first transistors T1 in the Y direction.

[0114] In the above embodiments and their combination, the second sub-power signal lines VGH1 and the third sub-power signal lines VGL1 are alternately arranged, and the electrostatic ring units 51 are symmetrically arranged, which can save the number of second sub-power signal lines VGH1 and third sub-power signal lines VGL1, simplify wiring, and thus save layout space.

[0115] In some embodiments, the touch display substrate includes a plurality of touch electrodes 3, each of which is connected to a pin pad of the TFPC bonding area via a touch lead 4. The plurality of touch electrodes 3 may include touch drive electrodes Tx and touch sensing electrodes Rx.

[0116] Figure 7 shows five touch leads 4 connected to touch electrodes 3 (not shown). One end of the second portion 4b of the touch lead 4 is electrically connected to the touch electrode 3, and the other end of the second portion 4b of the touch lead 4 is electrically connected to one end of the first portion 4a of the touch lead 4 through a first via V1. The other end of the first portion 4a of the touch lead 4 is connected to a pin pad in the TFPC bonding area.

[0117] Each touch electrode 3 is electrically connected to an ESD protection circuit 5. For each ESD protection circuit 5, the first transistors T1 located in the same row of the first region DD are connected to the second sub-power signal line VGH1, which is connected as an integrated structure. The second transistors T2 located in the same row of the first region DD are connected to the third sub-power signal line VGL1, which is also connected as an integrated structure.

[0118] Exemplarily, an electrostatic protection circuit 5 includes six electrostatic ring units 51 evenly distributed on both sides of the extension direction Y of the main lead portion 40, with three electrostatic ring units 51 arranged on each side, and two second sub-power signal lines VGH1 and two third sub-power signal lines VGL1 alternately arranged.

[0119] In some embodiments, as shown in FIG9 , the first branches 41 on either side of the main lead portion 40 extending in the direction Y are disposed in a one-to-one correspondence. A portion of the orthographic projection of the second sub-power signal line VGH1 on the substrate 1 falls within the orthographic projection of the two corresponding first branches 41 and the portion of the main lead portion 40 between the two first branches 41. Furthermore, a portion of the orthographic projection of the second sub-power signal line VGH1 on the substrate 1 falls within the orthographic projection of the two corresponding first branches 41 and the portion of the main lead portion 40 between the two first branches 41. This prevents the second sub-power signal line VGH1 and the third sub-power signal line VGL1 from occupying the space in the first region DD, thereby ensuring that the added electrostatic protection circuit 5 does not occupy existing wiring space and does not affect the narrow bezel design.

[0120] Exemplarily, the second sub-power signal line VGH1 connected as an integral structure in the touch display panel extends along the extension direction X of the first branch portion 41, and its partial orthographic projection on the base substrate 1 falls within the orthographic projection of the two corresponding first branch portions 41 on the base substrate 1.

[0121] In some embodiments, as shown in FIG. 8 , the first portion 4 a of the touch lead 4 further includes a plurality of second branches 42 connected to both sides of the main lead portion 40 in the extending direction Y, and the second branches 42 are located in the first region DD.

[0122] Exemplarily, the extending direction of the second branch portion 42 is the same as the extending direction X of the first branch portion 41 .

[0123] For example, the second branch portion 42 is located in the center of the first region DD. In other words, the distances between the second branch portion 42 and the two adjacent first branch portions 41 are equal. The distance here can be the center distance or the shortest distance between the edges.

[0124] Exemplarily, the average width of the second branch portion 42 in the Y direction is smaller than the average width of the first branch portion 41 in the Y direction.

[0125] As shown in FIG. 9 , the second branch portion 42 is multiplexed as the second electrode of the first transistor T1 and the first electrode of the second transistor T2 in the same first region DD.

[0126] In some embodiments, as shown in FIG. 9 , for one electrostatic ring unit 51 , the active layer of the first transistor T1 and the active layer of the second transistor T2 are connected into an integrated structure.

[0127] Specifically, the second electrode contact region of the active layer of the first transistor T1 is the same as the first electrode contact region of the active layer of the second transistor T2. With respect to the first region DD, the second branch portion 42 is electrically connected to the second electrode contact region of the active layer of the first transistor T1 (i.e., the first electrode contact region of the active layer of the second transistor T2) via a first connection via S1 that sequentially penetrates the interlayer insulating layer ILD and the gate insulating layer GI.

[0128] In some embodiments, as shown in FIG9 , the control electrode G1 of the first transistor T1 is electrically connected to the second electrode 72 via a first transition portion 71. The second transition portion 72 is electrically connected to the first electrode of the first transistor T1. The first transition portion 71 is located in the second conductive layer SD, and the second transition portion 72 is located in the semiconductor layer poly.

[0129] Specifically, the control electrode of the first transistor T1 is electrically connected to the first transfer portion 71 via a second connection via S2 that penetrates the interlayer insulating layer ILD. The first transfer portion 71 is electrically connected to the second transfer portion 72 via a third connection via S3 that sequentially penetrates the interlayer insulating layer ILD and the gate insulating layer GI. The second transfer portion 72 is electrically connected to the first electrode of the first transistor T1 via a fourth connection via S4 that sequentially penetrates the gate insulating layer GI and the interlayer insulating layer ILD. The first electrode of the first transistor T1 is electrically connected to the first electrode contact region of its active layer via a fifth connection via S5 that penetrates the gate insulating layer GI, and is electrically connected to the second sub-power signal line VGH1 via a sixth connection via S6 that penetrates the interlayer insulating layer ILD.

[0130] In some embodiments, as shown in Figure 9, the control electrode of the second transistor T2 is electrically connected to the fourth transfer portion 74 through the third transfer portion 73, and the fourth transfer portion 74 is electrically connected to the first electrode of the second transistor T2; the third transfer portion 73 is located in the second conductive layer SD; the fourth transfer portion 74 is located in the semiconductor layer poly.

[0131] Specifically, the control electrode of the second transistor T2 is electrically connected to the third transfer portion 73 via a seventh connection via S7 penetrating the interlayer insulating layer ILD. The third transfer portion 73 is electrically connected to the fourth transfer portion 74 via an eighth connection via S8 sequentially penetrating the interlayer insulating layer ILD and the gate insulating layer GI. The fourth transfer portion 74 is electrically connected to the first electrode of the second transistor T2 via a ninth connection via S9 sequentially penetrating the gate insulating layer GI and the interlayer insulating layer ILD. The second electrode of the second transistor T2 is electrically connected to the second electrode contact region of its active layer via a tenth connection via S10 penetrating the gate insulating layer GI, and is electrically connected to the third sub-power signal line VGL1 via an eleventh connection via S11 penetrating the interlayer insulating layer ILD.

[0132] The first and third transition portions 71 and 73 are made of the same material as the second conductive layer SD. Both the first and second transition portions 71 and 72 are spaced apart from the first portion 4a of the touch lead 4 and other electrodes on the second conductive layer SD, and are not connected. There is also a certain distance between the first and third transition portions 71 and 73. The first and third transition portions 71 and 73 are positioned on the second conductive layer SD, which is essential for the original touch display substrate. This facilitates fabrication, requiring only a single mask, improving fabrication efficiency and reducing process costs, while ensuring a lightweight and thin touch display substrate.

[0133] The second and fourth transition portions 72 and 74 are made of the same material as the semiconductor layer poly. Each of the second and fourth transition portions 72 and 74 is spaced apart from the active layer on the semiconductor layer poly, and is not connected to it. There is also a distance between the second and fourth transition portions 72 and 74. The second and fourth transition portions 72 and 74 are positioned on the necessary semiconductor layer poly of the original touch display substrate, facilitating fabrication and requiring only a single mask, improving fabrication efficiency and reducing process costs while ensuring a lightweight and thin touch display substrate.

[0134] In some embodiments, FIG10 is a circuit diagram of an electrostatic protection circuit provided by an embodiment of the present disclosure. As shown in FIG10 , the electrostatic protection circuit 5 includes a second resistor 8 electrically connected to the touch lead 4. Optionally, the resistance value of the second resistor 8 can be selected as 10KΩ.

[0135] In the embodiment of the present disclosure, the second resistor 8 is a large resistor with a reference resistance of 10 kilo-ohms, which is used for electrostatic protection. When a large current electrostatic ESD is generated in the overlapping area of ​​the touch lead 4 and the first power signal line 6, the added large-resistance second resistor 8 is used to reduce the current, thereby achieving the effect of improving anti-static ESD.

[0136] Exemplarily, the touch lead 4 is electrically connected to the touch electrode 3 via the second resistor 8 .

[0137] Exemplarily, the second resistor 8 may be connected to the touch lead 4 at either end or in the middle of the touch lead 4. For example, if the second resistor 8 is connected to the end of the touch lead 4 near the touch electrode 3, the touch electrode 3 is directly connected to one end of the second resistor 8, the other end of the second resistor 8 is connected to one end of the touch lead 4, and the other end of the touch lead 4 is connected to the binding end of the touch flexible circuit board TFPC (Touch FPC). For another example, if the second resistor 8 is connected to the end of the touch lead 4 near the touch flexible circuit board TFPC, the touch flexible circuit board TFPC is directly connected to one end of the second resistor 8, the other end of the second resistor 8 is connected to one end of the touch lead 4, and the other end of the touch lead 4 is connected to the touch electrode 3. For another example, if the second resistor 8 is connected to the middle of the touch lead 4, the two ends of the touch lead 4 are respectively connected to the touch electrode 3 and the touch flexible circuit board TFPC (Touch FPC).

[0138] Exemplarily, the material of the second resistor 8 includes but is not limited to polysilicon.

[0139] In some embodiments, as shown in FIG6 , the touch display substrate includes a semiconductor layer poly, a first conductive layer Gate, a second conductive layer SD, and a third conductive layer TMB sequentially disposed on a base substrate 1 .

[0140] Figure 11a is a partial structural diagram of another touch display substrate provided in an embodiment of the present disclosure, and Figure 11b is a partial enlarged view of the BB' area in the structure shown in Figure 11a. The difference between the electrostatic protection circuit 5 shown in Figure 7 (see Figure 8 for detailed structure) is that a second resistor 8 is used to replace the electrostatic ring unit 51.

[0141] As shown in Figure 11a, the first part 4a of the touch lead 4 includes a first sub-lead segment 401 and a second sub-lead segment 402 located in the second conductive layer SD; the second resistor 8 is a semiconductor connecting line 8a located in the semiconductor layer poly; the first sub-lead segment 401 and the second sub-lead segment 402 are respectively connected to the two ends of the semiconductor connecting line 8a.

[0142] Specifically, as shown in Figure 11a, the second part 4b of the touch lead 4 is connected to the first sub-lead segment 401 through a first via V1 that sequentially penetrates the touch insulation layer TLD, the passivation layer PVX and the flat layer PLN, the first sub-lead segment 401 is connected to the semiconductor connection line 8a through a second via V2 that sequentially penetrates the interlayer insulation layer ILD and the gate insulation layer GI, the semiconductor connection line 8a is connected to the second sub-lead segment 402 through a third via V3 that sequentially penetrates the gate insulation layer GI and the interlayer insulation layer ILD, and the second sub-lead segment 402 is bound to the binding area with the touch flexible circuit board TFPC.

[0143] For example, as shown in Figure 11b, the first sub-lead segment 401 includes a first main portion 401a and a first connecting end portion 401b connected to the semiconductor connection line 8a; the second sub-lead segment 402 includes a second main portion 402a and a second connecting end portion 402b connected to the semiconductor connection line 8a. The width of the first connecting end portion 401b is greater than the width of the first main portion 401a; the width of the second connecting end portion 402a is greater than the width of the second main portion 402b. The length of the touch lead 4 is greater than the length of the semiconductor connection line 8a. The width here can be understood as the average width in the X direction. The length here can be understood as the average width in the extension direction (or Y direction) of the touch lead 4.

[0144] In this embodiment, a large resistor (semiconductor connecting wire 8a) is added in the middle position of the touch lead 4 for electrostatic protection. At the same time, the large resistor is set in the semiconductor layer poly in the original touch display substrate, which can save the process of independently preparing the large resistor, improve the preparation efficiency, and will not increase the thickness of the final product of the present invention, thereby ensuring a lightweight and thin product design.

[0145] For example, Figure 12 is a diagram of the film layer stacking after the touch flexible circuit board provided in an embodiment of the present disclosure is folded back. The structure shown in Figure 2 is similar to the schematic diagram of the touch flexible circuit board before it is folded back. As shown in Figure 12, after the touch flexible circuit board TFPC undergoes the binding process, it is folded back to the back of the touch display substrate 100, that is, the backlight side of the base substrate 1 away from the light-emitting side.

[0146] In some embodiments, Figure 13 is a circuit diagram of another electrostatic protection circuit provided in an embodiment of the present disclosure. As shown in Figure 13, the electrostatic protection circuit 5 also includes a first resistor 9 electrically connected to the touch lead 4; the electrostatic ring unit 51 includes a first transistor T1 and a second transistor T2; the first electrode of the first transistor T1 is electrically connected to the second power signal line VGH, the second electrode of the first transistor T1 is electrically connected to the first resistor 9, and the control electrode of the first transistor T1 is electrically connected to the second power signal line VGH; the first electrode of the second transistor T2 is electrically connected to the first resistor 9, the second electrode of the second transistor T2 is electrically connected to the third power signal line VGL, and the control electrode of the second transistor T2 is electrically connected to the first resistor 9.

[0147] In this embodiment, the electrostatic ring unit is used to lead out the high current ESD flowing into the touch lead 4 ; and the first resistor is further added to limit the electrostatic current.

[0148] Optionally, the resistance of the first resistor 9 may be 10KΩ.

[0149] The specific structure of the electrostatic ring unit in this embodiment is the same as that of the above embodiments, and the repeated parts are not repeated. The specific structure, setting position and size of the first resistor 9 are the same as those of the second resistor 8. For details, please refer to the description of the second resistor 8 above, and the repeated parts are not repeated.

[0150] In addition, an embodiment of the present disclosure further provides a display device, which includes the touch display substrate of any one of the above embodiments.

[0151] The touch display device can be, for example, a mobile phone, tablet computer, television, monitor, laptop computer, digital photo frame, vehicle-mounted device, or any other product with a touch display function. Other essential components of the display device are well understood by those skilled in the art and are not described here in detail, nor should they be construed as limiting the present disclosure.

[0152] This disclosure addresses the issue of large electrostatic discharge (ESD) currents generated during the D-lami process. For positive and negative ESD, the electrostatic ring unit 51 is used to drain and eliminate the current, or a large resistor is used to limit the current, preventing the large ESD current from causing electrostatic breakdown and short circuiting between the touch electrode 3 and the first power signal line 6. Furthermore, the technical solution of this disclosure can be extended and applied to other FMLOC touch display solutions.

[0153] It is understood that the above embodiments are merely exemplary embodiments for illustrating the principles of the present disclosure, and the present disclosure is not limited thereto. Those skilled in the art may make various modifications and improvements without departing from the spirit and substance of the present disclosure, and such modifications and improvements are also considered to be within the scope of protection of the present disclosure.

Claims

1. A touch display substrate having a display area and a peripheral area surrounding the display area; wherein, The touch display substrate includes a substrate, touch electrodes disposed on the substrate and located in the display area, and touch leads, an electrostatic protection circuit, and a first power signal line located in the peripheral area; The positive projection of the first power signal line on the substrate overlaps with the positive projection of the touch lead on the substrate; the touch lead is electrically connected to a bonding area pin located in the peripheral area through the electrostatic protection circuit.

2. The touch display substrate according to claim 1, wherein, The touch display substrate further includes a second power signal line and a third power signal line disposed on the substrate; there is a voltage difference between the voltage signal transmitted by the second power signal line and the voltage signal transmitted by the third power signal line; The electrostatic protection circuit includes at least one electrostatic ring unit; The electrostatic ring unit is configured to introduce static electricity on the touch lead into the second power signal line or the third power signal line.

3. The touch display substrate according to claim 2, wherein The electrostatic ring unit includes a first transistor and a second transistor; A first pole of the first transistor is electrically connected to the second power signal line, a second pole is electrically connected to the touch lead, and a control pole is electrically connected to the second power signal line; A first pole of the second transistor is electrically connected to the touch lead, a second pole is electrically connected to the third power signal line, and a control pole is electrically connected to the touch lead.

4. The touch display substrate according to claim 3, wherein, The touch display substrate includes a semiconductor layer, a first conductive layer, a second conductive layer, and a third conductive layer sequentially disposed on the substrate; The active layers of the first transistor and the second transistor are both located in the semiconductor layer; The control pole of the first transistor, the control pole of the second transistor, the second power signal line, and the third power signal line are all located in the first conductive layer; The first and second poles of the first transistor, the first and second poles of the second transistor, and a first part of the touch lead are all located in the second conductive layer; The touch electrodes and a second part of the touch lead are located in the third conductive layer.

5. The touch display substrate according to claim 4, wherein The first part of the touch lead includes a main lead portion, and a plurality of first branch portions connected to both sides of the extending direction of the main lead portion, and a first area is defined between two adjacent first branch portions located on the same side of the extending direction of the main lead portion; One of the first areas is provided with one of the electrostatic ring units.

6. The touch display substrate according to claim 5, wherein The electrostatic ring units located on both sides of the extending direction of the main lead portion are arranged in one-to-one correspondence, and the two corresponding electrostatic ring units are symmetrically arranged with the main lead portion as the axis of symmetry; Two adjacent electrostatic ring units located on the same side of the extending direction of the main lead portion are symmetrically arranged with the first branch portion between them as the axis of symmetry.

7. The touch display substrate according to claim 6, wherein, For two electrostatic ring units that are symmetrically arranged on both sides of the extending direction of the main lead portion, the control poles of the two first transistors are connected into an integral structure; the control poles of the two second transistors are connected into an integral structure.

8. The touch display substrate according to claim 6, wherein, The second power supply signal line includes a plurality of second sub-power supply signal lines extending along the extending direction of the first branch portion; the third power supply signal line includes a plurality of third sub-power supply signal lines extending along the extending direction of the first branch portion; the second sub-power supply signal lines and the third sub-power supply signal lines are alternately arranged; For the electrostatic ring units located on both sides of the extending direction of the second sub-power supply signal line, the first poles of the respective first transistors are electrically connected to the same second sub-power supply signal line; For the electrostatic ring units located on both sides of the extending direction of the third sub-power supply signal line, the second poles of the respective second transistors are electrically connected to the same third sub-power supply signal line.

9. The touch display substrate according to claim 8, wherein, The first branch portions located on both sides of the extending direction of the main body lead portion are arranged in one-to-one correspondence; The partial orthographic projection of the second sub-power supply signal line on the substrate falls within the orthographic projections on the substrate of the two first branch portions arranged in correspondence and the partial main body lead portion between the two first branch portions; The partial orthographic projection of the third sub-power supply signal line on the substrate falls within the orthographic projections on the substrate of the two first branch portions arranged in correspondence and the partial main body lead portion between the two first branch portions; 10. The touch display substrate according to claim 5, wherein, The first part of the touch lead further includes a plurality of second branch portions connected to both sides of the extending direction of the main body lead portion, and the second branch portions are located in the first region; The second branch portions are multiplexed as the second poles of the first transistors and the first poles of the second transistors in the same first region; 11. The touch display substrate according to claim 10, wherein, The control pole of the first transistor is electrically connected to the second transfer portion through the first transfer portion, and the second transfer portion is electrically connected to the first pole of the first transistor; The first transfer portion is located in the second conductive layer; The second transfer portion is located in the semiconductor layer.

12. The touch display substrate according to claim 10, wherein, The control pole of the second transistor is electrically connected to the fourth transfer portion through the third transfer portion, and the fourth transfer portion is electrically connected to the first pole of the second transistor; The third transfer portion is located in the second conductive layer; The fourth transfer portion is located in the semiconductor layer.

13. The touch display substrate according to any one of claims 4 to 12, wherein, The electrostatic protection circuit further includes a first resistor electrically connected to the touch lead; the electrostatic ring unit includes a first transistor and a second transistor; The first pole of the first transistor is electrically connected to the second power supply signal line, the second pole is electrically connected to the first resistor, and the control pole is electrically connected to the second power supply signal line; The first pole of the second transistor is electrically connected to the first resistor, the second pole is electrically connected to the third power supply signal line, and the control pole is electrically connected to the first resistor.

14. The touch display substrate according to claim 1, wherein, The electrostatic protection circuit includes a second resistor electrically connected to the touch lead.

15. The touch display substrate according to claim 14, wherein, The touch display substrate includes a semiconductor layer, a first conductive layer, a second conductive layer, and a third conductive layer sequentially arranged on the substrate; The first part of the touch lead includes a first sub-lead segment and a second sub-lead segment located in the second conductive layer; the second resistor is a semiconductor connection line located in the semiconductor layer; the first sub-lead segment and the second sub-lead segment are respectively connected to both ends of the semiconductor connection line.

16. A display device, which includes the touch display substrate as described in any one of claims 1 to 15.

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