Central computing unit, function execution method, device, storage medium, and vehicle

Abstract

A central computing unit, a function execution method, an electronic device (800), a storage medium, and a vehicle. The central computing unit is applied to the vehicle, and the central computing unit comprises a plurality of chips. Some or all of the plurality of chips acquire data information of a first functional domain among a plurality of functional domains of the vehicle, wherein the first functional domain is any one of the plurality of functional domains (701); and some or all of the plurality of chips process the data information so as to execute a function of the first functional domain (702).

Description

Central computing unit, function execution method, device, storage medium and vehicle

[0001] This application claims priority to the Chinese patent disclosure with application number 202410068307.9 and application name “Central Computing Unit, Function Execution Method, Device, Storage Medium and Vehicle” filed with the China Patent Office on January 16, 2024, the entire contents of which are incorporated by reference into this disclosure. Technical Field

[0002] The present application relates to, but is not limited to, the field of vehicle technology, and specifically to a central computing unit, a function execution method, a device, a storage medium, and a vehicle. Background Art

[0003] With the development of automobile electrification, the degree of intelligence is getting higher and higher. In order to adapt to the development of automobile electrification and meet the increasing demand through distributed architecture, the vehicle will be divided into multiple functional domains according to its functions. Different functional domains will communicate through distributed architecture to realize intelligent control of the vehicle.

[0004] However, as the functions of electrical appliances continue to increase, the number of domain controllers in the entire vehicle is also gradually increasing, and the difficulty of controller layout is increasing, resulting in a gradual increase in the electronic and electrical costs of the vehicle. Technical Solutions

[0005] The following is a summary of the subject matter described in detail herein. This summary is not intended to limit the scope of the claims.

[0006] The embodiments of the present application provide a central computing unit, a function execution method, a device, a storage medium, and a vehicle. By setting multiple chips in the central computing unit, multiple functional domains of the vehicle are integrated across domains into the central computing unit for execution. There is no need to deploy a domain controller for each functional domain to implement the functions of multiple functional domains, thereby reducing the cost of electronic devices in the vehicle.

[0007] In a first aspect, an embodiment of the present application provides a central computing unit, which is applied to a vehicle and includes a plurality of chips;

[0008] Some or all of the multiple chips are used to obtain data information of a first functional domain among multiple functional domains of the vehicle, and to process the data information to perform the function of the first functional domain, where the first functional domain is any one of the multiple functional domains.

[0009] In a second aspect, an embodiment of the present application provides a function execution method, which is applied to a central computing unit of a vehicle, wherein the central computing unit includes multiple chips; the method includes:

[0010] Some or all of the multiple chips obtain data information of a first functional domain among multiple functional domains of the vehicle, and process the data information to perform functions of the first functional domain, where the first functional domain is any one of the multiple functional domains.

[0011] In one embodiment of the present application, the plurality of functional domains are all functional domains of the vehicle.

[0012] In one embodiment of the present application, the structures of the multiple chips are different.

[0013] In one embodiment of the present application, the central computing unit communicates with other hardware on the vehicle via various types of buses.

[0014] In one embodiment of the present application, the multiple types of buses include one or more of the following: an Ethernet ETH bus, a general purpose input / output GPIO bus, a local area network LIN bus, and a controller area network CAN bus.

[0015] In one embodiment of the present application, when the other hardware is the regional controller of the vehicle, the central computing unit communicates with the regional controller of the vehicle through the ETH bus and the Ethernet ring network; when the other hardware is the electronic control unit of the vehicle, the central computing unit communicates with the electronic control unit through the GPIO bus, the local connection network LIN bus or the controller area network CAN bus.

[0016] In one embodiment of the present application, status detection is performed between the multiple chips via a preset interface, wherein the preset interface includes an integrated circuit bus I2C interface and / or an input / output IO interface.

[0017] In one embodiment of the present application, the plurality of chips include a microcontroller MCU, a system-on-chip SOC, and a field programmable gate array FPGA.

[0018] In one embodiment of the present application, the MCU and the SOC communicate via an Ethernet ETH bus; the SOC and the FPGA communicate via a high-speed serial computer extension PCIE bus; and the MCU and the FPGA communicate via a serial peripheral interface SPI bus.

[0019] In one embodiment of the present application, the multiple functional domains include at least one of the following: a body electronics domain, a central gateway domain, a chassis domain, an interactive display domain, a driving assistance domain, and a telematics T-BOX domain.

[0020] In one embodiment of the present application, the functions of the vehicle body electronic domain include at least one of the following: control of the lighting system, window system, air conditioning system, seat system and anti-theft system; the functions of the central gateway domain include at least one of the following: communication through various types of buses, fault diagnosis, over-the-air download (OTA) management and network management; the functions of the chassis domain include at least one of the following: control of the braking system, steering system, suspension system and vehicle control unit (VCU) system; the functions of the interactive display domain include at least one of the following: display of AR-HUD, pixel lights, interior electronic rearview mirrors, exterior electronic rearview mirrors and night vision systems; the functions of the driving assistance domain include at least one of the following: driving assistance and automatic parking; the functions of the T-BOX domain include at least one of the following: data acquisition, vehicle diagnosis and scene customization.

[0021] In one embodiment of the present application, the functions of the body electronics domain, the functions of the central gateway domain, and the functions of the chassis domain are executed by the MCU; the functions of the interactive display domain are jointly executed by the SOC and the FPGA; the functions of the driving assistance domain and the functions of the T-BOX domain are executed by the SOC.

[0022] In one embodiment of the present application, the MCU communicates with other hardware of the vehicle through multiple types of buses to execute the functions of the body electronics domain and the chassis domain; the SOC and the FPGA communicate with each camera through the SERDES bus to obtain image data from each camera, and process and / or store the image data to execute the functions of the driving assistance domain, the interactive display domain, and the T-BOX domain.

[0023] In a third aspect, an embodiment of the present application provides an electronic device, comprising: a processor and a memory, wherein the processor is connected to the memory, the memory is used to store a computer program, and the processor is used to execute the computer program stored in the memory, so that the electronic device performs the method described in the second aspect.

[0024] In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program, and the computer program enables a computer to execute the method described in the second aspect.

[0025] In a fifth aspect, an embodiment of the present application provides a computer program product, which includes a non-transitory computer-readable storage medium storing a computer program, and the computer is operable to enable the computer to execute the method described in the second aspect.

[0026] In a sixth aspect, an embodiment of the present application provides a vehicle comprising a central computing unit as described in any of the above aspects.

[0027] The implementation of the embodiments of the present application has the following beneficial effects:

[0028] It can be seen that in the embodiment of the present application, through the mutual cooperation between the multiple chips of the central computing unit, the functions of any one of the multiple functional domains of the vehicle can be executed by the multiple chips, that is, the multiple functional domains of the vehicle are cross-domain integrated into the central computing unit for execution, so that the central computing unit can obtain data information under the multiple functional domains, thereby being able to control the vehicle more intelligently; and after the multiple functional domains are integrated, the functions of the multiple functional domains are uniformly executed by the central computing unit, and there is no need to separately deploy domain controllers for each functional domain to implement the functions of each functional domain, thereby reducing the cost of the vehicle's electronic devices. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0030] FIG1 is a schematic diagram of the structure of a central computing unit provided in an embodiment of the present application;

[0031] FIG2 is a schematic diagram of another internal communication method of a chip in a central computing unit provided by an embodiment of the present application;

[0032] FIG3 is a schematic diagram of a communication method between a chip in a central computing unit and other hardware provided by an embodiment of the present application;

[0033] FIG4 is a schematic diagram of functional domains and functions of a vehicle provided by an embodiment of the present application;

[0034] FIG5 is a schematic diagram of executing functions of various functional domains provided in an embodiment of the present application;

[0035] FIG6 is a schematic diagram of the underlying structure of each chip provided in an embodiment of the present application;

[0036] FIG7 is a flow chart of a function execution method provided in an embodiment of the present application;

[0037] FIG8 is a schematic structural diagram of an electronic device provided in an embodiment of the present application.

[0038] Implementation Methods of the Application

[0039] The following will be combined with the drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0040] The terms "first," "second," "third," and "fourth," etc., in the specification and claims of this application and the accompanying drawings are used to distinguish between different objects, rather than to describe a specific order. In addition, the terms "including," "having," and any variations thereof, are intended to cover non-exclusive inclusions. For example, a process, method, system, product, or apparatus comprising a series of steps or elements is not limited to the listed steps or elements, but may optionally include steps or elements not listed, or may optionally include other steps or elements inherent to the process, method, product, or apparatus.

[0041] References herein to "embodiments" mean that a particular feature, result, or characteristic described in connection with the embodiments may be included in at least one embodiment of the present application. The appearance of this phrase in various places in the specification does not necessarily refer to the same embodiment, nor does it constitute an independent or alternative embodiment that is mutually exclusive of other embodiments. It is understood, both explicitly and implicitly, by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0042] In order to facilitate understanding of the technical solution of this application, the characteristics of several chips involved in this application are first introduced.

[0043] Microcontroller Unit (MCU): MCU chips typically contain only a basic processor core and essential peripheral interfaces, resulting in limited processing capabilities. However, MCUs often offer real-time performance, enabling rapid response to inputs and outputs, making them suitable for time-sensitive applications.

[0044] System-on-Chip (SOC): An SOC integrates multiple functional modules, such as a processor, memory, graphics processor, and communication interfaces. It supports the storage of large amounts of data and can meet the needs of more complex applications. The SOC is equipped with a powerful processor capable of handling complex algorithms and large amounts of data, such as image processing and AI computing.

[0045] Field Programmable Gate Array (FPGA): FPGA is programmable and can implement different logic function interface expansions as needed, enabling fast image display.

[0046] Refer to Figure 1, which is a schematic diagram of the structure of a central computing unit provided in an embodiment of the present application. As shown in Figure 1, the central computing unit includes multiple chips. This application mainly uses chips 1, 2, and 3 as examples for illustration. The central computing unit is located on the vehicle and is used to perform functions in any functional domain of the vehicle.

[0047] It should be noted that the structures of the above-mentioned multiple chips are different, and the functions implemented by chips of different structures are different. Therefore, when executing the functions of different functional domains of the vehicle, the chips involved in executing the functions in the central computing unit may also be different. For example, the functions of certain functional domains may only require the participation of some chips among multiple chips, or may require the participation of all chips among multiple chips. When multiple chips are involved, the multiple chips coordinate with each other to execute the functions of the functional domain. For example, when executing the functions of the body electronics domain, it is mainly to control the lighting system, window system, air conditioning system, etc. These systems are mainly based on the General Purpose Input Output (GPIO) protocol for communication. Therefore, the functions of the body electronics domain can be executed through the chip with a large number of GPIO interfaces in the central computing unit.

[0048] As shown in Figure 1, for the function of the first functional domain among multiple functional domains of the vehicle, when the central computing unit implements the function of the first functional domain, it obtains data information of the first functional domain through some or all of the multiple chips, that is, the chip used to execute the function among the multiple chips, and processes the data information to execute the function of the first functional domain, wherein the first functional domain is any one of the multiple functional domains.

[0049] It can be seen that in the embodiment of the present application, through the mutual cooperation between the multiple chips of the central computing unit, the functions of any one of the multiple functional domains of the vehicle can be executed by the multiple chips, that is, the multiple functional domains of the vehicle are integrated across domains, thereby reducing the cost of the vehicle's electronic devices; moreover, after the multiple functional domains are integrated across domains and executed on a central computing unit, the cross-domain communication between the multiple functional domains is converted into inter-board communication, thereby improving the communication efficiency between the functional domains; moreover, by integrating the multiple functional domains across domains, the central computing unit can obtain data information under the multiple functional domains, thereby being able to control the vehicle more intelligently.

[0050] In one embodiment of the present application, the above-mentioned multiple functional domains are all functional domains of the vehicle, that is, all functional domains of the vehicle are integrated across domains into the central computing unit for execution, further reducing the cost of electronic devices of the vehicle.

[0051] In one embodiment of the present application, the above-mentioned multiple chips are chips with different structures. Therefore, the cross-domain fusion of the present application can also be understood as realizing the cross-domain fusion of vehicles through heterogeneous chips.

[0052] For the convenience of description, this application mainly uses the above-mentioned multiple chips as microcontrollers (MCU), system-on-chips (SOC) and field programmable gate arrays (FPGA) as examples for illustration, but does not limit the structures of the multiple chips.

[0053] In one embodiment of the present application, after integrating different functional domains of the vehicle into the central computing unit across domains, the present application also improves the communication method of the central computing unit relative to the existing communication method between domain controllers, wherein the communication method includes external communication method with other hardware and internal communication method between chips.

[0054] The communication method of the central processing unit of the present application is described in detail below with reference to the accompanying drawings.

[0055] For example, when internal chips of the central computing unit (ie, the plurality of chips mentioned above) communicate with each other, different chips communicate using different buses.

[0056] Specifically, as shown in Figure 2, the MCU and the SOC communicate through the Ethernet (ETH) bus, that is, the MCU and the SOC communicate through Ethernet; the SOC and the FPGA communicate through the high-speed serial computer expansion (Peripheral Component Interconnect Express, PCIE) bus, that is, the SOC and the FPGA communicate through PCIE; the MCU and the FPGA communicate through the serial peripheral interface (Serial Peripheral Interface, SPI) bus, that is, the MCU and the FPGA communicate through SPI.

[0057] It should be understood that the MCU and SOC will interact with a large amount of data information and signaling (in different transmission formats). For example, the MCU will send a series of control instructions to the SOC to adjust the angle and direction of each camera, etc.; for another example, the SOC will transmit a series of data collected by sensors to the MCU. Therefore, Ethernet communication is used between the MCU and SOC to ensure high bandwidth transmission and meet the transmission requirements of high-volume and high-bandwidth data. At the same time, Ethernet communication also supports the transmission of information in various data formats. A large amount of image and / or video data will be transmitted between the SOC and FPGA. Therefore, the SOC and FPGA communicate via the PCIE bus to meet the transmission requirements of video signals between the SOC and FPGA. The MCU and FPGA communicate via the SPI bus. Since SPI is a simple and efficient serial communication method, when the system starts, the MCU can send startup instructions to the FPGA via the SPI bus, thereby achieving rapid startup and initialization of the FPGA, enabling the FPGA to quickly display content, such as the rapid display of the in-vehicle interface, etc.

[0058] For example, when the central computing unit performs external communication, the central computing unit communicates with other hardware on the vehicle through various types of buses.

[0059] Exemplarily, as shown in FIG3 , the multiple types of buses include one or more of the following: an Ethernet bus, a general-purpose input / output (GPIO) bus, a local interconnect network (LIN) bus, and a controller area network (CAN) bus. Specifically, with respect to the CAN bus, this application mainly uses the CAN FD bus as an example for explanation.

[0060] Optionally, as shown in Figure 3, when the other hardware is a vehicle zone controller, the central computing unit communicates with the vehicle zone controller via Ethernet via the ETH bus, and the Ethernet between the central computing unit and the zone controller forms an Ethernet ring network. The zone controllers include zone controller 1, zone controller 2, and zone controller 3, namely the left zone controller, rear zone controller, and right zone controller of the vehicle.

[0061] Optionally, when the central computing unit communicates with the regional controller of the vehicle via Ethernet, the Ethernet ring network between the computing unit and the regional controller passes through the Time Sensitive Network (TSN) protocol cluster to ensure the synchronization and reliability of the signal time between the central computing unit and the regional controller.

[0062] Optionally, as shown in FIG3 , when the other hardware is an electronic control unit (ECU) of the vehicle (or other systems of the vehicle, or subsystems of the vehicle), the central computing unit communicates with the electronic control unit via the GPIO bus, the local interconnect network LIN bus, or the controller area network CAN bus. In other words, the central computing unit has multiple types of communication interfaces, and the central computing unit is mounted on multiple buses through the multiple types of communication interfaces, so that the central computing unit can communicate through multiple buses. For the sake of convenience of description, in this application, the central computing unit mounted on multiple types of buses is referred to as the central computing unit including multiple types of buses.

[0063] Furthermore, there can be multiple communication interfaces of each type. For example, for the ETH bus, the central computing unit can have multiple communication interfaces corresponding to the ETH bus. This allows the central computing unit to be mounted on multiple ETH buses and then communicate with other hardware devices via different ETH buses. For example, Figure 3 shows that the central computing unit can communicate with regional controller 1 and regional controller 2 via two ETH buses, respectively. It should be noted that the central computing unit can switch the ETH bus using an ETH SWITCH switch to determine which ETH bus it uses for communication.

[0064] Among them, some ETH buses of the central computing unit can be reserved to facilitate subsequent function expansion.

[0065] It should be noted that compared to the existing cross-domain integration, all domain controllers communicate and transmit data through gateways. In this application, various types of buses are designed for the central computing unit, so that the central computing unit can communicate with other hardware through various communication methods. In this way, when the central computing unit needs to transmit non-timely system signals, the Ethernet main bus can be used to transmit system signals, thereby making full use of the advantages of Ethernet's high bandwidth to transmit a large number of system signals; and for system signals with higher timeliness requirements, communication can be carried out through the CAN bus. Moreover, since most system signals do not have such high timeliness requirements, most system signals can be sent on the Ethernet, and the CAN bus is dedicated to the communication of high-timeliness system signals, which greatly reduces the load on the CAN bus. Therefore, the signal transmission cycle on the CAN bus can be shortened and the communication rate of the CAN bus can be increased.

[0066] Optionally, in the present application, the CAN bus may be a CAN FD bus, and the two may not be distinguished in essence.

[0067] Therefore, the bus on which each electronic control unit (ECU) is mounted can be determined based on its transmission requirements. For example, if the lighting system has low timeliness requirements and simple data transmission, it can be mounted on the GPIO bus. However, if the braking system has high timeliness requirements, it should be mounted on the CAN bus to ensure the timeliness of the braking system.

[0068] Furthermore, which electronic control units on the vehicle need to be mounted on the bus included in the central computing unit can be determined based on the distance between the ECU and the central computing unit, that is, the electronic control unit is mounted on the central computing unit or regional controller closest to the electronic control unit.

[0069] Furthermore, to enable the central computing unit to directly control the electronic control units (ECUs) mounted on the CAN bus of the regional controllers via the CAN bus, the central computing unit's CAN bus can be connected to the regional controller's CAN bus in a ring network. This allows the central computing unit to communicate directly with the ECUs mounted on the regional controllers via the ring network's CAN bus when controlling them. As shown in Figure 3, the central computing unit's CAN bus is connected to the CAN bus of regional controller 1 in a ring network. This allows the central computing unit to directly control the ECUs mounted on the CAN bus of regional controller 1 via the CAN bus, further improving the timeliness of ECU control. For example, if the ECU mounted on the CAN bus of regional controller 1 is the brake system for the left zone, the central computing unit can directly control the brake system via the CAN bus, enabling timely and effective vehicle braking.

[0070] In one embodiment of the present application, each chip also includes a preset interface, so that status detection can be performed between multiple chips through the preset interface, that is, the MCU can detect whether the working status of the SOC and the FPGA is abnormal through the preset interface, the SOC can also detect whether the working status of the MCU and the FPGA is abnormal through the preset interface, and the FPGA can also detect whether the working status of the MCU and the SOC is abnormal through the preset interface, wherein the preset interface includes an integrated circuit bus I2C interface and / or an input and output IO interface.

[0071] The following describes the functional domains of the vehicle involved in this application and the functions of each functional domain in conjunction with the accompanying drawings.

[0072] As shown in FIG4 , the multiple functional domains of the vehicle involved in this application include a body electronics domain, a central gateway domain, a chassis domain, an interactive display domain, a driving assistance domain, and a telematics box (T-BOX) domain.

[0073] For example, as shown in Figure 4, the body electronics domain includes at least one of the following functions: control of the lighting system, window system, air conditioning system, seat system, and anti-theft system. Lighting system control primarily involves turning on and off the vehicle's lights, adjusting the brightness of the lights, and adjusting the color and brightness of the ambient lighting. Window system control primarily involves closing and opening the windows. Seat system control primarily involves adjusting seat height and position. The air conditioning system primarily regulates the temperature of the vehicle's air conditioner. As can be seen, the central control unit executes the functions of the body electronics domain, making the control and adjustment of the vehicle's lighting, window, air conditioning, seat, and anti-theft systems more intelligent.

[0074] Optionally, the functions of the central gateway domain include at least one of the following: communication, fault diagnosis, over-the-air (OTA) management, and network management via various types of buses, including CAN bus, ETH bus, LIN bus, and GPIO bus, among others; OTA management primarily involves the MCU acting as a gateway to determine whether to initiate OTA technology to update vehicle software and hardware; network management primarily involves communication management between the central computing unit and other vehicle hardware; and fault diagnosis primarily involves diagnosis of various networks within the central computing unit.

[0075] Optionally, the functions of the chassis domain include at least one of the following: control of a braking system, a steering system, a suspension system, and a vehicle control unit (VCU) system;

[0076] Optionally, the functions of the interactive display domain include at least one of the following: display of an AR-HUD, a pixel light, an interior electronic rearview mirror, an exterior electronic rearview mirror, and a night vision system;

[0077] Optionally, the functions of the driving assistance domain include at least one of the following: driving assistance and automatic parking;

[0078] Optionally, the functions of the T-BOX domain include at least one of the following: data collection, vehicle diagnosis, and scene customization.

[0079] Specifically, the MCU communicates with other hardware of the vehicle through multiple types of buses to execute the functions of the body electronics domain and the chassis domain; the SOC and the FPGA communicate with each camera through the SERDES bus to obtain image data from each camera, and process and / or store the image data to execute the functions of the driving assistance domain, the interactive display domain, and the T-BOX domain.

[0080] The following describes the functional characteristics of each functional domain and details the chips that perform the functions of each functional domain.

[0081] For example, in the body electronics domain, there are numerous control systems within this functional domain, most of which communicate using a general-purpose input / output (GPIO) bus. Furthermore, many systems within the body electronics domain (e.g., lighting systems, window systems, etc.) are enabled via high-side drivers (HSDs) or low-side drivers (LSDs). For example, the window system can be enabled via a low-side driver. Furthermore, many of the control systems within the body electronics domain require ADC sampling to enable the system. For example, the lighting system can acquire an analog signal from a light sensor and then perform ADC sampling on it to determine the ambient light intensity, thereby determining whether to activate the vehicle's lighting system. For example, the analog signal from a rain sensor can also be sampled using ADCs to determine whether to activate the fog lights or automatically switch between high and low beams. Therefore, executing the functions of the body electronics domain requires minimal computing power, provides high control timeliness, and offers a large number of GPIO interfaces. Therefore, the functions of the body electronics domain can be executed using an MCU chip.

[0082] Specifically, when the MCU executes the functions of the body electronics domain, it will communicate with the hardware (subsystems) under the body electronics domain through the corresponding bus (generally the GPIO bus). Therefore, when the MCU obtains data information corresponding to the body electronics domain (which can also be understood as control instructions), it can send the data information to the corresponding subsystem through the corresponding bus, so that the subsystem executes the function corresponding to the data information, that is, executes the function of the body electronics domain. For example, the data information is a headlight off instruction. Since the headlight system is mounted on the GPIO bus of the central computing unit, the MCU can send the headlight off instruction to the headlight system through the GPIO bus, and the headlight system turns off the headlights based on the headlight off instruction.

[0083] Of course, if the MCU needs the participation of the SOC when executing the functions of the body electronic domain, for example, it needs to store or cache data, then the MCU will interact with the SOC through the ETH bus to jointly execute the functions of the body electronic domain.

[0084] For example, with respect to the functions of the central gateway domain, since the communication interfaces of various types of buses of the central computing unit are set on the MCU, that is, the central computing unit communicates with other hardware of the vehicle through the MCU, the functions of the central gateway domain are executed through the MCU.

[0085] Specifically, when the central computing unit needs to communicate with other hardware, the MCU determines the currently required bus and controls communication with the other hardware via that bus. For example, when the MCU needs to communicate with a zone controller, it uses the ETH switch to switch to the ETH bus corresponding to that zone controller and communicate with the zone controller via that ETH bus. For another example, when the MCU determines that it needs to communicate with the headlight system, it communicates with the headlight system via the GPIO bus.

[0086] Similarly, if the MCU requires the participation of the SOC when executing the functions of the central gateway domain, the MCU will interact with the SOC through the ETH bus to jointly execute the functions of the central gateway domain.

[0087] For example, for the chassis domain, the security requirements under this functional domain are relatively high, so the timeliness requirements are also relatively high, but the computational complexity is not particularly high, and the CAN bus of the central computing unit is directly connected to the MCU. Therefore, in order to meet the requirements of security and timeliness, the functions of the chassis domain can be executed through the MCU.

[0088] Specifically, when the MCU executes the functions of the chassis domain, the MCU will communicate with the hardware (subsystem) under the chassis domain through the corresponding bus. After the MCU obtains the data information under the chassis domain, it can send the data information to the various subsystems under the chassis domain through the corresponding bus (usually the CAN bus), thereby executing the functions of the chassis domain. For example, when the data information obtained by the central computing unit is a brake instruction, the MCU will send the brake instruction to the brake system through the CAN bus, and the brake system will brake the vehicle in response to the brake instruction.

[0089] Furthermore, given the higher security requirements of the chassis domain, the MCU can also send data to the underlying systems via at least two buses while executing chassis domain functions. This dual-bus data transmission allows for data backup, ensuring successful execution of chassis domain functions.

[0090] The at least two buses may be an ETH bus and a CAN bus.

[0091] For example, for the interactive display domain, the main function of this domain is to interact with the user and display images. Therefore, executing the functions of this domain requires a certain amount of CPU power and AI computing power. In addition, the functions of this domain need to be displayed quickly, and the timeliness of image data transmission is relatively high. Therefore, the functions of the interactive display domain can be jointly executed by the SOC and FPGA.

[0092] In addition, in order to execute the functions of the interactive display domain, the SOC and FPGA need to be connected to each camera, that is, to obtain image data from each camera and process the image data to execute the functions of the interactive display domain.

[0093] Exemplarily, as shown in FIG5 , for AR-HUD display, the SOC is connected to the input interface of the AR-HUD through a serializer (SERDES) bus, so that the SOC can obtain the content to be displayed (i.e., the above-mentioned data information) from the input interface, and then render the content to be displayed into a format supported by the AR-HUD. Finally, the SOC projects the rendered content to the corresponding area through the SERDES bus for AR-HUD display, thereby executing the AR-HUD display under the interactive display domain.

[0094] For example, as shown in FIG5 , for the display of pixel lights, the SOC is connected to the input interface of the pixel lights through the SERDES bus, so that the SCO can obtain the content to be displayed (i.e., the data information mentioned above) from the input interface, and then divide and render the content to be displayed into the content required by the pixel lights, and send the rendered content to the pixel lights through the SERDES bus for display. More specifically, the pixel lights of the vehicle include left and right pixel lights, and the content required to be displayed by the left and right pixel lights can be rendered, and then the content required to be displayed by each pixel can be sent to the left and right pixel lights respectively through the SERDES bus for display.

[0095] For example, as shown in Figure 5, for the display of the internal electronic rearview mirror (Camera Monitor System, CMS), the FPGA is connected to the camera in the CMS via the SERDES bus. The FPGA can then obtain image data (i.e., the aforementioned data information) from the camera in the CMS and then process the image data. Of course, the image data can also be sent to the SOC for processing via the PCIE bus, and then the processed image data can be obtained from the SOC. Finally, the FPGA sends the processed image data to the display screen in the CMS via the SERDES bus for display.

[0096] For example, as shown in Figure 5, for the display of the external electronic rearview mirror (Camera Monitor System, CMS), the FPGA is connected to the vehicle's CMS left camera and CMS right camera respectively through the SERDES bus. In this way, the FPGA obtains image data (i.e., the above-mentioned data information) from the CMS left camera and CMS right camera respectively through the SERDES bus, and then processes the image data. Of course, the image data can also be sent to the SOC for processing via the PCIE bus, and then the processed image data is obtained from the SOC. Finally, the FPGA sends the processed image data to the CMS left display screen and the CMS right display screen respectively through the SERDES bus.

[0097] For example, to display the night vision system, the SOC is connected to the vehicle's far-infrared camera and near-infrared camera via a SERDES bus. The SOC then acquires image data (i.e., the aforementioned data information) from the night vision far-infrared camera and the night vision near-infrared camera via the SERDES bus, processes the image data, and generates a night vision video. Finally, the SOC outputs the night vision video via the SERDES bus for display, for example, on an onboard display screen.

[0098] For example, the driving assistance domain primarily utilizes images captured by cameras to assist in vehicle driving. Therefore, this functional domain requires significant CPU and AI computing power, and the driving assistance functions are therefore executed by the SOC. It should be noted that since the SOC needs to acquire images to execute the driving assistance domain, it connects to each camera via a serializer (SERDES) bus to obtain image data from each camera to perform the driving assistance domain functions.

[0099] Specifically, as shown in FIG5 , the driving assistance functions under the driving assistance domain may include ADAS, road preview, and panoramic video acquisition.

[0100] For example, for an Advanced Assisted Driving System (ADAS), the SOC is connected to an ADAS camera (lidar) via a SERDES bus. The SOC can then obtain image data from the ADAS camera, and then implement advanced assisted driving based on the image data.

[0101] For example, for road preview, the SOC is connected to the road preview camera through the SERDES bus, and can obtain corresponding image data from the road preview camera. Then the SCO analyzes and processes the image data to achieve road preview.

[0102] For example, for panoramic video, the SOC is connected to the panoramic front camera, panoramic rear camera, panoramic left camera, and panoramic right camera respectively through the SERDES bus, and the SOC can obtain the front image data, rear image data, left image data, and right image data of the vehicle from the panoramic front camera, panoramic rear camera, panoramic left camera, and panoramic right camera respectively. Then, the SOC analyzes and processes the front image data, rear image data, left image data, and right image data (for example, stitching), and a panoramic video of the front (panoramic video 1) and a panoramic video of the rear (i.e., panoramic video 2) can be obtained. Compared with the existing functional domain, if a panoramic video of the rear is obtained, the image data can only be obtained through the panoramic rear camera. However, the rear area controller cannot obtain the left image data and the right image data taken by the panoramic left camera and the panoramic right camera, because the left image data and the right image data are stored in the left area controller and the right area controller respectively, and the two areas are not fused. Therefore, it is impossible to obtain a rear panoramic video with an ultra-wide angle of view. However, the present application can obtain a rear panoramic video with an ultra-wide angle of view because it realizes cross-domain fusion.

[0103] Finally, for the T-BOX domain, the implementation of its functions requires storage resources, edge computing capabilities, and a service-oriented architecture (SOA). Therefore, the functions of the T-BOX domain are implemented through the SOC.

[0104] For example, for data collection, the SOC can be connected to various sensors through a bus, and then obtain vehicle data through various sensors to achieve data collection; alternatively, the SOC can obtain input data through an input interface to achieve data collection; for vehicle diagnosis, the SOC can diagnose the vehicle through the collected data to determine whether the vehicle has a fault; for scenario customization, the SOC can support user-defined scenarios and provide users with atomic services.

[0105] Exemplarily, the SOC may store the image data acquired from the camera, for example, may store the image data in a digital video recorder (DVR), and output the image data to the DVR.

[0106] The above describes the functions performed by each chip from the perspective of the upper-layer characteristics and the characteristics of each function of each chip. The following describes how each chip performs each function from the perspective of the lower-layer characteristics of each chip in conjunction with the accompanying drawings.

[0107] Exemplarily, as shown in Figure 6, the SOC includes an application layer, middleware, and an interface layer. Among them, the interface layer mainly provides the underlying driver and hardware for the application layer. Specifically, the interface layer of the SOC includes the drivers required for various communications and the memory required for storage. As shown in Figure 6, the drivers include: serializer and deserializer drivers (Serializer / Deserializer) drivers, ETH drivers, PCIE drivers, I2C drivers, SPI drivers, IO drivers, etc.; among them, the memory includes: EMMC memory and DDR memory.

[0108] SoC middleware primarily provides communication services for the application and interface layers, as well as the services required by the SoC's application layer to perform various functions. As shown in Figure 6, SoC middleware includes: communication services, time synchronization, security management, data bus, memory management, state management, ETH services, CAN services, signaling services, logging systems, data storage management, functional safety, execution management, and diagnostic systems.

[0109] The SOC's application layer is primarily used to implement functions within the corresponding functional domain. For example, the SOC's application layer can implement AR-HUD display, pixel light display, interior electronic rearview mirror display, exterior electronic rearview mirror display, night vision system display, road preview, T-BOX display, and ADAS display.

[0110] Therefore, the application layer of the SOC can execute the functions of the interactive display domain, the driving assistance domain, and the T-BOX domain by calling the hardware resources of the interface layer and the software resources (services) in the middleware.

[0111] Furthermore, as shown in Figure 6, the FPGA includes an interface layer and an application layer. The FPGA interface layer primarily provides underlying drivers and hardware for the application layer. Specifically, the FPGA interface layer includes various communication drivers and storage memory. As shown in Figure 6, the drivers include: Flash, SPI, I2C, GPIO, PCIE, MIPI, and OLDI; the memory is DDR memory. Functions performed by the application layer include displaying the interior and exterior electronic rearview mirrors, pixel lights, and the night vision system.

[0112] Furthermore, as shown in Figure 6, the MCU includes an application layer, a service layer, and an interface layer. Among them, the interface layer mainly provides the underlying driver and hardware for the application layer. Specifically, the interface layer includes ETH driver, CAN driver, LIN driver, SPI driver, Ethernet driver, IO driver, as well as ETH service, CAN service, LIN service, SPI service, IO service, and protocol stack. The service layer mainly provides bus services and signal services. The functions performed by the application layer include: display of AR-HUD, display of T-BOX, display of interior electronic rearview mirror, display of exterior electronic rearview mirror, body electronics, chassis, central gateway and intelligent power distribution.

[0113] It can be seen that compared with the existing distributed architecture, different suppliers have different software architectures, the scope of functional changes is large, the communication cost is high, the internal signals and services of each system are not shared, and functional expansion and integration are difficult. This application deeply decouples the software and hardware of each chip to make application transplantation easy to adapt; the middleware has rich components to meet all system functions; SOC and MCU have the same signal services, functional fusion signal calls are easier, and system integration has inherent advantages.

[0114] In one embodiment of the present application, the above-mentioned MCU may be an ASIL-D level MCU, and the SOC may be an SOC with a preset AI computing power processing interval, for example, the preset interval is [16, 24].

[0115] In combination with the cross-domain integration involved in this application, the advantages of this application in the following scenarios are explained.

[0116] Scenario 1: Perception Fusion Display Multiplexing:

[0117] The central processing unit can fuse and reuse the internal and external CMS cameras with the intelligent driving camera (ADAS camera), that is, by fusing and stitching the images taken by the internal CMS camera, the external CMS camera (including the CMS left camera and the CMS right camera) and the intelligent driving camera, a panoramic image of the entire surroundings of the vehicle can be obtained. In this way, for each camera system, the perception range of the camera system can be expanded, and the system safety and reliability can be improved.

[0118] Scenario 2: Perception fusion function expansion:

[0119] If both the internal CMS camera and the external CMS camera are connected to the SOC, the SOC can obtain the images taken by the CMS camera and the external CMS camera. In this way, before displaying the image taken by the internal CMS camera, the image taken by the internal CMS camera and the image taken by the external CMS camera can be fused and spliced ​​to form a panoramic rear view image, and then the panoramic rear view image is displayed on the display screens corresponding to the internal CMS camera and the external CMS camera respectively.

[0120] Scenario 3: Perception Enhancement Performance Optimization:

[0121] While the SOC uses images captured by the ADAS camera for intelligent driving, ADAS primarily scans the road ahead and has difficulty perceiving the rearward field of view. Therefore, when executing ADAS functions, the SOC can combine images captured by the external CMS camera to promptly identify vehicles and pedestrians behind the vehicle, improving the ADAS's perception accuracy and the accuracy of door opening warning detection.

[0122] Scenario 4: Perception fusion reduces sensors:

[0123] Since both the road preview camera and the ADSA camera scan the road ahead to achieve road preview and ADAS, the road preview camera and the ADSA camera can share one camera, and the images captured by the camera can be used for road preview and ADAS at the same time, thereby reducing the number of cameras.

[0124] Scenario 5: Braking system and ADAS integration:

[0125] When the SOC implements ADAS driving through the ADAS camera, if it decides that braking is needed, the SOC can send a braking signal to the MCU, and the MCU controls the braking system to brake. Since the braking signal is communicated within the central computing unit, the delay is relatively short, so that braking can be performed more efficiently.

[0126] Refer to Figure 7, which is a flow chart of a function execution method provided by an embodiment of the present application. The method uses the central computing unit described in any of the above embodiments. The method includes but is not limited to the following steps:

[0127] 701: Some or all of the multiple chips obtain data information of a first functional domain among multiple functional domains of the vehicle, wherein the first functional domain is any one functional domain among the multiple functional domains.

[0128] 702: Some or all of the multiple chips process the data information to execute the function of the first functional domain.

[0129] It should be noted that how some or all of the multiple chips obtain data information under the functional domain and how to process the data information can be referred to the contents of the above embodiments and will not be described in detail.

[0130] Referring to Figure 8 , Figure 8 is a schematic diagram of the structure of an electronic device provided in an embodiment of the present application. As shown in Figure 8 , electronic device 800 includes a transceiver 801, a processor 802, and a memory 803. These are connected via a bus 804. Memory 803 is used to store computer programs and data and can transmit data stored in memory 803 to processor 802.

[0131] The processor 802 is configured to read the computer program in the memory 803 and perform the following operations:

[0132] Acquiring data information of a first functional domain among multiple functional domains of the vehicle, wherein the first functional domain is any one functional domain among the multiple functional domains;

[0133] The data information is processed to execute the function of the first functional domain.

[0134] The functions of the processor 802 may refer to the functions of the aforementioned chips and will not be described again.

[0135] An embodiment of the present application also provides a computer-readable storage medium, which stores a computer program. The computer program is executed by a processor to implement part or all of the steps of any function execution method recorded in the above method embodiments.

[0136] An embodiment of the present application also provides a computer program product, which includes a non-transitory computer-readable storage medium storing a computer program, and the computer program is operable to enable a computer to execute part or all of the steps of any function execution method recorded in the above method embodiments.

[0137] It should be noted that for the aforementioned method embodiments, for the sake of simplicity, they are all expressed as a series of action combinations, but those skilled in the art should be aware that this application is not limited by the order of the actions described, because according to this application, certain steps can be performed in other orders or simultaneously. Secondly, those skilled in the art should also be aware that the embodiments described in this specification are all optional embodiments, and the actions and modules involved are not necessarily required by this application.

[0138] In the above embodiments, the description of each embodiment has its own focus. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0139] In the several embodiments provided in this application, it should be understood that the disclosed devices can be implemented in other ways. For example, the device embodiments described above are merely illustrative. For example, the division of the units is merely a logical function division. In actual implementation, there may be other division methods, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, and the indirect coupling or communication connection of devices or units can be electrical or other forms.

[0140] The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of these units may be selected to achieve the purpose of this embodiment according to actual needs.

[0141] In addition, the functional units in the various embodiments of the present application may be integrated into a single processing unit, or each unit may exist physically separately, or two or more units may be integrated into a single unit. The aforementioned integrated units may be implemented in the form of hardware or in the form of software program modules.

[0142] If the integrated unit is implemented in the form of a software program module and sold or used as an independent product, it can be stored in a computer-readable memory. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art, or all or part of the technical solution can be embodied in the form of a software product, which is stored in a memory and includes a number of instructions for enabling a computer device (which can be a personal computer, a server or a network device, etc.) to execute all or part of the steps of the method described in each embodiment of the present application. The aforementioned memory includes various media that can store program codes, such as a USB flash drive, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk or an optical disk.

[0143] Those skilled in the art will appreciate that all or part of the steps in the various methods of the above embodiments can be completed by instructing related hardware through a program. The program can be stored in a computer-readable memory, and the memory can include: a flash drive, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, etc.

[0144] The above is a detailed introduction to the embodiments of the present application. Specific examples are used herein to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method and core idea of ​​the present application. At the same time, for those skilled in the art, according to the idea of ​​the present application, there may be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims

1. A central computing unit, wherein, The central computing unit is applied to a vehicle, and the central computing unit includes multiple chips; Some or all of the multiple chips are used to obtain data information of a first functional domain among multiple functional domains of the vehicle, and process the data information to execute the functions of the first functional domain, where the first functional domain is any one of the multiple functional domains.

2. A function execution method, wherein, The method is applied to a central computing unit of a vehicle, and the central computing unit includes multiple chips; the method includes: Some or all of the multiple chips obtain data information of a first functional domain among multiple functional domains of the vehicle, and process the data information to execute the functions of the first functional domain, where the first functional domain is any one of the multiple functional domains.

3. The computing unit according to claim 1 or the method according to claim 2, wherein, The multiple functional domains are all functional domains of the vehicle.

4. The computing unit according to claim 1 or the method according to claim 2, wherein, The structures of the multiple chips are different.

5. The computing unit according to claim 1 or the method according to claim 2, wherein, The central computing unit communicates with other hardware on the vehicle through multiple types of buses.

6. The computing unit or method according to claim 4, wherein, The multiple types of buses include one or more of the following: Ethernet ETH bus, General-Purpose Input / Output GPIO bus, Local Interconnect Network LIN bus, and Controller Area Network CAN bus.

7. The computing unit or method according to claim 6, wherein, When the other hardware is a regional controller of the vehicle, the central computing unit communicates with the regional controller of the vehicle through an Ethernet ring network via the ETH bus; When the other hardware is an electronic control unit of the vehicle, the central computing unit communicates with the electronic control unit through the GPIO bus, the Local Interconnect Network LIN bus, or the Controller Area Network CAN bus.

8. The computing unit according to claim 1 or the method according to claim 2, wherein, Status detection is performed between the multiple chips through a preset interface, where the preset interface includes an Inter-Integrated Circuit I2C interface and / or an Input / Output IO interface.

9. The computing unit according to claim 1 or the method according to claim 2, wherein, The multiple chips include a Microcontroller Unit MCU, a System-on-Chip SOC, and a Field Programmable Gate Array FPGA.

10. The computing unit or method according to claim 9, wherein, The MCU and the SOC communicate with each other through an Ethernet ETH bus; The SOC and the FPGA communicate with each other through a Peripheral Component Interconnect Express PCIE bus; The MCU and the FPGA communicate with each other through a Serial Peripheral Interface SPI bus.

11. The computing unit according to claim 1 or the method according to claim 2, wherein, The multiple functional domains include at least one of the following: body electronics domain, central gateway domain, chassis domain, interaction display domain, driving assistance domain, and Telematics T-BOX domain.

12. The computing unit or method according to claim 11, wherein / which includes, The functions of the body electronics domain include at least one of the following: control of the lighting system, window system, air conditioning system, seat system, and anti-theft system; The functions of the central gateway domain include at least one of the following: communication via various types of buses, fault diagnosis, over-the-air (OTA) management, and network management; The functions of the chassis domain include at least one of the following: control of the braking system, steering system, suspension system, and vehicle control unit (VCU) system; The functions of the interaction display domain include at least one of the following: display of AR-HUD, pixel lights, interior electronic rearview mirror, exterior electronic rearview mirror, and night vision system; The functions of the driver assistance domain include at least one of the following: driving assistance and automatic parking; The functions of the T-BOX domain include at least one of the following: data collection, vehicle diagnosis, and scenario customization.

13. The computing unit or method according to claim 12, wherein, The functions of the body electronics domain, the central gateway domain, and the chassis domain are executed by the MCU; The functions of the interaction display domain are jointly executed by the SOC and the FPGA; The functions of the driver assistance domain and the T-BOX domain are executed by the SOC.

14. The computing unit or method according to claim 13, wherein, The MCU communicates with other hardware of the vehicle via various types of buses to execute the functions of the body electronics domain, the chassis domain, and the central gateway domain; The SOC and the FPGA communicate with each camera via a serializer / deserializer (SERDES) bus to obtain image data from each camera and process the image data to execute the functions of the driver assistance domain, the interaction display domain, and the T-BOX domain.

15. An electronic device, wherein / which comprises, Including: A processor and a memory, the processor is connected to the memory, the memory is used to store a computer program, and the processor is used to execute the computer program stored in the memory so that the electronic device executes the method according to any one of claims 2-14.

16. A computer-readable storage medium, wherein, The computer-readable storage medium stores a computer program, and the computer program is executed by a processor to implement the method according to any one of claims 2-14.

17. A vehicle, wherein, The vehicle includes the central computing unit according to any one of claims 1, 3-14.

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