Radio frequency front-end module having bias compensation, and radio frequency chip

Abstract

The present disclosure is applicable the technical field of radio frequency modules, and particularly relates to a radio frequency front-end module having bias compensation, and a radio frequency chip. The radio frequency front-end module having bias compensation proposed by the present disclosure comprises a signal input end, an input matching circuit, a time-varying circuit, a current mirror circuit, a power amplification circuit, an output matching circuit and a signal output end. A first end of the time-varying circuit is grounded. A second end of the time-varying circuit and a third end of the time-varying circuit are used to connect an enable signal. A fourth end of the time-varying circuit is connected to a first end of the current mirror circuit. A second end of the current mirror circuit is grounded. A third end of the current mirror circuit is used to connect the enable signal. A fifth end of the current mirror circuit is used to output a bias current to an input end of the power amplification circuit. The radio frequency front-end module proposed by the present disclosure can effectively reduce the implementation complexity of transmit power control, thereby reducing radiation and energy consumption, and prolonging the service life of the radio frequency front-end module.

Description

A radio frequency front-end module and radio frequency chip with bias compensation Technical Field

[0001] The utility model is applicable to the technical field of radio frequency modules, and in particular relates to a radio frequency front-end module and a radio frequency chip with bias compensation. Background Art

[0002] An existing TDD (Time Division Duplex) system RF front-end module, such as a Wi-Fi RF front-end module, consists of the following components: A power amplifier, which amplifies the RF signal output by the RF chip. A receiver circuit, which receives the signal and typically includes a low-noise amplifier (LNA). An RF switch, which switches between transmit and receive paths. A logic control component, which controls the operating status of other components.

[0003] In a TDD RF front-end, the RF amplifier is controlled by an enable signal. When the enable signal is asserted, the bias voltage is activated, outputting a bias voltage or current to the RF amplifier, thereby enabling the amplifier. During TDD system operation, the RF front-end circuitry is constantly alternating between on and off. Ideally, the enable, bias, and amplifier gain are synchronized. However, in practical circuits, due to factors such as device characteristics and switching times, there is a delay in the amplifier turning on when the enable signal reaches a high level, resulting in a slow rise in the amplified signal output. This can cause distortion in the leading edge of the transmitted signal.

[0004] Therefore, a new RF front-end module and RF chip with bias compensation are urgently needed to solve the above problems.

[0005] Utility Model Content

[0006] The utility model provides a radio frequency front-end module and a radio frequency chip with bias compensation, aiming to effectively reduce the implementation complexity of the transmission power control of the radio frequency front-end module, reduce radiation, reduce energy consumption, and increase the service life of the radio frequency front-end module.

[0007] In a first aspect, the present invention provides a radio frequency front-end module with bias compensation, the radio frequency front-end module comprising a signal input terminal, an input matching circuit, a power amplifier circuit, an output matching circuit, a signal output terminal, and a bias circuit for providing a bias current for the power amplifier circuit;

[0008] The signal input terminal is connected to the input terminal of the input matching circuit, the output terminal of the input matching circuit is connected to the first terminal of the power amplifier circuit, the second terminal of the power amplifier circuit is grounded, the third terminal of the power amplifier circuit is connected to the first terminal of the output matching circuit, the second terminal of the output matching circuit is used to connect to a first power supply voltage, and the third terminal of the output matching circuit is connected to the signal output terminal; the bias circuit includes a time-varying circuit and a current mirror circuit;

[0009] The first end of the time-varying circuit is grounded, the second end and the third end of the time-varying circuit are used to connect an enable signal, the fourth end of the time-varying circuit is connected to the first end of the current mirror circuit, and the time-varying circuit is used to provide an enable signal for the current mirror circuit; the second end of the current mirror circuit is grounded, the third end of the current mirror circuit is used to connect an enable signal, the fourth end of the current mirror circuit is used to connect a second power supply voltage, and the fifth end of the current mirror circuit is used to output a bias current to the first end of the power amplifier circuit.

[0010] Preferably, the time-varying circuit includes a first resistor, a second resistor, a first capacitor and a first transistor, the first end of the first capacitor serves as the first end of the time-varying circuit, the second end of the first capacitor is respectively connected to the first end of the first resistor and the base of the first transistor, the second end of the first resistor serves as the second end of the time-varying circuit, the emitter of the first transistor is connected to the first end of the second resistor, the collector of the first transistor serves as the fourth end of the time-varying circuit, and the second end of the second resistor serves as the third end of the time-varying circuit.

[0011] Preferably, the current mirror circuit includes a third resistor, a fourth resistor, a second transistor, a third transistor and a fourth transistor, the first end of the third resistor is connected to the collector of the second transistor, the first end of the third resistor serves as the first end of the current mirror circuit, the second end of the third resistor serves as the third end of the current mirror circuit, the emitter of the second transistor is respectively connected to the collector of the third transistor and the base of the third transistor, the base of the second transistor is respectively connected to the collector of the second transistor and the base of the fourth transistor, the emitter of the third transistor serves as the second end of the current mirror circuit, the collector of the fourth transistor serves as the fifth end of the current mirror circuit, the emitter of the fourth transistor is connected to the first end of the fourth resistor, and the second end of the fourth resistor serves as the fourth end of the current mirror circuit.

[0012] [Corrected 11.02.2025 according to Rule 91] Preferably, the input matching circuit includes a second capacitor, a first end of the second capacitor serves as the input end of the input matching circuit, and a second end of the second capacitor serves as the output end of the input matching circuit.

[0013] Preferably, the power amplifier circuit includes a fifth transistor, the base of the fifth transistor serves as the first end of the power amplifier circuit, the emitter of the fifth transistor serves as the second end of the power amplifier circuit, and the collector of the fifth transistor serves as the third end of the power amplifier circuit.

[0014] [Corrected 11.02.2025 according to Rule 91] Preferably, the output matching circuit includes a first inductor and a third capacitor, the first end of the first inductor serves as the first end of the output matching circuit, the second end of the first inductor serves as the second end of the output matching circuit, the first end of the third capacitor is connected to the first end of the first inductor, and the second end of the third capacitor serves as the third end of the output matching circuit.

[0015] In a second aspect, the present invention further provides a radio frequency chip, which includes a radio frequency front-end module with bias compensation as described in any one of the above embodiments.

[0016] Compared with the prior art, the RF front-end module with bias compensation proposed in the present invention includes a signal input terminal, an input matching circuit, a time-varying circuit, a current mirror circuit, a power amplifier circuit, an output matching circuit, and a signal output terminal. The signal input terminal is connected to the input terminal of the input matching circuit, the output terminal of the input matching circuit is connected to the first terminal of the power amplifier circuit, the second terminal of the power amplifier circuit is grounded, the third terminal of the power amplifier circuit is connected to the first terminal of the output matching circuit, the second terminal of the output matching circuit is used to connect to a first power supply voltage, and the third terminal of the output matching circuit is connected to the signal output terminal; the first terminal of the time-varying circuit is grounded, the second terminal of the time-varying circuit and the third terminal of the time-varying circuit are used to connect to an enable signal, the fourth terminal of the time-varying circuit is connected to the first terminal of the current mirror circuit, the second terminal of the current mirror circuit is grounded, the third terminal of the current mirror circuit is used to connect to an enable signal, the fourth terminal of the current mirror circuit is used to connect to a second power supply voltage, and the fifth terminal of the current mirror circuit is used to output a bias current to the input terminal of the power amplifier circuit. In this way, the RF front-end module proposed in the present invention can effectively reduce the implementation complexity of transmit power control, reduce radiation, reduce energy consumption, and improve the service life of the RF front-end module. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The present invention will be described in detail below with reference to the accompanying drawings. The above and other aspects of the present invention will become clearer and easier to understand through the detailed description made with reference to the following drawings.

[0018] FIG1 is a schematic diagram of the circuit structure of a radio frequency front-end module with bias compensation provided by an embodiment of the present utility model;

[0019] FIG2 is a schematic diagram of the circuit structure of a radio frequency front-end module with bias compensation provided in an embodiment of the present invention.

[0020] In the figure, 100, RF front-end module with bias compensation, 1, signal input end, 2, input matching circuit, 3, power amplifier circuit, 4, output matching circuit, 5, time-varying circuit, 6, current mirror circuit, 7, signal output end. DETAILED DESCRIPTION

[0021] In order to make the purpose, technical solutions and advantages of the present invention more clearly understood, the present invention is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0022] Example 1

[0023] Please refer to Figures 1-2. The present invention provides a radio frequency front-end module 100 with bias compensation. The radio frequency front-end module 100 includes a signal input terminal 1, an input matching circuit 2, a power amplifier circuit 3, an output matching circuit 4, a signal output terminal 7, and a bias circuit that provides a bias current for the power amplifier circuit 3. The bias circuit includes a time-varying circuit 5 and a current mirror circuit 6.

[0024] The signal input terminal 1 is connected to the input terminal of the input matching circuit 2, the output terminal of the input matching circuit 2 is connected to the first terminal of the power amplifier circuit 3, the second terminal of the power amplifier circuit 3 is grounded, the third terminal of the power amplifier circuit 3 is connected to the first terminal of the output matching circuit 4, the second terminal of the output matching circuit 4 is used to connect to the first power supply voltage (power supply 1), and the third terminal of the output matching circuit 4 is connected to the signal output terminal 7;

[0025] The first end of the time-varying circuit 5 is grounded, the second end and the third end of the time-varying circuit 5 are used to connect an enable signal, the fourth end of the time-varying circuit 5 is connected to the first end of the current mirror circuit 6, the time-varying circuit 5 is used to provide an enable signal for the current mirror circuit 6, the second end of the current mirror circuit 6 is grounded, the third end of the current mirror circuit 6 is used to connect the enable signal, the fourth end of the current mirror circuit 6 is used to connect to the second power supply voltage (power supply 2), and the fifth end of the current mirror circuit 6 is used to output a bias current IBIAS to the first end of the power amplifier circuit 3.

[0026] In an embodiment of the present utility model, the time-varying circuit 5 includes a first resistor R1, a second resistor R2, a first capacitor C1 and a first transistor Q1. The first end of the first capacitor C1 serves as the first end of the time-varying circuit 5. The second end of the first capacitor C1 is respectively connected to the first end of the first resistor R1 and the base of the first transistor Q1. The second end of the first resistor R1 serves as the second end of the time-varying circuit 5. The emitter of the first transistor Q1 is connected to the first end of the second resistor R2. The collector of the first transistor Q1 serves as the fourth end of the time-varying circuit 5. The second end of the second resistor R2 serves as the third end of the time-varying circuit 5.

[0027] In an embodiment of the present utility model, the current mirror circuit 6 includes a third resistor R3, a fourth resistor R4, a second transistor Q2, a third transistor Q3, and a fourth transistor Q4. The first end of the third resistor R3 is connected to the collector of the second transistor Q2, the first end of the third resistor R3 serves as the first end of the current mirror circuit 6, the second end of the third resistor R3 serves as the third end of the current mirror circuit 6, the emitter of the second transistor Q2 is connected to the collector of the third transistor Q3 and the base of the third transistor Q3, respectively, the base of the second transistor Q2 is connected to the collector of the second transistor Q2 and the base of the fourth transistor Q4, the emitter of the third transistor Q3 serves as the second end of the current mirror circuit 6, the collector of the fourth transistor Q4 serves as the fifth end of the current mirror circuit 6, the emitter of the fourth transistor Q4 is connected to the first end of the fourth resistor R4, and the second end of the fourth resistor R4 serves as the fourth end of the current mirror circuit 6.

[0028] [Corrected 11.02.2025 according to Rule 91] In an embodiment of the present utility model, the input matching circuit 2 includes a second capacitor, the first end of the second capacitor C2 serves as the input end of the input matching circuit 2, and the second end of the second capacitor C2 serves as the output end of the input matching circuit 2.

[0029] In an embodiment of the present utility model, the power amplifier circuit 3 includes a fifth transistor Q5, the base of the fifth transistor Q5 serves as the first end of the power amplifier circuit 3, the emitter of the fifth transistor Q5 serves as the second end of the power amplifier circuit 3, and the collector of the fifth transistor Q5 serves as the third end of the power amplifier circuit 3.

[0030] [Corrected on 11.02.2025 according to Rule 91] In an embodiment of the present utility model, the output matching circuit 4 includes a first inductor L1 and a third capacitor C3, the first end of the first inductor L1 serves as the first end of the output matching circuit 4, the second end of the first inductor L1 serves as the second end of the output matching circuit 4, the first end of the third capacitor C3 is connected to the first end of the first inductor L1, and the second end of the third capacitor C3 serves as the third end of the output matching circuit 4.

[0031] Specifically, the first resistor R1, the first capacitor C1, the first transistor Q1, and the second resistor R2 form a time-dependent time-varying circuit 5. The second transistor Q2, the third transistor Q3, and the fourth transistor Q4 form a current mirror circuit 6, which provides a base bias current IBIAS for the fifth transistor Q5. The first inductor L1 provides a collector bias current for the fifth transistor Q5 and is also used to isolate the RF signal. The second capacitor C2 and the third capacitor C3 are used to input and output the RF signal, respectively.

[0032] [Corrected 11.02.2025 according to Rule 91] As shown in Figure 2, when the enable signal of the RF front-end module with bias compensation proposed by the present invention becomes high, since the voltage of the first capacitor C1 cannot change suddenly, the base voltage (i.e., the b-pole) of the first transistor Q1 has a slow rise process, and the second resistor R2 generates a current in a short time, and then the current drops to 0. The current I_Q2-c flowing through the collector (i.e., the c-pole) of the second transistor Q2 is approximately the sum of the current I_R2 of the second resistor R2 and the current I_R3 of the third resistor R3, so a spike is generated at the head of I_Q2-c. Due to the current mirror principle, the bias current IBIAS is proportional to I_Q2-c, so a spike is generated at the head of the bias current IBIAS. Under the action of the peak of the bias current IBIAS, the turn-on time of the fifth transistor Q5 is shortened, and the transient response is optimized.

[0033] Compared with the prior art, the RF front-end module with bias compensation proposed in the present invention includes a signal input terminal, an input matching circuit, a time-varying circuit, a current mirror circuit, a power amplifier circuit, an output matching circuit, and a signal output terminal. The signal input terminal is connected to the input terminal of the input matching circuit, the output terminal of the input matching circuit is connected to the first terminal of the power amplifier circuit, the second terminal of the power amplifier circuit is grounded, the third terminal of the power amplifier circuit is connected to the first terminal of the output matching circuit, the second terminal of the output matching circuit is used to connect to a first power supply voltage, and the third terminal of the output matching circuit is connected to the signal output terminal; the first terminal of the time-varying circuit is grounded, the second terminal of the time-varying circuit and the third terminal of the time-varying circuit are used to connect to an enable signal, the fourth terminal of the time-varying circuit is connected to the first terminal of the current mirror circuit, the second terminal of the current mirror circuit is grounded, the third terminal of the current mirror circuit is used to connect to an enable signal, the fourth terminal of the current mirror circuit is used to connect to a second power supply voltage, and the fifth terminal of the current mirror circuit is used to output a bias current to the input terminal of the power amplifier circuit. In this way, the RF front-end module proposed in the present invention can effectively reduce the implementation complexity of transmit power control, reduce radiation, reduce energy consumption, and improve the service life of the RF front-end module.

[0034] Example 2

[0035] An embodiment of the present invention further provides a radio frequency chip, which includes the radio frequency front-end module 100 with bias compensation as described in the above embodiment, and can achieve the same technical effect. Please refer to the description in the above embodiment and will not be repeated here.

[0036] It should be noted that, in this document, the terms "comprises," "includes," or any other variations thereof are intended to encompass non-exclusive inclusion, such that a process, method, article, or apparatus comprising a series of elements includes not only those elements but also other elements not explicitly listed, or elements inherent to such process, method, article, or apparatus. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of other identical elements in the process, method, article, or apparatus comprising the element.

[0037] The embodiments of the present invention are described above in conjunction with the accompanying drawings. What is disclosed is only a preferred embodiment of the present invention. However, the present invention is not limited to the above-mentioned specific implementation methods. The above-mentioned specific implementation methods are merely illustrative and not restrictive. Under the guidance of the present invention, ordinary technicians in this field can also make many forms and equivalent changes without departing from the scope of protection of the purpose of the present invention and the claims, which are all within the protection of the present invention.

Claims

1. A radio frequency front-end module with bias compensation, characterized in that, The radio frequency front-end module includes a signal input terminal, an input matching circuit, a power amplifier circuit, an output matching circuit, a signal output terminal, and a bias circuit for providing a bias current to the power amplifier circuit; The signal input terminal is connected to the input end of the input matching circuit. The output end of the input matching circuit is connected to the first end of the power amplifier circuit. The second end of the power amplifier circuit is grounded. The third end of the power amplifier circuit is connected to the first end of the output matching circuit. The second end of the output matching circuit is used to connect to a first power supply voltage. The third end of the output matching circuit is connected to the signal output terminal. It is characterized in that the bias circuit includes a time-varying circuit and a current mirror circuit: The first end of the time-varying circuit is grounded. The second end and the third end of the time-varying circuit are used to connect an enable signal. The fourth end of the time-varying circuit is connected to the first end of the current mirror circuit. The time-varying circuit is used to provide an enable signal to the current mirror circuit. The second end of the current mirror circuit is grounded. The third end of the current mirror circuit is used to connect an enable signal. The fourth end of the current mirror circuit is used to connect to a second power supply voltage. The fifth end of the current mirror circuit is used to output a bias current to the first end of the power amplifier circuit.

2. The radio frequency front-end module with bias compensation according to claim 1, characterized in that The time-varying circuit includes a first resistor, a second resistor, a first capacitor, and a first triode. The first end of the first capacitor serves as the first end of the time-varying circuit. The second end of the first capacitor is respectively connected to the first end of the first resistor and the base of the first triode. The second end of the first resistor serves as the second end of the time-varying circuit. The emitter of the first triode is connected to the first end of the second resistor. The collector of the first triode serves as the fourth end of the time-varying circuit. The second end of the second resistor serves as the third end of the time-varying circuit.

3. The radio frequency front-end module with offset compensation according to claim 1, characterized in that, The current mirror circuit includes a third resistor, a fourth resistor, a second triode, a third triode, and a fourth triode. The first end of the third resistor is connected to the collector of the second triode. The first end of the third resistor serves as the first end of the current mirror circuit. The second end of the third resistor serves as the third end of the current mirror circuit. The emitter of the second triode is respectively connected to the collector and the base of the third triode. The base of the second triode is respectively connected to the collector of the second triode and the base of the fourth triode. The emitter of the third triode serves as the second end of the current mirror circuit. The collector of the fourth triode serves as the fifth end of the current mirror circuit. The emitter of the fourth triode is connected to the first end of the fourth resistor. The second end of the fourth resistor serves as the fourth end of the current mirror circuit.

4. [Corrected according to Rule 91 on 11.02.2025] The radio frequency front-end module with bias compensation according to claim 1, characterized in that, The input matching circuit includes a second capacitor. The first end of the second capacitor serves as the input end of the input matching circuit. The second end of the second capacitor serves as the output end of the input matching circuit.

5. The RF front-end module with offset compensation according to claim 1, characterized in that, The power amplifier circuit includes a fifth triode, the base of the fifth triode serves as the first end of the power amplifier circuit, the emitter of the fifth triode serves as the second end of the power amplifier circuit, and the collector of the fifth triode serves as the third end of the power amplifier circuit.

6. [Corrected according to Rule 91 on 11.02.2025] The radio frequency front-end module with bias compensation according to claim 1, characterized in that, The output matching circuit includes a first inductor and a third capacitor. The first end of the first inductor serves as the first end of the output matching circuit, the second end of the first inductor serves as the second end of the output matching circuit. The first end of the third capacitor is connected to the first end of the first inductor, and the second end of the third capacitor serves as the third end of the output matching circuit.

7. A radio frequency chip, characterized in that, The RF chip includes the RF front-end module with bias compensation according to any one of claims 1-6.

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