Encoding method, decoding method, and apparatus

Abstract

The present application discloses an encoding method, a decoding method, and an apparatus. The encoding method comprises: on the basis of a first MCS, a first SNR, a first modulation order, or a first encoding rate, determining a bit rate of a component code corresponding to at least one stage in multi-stage encoding of information bits; on the basis of the bit rates of the component codes corresponding to respective stages in the multi-stage encoding, performing the multi-stage encoding on the information bits to obtain encoded bits; and outputting the encoded bits. Because the first MCS, the first SNR, the first modulation order, or the first encoding rate is a parameter related to a channel condition, in embodiments of the present application, the bit rates of the respective stages in the multi-stage encoding are dynamically configured in consideration of the channel condition, thereby reducing decoding complexity of the multi-stage encoding and also improving encoding / decoding performance of the multi-stage encoding.

Description

Coding method, decoding method and device

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to the Chinese patent application filed with the State Intellectual Property Office of the People's Republic of China on February 8, 2024, with application number 202410177288.3 and application name "A Coding Method, Decoding Method and Device", the entire contents of which are incorporated by reference into this application. Technical Field

[0003] The present application relates to the field of wireless communications, and in particular to an encoding method, a decoding method, and a device. Background Art

[0004] Channel coding and decoding (abbreviated as codec, encompassing both encoding and decoding) is one of the most core technologies in wireless communications. For example, in third-generation (3G) and fourth-generation (4G) communication systems, the 3rd Generation Partnership Project (3GPP) standard uses turbo codes as the codec technology; in fifth-generation (5G) communication systems, the 3GPP standard uses low-density parity check (LDPC) codes and polar codes as the codec technologies.

[0005] With the continuous evolution of communication systems, the sixth generation (6G) and other future communication systems have placed higher requirements on peak throughput and area efficiency of codecs, while also requiring further reductions in decoder power consumption. 5G's LDPC and polar codes cannot meet these extremely high requirements, and multi-stage coding is a candidate technology for achieving high-throughput, low-power codecs. The main idea of ​​multi-stage coding is to decompose the encoding process of a long code into multiple encoding processes of shorter codes during encoding, and decompose the decoding of a long code into multiple decoding processes of shorter codes during decoding.

[0006] However, current research has not yet involved the division of code length or code rate for each stage in multi-stage coding, and a coding and decoding solution is urgently needed. Summary of the Invention

[0007] The present application provides an encoding method, a decoding method and an apparatus for dividing the code length or code rate of each stage in multi-stage encoding, so as to balance reducing the decoding complexity of multi-stage encoding and improving the encoding and decoding performance of multi-stage encoding.

[0008] In a first aspect, a coding method is provided, the method comprising: determining the code rate of a component code corresponding to at least one stage in multi-stage coding of information bits according to a first MCS or a first SNR or a first modulation order or a first coding rate, wherein the first MCS is the MCS used for the information bits, the first SNR is the SNR of the channel used to carry the information bits, the first modulation order is the modulation order used for the information bits, and the first coding rate is the coding rate used for the information bits; performing multi-stage coding on the information bits according to the code rates of the component codes corresponding to each stage in the multi-stage coding to obtain coded bits; and outputting the coded bits.

[0009] The embodiment of the present application determines the code rate of the component code corresponding to at least one stage in multi-stage coding based on the first MCS or the first SNR or the first modulation order or the first coding rate used for the information bits. Since the first MCS or the first SNR or the first modulation order or the first coding rate are parameters related to the channel conditions, the embodiment of the present application realizes the dynamic setting of the code rate of each stage in the multi-stage coding according to the channel conditions, which helps to balance reducing the decoding complexity of the multi-stage coding and improving the encoding and decoding performance of the multi-stage coding.

[0010] In one possible design, the code rate of the component code corresponding to at least one stage in multi-stage coding is determined based on the first MCS or the first SNR or the first modulation order or the first coding rate, including: determining the code rate of the component code corresponding to the first stage in multi-stage coding based on the first MCS or the first SNR or the first modulation order or the first coding rate, the first stage being the first coding stage in the multi-stage coding.

[0011] Because multi-stage coding decodes the component codes of the first stage first, followed by the component codes of the other stages, if the first stage component code is decoded correctly, there is no need to decode the component codes of the other stages. Therefore, based on this design, the code rate division of the component codes of the first stage is prioritized, which can fully utilize the decoding performance of the component codes of the first stage and reduce unnecessary decoding overhead, thereby achieving the effect of improving decoding performance and reducing decoding complexity.

[0012] In one possible design, determining the code rate of the component code corresponding to the first stage in multi-stage coding based on the first MCS or the first SNR or the first modulation order or the first coding rate may include: determining the code rate of the component code corresponding to the first stage corresponding to the first MCS based on the correspondence between the MCS and the code rate of the component code corresponding to the first stage; or, determining the code rate of the component code corresponding to the first stage corresponding to the first SNR based on the correspondence between the SNR and the code rate of the component code corresponding to the first stage; or, determining the code rate of the component code corresponding to the first stage corresponding to the first modulation order based on the correspondence between the modulation order and the code rate of the component code corresponding to the first stage; or, determining the code rate of the component code corresponding to the first stage corresponding to the first coding rate based on the correspondence between the coding rate and the code rate of the component code corresponding to the first stage.

[0013] In this way, the bit rate of the component code corresponding to the first stage can be determined according to the corresponding relationship, which helps to improve the encoding speed.

[0014] In one possible design, the bit rate of the component codes corresponding to the first stage can be positively correlated with the MCS, SNR, modulation order, or coding rate. This allows the bit rate of the component codes corresponding to the first stage to be increased when channel conditions are good, and reduced when channel conditions are poor. This ensures decoding performance of the component codes in the first stage while also reducing decoding complexity in the first stage.

[0015] The following takes multi-stage encoding as an example of two-stage encoding (two-stage encoding includes the first stage and the second stage):

[0016] In one possible design, the code rate of the component code corresponding to at least one stage in the multi-stage coding is determined based on the first MCS or the first SNR or the first modulation order or the first coding rate, and also includes: determining the code rate of the component code corresponding to the second stage based on the first MCS or the first SNR or the first modulation order or the first coding rate.

[0017] In this design, the bit rate of the component code corresponding to the first stage and the bit rate of the component code corresponding to the second stage are both determined based on the first MCS or the first SNR or the first modulation order or the first coding rate, which helps to keep the overall bit rate of the multi-stage coding stable and meet system requirements.

[0018] In one possible design, determining the code rate of the component code corresponding to the second stage in the two-stage coding based on the first MCS or the first SNR or the first modulation order or the first coding rate may include: determining the code rate of the component code corresponding to the second stage corresponding to the first MCS based on the correspondence between the MCS and the code rate of the component code corresponding to the second stage; or, determining the code rate of the component code corresponding to the second stage corresponding to the first SNR based on the correspondence between the SNR and the code rate of the component code corresponding to the second stage; or, determining the code rate of the component code corresponding to the second stage corresponding to the first modulation order based on the correspondence between the modulation order and the code rate of the component code corresponding to the second stage; or, determining the code rate of the component code corresponding to the second stage corresponding to the first coding rate based on the correspondence between the coding rate and the code rate of the component code corresponding to the second stage.

[0019] In this way, the bit rate of the component code corresponding to the second stage can be determined according to the corresponding relationship, which helps to improve the encoding speed.

[0020] In one possible design, the code rate of the component code corresponding to the second stage is negatively correlated with the MCS or SNR or modulation order or coding rate.

[0021] In this way, the bit rate of the component code corresponding to the first stage and the bit rate of the component code corresponding to the second stage are positively correlated and negatively correlated with the MCS or SNR or modulation order or coding rate, respectively, which helps to keep the overall bit rate of multi-stage coding stable and meet system requirements.

[0022] In one possible design, the method further includes: determining the bit rate of the component code corresponding to the second stage based on the bit rate of the component code corresponding to the first stage and the total bit rate of the two-stage encoding.

[0023] In this way, it can be ensured that the bit rate of the component code corresponding to the first stage and the bit rate of the component code corresponding to the second stage can match the total bit rate requirement of the two-stage encoding.

[0024] In one possible design, multi-stage encoding is performed on the information bits according to the code rate of the component codes corresponding to each stage in the multi-stage encoding, including: multi-stage encoding is performed on the information bits according to the code rate of the component codes corresponding to each stage in the multi-stage encoding, the number of bits before encoding, and the number of bits after encoding.

[0025] In this way, the reliability of the coding scheme can be improved.

[0026] In one possible design, the number of bits after encoding of the component code corresponding to each stage in the multi-stage encoding can be determined based on the code rate and the number of bits before encoding of the component code corresponding to each stage.

[0027] This design method is to realize the division of the post-encoding code length (i.e., the number of bits after encoding) of the component codes corresponding to each stage in multi-stage encoding when the code rate and the number of bits before encoding (i.e., the code length before encoding) of the component codes corresponding to each stage in multi-stage encoding are determined. Therefore, it helps to take into account both reducing the complexity of multi-stage encoding and decoding and improving the encoding and decoding performance of multi-stage encoding.

[0028] In one possible design, the number of pre-coding bits of the component codes corresponding to each stage in the multi-stage coding is determined based on the total number of pre-coding bits of the multi-stage coding and a first proportional coefficient; wherein the first proportional coefficient is the ratio of the number of pre-coding bits of the component codes corresponding to the first stage in the multi-stage coding to the total number of pre-coding bits.

[0029] In one possible design, a first proportional coefficient corresponding to the first MCS is determined based on the correspondence between the MCS and the proportional coefficient; or, a first proportional coefficient corresponding to the first SNR is determined based on the correspondence between the SNR and the proportional coefficient; or, a first proportional coefficient corresponding to the first modulation order is determined based on the correspondence between the modulation order and the proportional coefficient; or, a first proportional coefficient corresponding to the first coding rate is determined based on the correspondence between the coding rate and the proportional coefficient.

[0030] In one possible design, the scaling factor is positively correlated with the MCS or SNR or modulation stage or coding rate.

[0031] In this way, when the channel conditions are good, the number of bits before encoding corresponding to the component codes of the first stage can be increased, and when the channel conditions are poor, the number of bits before encoding corresponding to the component codes of the first stage can be reduced.

[0032] In one possible design, the number of bits before encoding of the component code corresponding to each stage in the multi-stage encoding can be determined based on the code rate and the number of bits after encoding of the component code corresponding to each stage.

[0033] This design method is to realize the division of the number of bits before encoding (i.e., the code length before encoding) of the component codes corresponding to each stage in multi-stage encoding when the code rate and the code length after encoding (i.e., the number of bits after encoding) of the component codes corresponding to each stage in multi-stage encoding are determined. Therefore, it helps to take into account both reducing the decoding complexity of multi-stage encoding and improving the encoding and decoding performance of multi-stage encoding.

[0034] In one possible design, the method also includes: the total number of bits after encoding of the multi-stage encoding and a second proportional coefficient, determining the number of bits after encoding of the component code corresponding to each stage in the multi-stage encoding; wherein the second proportional coefficient is the ratio of the number of bits after encoding of the component code corresponding to the first stage in the multi-stage encoding to the total number of bits after encoding.

[0035] In one possible design, the method further includes: determining a second proportional coefficient corresponding to the first MCS based on a correspondence between the MCS and the proportional coefficient; or, determining a second proportional coefficient corresponding to the first SNR based on a correspondence between the SNR and the proportional coefficient; or, determining a second proportional coefficient corresponding to the first modulation order based on a correspondence between the modulation order and the proportional coefficient; or, determining a second proportional coefficient corresponding to the first coding rate based on a correspondence between the coding rate and the proportional coefficient.

[0036] In one possible design, the scaling factor is positively correlated with the MCS or SNR or modulation stage or coding rate.

[0037] In this way, when the channel conditions are good, the number of encoded bits corresponding to the component codes of the first stage can be increased, and when the channel conditions are poor, the number of encoded bits corresponding to the component codes of the first stage can be reduced.

[0038] In one possible design, the method further includes: performing rate matching on the component codes corresponding to the first stage in the multi-stage encoding according to the first target code length; and performing rate matching on the component codes corresponding to the second stage in the multi-stage encoding according to the second target code length.

[0039] This design approach can improve the flexibility of rate matching through a staged rate matching approach, and can also disperse the puncturing or repetition in the rate matching process to various stages in multi-stage encoding, which helps to improve the encoding and decoding performance of multi-stage encoding.

[0040] In one possible design, multi-stage encoding is performed on information bits according to the code rates of the component codes corresponding to each stage in the multi-stage encoding, including: if the number of information bits cannot be divided by the total number of bits before encoding in the multi-stage encoding, at least one of repetition and zero padding is performed on the information bits so that the processed information bits can be divided by the total number of bits before encoding in the multi-stage encoding; and multi-stage encoding is performed on the processed information bits according to the code rates of the component codes corresponding to each stage in the multi-stage encoding.

[0041] In this way, the processed information bits can be applicable to multi-stage coding, thereby improving the applicability of multi-stage coding.

[0042] In one possible design, the multi-stage encoding is a product code or a concatenated code. Of course, this is only an example and is not limited to this.

[0043] In a second aspect, a coding method is provided, which includes: determining the number of bits after coding of the component code corresponding to each stage according to the code rate of the component code corresponding to each stage in multi-stage coding of the information bits and the number of bits before coding, or determining the number of bits before coding of the component code corresponding to each stage in multi-stage coding of the information bits according to the code rate of the component code corresponding to each stage in multi-stage coding of the information bits and the number of bits after coding; performing multi-stage coding on the information bits according to the code rate, the number of bits before coding and the number of bits after coding of the component codes corresponding to each stage in the multi-stage coding to obtain coded bits; and outputting the coded bits.

[0044] In the embodiment of the present application, when the code rate of the component code corresponding to each stage in the multi-stage encoding is determined, the code length of each stage in the multi-stage encoding can be divided by adjusting the number of bits before or after encoding of the component code corresponding to each stage in the multi-stage encoding. This helps to balance reducing the decoding complexity of the multi-stage encoding and improving the encoding and decoding performance of the multi-stage encoding.

[0045] In one possible design, the number of pre-coding bits of the component codes corresponding to each stage in the multi-stage coding is determined based on the total number of pre-coding bits of the multi-stage coding and a first proportional coefficient; wherein the first proportional coefficient is the ratio of the number of pre-coding bits of the component codes corresponding to the first stage in the multi-stage coding to the total number of pre-coding bits.

[0046] In one possible design, a first proportional coefficient corresponding to the first MCS is determined based on the correspondence between the MCS and the proportional coefficient; or, a first proportional coefficient corresponding to the first SNR is determined based on the correspondence between the SNR and the proportional coefficient; or, a first proportional coefficient corresponding to the first modulation order is determined based on the correspondence between the modulation order and the proportional coefficient; or, a first proportional coefficient corresponding to the first coding rate is determined based on the correspondence between the coding rate and the proportional coefficient.

[0047] In one possible design, the scaling factor is positively correlated with the MCS or SNR or modulation stage or coding rate.

[0048] In this way, when the channel conditions are good, the number of bits before encoding corresponding to the component codes of the first stage can be increased, and when the channel conditions are poor, the number of bits before encoding corresponding to the component codes of the first stage can be reduced.

[0049] In one possible design, the total number of bits after encoding of the multi-stage encoding and the second proportional coefficient determine the number of bits after encoding of the component code corresponding to each stage in the multi-stage encoding; wherein the second proportional coefficient is the ratio of the number of bits after encoding of the component code corresponding to the first stage in the multi-stage encoding to the total number of bits after encoding.

[0050] In one possible design, the method further includes: determining a second proportional coefficient corresponding to the first MCS based on a correspondence between the MCS and the proportional coefficient; or, determining a second proportional coefficient corresponding to the first SNR based on a correspondence between the SNR and the proportional coefficient; or, determining a second proportional coefficient corresponding to the first modulation order based on a correspondence between the modulation order and the proportional coefficient; or, determining a second proportional coefficient corresponding to the first coding rate based on a correspondence between the coding rate and the proportional coefficient.

[0051] In one possible design, the scaling factor is positively correlated with the MCS or SNR or modulation stage or coding rate.

[0052] In this way, when the channel conditions are good, the number of encoded bits corresponding to the component codes of the second stage can be increased, and when the channel conditions are poor, the number of encoded bits corresponding to the component codes of the first stage can be reduced.

[0053] In a third aspect, a decoding method is provided, the method comprising: obtaining coded bits, wherein the coded bits are the coded bits described in the first aspect or any possible design of the first aspect or the second aspect or any possible design of the second aspect; performing multi-stage decoding on the coded bits to obtain information bits; and outputting the information bits.

[0054] In a fourth aspect, a decoding method is provided, the method comprising: obtaining coded bits; determining the code rate of the component code corresponding to at least one stage in multi-stage decoding of the coded bits based on a first MCS or a first SNR or a first modulation order or a first coding rate, wherein the first MCS is the MCS used for the coded bit information bit, the first SNR is the SNR of the channel used to carry the coded bits, the first modulation order is the modulation order used for the coded bits, and the first coding rate is the coding rate used for the coded bits; performing multi-stage encoding on the coded bits according to the code rate of the component code corresponding to each stage in the multi-stage encoding to obtain information bits.

[0055] In a fifth aspect, a communication device is provided, which includes a module or unit or technical means for executing the method described in the first aspect or any possible design of the first aspect.

[0056] Exemplarily, the device may include:

[0057] a processing module, configured to determine, based on a first MCS or a first SNR or a first modulation order or a first coding rate, a code rate of a component code corresponding to at least one stage in multi-stage encoding of information bits, wherein the first MCS is the MCS used for the information bits, the first SNR is the SNR of a channel used to carry the information bits, the first modulation order is the modulation order used for the information bits, and the first coding rate is the coding rate used for the information bits; and perform multi-stage encoding on the information bits according to the code rates of the component codes corresponding to each stage in the multi-stage encoding to obtain coded bits;

[0058] Input-output module, used to output coded bits.

[0059] In a sixth aspect, a communication device is provided, which includes a module, unit or technical means for executing the method described in the second aspect or any possible design of the second aspect.

[0060] Exemplarily, the device may include:

[0061] a processing module configured to determine the number of bits after encoding of the component code corresponding to each stage according to the code rate of the component code corresponding to each stage and the number of bits before encoding in the multi-stage encoding of the information bits, or to determine the number of bits before encoding of the component code corresponding to each stage according to the code rate of the component code corresponding to each stage in the multi-stage encoding of the information bits; and to perform multi-stage encoding on the information bits according to the code rate, the number of bits before encoding, and the number of bits after encoding of the component code corresponding to each stage in the multi-stage encoding to obtain encoded bits;

[0062] Input-output module, used to output coded bits.

[0063] In a seventh aspect, a communication device is provided, which includes a module, unit or technical means for executing the method described in the third aspect or any possible design of the third aspect.

[0064] Exemplarily, the device may include:

[0065] An input / output module, configured to obtain coded bits; wherein the coded bits are the coded bits described in the first aspect or any possible design of the first aspect or the second aspect or any possible design of the second aspect;

[0066] The processing module is used to perform multi-stage decoding on the coded bits to obtain information bits.

[0067] In an eighth aspect, a communication device is provided, which includes a module, unit or technical means for executing the method described in the fourth aspect or any possible design of the fourth aspect.

[0068] Exemplarily, the device may include:

[0069] Input and output modules for obtaining coded bits;

[0070] A processing module is used to determine the code rate of the component code corresponding to at least one stage in multi-stage decoding of the coded bits based on a first MCS or a first SNR or a first modulation order or a first coding rate, wherein the first MCS is the MCS used for the coded bit information bit, the first SNR is the SNR of the channel used to carry the coded bits, the first modulation order is the modulation order used for the coded bits, and the first coding rate is the coding rate used for the coded bits; and the coded bits are multi-stage encoded according to the code rates of the component codes corresponding to each stage in the multi-stage encoding to obtain information bits.

[0071] In the ninth aspect, a communication device is provided, comprising a processor and a memory; wherein the processor and the memory are coupled, the memory is used to store computer-executable instructions, and the processor is used to execute the computer-executable instructions stored in the memory, so that the communication device performs the method described in the first aspect or any possible design of the first aspect or the second aspect or any possible design of the second aspect or the third aspect or any possible design of the third aspect or the fourth aspect or any possible design of the fourth aspect.

[0072] In the tenth aspect, a chip is provided, comprising a logic circuit and an input-output interface; wherein the input-output interface is used to receive signals from other devices outside the chip and transmit them to the logic circuit or send signals from the logic circuit to other devices outside the chip, and the logic circuit is used to implement the method described in the first aspect or any possible design of the first aspect or the second aspect or any possible design of the second aspect or the third aspect or any possible design of the third aspect or the fourth aspect or any possible design of the fourth aspect.

[0073] In the eleventh aspect, a computer-readable storage medium is provided, in which a computer program or instruction is stored. When the computer program or instruction is executed by a communication device, the method described in the first aspect or any possible design of the first aspect or the second aspect or any possible design of the second aspect or the third aspect or any possible design of the third aspect or the fourth aspect or any possible design of the fourth aspect is implemented.

[0074] In the twelfth aspect, a computer program product is provided, which, when run on a computer, enables the method described in the first aspect or any possible design of the first aspect or the second aspect or any possible design of the second aspect or the third aspect or any possible design of the third aspect or the fourth aspect or any possible design of the fourth aspect to be executed.

[0075] In the thirteenth aspect, a communication system is provided, comprising a first communication device and a second communication device, wherein the first communication device is used to execute the method described in the first aspect or any possible design of the first aspect or the second aspect or any possible design of the second aspect, and the second communication device is used to execute the method described in the third aspect or any possible design of the third aspect or the fourth aspect or any possible design of the fourth aspect.

[0076] For the beneficial effects of the third to thirteenth aspects mentioned above, please refer to the beneficial effects of the corresponding designs in the first to second aspects. BRIEF DESCRIPTION OF THE DRAWINGS

[0077] FIG1 is a schematic diagram of a product code;

[0078] FIG2 is a schematic diagram of a concatenated code;

[0079] FIG3 is a network architecture diagram of a communication system applicable to an embodiment of the present application;

[0080] FIG4 is a flowchart of an encoding method provided in an embodiment of the present application;

[0081] FIG5 is an example diagram of an encoding process provided in an embodiment of the present application;

[0082] FIG6 is a flowchart of a decoding method provided in an embodiment of the present application;

[0083] FIG7 is a schematic structural diagram of a communication device provided in an embodiment of the present application;

[0084] FIG8 is a schematic structural diagram of a communication device provided in an embodiment of the present application;

[0085] FIG9 is a schematic diagram of the structure of a chip provided in an embodiment of the present application. DETAILED DESCRIPTION

[0086] To facilitate understanding of the technical solutions provided in the embodiments of the present application, some of the terms mentioned in the embodiments of the present application are explained and illustrated below.

[0087] (1) Product code: Product code is a multi-stage coding technique. A two-dimensional product code consists of two component codes: and Two-step encoding is accomplished by encoding the row components and the column components. For example, Figure 1 is a schematic diagram of the encoding scheme of the product code, considering the code length (the length of the encoded bit), the length of the information bit, and the binary linear code with the shortest distance (n1, k1, d1) and (n2,k2,d2) binary linear code A two-dimensional product code can be constructed as follows: Arrange the information bits of length k1k2 into a matrix C1 of k2×k1; for each row of C1, Encode and get the matrix C2 of k2×n1; for each column of C2, according to Encode and get the matrix C of n2×n1, which is a matrix composed of and A two-dimensional product code with a fixed length of n1n2 is used. The code rate of the product code is k1k2 / n1n2. This article mainly uses two-dimensional product codes as an example, but the application is not limited to two-dimensional product codes.

[0088] (2) Serial concatenated code (referred to as concatenated code): Product code is a multi-stage coding technique. For example, Figure 2 is a schematic diagram of the coding scheme of concatenated code. Consider a binary linear code with code length (the length of the encoded bit) and information bit length (n1, k1). and the binary linear code of (n2,n1) The concatenated code consisting of two component codes is constructed as follows: the information bits of length k1 are The encoding obtains a sequence of length n1, and the sequence of length n1 is used as the second component code The input, that is, the sequence of length k2=n1 is used as the information bit The encoding results in a sequence of length n2. The code rate of the concatenated code is k1 / n2.

[0089] (3) Component code (e.g., component code) refers to the codewords obtained at each stage of multi-stage coding. Each stage of multi-stage coding can produce one or more component codes. For example, in the product code shown in Figure 1, there are k2 component codes of length n1 in the first stage, and n1 component codes of length n2 in the second stage. For example, in the concatenated code shown in Figure 2, there is only one component code of length n1 in the first stage, and only one component code of length n2 in the second stage.

[0090] (4) Modulation coding scheme (MCS), also known as modulation coding plan, modulation coding strategy, etc.

[0091] In a communication system, when a transmitting communication device and a receiving communication device perform data transmission, the transmitting communication device may encode and modulate the information bits to be transmitted according to the MCS to obtain modulation symbols, and then send the modulation symbols to the receiving device; after receiving the modulation symbols, the receiving device may demodulate and decode the modulation symbols according to the MCS to recover the original information bits.

[0092] In a specific implementation, the MCS used by a communication device (transmitting and / or receiving communication device) can be configured using an MCS table. As the name suggests, an MCS table is a table composed of MCSs. An MCS table may include at least one MCS, each with a corresponding index (i.e., an MCS index). Each MCS also corresponds to at least one of the following: modulation order, coding rate, and spectral efficiency. The coding rate can also be referred to as simply the code rate.

[0093] For example, Table 1 is an example of a possible MCS table, where a row in the table corresponds to an MCS, and each MCS can be identified by the MCS index of the MCS.

[0094] Table 1

[0095] It can be understood that Table 1 is only an example, and the form of the actual MCS table is not limited thereto.

[0096] (5) The "multiple" mentioned in the embodiments of the present application refers to two or more. "And / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can represent three situations: A exists alone, A and B exist at the same time, and B exists alone. The character " / " generally indicates that the previous and next associated objects are in an "or" relationship. In addition, it should be understood that although the terms "first", "second", etc. may be used to describe each object in the embodiments of the present invention, these objects should not be limited to these terms. These terms are only used to distinguish each object from each other.

[0097] The terms "including" and "having" and any variations thereof mentioned in the description of the embodiments of the present application are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not limited to the listed steps or units, but may optionally include other steps or units that are not listed, or may optionally include other steps or units that are inherent to these processes, methods, products or devices. It should be noted that in the embodiments of the present application, words such as "exemplary" or "for example" are used to indicate examples, illustrations or descriptions. Any embodiment or design described as "exemplary" or "for example" in the embodiments of the present application should not be interpreted as being more preferred or more advantageous than other embodiments or design schemes. Specifically, the use of words such as "exemplary" or "for example" is intended to present related concepts in a concrete way.

[0098] The technical solutions in the embodiments of the present application can be applied to various communication systems, such as fifth-generation (5G) mobile communication systems, such as new radio (NR) systems, sixth-generation (6G) mobile communication systems, universal mobile telecommunications systems (UMTS), wireless local area networks (WLAN), wireless fidelity (Wi-Fi) systems, and other communication systems that will evolve in the future.

[0099] The embodiments of the present application can be applied to the following scenarios: enhanced mobile broadband (eMBB), multi-site transmission (the same terminal device transmits signals to multiple sites), backhaul scenarios, wireless broadband to the home (WTTx), device to device (D2D), or other scenarios with high timing requirements or high transmission rate requirements.

[0100] For example, FIG3 is a schematic diagram of a communication system applicable to an embodiment of the present application. As shown in FIG3, the communication system may include one or more network devices and one or more terminal devices. The interface between the network device and the terminal device may be a Uu interface (or air interface), and data may be transmitted between the network device and the terminal device via air interface resources.

[0101] FIG3 exemplifies scenarios applicable to embodiments of the present application, namely, eMBB (shown by the solid line in FIG3 ), multi-site transmission (shown by the dashed line ① in FIG3 ), backhaul scenario (shown by the dashed line ② in FIG3 ), and D2D (shown by the dashed line ③ in FIG3 ). It should be understood that the four scenarios shown in FIG3 are merely examples and are not limited to these by embodiments of the present application.

[0102] The network device can be a base station, an evolved NodeB (eNodeB), a transmission reception point (TRP), a next generation NodeB (gNB) in a fifth generation (5G) mobile communication system, a base station in a sixth generation (6G) mobile communication system, a base station in a future mobile communication system, or an access node in a wireless fidelity (WiFi) system, etc.; it can also be a module or unit that performs some of the functions of a base station, for example, a centralized unit (CU) or a distributed unit (DU). The access network device can be a macro base station (such as 110a in Figure 3), a micro base station or an indoor station (such as 110b in Figure 3), a relay node or a donor node, etc. The embodiments of the present application do not limit the specific technology and specific device form adopted by the access network device. In the embodiments of the present application, a base station is used as an example of an access network device for description.

[0103] In one possible scenario, multiple RAN nodes collaborate to assist the terminal in achieving wireless access, and different RAN nodes respectively implement part of the functions of the base station. For example, the RAN node can be a centralized unit (CU), a distributed unit (DU), a CU-control plane (CP), a CU-user plane (UP), or a radio unit (RU). The CU and DU can be set separately, or they can be included in the same network element, such as a baseband unit (BBU). The RU can be included in a radio frequency device or radio frequency unit, such as a remote radio unit (RRU), an active antenna unit (AAU), or a remote radio head (RRH).

[0104] In different systems, CU (or CU-CP and CU-UP), DU or RU may also have different names, but those skilled in the art can understand their meanings. For example, in an open radio access network (O-RAN or open RAN or ORAN) system, CU may also be called O-CU (open CU), DU may also be called O-DU, CU-CP may also be called O-CU-CP, CU-UP may also be called O-CU-UP, and RU may also be called O-RU. For the convenience of description, this application takes CU, CU-CP, CU-UP, DU and RU as examples for description. Any unit of CU (or CU-CP, CU-UP), DU and RU in this application can be implemented by a software module, a hardware module, or a combination of a software module and a hardware module.

[0105] Terminal devices may also be referred to as terminals, user equipment (UE), mobile stations, mobile terminals, etc. Terminal devices can be widely used in various scenarios, for example, device-to-device (D2D), vehicle-to-everything (V2X) communication, machine-type communication (MTC), Internet of Things (IOT), virtual reality, augmented reality, industrial control, autonomous driving, telemedicine, smart grid, smart furniture, smart office, smart wearable, smart transportation, smart city, etc. Terminal devices may be mobile phones, tablet computers, computers with wireless transceiver functions, wearable devices, vehicles, drones, helicopters, airplanes, ships, robots, robotic arms, smart home devices, etc. The embodiments of the present application do not limit the specific technology and specific device form adopted by the terminal devices.

[0106] Base stations and UEs can be fixed or mobile. They can be deployed on land, indoors or outdoors, handheld or vehicle-mounted; on water; or in the air on aircraft, balloons, and satellites. The embodiments of this application do not limit the application scenarios of base stations and UEs.

[0107] Communication between base stations and UEs, between base stations, and between UEs can be carried out through authorized spectrum, unauthorized spectrum, or both; communication can be carried out through spectrum below 6 gigahertz (GHz), spectrum above 6 GHz, or spectrum below 6 GHz and spectrum above 6 GHz. The embodiments of the present application do not limit the spectrum resources used for wireless communication.

[0108] The communication system and scenarios described in the embodiments of the present application are intended to more clearly illustrate the technical solutions of the embodiments of the present application, and do not constitute a limitation on the technical solutions provided in the embodiments of the present application. A person skilled in the art will appreciate that, with the evolution of network architecture and the emergence of new scenarios, the technical solutions provided in the embodiments of the present application are equally applicable to similar technical problems.

[0109] See Figure 4, which is a flowchart of an encoding method provided in an embodiment of the present application. The method can be applied to the communication system shown in Figure 3. The method can be executed by a first communication device. Unless otherwise specified, the "first communication device" in this application can refer to the first communication device itself (for example, the network device or terminal device shown in Figure 3), or a component in the first communication device (for example, a processor, a chip, or a chip system, etc.), or a logic module or software that can implement all or part of the functions of the first communication device. The method includes S401 to S403:

[0110] S401. Determine a code rate of a component code corresponding to at least one stage in multi-stage encoding of information bits according to a first MCS or a first signal to interference plus noise ratio (SNR) or a first modulation order or a first coding rate.

[0111] In this embodiment of the present application, the code rate of the component code corresponding to at least one stage in the multi-stage encoding of the information bits is related to at least one of the following: a first MCS, a first SNR, a first modulation order, and a first coding rate. The first MCS is the MCS used for the information bit; the first SNR is the SNR of the channel used to carry the information bit; the first modulation order is the modulation order used for the information bit; and the first coding rate is the coding rate used for the information bit, i.e., the overall coding rate of the multi-stage encoding.

[0112] It is understood that the MCS here may refer to a row in an MCS table. In some embodiments, each MCS (e.g., the first MCS) may be uniquely identified by its MCS index, and thus, the MCS may also refer to the MCS index. The code rate of a component code refers to the coding rate of the component code, which is equal to the ratio of the number of information bits in the component code to the total number of bits in the component code.

[0113] Multi-stage coding includes at least two stages. Specific coding techniques for multi-stage coding include, but are not limited to, product codes or concatenated codes. For ease of description, the following uses a two-stage product code as an example, with the first stage in the multi-stage coding described as the "first stage" and the remaining stage as the "second stage."

[0114] In a possible design, the code rate of the component code corresponding to the first stage in the multi-stage coding is related to the first MCS or the first SNR or the first modulation order or the first coding rate. Accordingly, the code rate of the component code corresponding to at least one stage in the multi-stage coding is determined according to the first MCS or the first SNR or the first modulation order or the first coding rate, including: determining the code rate of the component code corresponding to the first stage in the multi-stage coding according to the first MCS or the first SNR or the first modulation order or the first coding rate. Since the multi-stage coding is decoded (or called "decoding"), the component code of the first stage is decoded first, and then the component codes of other stages are decoded. If the component code of the first stage is decoded correctly, there is no need to decode the component codes of other stages. Therefore, based on this design, the division of the code rate of the component code of the first stage is given priority, which can give full play to the decoding performance of the component code of the first stage, reduce unnecessary decoding overhead, and achieve the effect of improving decoding performance and reducing decoding complexity.

[0115] For ease of description, “r1” is used below to represent the bit rate of the component code corresponding to the first stage.

[0116] The following is a detailed introduction to the specific implementation method of determining the bit rate of the component code corresponding to the first stage in multi-stage encoding:

[0117] In a possible implementation, the code rate of the component code corresponding to the first stage corresponding to the first MCS may be determined according to the correspondence between the MCS and the code rate of the component code corresponding to the first stage.

[0118] Optionally, the bit rate of the component code corresponding to the first stage is positively correlated with the MCS. Specifically, as the MCS increases, the bit rate of the component code corresponding to the first stage also increases; as the MCS decreases, the bit rate of the component code corresponding to the first stage also decreases.

[0119] In a specific implementation, the correspondence between the MCS and the bit rates of the component codes corresponding to the first stage can be expressed in various ways. As a possible example, the correspondence between the MCS and the bit rates of the component codes corresponding to the first stage is in the form of a table. For example, Table 1A is an example of the correspondence between the MCS and the bit rates of the component codes corresponding to the first stage:

[0120] Table 1A

[0121] It can be understood that the code rate of the component code corresponding to the first stage corresponding to the MCS in each row in Table 1A is r1 in the row.

[0122] It should be noted that Table 1A is merely an example of the correspondence between the MCS and the bit rate of the component code corresponding to the first stage. In actual applications, the MCS in the correspondence between the MCS and the bit rate of the component code corresponding to the first stage is not limited to the MCS given in Table 1A, and the r1 corresponding to each MCS is not limited to the r1 given in the table. In addition to being represented in rows in the table, the correspondence can also be represented in columns, and this embodiment of the present application does not impose any restrictions.

[0123] In a possible implementation, the code rate of the component code corresponding to the first stage corresponding to the first SNR may be determined according to a correspondence between the SNR and the code rate of the component code corresponding to the first stage.

[0124] Optionally, the bit rate of the component code corresponding to the first stage is positively correlated with the SNR. Specifically, as the SNR increases, the bit rate of the component code corresponding to the first stage also increases; as the SNR decreases, the bit rate of the component code corresponding to the first stage also decreases.

[0125] In a specific implementation, the correspondence between SNR and the bit rate of the component code corresponding to the first stage can be expressed in various ways. As a possible example, the correspondence between SNR and the bit rate of the component code corresponding to the first stage is in the form of a table. For example, Table 2A is an example of the correspondence between SNR and the bit rate of the component code corresponding to the first stage:

[0126] Table 2A

[0127] It can be understood that the code rate of the component code corresponding to the first stage corresponding to the SNR in each row in Table 2A is r1 in the row.

[0128] It should be noted that Table 2A is merely an example of the correspondence between SNR and the bit rate of the component codes corresponding to the first stage. In actual applications, the division of the SNR numerical intervals in the correspondence between SNR and the bit rate of the component codes corresponding to the first stage is not limited to the division method given in Table 2A, and the r1 corresponding to each SNR interval is not limited to the r1 given in the table. In addition to being expressed in rows in the table, the correspondence can also be expressed in columns, and this embodiment of the application does not impose any limitation.

[0129] In a possible implementation, the code rate of the component code corresponding to the first stage corresponding to the first modulation order may be determined according to the correspondence between the modulation order and the code rate of the component code corresponding to the first stage.

[0130] Optionally, the code rate of the component code corresponding to the first stage is positively correlated with the modulation order. Specifically, as the modulation order increases, the code rate of the component code corresponding to the first stage also increases; as the modulation order decreases, the code rate of the component code corresponding to the first stage also decreases.

[0131] In a specific implementation, the correspondence between the modulation order and the bit rate of the component code corresponding to the first stage can be expressed in various ways. As a possible example, the correspondence between the modulation order and the bit rate of the component code corresponding to the first stage is in the form of a table. For example, Table 3A is an example of the correspondence between the modulation order and the bit rate of the component code corresponding to the first stage:

[0132] Table 3A

[0133] It can be understood that the code rate of the component code corresponding to the first stage corresponding to the modulation order in each row in Table 3A is r1 in the row.

[0134] Among them, the modulation mode corresponding to 1024 is 1024-QAM, the modulation mode corresponding to 256 is 256-QAM, the modulation mode corresponding to 64 is 64-QAM, and the modulation mode corresponding to 2 is BPSK.

[0135] It should be noted that Table 3A is merely an example of the correspondence between the modulation order and the bit rate of the component code corresponding to the first stage. In actual applications, the modulation order in the correspondence between the modulation order and the bit rate of the component code corresponding to the first stage is not limited to the modulation order given in Table 3A, and the r1 corresponding to each modulation order is not limited to the r1 given in the table. In addition to being expressed in rows in the table, the correspondence can also be expressed in columns, and this embodiment of the application does not impose any restrictions.

[0136] In a possible implementation, the code rate of the component code corresponding to the first stage corresponding to the first coding rate may be determined according to a correspondence between the coding rate and the code rate of the component code corresponding to the first stage.

[0137] It can be understood that the coding rate here is the overall coding rate of multi-stage coding. Taking the overall coding rate of two-stage coding as an example, the code rate of the component code corresponding to the first stage is r1, and the code rate of the component code corresponding to the first stage is r2. Then the overall coding rate of the two-stage coding is r = r1 × r2.

[0138] Optionally, the bit rate of the component code corresponding to the first stage is positively correlated with the coding rate. Specifically, as the coding rate increases, the bit rate of the component code corresponding to the first stage also increases; as the coding rate decreases, the bit rate of the component code corresponding to the first stage also decreases.

[0139] In a specific implementation, the correspondence between the coding rate and the bit rate of the component codes corresponding to the first stage can be expressed in various ways. As one possible example, the correspondence between the coding rate and the bit rate of the component codes corresponding to the first stage is in the form of a table. For example, Table 2A is an example of the correspondence between the coding rate and the bit rate of the component codes corresponding to the first stage:

[0140] Table 4A

[0141] It can be understood that the coding rate in each row in Table 4A corresponds to the coding rate of the component code in the first stage, which is r1 in the row.

[0142] It should be noted that Table 4A is merely an example of the correspondence between coding rates and the bit rates of the component codes corresponding to the first stage. In actual applications, the coding rates in the correspondence between coding rates and the bit rates of the component codes corresponding to the first stage are not limited to the coding rates given in Table 4A, and the r1 corresponding to each coding rate is not limited to the r1 given in the table. In addition to being expressed in rows, the correspondence in the table can also be expressed in columns, and this is not limited in the present embodiment.

[0143] It is understood that the MCS, SNR, modulation order, and code rate described in the four implementations above are all parameters that can be used to characterize channel conditions. In practical applications, in addition to determining the code rate of the component codes corresponding to the first stage based on the MCS, SNR, modulation order, and code rate, other parameters that can represent channel conditions can also be used to determine the code rate of the component codes corresponding to the first stage. For example, the number of iterations of the previous decoding (a smaller number indicates better channel conditions) and the LLR mean of the current decoding input (a larger LLR mean indicates better channel conditions) can also be used to determine the code rate of the component codes corresponding to the first stage.

[0144] The above describes the bit rates of the component codes corresponding to the first stage. The following describes the bit rates of the component codes corresponding to the second stage.

[0145] For ease of description, "r2" is used below to represent the bit rate of the component code corresponding to the first stage, and "r" is used to represent the total bit rate of the multi-stage encoding, r = r1 × r2.

[0146] In one possible design, the code rate of the component code corresponding to the second stage in the multi-stage coding is related to the first MCS or the first SNR or the first modulation order or the first coding rate. In other words, determining the code rate of the component code corresponding to at least one stage in the multi-stage coding according to the first MCS or the first SNR or the first modulation order or the first coding rate may also include: determining the code rate of the component code corresponding to the second stage in the multi-stage coding according to the first MCS or the first SNR or the first modulation order or the first coding rate. In this design method, the code rate of the component code corresponding to the first stage and the code rate of the component code corresponding to the second stage are both determined based on the first MCS or the first SNR or the first modulation order or the first coding rate, which helps to keep the overall code rate of the multi-stage coding stable and meet system requirements.

[0147] The following describes a specific implementation method for determining the bit rate of the component code corresponding to the second stage in multi-stage encoding.

[0148] In a possible implementation, the code rate of the component code corresponding to the second stage corresponding to the first MCS may be determined based on the correspondence between the MCS and the code rate of the component code corresponding to the second stage.

[0149] Optionally, the bit rate of the component code corresponding to the second stage is negatively correlated with the MCS. Specifically, as the MCS increases, the bit rate of the component code corresponding to the second stage decreases; and as the MCS decreases, the bit rate of the component code corresponding to the second stage increases.

[0150] In a specific implementation, the correspondence between the MCS and the bit rate of the component codes corresponding to the second stage can be expressed in various ways. As a possible example, the correspondence between the MCS and the bit rate of the component codes corresponding to the second stage is in the form of a table. For example, Table 1B is an example of the correspondence between the MCS and the bit rate of the component codes corresponding to the second stage:

[0151] Table 1B

[0152] It can be understood that the code rate of the component code corresponding to the second stage corresponding to the MCS in each row in Table 1B is r1 in the row.

[0153] It should be noted that Table 1B is merely an example of the correspondence between the MCS and the bit rate of the component code corresponding to the second stage. In actual applications, the MCS in the correspondence between the MCS and the bit rate of the component code corresponding to the second stage is not limited to the MCS given in Table 1B, and the r1 corresponding to each MCS is not limited to the r1 given in the table. In addition to being represented in rows in the table, the correspondence can also be represented in columns, and this embodiment of the present application does not impose any restrictions.

[0154] In some embodiments, the correspondence between the MCS and the bit rate of the component code corresponding to the first stage, and the correspondence between the MCS and the bit rate of the component code corresponding to the second stage can be represented by a table, such as shown in Table 1C:

[0155] Table 1C

[0156] In a possible implementation, the code rate of the component code corresponding to the second stage corresponding to the first SNR may be determined according to a correspondence between the SNR and the code rate of the component code corresponding to the second stage.

[0157] Optionally, the bit rate of the component code corresponding to the second stage is negatively correlated with the SNR. Specifically, as the SNR increases, the bit rate of the component code corresponding to the second stage decreases; and as the SNR decreases, the bit rate of the component code corresponding to the second stage increases.

[0158] In a specific implementation, the correspondence between SNR and the bit rate of the component code corresponding to the second stage can be expressed in various ways. As a possible example, the correspondence between SNR and the bit rate of the component code corresponding to the second stage is in the form of a table. For example, Table 2B is an example of the correspondence between SNR and the bit rate of the component code corresponding to the second stage:

[0159] Table 2B

[0160] It can be understood that the code rate of the component code corresponding to the second stage corresponding to the SNR in each row in Table 2B is r1 in the row.

[0161] It should be noted that Table 2B is merely an example of the correspondence between SNR and the bit rate of the component code corresponding to the second stage. In actual applications, the division method of the SNR numerical interval in the correspondence between SNR and the bit rate of the component code corresponding to the second stage is not limited to the division method given in Table 2B, and the r1 corresponding to each SNR interval is not limited to the r1 given in the table. In addition to being expressed in rows in the table, the correspondence can also be expressed in columns, and this embodiment of the application does not impose any limitation.

[0162] In some embodiments, the correspondence between the SNR and the bit rate of the component code corresponding to the first stage, and the correspondence between the SNR and the bit rate of the component code corresponding to the second stage can be represented by a table, such as shown in Table 2C:

[0163] Table 2C

[0164] In a possible implementation, the code rate of the component code corresponding to the second stage corresponding to the first modulation order may be determined according to the correspondence between the modulation order and the code rate of the component code corresponding to the second stage.

[0165] Optionally, the code rate of the component code corresponding to the second stage is negatively correlated with the modulation order. Specifically, as the modulation order increases, the code rate of the component code corresponding to the second stage decreases; as the modulation order decreases, the code rate of the component code corresponding to the second stage increases.

[0166] In a specific implementation, the correspondence between the modulation order and the bit rate of the component code corresponding to the second stage can be expressed in various ways. As a possible example, the correspondence between the modulation order and the bit rate of the component code corresponding to the second stage is in the form of a table. For example, Table 3B is an example of the correspondence between the modulation order and the bit rate of the component code corresponding to the second stage:

[0167] Table 3B

[0168] It can be understood that the code rate of the component code corresponding to the second stage corresponding to the modulation order in each row in Table 3B is r1 in the row.

[0169] It should be noted that Table 3B is merely an example of the correspondence between the modulation order and the bit rate of the component code corresponding to the second stage. In actual applications, the modulation order in the correspondence between the modulation order and the bit rate of the component code corresponding to the second stage is not limited to the modulation order given in Table 3B, and the r1 corresponding to each modulation order is not limited to the r1 given in the table. In addition to being expressed in rows in the table, the correspondence can also be expressed in columns, and this embodiment of the application does not impose any restrictions.

[0170] In some embodiments, the correspondence between the modulation order and the code rate of the component code corresponding to the first stage, and the correspondence between the modulation order and the code rate of the component code corresponding to the second stage can be represented by a table, such as shown in Table 3C:

[0171] Table 3C

[0172] In a possible implementation, the code rate of the component code corresponding to the second stage corresponding to the first coding rate may be determined according to a correspondence between the coding rate and the code rate of the component code corresponding to the second stage.

[0173] It can be understood that the coding rate here is the overall coding rate of multi-stage coding. Taking the overall coding rate of two-stage coding as an example, the coding rate of the component code corresponding to the second stage is r1, and the coding rate of the component code corresponding to the second stage is r2. Then the overall coding rate of the two-stage coding is r = r1 × r2.

[0174] Optionally, the bit rate of the component code corresponding to the second stage is negatively correlated with the coding rate. Specifically, as the coding rate increases, the bit rate of the component code corresponding to the second stage decreases; and as the coding rate decreases, the bit rate of the component code corresponding to the second stage increases.

[0175] In a specific implementation, the correspondence between the coding rate and the bit rate of the component codes corresponding to the second stage can be expressed in various ways. As one possible example, the correspondence between the coding rate and the bit rate of the component codes corresponding to the second stage is in the form of a table. For example, Table 2B is an example of the correspondence between the coding rate and the bit rate of the component codes corresponding to the second stage:

[0176] Table 4B

[0177] It can be understood that the coding rate in each row in Table 4B corresponds to the coding rate of the component code in the second stage, which is r1 in the row.

[0178] It should be noted that Table 4B is merely an example of the correspondence between coding rates and the bit rates of the component codes corresponding to the second stage. In actual applications, the coding rates in the correspondence between coding rates and the bit rates of the component codes corresponding to the second stage are not limited to the coding rates given in Table 4B, and the r1 corresponding to each coding rate is not limited to the r1 given in the table. The correspondence can be expressed in columns in addition to rows in the table, and this is not limited in the present embodiment.

[0179] Optionally, when the number of stages of multi-stage coding is greater than 2, the overall code rate of the component codes corresponding to all stages except the first stage may be related to the first MCS or the first SNR or the first modulation order or the first coding rate.

[0180] In another possible design, the bit rate of the component code corresponding to the second stage is determined based on the bit rate of the component code corresponding to the first stage and the total bit rate of the multi-stage encoding, that is, r2=r / r1.

[0181] In a specific implementation, r2=r / r1 can also be given by a table. For example, corresponding to the above Table 1A, Table 2A, and Table 3A, the following Table 1D, Table 2D, and Table 3D can be respectively given:

[0182] Table 1D

[0183] Table 2D

[0184] Table 3D

[0185] It can be understood that the total code rate of multi-stage coding can be different for different MCS or SNR or modulation order or coding rate, that is, R0, R1, R2...R in the table. 27 etc. can have different values, which can be specifically determined according to the MCS table used by the first communication device.

[0186] Optionally, when the number of stages of multi-stage encoding is greater than 2, the overall bit rate of the component codes corresponding to all stages except the first stage may be determined based on the bit rate of the component codes corresponding to the first stage and the total bit rate of the multi-stage encoding.

[0187] The above are just some examples and are not limited to these.

[0188] S402 : Perform multi-stage encoding on the information bits according to the code rates of the component codes corresponding to each stage in the multi-stage encoding to obtain coded bits.

[0189] For example, the information bits can be multi-stage encoded based on the bit rate, number of bits before encoding, and number of bits after encoding of the component codes corresponding to each stage in the multi-stage encoding. It will be understood that encoding includes padding the information bits with redundant bits (such as adding a checksum) to obtain the encoded bits (i.e., the component codes). Accordingly, the number of bits before encoding refers to the number of information bits in the component codes, and the number of bits after encoding refers to the total number of bits in the component codes (i.e., the sum of the information bits and the redundant bits).

[0190] The bit rate of the component code corresponding to each stage in the multi-stage encoding may be determined using the relevant methods described in step S402 above (e.g., based on MCS, SNR, modulation order, or coding rate). Alternatively, the bit rate of the component code corresponding to each stage in the multi-stage encoding may be directly specified by a protocol or system, which is not limited in this embodiment of the present application.

[0191] The following describes a method for determining the number of bits of a component code before encoding and the number of bits of a component code after encoding.

[0192] In one possible design, the number of bits after encoding of the component code corresponding to each stage in multi-stage encoding can be determined based on the code rate and the number of bits before encoding of the component code corresponding to each stage in multi-stage encoding. Exemplarily, taking two-stage encoding as an example, n1 is the number of bits after encoding of the component code corresponding to the first stage, r1 is the code rate of the component code corresponding to the first stage, k1 is the number of bits before encoding of the component code corresponding to the first stage, n2 is the number of bits after encoding of the component code corresponding to the second stage, r2 is the code rate of the component code corresponding to the second stage, and k2 is the number of bits before encoding of the component code corresponding to the second stage. If k1, r1, k2, and r2 are known, then n1 = k1 / r1 and n2 = k2 / r2 can be calculated.

[0193] The following describes a method for determining the number of bits before encoding of the component code corresponding to each stage in multi-stage encoding:

[0194] In a specific implementation, the protocol stipulates or the system stipulates (or configures or agrees on) the number of bits before encoding of the component code corresponding to each stage in the multi-stage encoding, for example, the protocol stipulates or the system stipulates the values ​​of k1 and k2.

[0195] In another specific implementation, if the protocol or system specifies (or configures or agrees on) a total number of pre-encoded bits (i.e., k) and a first proportionality coefficient for multi-stage encoding, the number of pre-encoded bits of the component codes corresponding to each stage of the multi-stage encoding can be determined based on the total number of pre-encoded bits of the multi-stage encoding and the first proportionality coefficient. The first proportionality coefficient is the ratio (k1 / k) of the number of pre-encoded bits of the component codes corresponding to the first stage of the multi-stage encoding to the total number of pre-encoded bits.

[0196] The following describes several possible implementations of determining the first proportional coefficient:

[0197] In a possible implementation, a first proportionality coefficient corresponding to the first MCS may be determined according to a correspondence between the MCS and the proportionality coefficient.

[0198] Optionally, the proportionality coefficient is positively correlated with the MCS. Specifically, as the MCS increases, the proportionality coefficient also increases; and as the MCS decreases, the proportionality coefficient also decreases.

[0199] In a specific implementation, the correspondence between MCS and the scaling factor can be expressed in a variety of ways. As a possible example, the correspondence between MCS and the scaling factor is in the form of a table. For example, Table 1E is an example of the correspondence between MCS and the scaling factor:

[0200] Table 1E

[0201] It should be noted that Table 1E is only an example of the correspondence between MCS and proportional coefficient. In practical applications, the MCS in the correspondence between MCS and proportional coefficient is not limited to the MCS given in Table 1E, and the proportional coefficient corresponding to each MCS is not limited to the proportional coefficient given in the table. In addition to being represented in rows in the table, the correspondence can also be represented in columns. r2 in Table 1E can also be determined by the total bit rate and r1. Table 1E may also not have r1 and / or r2, for example, r1 and / or r2 are stored in other tables. In addition to the parameters shown, Table 1E can also store more parameters. This is not limited in the embodiments of the present application.

[0202] In a possible implementation, a first proportionality coefficient corresponding to the first SNR may be determined according to a correspondence between the SNR and the proportionality coefficient.

[0203] Optionally, the proportionality factor is positively correlated with the SNR. Specifically, as the SNR increases, the proportionality factor also increases; and as the SNR decreases, the proportionality factor also decreases.

[0204] In a specific implementation, the correspondence between SNR and the proportional coefficient can be expressed in a variety of ways. As a possible example, the correspondence between SNR and the proportional coefficient is in the form of a table. For example, Table 2E is an example of the correspondence between SNR and the proportional coefficient:

[0205] Table 2E

[0206] It should be noted that Table 2E is only an example of the correspondence between SNR and proportional coefficient. In practical applications, the SNR in the correspondence between SNR and proportional coefficient is not limited to the SNR given in Table 2E, and the proportional coefficient corresponding to each SNR is not limited to the proportional coefficient given in the table. In addition to being represented in rows in the table, the correspondence can also be represented in columns. r2 in Table 2E can also be determined by the total bit rate and r1. r1 and / or r2 may also be absent in Table 2E, for example, r1 and / or r2 are stored in other tables. In addition to the parameters shown, more parameters can be stored in Table 2E. This is not limited in the embodiments of the present application.

[0207] In a possible implementation, the first proportional coefficient corresponding to the first modulation order may be determined according to a corresponding relationship between the modulation order and the proportional coefficient.

[0208] Optionally, the proportional coefficient is positively correlated with the modulation order. Specifically, as the modulation order increases, the proportional coefficient also increases; and as the modulation order decreases, the proportional coefficient also decreases.

[0209] In a specific implementation, the correspondence between the modulation order and the proportional coefficient can be expressed in a variety of ways. As a possible example, the correspondence between the modulation order and the proportional coefficient is in the form of a table. For example, Table 3E is an example of the correspondence between the modulation order and the proportional coefficient:

[0210] Table 3E

[0211] It should be noted that Table 3E is only an example of the correspondence between the modulation order and the proportional coefficient. In practical applications, the modulation order in the correspondence between the modulation order and the proportional coefficient is not limited to the modulation order given in Table 3E, and the proportional coefficient corresponding to each modulation order is not limited to the proportional coefficient given in the table. In addition to being represented in rows in the table, the correspondence can also be represented in columns. r2 in Table 3E can also be determined by the total code rate and r1. r1 and / or r2 may also be absent in Table 3E, for example, r1 and / or r2 are stored in other tables. In addition to the parameters shown, more parameters can be stored in Table 3E. This is not limited in the embodiments of the present application.

[0212] In a possible implementation, the first proportional coefficient corresponding to the first coding rate may be determined according to a correspondence between the coding rate and the proportional coefficient.

[0213] Optionally, the proportional coefficient is positively correlated with the coding rate. Specifically, as the coding rate increases, the proportional coefficient also increases; and as the coding rate decreases, the proportional coefficient also decreases.

[0214] In a specific implementation, the correspondence between the coding rate and the proportional coefficient can be expressed in a variety of ways. As a possible example, the correspondence between the coding rate and the proportional coefficient is in the form of a table. For example, Table 4E is an example of the correspondence between the coding rate and the proportional coefficient:

[0215] Table 4E

[0216] It should be noted that Table 4E is merely an example of the correspondence between the coding rate and the proportional coefficient. In practical applications, the coding rate in the correspondence between the coding rate and the proportional coefficient is not limited to the coding rate given in Table 4E, and the proportional coefficient corresponding to each coding rate is not limited to the proportional coefficient given in the table. In addition to being represented in rows in the table, the correspondence can also be represented in columns. r2 in Table 4E can also be determined by the total bit rate and r1. r1 and r2 may also be absent in Table 4E, for example, the correspondence between r1 and the coding rate is stored in other tables. In addition to the parameters shown, Table 4E can also store more parameters (such as r2). This is not limited in the embodiments of the present application.

[0217] The above are just some examples and are not limited to these.

[0218] When the first proportional coefficient (k1 / k) is determined, the ratio of the number of pre-encoded bits of the component code corresponding to the second stage to the total number of pre-encoded bits can be determined according to k and the first proportional coefficient, that is, k2 / k=1-k1 / k.

[0219] In some embodiments, the first proportionality coefficient may also be the ratio of the number of pre-encoded bits of the component code corresponding to the second stage to the total number of pre-encoded bits (k2 / k), and k1 / k may be determined based on k and k2 / k.

[0220] In one possible design, the number of bits before encoding of the component code corresponding to each stage can be determined based on the code rate and the number of bits after encoding of the component code corresponding to each stage in multi-stage encoding. Exemplarily, taking two-stage encoding as an example, n1 is the number of bits after encoding of the component code corresponding to the first stage, r1 is the code rate of the component code corresponding to the first stage, k1 is the number of bits before encoding of the component code corresponding to the first stage, n2 is the number of bits after encoding of the component code corresponding to the second stage, r2 is the code rate of the component code corresponding to the second stage, and k2 is the number of bits before encoding of the component code corresponding to the second stage. If n1, r1, n2, and r2 are known, then k1 = n1 × r1 and k2 = n2 × r2 can be calculated.

[0221] The following describes how to determine the number of encoded bits for the component code corresponding to each stage in multi-stage encoding:

[0222] In a specific implementation, the protocol specifies or the system specifies (or configures or agrees on) the number of encoded bits of the component code corresponding to each stage in the multi-stage encoding, for example, the protocol specifies or the system specifies the values ​​of n1 and n2.

[0223] In a specific implementation, if the protocol or system specifies (or configures or agrees on) a total number of coded bits (i.e., n) for multi-stage encoding and a second proportionality coefficient, the number of coded bits of the component codes corresponding to each stage of the multi-stage encoding can be determined based on the total number of coded bits for the multi-stage encoding and the second proportionality coefficient. The second proportionality coefficient is the ratio (n1 / n) of the number of coded bits of the component codes corresponding to the first stage of the multi-stage encoding to the total number of coded bits.

[0224] The following describes several possible implementations of determining the second proportional coefficient:

[0225] In a possible implementation, the second proportional coefficient corresponding to the first MCS may be determined according to a correspondence between the MCS and the proportional coefficient.

[0226] Optionally, the proportionality coefficient is positively correlated with the MCS. Specifically, as the MCS increases, the proportionality coefficient also increases; and as the MCS decreases, the proportionality coefficient also decreases.

[0227] In a specific implementation, the correspondence between MCS and the scaling factor can be expressed in a variety of ways. As a possible example, the correspondence between MCS and the scaling factor is in the form of a table. For example, Table 1F is an example of the correspondence between MCS and the scaling factor:

[0228] Table 1F

[0229] It should be noted that Table 1F is only an example of the correspondence between MCS and proportional coefficient. In practical applications, the MCS in the correspondence between MCS and proportional coefficient is not limited to the MCS given in Table 1F, and the proportional coefficient corresponding to each MCS is not limited to the proportional coefficient given in the table. In addition to being represented in rows in the table, the correspondence can also be represented in columns. r2 in Table 1F can also be determined by the total bit rate and r1. r1 and / or r2 may not be in Table 1F, for example, r1 and / or r2 are stored in other tables. In addition to the parameters shown, more parameters can be stored in Table 1F. This is not limited in the embodiments of the present application.

[0230] In a possible implementation, the second proportional coefficient corresponding to the first SNR may be determined according to a corresponding relationship between the SNR and the proportional coefficient.

[0231] Optionally, the proportionality factor is positively correlated with the SNR. Specifically, as the SNR increases, the proportionality factor also increases; and as the SNR decreases, the proportionality factor also decreases.

[0232] In a specific implementation, the correspondence between SNR and the proportional coefficient can be expressed in a variety of ways. As a possible example, the correspondence between SNR and the proportional coefficient is in the form of a table. For example, Table 2F is an example of the correspondence between SNR and the proportional coefficient:

[0233] Table 2F

[0234] It should be noted that Table 2F is only an example of the correspondence between SNR and proportional coefficient. In practical applications, the SNR in the correspondence between SNR and proportional coefficient is not limited to the SNR given in Table 2F, and the proportional coefficient corresponding to each SNR is not limited to the proportional coefficient given in the table. In addition to being represented in rows in the table, the correspondence can also be represented in columns. r2 in Table 2F can also be determined by the total bit rate and r1. r1 and / or r2 may also be absent in Table 2F, for example, r1 and / or r2 are stored in other tables. In addition to the parameters shown, more parameters can be stored in Table 2F. This is not limited in the embodiments of the present application.

[0235] In a possible implementation, the second proportional coefficient corresponding to the first modulation order may be determined according to a corresponding relationship between the modulation order and the proportional coefficient.

[0236] Optionally, the proportional coefficient is positively correlated with the modulation order. Specifically, as the modulation order increases, the proportional coefficient also increases; and as the modulation order decreases, the proportional coefficient also decreases.

[0237] In a specific implementation, the correspondence between the modulation order and the proportional coefficient can be expressed in a variety of ways. As a possible example, the correspondence between the modulation order and the proportional coefficient is in the form of a table. For example, Table 3F is an example of the correspondence between the modulation order and the proportional coefficient:

[0238] Table 3F

[0239] It should be noted that Table 3F is only an example of the correspondence between the modulation order and the proportional coefficient. In practical applications, the modulation order in the correspondence between the modulation order and the proportional coefficient is not limited to the modulation order given in Table 3F, and the proportional coefficient corresponding to each modulation order is not limited to the proportional coefficient given in the table. In addition to being represented in rows in the table, the correspondence can also be represented in columns. r2 in Table 3F can also be determined by the total code rate and r1. r1 and / or r2 may also be absent in Table 3F, for example, r1 and / or r2 are stored in other tables. In addition to the parameters shown, more parameters can be stored in Table 3F. This is not limited in the embodiments of the present application.

[0240] In a possible implementation, the second proportional coefficient corresponding to the first coding rate may be determined according to a correspondence between the coding rate and the proportional coefficient.

[0241] Optionally, the proportional coefficient is positively correlated with the coding rate. Specifically, as the coding rate increases, the proportional coefficient also increases; and as the coding rate decreases, the proportional coefficient also decreases.

[0242] In a specific implementation, the correspondence between the coding rate and the proportional coefficient can be expressed in a variety of ways. As a possible example, the correspondence between the coding rate and the proportional coefficient is in the form of a table. For example, Table 4F is an example of the correspondence between the coding rate and the proportional coefficient:

[0243] Table 4F

[0244] It should be noted that Table 4F is merely an example of the correspondence between the coding rate and the proportional coefficient. In practical applications, the coding rate in the correspondence between the coding rate and the proportional coefficient is not limited to the coding rate given in Table 4F, and the proportional coefficient corresponding to each coding rate is not limited to the proportional coefficient given in the table. In addition to being represented in rows in the table, the correspondence can also be represented in columns. r2 in Table 4F can also be determined by the total bit rate and r1. r1 may also be absent in Table 4F, for example, the correspondence between r1 and the coding rate is stored in other tables. In addition to the parameters shown, more parameters (such as r2) can be stored in Table 4F. This is not limited in the embodiments of the present application.

[0245] The above are just some examples and are not limited to these.

[0246] When the second proportional coefficient (n1 / n) is determined, the ratio of the number of pre-encoded bits of the component code corresponding to the second stage to the total number of pre-encoded bits can be determined according to n and the second proportional coefficient, that is, n2 / n=1-n1 / n.

[0247] In some embodiments, the second proportional coefficient may also be the ratio of the number of bits before encoding of the component code corresponding to the second stage to the total number of bits before encoding (n2 / n), and n1 / n may be determined based on n and n2 / n.

[0248] It can be understood that the above-mentioned tables given in the embodiments of the present application can exist independently or can be combined with each other to form new tables, and the embodiments of the present application do not limit this.

[0249] In one possible design, if the number of information bits cannot be divided evenly by the total number of bits before encoding in the multi-stage encoding, at least one of repetition and zero padding is performed on the information bits so that the processed information bits can be divided evenly by the total number of bits before encoding in the multi-stage encoding; and the processed information bits are multi-stage encoded according to the bit rate of the component code corresponding to each stage in the multi-stage encoding.

[0250] For example, if the number of information bits is A′ and a product code with size k = k1·k2 is used for encoding, if A′ cannot be divided by k1·k2, the input A′ bits are adjusted as follows:

[0251] remember Specific adjustment methods include but are not limited to:

[0252] Method 1: Add A at the beginning of A′ bits p zeros;

[0253] Method 2: Add A at the end of A′ bits p zeros;

[0254] Method 3: Add A′ bits to A p The bit is copied and placed at the last position of A′ bits;

[0255] Method 4: A′ bits after A p The bit is copied and placed at the first position of the A′ bits.

[0256] S403: Output coded bits.

[0257] It can be understood that outputting the coded bits here may refer to inputting the coded bits to the next processing node (such as rate matching, interleaving, or constellation modulation, etc.), or may refer to sending the coded bits through a wireless channel, without limitation.

[0258] In the coding method provided in S401 to S403 above, a specific method for dividing the code rate (such as r1, 2) and code length (such as n1, n2, or k1, k2) of each stage in the multi-stage coding is provided, thereby improving the reliability of the coding. In addition, the embodiment of the present application determines the code rate of each stage in the multi-stage coding based on parameters related to channel conditions, such as MCS, SNR, modulation order, or coding rate. That is, the code rate is divided based on the good or bad channel conditions. Therefore, it is possible to simultaneously improve the decoding performance of the multi-stage coding and reduce the decoding complexity of the multi-stage coding.

[0259] It can be understood that the schemes S401 to S403 above first consider the channel conditions to divide the code rates of the component codes at each stage, and then determine the code lengths of the component codes at each stage based on the determined code rates. In practical applications, the code lengths of the component codes at each stage can also be divided based on the channel conditions, and then the code rates of the component codes at each stage can be determined based on the determined code lengths.

[0260] For example, the protocol or system specifies the encoded code length (such as n1, n2), and the first communication device can determine the pre-encoded bits (such as k1, k2) of the component code corresponding to at least one stage in the multi-stage encoding of the information bits based on the first MCS or the first SNR or the first modulation order or the first coding rate, and then obtain the corresponding component code rate (such as r1=k1 / n1, such as r2=k2 / n2). Among them, the specific implementation method of the first communication device determining the pre-encoded bits of the component code corresponding to at least one stage in the multi-stage encoding of the information bits based on the first MCS or the first SNR or the first modulation order or the first coding rate can be referred to the specific implementation method of the first communication device determining the component code rate corresponding to at least one stage in the multi-stage encoding of the information bits based on the first MCS or the first SNR or the first modulation order or the first coding rate (such as Tables 1A to 4A, Tables 1B to 4B, Tables 1C to 4C, Tables 1D to 4D, etc.), which will not be repeated here.

[0261] For example, the protocol or system specifies the code length before encoding (such as k1, k2), and the first communication device can determine the encoded bits (such as n1, n2) of the component code corresponding to at least one stage in the multi-stage encoding of the information bits based on the first MCS or the first SNR or the first modulation order or the first coding rate, and then obtain the code rate of the corresponding component code (such as r1=k1 / n1, such as r2=k2 / n2). Among them, the specific implementation method of the first communication device determining the encoded bits of the component code corresponding to at least one stage in the multi-stage encoding of the information bits based on the first MCS or the first SNR or the first modulation order or the first coding rate can be referred to the specific implementation method of the first communication device determining the code rate of the component code corresponding to at least one stage in the multi-stage encoding of the information bits based on the first MCS or the first SNR or the first modulation order or the first coding rate (such as Tables 1A to 4A, Tables 1B to 4B, Tables 1C to 4C, Tables 1D to 4D, etc.), which will not be repeated here.

[0262] In one possible design, after the coded bits are output, rate matching is performed on the coded bits. In an embodiment of the present application, rate matching can be performed on the component codes of each stage in the multi-stage coding.

[0263] Still taking two-stage coding as an example: the component code (code length is n1) corresponding to the first stage in multi-stage coding can be rate matched according to the first target code length (such as z1); and the component code (code length is n2) corresponding to the second stage in multi-stage coding can be rate matched according to the second target code length (such as z2).

[0264] For example, for the component code corresponding to the first stage, hereinafter referred to as the first component code, when matching n1 bits to z1 transmissions, the following cases can be handled:

[0265] If n1 ≥ z1, the rate matching methods of the first component code include but are not limited to the following:

[0266] Method 1: Transmit the first z1 bits among the n1 bits of the first component code;

[0267] Method 1: Transmit the last z1 bits among the n1 bits of the first component code;

[0268] Option 3: Interleave the first component code with a length of n1, and then transmit the first z1 bits after interleaving.

[0269] If n1 < z1, the bits in the first component code can be repeatedly transmitted in a loop. For example, after sequentially transmitting the n1 bits of the first component code, then transmit the first (z1 - n1) bits among the n1 bits of the first component code.

[0270] For example, for the component code corresponding to the second stage, hereinafter referred to as the second component code, when matching n2 bits to z2 transmissions, the following cases can be handled:

[0271] If n2 ≥ z2, the rate matching methods of the second component code include but are not limited to the following:

[0272] Method 1: Transmit the first z2 bits among the n2 bits of the second component code;

[0273] Method 1: Transmit the last z2 bits among the n2 bits of the second component code;

[0274] Option 3: Interleave the second component code with a length of n2, and then transmit the first z2 bits after interleaving.

[0275] If n2 < z2, the bits in the second component code can be repeatedly transmitted in a loop. For example, after sequentially transmitting the n2 bits of the second component code, then transmit the first (z2 - n2) bits among the n2 bits of the second component code.

[0276] In a specific implementation, the target code lengths corresponding to each stage in multi-stage coding can be specified by the protocol or agreed upon by the system. For example, the protocol gives the values of z1 and z2 above.

[0277] In another specific implementation, the protocol specifies or the system agrees on an overall target code length for multi-stage coding, for example, z, where z = z1 × z2. z1 is related to the first MCS, the first SNR, the first modulation order, or the first coding rate, i.e., z1 can be determined based on the first MCS, the first SNR, the first modulation order, or the first coding rate. z2 is also related to the first MCS, the first SNR, the first modulation order, or the first coding rate, i.e., z2 can be determined based on the first MCS, the first SNR, the first modulation order, or the first coding rate; alternatively, z2 can be determined based on z and z1, e.g., z2 = z / z1.

[0278] The above design improves the flexibility of rate matching by performing rate matching on the component codes of each stage in multi-stage coding separately. It also helps to disperse the punctured or repeated bits in the rate matching process to various positions in the coded bits, which helps to further improve the decoding performance of multi-stage coding.

[0279] It is understood that the above embodiments can be implemented separately or in combination with each other. In order to better understand the technical solution provided by the embodiment of the present application, a more complete encoding process is given below to illustrate the embodiment of the present application.

[0280] As shown in FIG5 , an example of an encoding process provided in an embodiment of the present application includes the following steps:

[0281] Step 501: Adjust the input bit length. The first communication device sends a total of A bits. If A is not divisible by k=k1·k2, the input A bits are adjusted in any of the following ways:

[0282] Method 1: Add a zeros at the beginning of A bits;

[0283] Method 2: Add a zeros at the end of A bits;

[0284] Method 3: Copy the first a bits of A bits and place them at the last position of A bits;

[0285] Method 4: Copy the a bits after A bits and place them at the front of A bits.

[0286] in,

[0287] Step S502: Parameters are acquired or calculated, including the number of bits k1 and k2 before encoding of the first component code and the second component code of the product code, and the code rates r1 and r2 of the first component code and the second component code.

[0288] For example, r1 and r2 are obtained according to the first MCS, the first SNR, the first modulation order, the first coding rate, etc.; or, r1 is obtained according to the first MCS, the first SNR, the first modulation order, the first coding rate, etc., and r2=r / r1 is calculated according to the total code rate r and r1.

[0289] For example, the number of bits before encoding (k1 and k2) can be obtained by any of the following methods:

[0290] Method 1: The system specifies k1 and k2;

[0291] Method 2: Obtain k1 / k according to the first MCS, the first SNR, the first modulation order, the first coding rate, etc., and then calculate k1=k·k1 / k and k2=k / k1.

[0292] Then, the coded bits n1 and n2 are calculated based on k1 and k2, r1 and r2; alternatively, the system specifies n1 and n2; alternatively, n1 / n is obtained based on the first MCS, the first SNR, the first modulation order, the first coding rate, etc., and then n1=n·n1 / n, n2=n / n1 is calculated.

[0293] Step S503: Encoding. For the first component code (row direction), Get the code of (n1, k1). For the second component code (column direction), according to Get the code of (n2,k2). Due to the two-stage coding, The encoding result is The input, therefore There are k1 codes in total. There are m2 codes in total.

[0294] Step S504: rate matching.

[0295] For example, for the component code corresponding to the first stage, hereinafter referred to as the first component code, it is necessary to match n1 bits to z1 transmissions, which can be handled as follows:

[0296] If n1 ≥ z1, the rate matching methods of the first component code include but are not limited to the following:

[0297] Mode 1: Send the first z1 bits of the n1 bits of the first component code;

[0298] Mode 1: Send the last z1 bits of the n1 bits of the first component code;

[0299] Option 3: Perform n1-length interleaving on the first component code, and then send the first z1 bits after interleaving.

[0300] If n1 < z1, the bits in the first component code can be repeatedly cycled and sent. For example, after sequentially sending the n1 bits of the first component code, then send the (z1 - n1) most front bits among the n1 bits of the first component code.

[0301] For example, for the component code corresponding to the second stage, hereinafter referred to as the second component code, when n2 bits need to be matched to z2 for sending, it can be processed according to the following situations:

[0302] If n2 ≥ z2, the rate matching methods of the second component code include but are not limited to the following:

[0303] Method 1: Send the first z2 bits among the n2 bits of the second component code;

[0304] Method 2: Send the last z2 bits among the n2 bits of the second component code;

[0305] Option 3: Interleave the second component code with a length of n2, and then send the first z2 bits after interleaving.

[0306] If n2 < z2, the bits in the second component code can be repeatedly cycled and sent. For example, after sequentially sending the n2 bits of the second component code, then send the (z2 - n2) most front bits among the n2 bits of the second component code.

[0307] Step S505: Concatenation. Exemplarily, the obtained n2 × n1 after rate matching can be read out and sent in any of the following forms.

[0308] Method 1: Send row by row. That is, first send the coding result of the first first component code, and finally send the coding result of the first component code corresponding to the check bit of the second component code.

[0309] Method 2: Send column by column. That is, first send the coding result of the first second component code, and finally send the coding result of the second component code corresponding to the last bit check bit of the first component code.

[0310] Of course, the above process is only a possible example, and the actual situation is not limited to this.

[0311] The encoding method provided by the embodiments of the present application is introduced above. The decoding (or decoding) method provided by the embodiments of the present application is introduced below.

[0312] See Figure 6, which is a flowchart of a decoding method provided in an embodiment of the present application, which can be applied to the communication system shown in Figure 3. The method can be performed by a second communication device. Unless otherwise specified, the "second communication device" in this application can refer to the second communication device itself (for example, the terminal device or network device shown in Figure 3), or a component in the second communication device (for example, a processor, a chip, or a chip system, etc.), or a logic module or software that can implement all or part of the functions of the second communication device.

[0313] The method includes S601 to S602:

[0314] S601, obtaining coded bits;

[0315] It can be understood that the coded bits here may be the coded bits output in the method shown in FIG. 3 above.

[0316] S602: Perform multi-stage decoding on the coded bits to obtain information bits.

[0317] It can be understood that multi-stage decoding of coded bits is the reverse process of multi-stage encoding of information bits. Exemplarily, the code rate of the component code corresponding to at least one stage in the multi-stage decoding of coded bits is determined based on a first MCS, a first SNR, a first modulation order, or a first coding rate, wherein the first MCS is the MCS used for the coded bits and information bits, the first SNR is the SNR of the channel used to carry the coded bits, the first modulation order is the modulation order used for the coded bits, and the first coding rate is the coding rate used for the coded bits; the coded bits are multi-stage encoded according to the code rates of the component codes corresponding to each stage in the multi-stage encoding to obtain the information bits.

[0318] The specific decoding process can refer to the encoding process in the above encoding method, which will not be elaborated here.

[0319] In the decoding method provided in S601 to S602 above, a specific method for dividing the code rate (such as r1, 2) and code length (such as n1, n2, or k1, k2) of each stage in multi-stage decoding is provided, thereby improving the reliability of decoding. In addition, the embodiment of the present application determines the code rate of each stage in multi-stage encoding based on parameters related to channel conditions, such as MCS, SNR, modulation order, or coding rate. That is, the code rate is divided based on the good or bad channel conditions. Therefore, it is possible to simultaneously improve the decoding performance of multi-stage decoding and reduce the decoding complexity of multi-stage decoding.

[0320] The above describes the method provided by the embodiment of the present application in conjunction with the accompanying drawings, and the following describes the device provided by the embodiment of the present application in conjunction with the accompanying drawings. These communication devices can be used to implement the functions of the above method embodiments, and thus can also achieve the beneficial effects of the above method embodiments.

[0321] 7 is a schematic diagram of the structure of a possible communication device provided in an embodiment of the present application, including an input / output module 701 and a processing module 702. The input / output module 701 may include only an input module, or only an output module, or both an input module and an output module.

[0322] When the communication device 700 is used to implement the function of the first communication device in the method embodiment shown in Figure 3: the processing module 702 is used to: determine the code rate of the component code corresponding to at least one stage in the multi-stage encoding of the information bits based on the first MCS or the first SNR or the first modulation order or the first coding rate, wherein the first MCS is the MCS used for the information bits, the first SNR is the SNR of the channel used to carry the information bits, the first modulation order is the modulation order used for the information bits, and the first coding rate is the coding rate used for the information bits; perform multi-stage encoding on the information bits according to the code rate of the component code corresponding to each stage in the multi-stage encoding to obtain coded bits; the input and output module 701 is used to: output the coded bits.

[0323] A more detailed description of the processing module 702 and the input / output module 701 can be directly obtained by referring to the relevant description in the method embodiment shown in FIG4 , and will not be repeated here.

[0324] Exemplarily, when the communication apparatus 700 is used to implement the function of the second communication device in the method embodiment shown in FIG6 , the input-output module 701 is used to obtain coded bits; the processing module 702 is used to perform multi-stage decoding on the coded bits to obtain information bits.

[0325] A more detailed description of the processing module 702 and the input / output module 701 can be directly obtained by referring to the relevant description in the method embodiment shown in FIG6 , and will not be repeated here.

[0326] Based on the same technical concept, an embodiment of the present application further provides a communication device 800. As shown in FIG8 , the communication device 800 includes a processor 810 and an interface circuit 820. The processor 810 and the interface circuit 820 are coupled to each other. It is understood that the interface circuit 820 can be a transceiver or an input / output interface.

[0327] Optionally, the communication device 800 may further include a memory 830 for storing instructions executed by the processor 810 or storing input data required by the processor 810 to execute instructions or storing data generated after the processor 810 executes instructions.

[0328] When the communication device 800 is used to implement the device shown in FIG. 7 , the processor 810 is used to implement the functions of the processing module 702 , and the interface circuit 820 is used to implement the functions of the input / output module 701 .

[0329] It should be understood that the processors mentioned in the embodiments of the present application can be implemented by hardware or software. When implemented by hardware, the processor can be a logic circuit, an integrated circuit, etc. When implemented by software, the processor can be a general-purpose processor that is implemented by reading software code stored in a memory.

[0330] Exemplarily, the processor may be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field programmable gate arrays (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor or any conventional processor, etc.

[0331] It should be understood that the memory mentioned in the embodiments of the present application may be a volatile memory or a non-volatile memory, or may include both volatile and non-volatile memories. Among them, the non-volatile memory may be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The volatile memory may be a random access memory (RAM), which is used as an external cache. By way of example and not limitation, many forms of RAM are available, such as static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous link dynamic random access memory (SLDRAM), and direct RAM bus random access memory (DR RAM).

[0332] It should be noted that when the processor is a general-purpose processor, DSP, ASIC, FPGA or other programmable logic device, discrete gate or transistor logic device, discrete hardware component, the memory (storage module) can be integrated into the processor.

[0333] It should be noted that the memory described herein is intended to include, but not be limited to, these and any other suitable types of memory.

[0334] Based on the same technical concept, an embodiment of the present application further provides a chip, see Figure 9, which may include a logic circuit and an input / output interface. Optionally, a memory may also be included. The input / output interface may be used to receive code instructions (the code instructions are stored in the memory, which may be read directly from the memory, or may be read from the memory through other devices) and transmit them to the logic circuit; the logic circuit may be used to run the code instructions to execute the method in the above method embodiment.

[0335] Alternatively, the input / output interface may be a signal transmission interface circuit between a logic circuit and a transceiver. For example, in a transmission scenario, the logic circuit is used to perform XX to obtain Y data (XX is a non-air interface operation, including but not limited to determination, judgment, processing, calculation, search, comparison, and other operations); the input / output interface may be used to send Y data to a transmitter (the transmitter is used to perform the transmission operation on the air interface). For another example, in a reception scenario, the input / output interface may be used to receive Z data from a receiver (the receiver is used to perform the reception operation on the air interface) and send the Z data to the logic circuit; the logic circuit is used to perform XX processing on the Z data (XX is a non-air interface operation, including but not limited to determination, judgment, processing, calculation, search, comparison, and other operations).

[0336] Exemplarily, when the chip is used to implement the function of the first communication device in the method embodiment shown in FIG4 :

[0337] The logic circuit is configured to: determine, based on a first MCS or a first SNR or a first modulation order or a first coding rate, a code rate of a component code corresponding to at least one stage in multi-stage encoding of information bits, wherein the first MCS is an MCS used for the information bits, the first SNR is an SNR of a channel used to carry the information bits, the first modulation order is a modulation order used for the information bits, and the first coding rate is a coding rate used for the information bits; and perform multi-stage encoding on the information bits according to the code rates of the component codes corresponding to each stage in the multi-stage encoding to obtain coded bits;

[0338] The input and output interface is used to: output coded bits.

[0339] A more detailed description of the above logic circuit and input / output interface can be directly obtained by referring to the relevant description in the method embodiment shown in FIG4 , and is not repeated here.

[0340] When the chip is used to implement the function of the second communication device in the method embodiment shown in FIG6 :

[0341] The input and output interfaces are used to: obtain coded bits;

[0342] The logic circuit is used to perform multi-stage decoding on the coded bits to obtain information bits.

[0343] A more detailed description of the above logic circuit and input and output interfaces can be directly obtained by referring to the relevant description in the method embodiment shown in FIG6 , and will not be repeated here.

[0344] Based on the same technical concept, an embodiment of the present application also provides a computer-readable storage medium, which stores a computer program or instruction. When the computer program or instruction is executed by a communication device, the method in the above method embodiment is implemented.

[0345] Based on the same technical concept, an embodiment of the present application further provides a computer program product, which, when executed on a computer, enables the method in the above method embodiment to be executed.

[0346] Those skilled in the art will appreciate that the embodiments of the present application can be provided as methods, systems, or computer program products. Therefore, the present application can adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment in combination with software and hardware. Moreover, the present application can adopt the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to magnetic disk storage, CD-ROM, optical storage, etc.) that contain computer-usable program code.

[0347] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the present application. It should be understood that each flow and / or box in the flow chart and / or block diagram, as well as the combination of the flow chart and / or box in the flow chart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device produce a device for implementing the functions specified in one or more flow charts and / or one or more boxes in the block diagram.

[0348] These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce a product including an instruction device that implements the functions specified in one or more processes in the flowchart and / or one or more boxes in the block diagram.

[0349] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, so that the instructions executed on the computer or other programmable device provide steps for implementing the functions specified in one or more processes in the flowchart and / or one or more boxes in the block diagram.

Claims

1. A coding method, characterized in that: The method comprises: Determining a code rate of a component code corresponding to at least one stage in multi-stage encoding of information bits according to a first modulation and coding scheme MCS or a first signal-to-noise ratio SNR or a first modulation order or a first coding rate, wherein the first MCS is the MCS adopted for the information bits, the first SNR is the SNR of a channel used to carry the information bits, the first modulation order is the modulation order adopted for the information bits, and the first coding rate is the coding rate adopted for the information bits; Performing the multi-stage encoding on the information bits according to the code rates of the component codes corresponding to each stage in the multi-stage encoding to obtain coded bits; The coded bits are output.

2. The method according to claim 1, wherein The determining, according to the first MCS or the first SNR or the first modulation order or the first coding rate, the code rate of the component code corresponding to at least one stage in the multi-stage coding includes: The code rate of the component code corresponding to the first stage in the multi-stage coding is determined according to the first MCS or the first SNR or the first modulation order or the first coding rate, where the first stage is the first coding stage in the multi-stage coding.

3. The method according to claim 2, wherein The determining, according to the first MCS or the first SNR or the first modulation order or the first coding rate, a code rate of a component code corresponding to the first stage in the multi-stage coding includes: Determine the code rate of the component code corresponding to the first stage corresponding to the first MCS according to the correspondence between the MCS and the code rate of the component code corresponding to the first stage; or Determine the code rate of the component code corresponding to the first stage corresponding to the first SNR according to the corresponding relationship between the SNR and the code rate of the component code corresponding to the first stage; or Determining the code rate of the component code corresponding to the first stage corresponding to the first modulation order according to the corresponding relationship between the modulation order and the code rate of the component code corresponding to the first stage; or According to the correspondence between the coding rate and the code rate of the component code corresponding to the first stage, the code rate of the component code corresponding to the first stage corresponding to the first coding rate is determined.

4. The method according to claim 3, wherein The code rate of the component code corresponding to the first stage is positively correlated with the MCS or the SNR or the modulation order or the coding rate.

5. The method according to any one of claims 2 to 4, characterized in that The multi-stage encoding is a two-stage encoding, and the two-stage encoding includes the first stage and the second stage; Determining a code rate of a component code corresponding to at least one stage in multi-stage coding according to a first MCS, a first SNR, a first modulation order, or a first coding rate, further comprising: The code rate of the component code corresponding to the second stage is determined according to the first MCS or the first SNR or the first modulation order or the first coding rate.

6. The method according to claim 5, wherein Determining a code rate of a component code corresponding to the second stage according to the first MCS or the first SNR or the first modulation order or the first coding rate includes: Determine the code rate of the component code corresponding to the second stage corresponding to the first MCS according to the correspondence between the MCS and the code rate of the component code corresponding to the second stage; or Determine the code rate of the component code corresponding to the second stage corresponding to the first SNR according to the corresponding relationship between the SNR and the code rate of the component code corresponding to the second stage; or Determining the code rate of the component code corresponding to the second stage corresponding to the first modulation order according to the corresponding relationship between the modulation order and the code rate of the component code corresponding to the second stage; or The code rate of the component code corresponding to the second stage corresponding to the first coding rate is determined according to the correspondence between the coding rate and the code rate of the component code corresponding to the second stage.

7. The method according to claim 5 or 6, wherein: The code rate of the component code corresponding to the second stage is negatively correlated with the MCS or the SNR or the modulation order or the coding rate.

8. The method according to any one of claims 2 to 4, wherein: The multi-stage encoding is a two-stage encoding, and the two-stage encoding includes the first stage and the second stage; The method further comprises: The bit rate of the component code corresponding to the second stage is determined according to the bit rate of the component code corresponding to the first stage and the total bit rate of the two-stage encoding.

9. The method according to any one of claims 1 to 8, wherein The performing the multi-stage encoding on the information bits according to the code rate of the component code corresponding to each stage in the multi-stage encoding includes: The multi-stage encoding is performed on the information bits according to the code rate, the number of bits before encoding, and the number of bits after encoding of the component codes corresponding to each stage in the multi-stage encoding.

10. The method according to claim 9, wherein The method further comprises: The number of bits after encoding of the component code corresponding to each stage in the multi-stage encoding is determined according to the code rate and the number of bits before encoding of the component code corresponding to each stage in the multi-stage encoding.

11. The method according to claim 10, wherein The method further comprises: The total number of bits before encoding of the multi-stage encoding and the first proportional coefficient determine the number of bits before encoding of the component code corresponding to each stage in the multi-stage encoding; wherein the first proportional coefficient is the ratio of the number of bits before encoding of the component code corresponding to the first stage in the multi-stage encoding to the total number of bits before encoding.

12. The method according to claim 11, wherein The method further comprises: Determine the first proportionality coefficient corresponding to the first MCS according to the correspondence between the MCS and the proportionality coefficient; or Determine the first proportionality coefficient corresponding to the first SNR according to the corresponding relationship between SNR and proportionality coefficient; or, determining the first proportional coefficient corresponding to the first modulation order according to the corresponding relationship between the modulation order and the proportional coefficient; or The first proportional coefficient corresponding to the first coding rate is determined according to the corresponding relationship between the coding rate and the proportional coefficient.

13. The method according to claim 12, wherein: The proportional coefficient is positively correlated with the MCS, the SNR, the modulation stage, or the coding rate.

14. The method according to claim 9, wherein The method further comprises: The number of bits before encoding of the component code corresponding to each stage in the multi-stage encoding is determined according to the code rate and the number of bits after encoding of the component code corresponding to each stage in the multi-stage encoding.

15. The method according to claim 14, wherein The method further comprises: The total number of bits after encoding of the multi-stage encoding and the second proportional coefficient determine the number of bits after encoding of the component code corresponding to each stage in the multi-stage encoding; wherein the second proportional coefficient is the ratio of the number of bits after encoding of the component code corresponding to the first stage in the multi-stage encoding to the total number of bits after encoding.

16. The method according to claim 15, wherein The method further comprises: Determine the second proportional coefficient corresponding to the first MCS according to the correspondence between the MCS and the proportional coefficient; or, Determine the second proportional coefficient corresponding to the first SNR according to the corresponding relationship between SNR and proportional coefficient; or, determining the second proportional coefficient corresponding to the first modulation order according to the corresponding relationship between the modulation order and the proportional coefficient; or The second proportional coefficient corresponding to the first coding rate is determined according to the corresponding relationship between the coding rate and the proportional coefficient.

17. The method according to claim 16, wherein The proportional coefficient is positively correlated with the MCS, the SNR, the modulation stage, or the coding rate.

18. The method according to any one of claims 1 to 17, wherein: Also includes: Performing rate matching on component codes corresponding to the first stage of the multi-stage encoding according to the first target code length; and Rate matching is performed on component codes corresponding to the second stage in the multi-stage encoding according to the second target code length.

19. The method according to any one of claims 1 to 18, wherein: Performing the multi-stage encoding on the information bits according to the code rates of the component codes corresponding to each stage in the multi-stage encoding includes: If the number of the information bits is not divisible by the total number of bits before encoding in the multi-stage encoding, performing at least one of repetition and zero padding on the information bits so that the processed information bits are divisible by the total number of bits before encoding in the multi-stage encoding; The multi-stage encoding is performed on the processed information bits according to the code rate of the component code corresponding to each stage in the multi-stage encoding.

20. The method according to any one of claims 1 to 19, wherein The multi-stage encoding is a product code.

21. A coding method, characterized in that include: determining the number of bits after encoding of the component code corresponding to each stage according to the code rate of the component code corresponding to each stage in the multi-stage encoding of the information bits and the number of bits before encoding, or determining the number of bits before encoding of the component code corresponding to each stage according to the code rate of the component code corresponding to each stage in the multi-stage encoding of the information bits and the number of bits after encoding; Performing multi-stage encoding on the information bits according to the code rate, the number of bits before encoding, and the number of bits after encoding of the component codes corresponding to each stage in the multi-stage encoding to obtain coded bits; The coded bits are output.

22. The method according to claim 21, wherein Also includes: The number of pre-encoding bits of the component codes corresponding to each stage in the multi-stage encoding is determined according to the total number of pre-encoding bits of the multi-stage encoding and a first proportional coefficient; wherein the first proportional coefficient is the ratio of the number of pre-encoding bits of the component codes corresponding to the first stage in the multi-stage encoding to the total number of pre-encoding bits.

23. The method according to claim 21, wherein Also includes: Determining the first proportionality coefficient corresponding to the first MCS according to a correspondence between the MCS and the proportionality coefficient; or, Determine the first proportionality coefficient corresponding to the first SNR according to the corresponding relationship between SNR and proportionality coefficient; or, determining the first proportional coefficient corresponding to the first modulation order according to the corresponding relationship between the modulation order and the proportional coefficient; or The first proportional coefficient corresponding to the first coding rate is determined according to the corresponding relationship between the coding rate and the proportional coefficient.

24. The method according to claim 23, wherein The proportional coefficient is positively correlated with the MCS, the SNR, the modulation stage, or the coding rate.

25. The method of claim 21, wherein The method further comprises: The total number of bits after encoding of the multi-stage encoding and the second proportional coefficient determine the number of bits after encoding of the component code corresponding to each stage in the multi-stage encoding; wherein the second proportional coefficient is the ratio of the number of bits after encoding of the component code corresponding to the first stage in the multi-stage encoding to the total number of bits after encoding.

26. The method of claim 22, wherein: The method further comprises: Determine the second proportional coefficient corresponding to the first MCS according to the correspondence between the MCS and the proportional coefficient; or, Determine the second proportional coefficient corresponding to the first SNR according to the corresponding relationship between SNR and proportional coefficient; or, determining the second proportional coefficient corresponding to the first modulation order according to the corresponding relationship between the modulation order and the proportional coefficient; or The second proportional coefficient corresponding to the first coding rate is determined according to the corresponding relationship between the coding rate and the proportional coefficient.

27. The method according to claim 26, wherein The proportional coefficient is positively correlated with the MCS, the SNR, the modulation stage, or the coding rate.

28. A decoding method, characterized in that: The method comprises: Obtaining coded bits, wherein the coded bits are the coded bits described in the method according to any one of claims 1 to 20; The coded bits are decoded in multiple stages to obtain information bits.

29. A decoding method, characterized in that: The method comprises: Get coded bits; Determining a code rate of a component code corresponding to at least one stage in multi-stage decoding of the coded bits according to a first MCS or a first SNR or a first modulation order or a first coding rate, wherein the first MCS is an MCS used for the coded bits, the first SNR is an SNR of a channel used to carry the coded bits, the first modulation order is a modulation order used for the coded bits, and the first coding rate is a coding rate used for the coded bits; The coded bits are multi-stage encoded according to the code rates of the component codes corresponding to each stage in the multi-stage encoding to obtain information bits.

30. A communication device, characterized in that: The method comprises a module for executing the method according to any one of claims 1 to 20, or a module for executing the method according to any one of claims 21 to 27, or a module for executing the method according to claim 28, and a module for executing the method according to claim 29.

31. A communication device, characterized in that: The invention comprises a processor and a memory; wherein the processor and the memory are coupled, the memory is used to store computer-executable instructions, and the processor is used to execute the computer-executable instructions stored in the memory, so that the communication device executes the method as described in any one of claims 1 to 20, or executes the method as described in any one of claims 21 to 27, or executes the method as described in claim 28, or executes the method as described in claim 29.

32. A chip, characterized in that: It includes a logic circuit and an input / output interface; wherein the input / output interface is used to receive signals from other devices outside the chip and transmit them to the logic circuit or send signals from the logic circuit to other devices outside the chip, and the logic circuit is used to implement the method as described in any one of claims 1 to 20, or implement the method as described in any one of claims 21 to 27, or implement the method as described in claim 28, or implement the method as described in claim 29.

33. A computer-readable storage medium, characterized in that The storage medium stores a computer program or instruction. When the computer program or instruction is executed by the communication device, it implements the method described in any one of claims 1 to 20, or the method described in any one of claims 21 to 27, or the method described in claim 28, or the method described in claim 29.

34. A computer program product, characterized in that When the computer program product is run on a computer, the method according to any one of claims 1 to 20 is executed, or the method according to any one of claims 21 to 27 is executed, or the method according to claim 28 is executed, or the method according to claim 29 is executed.

35. A communication system, characterized in that: including a first communication device and a second communication device; The first communication device is used to execute the method according to any one of claims 1 to 20, and the second communication device is used to execute the method according to claim 28; or The first communication device is used to execute the method according to any one of claims 21 to 27, and the second communication device is used to execute the method according to claim 29.

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