Encoder capable of detecting abnormality in operation setting
The encoder's integrated memory and comparison system accurately verifies operational settings, preventing abnormalities by comparing them with reference settings and triggering corrective actions.
Patent Information
- Application Number
- PCT/JP2024/003885
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-02-06
- Publication Date
- 2025-08-14
AI Technical Summary
Encoders face operational abnormalities due to incorrect or unreadable operational setting information, leading to improper functioning, which is not detected by existing technologies.
The encoder incorporates a first memory unit for operational setting information, a second memory unit for reference setting information, and a comparison unit to verify the accuracy of the operational settings, with a judgment unit to detect abnormalities.
Accurately detects operational setting abnormalities, ensuring the encoder functions correctly by comparing operational settings with reference settings, and triggers alarms or control actions if abnormalities are detected.
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Figure JP2024003885_14082025_PF_FP_ABST
Abstract
Description
Encoder capable of detecting operational setting abnormalities
[0001] The present disclosure relates to an encoder capable of detecting abnormalities in its operating settings.
[0002] Machine tools and robots are equipped with encoders for detecting the rotational and linear displacement of objects. For example, rotary encoders are used to detect the rotational position information of rotating bodies such as motor shafts and moving parts of robots installed in machine tools and robots. Linear encoders are also used to detect the linear position information of linearly moving bodies that move linearly in machine tools and robots. Various types of encoders are used appropriately depending on the required accuracy and application environment. Encoders are equipped with a processing unit for controlling various built-in circuits. In order to reduce the manufacturing costs of encoders, the same type of processing unit is often installed in common even for different models of encoders.
[0003] Since the operation of the various internal circuits of an encoder differs depending on the model of the encoder, it is necessary to change the operation of the arithmetic processing unit relative to the internal circuits. For this reason, information for setting the operating state of the internal circuits (hereinafter referred to as "operational setting information") is prepared for each model. The operational setting information corresponding to the encoder model is written in advance into the memory within the encoder by an operator. When the encoder is actually put into operation, the operational setting information is read from the memory and loaded into the arithmetic processing unit when the encoder is started up, and the arithmetic processing unit controls the various internal circuits based on the operational setting information, thereby realizing operation corresponding to the encoder model.
[0004] JP 2011-64470 A JP 7-301545 A
[0005] The operational setting information for the arithmetic processing unit in the encoder is written to memory by an operator during the manufacture of the encoder, etc. If the operational setting information written to memory contains an error, the arithmetic processing unit will not operate normally under the incorrect operational setting information, resulting in an abnormality in the operation of the encoder. Furthermore, even if the operational setting information written to memory is correct, if for some reason the operational setting information cannot be correctly loaded into the arithmetic processing unit, the arithmetic processing unit will not operate normally, resulting in an abnormality in the operation of the encoder. Therefore, it is desirable to accurately detect whether or not there is an abnormality in the operational setting information that defines the operating state of the internal circuitry in the encoder.
[0006] According to one aspect of the present disclosure, the encoder comprises a first memory unit that stores operation setting information having setting contents for multiple items that define the operating state of the encoder's internal circuitry; a second memory unit that stores at least one pre-registered reference setting information having setting contents for multiple items; a comparison unit that compares the operation setting information read from the first memory unit with the reference setting information read from the second memory unit; and a judgment unit that judges whether or not there is an abnormality in the operation setting information read from the first memory unit based on the comparison result by the comparison unit.
[0007] FIG. 1 is a block diagram showing an encoder according to a first, second, and fourth embodiment of the present disclosure. FIG. 2 is a block diagram showing modified examples of the encoder according to the first, second, and fourth embodiment of the present disclosure. FIG. 3 is a flowchart showing an abnormality determination process in an encoder according to a first embodiment of the present disclosure. FIG. 4 is a diagram illustrating a case where operation setting information is determined to be normal in the abnormality determination process in an encoder according to the first embodiment of the present disclosure. FIG. 5 is a flowchart showing an abnormality determination process in an encoder according to a second embodiment of the present disclosure. FIG. 6 is a diagram illustrating a case where operation setting information is determined to be normal in the abnormality determination process in an encoder according to the second embodiment of the present disclosure. FIG. 7 is a block diagram showing an encoder according to a third embodiment of the present disclosure. FIG. 8 is a flowchart showing an abnormality determination process in an encoder according to the third embodiment of the present disclosure. FIG. 9 is a diagram illustrating a case where operation setting information is determined to be normal in the abnormality determination process in an encoder according to the third embodiment of the present disclosure. FIG. 10 is a diagram illustrating a case where operation setting information is determined to be abnormal in the abnormality determination process in an encoder according to the third embodiment of the present disclosure. 10A and 10B are diagrams illustrating a case where the operation setting information is determined to be normal in the abnormality determination process in the encoder according to the fourth embodiment of the present disclosure, and a diagram illustrating a case where the operation setting information is determined to be abnormal in the abnormality determination process in the encoder according to the fourth embodiment of the present disclosure.
[0008] Hereinafter, an embodiment of an encoder capable of detecting an abnormality in operational settings will be described with reference to the drawings. In the following description, components having the same or similar functions will be assigned the same reference numerals. Duplicate descriptions of those components may be omitted. The scale of the drawings has been changed as appropriate to facilitate understanding.
[0009] In the following description, the "position information" of an object detected by an encoder includes the "rotational position information" of a rotating object detected by a rotary encoder and the "linear position information" of a linearly moving object detected by a linear encoder. The "position information detection process" by an encoder includes the "rotational position information detection process" by a rotary encoder and the "linear position information detection process" by a linear encoder. "Position information" is sometimes referred to as "displacement information." The term "model" is also used to distinguish between different types of encoder products. Encoders of the same model have the same performance, functions, specifications, dimensions, appearance, and version. Different encoder models differ in at least one of the following: performance, functions, specifications, dimensions, appearance, and version. A "reference encoder" is an ideal encoder with no errors in various settings, serving as a reference for determining whether an encoder is abnormal. Reference setting information corresponding to the reference encoder is specified in a reference setting table. "Connected" means "electrically connected."
[0010] <First Embodiment of the Present Disclosure> Fig. 1 is a block diagram showing encoders according to the first, second, and fourth embodiments of the present disclosure. The configuration shown in Fig. 1 is also applicable to the second and fourth embodiments described below. However, the contents of the reference setting table stored in the second storage unit 12 and the operation contents of the comparison unit 13 and the determination unit 14 differ between the embodiments.
[0011] The encoder 1 is attached to a detection object and detects position information about the detection object. If the encoder 1 is a rotary encoder, it detects rotational position information of a rotating body such as a motor shaft or a moving part of a robot provided in a machine tool or robot. If the encoder 1 is a linear encoder, it detects linear position information of a linearly moving body that moves linearly in a machine tool or robot. In the following figures, the rotating body or linearly moving body to which the encoder 1 is attached is not shown. The power supply for driving the encoder 1 is also not shown.
[0012] The encoder 1 according to the first embodiment of the present disclosure includes a first storage unit 11, a second storage unit 12, a comparison unit 13, a determination unit 14, a processing unit 20, and an encoder built-in circuit 21.
[0013] The arithmetic processing device 20 includes a control unit 10, a comparison unit 13, a determination unit 14, and other processing units. The arithmetic processing device 20 is configured using an LSI (Large Scale Integration), an FPGA (Field Programmable Gate Array), an ASIC (Application Specific Integrated Circuit), or the like. Various types of encoders are used appropriately depending on the required accuracy, application environment, etc. In order to reduce the manufacturing cost of the encoder, the same type of arithmetic processing device is often installed in common even for different models of encoders.
[0014] Since the operation of the encoder built-in circuit 21 differs depending on the model of the encoder, it is necessary to change the operation of the arithmetic processing unit 20 with respect to the encoder built-in circuit 21. For this reason, operation setting information for setting the operating state of the encoder built-in circuit 21 is prepared for each model.
[0015] The control unit 10 in the arithmetic processing unit 20 controls the encoder built-in circuit 21 in accordance with operation setting information corresponding to the model of the encoder 1. Examples of the encoder built-in circuit 21 include an AD converter, memory, an optical or magnetic sensor unit, a communication interface, and other peripheral circuits. Note that the encoder built-in circuit 21 may include some of the functions of the arithmetic processing unit 20.
[0016] The first memory unit 11 stores operational setting information. The operational setting information is defined for each model of the encoder 1. The operational setting information includes multiple items that define the operational state of the encoder-internal circuit 21, and settings are made for each item corresponding to the model. Examples of items include setting items for signal processing of the A, B, C, and Z phases, setting items related to various signal correction functions, and setting items related to the operation of the AD converter, but other setting items may also be included. In the following description, the multiple items that define the operational state of the encoder-internal circuit 21 may be referred to as the first item, second item, third item, ..., nth item (n is a positive integer). The setting contents of each item of the operational setting information are determined taking into account the required accuracy of the encoder 1, the application environment, and other factors. The operational setting information, which defines the setting contents for each item, is written by an operator during manufacturing of the encoder 1, etc.
[0017] The second storage unit 12 stores a reference setting table including multiple pieces of reference setting information. The reference setting information is reference information used to detect whether or not there is an abnormality in the operational setting information. In order to realize the operation of the arithmetic processing device 20 according to the model of the encoder 1, the reference setting information included in the reference setting table is prepared for each model so as to cover all models of the encoder 1 in which the arithmetic processing device 20 is expected to be installed. In the illustrated example, the reference setting table includes, for example, reference setting information A, reference setting information B, and reference setting information C. Furthermore, in consideration of the possibility that the number of models of the encoder 1 in which the arithmetic processing device 20 is installed will increase in the future and new reference setting information will be added, the second storage unit 12 is configured with a rewritable memory (such as an EEPROM (registered trademark), PROM, UV-EPROM, or flash memory).
[0018] The reference setting information has multiple items that define the operating state of the encoder built-in circuit 21. In the first embodiment of the present disclosure, each item of the reference setting information corresponds to each item of the operation setting information. Examples of items include setting items for signal processing of each of the A, B, C, and Z phases, setting items related to various signal correction functions, and setting items related to the operation of the AD converter, but other setting items may also be included. In the first embodiment of the present disclosure and the second and third embodiments described below, each item of the reference setting information defines setting contents that will allow the encoder 1 to normally perform the functions required for the model (i.e., no abnormalities occur). Each item of the reference setting information is set according to the model of the encoder 1.
[0019] The reference setting information is registered in advance in the second storage unit 12 by an operator during the manufacture of the encoder 1, for example. The operator who writes the reference setting information in the second storage unit 12 may be different from the operator who writes the operation setting information in the first storage unit 11. As will be described later, in the first embodiment of the present disclosure, the presence or absence of an abnormality in the operation setting information read from the first storage unit 11 is determined based on the reference setting information stored in the second storage unit 12. Therefore, the setting contents of each item of the reference setting information should be written to the second storage unit 12 with the utmost accuracy.
[0020] The first storage unit 11 and the second storage unit 12 may be configured as separate memories, or a storage area for the first storage unit 11 and a storage area for the second storage unit 12 may be provided separately within the same memory. Fig. 2 is a block diagram showing a modified example of the encoder according to the first, second, and fourth embodiments of the present disclosure. As in this modified example, the second storage unit 12 may be provided in a storage area within the arithmetic processing device 20.
[0021] When the encoder 1 is started, the arithmetic processing unit 20 reads out the operation setting information from the first storage unit 11 and the reference setting table from the second storage unit 12. The comparison unit 13 in the arithmetic processing unit 20 compares the operation setting information read out from the first storage unit 11 with the reference setting information in the reference setting table read out from the second storage unit 12.
[0022] The determining section 14 determines whether or not there is an abnormality in the operational setting information read out from the first storage section 11 based on the comparison result by the comparing section 13. More details are as follows.
[0023] In the first embodiment of the present disclosure, the determination unit 14 determines that the operation setting information read out from the first storage unit 11 is normal if, as a result of the comparison by the comparison unit 13, there is reference setting information having a combination of setting contents that matches the combination of setting contents of multiple items in the operation setting information. In other words, the determination unit 14 determines that the operation setting information read out from the first storage unit 11 is normal if the setting contents of multiple items in the operation setting information match the setting contents of multiple items in any of the reference setting information.
[0024] Furthermore, in the first embodiment of the present disclosure, if the comparison by the comparison unit 13 shows that there is no reference setting information having a combination of setting contents that matches the combination of setting contents of multiple items in the operation setting information, the determination unit 14 determines that the operation setting information read from the first storage unit 11 is abnormal. In other words, if the setting contents of multiple items in the operation setting information do not match the setting contents of multiple items in any of the reference setting information, the determination unit 14 determines that the operation setting information is abnormal.
[0025] If the determination unit 14 determines that the operation setting information is abnormal, for example, an alarm signal is output from the determination unit 14. The alarm signal is sent to an external host control device (not shown) via a communication interface in the encoder built-in circuit 21. The host control device that receives the alarm signal may control a display device (not shown) to display the message that the operation setting information is abnormal, or may control an audio device (not shown) to emit an alarm sound. Furthermore, the host control device that receives the alarm signal may control the stopping of the operation of the encoder 1, or may control the emergency stop of a machine (such as a robot or a machine tool) in which the encoder 1 is installed. The host control device includes a processor and a memory. The processor may be, for example, an IC, an LSI, a CPU, an MPU, or a DSP.
[0026] If the determination unit 14 determines that the operation setting information is normal, the control unit 10 in the arithmetic processing device 20 executes a process to control the encoder built-in circuit 21 based on the operation setting information. As a result, the encoder 1 executes a process to detect position information of the detection target. The position information detected by the encoder 1 is transmitted from the encoder 1 to a higher-level control device.
[0027] FIG. 3 is a flowchart showing an abnormality determination process in an encoder according to the first embodiment of the present disclosure.
[0028] When the encoder 1 is started, in step S101, the arithmetic processing device 20 reads out the operation setting information from the first storage unit 11. In step S102, the arithmetic processing device 20 reads out the reference setting table from the second storage unit 12. The order of the processing of step S101 and the processing of step S102 may be reversed.
[0029] In step S103, the comparison unit 13 compares the operation setting information read out from the first storage unit 11 with the reference setting information in the reference setting table read out from the second storage unit 12. If the comparison by the comparison unit 13 shows that there is reference setting information having a combination of setting contents that matches the combination of setting contents of multiple items in the operation setting information, then in step S104 the determination unit 14 determines that the operation setting information read out from the first storage unit 11 is normal. On the other hand, if the comparison by the comparison unit 13 shows that there is no reference setting information having a combination of setting contents that matches the combination of setting contents of multiple items in the operation setting information, then in step S105 the determination unit 14 determines that the operation setting information read out from the first storage unit 11 is abnormal.
[0030] Fig. 4 is a diagram illustrating a case where the operation setting information is determined to be normal in the abnormality determination process in the encoder according to the first embodiment of the present disclosure. Also, Fig. 5 is a diagram illustrating a case where the operation setting information is determined to be abnormal in the abnormality determination process in the encoder according to the first embodiment of the present disclosure.
[0031] In the example shown in FIGS. 4 and 5 , a reference setting table including reference setting information A, reference setting information B, reference setting information C, etc. is pre-registered in the second storage unit 12. The first, second, and third items are items that define the operating state of the encoder built-in circuit 21. Each item of the reference setting information defines a setting that will enable the encoder 1 to normally perform the functions required for the model (i.e., no abnormalities will occur). For example, the setting content of the first item of the reference setting information A is setting A1, the setting content of the second item is setting A2, and the setting content of the third item is setting A3. The setting content of the first item of the reference setting information B is setting B1, the setting content of the second item is setting B2, and the setting content of the third item is setting B3. The setting content of the first item of the reference setting information C is setting C1, the setting content of the second item is setting C2, and the setting content of the third item is setting C3.
[0032] 4, the operation setting information stored in the first storage unit 11 specifies setting A1 for the first item, setting A2 for the second item, and setting A3 for the third item. When the encoder 1 is started, the arithmetic processing unit 20 reads the operation setting information from the first storage unit 11 and reads the reference setting table from the second storage unit 12. The comparison unit 13 compares the setting contents of each item of the operation setting information read from the first storage unit 11 with the setting contents of each item of the reference setting information in the reference setting table read from the second storage unit 12. Since the setting contents of each item of the operation setting information read from the first storage unit 11 match the setting contents of each item of the reference setting information A in the reference setting table, the determination unit 14 determines that the operation setting information read from the first storage unit 11 is normal.
[0033] 5, the operation setting information stored in the first storage unit 11 specifies setting A1 for the first item, setting D2 for the second item, and setting A3 for the third item. When the encoder 1 is started, the arithmetic processing unit 20 reads the operation setting information from the first storage unit 11 and reads the reference setting table from the second storage unit 12. The comparison unit 13 compares the setting contents of each item of the operation setting information read from the first storage unit 11 with the setting contents of each item of the reference setting information in the reference setting table read from the second storage unit 12. Since the setting contents of each item of the operation setting information read from the first storage unit 11 do not match the setting contents of each item of any of the reference setting information in the reference setting table stored in the second storage unit 12, the operation setting information is determined to be abnormal.
[0034] Second Embodiment of the Present Disclosure Depending on the required accuracy of the encoder 1 and the application environment, even if there are errors in the settings of some of the multiple items in the operation setting information, this may not cause any particular problems in the operation of the encoder 1 or the operation of the machine in which the encoder 1 is installed. In other words, there is little need to include items that do not cause abnormalities in the operation of the encoder 1 or the operation of the machine in which the encoder 1 is installed in the reference setting information. Therefore, in the second embodiment of the present disclosure, items that do not cause abnormalities in the operation of the encoder 1 or the operation of the machine in which the encoder 1 is installed are not included in the reference setting information, thereby reducing the number of items in the reference setting information compared to the number of items in the operation setting information. This makes it possible to reduce the memory capacity of the second storage unit 12 while maintaining the accuracy of detecting whether or not there is an abnormality in the operation setting information.
[0035] The configuration of the encoder 1 according to the second embodiment of the present disclosure is as shown in FIG. 1, but the items of the reference setting information and the operation of the comparison unit 13 and the determination unit 14 differ from those of the first embodiment in the following points.
[0036] The reference setting information stored in the second storage unit 12 does not include items that will not cause abnormalities in the operation of the encoder 1 or the operation of the machine in which the encoder 1 is installed.
[0037] In addition, the comparison unit 13 compares the operation setting information read from the first memory unit 11 with the standard setting information in the standard setting table read from the second memory unit 12 for items among the operation setting information that correspond to items in the standard setting information.
[0038] Furthermore, if the setting contents of the operation setting information match the setting contents of any of the reference setting information for items among the multiple items in the operation setting information that correspond to multiple items in the reference setting information, the determination unit 14 determines that the operation setting information is normal. If the determination unit 14 determines that the operation setting information is normal, the control unit 10 in the arithmetic processing device 20 executes processing to control the encoder built-in circuit 21 based on the operation setting information. As a result, the encoder 1 executes processing to detect position information for the detection target. The position information detected by the encoder 1 is transmitted from the encoder 1 to a higher-level control device.
[0039] Furthermore, if the determination unit 14 determines that there is no reference setting information having a combination of setting contents that matches the combination of setting contents of multiple items in the operation setting information, the determination unit 14 determines that the operation setting information is abnormal. An example of the subsequent processing when the determination unit 14 determines that "the operation setting information is abnormal" is as described in the first embodiment.
[0040] FIG. 6 is a flowchart showing an abnormality determination process in an encoder according to the second embodiment of the present disclosure.
[0041] In the second embodiment of the present disclosure, the number of items in each piece of reference setting information in the reference setting table stored in the second storage unit 12 is smaller than the number of items in the operation setting information stored in the first storage unit 11. When the encoder 1 is started, in step S201, the arithmetic processing unit 20 reads the operation setting information from the first storage unit 11. In step S202, the arithmetic processing unit 20 reads the reference setting table from the second storage unit 12. The order of the processing of step S201 and the processing of step S202 may be reversed.
[0042] In step S203, the comparison unit 13 compares the operation setting information read from the first storage unit 11 with the reference setting information in the reference setting table read from the second storage unit 12. The comparison by the comparison unit 13 is performed for items among the multiple items in the operation setting information that correspond to multiple items in the reference setting information. If the comparison by the comparison unit 13 shows that the settings in the operation setting information match the settings in any of the reference setting information for items among the multiple items in the operation setting information that correspond to multiple items in the reference setting information, the determination unit 14 determines in step S204 that the operation setting information read from the first storage unit 11 is normal. If the comparison by the comparison unit 13 shows that there is no reference setting information having a combination of settings that matches the combination of settings in the multiple items in the operation setting information, the determination unit 14 determines in step S205 that the operation setting information read from the first storage unit 11 is abnormal.
[0043] 7 is a diagram illustrating a case where the operation setting information is determined to be normal in the abnormality determination process in the encoder according to the second embodiment of the present disclosure, and FIG. 8 is a diagram illustrating a case where the operation setting information is determined to be abnormal in the abnormality determination process in the encoder according to the second embodiment of the present disclosure.
[0044] 7 and 8, the items to be set in the operation setting information are designated as item 1, item 2, and item 3. Of these three items, item 3 is an item that will not cause abnormalities in the operation of the encoder 1 regardless of the setting item, and therefore, the items to be set in the reference setting information are only items 1 and 2.
[0045] As shown in Figures 7 and 8, a reference setting table including reference setting information A, reference setting information B, reference setting information C, etc. is registered in advance in the second storage unit 12. In each piece of reference setting information, setting contents are respectively specified for the first item and the second item. For example, the setting contents of the first item of reference setting information A are setting A1, and the setting contents of the second item are setting A2. The setting contents of the first item of reference setting information B are setting B1, and the setting contents of the second item are setting B2. The setting contents of the first item of reference setting information C are setting C1, and the setting contents of the second item are setting C2.
[0046] 7 , the operation setting information stored in the first storage unit 11 specifies a setting A1 for the first item, a setting A2 for the second item, and a setting A3 for the third item. When the encoder 1 is started, the arithmetic processing unit 20 reads the operation setting information from the first storage unit 11 and reads the reference setting table from the second storage unit 12. The comparison unit 13 compares the setting contents of the operation setting information read from the first storage unit 11 with the setting contents of the reference setting information in the reference setting table read from the second storage unit 12 for the first and second items of the three items in the operation setting information that correspond to multiple items in the reference setting information. Since the setting contents of the first and second items in the operation setting information read from the first storage unit 11 match the setting contents of the first and second items in the reference setting information A in the reference setting table, the determination unit 14 determines that the operation setting information read from the first storage unit 11 is normal.
[0047] 8 , the operation setting information stored in the first storage unit 11 specifies a setting A1 for the first item, a setting D2 for the second item, and a setting A3 for the third item. When the encoder 1 is started, the arithmetic processing unit 20 reads the operation setting information from the first storage unit 11 and reads the reference setting table from the second storage unit 12. The comparison unit 13 compares the settings of the first and second items in the operation setting information read from the first storage unit 11 with the settings of the first and second items in the reference setting information in the reference setting table read from the second storage unit 12. Since the settings of the first and second items in the operation setting information read from the first storage unit 11 do not match the settings of the first and second items in any of the reference setting information stored in the second storage unit 12, the operation setting information is determined to be abnormal.
[0048] <Third Embodiment of the Present Disclosure> A third embodiment of the present disclosure determines whether or not there is an abnormality in the operational setting information read from the first storage unit 11 based on reference setting information associated with identification information unique to the encoder 1. Fig. 9 is a block diagram showing an encoder according to the third embodiment of the present disclosure.
[0049] The encoder 1 according to the third embodiment of the present disclosure includes a first memory unit 11, a second memory unit 12, a comparison unit 13, a determination unit 14, an acquisition unit 15, an arithmetic processing device 20, and an encoder internal circuit 21.
[0050] The arithmetic processing device 20 includes a control unit 10, a comparison unit 13, a determination unit 14, an acquisition unit 15, and other processing units. The arithmetic processing device 20 is configured by an LSI, an FPGA, an ASIC, or the like.
[0051] The control unit 10, the first storage unit 11, and the encoder built-in circuit 21 are as described in the first embodiment.
[0052] The acquisition unit 15 acquires identification information unique to the encoder 1 from the encoder-internal circuit 21. The acquisition unit 15 acquires the identification information when the encoder 1 is started up. The functions unique to the encoder 1 are determined by the encoder-internal circuit 21 and the arithmetic processing device 20 that controls the encoder-internal circuit 21. Therefore, in a third embodiment of the present disclosure, the acquisition unit 15 acquires identification information unique to the encoder 1 based on information obtained from the encoder-internal circuit 21. Because the configuration and operation of the encoder-internal circuit 21 vary depending on the model of the encoder 1, the various input signals that the arithmetic processing device 20 receives from the encoder-internal circuit 21 are unique to the encoder-internal circuit 21. Therefore, the acquisition unit 15 in the arithmetic processing device 20 may acquire identification information of the model of the encoder 1 in which the encoder-internal circuit 21 is provided based on the input signals received from the encoder-internal circuit 21. For the same reason, the combination of High inputs and Low inputs at the input pins of the arithmetic processing device 20 to which the encoder-internal circuit 21 is connected is also unique to the encoder-internal circuit 21. Therefore, the acquisition unit 15 in the arithmetic processing device 20 may acquire identification information of the model of the encoder 1 in which the encoder built-in circuit 21 is installed based on a combination of high input and low input at the input pin of the arithmetic processing device 20 to which the encoder built-in circuit 21 is connected.
[0053] The second storage unit 12 stores a reference setting table in which pre-registered identification information of a reference encoder is associated with reference setting information corresponding to the reference encoder indicated by the identification information. The reference setting information included in the reference setting table is prepared for each model of encoder 1 so as to cover all models of encoders 1 in which the arithmetic processing unit 20 is expected to be installed. However, in the reference setting table of the third embodiment, the reference setting information for each model of encoder 1 is associated with identification information unique to that model. In the illustrated example, the reference setting table includes, for example, identification information a and corresponding reference setting information A, identification information b and corresponding reference setting information B, and identification information c and corresponding reference setting information C. Furthermore, in consideration of the possibility that new identification information and reference setting information may be added as the number of models of encoders 1 in which the arithmetic processing unit 20 is installed increases in the future, the second storage unit 12 is configured with a rewritable memory (e.g., EEPROM (registered trademark), PROM, UV-EPROM, flash memory, etc.). The items in the reference setting information are as described in the first embodiment. The reference setting information is registered in advance in the second storage unit 12 by an operator during the manufacture of the encoder 1. The identification information and the corresponding setting contents of each item of the reference setting information should be written to the second storage unit 12 accurately.
[0054] The first storage unit 11 and the second storage unit 12 may be configured as separate memories, or may be provided in the same memory with separate storage areas for the first storage unit 11 and the second storage unit 12. The second storage unit 12 may also be provided in a storage area within the arithmetic processing device 20.
[0055] When the encoder 1 is started, the acquisition unit 15 acquires identification information unique to the encoder 1 from the encoder built-in circuit 21, and the comparison unit 13 reads out operation setting information from the first storage unit 11. The comparison unit 13 also reads out a reference setting table from the second storage unit 12. The comparison unit 13 then compares the operation setting information read out from the first storage unit 11 with reference setting information corresponding to a reference encoder having the same identification information as the identification information acquired by the acquisition unit 15.
[0056] If the comparison by the comparison unit 13 shows that the setting contents of multiple items in the operation setting information read from the first memory unit 11 match the setting contents of multiple items in the reference setting information corresponding to the same identification information as the identification information acquired by the acquisition unit 15, the determination unit 14 determines that the operation setting information is normal. If the determination unit 14 determines that the operation setting information is normal, the control unit 10 in the arithmetic processing device 20 executes processing to control the encoder built-in circuit 21 based on the operation setting information. As a result, the encoder 1 executes processing to detect position information of the detection target. The position information detected by the encoder 1 is transmitted from the encoder 1 to a higher-level control device.
[0057] Furthermore, if the comparison by the comparison unit 13 shows that the setting contents of the multiple items in the operation setting information read from the first storage unit 11 do not match the setting contents of the multiple items in the reference setting information corresponding to the same identification information as the identification information acquired by the acquisition unit 15, the determination unit 14 determines that the operation setting information read from the first storage unit 11 is abnormal. An example of the subsequent processing when the determination unit 14 determines that "the operation setting information is abnormal" is as described in the first embodiment.
[0058] FIG. 10 is a flowchart showing an abnormality determination process in an encoder according to the third embodiment of the present disclosure.
[0059] When the encoder 1 is started, in step S301, the arithmetic processing device 20 reads out operation setting information from the first storage unit 11. In step S302, the acquisition unit 15 acquires identification information unique to the encoder 1 from the encoder built-in circuit 21. The order of the processes of steps S301 and S302 may be reversed. In step S303, the arithmetic processing device 20 reads out the reference setting table from the second storage unit 12. The process of step S303 may be executed prior to the process of step S301 and / or the process of step S302.
[0060] In step S304, the comparison unit 13 compares the operation setting information read from the first storage unit 11 with reference setting information corresponding to a reference encoder having the same identification information as the identification information acquired by the acquisition unit 15. If the comparison by the comparison unit 13 shows that the setting contents of multiple items in the operation setting information read from the first storage unit 11 match the setting contents of multiple items in the reference setting information corresponding to the same identification information as the identification information acquired by the acquisition unit 15, the comparison unit 13 determines in step S305 that the operation setting information read from the first storage unit 11 is normal. If the comparison by the comparison unit 13 shows that the setting contents of multiple items in the operation setting information read from the first storage unit 11 do not match the setting contents of multiple items in the reference setting information corresponding to the same identification information as the identification information acquired by the acquisition unit 15, the comparison unit 13 determines in step S306 that the operation setting information read from the first storage unit 11 is abnormal.
[0061] Fig. 11 is a diagram illustrating a case where the operation setting information is determined to be normal in the abnormality determination process in the encoder according to the third embodiment of the present disclosure. Fig. 12 is a diagram illustrating a case where the operation setting information is determined to be abnormal in the abnormality determination process in the encoder according to the third embodiment of the present disclosure. In the examples shown in Figs. 11 and 12, as an example, the identification information of the encoder 1 acquired by the acquisition unit 15 from the encoder built-in circuit 21 is set to "identification information a."
[0062] 11, the operation setting information stored in the first storage unit 11 defines a setting A1 for the first item, a setting A2 for the second item, and a setting A3 for the third item as the setting contents, respectively. In the example shown in FIG. 12, the operation setting information stored in the first storage unit 11 defines a setting B1 for the first item, a setting B2 for the second item, and a setting B3 for the third item as the setting contents, respectively.
[0063] 11 and 12, for example, the second storage unit 12 has pre-registered therein a reference setting table including identification information a and its corresponding reference setting information A, identification information b and its corresponding reference setting information B, and identification information c and its corresponding reference setting information C. The first, second, and third items are items that define the operating state of the encoder built-in circuit 21. Each item of the reference setting information associated with the identification information corresponding to the model defines a setting that will cause the encoder 1 to normally perform the functions required for that model (i.e., no abnormalities will occur). Also, in the examples shown in FIGS. 11 and 12, for example, the acquisition unit 15 acquires identification information a that is unique to the model of the encoder 1 from the encoder built-in circuit 21.
[0064] 11 , for example, the setting content of the first item of reference setting information A corresponding to identification information a is setting A1, the setting content of the second item is setting A2, and the setting content of the third item is setting A3. The setting content of the first item of reference setting information B corresponding to identification information b is setting B1, the setting content of the second item is setting B2, and the setting content of the third item is setting B3. The setting content of the first item of reference setting information C corresponding to identification information c is setting C1, the setting content of the second item is setting C2, and the setting content of the third item is setting C3.
[0065] 11 , when the encoder 1 is started, the arithmetic processing unit 20 reads out the operation setting information from the first storage unit 11 and reads out the reference setting table from the second storage unit 12. Furthermore, the acquisition unit 15 acquires identification information a specific to the model of the encoder 1 from the encoder built-in circuit 21. The comparison unit 13 compares the setting contents of each item of the operation setting information read out from the first storage unit 11 with the setting contents of each item of the reference setting information A corresponding to the identification information a read out from the second storage unit 12. Since the setting contents of each item of the operation setting information read out from the first storage unit 11 match the setting contents of each item of the reference setting information A corresponding to the identification information a, the determination unit 14 determines that the operation setting information read out from the first storage unit 11 is normal.
[0066] 12, for example, the setting content of the first item of the reference setting information A corresponding to the identification information a is setting A1, the setting content of the second item is setting A2, and the setting content of the third item is setting A3. The setting content of the first item of the reference setting information B corresponding to the identification information b is setting B1, the setting content of the second item is setting B2, and the setting content of the third item is setting B3. The setting content of the first item of the reference setting information C corresponding to the identification information c is setting C1, the setting content of the second item is setting C2, and the setting content of the third item is setting C3.
[0067] 12, when the encoder 1 is started, the arithmetic processing unit 20 reads out the operation setting information from the first storage unit 11 and the reference setting table from the second storage unit 12. The acquisition unit 15 also acquires identification information a specific to the model of the encoder 1 from the encoder built-in circuit 21. The comparison unit 13 compares the setting contents of each item of the operation setting information read out from the first storage unit 11 with the setting contents of each item of the reference setting information A corresponding to the identification information a read out from the second storage unit 12. The operation setting information read out from the first storage unit 11 specifies setting B1 for the first item, setting B2 for the second item, and setting B3 for the third item, respectively, whereas the reference setting information A corresponding to the identification information a acquired by the acquisition unit 15 specifies setting A1 for the first item, setting A2 for the second item, and setting A3 for the third item, respectively. Therefore, the two do not match in terms of the combination of setting contents. Therefore, the determining unit 14 determines that the operation setting information read from the first storage unit 11 is abnormal.
[0068] As described above, in the third embodiment of the present disclosure, the presence or absence of an abnormality in the operation setting information read from the first storage unit 11 is determined based on the reference setting information associated with the identification information unique to the encoder 1. On the other hand, in the first embodiment of the present disclosure, the identification information unique to the encoder 1 is not taken into consideration when determining the presence or absence of an abnormality in the operation setting information read from the first storage unit 11. In other words, in the first embodiment of the present disclosure, the presence or absence of an abnormality in the operation setting information is determined simply based on whether or not there is reference setting information that matches the operation setting information, without taking the identification information into consideration. The third embodiment of the present disclosure performs the abnormality determination process while also taking the identification information into consideration, thereby obtaining a more accurate determination result than the first embodiment of the present disclosure. An example of this is described below.
[0069] 12 , consider a case where the first embodiment of the present disclosure, which does not consider identification information, is applied to an encoder 1 having identification information a, in which "operation setting information corresponding to identification information b," in which setting B1 is specified in the first item, setting B2 in the second item, and setting B3 in the third item, is erroneously stored in the first storage unit 11. Although reference setting information B corresponds to the model of the encoder 1 having identification information b, the combination of settings for each item in the operation setting information stored in the first storage unit 11 matches the combination of settings for each item in the reference setting information B stored in the second storage unit 12. Therefore, according to the first embodiment of the present disclosure, the operation setting information read from the first storage unit 11 is erroneously determined to be normal based solely on the fact that "reference setting information matching the operation setting information exists." In contrast, according to the third embodiment of the present disclosure, the acquisition unit 15 acquires the identification information a from the encoder built-in circuit 21, and the comparison unit 13 compares the setting contents of each item of the operation setting information read from the first storage unit 11 with the setting contents of each item of the reference setting information A corresponding to the identification information a read from the second storage unit 12. In other words, the comparison unit 13 compares the operation setting information with the reference setting information A rather than the reference setting information B. Since the setting contents of each item of the operation setting information read from the first storage unit 11 do not match the setting contents of each item of the reference setting information A corresponding to the identification information a, the determination unit 14 can accurately determine that the operation setting information read from the first storage unit 11 is abnormal.
[0070] <Fourth embodiment of the present disclosure> Depending on the required accuracy of the encoder 1 and the application environment, even if there are errors in the settings of some of the multiple items in the operation setting information, no particular problems may arise in the operation of the encoder 1 or the operation of the machine in which the encoder 1 is installed. On the other hand, if there is an error in the setting of a specific item, a serious abnormality may occur in the operation of the encoder 1 or the operation of the machine in which the encoder 1 is installed. In the fourth embodiment of the present disclosure, prohibited setting information having a combination of settings that will cause an encoder abnormality is prepared as reference setting information in the reference setting table, and the presence or absence of an abnormality in the operation setting information is determined based on the prohibited setting information.
[0071] The configuration of the encoder 1 according to the fourth embodiment of the present disclosure is as shown in FIG. 1, but the operation of the comparison unit 13 and the determination unit 14, as well as the contents of the reference setting table stored in the second memory unit 12, differ from those of the first embodiment in the following respects.
[0072] The reference setting table stored in the second memory unit 12 defines at least one prohibition setting information having a combination of setting contents that will cause an encoder abnormality. The prohibition setting information has multiple items that define the operating state of the encoder built-in circuit 21. Depending on the combination of setting contents for some of the multiple items, an encoder abnormality may occur. Therefore, the prohibition setting information defines setting contents only for items out of the multiple items that may cause an encoder abnormality. There may be one or more items that may cause an encoder abnormality. The prohibition setting information is registered in advance in the second memory unit 12 by an operator, for example, when manufacturing the encoder 1. The setting contents of each item of the prohibition setting information should be written to the second memory unit 12 with accuracy in mind.
[0073] The comparison unit 13 compares the operation setting information read from the first storage unit 11 with the prohibition setting information in the reference setting table read from the second storage unit 12 .
[0074] The determination unit 14 determines that the operation setting information is normal if there is no prohibition setting information that matches the operation setting information. In other words, the determination unit 14 determines that the operation setting information is normal if a combination of setting contents of multiple items in the operation setting information does not include a combination of setting contents of multiple items in any of the prohibition setting information. If the determination unit 14 determines that the operation setting information is normal, the control unit 10 in the arithmetic processing device 20 executes processing to control the encoder built-in circuit 21 based on the operation setting information. As a result, the encoder 1 executes processing to detect position information of the detection target. The position information detected by the encoder 1 is transmitted from the encoder 1 to a higher-level control device.
[0075] Furthermore, if there is prohibition setting information that matches the operation setting information, the determination unit 14 determines that the operation setting information is abnormal. That is, the determination unit 14 determines that the operation setting information is abnormal if a combination of setting contents of multiple items in the operation setting information includes a combination of setting contents of multiple items in any of the prohibition setting information. An example of the subsequent processing when the determination unit 14 determines that "the operation setting information is abnormal" is as described in the first embodiment.
[0076] FIG. 13 is a flowchart showing an abnormality determination process in an encoder according to the fourth embodiment of the present disclosure.
[0077] When the encoder 1 is started, in step S401, the arithmetic processing unit 20 reads the operation setting information from the first storage unit 11. In step S402, the arithmetic processing unit 20 reads the reference setting table from the second storage unit 12. The order of the processing of step S401 and the processing of step S402 may be reversed.
[0078] In step S403, the comparison unit 13 compares the operation setting information read out from the first storage unit 11 with the prohibition setting information in the reference setting table read out from the second storage unit 12. If the comparison by the comparison unit 13 shows that there is prohibition setting information having a combination of setting contents that matches the combination of setting contents of multiple items in the operation setting information, then in step S404 the determination unit 14 determines that the operation setting information read out from the first storage unit 11 is abnormal. On the other hand, if the comparison by the comparison unit 13 shows that there is no prohibition setting information having a combination of setting contents that matches the combination of setting contents of multiple items in the operation setting information, then in step S405 the determination unit 14 determines that the operation setting information read out from the first storage unit 11 is normal.
[0079] 14 is a diagram illustrating a case where the operation setting information is determined to be normal in the abnormality determination process in the encoder according to the fourth embodiment of the present disclosure. Also, FIG. 15 is a diagram illustrating a case where the operation setting information is determined to be abnormal in the abnormality determination process in the encoder according to the fourth embodiment of the present disclosure.
[0080] In the examples shown in Figures 14 and 15, for example, a reference setting table including prohibition setting information A, prohibition setting information B, prohibition setting information C, etc. is pre-registered in the second memory unit 12. The first item, second item, and third item are items that specify the operating state of the encoder built-in circuit 21. For each prohibition setting information, a combination of setting contents of each item that will cause an encoder abnormality is specified. For example, the setting content of the first item of prohibition setting information A is setting A1, and the setting content of the second item is setting A2. The setting content of the second item of prohibition setting information B is setting B2, and the setting content of the third item is setting B3. The setting content of the first item of prohibition setting information C is setting C1, and the setting content of the third item is setting C3.
[0081] 14, the operation setting information stored in the first storage unit 11 specifies setting B1 for the first item, setting A2 for the second item, and setting A3 for the third item. When the encoder 1 is started, the arithmetic processing unit 20 reads the operation setting information from the first storage unit 11 and reads the reference setting table from the second storage unit 12. The comparison unit 13 compares the setting contents of each item of the operation setting information read from the first storage unit 11 with the setting contents of each item of the prohibition setting information in the reference setting table read from the second storage unit 12. Since the combination of the setting contents of each item of the operation setting information read from the first storage unit 11 does not include any combination of the setting contents of each item of the prohibition setting information in the reference setting table, the determination unit 14 determines that the operation setting information read from the first storage unit 11 is normal.
[0082] 15, the operation setting information stored in the first storage unit 11 specifies setting A1 for the first item, setting B2 for the second item, and setting B3 for the third item. When the encoder 1 is started, the arithmetic processing unit 20 reads the operation setting information from the first storage unit 11 and reads the reference setting table from the second storage unit 12. The comparison unit 13 compares the setting contents of each item of the operation setting information read from the first storage unit 11 with the setting contents of each item of the prohibition setting information in the reference setting table read from the second storage unit 12. The combination of the setting contents of each item of the operation setting information read from the first storage unit 11 includes the combination of the setting contents of each item of the prohibition setting information B in the reference setting table, and therefore determines that the operation setting information is abnormal.
[0083] <Common to the embodiments and their variations of the present disclosure> The encoder 1 includes at least one processor serving as an arithmetic processing device 20. Examples of the arithmetic processing device include an LSI, an FPGA, and an ASIC. The arithmetic processing device includes a control unit 10, a comparison unit 13, a determination unit 14, an acquisition unit 15, and other processing units. Each of these units included in the arithmetic processing device is a functional module implemented by a program executed on the processor. For example, if the control unit 10, the comparison unit 13, the determination unit 14, the acquisition unit 15, and other processing units are implemented in a program format, the functions of each unit can be realized by operating the arithmetic processing device in accordance with the program. The programs for executing the processes in the control unit 10, the comparison unit 13, the determination unit 14, the acquisition unit 15, and other processing units may be provided in a form recorded on a computer-readable recording medium such as a semiconductor memory, a magnetic recording medium, or an optical recording medium. Alternatively, the control unit 10, the comparison unit 13, the determination unit 14, the acquisition unit 15, and other processing units may be implemented as a semiconductor integrated circuit onto which programs for implementing the functions of each unit are written.
[0084] The encoder 1 also includes at least one memory serving as a storage device. The memory includes the arithmetic processing unit 20 and various storage units within other processing units. Examples of the memory include electrically erasable and recordable nonvolatile memories such as EEPROM (registered trademark), PROM, UV-EPROM, and flash memory. The memory stores programs for operating the control unit 10, comparison unit 13, determination unit 14, acquisition unit 15, and other processing units. The memory also stores operation setting information, a reference setting table, comparison results by the comparison unit 13, determination results by the determination unit 14, and identification information acquired by the acquisition unit 15. The memory also stores position information on the object detected by the encoder 1, as well as various programs and data related to the encoder 1.
[0085] As described above, according to the embodiments and their modifications of the present disclosure, it is possible to accurately detect whether or not there is an abnormality in the operational setting information that defines the operational state of the internal circuitry in the encoder.
[0086] To reduce the manufacturing cost of encoders, different models of encoders often share the same type of processor. Because the operation of various internal circuits of each encoder differs depending on the model, operational setting information is used to change the operation of the processor relative to the internal circuits. The operational setting information for the processor in the encoder is written to memory by an operator during the encoder's manufacturing process. If the operational setting information written to memory contains an error, the processor cannot operate normally, resulting in an abnormal operation of the encoder. Conventionally, errors have been detected by writing operational setting information to different storage areas to duplicate the data, or by adding a cyclic redundancy check (CRC) when loading the operational setting information. However, if an operator makes a human error by writing incorrect operational setting information to memory, believing it to be "correct," the cross-checking due to duplication cannot detect the error, resulting in an encoder malfunction. Furthermore, even if the correct operational setting information is written to memory, a communication error that cannot be detected by a CRC may occur when the operational setting information is loaded from memory to the processor, resulting in an encoder malfunction. In contrast, according to each embodiment of the present disclosure and their variations, the operation setting information read from the first memory unit is compared with the reference setting information stored in the second memory unit to detect whether or not there is an abnormality in the operation setting information, so that errors in writing the operation setting information to the first memory unit and errors in reading the operation setting information from the first memory unit can be accurately detected before an encoder abnormality occurs.
[0087] In addition, in the second embodiment of the present disclosure, the number of items in the reference setting information is made smaller than the number of items in the operation setting information by not including in the reference setting information items that do not cause abnormalities in the operation of the encoder or the operation of the machine in which the encoder is installed. According to the second embodiment of the present disclosure, it is possible to reduce the memory capacity of the second storage unit while maintaining the accuracy of detecting the presence or absence of abnormalities in the operation setting information.
[0088] Furthermore, according to the third embodiment of the present disclosure, the presence or absence of an abnormality in the operation setting information read from the first memory unit is determined based on the reference setting information associated with identification information unique to the encoder, thereby enabling more accurate detection of encoder abnormalities.
[0089] Furthermore, if there is an error in the settings of a specific item of the operation setting information, a particularly serious abnormality may occur in the operation of the encoder or the operation of the machine in which the encoder is installed. On the other hand, depending on the required accuracy of the encoder and the application environment, even if there is an error in the settings of some of the multiple items of the operation setting information, no particular problem may occur in the operation of the encoder or the operation of the machine in which the encoder is installed. According to the fourth embodiment of the present disclosure, the presence or absence of an abnormality in the operation setting information read from the first storage unit is determined based on the prohibition setting information having a combination of settings that causes an encoder abnormality, thereby enabling more accurate encoder abnormality detection.
[0090] Although the present disclosure has been described in detail above, the present disclosure is not limited to the individual embodiments and individual variations described above. Various additions, substitutions, modifications, partial deletions, etc. are possible for these embodiments and variations within the scope of the gist of the present disclosure, or within the scope of the gist of the present disclosure derived from the content of the claims and their equivalents. These embodiments and variations can also be implemented in combination. For example, in the above-described embodiments and variations, the order of each operation and the order of each process are shown as examples and are not limited to these. The same applies when numerical values or mathematical formulas are used in the description of the above-described embodiments and variations.
[0091] <Supplementary Notes> The following supplementary notes are further disclosed regarding the above-described embodiment and modifications.
[0092] (Supplementary Note 1) An encoder comprising: a first storage unit that stores operation setting information having setting contents of a plurality of items that define the operation state of an encoder built-in circuit, a second storage unit that stores at least one pre-registered reference setting information having setting contents of the plurality of items, a comparison unit that compares the operation setting information read from the first storage unit with the reference setting information read from the second storage unit, and a determination unit that determines whether or not the operation setting information read from the first storage unit is abnormal based on the comparison result by the comparison unit. (Supplementary Note 2) The determination unit determines that the operation setting information is normal when the setting contents of the plurality of items in the operation setting information match the setting contents of the plurality of items in any of the reference setting information, and determines that the operation setting information is abnormal when the setting contents of the plurality of items in the operation setting information do not match the setting contents of the plurality of items in any of the reference setting information. (Supplementary Note 3) The number of items in the reference setting information stored in the second memory unit is smaller than the number of items in the operation setting information stored in the first memory unit, and the judgment unit judges that the operation setting information is normal if the setting content in the operation setting information matches the setting content in any of the reference setting information for items among the items in the operation setting information that correspond to the items in the reference setting information, and judges that the operation setting information is abnormal if the setting content in the operation setting information does not match the setting content in any of the reference setting information.(Supplementary Note 4) The encoder according to Supplementary Note 1, further comprising an acquisition unit that acquires identification information unique to the encoder from an encoder built-in circuit, wherein the second storage unit stores, in association with each other, identification information of a pre-registered reference encoder and reference setting information corresponding to the reference encoder indicated by the identification information, wherein the comparison unit compares the operation setting information read from the first storage unit with reference setting information corresponding to the same identification information as the identification information acquired by the acquisition unit, and wherein the determination unit determines that the operation setting information is normal if setting contents of multiple items in the operation setting information read from the first storage unit match setting contents of multiple items in reference setting information corresponding to the same identification information as the identification information acquired by the acquisition unit, and determines that the operation setting information is abnormal if setting contents of multiple items in the operation setting information read from the first storage unit do not match setting contents of multiple items in reference setting information corresponding to the same identification information as the identification information acquired by the acquisition unit. (Supplementary Note 5) The encoder according to Supplementary Note 4, wherein the acquisition unit is provided in a calculation processing device. (Supplementary Note 6) The encoder according to Supplementary Note 1, wherein the reference setting information stored in the second memory unit is prohibition setting information having a combination of setting contents that causes an encoder abnormality, and the determination unit determines that the operation setting information is normal if a combination of setting contents of multiple items in the operation setting information does not include a combination of setting contents of multiple items in any of the prohibition setting information, and determines that the operation setting information is abnormal if a combination of setting contents of multiple items in the operation setting information includes a combination of setting contents of multiple items in any of the prohibition setting information. (Supplementary Note 7) The encoder according to any one of Supplements 1 to 6, wherein the comparison unit and the determination unit are provided in the arithmetic processing device. (Supplementary Note 8) The encoder according to any one of Supplements 1 to 6, wherein the second memory unit is provided in the arithmetic processing device.
[0093] REFERENCE SIGNS LIST 1 Encoder 10 Control unit 11 First storage unit 12 Second storage unit 13 Comparison unit 14 Determination unit 15 Acquisition unit 20 Arithmetic processing unit 21 Encoder built-in circuit
Claims
1. An encoder comprising: a first memory unit that stores operation setting information having setting contents of multiple items that define the operating state of an encoder's built-in circuit; a second memory unit that stores at least one pre-registered reference setting information having setting contents of multiple items; a comparison unit that compares the operation setting information read from the first memory unit with the reference setting information read from the second memory unit; and a judgment unit that judges whether or not there is an abnormality in the operation setting information read from the first memory unit based on the comparison result by the comparison unit.
2. The encoder of claim 1, wherein the judgment unit judges the operation setting information to be normal if the setting contents of the multiple items in the operation setting information match the setting contents of the multiple items in any of the reference setting information, and judges the operation setting information to be abnormal if the setting contents of the multiple items in the operation setting information do not match the setting contents of the multiple items in any of the reference setting information.
3. The encoder of claim 1, wherein the number of the plurality of items in the reference setting information stored in the second memory unit is smaller than the number of the plurality of items in the operation setting information stored in the first memory unit, and the judgment unit judges that the operation setting information is normal if the setting content in the operation setting information matches the setting content in any of the reference setting information for an item among the plurality of items in the operation setting information that corresponds to the plurality of items in the reference setting information, and judges that the operation setting information is abnormal if the setting content in the operation setting information does not match the setting content in any of the reference setting information.
4. The encoder of claim 1, further comprising an acquisition unit that acquires identification information unique to the encoder from the encoder's built-in circuit, wherein the second memory unit stores, in association with each other, identification information of a pre-registered reference encoder and the reference setting information corresponding to the reference encoder indicated by the identification information, the comparison unit compares the operation setting information read from the first memory unit with the reference setting information corresponding to the same identification information as the identification information acquired by the acquisition unit, and the judgment unit judges that the operation setting information is normal if the setting contents of the multiple items in the operation setting information read from the first memory unit match the setting contents of the multiple items in the reference setting information corresponding to the same identification information as the identification information acquired by the acquisition unit, and judges that the operation setting information is abnormal if the setting contents of the multiple items in the operation setting information read from the first memory unit do not match the setting contents of the multiple items in the reference setting information corresponding to the same identification information as the identification information acquired by the acquisition unit.
5. The encoder according to claim 4, wherein the acquisition unit is provided in a processing unit.
6. The encoder of claim 1, wherein the reference setting information stored in the second memory unit is prohibited setting information having a combination of setting contents that will cause an encoder abnormality, and the judgment unit judges that the operation setting information is normal if the combination of setting contents of the multiple items in the operation setting information does not include the combination of setting contents of the multiple items in any of the prohibited setting information, and judges that the operation setting information is abnormal if the combination of setting contents of the multiple items in the operation setting information includes the combination of setting contents of the multiple items in any of the prohibited setting information.
7. The encoder according to any one of claims 1 to 6, wherein the comparison section and the determination section are provided in a processing unit.
8. The encoder according to any one of claims 1 to 6, wherein the second storage unit is provided in a processing unit.
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