Circuit board, method for manufacturing same, circuit board group, and power module

Abstract

This circuit board comprises: a ceramic plate 20; a plate-like conductor 30; and a bonding layer 40 for bonding the conductor 30 and the ceramic plate 20. When viewing a cross section of the conductor 30 along the thickness direction thereof, a lateral surface of the conductor 30 includes, along the entire circumference, an inflection point P and a skirt section 30C that expands from the inflection point P toward the ceramic plate 20.

Description

Circuit board and manufacturing method thereof, group of circuit boards, and power module

[0001] The present disclosure relates to a circuit board, a method for manufacturing the same, a group of circuit boards, and a power module.

[0002] As industrial equipment such as robots and motors become more sophisticated, power modules that control large currents and high voltages are being used. Circuit boards included in such power modules are manufactured by joining a ceramic plate and a metal plate with a brazing filler metal and then forming grooves in the metal plate by etching. By controlling the shapes of the side surfaces of the metal plate and the brazing filler metal layer in the circuit board during etching, various properties can be imparted to the circuit board. For example, Patent Documents 1 and 2 disclose circuit boards in which the shapes of the side surfaces of the metal plate and the brazing filler metal layer after etching are controlled to improve heat cycle properties.

[0003] International Publication No. 2019 / 221174 Japanese Patent Application Laid-Open No. 2023-040786

[0004] By controlling the shape of the side surface of the conductor after etching, it is possible to improve the thermal stability and insulation properties of the circuit board, thereby improving the reliability of the circuit board. On the other hand, in order to improve the performance of the power module, it is necessary to ensure a sufficient mounting area for semiconductor elements on the conductor on the circuit board. Furthermore, if the variation in the shape of the circuit board with a sufficient mounting area for such semiconductor elements can be reduced, a power module with high performance and excellent stability can be obtained.

[0005] The present disclosure provides a circuit board capable of increasing the mounting area of ​​a semiconductor element and a manufacturing method thereof. The present disclosure also provides a group of circuit boards capable of increasing the mounting area of ​​a semiconductor element while reducing shape variation. The present disclosure also provides a power module including a plurality of circuit boards that ensure a sufficient mounting area for a semiconductor element while reducing shape variation.

[0006] One aspect of the present disclosure provides the following circuit board.

[0007] [1] A circuit board comprising a ceramic plate, a plate-shaped conductor portion, and a bonding layer that bonds the conductor portion and the ceramic plate, wherein, when viewed in a cross section along the thickness direction of the conductor portion, the side surface of the conductor portion has an inflection point along its entire circumference and a skirt portion that spreads from the inflection point toward the ceramic plate.

[0008] The circuit board of [1] above has an inflection point around the entire periphery of the side of the conductor portion and a skirt portion extending from the inflection point toward the ceramic plate, thereby enabling the mounting area of ​​the semiconductor element in the conductor portion of the circuit board to be larger than when the entire side is made up of a skirt portion.

[0009] The circuit board of the above [1] may be any one of the following [2] to [5].

[0010] [2] The circuit board according to [1], wherein the inflection point is located closer to a second main surface of the conductor opposite to a first main surface bonded to the bonding layer. [3] The circuit board according to [1] or [2], wherein the conductor has a thickness of 0.8 mm or more. [4] The circuit board according to any one of [1] to [3], wherein, when viewed in cross section, the bonding layer has a protruding portion that protrudes from between the conductor and the ceramic plate, and where L is the length along the main surface of the ceramic plate from the outer edge of the second main surface opposite to the first main surface bonded to the bonding layer to the tip of the protruding portion, and T is the thickness of the conductor, L / T is 5 / 12 or less. [5] The circuit board according to any one of [1] to [4], wherein the outer edge of the second main surface of the conductor opposite to the first main surface bonded to the bonding layer protrudes outward beyond the inflection point.

[0011] In the circuit board of the above [2], the inflection point of the conductor portion is located at a position away from the bonding layer. This circuit board can increase the mounting area of ​​the semiconductor element while maintaining a sufficient length of the skirt portion along the main surface. Therefore, this circuit board has reduced thermal stress and is sufficiently excellent in thermal stability.

[0012] The circuit board of the above [3] has a sufficiently thick conductor portion, which can sufficiently improve the heat dissipation characteristics of the circuit board.

[0013] In the circuit board of the above [4], the distance along the main surface from the outer edge of the second main surface of the conductor portion to the tip of the protruding portion (the taper amount) is sufficiently reduced. Such a circuit board can increase the mounting area of ​​a semiconductor element while improving thermal stability and insulation, and thus has even greater reliability.

[0014] In the circuit board of the above [5], the outer edge of the second main surface protrudes outward beyond the inflection point, so that the mounting area for the semiconductor element can be made sufficiently large.

[0015] One aspect of the present disclosure provides the following group of circuit boards.

[0016] [6] A circuit board group comprising a plurality of circuit boards according to any one of [1] to [5] above, wherein, when each of the plurality of circuit boards is viewed in cross section, the bonding layer of each of the plurality of circuit boards has a protruding portion that protrudes from between the conductor portion and the ceramic plate, and the standard deviation of a length L along the main surface of the ceramic plate from an outer edge of a second main surface of the plurality of circuit boards opposite to a first main surface joined to the bonding layer of the conductor portion to a tip of the protruding portion is 0.05 mm or less. [7] A circuit board group comprising a plurality of circuit boards according to any one of [1] to [5] above, wherein, when each of the plurality of circuit boards is viewed in cross section, the standard deviation of a distance D measured along the main surface of the ceramic plate from an outer edge of a second main surface of the plurality of circuit boards opposite to the first main surface joined to the bonding layer of the conductor portion to the outer edge of the ceramic plate is 0.05 mm or less.

[0017] The circuit board group of [6] above includes a plurality of circuit boards of [1] to [5] above, and the variation in length L (taper amount L) among the plurality of circuit boards is sufficiently reduced. Such a circuit board group has small variation in shape, and can increase the mounting area of ​​semiconductor elements on the conductor portions of the plurality of circuit boards. Furthermore, the reliability of the circuit board group can be improved.

[0018] The circuit board group of [7] above includes a plurality of circuit boards of [1] to [5] above, and the variation in the distance D (creepage distance D) among the plurality of circuit boards is sufficiently reduced. Such a circuit board group has small variation in shape, and can increase the mounting area of ​​semiconductor elements on the conductor portions of the plurality of circuit boards. Furthermore, the reliability of the circuit board group can be improved.

[0019] One aspect of the present disclosure provides the following power module.

[0020] [8] A power module comprising a plurality of the circuit boards according to any one of [1] to [5] above.

[0021] The power module of [8] above includes a plurality of circuit boards that ensure a sufficient mounting area for semiconductor elements in the conductor portion and have reduced variation in shape, thereby improving the reliability and performance of the power module.

[0022] The power module of the above [8] may be the following [9] or

[10] .

[0023] [9] The power module according to [8], wherein, when each of the plurality of circuit boards is viewed in cross section, the bonding layer of each of the plurality of circuit boards has a protruding portion protruding from between the conductor portion and the ceramic plate, and a standard deviation of a length L along the main surface of the ceramic plate from an outer edge of a second main surface of the plurality of circuit boards opposite to a first main surface joined to the bonding layer of the conductor portion to a tip of the protruding portion is 0.05 mm or less.

[10] The power module according to [8] or [9], wherein, when each of the plurality of circuit boards is viewed in cross section, the standard deviation of a distance D measured along the main surface of the ceramic plate from an outer edge of a second main surface of the plurality of circuit boards opposite to the first main surface joined to the bonding layer of the conductor portion to the outer edge of the ceramic plate is 0.05 mm or less.

[0024] In the power module [9] above, the variation in the taper amount L among the plurality of circuit boards is sufficiently reduced. In such a power module, the variation in the shapes of the plurality of circuit boards is sufficiently small. Therefore, the reliability of the power module can be further improved.

[0025] In the power module of

[10] above, the variation in creepage distance D among the plurality of circuit boards is sufficiently reduced. In such a power module, the variation in the shapes of the plurality of circuit boards is sufficiently small. Therefore, the reliability of the power module can be further improved.

[0026] One aspect of the present disclosure provides the following method for manufacturing a circuit board.

[0027]

[11] A method for manufacturing a circuit board, comprising: a step of obtaining a bonded body in which a plate-shaped ceramic substrate having a scribe line and a plate-shaped metal substrate are bonded with a bonding layer; a step of forming a plurality of conductor portions in a central region of a main surface of the ceramic substrate and a plurality of dam portions intermittently surrounding the central region by removing a portion of the metal substrate in the bonded body by etching; and a step of dividing the ceramic substrate along the scribe line to obtain a circuit board including at least one of the plurality of conductor portions.

[0028] The circuit board manufacturing method of

[11] above includes a step of forming a dam portion surrounding the conductor portion when removing the metal substrate by etching. Without the dam portion, the amount of etching solution tends to be smaller at the edges of the ceramic substrate than at the center. In contrast, providing a dam portion surrounding the conductor portion suppresses drainage of the etching solution, thereby reducing the variation in the amount of etching solution between the center and edges of the ceramic substrate. The dam portion formation step allows etching to proceed with high uniformity, resulting in a circuit board having a conductor portion with an inflection point along the entire periphery of the side surface of the conductor portion. The circuit board obtained in this manner can have a larger mounting area for semiconductor elements than a circuit board in which the entire side surface is composed of a skirt portion. Furthermore, the variation in the shape of the multiple conductor portions formed by etching can be reduced. Therefore, multiple circuit boards with reduced shape variation can be efficiently manufactured.

[0029] The present disclosure can provide a circuit board capable of increasing the mounting area of ​​a semiconductor element and a manufacturing method thereof. The present disclosure can provide a group of circuit boards capable of increasing the mounting area of ​​a semiconductor element while reducing shape variation. The present disclosure can provide a power module including a plurality of circuit boards that ensure a sufficient mounting area for a semiconductor element while reducing shape variation.

[0030] 6( a ) is a plan view of a circuit board according to one embodiment. FIG. 6( b ) is a cross-sectional view taken along line II-II of FIG. 1 . FIG. 6( c ) is a cross-sectional view showing an enlarged view of the area surrounded by line III in the cross-sectional view shown in FIG. 2 . FIG. 6( a ) is a plan view of a circuit board group according to one embodiment. FIG. 6( b ) is a cross-sectional view of a power module according to one embodiment. FIG. 6( a ) is a plan view of a ceramic substrate having a scribe line. FIG. 6( b ) is a view for explaining a process of joining a pair of metal substrates to a ceramic substrate. FIG. 6( b ) is a plan view of a bonded body on which an etching resist is printed. FIG. 6( c ) is a plan view of an aggregate circuit board on which dam portions and conductor portions are formed after etching. FIG. 6( b ) is an SEM image (magnification: 30x) showing the shape of a cross section at measurement position A1 in Example 1. FIG. 6( c ) is an SEM image (magnification: 30x) showing the shape of a cross section at measurement position B1 in Example 1. FIG. 6( c ) is an SEM image (magnification: 30x) showing the shape of a cross section at measurement position A1 in Comparative Example 1.

[0031] Embodiments of the present disclosure are described below. However, the following embodiments are merely examples for explaining the present disclosure and are not intended to limit the present disclosure to the following content. The upper or lower limit of a numerical range specified in this disclosure may be replaced with any value shown in the examples. Furthermore, individually stated upper and lower limit values ​​may be arbitrarily combined. The symbol "to" used in a numerical range indicates a numerical range that includes the upper and lower limit. For example, "X to Y" indicates a numerical range "greater than or equal to X and less than or equal to Y." Unless otherwise specified, the materials or components exemplified in this disclosure may be used alone or in combination of two or more. In the description, the same symbols are used for identical elements or elements with the same functions, and redundant explanations may be omitted where appropriate. Furthermore, positional relationships such as up, down, left, and right are based on the positional relationships shown in the drawings unless otherwise specified. Note that the dimensional ratios of each element are not limited to those shown in the drawings.

[0032] [Circuit Board] Fig. 1 is a plan view showing a circuit board according to one embodiment. The circuit board 10 has a plate-shaped conductor portion 30 bonded to a main surface 20A of a ceramic plate 20 via a bonding layer 40. As shown in Fig. 1, in a plan view of the circuit board 10, the bonding layer 40 protrudes from the outer edge of the conductor portion 30. The circuit board 10 is used, for example, as a component of a power module or the like.

[0033] Fig. 2 is a cross-sectional view of the circuit board 10 shown in Fig. 1 taken along line II-II. That is, Fig. 2 is a cross-sectional view taken along the thickness direction of the conductor portion 30 and perpendicular to the outer edge (upper end 30b) of the conductor portion 30. A conductor portion 32 is bonded to a main surface 20B of the ceramic plate 20 opposite to the main surface 20A via a bonding layer 40. The conductor portion 32 on the main surface 20B functions as a heat sink.

[0034] The ceramic plate 20 is formed in a flat plate shape. The ceramic plate 20 has a pair of main surfaces 20A and 20B facing opposite directions. The outer edge of the ceramic plate 20 may be rectangular. The ceramic plate 20 may be a silicon nitride plate or an aluminum nitride plate. The thickness of the ceramic plate 20 may be 0.1 to 1.0 mm, 0.1 to 0.6 mm, or 0.2 to 0.4 mm.

[0035] The conductors 30 and 32 may be, for example, copper plates. The outer edges of the conductors 30 and 32 are located more inward than the outer edge of the ceramic plate 20. The outer edges of the conductors 30 and 32 may have a rectangular, polygonal, or curved shape.

[0036] The thickness of the conductors 30, 32 may be 0.8 mm or more. By having the thickness of the conductors 30, 32 within the above range, the heat dissipation characteristics of the circuit board 10 can be improved. From the viewpoint of further improving the heat dissipation characteristics of the circuit board 10, the thickness of the conductors 30, 32 may be 1.0 mm or more, or 1.1 mm or more. The thickness of the conductors 30, 32 may be 2.0 mm or less, or 1.5 mm or less. The thickness of the conductors 30, 32 may be in the range of, for example, 0.8 to 2.0 mm, 0.8 to 1.5 mm, 1.0 to 2.0 mm, 1.0 to 1.5 mm, 1.1 to 2.0 mm, or 1.1 to 1.5 mm. The thicknesses of the conductors 30, 32 may be the same or different from each other.

[0037] The conductor portions 30 may form a circuit pattern 35 of a predetermined shape. The circuit pattern 35 is formed by etching the joined conductor portions 30. The shape of the circuit pattern 35 is not particularly limited. For example, the groove between two conductor portions 30 may extend linearly or may be curved. The spacing between the circuit patterns 35 may be 3.0 to 8.0 mm, or 4.0 to 6.0 mm. The spacing here refers to the shortest distance between adjacent conductor portions 30.

[0038] The circuit board 10 includes a bonding layer 40. The bonding layer 40 bonds the ceramic plate 20 to the conductor portions 30 and 32. The bonding layer 40 has a protruding portion 42 that protrudes from between the ceramic plate 20 and the conductor portions 30 and 32. The bonding layer 40 can be seen as the protruding portion 42 in the plan view of FIG.

[0039] The bonding layer 40 may be composed of an Ag—Cu-based brazing filler metal. The Ag—Cu-based brazing filler metal contains silver, copper, and an active metal. The silver content in the bonding layer 40 may be 70% by mass or more, 80% by mass or more, or 85% by mass or more. The silver content in the bonding layer 40 may be 98% by mass or less. The bonding layer 40 may contain at least one selected from In (indium), Zn (zinc), Cd (cadmium), and Sn (tin). The amount of In or the like in the bonding layer 40 may be 0.4 to 5.0 parts by mass, or 0.5 to 4.0 parts by mass, per 100 parts by mass of the total of silver and copper. The copper content in the bonding layer 40 may be 5 to 20 parts by mass per 100 parts by mass of silver.

[0040] The active metal may include at least one selected from the group consisting of titanium, zirconium, hafnium, and niobium. The active metal in the bonding layer 40 may be 0.5 to 6.0 parts by mass, 0.5 to 5.0 parts by mass, or 2 to 5.0 parts by mass relative to 100 parts by mass of the total of silver and copper. The active metal may be contained as a hydride, for example, titanium hydride (TiH ２ The bonding layer 40 may contain TiH. ２ The content may be 0.5 to 10 parts by mass, 1 to 5 parts by mass, or 2 to 5 parts by mass relative to 100 parts by mass of the total of silver and copper.

[0041] Fig. 3 is an enlarged cross-sectional view of the area surrounded by line III in Fig. 2. Fig. 3 shows an enlarged view of a portion near the side surface of the conductor portion 30 on the main surface 20A of the ceramic plate 20. The conductor portion 30 has a first main surface 30A in contact with the bonding layer 40 and a second main surface 30B opposite the first main surface 30A. The side surface of the conductor portion 30 has an inflection point P between the lower end 30a and the upper end 30b. The lower end 30a and the upper end 30b are farther from the center of the conductor portion 30 than the inflection point P.

[0042] In the cross section shown in FIG. 3 , the side surface of the conductor portion 30 has only one inflection point P. The inflection point P is located closest to the center of the conductor portion 30. That is, in the cross section shown in FIG. 3 , the distance from the side surface of the conductor portion 30 to the outer edge 20E of the ceramic plate 20, measured along the second main surface 30B of the conductor portion 30, is longest at the inflection point P. This inflection point P can be confirmed by a scanning electron microscope (SEM) image of the cross section shown in FIG. 3 . The magnification of the SEM image may be, for example, 30 times. The side surface of the conductor portion 30 has this inflection point P and also has a skirt portion 30C that expands from the inflection point P toward the ceramic plate 20. In addition, the side surface of the conductor portion 30 has a protrusion 38 above the inflection point P.

[0043] The skirt portion in this disclosure refers to a portion that starts from an inflection point P on the side surface of the conductor portion 30 and widens as it approaches the ceramic plate 20, as shown in Fig. 3. The protrusion 38 in this disclosure refers to a portion that protrudes outward from the inflection point P on the side surface of the conductor portion 30, at a portion closer to the second main surface 30B than the inflection point P, as shown in Fig. 3.

[0044] The side surface of the conductor 30 has an inflection point P, a skirt portion 30C, and a protrusion 38 along the entire circumference of the side surface. By having such a shape along the entire circumference of the side surface of the conductor 30, the area of ​​the second main surface 30B can be made sufficiently large. This allows the area of ​​the conductor 30 on which a semiconductor element is mounted to be made sufficiently large.

[0045] The inflection point P is located closer to the second main surface 30B (upper end 30b) of the conductor portion 30, opposite the first main surface 30A (lower end 30a). In other words, the inflection point P is located above the center of the side surface of the conductor portion 30 and away from the bonding layer 40. By positioning the inflection point P at a certain distance from the bonding layer 40 in this way, it is possible to increase the mounting area of ​​the semiconductor element while maintaining a sufficient length along the main surface of the skirt portion 30C. Therefore, such a circuit board 10 has reduced thermal stress and is sufficiently thermally stable.

[0046] The bonding layer 40 includes a protruding portion 42 extending outward from between the lower end 30a and the ceramic plate 20. When the length along the main surface of the ceramic plate 20 from the outer edge (upper end 30b) of the second main surface 30B of the conductor portion 30 opposite the first main surface 30A bonded to the bonding layer 40 to the tip of the protruding portion 42 is L (taper amount L), and the thickness of the conductor portion 30 is T, L / T may be 5 / 12 or less. By setting L / T to 5 / 12 or less, an increase in the taper amount L due to etching can be suppressed, and the taper amount L can be sufficiently reduced. Such a circuit board 10 can increase the mounting area of ​​a semiconductor element while improving thermal stability and insulation, resulting in even greater reliability of the circuit board 10. From the viewpoint of further improving the insulation of the circuit board, L / T may be 1 / 3 or less. Furthermore, from the viewpoint of sufficiently increasing thermal stability, L / T may be 1 / 12 or more, 1 / 6 or more, or 1 / 4 or more. The range of L / T may be, for example, 1 / 12 to 5 / 12, 1 / 12 to 1 / 3, 1 / 6 to 5 / 12, 1 / 6 to 1 / 3, 1 / 4 to 5 / 12, or 1 / 4 to 1 / 3.

[0047] The taper amount L may be 0.500 mm or less, or 0.400 mm or less. By keeping the taper amount L within this range, even if the thickness of the conductor portion 30 is thick, an increase in the taper amount L due to etching can be suppressed, the thermal stability and insulating properties of the circuit board 10 can be further improved, and the reliability of the circuit board 10 can be improved. The taper amount L may be 0.100 mm or more. The range of the taper amount L may be, for example, 0.100 to 0.500 mm, or 0.100 to 0.400 mm.

[0048] The outer edge (upper end 30b) of the second main surface 30B protrudes outward from the side surface beyond the inflection point P. This allows the mounting area of ​​the semiconductor element on the conductor portion 30 to be further increased. The distance S between the lower end 30a and the upper end 30b measured along the main surface 20A of the ceramic plate 20 may be 0.300 to 0.400 mm, 0.300 mm to 0.375 mm, 0.350 to 0.400 mm, or 0.350 to 0.375 mm. The lower limit of the distance S may be 0.350 mm. The upper limit of the distance S may be 0.375 mm.

[0049] The distance (creepage distance D) from the outer edge (upper end 30b) of the second main surface 30B to the outer edge 20E of the ceramic plate 20, measured along the main surface 20A of the ceramic plate 20 in a cross section such as that shown in FIG. 3, may be 2.700 mm or less, or 2.600 mm or less. The creepage distance D may be 2.200 mm or more, or 2.300 mm or more. The range of the creepage distance D may be, for example, 2.200 to 2.700 mm, 2.200 to 2.600 mm, 2.300 to 2.700 mm, or 2.300 to 2.600 mm. The taper amount L and the creepage distance D can be measured using, for example, a "measuring microscope" (product name: MF-B1010D, manufactured by Mitutoyo Corporation).

[0050] The conductor portion 32 may have an inflection point P similar to that of the conductor portion 30, all around the side surface of the conductor portion 32 on the main surface 20B of the ceramic plate 20. The inflection point P on the side surface of the conductor portion 32 may be similar to the inflection point P on the side surface of the conductor portion 30 described above. By having an inflection point P all around the side surface of the conductor portion 32 on the main surface 20B, it is possible to further reduce variation in the shapes of multiple circuit boards 10.

[0051] [Circuit Board Group] FIG. 4 is a plan view showing a circuit board group according to one embodiment. The circuit board group 50 includes circuit boards 10a, 10b, and 10c having a shape similar to that of the circuit board 10 described above. In FIG. 4, three circuit boards 10a, 10b, and 10c are shown side by side. The three circuit boards 10a, 10b, and 10c are not physically connected and are independent of one another. The sides of each of the circuit boards 10a, 10b, and 10c may have a shape similar to that of the side of the circuit board 10 shown in the cross-sectional view of FIG. 3. The number of circuit boards in the circuit board group is not limited to three and may be, for example, 2 to 20.

[0052] When each of the plurality of circuit boards 10a, 10b, and 10c is viewed in cross section along the thickness direction of the conductor portion, the standard deviation of the length L (taper amount L) along the main surface 20A of the ceramic plate 20 from the outer edge (upper end 30b) of the second main surface 30B of each of the plurality of circuit boards 10a, 10b, and 10c to the tip of the protruding portion 42 may be 0.05 mm or less. In such a circuit board group 50, variation in the shapes of the plurality of circuit boards is reduced, and the mounting area of ​​semiconductor elements in the conductor portion 30 of the plurality of circuit boards 10a, 10b, and 10c can be increased. Furthermore, the reliability of the circuit board group 50 can be improved.

[0053] From the viewpoint of further reducing variation in the shapes of the multiple circuit boards 10a, 10b, and 10c in the circuit board group 50, the standard deviation of the taper amount L may be 0.04 mm or less, or 0.03 mm or less. The standard deviation of the taper amount L may be 0.01 mm or more. The range of the standard deviation of the taper amount L may be, for example, 0.01 to 0.05 mm, 0.01 to 0.04 mm, or 0.01 to 0.03 mm.

[0054] When each of the plurality of circuit boards 10a, 10b, and 10c is viewed in cross section along the thickness direction of the conductor portion 30, the standard deviation of the distance D (creepage distance D) from the outer edge (upper end 30b) of the second main surface 30B of the conductor portion 30 to the outer edge 20E of the ceramic plate 20, measured along the main surface 20A of the ceramic plate 20, may be 0.05 mm or less. In such a circuit board group, variation in the shapes of the plurality of circuit boards is reduced, and the mounting area of ​​semiconductor elements in the conductor portions 30 of the plurality of circuit boards 10a, 10b, and 10c can be increased. Furthermore, the reliability of the circuit board group 50 can be improved.

[0055] From the viewpoint of further reducing the variation in the shapes of the multiple circuit boards 10a, 10b, and 10c in the circuit board group 50, the standard deviation of the creepage distance D may be 0.04 mm or less, or 0.03 mm or less. The standard deviation of the creepage distance D may be 0.01 mm or more. The range of the standard deviation of the creepage distance D may be, for example, 0.01 to 0.05 mm, 0.01 to 0.04 mm, or 0.01 to 0.03 mm.

[0056] The standard deviation of the taper amount L and the standard deviation of the creepage distance D can be determined by measuring the taper amount L or the creepage distance D at one or more measurement positions on each of the multiple circuit boards 10 a, 10 b, and 10 c that are different from each other, and using the obtained measurement values. The measurement positions may be any position on the outer edge (upper end 30 b) of the side surface of the conductor portion 30.

[0057] [Power Module] A power module according to one embodiment includes a plurality of the above-described circuit boards 10. That is, the power module includes the above-described circuit board group 50. The power module also includes semiconductor elements electrically connected to the conductor portions of the circuit board group. A power module including a plurality of the above-described circuit boards 10 can mount a large number of semiconductor elements because the second main surface 30B of the conductor portion 30 has a large area. Alternatively, a semiconductor element having a large size can be mounted. Such a power module has excellent reliability. The circuit boards and the semiconductor elements may be sealed with resin.

[0058] Fig. 5 is a cross-sectional view of a power module according to one embodiment. The power module 100 includes a base plate 90 and a plurality of circuit boards 10 joined to one surface of the base plate 90 via solder 82. Conductor portions 32 on one surface of the circuit boards 10 are joined to the base plate 90 via the solder 82. Note that although Fig. 5 shows only one circuit board as an example, in reality the power module includes a plurality of circuit boards.

[0059] A semiconductor element 80 is attached to the conductor portion 30 on the other side of the circuit board 10 via solder 81. The semiconductor element 80 is connected to predetermined locations of the conductor portion 30 with metal wires 84 such as aluminum wires. In this manner, the semiconductor element 80 and the conductor portion 30 are electrically connected. To electrically connect the outside of the housing 86 to the conductor portion 30, one of the conductor portions, conductor portion 30d, is connected via solder 85 to an electrode 83 that penetrates the housing 86.

[0060] A housing 86 is disposed on one main surface of the base plate 90, and is integrated with the main surface to house the circuit board 10. A housing space formed by the one main surface of the base plate 90 and the housing 86 is filled with resin 95. The resin 95 seals the circuit board 10 and the semiconductor element 80. The resin may be, for example, a thermosetting resin or a photocurable resin.

[0061] Cooling fins 92, which serve as heat dissipation members, are joined to the other main surface of the base plate 90 via grease 94. Screws 93 are attached to the ends of the base plate 90 to secure the cooling fins 92 to the base plate 90. The base plate 90 and the cooling fins 92 may be made of aluminum. The base plate 90 and the cooling fins 92 function well as heat dissipation members due to their high thermal conductivity.

[0062] The ceramic plate 20 electrically insulates the conductor portion 30 from the conductor portion 32. The conductor portion 30 (30d) may form an electric circuit. The conductor portion 30 and the conductor portion 32 are respectively joined to the main surface 20A and the main surface 20B of the ceramic plate 20 by a joining layer (not shown) containing a brazing material component. The joining layer has a protruding portion 42 as shown in FIGS. 2 and 3 .

[0063] 5 shows one circuit board 10, the power module 100 may include multiple circuit boards 10a, 10b, and 10c. There is no limit to the number of circuit boards 10 mounted on the power module 100. The number of circuit boards 10 mounted on the power module 100 may be, for example, 2 to 20. By including multiple circuit boards 10 in the power module 100, the total mounting area of ​​the semiconductor elements in the conductor portion 30 can be increased. This can improve the performance of the power module 100.

[0064] The standard deviation of the taper amount L of the plurality of circuit boards 10 in the power module 100 may be 0.05 mm or less. In such a power module 100, variation in the shapes of the plurality of circuit boards 10a, 10b, and 10c is reduced, and the mounting area of ​​semiconductor elements in the conductor portions of the plurality of circuit boards can be increased, thereby improving the output of the power module. In addition, the reliability of the power module can be improved.

[0065] From the viewpoint of further reducing the variation in the shapes of the multiple circuit boards 10a, 10b, and 10c mounted on the power module 100, the standard deviation of the taper amount L may be 0.04 mm or less, or 0.03 mm or less. The standard deviation of the taper amount L may be 0.01 mm or more. The range of the standard deviation of the taper amount L may be, for example, 0.01 to 0.05 mm, 0.01 to 0.04 mm, or 0.01 to 0.03 mm.

[0066] The standard deviation of the creepage distances D of the multiple circuit boards in the power module 100 may be 0.05 mm or less. In such a power module 100, variation in the shapes of the multiple circuit boards 10a, 10b, and 10c is reduced, and the total mounting area of ​​the semiconductor elements in the conductor parts 30 of the multiple circuit boards 10a, 10b, and 10c can be increased, thereby improving the output of the power module 100. Furthermore, the reliability of the power module 100 can be improved.

[0067] From the viewpoint of further reducing the variation in the shapes of the plurality of circuit boards 10a, 10b, and 10c, the standard deviation of the creepage distance D may be 0.04 mm or less, or 0.03 mm or less. The range of the standard deviation of the creepage distance D may be, for example, 0.01 to 0.05 mm, 0.01 to 0.04 mm, or 0.01 to 0.03 mm.

[0068] The standard deviation of the taper amount L and the standard deviation of the creepage distance D can be determined by measuring the taper amount L or the creepage distance D at one or more measurement positions on each of the multiple circuit boards 10 a, 10 b, and 10 c that are different from one another and are provided in the power module, and using the measurement values ​​obtained. The measurement position may be any position on the outer edge (upper end 30 b) of the side surface of the conductor portion 30.

[0069] [Method for manufacturing circuit board] A method for manufacturing a circuit board according to one embodiment includes the steps of obtaining a bonded body in which a plate-shaped ceramic substrate having a scribe line and a plate-shaped metal substrate are bonded with a bonding layer, etching away a portion of the metal substrate in the bonded body to form a plurality of conductor portions in a central region of a main surface of the ceramic substrate and a plurality of dam portions that intermittently surround the central region, and dividing the ceramic substrate along the scribe line to obtain a circuit board that includes at least one of the plurality of conductor portions.

[0070] (Preparation of Ceramic Substrate) A method for preparing a plate-shaped ceramic substrate having a scribe line is described below. First, a slurry containing silicon nitride powder or aluminum nitride powder, a sintering aid, and a binder resin is molded to obtain a green sheet. The slurry may also contain a plasticizer, a dispersant, a solvent, etc.

[0071] Examples of sintering aids include rare earth metals, alkaline earth metals, metal oxides, fluorides, chlorides, nitrates, and sulfates. These may be used alone or in combination. The use of a sintering aid can promote sintering of the inorganic compound powder. Examples of binder resins include methyl cellulose, ethyl cellulose, polyvinyl alcohol, polyvinyl butyral, and (meth)acrylic resins.

[0072] Examples of plasticizers include purified glycerin, glycerin trioleate, diethylene glycol, phthalate-based plasticizers such as di-n-butyl phthalate, and dibasic acid-based plasticizers such as di-2-ethylhexyl sebacate. Examples of dispersants include poly(meth)acrylates and (meth)acrylic acid-maleate copolymers. Examples of solvents include organic solvents such as ethanol and toluene.

[0073] Examples of methods for forming the slurry include the doctor blade method and extrusion molding. A green sheet is produced by such a method. The green sheet is then degreased and sintered to obtain a ceramic substrate containing silicon nitride or aluminum nitride. Degreasing may be performed, for example, by heating the green sheet at 400 to 800°C for 0.5 to 20 hours. This can reduce the amount of residual organic matter (carbon) while suppressing oxidation and deterioration of the silicon nitride or aluminum nitride. Sintering may be performed by heating the green sheet at 1700 to 1900°C in a non-oxidizing gas atmosphere such as nitrogen, argon, ammonia, or hydrogen.

[0074] The above-mentioned degreasing and sintering may be performed with a plurality of green sheets stacked together. When degreasing and sintering are performed with the green sheets stacked together, a release layer made of a release agent may be provided between the green sheets to facilitate separation of the sheets after firing. For example, boron nitride (BN) may be used as the release agent. The release layer may be formed by applying a slurry of boron nitride powder by spraying, brushing, roll coating, screen printing, or other methods. The number of green sheets to be stacked may be, for example, 10 to 100 sheets, or 20 to 80 sheets, from the viewpoint of efficiently mass-producing the base material while sufficiently progressing the degreasing.

[0075] 6A shows a plan view of the ceramic substrate 21 having scribe lines SL1 and SL2. The scribe lines SL1 and SL2 are formed on one main surface 21A of the ceramic substrate 21 using a laser beam under predetermined processing conditions. Specifically, the scribe lines SL1 and SL2 are formed by irradiating the main surface 21A of the ceramic substrate 21 with a laser beam to form a plurality of holes.

[0076] Examples of laser light include a carbon dioxide laser, a YAG laser, and a fiber laser. Each of the multiple holes may be formed by a single irradiation of the laser light, or by multiple irradiations of the laser light. The holes may be formed in a burst pulse mode or a cycle pulse mode. The scribe lines SL1 and SL2 serve as cutting lines when dividing an aggregate circuit board including the ceramic base material 21 in a subsequent process. By forming the scribe lines SL1 and SL2, multiple partitions 22 are formed in the ceramic base material 21 in a two-dimensional array.

[0077] (Step of Obtaining a Bonded Body) Next, a step of obtaining a bonded body in which a plate-shaped ceramic substrate and a plate-shaped metal substrate are bonded with a bonding layer is performed. First, a brazing filler paste is applied to the main surface 21A of the ceramic substrate 21 and the main surface opposite the main surface 21A. For example, the brazing filler paste is applied to the main surface 21A and the main surface opposite the main surface 21A by a method such as a roll coater method, a screen printing method, or a transfer method. The brazing filler metal contains, for example, Ag (silver), Cu (copper), and an active metal. The composition ratio of Ag to Cu may be set to a composition ratio that makes it easy to form a eutectic composition. In a total of 100 parts by mass of Ag powder and Cu powder, the Ag powder may be 75 to 100 parts by mass, and the Cu powder may be 0 to 25 parts by mass.

[0078] The active metal includes at least one selected from titanium, zirconium, hafnium, and niobium. The amount of the active metal contained in the brazing filler metal may be 0.5 to 6.0 parts by mass relative to 100 parts by mass of the total of the Ag powder and Cu powder. The brazing filler metal may contain at least one selected from In (indium), Zn (zinc), Cd (cadmium), and Sn (tin). The amount of In, etc. contained in the brazing filler metal layer may be 0.4 to 5.0 parts by mass relative to 100 parts by mass of the total of the Ag powder and Cu powder. The tap density (JIS Z 2512) of the Ag powder contained in the brazing filler metal is 3 g / cm. ３ The brazing filler metal may have a thickness of 5 to 40 μm when dry.

[0079] Next, as shown in FIG. 6( b), the ceramic substrate 21, with the brazing filler metal applied to the main surface 21A and the main surface opposite the main surface 21A, is sandwiched between a pair of plate-shaped metal substrates 31A and 31B. The thicknesses of the metal substrates 31A and 31B are the same as the thickness of the conductor portion 30 described above. In this joining, one metal substrate 31A is bonded to the main surface 21A of the ceramic substrate 21 with the brazing filler metal applied, and one metal substrate 31B is bonded to the main surface opposite the main surface 21A, thereby obtaining a laminate. Thereafter, the laminate is heated in a heating furnace while a load is applied, thereby obtaining a joined body in which the pair of metal substrates 31A and 31B are joined to the ceramic substrate 21.

[0080] The laminate is heated, for example, at a vacuum level of 1.0×10 －３ The heating is carried out in a substantially vacuum state of 700 to 850°C or less. The heating temperature may be 700 to 850°C, and the heating time may be 10 to 60 minutes. During heating, the bonded body may be pressed in the stacking direction at a pressure in the range of 0.02 to 0.10 MPa. The bonded body obtained by heating is removed from the heating furnace and cooled to approximately room temperature.

[0081] (Step of forming a plurality of dam portions) Next, a step of forming a plurality of conductor portions in a central region of a main surface of the ceramic substrate and a plurality of dam portions discontinuously surrounding the central region is performed by removing a portion of the metal substrate in the bonded body by etching. First, as shown in Fig. 7, on the surface of the metal substrate 31A bonded to the ceramic substrate 21, an etching resist Er is printed in the central region where the plurality of conductor portions 30 are formed and in edge regions discontinuously surrounding the central region.

[0082] An etching solution is sprayed onto the surface of the metal substrate 31A on which the etching resist Er is printed, and portions where the etching resist Er is not printed are removed. As a result, as shown in FIG. 8 , conductor portions 30 are formed in each of the plurality of partition portions 22 in the central region of the main surface 21A of the ceramic substrate 21, and a plurality of dam portions 34 derived from the metal substrate 31A are formed in the edge regions of the main surface 21A of the ceramic substrate 21. Furthermore, conductor portions may be formed in each of the plurality of partition portions 22 on the main surface of the ceramic substrate 21 opposite the main surface 21A. In this manner, an aggregate circuit board 150 is obtained from which a plurality of circuit boards 10 (circuit board group 50) can be obtained. By providing the plurality of dam portions 34 so that the scribe lines SL1 and SL2 are exposed from the gaps between adjacent dam portions 34, the aggregate circuit board 150 can be smoothly divided along the scribe lines SL1 and SL2.

[0083] Weir portions 34 are formed in the edge regions of the principal surface 21A of the ceramic substrate 21 by etching, surrounding the central region of the principal surface. By providing the weir portions 34, drainage of the etching solution in the edge regions is suppressed after etching of the metal substrate 31A has progressed. This reduces variation in the amount of etching solution between the central and edge regions of the ceramic substrate 21. This allows the conductors 30, 32 to have an inflection point P along the entire periphery of their side surfaces. Furthermore, variation in the shape of the conductors 30, 32 can be reduced. The height of the inflection point P, the taper amount L, the distance S, and the creepage distance D can be adjusted by changing the size of the gap between adjacent weir portions 34, the thickness of the metal substrates 31A, 31B, the amount of etching solution, and the like.

[0084] (Process for Obtaining Circuit Board) After etching, the ceramic substrate 21 is divided along the scribe lines SL1 and SL2 to obtain a circuit board 10 including at least one of the plurality of conductor portions 30. This allows for the production of a circuit board 10 or a circuit board group 50 consisting of a plurality of circuit boards 10. The conductor portions 30 and 32 in the circuit board 10 obtained in this manner have an inflection point P along the entire periphery of the side surface. This increases the area of ​​the main surface of the conductor portions 30 and 32, allowing for the mounting of more semiconductor elements and the size of each semiconductor element to be increased. Furthermore, the circuit board group 50 obtained in this manner has reduced variation in shape among the plurality of circuit boards 10a, 10b, and 10c. Therefore, highly reliable circuit boards 10 can be efficiently obtained.

[0085] Although the embodiments of the present disclosure have been described above, the present disclosure is not limited to the above-described embodiments.

[0086] The present disclosure will be described in more detail with reference to examples, comparative examples, and reference examples, but the present disclosure is not limited to the following examples.

[0087] Example 1 <Fabrication of Circuit Board> A silicon nitride plate having a short side length of 135 mm, a long side length of 170 mm, and a thickness of 0.32 mm was fabricated. Scribe lines SL1 and SL2 were formed on the main surface 21A of a ceramic substrate 21, which was a silicon nitride plate, to partition the substrate into 15 rectangular partitions 22 (short side 25 mm × long side 50 mm) as shown in FIG. 6(a). The 15 partitions 22 were arranged in 5 rows and 3 columns. The partitions 22 were formed in this manner, and frame portions (dummy portions) surrounding the partitions 22 were provided at both ends of the short sides of the silicon nitride plate, each 5 mm long, and at both ends of the long sides, each 10 mm long. Next, a pair of copper plates (metal substrates 31A and 31B) having a thickness T of 1.2 mm were attached to both main surfaces of the ceramic substrate 21 via a brazing material to obtain a laminate. The laminate was heated at 800° C. in a vacuum while applying a pressure of 0.04 MPa to obtain a bonded body.

[0088] After the bonded body was cooled to room temperature, etching resist Er was applied to the metal substrates 31A and 31B. As shown in FIG. 7, the etching resist Er was applied to the area of ​​the silicon nitride plate that would become the conductor portion and the area that would become the dam portion (the area surrounding the internal area). An etching solution was then sprayed onto the bonded body to perform etching. By etching, conductor portions 30 and 32 and dam portions 34 were formed, and an aggregate circuit board 150 as shown in FIG. 8 was obtained. The bonded body was divided along scribe lines SL1 and SL2 to obtain multiple circuit boards 10.

[0089] <Measurement of Taper Amount and Creepage Distance> The taper amount L and creepage distance D of the divided circuit board 10 were measured at measurement positions A1 to A8 and B1 to B8 shown in Figure 8. The ratio [taper amount L / copper plate thickness T (1.2 mm)] was also calculated. Measurement positions A1 to A8 are positions (outer periphery) where the side of a conductor portion 30 faces the dam portion 34. Measurement positions B1 to B8 are positions (inner periphery) where the side of a conductor portion 30 faces another conductor portion 30. A measuring microscope (product name: MF-B1010D, manufactured by Mitutoyo Corporation) was used to measure the taper amount L and creepage distance D. From the measurement results, the average value and standard deviation of taper amount L, creepage distance D, and [taper amount L / copper plate thickness T (1.2 mm)] were calculated. The results are shown in Table 1.

[0090] <SEM Imaging of Side Surface> Cross-sectional images of the side surface were taken with an SEM at measurement positions A1 and B1. FIG. 9 shows an SEM image (magnification 30x) of the side surface taken at measurement position A1, and FIG. 10 shows an SEM image (magnification 30x) of the side surface taken at measurement position B1. As shown in FIGS. 9 and 10, the cross sections of the side surface at measurement positions A1 and B1 had an inflection point P and a skirt portion 30C. The conductor portion 30 in the circuit board 10 of Example 1 had an inflection point P and a skirt portion 30C around the entire periphery of its side surface. Therefore, it was confirmed that the circuit board 10 had a larger mounting area for semiconductor elements on the main surface of the conductor portion 30.

[0091] Comparative Example 1 <Fabrication of Circuit Board> A circuit board was fabricated using the same procedure as in Example 1, except that the etching resist Er was not applied to the position surrounding the partition portion 22, and the dam portion 34 was not formed by etching. Using the same procedure as in Example 1, the taper amount L and creepage distance D were measured at measurement positions A1 to A8 and B1 to B8, and the respective [taper amount L / copper plate thickness T (1.2 mm)] values ​​were calculated. The respective measured values, average values, and standard deviations are shown in Table 1. In addition, a cross-sectional image of the side surface at measurement position A1 was taken using an SEM. FIG. 11 shows an SEM image of the side surface (magnification: 30x).

[0092] 11, when no dam portion was formed, there was no inflection point P in the conductor portion. Therefore, it is considered that a circuit board obtained by etching without forming dam portion 34 does not have an inflection point P along the entire periphery of the side surface of the conductor portion.

[0093]

[0094] As shown in Table 1, the standard deviations of the taper amount L and creepage distance D in Example 1 were smaller than those in Comparative Example 1. Therefore, it was confirmed that producing multiple circuit boards as in Example 1 can reduce variation in shape. It was also confirmed that the ratio of the taper amount L to the thickness of the copper plate can be reduced. Therefore, it was confirmed that the taper amount L can be suppressed by forming a dam portion and performing etching.

[0095] According to the present disclosure, a circuit board capable of increasing the mounting area of ​​a semiconductor element and a manufacturing method thereof are provided. Also, according to the present disclosure, a group of circuit boards capable of increasing the mounting area of ​​a semiconductor element and having reduced shape variation is provided. According to the present disclosure, a power module including a plurality of circuit boards that ensure a sufficient mounting area for a semiconductor element and have reduced shape variation is provided.

[0096] 10, 10a, 10b, 10c...circuit board, 20...ceramic plate, 20A, 20B, 21A...main surface, 20E...outer edge, 21...ceramic base material, 22...partition portion, 30, 32...conductor portion, 31A, 31B...metal base material, 30A...first main surface, 30B...second main surface, 30C...skirt portion, 38...protrusion, 30a...lower end, 30b...upper end, P...inflection point, T...thickness, L...taper amount, D...creepage distance, S...distance, SL1, SL2...scribe lines, Er...etching resist, 34...dam portion, 35...circuit pattern, 40...bonding layer, 42...protruding portion, 50...circuit board group, 80...semiconductor element, 81, 82, 85...solder, 83...electrode, 84...metal wire, 86...casing, 90...base plate, 92...cooling fin, 93...screw, 94...grease, 95...resin, 100...power module, 150...aggregate circuit board.

Claims

1. A circuit board comprising a ceramic plate, a plate-shaped conductor, and a bonding layer that bonds the conductor and the ceramic plate, wherein, when viewed in cross section along the thickness direction of the conductor, the side surface of the conductor has an inflection point along its entire circumference and a skirt portion that spreads from the inflection point toward the ceramic plate.

2. The circuit board according to claim 1, wherein the inflection point is located closer to a second main surface of the conductor portion opposite to a first main surface joined to the joining layer.

3. The circuit board according to claim 1 or 2, wherein the thickness of the conductor portion is 0.8 mm or more.

4. A circuit board as described in claim 1 or 2, wherein, when viewed in cross section, the bonding layer has a protruding portion that protrudes from between the conductor portion and the ceramic plate, and when the length along the main surface of the ceramic plate from the outer edge of a second main surface opposite to the first main surface of the conductor portion bonded to the bonding layer to the tip of the protruding portion is L and the thickness of the conductor portion is T, L / T is 5 / 12 or less.

5. The circuit board according to claim 1 or 2, wherein the outer edge of a second main surface of the conductor portion opposite the first main surface bonded to the bonding layer protrudes outward beyond the inflection point.

6. A group of circuit boards comprising a plurality of circuit boards according to claim 1 or 2, wherein when each of the plurality of circuit boards is viewed in cross section, the bonding layer of each of the plurality of circuit boards has a protruding portion that protrudes from between the conductor portion and the ceramic plate, and the standard deviation of the length L along the main surface of the ceramic plate from the outer edge of the second main surface of the plurality of circuit boards opposite the first main surface of the conductor portion bonded to the bonding layer to the tip of the protruding portion is 0.05 mm or less.

7. A circuit board group comprising a plurality of circuit boards according to claim 1 or 2, wherein when each of the plurality of circuit boards is viewed in cross section, the standard deviation of the distance D measured along the main surface of the ceramic plate from the outer edge of the second main surface of the plurality of circuit boards opposite the first main surface joined to the joining layer of the conductor portion to the outer edge of the ceramic plate is 0.05 mm or less.

8. A power module comprising a plurality of circuit boards according to claim 1 or 2.

9. A power module according to claim 8, wherein, when each of the plurality of circuit boards is viewed in cross section, the bonding layer of each of the plurality of circuit boards has a protruding portion that protrudes from between the conductor portion and the ceramic plate, and the standard deviation of the length L along the main surface of the ceramic plate from the outer edge of a second main surface of the plurality of circuit boards opposite to the first main surface of the conductor portion bonded to the bonding layer to the tip of the protruding portion is 0.05 mm or less.

10. A power module according to claim 8, wherein, when each of the plurality of circuit boards is viewed in cross section, the standard deviation of the distance D measured along the main surface of the ceramic plate from the outer edge of a second main surface of the conductor portion opposite the first main surface joined to the joining layer to the outer edge of the ceramic plate is 0.05 mm or less.

11. A method for manufacturing a circuit board, comprising: a step of obtaining a bonded body in which a plate-shaped ceramic substrate having a scribe line and a plate-shaped metal substrate are bonded with a bonding layer; a step of forming a plurality of conductor portions in a central region of a main surface of the ceramic substrate and a plurality of dam portions intermittently surrounding the central region by etching away a portion of the metal substrate in the bonded body; and a step of dividing the ceramic substrate along the scribe line to obtain a circuit board having at least one of the plurality of conductor portions.

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