Minimizing contamination within substrate cleaning chamber

An automatic chamber cleaning process with pressure cycling and optional zone separation effectively reduces wafer contamination by up to 90%, addressing the challenge of particle redeposition in cleaning chambers and improving tool uptime.

WO2025174670A1PCT designated stage Publication Date: 2025-08-21LAM RES CORP
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Patent Information

Application Number
PCT/US2025/015021
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-02-16
Filing Date
2025-02-07
Publication Date
2025-08-21

AI Technical Summary

Technical Problem

Semiconductor wafers are susceptible to contamination during processing, with cleaning chambers accumulating particles that can redeposit on wafers, leading to poor cleaning ability and increased defects, requiring invasive manual interventions that impact tool uptime.

Method used

Implement an automatic chamber cleaning process that includes pressure cycling and fluid delivery without wafers present, using existing hardware to clean chamber surfaces, and optionally incorporating a barrier to separate the chamber into clean and dirty zones to minimize particle dispersion.

Benefits of technology

Maintains a low-particle environment within the chamber, reducing on-wafer contamination by up to 90% and minimizing the need for manual intervention, thus enhancing tool uptime and reducing plating defects.

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Abstract

Techniques described herein relate to methods and hardware for reducing contamination on wafers in chambers used for cleaning and pre-treating wafers prior to or after other processing steps such as electrodeposition. Generally, the chamber cleaning methods involve cleaning the chamber using a series of pressure changes and fluid delivery steps. The cleaning process shows many improvements over previous manual cleaning processes. In some cases, the chamber may be modified to include a barrier that separates the chamber into a clean zone and a dirty zone. This separation further reduces particle contamination on wafers. The method and hardware improvements may be practiced together or in isolation.
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Description

MINIMIZING CONTAMINATION WITHIN SUBSTRATE CLEANING CHAMBERCROSS-REFERENCES

[0001] A PCT Request Form is filed concurrently with this specification as part of the present application. Each application that the present application claims benefit of or priority to as identified in the concurrently filed PCT Request Form is incorporated by reference herein in their entireties and for all purposes.BACKGROUND

[0002] Semiconductor devices are susceptible to contamination during processing. This contamination can be in the form of small particles that contact a wafer while the wafer is being processed or transferred, for example.

[0003] The background description provided herein is for the purposes of generally presenting the context of the disclosure. Work of the presently named inventors, to the extent it is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure.SUMMARY

[0004] Various examples herein relate to chambers configured to clean semiconductor wafers, as well as apparatus that include such chambers, and methods for cleaning them. The cleaning methods may be performed while no wafers are present in the chamber for best results. The chamber features and methods described herein can be used to minimize transfer of contaminating particles from the chamber to the wafers.

[0005] In one aspect of the disclosed examples, a method of cleaning a chamber is provided, the method including: lowering a pressure in the chamber to a first target pressure while no wafer is present in the chamber; flowing a cleaning fluid into the chamber, where the cleaning fluid removes contaminants from one or more internal surfaces of the chamber; after the chamber reaches the first target pressure, providing inert gas to the chamber until the chamber reaches a second target pressure, the second target pressure being higher than the first target pressure; ceasing flowing the cleaning fluid into the chamber; after the chamber reaches the second target pressure, lowering the pressure in the chamber to a third target pressure, the third target pressure being lower than the second target pressure; and after the chamber reaches the third target pressure, providing inert gas to the chamber until the chamber reaches a fourth target pressure, the fourth target pressure being higher than the third target pressure.

[0006] In various examples, the chamber is a pre-treatment chamber configured to clean wafers. In some such examples, the pre-treatment chamber is part of an electroplating tool that further includes an electroplating chamber, and the method further includes cleaning a wafer in the pretreatment chamber and then transferring the wafer from the pre-treatment chamber to the electroplating chamber.

[0007] Particular process steps and / or conditions may be used in some cases. In some examples, the pressure in the chamber is lowered and raised at least five times during the cleaning. In some examples, the pressure in the chamber is lowered and raised at least about ten times during the cleaning. In some examples, the cleaning fluid is flowed into the chamber for a duration of at least about 30s.

[0008] The cleaning may be done at various times according to various conditions. In some examples, the chamber is cleaned based on a schedule, a number of wafers processed since a previous (e.g., most recent) cleaning operation, or an amount of time the chamber has spent cleaning wafers since a previous (e.g., most recent) cleaning operation. In various examples, the chamber is cleaned without manual interaction between a user and the chamber.

[0009] In another aspect of the disclosed examples, a chamber for cleaning wafers is provided, the chamber including: a wafer support configured to support a wafer during cleaning; a barrier separating the chamber into a clean zone and a dirty zone, where the barrier is configured to allow passage of fluid from the clean zone into the dirty zone, and where the barrier is configured to resist a flow of particles from the dirty zone into the clean zone; a gas inlet configured to introduce gas to the chamber, where the gas inlet is positioned above the barrier and opens into the clean zone; a liquid inlet configured to introduce a cleaning fluid to the chamber, where the liquid inlet is positioned above the barrier and opens into the clean zone; and a vacuum outlet configured to apply vacuum to the chamber, where the vacuum outlet is positioned below the barrier.

[0010] In various examples, the chamber is a pre-treatment chamber configured to clean wafers. The barrier may have particular properties. In various examples, the barrier may provide one or more channels therethrough. In some such examples, the one or more channels have at least one portion having a length to height aspect ratio of at least about 3: 1. In these or other examples, the one or more channels may include a labyrinthine structure. In these or other examples, the one or more channels may include a semi-permeable membrane or filter media.

[0011] In another aspect of the disclosed examples, an apparatus for electroplating is provided, the apparatus including: an electroplating chamber; a cleaning chamber configured to clean wafers, the cleaning chamber including: a wafer support configured to support a wafer during cleaning, abarrier separating the cleaning chamber into a clean zone and a dirty zone, where the barrier is configured to allow passage of fluid from the clean zone into the dirty zone, and where the barrier is configured to resist a flow of particles from the dirty zone into the clean zone, a gas inlet configured to introduce gas to the cleaning chamber, where the gas inlet is positioned above the barrier and opens into the clean zone, a liquid inlet configured to introduce a cleaning fluid to the cleaning chamber, where the liquid inlet is positioned above the barrier and opens into the clean zone, and a vacuum outlet configured to apply vacuum to the cleaning chamber, where the vacuum outlet is positioned below the barrier; and a transfer mechanism configured to transfer wafers between the cleaning chamber and the electroplating chamber.

[0012] In various examples, the barrier provides one or more channels therethrough. In some examples, the one or more channels have at least one portion having a length to height aspect ratio of at least about 3: 1. In some examples, the one or more channels include a labyrinthine structure. In some examples, the one or more channels include a semi-permeable membrane or filter media.

[0013] In some examples, the apparatus further includes a controller configured to cause: lowering a pressure in the cleaning chamber to a first target pressure while no wafer is present in the cleaning chamber; flowing a cleaning fluid into the cleaning chamber, where the cleaning fluid removes contaminants from one or more internal surfaces of the cleaning chamber; after the cleaning chamber reaches the first target pressure, providing inert gas to the cleaning chamber until the cleaning chamber reaches a second target pressure, the second target pressure being higher than the first target pressure; ceasing flowing the cleaning fluid into the cleaning chamber; after the cleaning chamber reaches the second target pressure, lowering the pressure in the cleaning chamber to a third target pressure, the third target pressure being lower than the second target pressure; and after the cleaning chamber reaches the third target pressure, providing inert gas to the cleaning chamber until the cleaning chamber reaches a fourth target pressure, the fourth target pressure being higher than the third target pressure.

[0014] These and other aspects are described further below with reference to the drawings.BRIEF DESCRIPTION OF THE DRAWINGS

[0015] FIGS. 1 A-1F depict a pre-treatment module as it is used to clean a wafer.

[0016] FIG. 2 presents a flowchart of a method of automatically cleaning a chamber according to various examples herein.

[0017] FIGS. 3A and 3B depict a chamber during a wafer cleaning operation (FIG. 3A) and during a chamber cleaning operation (FIG. 3B).

[0018] FIGS. 4 and 5 illustrate how automatic chamber cleaning may be scheduled according to certain implementations.

[0019] FIGS. 6 A and 6B depict experimental results showing the effectiveness of the automatic chamber cleaning process described herein.

[0020] FIG. 7A illustrates a portion of a chamber where no barrier is present.

[0021] FIG. 7B illustrates a portion of a chamber where a barrier is present to separate the chamber into a clean zone and a dirty zone.

[0022] FIGS. 8A-8D depict various examples of types of channel s / openings that may be used in a barrier such as the one shown in FIG. 7B.

[0023] FIGS. 9 A and 9B present experimental results showing the effectiveness of a barrier in a cleaning chamber.

[0024] FIG. 10 illustrates a multi-station electroplating tool according to various examples herein.DETAILED DESCRIPTION

[0025] In the following description, numerous specific details are set forth to provide a thorough understanding of the presented examples. The disclosed examples may be practiced without some or all of these specific details. In other instances, well-known process operations have not been described in detail to not unnecessarily obscure the disclosed examples. While the disclosed examples will be described in conjunction with the specific examples, it will be understood that it is not intended to limit the disclosed examples.

[0026] In this description, the terms “wafer,” “wafer substrate,” and “substrate” are used interchangeably, and may refer to semiconductor substrates of various dimensions including, but not limited to substrates having a diameter of about 200 mm, 300 mm, or 450 mm.

[0027] Sustained chamber cleanliness is beneficial for many steps of wafer manufacturing. Such a goal is particularly challenging for cleaning chambers, which serve to pre-treat or pre-clean wafers before process-critical steps such as electroplating and / or to clean wafers after steps that are known to produce contamination such as photoresist strip operations. As a result of cleaning operations, particles or other detritus can be generated, and some of these particles can be deposited on the wafer and / or on internal surfaces of the chamber. Over time, the chamber slowly becomes contaminated, with eventual impact to the process and related processing results. Unfortunately, the contaminated chamber components act as a reservoir for unwanted particles, which can be stirred up and redeposited on the wafers during wafer cleaning operations.

[0028] The Sabre 3D® Advanced Pre-Treatment (APT) chamber and Post-Treatment chamber,each available from Lam Research Corp, of Fremont, CA, are examples of chambers that can experience contamination. In many cases, the APT chamber is used to clean and treat incoming wafers before subsequent Electrofill steps, while the Post-Treatment chamber may be used to clean or otherwise treat wafers after Electrofill steps. In a typical pre-treatment chamber, wafers can be ablated with cleaning fluid (e.g., water, isopropyl alcohol, other solvents, etc.) to thereby remove contaminants from the wafers. In some cases, the cleaning fluid can contain one or more material to chemically pre-treat the wafers. In some cases, the cleaning fluid includes one or more surfactant. The pre-treatment may occur under vacuum and / or under atmospheric conditions. Many options are available depending on the desired processes.

[0029] Because particles are removed from the wafers in the pre-treatment chamber, the pretreatment chamber tends to accumulate particles. Sustained use of the pre-treatment chamber without intervention or manual cleaning can result in poor wafer cleaning ability. Unfortunately, such intervention is detrimental to tool uptime and is not always successful, sometimes requiring additional chamber re-clean(s).

[0030] This cleaning can be done automatically to ensure that the chamber remains in a substantially clean state. Advantageously, the in-situ cleaning can make use of idle chamber time between wafer processing, thereby avoiding impact to tool uptime / wafer throughput. In this process, a series of offline cleaning steps are executed using the same hardware that is used for wafer processing. However, the cleaning steps are performed while no wafer is being processed (e.g., while no wafer is present in the pre-treatment chamber). The lack of wafers is important not only to avoid external contamination (e.g., dirty wafer effluent), but also means that the cleaning fluid spray and cleaning steps can reach chamber hardware that is otherwise blocked or covered- up when a wafer is present. As mentioned, various spray treatments such as water, isopropyl alcohol, surfactants, other chemical cleaning agents, or a combination thereof may also be envisioned. The result of this automatic chamber clean is a sustained, low particle environment that does not need regular intervention of preventative maintenance.

[0031] Wafer pre-cleaning and feature wetting are important steps for producing defect-free Electrofill, especially for devices with patterned resists or high aspect ratio features such as through silicon vias (TSV). The Sabre3D® tool is equipped with a modular “advanced pretreatment” chamber that performs these functions. While the examples herein are presented in the context of a chamber used for cleaning / pre-treating wafers prior to electroplating, it is understood that the techniques herein can be implemented in any kind of processing chamber that is subject to contamination and that is configured for liquid-based processing. The type of processing towhich the wafer is subjected after leaving the chamber is not critical. For instance, the chamber could be used for cleaning / pre-treating wafers prior to an etching operation, a deposition operation, a stripping operation, a wafer treatment operation, etc. In many cases, the chamber is dedicated to cleaning wafers, meaning that no other substantial processing operations occur within the chamber. In other cases, the techniques herein can be adapted to processing chambers used for other purposes (e.g., etching, stripping, deposition, etc.) in addition to cleaning / pre-treating wafers.

[0032] FIGS. 1A-1F present views of a pre-treatment module as wafers are loaded and precleaned, according to one example. In this example, the pre-treatment module includes two chambers, but fewer or additional chambers can be provided within a single pre-treatment module, as desired. FIG. 1 A shows dry wafers entering the chambers. FIG. IB shows the chambers after they have closed and vacuum has been applied. FIG. 1C shows cleaning fluid (e.g., in this case de-ionized water (DI) spray) and vacuum being applied to the wafers. FIG. ID shows the introduction of gas to the chambers (e.g., in this case N2) to raise the pressure within the chambers, for example to atmospheric pressure. FIG. IE illustrates contaminated cleaning fluid being removed via drains in the chambers after (or while) the wafers are spun to remove excess cleaning fluid. This cleaning fluid can include particles and other contamination that were removed from the wafers. FIG. IF shows the chambers as they are opened. At this point, the wafers can be removed and transferred to another processing chamber (e.g., an electroplating chamber) for further processing. In some cases, such transfer may happen under vacuum to avoid introduction of additional particles on the wafers.

[0033] As shown in FIG. 1C, the wafers can be ablated with a set of spray nozzles that provide deionized water and / or other cleaning fluids. These nozzles serve both to wet the surface and patterned features on the wafer, and to gently scour the surface of residual scum (e.g., photoresist scum) or incoming resist defects. The effluent / cleaning fluid leaving the wafer often contains trace particulates, which collects in the chamber bottom and on chamber surfaces. Due to the nature of wafer “pre-cleaning,” the chamber used for pre-cleaning can accumulate particles, especially during high volume manufacturing. Many particles are benign; however, some particles can be cast back onto subsequent wafers. The result is a higher-than-desired particle count, which can negatively impact plating fidelity in follow-up process steps (e.g., voids, protrusions, and other particle-generated defects).

[0034] When particle accumulation is excessive, current cleaning techniques rely on decommissioning the pre-treatment module for service work and hand-cleaning all surfaces. Thework is invasive, negatively impacts to tool uptime, and - in many cases - is only partially successful at recovering the chambers to their pristine state. Poor / contaminated chamber status after manual wipe down is the result of accidental particle exposure from external sources, such as particles from wipes, bacterial growths in water spray bottles, or other detritus.

[0035] In various examples herein, an automatic cleaning process is implemented to clean a chamber. The chamber may be a pre-cleaning chamber used to clean / pre-treat wafers prior to other process steps, as mentioned above. This automatic cleaning process is done while no wafer is present in the chamber, for example between processing subsequent wafers while the chamber would otherwise be idle.

[0036] FIG. 2 presents a flowchart for a method of automatically cleaning a chamber according to various examples herein. At operation 201, the chamber is closed while no wafer is present in the chamber. Optionally, one or more check can be performed prior to closing the chamber to confirm that (1) no wafer is present in the chamber, and / or (2) no wafer is waiting to be loaded and processed in the chamber. These checks can ensure that the automatic cleaning process occurs at an appropriate time. At operation 203, the chamber is pumped down to a first target pressure. The first target pressure may be between about 50 Torr and about 760 Torr depending on the desired process. In some cases the first target pressure may be between about 50 Torr and about 100 Torr. The first target pressure may be held for a particular duration, for example a minimum duration of at least about 5s, or at least about 60s. The pumpdown may be achieved using an outlet in fluid connection with a vacuum source (e.g., referred to herein as a vacuum outlet).

[0037] At operation 205, cleaning fluid (e.g., liquid such as water, deionized water, isopropyl alcohol, other solvents, etc.) is provided to various internal surfaces of the chamber to wash away contaminants. For instance, the cleaning fluid may be provided to a substrate support, a drain, chamber walls, chamber floor, chamber ceiling, vacuum sealing surfaces, filters, etc. In some cases the cleaning fluid may contain surfactants or other chemical cleaning agents. Example flow rates for the cleaning fluid may be between about 1-2 LPM. The cleaning fluid may be provided for a particular duration, for example a minimum duration of at least about 2s, or at least about 60s. The cleaning fluid may be provided via a liquid inlet.

[0038] At operation 207, the chamber is filled with inert gas (e.g., N2, He, Ne, Ar, Kr, etc.) until reaching a second target pressure, which is higher than the first target pressure. The inert gas is added via a gas inlet. In many cases this second target pressure is about atmospheric pressure (e.g., between about 700 Torr and about 800 Torr, or about 760 Torr). The second target pressure may be maintained for a particular duration, for example a minimum duration of at least about 5s,or at least about 60s. At operation 209, the flow of cleaning fluid is stopped. At operation 211, the chamber is pumped down to a third target pressure. The third target pressure is lower than the second target pressure. The third target pressure may be greater or lower than the first target pressure. In some examples, the third target pressure is between about 50 Torr and about 300 Torr. The third target pressure may be maintained for a particular duration, for example a minimum duration of at least about 5s, or at least about 60s. In many cases, operation 209 occurs before operation 211, such that the flow of cleaning fluid is stopped prior to pumping the chamber to the third target pressure. In other cases this order may be reversed.

[0039] At operation 213, the chamber is again filled with inert gas until reaching a fourth target pressure. The fourth target pressure is greater than the third target pressure. The fourth target pressure may be about atmospheric pressure in various examples (e.g., between about 700 Torr and about 800 Torr, or about 760 Torr). The fourth target pressure may be maintained for a particular duration, for example a minimum duration of at least about 5s, or at least about 60s. Next, at operation 215, the chamber is opened, and a wafer can be loaded therein for processing, if available.

[0040] There are a few notable differences between the automatic chamber cleaning process described herein versus the standard processes used to clean wafers. First is that the automatic chamber clean process is executed without wafers being present in the chamber. This is not only convenient for tool pacing, but also removes the requirement of wafer handling or management beyond existing tool needs. When lacking a wafer, the cleaning fluid spray serves to clean hardware that is otherwise left unwashed during normal wafer cleaning processes, thereby helping improve cleaning effectiveness. For instance, FIG. 3A illustrates a chamber 300 during a wafer cleaning operation, while a wafer 301 is loaded onto a substrate support 302 within the chamber. The cleaning fluid 303 passes over the surface of the wafer 301, spilling over at its edges. The wafer 301 protects underlying chamber components from contact with the cleaning fluid, which is one reason that particles accumulate in these regions. By contrast, as shown in FIG. 3B, when no wafer is present in the chamber, the cleaning fluid 303 is able to contact more relevant surfaces within the chamber, which otherwise would have been shielded by the wafer 301. The substrate support 302 may be configured to allow a substantial portion of the cleaning fluid 303 to pass through it, as shown in FIG. 3B. A shield 304 may be positioned below the substrate support 302 and above an outlet 305 that is connected to vacuum, to prevent cleaning fluid 303 from entering the vacuum pump.

[0041] The second significant change between the automatic chamber cleaning process and thestandard APT process used to clean wafers is the addition of second vacuum pump down (e.g., operation 211) and second inert gas refill steps (e.g., operation 213). The second vacuum cycle helps to remove excess water and mist that accumulates within the chamber during the automatic chamber cleaning treatment. If this moisture is not removed, subsequent wafers tend to have an increased number of particles. While not being bound by theory or mechanism of action, it is believed that the excess water helps transport light particles onto the wafers.

[0042] Alternative examples may include different chamber drying methods, such as N2 purge or otherwise. Likewise, the composition of the spray media may include water, isopropyl alcohol, surfactants, and / or other solvents. Multi-step spray steps with different kinds of solution for each step may also be envisioned.

[0043] While the examples herein make use of existing hardware frequently present in the APT chamber and other types of wafer cleaning chambers (e.g., cleaning nozzles, plumbing, etc.), it is understood that this is done for convenience, and other types of cleaning hardware can be used alternately or in addition to the hardware already present in such chambers. For instance, multiple spray locations may be provided and oriented upwards / downwards / inwards / outwards or at process-critical components such as those listed above. In some examples, it may be beneficial to provide separate hardware for cleaning / pre-treating wafers vs. for cleaning the chamber. For instance, separate plumbing, spray nozzles, or other fluid delivery hardware may be used for each purpose. Such separation may provide easier serviceability, flexibility, or allow for additional post-modifications in the field. For instance, rotating or swiveling spray bars, omnidirectional spray balls, steam emitters, or other hardware intended to sustain hygienic environments may be provided.

[0044] The above example of automated chamber clean is intended to occur between wafers and during otherwise idle tool time. In some cases, the automated chamber clean may occur on a schedule based on the number of wafers that are processed in the chamber. For instance, the chamber may be automatically cleaned after each n wafers are processed, where l<n<100. In various cases, it may be beneficial to automatically clean the chamber after each wafer is processed. In other cases, less frequent automatic cleaning may be performed. In related examples, automatic chamber cleaning schedule may be based on the time the chamber has been used to clean wafers, rather than the number of wafers processed. For instance, the chamber may be automatically cleaned after each n minutes of wafer cleaning, where 0.5 < n < 500.

[0045] Another example is envisioned for more rigorous cleaning. To perform more rigorous cleaning, the cleaning process described herein can be performed for additional cycles or sub-cycles and / or for a more substantial duration. For example, the method of FIG. 2 may be repeated a number of times (e.g., repeating operations 203-213), or it may be modified to include additional chamber pumpdown / inert gas flow cycles. The target pressures for each pumpdown step may be the same or different from one another. Similarly, the target pressures for each inert gas introduction step may be the same or different from one another. At the most basic level, the cycling merely involves cycling the pressure within the chamber between (1) a relatively low pressure, and (2) a relatively higher pressure. This can be achieved by simply cycling between operations 211 and 213 as many times as desired. In some examples, additional fluid delivery steps can be provided as the chamber pressure is fluctuated. In other words, the fluid delivery steps related to operations 205 and 209 may be repeated as the chamber pressure is cycled.

[0046] In another example, enhanced cleaning may be done according to the method of FIG. 2, but longer durations may be used for one or more operations to achieve a greater degree of chamber cleaning.

[0047] The enhanced cleaning process may be scheduled as desired. In some examples, the enhanced cleaning schedule is based on a user-defined time out or wafer count. For instance, the chamber can automatically execute an enhanced chamber clean by repeating the method of FIG. 2 after every n wafers are processed therein, where 10<n<5000. For instance, after each 1000 wafers are processed in the chamber, the steps shown in FIG. 2 may be performed lOx before the chamber is made available for additional wafer processing. Alternatively, after each 1000 wafers are processed in the chamber, the steps shown in FIG. 2 may be performed a single time, with one or more operations having a substantially longer duration than those reported above. The frequency of enhanced cleaning is user-defined as to avoid significant impact to tool time. An offline form of this program may also be used such that the user can manually execute an enhanced chamber clean (or regular chamber clean) after a particle or contamination incident to help recover the chamber.

[0048] FIG. 4 illustrates an example of how the chamber may be utilized with respect to cleaning wafers vs. automatically cleaning the chamber. In this case, after the chamber closes with a wafer therein in operation 401, a cleaning / pre-treatment process is performed on the wafer in operation 403. This cleaning / pre-treatment may occur as described in relation to FIGS. 1 A-1F, for instance, and may be referred to as an APT process. After the wafer is cleaned, it is removed from the chamber and transferred for further processing. Next, the chamber may be subjected to an automatic cleaning operation, such as one of operations 405 / 407 / 409. The automatic cleaning operation may be a “Quick Automatic Chamber Cleaning” (QACC) operation that occursaccording to the method of FIG. 2, or it may be an “Enhanced Automatic Chamber Cleaning” (EACC) operation that performs more thorough chamber cleaning, as described above (e.g., using longer processing times, additional vacuum cycles, etc.). QACC and EACC can be used in combination with one another over time as desired for a particular chamber. The QACC may have a relatively shorter duration than the EACC. In some examples, the QACC provides cleaning fluid to the chamber for a minimum duration of about 0.5 seconds, about 1 second, about 3 seconds, or about 5 seconds. Similarly, the QACC may provide cleaning fluid to the chamber for a maximum duration of about 5 seconds, or about 10 seconds. In these or other examples, the EACC may provide cleaning fluid to the chamber for a minimum duration of at least about 20 seconds, or at least about 30 seconds, or at least about 1 minute. In these or other cases the EACC may provide cleaning fluid to the chamber for a maximum duration of about 1 minute, or about 5 minutes, or about 10 minutes. In some cases, the QACC and EACC processes running on a particular chamber may have particular relative durations. For instance, the EACC process may provide cleaning fluid to the chamber for a duration that is at least about 5 times, or at least about 10 times, or at least about 20 times as long as the duration over which cleaning fluid is provided to the chamber during the QACC process. Similarly, other steps described in relation to FIG. 2 may have proportionally longer durations when performed as part of an EACC process, as compared to part of a QACC process.

[0049] Returning to FIG. 4, as shown in the top row in operation 405, the QACC may be performed based on the number of wafers that have been cleaned in the chamber since a previous chamber cleaning operation, or based on a cumulative amount of time the chamber has been used to clean wafers since a previous cleaning operation. In some cases, as shown in the middle row in operation 407, the QACC may be performed after each substrate is cleaned and removed from the chamber. As shown in the bottom row in operation 409, the EACC may be performed based on the number of wafers that have been cleaned in the chamber since a previous QACC or EACC operation, or based on an amount of time the chamber has been used to clean wafers since a previous QACC or EACC operation.

[0050] In many cases, automatic chamber clean can be scheduled using a logic tree to control frequency / timing of cleaning. Depending on a specific customer use case, such logic would be used to strike a balance between chamber cleanliness and impact to tool uptime. Ideally, automatic chamber cleaning would be executed between every wafer, however, this may not always be practical if wafer throughput is very high. Under such conditions, scheduled downtime may be required per chamber utilization (i.e. per number of wafers processed or total processing time). Aversion of such a logic tree is shown in FIG. 5. In this example, QACC and EACC may be executed based on tool status and incoming wafer status. Here, QACC is performed periodically as additional wafers within the same lot are processed (e.g., in between processing the wafers, when the chamber is empty). Once all of the wafers in the same lot are processed and the wafer count reaches a target (e.g., the EACC limit), the more extensive EACC process is performed.

[0051] FIGS. 6 A and 6B show experimental results that illustrate the effectiveness of the chamber cleaning methods described herein. In this experiment, a chamber was intentionally contaminated with external alumina particles. The chamber was then used to clean / pre-treat a series of wafers. The wafers were then tested to determine the degree of particle contamination. In the case of FIG. 6 A, no automatic chamber cleaning process was used. As a result, the wafers that were processed relatively later show greater signs of contamination compared to the wafers that were processed relatively earlier. This shows that, absent chamber cleaning, the particle contamination problems on wafers continue to worsen over time. By contrast, in the case of FIG. 6B, automatic chamber cleaning was repeatedly performed, and resulted in substantially stable particle performance on the wafers. In FIG. 6B, the “before” and “after” refer to substrates cleaned in the chamber before and after the external alumina particles were added. ACC1 refers to a wafer processed after the first automatic chamber clean, ACC2 refers to a wafer processed after the second automatic chamber clean, and ACC3 refers to a wafer processed after the third automatic chamber clean. Notably, the results in FIG. 6B are essentially stable once the automatic chamber cleans are performed. This is a substantial improvement from the case shown in FIG. 6A, where no automatic chamber cleans are performed and particle performance continually worsens over time.

[0052] In other words, the lab tests show that automatic chamber cleaning as described herein can recover chambers that have been deliberately contaminated with external alumina particles. In the absence of this intermittent clean, particles are disbursed around the chamber during wafer processing and land on the wafer surface. When automatic chamber cleaning is enabled, the contaminants are quickly removed via the waste effluent and subsequent wafers do not capture high particle counts.

[0053] The automatic chamber cleaning techniques described herein provide a hands-off, process only approach that requires no additional hardware. The proposed solution makes use of existing cleaning hardware within the chamber to irrigate and clean most chamber surfaces, although additional or alternative fluid delivery hardware may be provided in some cases. Notably, the cleaning approach herein can be used with minimal-to-no impact to tool throughput, as itmakes use of module idle time, in-between wafer processing. The result of this improvement is that we can sustain a low-particle, pre-cleaning chamber without the need for manual intervention or tool-down preventative maintenance. By extension, the reduced particle impact should decrease the frequency of observed plating defects, thus increasing number of yielding dies post process.

[0054] Another technique that can be used to reduce particle contamination in the chamber is to modify the chamber hardware such that the chamber is physically divided by a barrier (or multiple barriers) into a clean zone and a dirty zone. The dirty zone may also be referred to as a particle accumulation zone. The hardware modification can be done in addition to the automatic chamber cleaning method described above. Generally, the hardware modification will improve the automatic cleaning process, but the automatic cleaning process can also be performed without the hardware modifications.

[0055] Dividing the chamber into a clean zone and a dirty zone reduces disruption and dispersion of particles and debris, especially from the bottom of the chamber and other contaminated surfaces. This reduction is enabled by preventing turbulent airflow, particularly during vacuum and venting cycles that tend to draw particles off of contaminated chamber surfaces and into the air. Reducing / preventing turbulent air flow between the clean zone and the dirty zone prevents accidental re-contamination of the bulk chamber / pre-treatment module by particles that have settled at the bottom of the chamber or in the drain line.

[0056] Experimental results, discussed further below, show that the use of a barrier to divide the chamber into the clean zone and the dirty zone results in an overall improvement in on-wafer particle count by up to about 90% compared to the current hardware design.

[0057] For many pre-treatment chambers, the worst particle accumulation zones is at the bottom of the chamber and in the drain line, which is positioned in the bottom of the chamber. Directing airflow away from this zone prevents particle disruption and dispersion that would otherwise lead to contamination of the clean wafer or module headspace. FIGS. 7A and 7B show this improvement. Specifically, FIG. 7A shows an example where no barrier is provided within the chamber, while FIG. 7B shows an example where a barrier 715 is included to divide the chamber into a clean zone 720 above the barrier 715 and a dirty zone 721 below the barrier 715. The vacuum source is located below the barrier 715, while the inlet for providing inert gas and the inlet for providing cleaning fluid are located above the barrier 715. This physical separation of the vacuum outlet from the inert gas inlet and cleaning fluid inlet serves to maintain the majority of the contaminating particles within the dirty zone 721 of the chamber, preventing them from being dispersed into the clean zone 720 (where they could contaminate a wafer) during vacuum andventing operations.

[0058] In the example of FIG. 7B, when the chamber is closed, the staggered barriers 715 produce a narrow airflow path that limits turbulent air formation at the bottom of the chamber. The barrier(s) 715 also physically partitions / guards the upper chamber (e.g., the clean zone 720) from errant bubbles in the drain or contaminated parts below the wafer (e.g., flexible parts that yield particles due to manufacturing defects or general usage).

[0059] In essence, the barrier(s) serve as a physical barrier with integrated conduits that allow for efficient pressure equalization between the two sub chambers or zones (e.g., the clean zone and the dirty zone). The conduits are important for allowing wafer processing and minimizing particle backflow along the same path. The conduits can be simple, such as a narrow space between the various barriers, a labyrinthian design that requires longer airflow path lengths, or semi- permeable materials that allow for fluid transfer but limited particle transfer, as shown in FIGS. 8A-8D. FIG. 8A shows a simple channel 830a. FIG. 8B shows a narrow channel 830b having a portion with a high aspect ratio (e.g., as used herein a high aspect ratio channel is one having a length to height aspect ratio of at least about 3: 1, where the length is measured substantially horizontally and the height is measured substantially vertically). FIG. 8C shows a channel 830c that has a labyrinthine path having numerous obstructions. As used herein, a path is considered labyrinthine if it includes numerous twists, turns, or other obstructions that result in a non-linear flow path. FIG. 8D shows a channel 83 Od that includes a semi-permeable membrane or filter media that allows for passage of liquid and gas but is resistant to particle backflow. Generally, the barrier 815 should allow for ease of gas and liquid movement between the clean zone 820 and the dirty zone 821, and should also minimizes particle backflow from the dirty zone 821 to the clean zone 820.

[0060] During steps involving liquid processing, accumulated liquid drips along the same narrow path defined by the conduit(s). The effluent (e.g., used cleaning fluid), containing particles removed from the wafer, pools at the bottom of the chamber until the drain is opened. Any residue that remains after the draining steps are now partitioned away from the wafer and cannot be stirred up during additional wafer processing.

[0061] It is understood that the barrier may be made of a single piece of hardware or multiple pieces of hardware. Unless otherwise stated, the term “barrier” as used herein is intended to include multi-part barriers. In some examples, one or more barrier may be chemically inert and compatible with treatments that involve chemical cleaning steps. These chemical cleaning steps may be performed to clean wafers and / or to clean the chamber.

[0062] In various examples, the barrier may be configured to have smooth surfaces, and may be configured to include liquid-directing features such as channels, grooves, etc. These features, as well as the overall geometry of the barrier, may be configured to minimize or prevent stagnant fluid and associated risks of bacteria growth, etc. The barrier may be implemented as a standalone piece of hardware that can be swapped into a chamber as needed. This allows for easy service and replacement of the barrier, if needed. Alternatively, the barrier may be directly incorporated into the chamber in a more permanent manner in some cases.

[0063] Experimental results have shown that the barrier described herein can be used to substantially reduce particle contamination on wafers. A chamber was intentionally contaminated with external alumina particles. Wafers were processed in the chamber before the intentional contamination, as well as afterwards. In the case of FIG. 9A, the chamber did not include any barriers, and resembled the chamber of FIG. 7A. Here, the intentional contamination results in substantial on-wafer particle contamination, much higher than was seen prior to the intentional contamination. By contrast, in the case of FIG. 9B, the chamber did include a barrier, and resembled the chamber of FIG. 7B. Here, the intentional contamination did not result in a substantial increase in particle count. It can be concluded that the barrier acted to prevent disruption and dispersion of particles from the dirty zone into the clean zone, thereby preventing these particles from contacting the wafer. This is a substantial improvement, with particle counts decreasing about 60-90% compared to what would be seen without any barrier.

[0064] The barrier technique provides a hands-off, hardware-based approach that significantly reduces the risk of on-wafer particle contamination in pre-cleaning chambers. The flaw of nearly all “cleaning” chambers is that the material cleaned from the wafer must go somewhere and more- often-than-not contaminates the chamber itself. Over long-term use, the chamber serves as a particle reservoir, often doing more harm than good. In various disclosed examples, we offer a solution that partitions particle accumulation zones away (e.g., dirty zones) from process critical zones (e.g., clean zones) using directed airflow. Airflow-directing barriers are simple, inexpensive, and process transparent when placed outside process critical zones. Despite the simplicity, the innovation is quite effective. As mentioned, as a result of the airflow directing barriers, the number of particles that land on the wafer has been reduced by up to 90%. By limiting the number of particles reaching the wafer, the number of plating defects can be reduced, as well as the frequency of both i) chamber cleans and ii) bath or bath filter replacements.

[0065] The techniques described herein can be implemented in any type of chamber that experiences contamination and is configured for liquid-based processing. In many cases, thechamber is a pre-treatment chamber used to clean and / or pre-treat a wafer prior to being transferred to another chamber for additional processing such as electroplating, etching, stripping, deposition, etc. In some cases, the chamber is a post-treatment chamber used to clean and / or treat a wafer after the wafer is subjected to a particular type of processing that generates contamination. In a number of examples, the chamber may be part of a larger tool or system that may be configured to perform such additional processing. For instance, in a particular example, the tool may be configured to include both (1) one or more pre-treatment (or post-treatment) modules having one or more chambers for pre-treating and / or cleaning wafers, and (2) one or more modules configured for electroplating or other types of additional processing. FIG. 10 presents one example of an electrodeposition apparatus 1000 configured in this manner.

[0066] In this example of FIG. 10, the electrodeposition apparatus 1000 has a set of electroplating cells 1007, each containing an electroplating bath, in a paired or multiple “duet” configuration. In addition to electroplating, the electrodeposition apparatus 1000 may perform a variety of other electroplating related processes and sub-steps, such as spin-rinsing, spin-drying, metal and silicon wet etching, electroless deposition, pre-wetting and pre-chemical treating, reducing, annealing, electro-etching and / or electropolishing, photoresist stripping, and surface pre-activation, for example. The electrodeposition apparatus 1000 is shown schematically looking top down in FIG. 10, and only a single level or “floor” is revealed in the figure, but it is to be readily understood by one having ordinary skill in the art that such an apparatus, e.g., the Lam Sabre® 3D tool, can have two or more levels “stacked” on top of each other, each potentially having identical or different types of processing stations.

[0067] Referring once again to FIG. 10, the substrates 1006 that are to be electroplated are generally fed to the electrodeposition apparatus 1000 through a front end loading FOUP 1001 and, in this example, are brought from the FOUP to the main substrate processing area of the electrodeposition apparatus 1000 via a front-end robot 1002 that can retract and move a substrate 1006 driven by a spindle 1003 in multiple dimensions from one station to another of the accessible stations — two front-end accessible stations 1004 and also two front-end accessible stations 1008 are shown in this example. The front-end accessible stations 1004 and 1008 may include, for example, pre-treatment stations, and spin rinse drying (SRD) stations. Either or both of these front-end accessible stations 1004 and 1008 may be pre-treatment chambers as described herein. Lateral movement from side-to-side of the front-end robot 1002 is accomplished utilizing robot track 1002a. Each of the substrates 1006 may be held by a cup / cone assembly (not shown) driven by a spindle 1003 connected to a motor (not shown), and the motor may be attached to a mountingbracket 1009. Also shown in this example are the four “duets” of electroplating cells 1007, for a total of eight electroplating cells 1007. A system controller (not shown) may be coupled to the electrodeposition apparatus 1000 to control some or all of the properties of the electrodeposition apparatus 1000. The system controller may be programmed or otherwise configured to execute instructions according to processes described earlier herein.System Controller

[0068] In some implementations, a controller is part of a system, which may be part of the abovedescribed examples. Such systems can comprise semiconductor processing equipment, including a processing tool or tools, chamber or chambers, a platform or platforms for processing, and / or specific processing components (a wafer pedestal, a gas flow system, etc.). These systems may be integrated with electronics for controlling their operation before, during, and after processing of a semiconductor wafer or substrate. The electronics may be referred to as the “controller,” which may control various components or subparts of the system or systems. The controller, depending on the processing requirements and / or the type of system, may be programmed to control any of the processes disclosed herein, including the delivery of processing gases, temperature settings (e.g., heating and / or cooling), pressure settings, vacuum settings, power settings, radio frequency (RF) generator settings, RF matching circuit settings, frequency settings, flow rate settings, fluid delivery settings, positional and operation settings, wafer transfers into and out of a tool and other transfer tools and / or load locks connected to or interfaced with a specific system.

[0069] Broadly speaking, the controller may be defined as electronics having various integrated circuits, logic, memory, and / or software that receive instructions, issue instructions, control operation, enable cleaning operations, enable endpoint measurements, and the like. The integrated circuits may include chips in the form of firmware that store program instructions, digital signal processors (DSPs), chips defined as application specific integrated circuits (ASICs), and / or one or more microprocessors, or microcontrollers that execute program instructions (e.g., software). Program instructions may be instructions communicated to the controller in the form of various individual settings (or program files), defining operational parameters for carrying out a particular process on or for a semiconductor wafer or to a system. The operational parameters may, in some examples, be part of a recipe defined by process engineers to accomplish one or more processing steps during the fabrication of one or more layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and / or dies of a wafer.

[0070] The controller, in some implementations, may be a part of or coupled to a computer that is integrated with, coupled to the system, otherwise networked to the system, or a combination thereof. For example, the controller may be in the “cloud” or all or a part of a fab host computer system, which can allow for remote access of the wafer processing. The computer may enable remote access to the system to monitor current progress of fabrication operations, examine a history of past fabrication operations, examine trends or performance metrics from a plurality of fabrication operations, to change parameters of current processing, to set processing steps to follow a current processing, or to start a new process. In some examples, a remote computer (e.g. a server) can provide process recipes to a system over a network, which may include a local network or the Internet. The remote computer may include a user interface that enables entry or programming of parameters and / or settings, which are then communicated to the system from the remote computer. In some examples, the controller receives instructions in the form of data, which specify parameters for each of the processing steps to be performed during one or more operations. It should be understood that the parameters may be specific to the type of process to be performed and the type of tool that the controller is configured to interface with or control. Thus as described above, the controller may be distributed, such as by comprising one or more discrete controllers that are networked together and working towards a common purpose, such as the processes and controls described herein. An example of a distributed controller for such purposes would be one or more integrated circuits on a chamber in communication with one or more integrated circuits located remotely (such as at the platform level or as part of a remote computer) that combine to control a process on the chamber.

[0071] Without limitation, example systems may include a plasma etch chamber or module, a deposition chamber or module, a spin-rinse chamber or module, a metal plating chamber or module, a clean chamber or module, a bevel edge etch chamber or module, a physical vapor deposition (PVD) chamber or module, a chemical vapor deposition (CVD) chamber or module, an atomic layer deposition (ALD) chamber or module, an atomic layer etch (ALE) chamber or module, an ion implantation chamber or module, a track chamber or module, and any other semiconductor processing systems that may be associated or used in the fabrication and / or manufacturing of semiconductor wafers.

[0072] As noted above, depending on the process step or steps to be performed by the tool, the controller might communicate with one or more of other tool circuits or modules, other tool components, cluster tools, other tool interfaces, adjacent tools, neighboring tools, tools located throughout a factory, a main computer, another controller, or tools used in material transport thatbring containers of wafers to and from tool locations and / or load ports in a semiconductor manufacturing factory.CONCLUSION

[0073] Although the foregoing examples have been described in some detail for purposes of clarity of understanding, it will be apparent that certain changes and modifications may be practiced within the scope of the appended claims. It should be noted that there are many alternative ways of implementing the processes, systems, and apparatus of the present examples. Accordingly, the present examples are to be considered as illustrative and not restrictive, and the examples are not to be limited to the details given herein.

Claims

CLAIMSWhat is claimed is:

1. A method of cleaning a chamber, the method comprising: lowering a pressure in the chamber to a first target pressure while no wafer is present in the chamber; flowing a cleaning fluid into the chamber, wherein the cleaning fluid removes contaminants from one or more internal surfaces of the chamber; after the chamber reaches the first target pressure, providing inert gas to the chamber until the chamber reaches a second target pressure, the second target pressure being higher than the first target pressure; ceasing flowing the cleaning fluid into the chamber; after the chamber reaches the second target pressure, lowering the pressure in the chamber to a third target pressure, the third target pressure being lower than the second target pressure; and after the chamber reaches the third target pressure, providing inert gas to the chamber until the chamber reaches a fourth target pressure, the fourth target pressure being higher than the third target pressure.

2. The method of claim 1, wherein the chamber is a pre-treatment chamber configured to clean wafers.

3. The method of claim 2, wherein the pre-treatment chamber is part of an electroplating tool that further comprises an electroplating chamber, the method further comprising cleaning a wafer in the pre-treatment chamber and then transferring the wafer from the pre-treatment chamber to the electroplating chamber.

4. The method of claim 1, wherein the pressure in the chamber is lowered and raised at least five times during the cleaning.

5. The method of claim 1, wherein the pressure in the chamber is lowered and raised at leastabout ten times during the cleaning.

6. The method of claim 1, wherein the cleaning fluid is flowed into the chamber for a duration of at least about 30s.

7. The method of claim 1, wherein the chamber is cleaned based on a schedule, the schedule being based on time, a number of wafers processed since a previous cleaning operation, and / or a cumulative time the chamber has spent cleaning wafers since the previous cleaning operation.

8. The method of claim 1, wherein the chamber is cleaned without manual interaction between a user and the chamber.

9. A chamber for cleaning wafers, the chamber comprising: a wafer support configured to support a wafer during cleaning; a barrier separating the chamber into a clean zone and a dirty zone, wherein the barrier is configured to allow passage of fluid from the clean zone into the dirty zone, and wherein the barrier is configured to resist a flow of particles from the dirty zone into the clean zone; a gas inlet configured to introduce gas to the chamber, wherein the gas inlet is positioned above the barrier and opens into the clean zone; a liquid inlet configured to introduce a cleaning fluid to the chamber, wherein the liquid inlet is positioned above the barrier and opens into the clean zone; and a vacuum outlet configured to apply vacuum to the chamber, wherein the vacuum outlet is positioned below the barrier.

10. The chamber of claim 9, wherein the chamber is a pre-treatment chamber configured to clean wafers.

11. The chamber of claim 9, wherein the barrier provides one or more channels therethrough.

12. The chamber of claim 11, wherein the one or more channels have at least one portion having a length to height aspect ratio of at least about 3: 1.

13. The chamber of claim 11, wherein the one or more channels comprise a labyrinthine structure.

14. The chamber of claim 11, wherein the one or more channels comprise a semi-permeable membrane or filter media.

15. An apparatus for electroplating, the apparatus comprising: an electroplating chamber; a cleaning chamber configured to clean wafers, the cleaning chamber comprising: a wafer support configured to support a wafer during cleaning, a barrier separating the cleaning chamber into a clean zone and a dirty zone, wherein the barrier is configured to allow passage of fluid from the clean zone into the dirty zone, and wherein the barrier is configured to resist a flow of particles from the dirty zone into the clean zone, a gas inlet configured to introduce gas to the cleaning chamber, wherein the gas inlet is positioned above the barrier and opens into the clean zone, a liquid inlet configured to introduce a cleaning fluid to the cleaning chamber, wherein the liquid inlet is positioned above the barrier and opens into the clean zone, and a vacuum outlet configured to apply vacuum to the cleaning chamber, wherein the vacuum outlet is positioned below the barrier; and a transfer mechanism configured to transfer wafers between the cleaning chamber and the electroplating chamber.

16. The apparatus of claim 15, wherein the barrier provides one or more channels therethrough.

17. The apparatus of claim 16, wherein the one or more channels have at least one portion having a length to height aspect ratio of at least about 3: 1.

18. The apparatus of claim 16, wherein the one or more channels comprise a labyrinthine structure.

19. The apparatus of claim 16, wherein the one or more channels comprise a semi-permeable membrane or filter media.

20. The apparatus of claim 16, further comprising a controller configured to cause: lowering a pressure in the cleaning chamber to a first target pressure while no wafer is present in the cleaning chamber; flowing a cleaning fluid into the cleaning chamber, wherein the cleaning fluid removes contaminants from one or more internal surfaces of the cleaning chamber; after the cleaning chamber reaches the first target pressure, providing inert gas to the cleaning chamber until the cleaning chamber reaches a second target pressure, the second target pressure being higher than the first target pressure; ceasing flowing the cleaning fluid into the cleaning chamber; after the cleaning chamber reaches the second target pressure, lowering the pressure in the cleaning chamber to a third target pressure, the third target pressure being lower than the second target pressure; and after the cleaning chamber reaches the third target pressure, providing inert gas to the cleaning chamber until the cleaning chamber reaches a fourth target pressure, the fourth target pressure being higher than the third target pressure.

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