Electrical stimulation device having wide range of operating voltage
The electrical stimulation circuit with MOSFET transistors and bias circuits addresses the challenge of wide voltage operation and power efficiency, enabling safe and efficient device performance for therapeutic applications.
Patent Information
- Application Number
- PCT/KR2025/002416
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2025-02-20
- Filing Date
- 2025-02-20
- Publication Date
- 2025-08-28
AI Technical Summary
Electrical stimulation devices face challenges in operating over a wide range of voltages and achieving miniaturization and power efficiency due to the use of BCD transistors, which are area-intensive and have high standby power, making commercialization difficult.
An electrical stimulation circuit utilizing MOSFET transistors with NMOS and PMOS bias circuits, including resistors and diodes, to manage voltage thresholds and provide a wide range of operating voltages while maintaining power efficiency, using a supply tracking circuit to adjust PMOS bias circuit driving voltage.
The solution enables the electrical stimulation device to operate safely and effectively over a wide range of voltages, ensuring miniaturization and low power consumption, thereby enhancing therapeutic efficacy and device stability.
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Figure KR2025002416_28082025_PF_FP_ABST
Abstract
Description
Electrical stimulation device with a wide range of operating voltages
[0001] The following examples relate to electrical stimulation devices, and more particularly, to electrical stimulation devices having a wide range of operating voltages and excellent power efficiency using general MOSFET transistors.
[0002] Electrical stimulation devices are devices that electrically stimulate the body by delivering electrical signals of a specific voltage to treat the body. To enhance the effectiveness of electrical stimulation therapy and improve the stability of the device, the device must operate over a wide range of operating voltages.
[0003] For example, when the impedance between the body tissue and the electrode is large, it should operate at a high voltage to apply an appropriate stimulation current, and when the impedance between the body tissue and the electrode is small, it should operate at a low voltage to prevent tissue damage due to electric fields and thermal injuries.
[0004] However, BCD transistors that can operate at high voltages have a large area, making it difficult to miniaturize the electrical stimulation device, and even when a wide range of operating voltages is implemented, standby power is high, making commercialization difficult.
[0005] The technical problem of the present invention is to provide an electrical stimulation circuit having a wide range of operating voltages and excellent power efficiency using a MOSFET transistor.
[0006] According to an exemplary embodiment, an electrical stimulation device is disclosed, comprising: an electrode providing an electrical signal to a body; and a plurality of electrical signal providing circuits supplying the electrical signals to the electrodes, wherein the electrical signal providing circuits include an NMOS bias circuit including a plurality of NMOS transistors whose drains and sources are connected to each other and a plurality of first resistors connected to gates of the NMOS transistors; a PMOS bias circuit including a plurality of second resistors connected to gates of the PMOS transistors whose drains and sources are connected to each other; and a supply tracking circuit providing a PMOS bias circuit driving voltage to the PMOS bias circuit, the PMOS bias circuit driving voltage being lower by a predetermined value from a driving voltage of the electrical signal providing circuit, wherein the electrodes are connected between the NMOS bias circuit and the PMOS bias circuit.
[0007] Here, the plurality of first resistors may be connected in series with each other, and the plurality of second resistors may be connected in series with each other.
[0008] And, the NMOS bias circuit driving voltage can be provided to the gates of the NMOS transistors via a plurality of first diodes connected in parallel with each other.
[0009] Additionally, when the voltage of the electric signal supplied to the electrode is lower than the first threshold voltage, the NMOS transistors can be driven by the driving voltage of the electric stimulation device.
[0010] Here, when the voltage of the electric signal supplied to the electrode is higher than the second threshold voltage, the voltage of the electric signal supplied to the electrode is divided and applied to the plurality of first resistors, and the NMOS transistors can be driven by the voltage divided and applied to the plurality of first resistors.
[0011] And, the PMOS bias circuit driving voltage can be provided to the gates of the PMOS transistors via a plurality of second diodes connected in parallel with each other.
[0012] Additionally, when the voltage of the electric signal supplied to the electrode is higher than the second threshold voltage, the PMOS transistors can be driven by the PMOS bias circuit driving voltage.
[0013] Here, when the voltage of the electric signal supplied to the electrode is lower than the first threshold voltage, the driving voltage of the electric signal providing circuit is divided and applied to the plurality of second resistors, and the NMOS transistors can be driven by the voltage divided and applied to the plurality of second resistors.
[0014] And, the predetermined value may be 2.8V.
[0015] According to the present invention, an electrical stimulation circuit having a wide range of operating voltages and excellent power efficiency can be provided using a MOSFET transistor.
[0016] FIG. 1 is a diagram illustrating a concept of an electrical stimulation circuit according to an exemplary embodiment.
[0017] Figure 2 is a block diagram illustrating the configuration of an electrical stimulation circuit according to an exemplary embodiment.
[0018] FIG. 3 is a block diagram illustrating the configuration and operation of an NMOS bias circuit according to an exemplary embodiment.
[0019] FIG. 4 is a block diagram illustrating the configuration and operation of a PMOS bias circuit according to an exemplary embodiment.
[0020] Figure 5 is a block diagram illustrating the operation of a bias circuit according to an exemplary embodiment.
[0021] Figure 6 is a conceptual diagram illustrating the concept of a supply tracking circuit according to an exemplary embodiment.
[0022] FIG. 7 is a diagram illustrating the operation of a supply tracking circuit according to an exemplary embodiment.
[0023] FIG. 8 is a diagram illustrating an analog buffer according to an exemplary embodiment.
[0024] Fig. 9 is a drawing illustrating the structure of a level shifter according to an exemplary embodiment.
[0025] Fig. 10 is a drawing explaining the operation of a level shifter according to an exemplary embodiment.
[0026] Structural or functional descriptions are merely illustrative for the purpose of explaining embodiments according to the concept of the present invention, and embodiments according to the concept of the present invention may be implemented in various forms and are not limited to the embodiments described herein.
[0027] Embodiments according to the concept of the present invention may have various modifications and take various forms, and thus, embodiments are illustrated in the drawings and described in detail in this specification. However, this is not intended to limit embodiments according to the concept of the present invention to specific disclosed forms, but rather includes modifications, equivalents, or alternatives that fall within the spirit and technical scope of the present invention.
[0028] While terms such as "first" or "second" may be used to describe various components, these components should not be limited by these terms. These terms are intended solely to distinguish one component from another. For example, a first component may be referred to as a "second component," and similarly, a second component may also be referred to as a "first component," without departing from the scope of the invention.
[0029] When a component is referred to as being "connected" or "connected" to another component, it should be understood that it may be directly connected or connected to that other component, but that there may be other components in between. Conversely, when a component is referred to as being "directly connected" or "directly connected" to another component, it should be understood that there are no other components in between. Expressions that describe relationships between components, such as "between," "immediately between," or "directly adjacent to," should be interpreted similarly.
[0030] The terminology used herein is for the purpose of describing specific embodiments only and is not intended to limit the present invention. The singular expressions include plural expressions unless the context clearly indicates otherwise. In this specification, it should be understood that the terms "comprises" or "has" are intended to specify the presence of a described feature, number, step, operation, component, part, or combination thereof, but do not preclude the possibility of the presence or addition of one or more other features, numbers, steps, operations, components, parts, or combinations thereof.
[0031] Unless otherwise defined, all terms used herein, including technical or scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. Terms defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant technology, and will not be interpreted in an idealized or overly formal sense unless explicitly defined herein.
[0032]
[0033] Hereinafter, embodiments will be described in detail with reference to the attached drawings. However, the scope of the patent application is not limited or restricted by these embodiments. The same reference numerals provided in each drawing represent the same components.
[0034]
[0035] FIG. 1 is a diagram illustrating a concept of an electrical stimulation circuit according to an exemplary embodiment.
[0036] Electrical stimulation therapy (EST) is a treatment method that uses electrical stimulation to stimulate the muscles or nerves of the body, and is used to treat nerve damage, muscle atrophy, and joint movement. EST is performed by contacting the body (110) with an electrode (120) having a constant voltage (130, 140).
[0037] Electrical stimulation devices used in electrical stimulation therapy must operate at low voltages for safety reasons, as they come into contact with the body (110), and must also operate at high voltages for high therapeutic effects. In other words, electrical stimulation devices must have a wide range of operating voltages, and due to their characteristics, miniaturization and power efficiency are also required.
[0038] When the electrical stimulation device uses a transistor of the BCD (Bipolar-CMOS-DMOS) process, there were problems such as difficulty in miniaturization.
[0039]
[0040] Figure 2 is a block diagram illustrating the configuration of an electrical stimulation circuit according to an exemplary embodiment.
[0041] An electrical stimulation circuit according to an exemplary embodiment comprises an electrode and an electrical signal providing circuit for supplying an electrical signal to the electrode. In Fig. 2, an electrode is positioned at the center of the drawing, and a pair of electrical signal providing circuits for supplying an electrical signal to the electrode are illustrated on the left and right sides of the electrode.
[0042] The electrical signal generation circuit is implemented through a current DAC and can generate eight types of arbitrary waveforms.
[0043] The electrical signal providing circuit is an NMOS bias circuit ( ), PMOS bias circuit ( ) and supply tracking circuit ( ) is composed of. The electrode is connected to an NMOS bias circuit ( ) and PMOS bias circuit ( ) is connected and supplies power.
[0044]
[0045] The specific configuration of the electric signal providing circuit is described in FIGS. 3 to 10.
[0046]
[0047] Fig. 3 is a block diagram illustrating the configuration and operation of an NMOS bias circuit according to an exemplary embodiment. Fig. 3 (a) illustrates that the voltage (320) of the electric signal provided to the electrode is changed, Fig. 3 (b) illustrates a case where the voltage (320) of the electric signal provided to the electrode is higher than the second threshold voltage (311), and Fig. 3 (c) illustrates a case where the voltage (370) of the electric signal provided to the electrode is lower than the first threshold voltage (312). According to one aspect, the first threshold voltage (312) may be 3.3 V, and the second threshold voltage (311) may be 11 V.
[0048] The first bias circuit is composed of a plurality of NMOS transistors (331, 332, 333, 381, 382, 383) whose drains and sources are connected to each other and a plurality of first resistors (341, 342, 343, 344) connected to the gates of the NMOS transistors (331, 332, 333, 381, 382, 383).
[0049] Here, the first resistors (341, 342, 343, 344) can be connected in series with each other. In addition, the NMOS bias circuit driving voltage ( ) can be provided to the gates of NMOS transistors (331, 332, 333, 381, 382, 383) via a plurality of first diodes (361, 362, 363) connected in parallel with each other. Here, the NMOS bias circuit driving voltage ( ) refers to the driving voltage that drives the NMOS transistor in the circuit, and can be 2.8 V.
[0050] Figure 3 (a) illustrates that the voltage (320) of the electric signal provided to the electrode is changed.
[0051] Figure 3 (b) shows a case where the voltage (320) of the electric signal provided to the electrode is higher than the second threshold voltage (311). If the voltage of the electric signal provided to the electrode (320) If the voltage of the electric signal supplied to the electrode is higher than the second threshold voltage (311) (320) is divided and applied to multiple first resistors (341, 342, 343, 344). In (a) of Fig. 3, the number of first resistors is 4, so one resistor (341, 342, 343, 344) A voltage of that magnitude is applied. Therefore, the NMOS bias circuit can operate as a voltage divider. In addition, the NMOS transistors (331, 332, 333) can be driven by the voltage applied to the plurality of first resistors (341, 342, 343, 344).
[0052]
[0053] Figure 3 (c) shows a case where the voltage (370) of the electric signal provided to the electrode is lower than the first threshold voltage (312). If the voltage of the electric signal provided to the electrode (370) If the first threshold voltage (312) is lower than the NMOS bias circuit driving voltage ( ) is provided to the gates of NMOS transistors (381, 382, 383) via first diodes (361, 362, 363) connected in parallel with each other, and the NMOS transistors (381, 382, 383) are supplied with an NMOS bias circuit driving voltage ( ) is driven by. In this case, the electrical signal provided to the electrode flows through the NMOS transistors (381, 382, 383), and the NMOS bias circuit operates as a voltage clipper.
[0054]
[0055] Fig. 4 is a block diagram illustrating the configuration and operation of a second bias circuit according to an exemplary embodiment. Fig. 4 (a) illustrates that the voltage (420) of the electric signal provided to the electrode is changed, Fig. 4 (b) illustrates a case where the voltage (420) of the electric signal provided to the electrode is higher than the second threshold voltage (411), and Fig. 4 (c) illustrates a case where the voltage (450) of the electric signal provided to the electrode is lower than the first threshold voltage (412). According to one aspect, the first threshold voltage (412) may be 3.3 V, and the second threshold voltage (411) may be 11 V.
[0056] The PMOS bias circuit is composed of a plurality of PMOS transistors (431, 432, 433, 461, 462, 463) whose drains and sources are connected to each other and a plurality of second resistors (471, 472, 473, 474) connected to the gates of the PMOS transistors (431, 432, 433, 461, 462, 463).
[0057] Here, the second resistors (471, 472, 473, 474) can be connected in series with each other. In addition, the PMOS bias circuit driving voltage ( ) can be provided to the gates of PMOS transistors (431, 432, 433, 461, 462, 463) via a plurality of first diodes (441, 442, 443) connected in parallel with each other. Here, the PMOS bias circuit driving voltage ( ) refers to the driving voltage that drives the PMOS transistor in the circuit, and is the driving voltage of the electrical signal providing circuit. It has a voltage lower than a predetermined value and can be supplied by the supply tracking circuit.
[0058]
[0059] Figure 4 (b) shows a case where the voltage (420) of the electric signal provided to the electrode is higher than the second threshold voltage (411). If the voltage of the electric signal provided to the electrode (420) If the second threshold voltage (411) is higher than the PMOS bias circuit driving voltage ( , 440) are provided to the gates of PMOS transistors (431, 432, 433) via second diodes (441, 442, 443) connected in parallel with each other, and the PMOS transistors (431, 432, 433) are provided with a PMOS bias circuit driving voltage ( , 440). In this case, the electrical signal provided to the electrode flows through the PMOS transistors (431, 432, 433), and the PMOS bias circuit operates like a voltage clipper.
[0060]
[0061] Figure 4 (c) shows a case where the voltage (450) of the electric signal provided to the electrode is lower than the first threshold voltage (412). If the voltage of the electric signal provided to the electrode (450) If the first threshold voltage (412) is lower than the driving voltage of the electrical signal providing circuit The voltage of the electrical signal supplied to the electrode The voltage corresponding to the difference of (450) is divided and applied to a plurality of second resistors (471, 472, 473, 474). In (c) of Fig. 4, since the number of second resistors is 4, the driving voltage of the electric signal providing circuit is applied to one resistor (471, 472, 473, 474). The voltage of the electrical signal supplied to the electrode A voltage corresponding to the difference of (450) divided by 4 is applied. Therefore, the PMOS bias circuit can operate as a voltage divider. In addition, the PMOS transistors (461, 462, 463) can be driven by the voltage applied to the plurality of second resistors (471, 472, 473, 474).
[0062]
[0063] Figure 5 is a block diagram illustrating the operation of a bias circuit according to an exemplary embodiment.
[0064] Figure 5 (a) shows the voltage of the electric signal provided to the electrode. This change, Fig. 5 (b) shows the voltage of the electric signal provided to the electrode. This shows a case where the voltage is higher than the second threshold voltage (511), and (c) of Fig. 5 shows the voltage of the electric signal provided to the electrode. This shows a case where it is lower than the first threshold voltage (512).
[0065]
[0066] Figure 5 (b) shows the voltage of the electric signal provided to the electrode. This shows a case where the voltage is higher than the second threshold voltage (511). In this case, a very high voltage is applied to the NMOS bias circuit (521), and a very low voltage is applied to the PMOS bias circuit (522).
[0067] In (b) of Fig. 5, the NMOS bias circuit (521) operates as a voltage divider, and the PMOS bias circuit (522) operates as a short circuit. Therefore, the voltage of the electric signal provided to the electrode Despite this very high voltage, the electrical stimulation device can operate safely without concern for gate breakdown of the transistors included in the NMOS bias circuit (521).
[0068] Figure 5 (c) shows the voltage of the electric signal provided to the electrode. This shows a case where the voltage is lower than the first threshold voltage (512). In this case, a very low voltage is applied to the NMOS bias circuit (531), and a very high voltage is applied to the PMOS bias circuit (532).
[0069] In (c) of Fig. 5, the NMOS bias circuit (531) operates as if it is short-circuited, and the PMOS bias circuit operates as a voltage divider. Therefore, the voltage of the electric signal provided to the electrode Despite this very low value, the electrical stimulation device can operate safely without concern for gate breakdown of the transistors included in the PMOS bias circuit (532).
[0070]
[0071] Figure 6 is a conceptual diagram illustrating the concept of a supply tracking circuit according to an exemplary embodiment.
[0072] The supply tracking circuit provides the driving voltage of the electrical signal providing circuit. PMOS bias circuit driving voltage with a voltage lower than a predetermined value from , and generates PMOS bias circuit driving voltage is a circuit that provides the driving voltage of the electrical signal providing circuit to the PMOS bias circuit. The 'predetermined value', which is the difference between the PMOS bias circuit driving voltage, can be 2.8 V.
[0073] According to one side, the supply tracking circuit uses a replica cell (620) to drive the PMOS bias circuit voltage. can be created.
[0074] Driving voltage of the NMOS bias circuit in Fig. 6 is supplied to the transistor (622) via four series-connected diodes (621). In this case, through the transistor (623) Current flows.
[0075] Driving voltage of the electrical signal providing circuit is supplied to the replica cell (610). The driving voltage of the electric signal providing circuit is supplied to the transistor (612) via four series-connected diodes (611). In this case, through current mirroring, (623) is the same current as (613) flows through transistor (612).
[0076] Therefore, the voltage applied to the source terminal of the transistor (612) is the driving voltage of the electrical signal providing circuit Driving voltage of NMOS bias circuit (630) from It has a voltage that is low enough.
[0077]
[0078] FIG. 7 is a diagram illustrating the operation of a supply tracking circuit according to an exemplary embodiment.
[0079] Figure 7 (a) shows the impedance and current of the replica cell (720). , voltage applied to the replica cell (720) This is a diagram showing the relationship between the automatically generated current is the voltage and is determined by the impedance of the four series diodes and diode-connected NMOS transistors contained in the replica cell.
[0080]
[0081] Figure 7 (b) shows the driving voltage of the electric signal providing circuit using replica cells (710, 720). see Has a voltage that is as low as This is a diagram illustrating the concept of creating .
[0082] Figure 7 (c) shows the driving voltage of the electric signal providing circuit. class This is a diagram showing the relationship between the driving voltage of the electric signal providing circuit and the driving voltage of the electric signal providing circuit. Referring to Fig. 7 (c), can be changed from 3.3V to 11V. In any case, is the driving voltage of the electrical signal providing circuit see It can be generated at a voltage as low as the driving voltage of the PMOS bias circuit. can be provided as
[0083]
[0084] FIG. 8 is a diagram illustrating an analog buffer according to an exemplary embodiment.
[0085] First, the parts (811, 812, 813) indicated by dotted lines in Fig. 8 are the electric signal providing circuits described in Figs. 3 to 7.
[0086] The right part (820) of the electric signal providing circuit is an analog buffer, which acts as a part of an electric stimulation device that must operate at high voltages. Therefore, the analog buffer must also be able to respond to high voltages while using a transistor such as NMOS or PMOS.
[0087] The lower portion of the analog buffer (820) illustrated in Fig. 8 is an NMOS bias circuit of the electric signal providing circuit described in Figs. 3 to 7. By adding the NMOS bias circuit, an analog buffer capable of operating at high voltage while having low impedance can be implemented.
[0088] In addition, it can maintain bandwidth and gain uniformly over a wide range of operating voltages.
[0089]
[0090] Fig. 9 is a drawing illustrating the structure of a level shifter according to an exemplary embodiment.
[0091] Fig. 9 (a) is a diagram illustrating the structure of a level shifter. Referring to Fig. 9 (a), the level shifter combines a supply tracking structure and a latch structure to provide a driving voltage of an electric signal circuit. and the driving voltage of the electrical signal providing circuit see Driving voltage of PMOS bias circuit with voltage as low as You can select and print it.
[0092] Figure 9 (b) shows the output of the level shifter shown in Figure 9 (a), and the output of a general level shifter is the driving voltage of the electric signal providing circuit from 0. The output of the level shifter shown in (a) of Fig. 9 is the driving voltage of the second bias circuit. Driving voltage of the circuit providing electrical signals from Swing up to.
[0093]
[0094] Fig. 10 is a drawing explaining the operation of a level shifter according to an exemplary embodiment.
[0095] (a) of Fig. 10 is a high value at the input terminal. This is a diagram showing the input case. A high value is input to the input terminal. When this is entered, the circuit indicated by the dotted line is deactivated and the circuit indicated by the solid line is activated.
[0096] Accordingly, self-biased current flows along the left circuit (1011, 1013, 1014) indicated by the solid line, and the voltage The value of is determined, and the transistor (1012) is activated by this voltage, and the voltage The value of is decided by
[0097]
[0098] Figure 10 (b) is a diagram illustrating a case where a low value of 0 V is input to the input terminal.
[0099] When a low value of 0V is input to the input terminal, the circuit indicated by the dotted line is deactivated and the circuit indicated by the solid line is activated.
[0100] Accordingly, self-biased current It flows along the left circuit (1021, 1023, 1024) indicated by the solid line, and the voltage The value of is determined by the voltage, and the transistor (1022) is activated by this voltage, and the voltage The value of is decided by
[0101] According to the embodiment shown in Fig. 10, the value of the input voltage Vin As the voltage of the first terminal switches to 0V, Is and , and the voltage of the second terminal Is and Switch to .
[0102]
[0103] The devices described above may be implemented as hardware components, software components, and / or a combination of hardware components and software components. For example, the devices and components described in the embodiments may be implemented using one or more general-purpose computers or special-purpose computers, such as, for example, a processor, a controller, an arithmetic logic unit (ALU), a digital signal processor, a microcomputer, a field programmable array (FPA), a programmable logic unit (PLU), a microprocessor, or any other device capable of executing instructions and responding to them. The processing device may execute an operating system (OS) and one or more software applications running on the operating system. The processing device may also access, store, manipulate, process, and generate data in response to the execution of the software. For ease of understanding, the processing device is sometimes described as being used alone; however, one of ordinary skill in the art will recognize that the processing device may include multiple processing elements and / or multiple types of processing elements. For example, a processing unit may include multiple processors, or a processor and a controller. Other processing configurations, such as parallel processors, are also possible.
[0104] Software may include a computer program, code, instructions, or a combination of one or more of these, which may configure a processing device to perform a desired operation or may, independently or collectively, command the processing device. The software and / or data may be permanently or temporarily embodied in any type of machine, component, physical device, virtual equipment, computer storage medium or device, or transmitted signal wave, for interpretation by the processing device or for providing instructions or data to the processing device. The software may also be distributed over networked computer systems and stored or executed in a distributed manner. The software and data may be stored on one or more computer-readable recording media.
[0105] The method according to the embodiment may be implemented in the form of program commands that can be executed through various computer means and recorded on a computer-readable medium. The computer-readable medium may include program commands, data files, data structures, etc., alone or in combination. The program commands recorded on the medium may be those specially designed and configured for the embodiment or may be those known and available to those skilled in the art of computer software. Examples of the computer-readable recording medium include magnetic media such as hard disks, floppy disks, and magnetic tapes, optical media such as CD-ROMs and DVDs, magneto-optical media such as floptical disks, and hardware devices specially configured to store and execute program commands, such as ROMs, RAMs, and flash memories. Examples of the program commands include not only machine language codes generated by a compiler, but also high-level language codes that can be executed by a computer using an interpreter, etc. The hardware devices described above may be configured to operate as one or more software modules to perform the operations of the embodiment, and vice versa.
[0106] Although the embodiments described above have been described with limited drawings, those skilled in the art will recognize that various modifications and variations can be made based on the above description. For example, appropriate results can still be achieved even if the described techniques are performed in a different order than described, and / or components of the described systems, structures, devices, circuits, etc. are combined or combined in a different manner than described, or are replaced or substituted with other components or equivalents.
[0107] Therefore, other implementations, other embodiments, and equivalents to the claims also fall within the scope of the claims described below.
Claims
1. Electrodes that provide electrical signals to the body; and A plurality of electrical signal providing circuits that supply the electrical signals to the electrodes Including, The above electric signal providing circuit An NMOS bias circuit comprising a plurality of NMOS transistors having drains and sources connected to each other and a plurality of first resistors connected to gates of the NMOS transistors; A PMOS bias circuit including a plurality of PMOS transistors having drains and sources connected to each other and a plurality of second resistors connected to gates of the PMOS transistors; and A supply tracking circuit that provides a PMOS bias circuit driving voltage that is lower than a predetermined value from the driving voltage of the above-mentioned electric signal providing circuit to the PMOS bias circuit. Including, The above electrode is an electrical stimulation device connected between the NMOS bias circuit and the PMOS bias circuit.
2. In paragraph 1, The above plurality of first resistors are connected in series with each other, An electrical stimulation device in which the plurality of second resistors are connected in series with each other.
3. In paragraph 1, An electrical stimulation device in which an NMOS bias circuit driving voltage is provided to the gates of the NMOS transistors via a plurality of first diodes connected in parallel with each other.
4. In the third paragraph, when the voltage of the electric signal supplied to the electrode is lower than the first threshold voltage, The above NMOS transistors are electrically stimulated devices driven by the NMOS bias circuit driving voltage.
5. In the third paragraph, when the voltage of the electric signal supplied to the electrode is higher than the second threshold voltage, The voltage of the electric signal supplied to the electrode is divided and applied to the plurality of first resistors, The above NMOS transistors are an electrical stimulation device driven by a voltage applied dividedly to the plurality of first resistors.
6. In paragraph 1, An electrical stimulation device in which the PMOS bias circuit driving voltage is provided to the gates of the PMOS transistors via a plurality of second diodes connected in parallel with each other.
7. In the 6th paragraph, when the voltage of the electric signal supplied to the electrode is higher than the second threshold voltage, The above PMOS transistors are electrically stimulated devices driven by the PMOS bias circuit driving voltage.
8. In the 6th paragraph, when the voltage of the electric signal supplied to the electrode is lower than the first threshold voltage, The driving voltage of the above electric signal providing circuit is divided and applied to the plurality of second resistors, The above PMOS transistors are an electrical stimulation device driven by a voltage divided and applied to the plurality of second resistors.
9. In paragraph 1, An electrical stimulation device wherein the predetermined value is 2.8 V.
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