Display panel and manufacturing method therefor, and display device

Abstract

A display panel and a manufacturing method therefor, and a display device. The display panel comprises: a backplane (1); a first light-emitting device (2), a second light-emitting device (3), and a third light-emitting device (4), which are arranged on a same side of the backplane (1), wherein the distance between the second light-emitting device (3) and the backplane (1) is greater than the distance between the first light-emitting device (2) and the backplane (1), the distance between the third light-emitting device (4) and the backplane (1) is greater than the distance between the second light-emitting device (3) and the backplane (1), the first light-emitting device (2) emits light of a first color, the second light-emitting device (3) emits light of a second color, and the third light-emitting device (4) emits light of a third color; a first light filtering layer (5), which is arranged on the side of the first light-emitting device (2) facing away from the backplane (1), wherein the first light filtering layer (5) can only transmit the light of the first color; and a second light filtering layer (6), which is arranged on the side of the second light-emitting device (3) facing away from the backplane (1), wherein the second light filtering layer (6) can only transmit the light of the second color, or the second light filtering layer (6) can only transmit the light of the first color and the second color. The color purity and the color gamut of the display panel are good.

Description

Display panel and manufacturing method thereof, and display device Technical Field

[0001] The present disclosure relates to the field of display technology, and in particular to a display panel and a manufacturing method thereof, and a display device. Background Art

[0002] Micro LEDs (Micro Light Emitting Diode Displays), especially silicon-based LEDs (Light Emitting Diodes), require bonding technology to transfer single-color LEDs to a backplane, which is then patterned to form individual LED sub-pixels of different colors.

[0003] However, current Micro LED display panels have low color purity and poor color gamut.

[0004] It should be noted that the information disclosed in the above background technology section is only used to enhance the understanding of the background of the present disclosure, and therefore may include information that does not constitute prior art known to ordinary technicians in the field.

[0005] Summary of the Invention

[0006] The purpose of the present disclosure is to overcome the above-mentioned deficiencies of the prior art and to provide a display panel and a manufacturing method thereof, and a display device.

[0007] According to one aspect of the present disclosure, there is provided a display panel, comprising:

[0008] Back panel;

[0009] A first light-emitting device, a second light-emitting device, and a third light-emitting device are arranged on the same side of the back plate, the distance between the second light-emitting device and the back plate is greater than the distance between the first light-emitting device and the back plate, the distance between the third light-emitting device and the back plate is greater than the distance between the second light-emitting device and the back plate, the first light-emitting device emits light of a first color, the second light-emitting device emits light of a second color, and the third light-emitting device emits light of a third color;

[0010] a first filter layer, provided on a side of the first light-emitting device facing away from the back plate, the first filter layer only transmitting light of the first color;

[0011] The second filter layer is provided on a side of the second light emitting device away from the back plate. The second filter layer can only transmit light of the second color, or the second filter layer can only transmit light of the first color and the second color.

[0012] In an exemplary embodiment of the present disclosure, the display panel further includes:

[0013] The third filter layer is arranged on a side of the third light emitting device away from the back plate, and the third filter layer can only transmit the light of the third color.

[0014] In an exemplary embodiment of the present disclosure, the third filter layer includes multiple third semiconductor layers and multiple third porous semiconductor layers, and the third semiconductor layers and the third porous semiconductor layers are alternately arranged.

[0015] In an exemplary embodiment of the present disclosure, the first filter layer includes multiple layers of first semiconductor layers and multiple layers of first porous semiconductor layers, and the first semiconductor layers and the first porous semiconductor layers are alternately arranged.

[0016] In an exemplary embodiment of the present disclosure, the second filter layer includes a plurality of second semiconductor layers and a plurality of second porous semiconductor layers, and the second semiconductor layers and the second porous semiconductor layers are alternately arranged.

[0017] In an exemplary embodiment of the present disclosure, when the second light-emitting device is stacked on the side of the first light-emitting device facing away from the back panel, and the third light-emitting device is stacked on the side of the second light-emitting device facing away from the back panel, the second filter layer can only transmit light of the first color and the second color.

[0018] In an exemplary embodiment of the present disclosure, a ratio of the thickness of the first filter layer to the thickness of the second filter layer is greater than or equal to 1.1 and less than or equal to 1.3.

[0019] In an exemplary embodiment of the present disclosure, when the orthographic projection of the first light-emitting device on the back panel, the orthographic projection of the second light-emitting device on the back panel, and the orthographic projection of the third light-emitting device on the back panel do not overlap, the second filter layer can only transmit light of the second color.

[0020] In an exemplary embodiment of the present disclosure, the ratio of the thickness of the second filter layer to the thickness of the first filter layer is greater than or equal to 1.5 and less than or equal to 2.5, and the ratio of the thickness of the third filter layer to the thickness of the first filter layer is greater than or equal to 1.1 and less than or equal to 1.5.

[0021] In an exemplary embodiment of the present disclosure, the display panel further includes:

[0022] The light extraction layer group is arranged between the light emitting surface of at least one of the first light emitting device, the second light emitting device and the third light emitting device and the air layer. The refractive index of the light extraction layer group is smaller than the refractive index of the film layer bonded to the light extraction layer, and is greater than the refractive index of air.

[0023] In an exemplary embodiment of the present disclosure, the light extraction layer group includes at least two porous structure layers, and the refractive index of the porous structure layer decreases as the distance from the back plate increases.

[0024] In an exemplary embodiment of the present disclosure, the light extraction layer group includes at least two porous structure layers, and the total volume of pores per unit volume of the porous structure layer increases with increasing distance from the back plate.

[0025] In an exemplary embodiment of the present disclosure, a plurality of recessed structures are provided on the light extraction layer group.

[0026] In an exemplary embodiment of the present disclosure, the plurality of recessed structures are arranged periodically, or the plurality of recessed structures are arranged non-periodically.

[0027] In an exemplary embodiment of the present disclosure, the recessed structure is a via hole penetrating the light extraction layer group, or the recessed structure is a blind hole that does not penetrate the light extraction layer group.

[0028] In an exemplary embodiment of the present disclosure, the display panel further includes:

[0029] A filling portion is provided in the recessed structure, and a refractive index of the filling portion is smaller than a refractive index of the light extraction layer group.

[0030] According to another aspect of the present disclosure, a method for preparing a display panel is provided, comprising:

[0031] providing a substrate;

[0032] forming a first filter material layer and a first light emitting device material layer on one side of the base substrate;

[0033] transferring the first light-emitting device material layer and the first filter material layer to a backplane;

[0034] Etching the first light-emitting device material layer and the first filter material layer to form a first light-emitting device and a first filter layer, sequentially forming a second light-emitting device and a second filter layer on the side of the backplane where the first light-emitting device is formed, and forming a third light-emitting device on the side of the backplane where the first light-emitting device is formed;

[0035] In which, the distance between the second light-emitting device and the backplane is greater than the distance between the first light-emitting device and the backplane, the distance between the third light-emitting device and the backplane is greater than the distance between the second light-emitting device and the backplane, the first light-emitting device emits light of a first color, the second light-emitting device emits light of a second color, and the third light-emitting device emits light of a third color. The first filter layer can only transmit light of the first color, the second filter layer can only transmit light of the second color, or the second filter layer can only transmit light of the first color and the second color.

[0036] In an exemplary embodiment of the present disclosure, a first filter material layer and a first light-emitting device material layer are formed on one side of the base substrate, including:

[0037] forming a first buffer material layer on one side of the base substrate;

[0038] A first semiconductor layer and a first doped semiconductor layer are alternately formed on a side of the first buffer material layer facing away from the base substrate, and the first semiconductor layer and the first doped semiconductor layer are each formed into multiple layers, and the multiple layers of the first semiconductor layer and the multiple layers of the first doped semiconductor layer form a first filter original material layer;

[0039] forming a first light emitting device material layer on a side of the first light filtering original material layer away from the base substrate;

[0040] The first doped semiconductor layer is electro-etched to form a first porous semiconductor layer, so that the first filter original material layer forms the first filter material layer.

[0041] In an exemplary embodiment of the present disclosure, the preparation method further comprises:

[0042] A third filter layer is formed on a side of the third light emitting device facing away from the back plate, and the third filter layer can only transmit light of the third color.

[0043] In an exemplary embodiment of the present disclosure, the preparation method further comprises:

[0044] A light extraction layer group is formed on the light emitting surface of at least one of the first light emitting device, the second light emitting device and the third light emitting device, and the refractive index of the light extraction layer group is smaller than the refractive index of the film layer bonded to the light extraction layer group and greater than the refractive index of air.

[0045] In an exemplary embodiment of the present disclosure, a light extraction layer group is formed on the light emitting surface of at least one of the first light emitting device, the second light emitting device, and the third light emitting device, including:

[0046] At least two doping material layers are sequentially formed on the light-emitting surface of at least one of the first light-emitting device, the second light-emitting device, and the third light-emitting device, wherein the doping concentration of the doping material layer increases with increasing distance from the light-emitting surface;

[0047] The doping material layer is electrochemically etched to form a porous structure layer from the doping material layer, wherein the refractive index of the porous structure layer decreases as the distance from the back plate increases.

[0048] According to another aspect of the present disclosure, a display device is provided, comprising: a display panel as described above.

[0049] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0050] The accompanying drawings are incorporated into and constitute a part of the specification, illustrate embodiments consistent with the present disclosure, and together with the specification, are used to explain the principles of the present disclosure. Obviously, the drawings described below are only some embodiments of the present disclosure, and those skilled in the art can derive other drawings based on these drawings without inventive effort.

[0051] FIG1 is a schematic structural diagram of an exemplary embodiment of a display panel in the related art.

[0052] FIG. 2 is a schematic structural diagram of another exemplary embodiment of a display panel in the related art.

[0053] FIG3 is a schematic structural diagram of a first exemplary embodiment of a display panel according to the present disclosure.

[0054] FIG4 is a schematic structural diagram of a P electrode and an N electrode in a second exemplary embodiment of a display panel according to the present disclosure.

[0055] FIG5 is a schematic structural diagram of a first light emitting device formed on the basis of FIG4 .

[0056] FIG6 is a schematic structural diagram showing a structure in which a portion of the first filter layer and the first buffer layer are removed based on FIG5 .

[0057] FIG. 7 is a schematic structural diagram of a third light-emitting device formed on the basis of FIG. 6 .

[0058] FIG8 is a schematic structural diagram of an insulating layer formed on the basis of FIG7 .

[0059] FIG. 9 is a schematic structural diagram of a connecting conductor layer formed on the basis of FIG. 8 .

[0060] FIG. 10 is a schematic structural diagram of a third exemplary embodiment of a display panel according to the present disclosure.

[0061] FIG11 is a schematic structural diagram of the first filter layer, the second filter layer, and the third filter layer in FIG3 and FIG10.

[0062] 12 to 22 are schematic structural diagrams of third to fifteenth exemplary embodiments of the display panel of the present disclosure.

[0063] 23 and 24 are schematic top views of the display panel of the present disclosure when a recessed structure is provided on the light extraction layer group.

[0064] FIG25 is a schematic flow chart of an exemplary embodiment of a method for manufacturing a display panel according to the present disclosure.

[0065] 26 to 32 are schematic structural diagrams of various steps in forming the display panel in FIG. 3 .

[0066] 33 to 37 are schematic structural diagrams of the steps of forming the display panel in FIG. 10 .

[0067] 38 to 42 are schematic structural diagrams of the steps for forming the display panel in FIG. 12 .

[0068] Explanation of Reference Numerals: 1. backplane; 101. first P-electrode; 102. second P-electrode; 103. third P-electrode; 104. N-electrode; 2. first light-emitting device; 21. first P-type semiconductor layer; 22. first light-emitting layer; 23. first N-type semiconductor layer; 21a. first P-type semiconductor material layer; 22a. first light-emitting material layer; 23a. first N-type semiconductor material layer; 3. second light-emitting device; 31. second P-type semiconductor layer; 32. second light-emitting layer; 33. second N-type semiconductor layer; 31a. second P-type semiconductor material layer; 32a. second light-emitting material layer; 33a. second N-type semiconductor material layer; 4. third light-emitting device; 41. third P-type semiconductor layer; 42. third light-emitting layer; 43. third N-type semiconductor layer; 41a. third P-type semiconductor material layer; 42a. third light-emitting material layer; 43a. third N-type semiconductor layer; 5. First filter layer; 51. First semiconductor layer; 52. First porous semiconductor layer; 5a. First filter material layer; 6. Second filter layer; 61. Second semiconductor layer; 62. Second porous semiconductor layer; 6a. Second filter material layer; 7. Third filter layer; 71. Third semiconductor layer; 72. Third porous semiconductor layer; 8. Light extraction layer group; 8a. Porous structure layer; 81. First porous structure layer; 82. Second porous structure layer; 83. Third porous structure layer; 84. Recessed structure; 85. Filling portion; 86. Doping material layer; 91. First buffer layer; 91a. First buffer material layer; 92. Second buffer layer; 92a. Second buffer material layer; 93. Third buffer layer; 93a. Third buffer material layer; 10. Insulating layer; 1001. Via hole; 11. Connecting conductor layer; 111. N-electrode connecting portion; 112. Second P-electrode connecting portion; 113. Third P-electrode connection portion; 12. First conductor layer; 121. First connection portion; 122. Second connection portion; 123. Third connection portion; 124. Fourth connection portion; 13. Second conductor layer; 131. Fifth connection portion; 132. Sixth connection portion; 133. Seventh connection portion; 134. Eighth connection portion; 14. Third conductor layer; 151. First insulating isolation layer; 152. Second insulating isolation layer; 100. Base substrate; 200. Sapphire base layer; 300. Temporary base layer; 400. Current spreading layer; 500. Adhesive layer. DETAILED DESCRIPTION

[0069] Example embodiments will now be described more fully with reference to the accompanying drawings. However, the example embodiments can be implemented in many forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete and will fully convey the concepts of the example embodiments to those skilled in the art. Like reference numerals in the figures represent identical or similar structures, and thus their detailed descriptions will be omitted. Furthermore, the figures are merely schematic illustrations of the present disclosure and are not necessarily drawn to scale.

[0070] Although relative terms such as "upper" and "lower" are used in this specification to describe the relationship of one illustrated component to another, these terms are used herein for convenience only, such as in accordance with the orientation of the illustrations in the accompanying drawings. It will be understood that if the illustrated device were flipped upside down, the component described as "upper" would become the component "lower." When a structure is referred to as "on" another structure, this may mean that the structure is integrally formed with the other structure, that the structure is "directly" disposed on the other structure, or that the structure is "indirectly" disposed on the other structure via the other structure.

[0071] The terms "a", "an", "the", "said" and "at least one" are used to indicate the presence of one or more elements / components / etc.; the terms "including" and "having" are used to express open-ended inclusion and mean that additional elements / components / etc. may be present in addition to the listed elements / components / etc.; the terms "first", "second" and "third" etc. are used only as labels and are not intended to limit the quantity of their objects.

[0072] In this application, unless otherwise specified or limited, the term "connected" should be understood broadly. For example, "connected" can mean fixed, removable, or integrated; it can be directly connected or indirectly connected through an intermediary. "And / or" simply describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can mean: A exists alone, A and B exist simultaneously, or B exists alone. Additionally, the character " / " in this document generally indicates that the related objects are in an "or" relationship.

[0073] The inventors discovered that, as shown in Figures 1 and 2, due to the height difference between sub-pixels of different colors on a Micro LED display panel and the small spacing between adjacent sub-pixels (approximately 1 micron), light from the lower sub-pixels easily crosstalks with adjacent sub-pixels, resulting in low color purity and a reduced color gamut. Furthermore, light from the sides of higher sub-pixels easily reaches adjacent sub-pixels, stimulating them to produce corresponding light, leading to low color purity and a poor color gamut. Color purity indicates the closeness of a sample color to its dominant wavelength spectrum color, referring to the vividness and purity of the color, and also the color saturation. Color gamut refers to the number of colors a pattern image can have.

[0074] An example embodiment of the present disclosure provides a display panel, as shown in Figures 3 to 30, which may include a backplane 1, a first filter layer 5, a second filter layer 6, a first light-emitting device 2, a second light-emitting device 3, and a third light-emitting device 4; the first light-emitting device 2, the second light-emitting device 3, and the third light-emitting device 4 are arranged on the same side of the backplane 1, the distance between the second light-emitting device 3 and the backplane 1 is greater than the distance between the first light-emitting device 2 and the backplane 1, and the distance between the third light-emitting device 4 and the backplane 1 is greater than the distance between the second light-emitting device 3 and the backplane 1, the first light-emitting device 2 emits light of a first color, the second light-emitting device 3 emits light of a second color, and the third light-emitting device 4 emits light of a third color; the first filter layer 5 is arranged on a side of the first light-emitting device 2 away from the backplane 1, and the first filter layer 5 can only transmit light of the first color; the second filter layer 6 is arranged on a side of the second light-emitting device 3 away from the backplane 1, and the second filter layer 6 can only transmit light of the second color, or the second filter layer 6 can only transmit light of the first color and the second color.

[0075] In the display panel disclosed herein, on the one hand, the first filter layer 5 can only transmit the light emitted by the first light-emitting device 2, but cannot transmit the light emitted by the second light-emitting device 3 and the third light-emitting device 4, so that when the second light-emitting device 3 and / or the third light-emitting device 4 emits light and the first light-emitting device 2 does not emit light, the light emitted by the second light-emitting device 3 and / or the third light-emitting device 4 cannot reach the first light-emitting device 2 and will not stimulate the first light-emitting device 2 to emit light, thereby improving the color purity and color gamut of the display panel; on the other hand, the second filter layer 6 can only transmit the light emitted by the first light-emitting device 2 and the second light-emitting device 3, but cannot transmit the light emitted by the third light-emitting device 4, so that when the third light-emitting device 4 emits light and the first light-emitting device 2 and / or the second light-emitting device 3 do not emit light, the light emitted by the third light-emitting device 4 cannot reach the first light-emitting device 2 and the second light-emitting device 3, and will not stimulate the first light-emitting device 2 and the second light-emitting device 3 to emit light, thereby further improving the color purity and color gamut of the display panel. On the other hand, the second filter layer 6 can only transmit the light emitted by the second light-emitting device 3, but cannot transmit the light emitted by the first light-emitting device 2 and the third light-emitting device 4. The light emitted by the first light-emitting device 2 cannot be emitted through the second filter layer 6, that is, the light emitted by the first light-emitting device 2 will not crosstalk to the adjacent second light-emitting device 3, thereby further improving the color purity and color gamut of the display panel.

[0076] In this exemplary embodiment, the material of the back plate 1 may be sapphire, that is, the back plate 1 may be a sapphire back plate 1; of course, the material of the back plate 1 may also be silicon carbide or silicon, etc.

[0077] A first light-emitting device 2, a second light-emitting device 3, and a third light-emitting device 4 are disposed on the same side of the backplane 1. The first light-emitting device 2 emits light of a first color, forming a first sub-pixel; the second light-emitting device 3 emits light of a second color, forming a second sub-pixel; and the third light-emitting device 4 emits light of a third color, forming a third sub-pixel. That is, the first light-emitting device 2, the second light-emitting device 3, and the third light-emitting device 4 emit light of a third color, forming a third sub-pixel. That is, the first light-emitting device 2, the second light-emitting device 3, and the third light-emitting device 4 emit light of different colors. For example, the first light-emitting device 2 may be a red light-emitting device, the second light-emitting device 3 may be a green light-emitting device, and the third light-emitting device 4 may be a blue light-emitting device. Of course, the first light-emitting device 2, the second light-emitting device 3, and the third light-emitting device 4 may also be other colors, which are not described here.

[0078] As shown in FIG3 , in this exemplary embodiment, the second light-emitting device 3 is stacked on the side of the first light-emitting device 2 facing away from the backplane 1, and the third light-emitting device 4 is stacked on the side of the second light-emitting device 3 facing away from the backplane 1. That is, the first light-emitting device 2, the second light-emitting device 3, and the third light-emitting device 4 are stacked sequentially on the same side of the backplane 1 in a direction away from the backplane 1. As a result, the distance between the second light-emitting device 3 and the backplane 1 is greater than the distance between the first light-emitting device 2 and the backplane 1, and the distance between the third light-emitting device 4 and the backplane 1 is greater than the distance between the second light-emitting device 3 and the backplane 1, resulting in a certain height difference between each sub-pixel.

[0079] Specifically, as shown in FIG3 , three P electrodes and one N electrode 104 are provided on the same surface of the backplane 1; the three P electrodes are respectively a first P electrode 101, a second P electrode 102, and a third P electrode 103. As shown in FIG4 , the orthographic projection of the first P electrode 101 on the backplane 1 is substantially square, and the orthographic projections of the N electrode 104, the second P electrode 102, and the third P electrode 103 on the backplane 1 are substantially rectangular. The orthographic projections of the N electrode 104, the second P electrode 102, and the third P electrode 103 on the backplane 1 may have substantially the same area, and the orthographic projection of the first P electrode 101 on the backplane 1 may be greater than the orthographic projection of the second P electrode 102 on the backplane 1. Of course, the specific shapes of the three P electrodes and one N electrode 104 can be set to be circular, elliptical, trapezoidal, or various other regular or irregular polygons, which are not described here one by one; moreover, the specific shapes of the three P electrodes and one N electrode 104 can be the same or different.

[0080] The N electrode 104 can be arranged on one side of the first direction X of the first P electrode 101, and the second P electrode 102 and the third P electrode 103 can be arranged on the same side of the second direction Y of the first P electrode 101, so that the N electrode 104 and the second P electrode 102 and the third P electrode 103 are located on two adjacent sides of the first P electrode 101.

[0081] As shown in FIG3 , a first P-type semiconductor layer 21 is provided on the side of the first P-electrode 101 facing away from the backplate 1, a first light-emitting layer 22 is provided on the side of the first P-type semiconductor layer 21 facing away from the backplate 1, and a first N-type semiconductor layer 23 is provided on the side of the first light-emitting layer 22 facing away from the backplate 1. That is, the first P-type semiconductor layer 21, the first light-emitting layer 22, and the first N-type semiconductor layer 23 are stacked in sequence on the side of the first P-electrode 101 facing away from the backplate 1 in a direction away from the backplate 1. The first P-type semiconductor layer 21, the first light-emitting layer 22, and the first N-type semiconductor layer 23 constitute a first light-emitting device 2.

[0082] A first filter layer 5 is provided on the side of the first light-emitting device 2 facing away from the back plate 1. Specifically, a first filter layer 5 is provided on the side of the first N-type semiconductor layer 23 facing away from the back plate 1. The first filter layer 5 can only transmit light of the first color, that is, the first filter layer 5 can only transmit light emitted by the first light-emitting device 2, and cannot transmit light emitted by the second light-emitting device 3 and the third light-emitting device 4. When the second light-emitting device 3 and / or the third light-emitting device 4 emits light and the first light-emitting device 2 does not emit light, the light emitted by the second light-emitting device 3 and / or the third light-emitting device 4 cannot reach the first light-emitting device 2 and will not excite the first light-emitting device 2 to emit light, thereby improving the color purity and color gamut of the display panel.

[0083] 11 , only portions of the first semiconductor layer 51 and the first porous semiconductor layer 52 on both sides are shown, and the middle portion is omitted. The first filter layer 5 may include multiple first semiconductor layers 51 and multiple first porous semiconductor layers 52. The number of layers of the first semiconductor layer 51 may be greater than or equal to 10 and less than or equal to 50. For example, the number of layers of the first semiconductor layer 51 may be 12, 15, 17, 20, 23, 25, 28, 30, 32, 35, 37, 40, 43, 45, 48, and the like. The number of layers of the first porous semiconductor layer 52 may be greater than or equal to 10 and less than or equal to 50. For example, the number of layers of the first porous semiconductor layer 52 may be 12, 15, 17, 20, 23, 25, 28, 30, 32, 35, 37, 40, 43, 45, 48, and the like.

[0084] Moreover, the first semiconductor layers 51 and the first porous semiconductor layers 52 are alternately arranged, that is, one first porous semiconductor layer 52 is arranged between two adjacent first semiconductor layers 51 , and one first semiconductor layer 51 is arranged between two adjacent first porous semiconductor layers 52 .

[0085] The first semiconductor layer 51 is made of undoped gallium nitride (GaN), and the first porous semiconductor layer 52 is formed by electro-etching heavily doped gallium nitride (GaN) using an oxalic acid solution.

[0086] As shown in Figure 3, a first buffer layer 91 is provided on the side of the first filter layer 5 away from the back plate 1. The material of the first buffer layer 91 can be undoped gallium nitride (GaN), aluminum nitride (AlN), aluminum gallium nitride (AlGaN), etc. The first buffer layer 91 can serve as an insulating layer.

[0087] A second P-type semiconductor layer 31 is provided on the side of the first buffer layer 91 facing away from the backplate 1. A second light-emitting layer 32 is provided on the side of the second P-type semiconductor layer 31 facing away from the backplate 1. A second N-type semiconductor layer 33 is provided on the side of the second light-emitting layer 32 facing away from the backplate 1. That is, the second P-type semiconductor layer 31, the second light-emitting layer 32, and the second N-type semiconductor layer 33 are stacked in sequence on the side of the first buffer layer 91 facing away from the backplate 1 in a direction away from the backplate 1. The second P-type semiconductor layer 31, the second light-emitting layer 32, and the second N-type semiconductor layer 33 constitute the second light-emitting device 3.

[0088] A second filter layer 6 is provided on the side of the second light-emitting device 3 facing away from the back plate 1. Specifically, a second filter layer 6 is provided on the side of the second N-type semiconductor layer 33 facing away from the back plate 1. The second filter layer 6 can only transmit light of the first color and the second color, that is, the second filter layer 6 can only transmit light emitted by the first light-emitting device 2 and the second light-emitting device 3, and cannot transmit light emitted by the third light-emitting device 4. When the third light-emitting device 4 emits light and the first light-emitting device 2 and / or the second light-emitting device 3 do not emit light, the light emitted by the third light-emitting device 4 cannot reach the first light-emitting device 2 and the second light-emitting device 3, and will not stimulate the first light-emitting device 2 and the second light-emitting device 3 to emit light, thereby further improving the color purity and color gamut of the display panel.

[0089] 11 , only portions of the second semiconductor layer 61 and the second porous semiconductor layer 62 on both sides are shown, and the middle portion is omitted. The second filter layer 6 may include multiple layers of the second semiconductor layer 61 and multiple layers of the second porous semiconductor layer 62. The number of layers of the second semiconductor layer 61 may be greater than or equal to 10 and less than or equal to 50. For example, the number of layers of the second semiconductor layer 61 may be 12, 15, 17, 20, 23, 25, 28, 30, 32, 35, 37, 40, 43, 45, 48, and the like. The number of layers of the second porous semiconductor layer 62 may be greater than or equal to 10 and less than or equal to 50. For example, the number of layers of the second porous semiconductor layer 62 may be 12, 15, 17, 20, 23, 25, 28, 30, 32, 35, 37, 40, 43, 45, 48, and the like.

[0090] Moreover, the second semiconductor layers 61 and the second porous semiconductor layers 62 are alternately arranged, that is, one second porous semiconductor layer 62 is arranged between two adjacent second semiconductor layers 61 , and one second semiconductor layer 61 is arranged between two adjacent second porous semiconductor layers 62 .

[0091] The second semiconductor layer 61 is made of undoped gallium nitride (GaN), and the second porous semiconductor layer 62 is formed by electro-etching heavily doped gallium nitride (GaN) using an oxalic acid solution.

[0092] Furthermore, the thickness of the first filter layer 5 is greater than that of the second filter layer 6, thereby achieving the purpose of allowing the first filter layer 5 and the second filter layer 6 to transmit light of different wavelengths. Specifically, the ratio of the thickness of the first filter layer 5 to the thickness of the second filter layer 6 is greater than or equal to 1.1 and less than or equal to 1.3. For example, the ratio of the thickness of the first filter layer 5 to the thickness of the second filter layer 6 can be 1.13, 1.15, 1.18, 1.2, 1.22, 1.25, 1.27, and so on.

[0093] As shown in Figure 3, a second buffer layer 92 is provided on the side of the second filter layer 6 away from the back plate 1. The material of the second buffer layer 92 can be undoped gallium nitride (GaN), aluminum nitride (AlN), aluminum gallium nitride (AlGaN), etc. The second buffer layer 92 can serve as an insulating layer.

[0094] A third P-type semiconductor layer 41 is disposed on the side of the second buffer layer 92 facing away from the backplate 1. A third light-emitting layer 42 is disposed on the side of the third P-type semiconductor layer 41 facing away from the backplate 1. A third N-type semiconductor layer 43 is disposed on the side of the third light-emitting layer 42 facing away from the backplate 1. That is, the third P-type semiconductor layer 41, the third light-emitting layer 42, and the third N-type semiconductor layer 43 are stacked in sequence on the side of the second buffer layer 92 facing away from the backplate 1 in a direction away from the backplate 1. The third P-type semiconductor layer 41, the third light-emitting layer 42, and the third N-type semiconductor layer 43 constitute a third light-emitting device 4.

[0095] A third buffer layer 93 is provided on the side of the third light emitting device 4 away from the back plate 1. The material of the third buffer layer 93 can be undoped gallium nitride (GaN), aluminum nitride (AlN), aluminum gallium nitride (AlGaN), etc. The third buffer layer 93 can serve as an insulating layer.

[0096] Moreover, the first light-emitting device 2, the second light-emitting device 3 and the third light-emitting device 4 have a structure in which the layers gradually shrink in the direction away from the back panel 1, that is, the orthographic projection of the first light-emitting device 2 on the back panel 1 covers and is larger than the orthographic projection of the second light-emitting device 3 on the back panel 1, and the orthographic projection of the second light-emitting device 3 on the back panel 1 covers and is larger than the orthographic projection of the third light-emitting device 4 on the back panel 1.

[0097] Specifically, as shown in Figures 3 and 5 to 7, the orthographic projection of the first filter layer 5 on the back panel 1 is located within the orthographic projection of the first light-emitting device 2 on the back panel 1. For example, the three side edges of the orthographic projection of the first light-emitting device 2 on the back panel 1 may be aligned with the three side edges of the orthographic projection of the first filter layer 5 on the back panel 1, and the other side edge of the orthographic projection of the first filter layer 5 on the back panel 1 is retracted from the other side edge of the orthographic projection of the first light-emitting device 2 on the back panel 1, so that a portion of the first light-emitting device 2 is not covered by the first filter layer 5, that is, a portion of the first N-type semiconductor layer 23 of the first light-emitting device 2 is exposed, which facilitates the connection of the first N-type semiconductor layer 23 with the N electrode 104.

[0098] The orthographic projections of the first buffer layer 91 and the second P-type semiconductor layer 31 on the backplate 1 coincide with the orthographic projection of the first filter layer 5 on the backplate 1 , and the orthographic projection of the second light-emitting layer 32 on the backplate 1 coincide with the orthographic projection of the second N-type semiconductor layer 33 on the backplate 1 . However, the orthographic projections of the second light-emitting layer 32 and the second N-type semiconductor layer 33 on the backplate 1 are located within the orthographic projection of the second P-type semiconductor layer 31 on the backplate 1 . For example, three side edges of the second light-emitting layer 32 and the second N-type semiconductor layer 33 may be flush with the three side edges of the second P-type semiconductor layer 31 , and the other side edges of the second light-emitting layer 32 and the second N-type semiconductor layer 33 may be retracted from the other side edges of the second P-type semiconductor layer 31 , so that a portion of the second P-type semiconductor layer 31 is not covered by the second light-emitting layer 32 and the second N-type semiconductor layer 33 , i.e., a portion of the second P-type semiconductor layer 31 of the second light-emitting device 3 is exposed, thereby facilitating the connection of the second P-type semiconductor layer 31 to the second P-electrode 102 .

[0099] The orthographic projection of the second filter layer 6 on the back plate 1 is located within the orthographic projection of the second N-type semiconductor layer 33 on the back plate 1. For example, the three side edges of the orthographic projection of the second N-type semiconductor layer 33 on the back plate 1 may be aligned with the three side edges of the orthographic projection of the second filter layer 6 on the back plate 1, and the other side edge of the orthographic projection of the second filter layer 6 on the back plate 1 is retracted into the other side edge of the orthographic projection of the second N-type semiconductor layer 33 on the back plate 1, so that a portion of the second N-type semiconductor layer 33 is not covered by the second filter layer 6, that is, a portion of the second N-type semiconductor layer 33 is exposed, thereby facilitating the connection between the second N-type semiconductor layer 33 and the N-electrode 104.

[0100] The orthographic projections of the second buffer layer 92 and the third P-type semiconductor layer 41 on the back plate 1 coincide with the orthographic projection of the second filter layer 6 on the back plate 1 , and the orthographic projection of the third light-emitting layer 42 on the back plate 1 coincide with the orthographic projection of the third N-type semiconductor layer 43 on the back plate 1 . However, the orthographic projections of the third light-emitting layer 42 and the third N-type semiconductor layer 43 on the back plate 1 are located within the orthographic projection of the third P-type semiconductor layer 41 on the back plate 1 . For example, the three side edges of the third light-emitting layer 42 and the third N-type semiconductor layer 43 may be flush with the three side edges of the third P-type semiconductor layer 41 , and the other side edges of the third light-emitting layer 42 and the third N-type semiconductor layer 43 may be retracted into the other side edges of the third P-type semiconductor layer 41 , so that a portion of the third P-type semiconductor layer 41 is not covered by the third light-emitting layer 42 and the third N-type semiconductor layer 43 , i.e., a portion of the third P-type semiconductor layer 41 of the third light-emitting device 4 is exposed, thereby facilitating the connection of the third P-type semiconductor layer 41 with the third P-electrode 103 .

[0101] The orthographic projection of the third buffer layer 93 on the back plate 1 is located within the orthographic projection of the third N-type semiconductor layer 43 on the back plate 1. For example, the three side edges of the orthographic projection of the third N-type semiconductor layer 43 on the back plate 1 may be aligned with the three side edges of the orthographic projection of the third buffer layer 93 on the back plate 1, and the other side edge of the orthographic projection of the third buffer layer 93 on the back plate 1 is retracted from the other side edge of the orthographic projection of the third N-type semiconductor layer 43 on the back plate 1, so that a portion of the third N-type semiconductor layer 43 is not covered by the third buffer layer 93, that is, a portion of the third N-type semiconductor layer 43 is exposed, which facilitates the connection of the third N-type semiconductor layer 43 with the N electrode 104.

[0102] The exposed portions of the first N-type semiconductor layer 23 , the second N-type semiconductor layer 33 , and the third N-type semiconductor layer 43 can be arranged on the same side of the light-emitting device, so as to facilitate connection of the exposed portions of the first N-type semiconductor layer 23 , the second N-type semiconductor layer 33 , and the third N-type semiconductor layer 43 with the N-electrode 104 .

[0103] The exposed portion of the second P-type semiconductor layer 31 and the second P-electrode 102 can be arranged on the same side of the light-emitting device, so as to facilitate the connection between the exposed portion of the second P-type semiconductor layer 31 and the second P-electrode 102 .

[0104] The exposed portion of the third P-type semiconductor layer 41 and the third P-electrode 103 can be arranged on the same side of the light-emitting device, so as to facilitate the connection between the exposed portion of the third P-type semiconductor layer 41 and the third P-electrode 103 .

[0105] Of course, in other example embodiments of the present disclosure, as shown in Figure 7, the exposed portion of the first N-type semiconductor layer 23, the exposed portion of the second N-type semiconductor layer 33, the exposed portion of the second P-type semiconductor layer 31, and the exposed portion of the third P-type semiconductor layer 41 can be arranged one by one around the exposed portion of the third N-type semiconductor layer 43, and the exposed portion of the first N-type semiconductor layer 23 is arranged close to the N-electrode 104, the exposed portion of the second N-type semiconductor layer 33 is arranged away from the second P-electrode 102 and the third P-electrode 103, and the exposed portion of the second P-type semiconductor layer 31 and the exposed portion of the third P-type semiconductor layer 41 are arranged close to the second P-electrode 102 and the third P-electrode 103.

[0106] Of course, the specific positions of the exposed portion of the second P-type semiconductor layer 31, the exposed portion of the third P-type semiconductor layer 41, the exposed portion of the first N-type semiconductor layer 23, the exposed portion of the second N-type semiconductor layer 33 and the exposed portion of the third N-type semiconductor layer 43 can also be set at other positions, as long as they are convenient for connection, and they are not explained one by one here.

[0107] 3 and 8 , an insulating layer 10 is covered on the light-emitting device, that is, an insulating layer 10 is provided on the side of the third buffer layer 93 facing away from the back plate 1 , and the insulating layer 10 also covers the exposed portion of the second P-type semiconductor layer 31 , the exposed portion of the third P-type semiconductor layer 41 , the exposed portion of the first N-type semiconductor layer 23 , the exposed portion of the second N-type semiconductor layer 33 and the exposed portion of the third N-type semiconductor layer 43 , and the insulating layer 10 also covers the side walls of the first light-emitting device 2 , the side walls of the second light-emitting device 3 and the side walls of the third light-emitting device 4 .

[0108] Five vias are provided on the insulating layer 10, and the five vias are connected to the exposed portion of the second P-type semiconductor layer 31, the exposed portion of the third P-type semiconductor layer 41, the exposed portion of the first N-type semiconductor layer 23, the exposed portion of the second N-type semiconductor layer 33, and the third N-type semiconductor layer 43. Of course, the number of vias can be set to more as needed.

[0109] 3 and 9 , the N-electrode connection portion 111, the second P-electrode connection portion 112, and the third P-electrode connection portion 113 in FIG3 only reflect a portion of the end portion; a connecting conductor layer 11 is provided on the side of the insulating layer 10 facing away from the back plate 1, and the connecting conductor layer 11 may include the N-electrode connection portion 111, the second P-electrode connection portion 112, and the third P-electrode connection portion 113. The N-electrode connection portion 111 is connected to the exposed portion of the first N-type semiconductor layer 23, the exposed portion of the second N-type semiconductor layer 33, and the exposed portion of the third N-type semiconductor layer 43 through a via hole, and the N-electrode connection portion 111 is connected to the N-electrode 104, so that the exposed portion of the first N-type semiconductor layer 23, the exposed portion of the second N-type semiconductor layer 33, and the exposed portion of the third N-type semiconductor layer 43 are electrically connected to the N-electrode 104 through the N-electrode connection portion 111.

[0110] One end of the second P-electrode connection portion 112 is connected to the second P-electrode 102 , and the other end of the second P-electrode connection portion 112 is connected to the exposed portion of the second P-type semiconductor layer 31 , thereby electrically connecting the exposed portion of the second P-type semiconductor layer 31 to the second P-electrode 102 through the second P-electrode connection portion 112 .

[0111] One end of the third P-electrode connecting portion 113 is connected to the third P-electrode 103, and the other end of the third P-electrode connecting portion 113 is connected to the exposed portion of the third P-type semiconductor layer 41, thereby electrically connecting the exposed portion of the third P-type semiconductor layer 41 to the third P-electrode 103 via the third P-electrode connecting portion 113. Of course, the specific structure of the connecting conductor layer 11 is not limited to the above description, and can be set according to the connection portion reserved for each light-emitting device.

[0112] As shown in FIG12 , in another exemplary embodiment of the present disclosure, the orthographic projection of the first light-emitting device 2, the orthographic projection of the second light-emitting device 3, and the orthographic projection of the third light-emitting device 4 on the backplane 1 do not overlap. That is, the first light-emitting device 2, the second light-emitting device 3, and the third light-emitting device 4 are not stacked on the same side of the backplane 1.

[0113] Specifically, as shown in Figure 12, three P electrodes and one N electrode 104 are provided on the same surface of the back plate 1; the three P electrodes are respectively the first P electrode 101, the second P electrode 102 and the third P electrode 103. The orthographic projections of the three P electrodes and the one N electrode 104 on the back plate 1 are basically rectangular. The orthographic projection areas of the three P electrodes on the back plate 1 are basically the same, and the orthographic projection areas of the three P electrodes on the back plate 1 are larger than the orthographic projection areas of the N electrode 104 on the back plate 1. Of course, the specific shapes of the three P electrodes and the one N electrode 104 can be set to circular, elliptical, trapezoidal or other regular or irregular polygons, which are not explained here one by one; moreover, the specific shapes of the three P electrodes and the one N electrode 104 can be the same or different.

[0114] The first P electrode 101, the second P electrode 102, and the third P electrode 103 can be sequentially spaced apart on the same side of the N electrode 104, that is, gaps are provided between the N electrode 104, the first P electrode 101, the second P electrode 102, and the third P electrode 103. The first light-emitting device 2 is provided on the side of the first P electrode 101 facing away from the back plate 1, the second light-emitting device 3 is provided on the side of the second P electrode 102 facing away from the back plate 1, and the third light-emitting device 4 is provided on the side of the third P electrode 103 facing away from the back plate 1, so that the first light-emitting device 2, the second light-emitting device 3, and the third light-emitting device 4 are also spaced apart. Of course, in some other example embodiments of the present disclosure, the specific positional relationship of the three P electrodes and the one N electrode 104 can also be other, which are not described one by one here.

[0115] A first P-type semiconductor layer 21 is provided on the side of the first P-electrode 101 facing away from the backplate 1, a first light-emitting layer 22 is provided on the side of the first P-type semiconductor layer 21 facing away from the backplate 1, and a first N-type semiconductor layer 23 is provided on the side of the first light-emitting layer 22 facing away from the backplate 1. That is, the first P-type semiconductor layer 21, the first light-emitting layer 22, and the first N-type semiconductor layer 23 are stacked in sequence along the direction away from the backplate 1 on the side of the first P-electrode 101 facing away from the backplate 1. The first P-type semiconductor layer 21, the first light-emitting layer 22, and the first N-type semiconductor layer 23 constitute the first light-emitting device 2.

[0116] A first filter layer 5 is provided on the side of the first light-emitting device 2 facing away from the back plate 1. Specifically, a first filter layer 5 is provided on the side of the first N-type semiconductor layer 23 facing away from the back plate 1. The first filter layer 5 can only transmit light of the first color, that is, the first filter layer 5 can only transmit light emitted by the first light-emitting device 2, and cannot transmit light emitted by the second light-emitting device 3 and the third light-emitting device 4. When the second light-emitting device 3 and / or the third light-emitting device 4 emits light and the first light-emitting device 2 does not emit light, the light emitted by the second light-emitting device 3 and / or the third light-emitting device 4 cannot reach the first light-emitting device 2 and will not excite the first light-emitting device 2 to emit light, thereby improving the color purity and color gamut of the display panel.

[0117] 11 , only portions of the first semiconductor layer 51 and the first porous semiconductor layer 52 on both sides are shown, and the middle portion is omitted. The first filter layer 5 may include multiple layers of the first semiconductor layer 51 and multiple layers of the first porous semiconductor layer 52. The number of layers of the first semiconductor layer 51 is greater than or equal to 10 and less than or equal to 50. For example, the number of layers of the first semiconductor layer 51 may be 12, 15, 17, 20, 23, 25, 28, 30, 32, 35, 37, 40, 43, 45, 48, and the like. The number of layers of the first porous semiconductor layer 52 is greater than or equal to 10 and less than or equal to 50. For example, the number of layers of the first porous semiconductor layer 52 may be 12, 15, 17, 20, 23, 25, 28, 30, 32, 35, 37, 40, 43, 45, 48, and the like.

[0118] Moreover, the first semiconductor layers 51 and the first porous semiconductor layers 52 are alternately arranged, that is, one first porous semiconductor layer 52 is arranged between two adjacent first semiconductor layers 51 , and one first semiconductor layer 51 is arranged between two adjacent first porous semiconductor layers 52 .

[0119] The first semiconductor layer 51 is made of undoped gallium nitride (GaN), and the first porous semiconductor layer 52 is formed by electro-etching heavily doped gallium nitride (GaN) using an oxalic acid solution.

[0120] As shown in Figure 10, a first buffer layer 91 is provided on the side of the first filter layer 5 away from the back plate 1. The material of the first buffer layer 91 can be undoped gallium nitride (GaN), aluminum nitride (AlN), aluminum gallium nitride (AlGaN), etc. The first buffer layer 91 can serve as an insulating layer.

[0121] Vias are provided on the first buffer layer 91 and the first filter layer 5 , and the vias are connected to the first N-type semiconductor layer 23 , so that the first N-type semiconductor layer 23 is not covered by the first buffer layer 91 and the first filter layer 5 at the vias.

[0122] As shown in FIG10 , a first conductive layer 12 is provided on the side of the N-electrode 104, the first buffer layer 91, the second P-electrode 102, and the third P-electrode 103 facing away from the backplate 1. The first conductive layer 12 may include a first connecting portion 121, a second connecting portion 122, a third connecting portion 123, and a fourth connecting portion 124, which are arranged at intervals. The first connecting portion 121 is provided on the side of the N-electrode 104 facing away from the backplate 1, the second connecting portion 122 is provided on the side of the first buffer layer 91 facing away from the backplate 1, the third connecting portion 123 is provided on the side of the second P-electrode 102 facing away from the backplate 1, and the fourth connecting portion 124 is provided on the side of the third P-electrode 103 facing away from the backplate 1. Furthermore, the second connecting portion 122 is connected to the first N-type semiconductor layer 23 through vias in the first buffer layer 91 and the first filter layer 5.

[0123] As shown in FIG10 , a second P-type semiconductor layer 31 is provided on the side of the third connecting portion 123 facing away from the backplate 1, a second light-emitting layer 32 is provided on the side of the second P-type semiconductor layer 31 facing away from the backplate 1, and a second N-type semiconductor layer 33 is provided on the side of the second light-emitting layer 32 facing away from the backplate 1. That is, the second P-type semiconductor layer 31, the second light-emitting layer 32, and the second N-type semiconductor layer 33 are stacked in sequence on the side of the third connecting portion 123 facing away from the backplate 1 in a direction away from the backplate 1. The second P-type semiconductor layer 31, the second light-emitting layer 32, and the second N-type semiconductor layer 33 constitute the second light-emitting device 3.

[0124] A second filter layer 6 is provided on the side of the second light-emitting device 3 facing away from the back plate 1. Specifically, a second filter layer 6 is provided on the side of the second N-type semiconductor layer 33 facing away from the back plate 1. The second filter layer 6 can only transmit light of the second color, that is, the second filter layer 6 can only transmit light emitted by the second light-emitting device 3, and cannot transmit light emitted by the first light-emitting device 2 and the third light-emitting device 4. When the first light-emitting device 2 and / or the third light-emitting device 4 emits light and the second light-emitting device 3 does not emit light, the light emitted by the third light-emitting device 4 cannot reach the second light-emitting device 3 and will not stimulate the second light-emitting device 3 to emit light, thereby further improving the color purity and color gamut of the display panel; moreover, the light emitted by the first light-emitting device 2 cannot be emitted through the second filter layer 6, that is, the light emitted by the first light-emitting device 2 will not crosstalk to the adjacent second light-emitting device 3, thereby further improving the color purity and color gamut of the display panel.

[0125] 11 , only portions of the second semiconductor layer 61 and the second porous semiconductor layer 62 on both sides are shown, and the middle portion is omitted. The second filter layer 6 may include multiple layers of the second semiconductor layer 61 and multiple layers of the second porous semiconductor layer 62. The number of layers of the second semiconductor layer 61 is greater than or equal to 10 and less than or equal to 50. For example, the number of layers of the second semiconductor layer 61 may be 12, 15, 17, 20, 23, 25, 28, 30, 32, 35, 37, 40, 43, 45, 48, and the like. The number of layers of the second porous semiconductor layer 62 is greater than or equal to 10 and less than or equal to 50. For example, the number of layers of the second porous semiconductor layer 62 may be 12, 15, 17, 20, 23, 25, 28, 30, 32, 35, 37, 40, 43, 45, 48, and the like.

[0126] Moreover, the second semiconductor layers 61 and the second porous semiconductor layers 62 are alternately arranged, that is, one second porous semiconductor layer 62 is arranged between two adjacent second semiconductor layers 61 , and one second semiconductor layer 61 is arranged between two adjacent second porous semiconductor layers 62 .

[0127] The second semiconductor layer 61 is made of undoped gallium nitride (GaN), and the second porous semiconductor layer 62 is formed by electro-etching heavily doped gallium nitride (GaN) using an oxalic acid solution.

[0128] Moreover, in this case, the thickness of the second filter layer 6 is greater than that of the first filter layer 5 , so that the first filter layer 5 and the second filter layer 6 can transmit light of different wavelengths. Specifically, the ratio of the thickness of the second filter layer 6 to the thickness of the first filter layer 5 is greater than or equal to 1.5 and less than or equal to 2.5. For example, the ratio of the thickness of the second filter layer 6 to the thickness of the first filter layer 5 can be 1.53, 1.55, 1.58, 1.6, 1.62, 1.65, 1.67, 1.7, 1.73, 1.75, 1.78, 1.8, 1.82, 1.85, 1.87, 1.9, 1.93, 1.95, 1.98, 2, 2.02, 2.05, 2.07, 2.1, 2.13, 2.15, 2.18, 2.2, 2.22, 2.25, 2.27, 2.3, 2.33, 2.35, 2.38, 2.4, 2.42, 2.45, 2.47, etc.

[0129] As shown in Figure 10, a second buffer layer 92 is provided on the side of the second filter layer 6 away from the back plate 1. The material of the second buffer layer 92 can be undoped gallium nitride (GaN), aluminum nitride (AlN), aluminum gallium nitride (AlGaN), etc. The second buffer layer 92 can serve as an insulating layer.

[0130] Vias are provided on the second buffer layer 92 and the second filter layer 6 , and the vias are connected to the second N-type semiconductor layer 33 , so that the second N-type semiconductor layer 33 is not covered by the second buffer layer 92 and the second filter layer 6 at the vias.

[0131] As shown in FIG10 , a second conductive layer 13 is disposed on the side of the first connecting portion 121, the second connecting portion 122, the second buffer layer 92, and the fourth connecting portion 124 facing away from the backplate 1. The second conductive layer 13 may include a fifth connecting portion 131, a sixth connecting portion 132, a seventh connecting portion 133, and an eighth connecting portion 134, spaced apart from each other. The fifth connecting portion 131 is disposed on the side of the first connecting portion 121 facing away from the backplate 1, the sixth connecting portion 132 is disposed on the side of the second connecting portion 122 facing away from the backplate 1, the seventh connecting portion 133 is disposed on the side of the second buffer layer 92 facing away from the backplate 1, and the eighth connecting portion 134 is disposed on the side of the fourth connecting portion 124 facing away from the backplate 1. Furthermore, the seventh connecting portion 133 is connected to the second N-type semiconductor layer 33 through vias in the second buffer layer 92 and the second filter layer 6.

[0132] As shown in FIG10 , a third P-type semiconductor layer 41 is disposed on the side of the eighth connecting portion 134 facing away from the backplate 1, a third light-emitting layer 42 is disposed on the side of the third P-type semiconductor layer 41 facing away from the backplate 1, and a third N-type semiconductor layer 43 is disposed on the side of the third light-emitting layer 42 facing away from the backplate 1. That is, the third P-type semiconductor layer 41, the third light-emitting layer 42, and the third N-type semiconductor layer 43 are stacked in sequence on the side of the eighth connecting portion 134 facing away from the backplate 1, in a direction away from the backplate 1. The third P-type semiconductor layer 41, the third light-emitting layer 42, and the third N-type semiconductor layer 43 constitute the third light-emitting device 4.

[0133] A third filter layer 7 is provided on the side of the third light-emitting device 4 facing away from the back panel 1. Specifically, a third filter layer 7 is provided on the side of the third N-type semiconductor layer 43 facing away from the back panel 1. The third filter layer 7 can only transmit light of the third color, that is, the third filter layer 7 can only transmit light emitted by the third light-emitting device 4, and cannot transmit light emitted by the first light-emitting device 2 and the second light-emitting device 3. When the first light-emitting device 2 and / or the second light-emitting device 3 emits light, the light emitted by the first light-emitting device 2 and / or the second light-emitting device 3 cannot be emitted through the third filter layer 7, that is, the light emitted by the first light-emitting device 2 / or the second light-emitting device 3 will not crosstalk with the adjacent third light-emitting device 4, thereby improving the color purity and color gamut of the display panel.

[0134] 11 , only portions of the third semiconductor layer 71 and the third porous semiconductor layer 72 on both sides are shown, and the middle portion is omitted. The third filter layer 7 may include multiple layers of the third semiconductor layer 71 and multiple layers of the third porous semiconductor layer 72. The number of layers of the third semiconductor layer 71 is greater than or equal to 10 and less than or equal to 50. For example, the number of layers of the third semiconductor layer 71 may be 12, 15, 17, 20, 23, 25, 28, 30, 32, 35, 37, 40, 43, 45, 48, and the like. The number of layers of the third porous semiconductor layer 72 is greater than or equal to 10 and less than or equal to 50. For example, the number of layers of the third porous semiconductor layer 72 may be 12, 15, 17, 20, 23, 25, 28, 30, 32, 35, 37, 40, 43, 45, 48, and the like.

[0135] Moreover, the third semiconductor layers 71 and the third porous semiconductor layers 72 are alternately arranged, that is, one third porous semiconductor layer 72 is arranged between two adjacent third semiconductor layers 71 , and one third semiconductor layer 71 is arranged between two adjacent third porous semiconductor layers 72 .

[0136] The third semiconductor layer 71 is made of undoped gallium nitride (GaN), and the third porous semiconductor layer 72 is formed by electro-etching heavily doped gallium nitride (GaN) using an oxalic acid solution.

[0137] Moreover, in this case, the thickness of the third filter layer 7 is greater than that of the first filter layer 5, thereby achieving the purpose of different wavelengths of light being transmitted by the first filter layer 5 and the third filter layer 7. Specifically, the ratio of the thickness of the third filter layer 7 to the thickness of the first filter layer 5 is greater than or equal to 1.1 and less than or equal to 1.5. For example, the ratio of the thickness of the third filter layer 7 to the thickness of the first filter layer 5 can be 1.13, 1.15, 1.18, 1.2, 1.22, 1.25, 1.27, 1.3, 1.33, 1.35, 1.38, 1.4, 1.42, 1.45, 1.47, etc.

[0138] As shown in Figure 10, a third buffer layer 93 is provided on the side of the third filter layer 7 facing away from the back plate 1. The material of the third buffer layer 93 can be undoped gallium nitride (GaN), aluminum nitride (AlN), aluminum gallium nitride (AlGaN), etc. The third buffer layer 93 can serve as an insulating layer.

[0139] Vias are provided on the third buffer layer 93 and the third filter layer 7 , and the vias are connected to the third N-type semiconductor layer 43 , so that the third N-type semiconductor layer 43 is not covered by the third buffer layer 93 and the third filter layer 7 at the vias.

[0140] As shown in Figure 10, a third conductor layer 14 is provided on the side of the fifth connecting part 131, the sixth connecting part 132, the seventh connecting part 133 and the third buffer layer 93 facing away from the back plate 1, and the third conductor layer 14 is connected to the third N-type semiconductor layer 43 through a via. The fourth connecting part 124, the fifth connecting part 131, the sixth connecting part 132 and the third N-type semiconductor layer 43 are electrically connected through the third conductor layer 14, so that the first N-type semiconductor layer 23 of the first light-emitting device 2, the second N-type semiconductor layer 33 of the second light-emitting device 3 and the third N-type semiconductor layer 43 of the third light-emitting device 4 are all electrically connected to the N electrode 104.

[0141] In another example embodiment of the present disclosure, referring to Figures 12 to 22, for ease of understanding, the first filter layer 5, the second filter layer 6 and the third filter layer 7 are omitted in Figures 12 to 22, and only one first light-emitting device 2 is shown; the display panel may further include a light extraction layer group 8, which may be provided on a side of at least one of the first light-emitting device 2, the second light-emitting device 3 and the third light-emitting device 4 that is away from the back plate 1, or in other words, the light extraction layer group 8 may be provided between a light-emitting surface of at least one of the first light-emitting device 2, the second light-emitting device 3 and the third light-emitting device 4 and the air layer. For example, the light extraction layer group 8 may be provided only between the light-emitting surface of the first light-emitting device 2, the second light-emitting device 3 or the third light-emitting device 4 and the air layer, or the light extraction layer group 8 may be provided only between the light-emitting surfaces of two of the first light-emitting device 2, the second light-emitting device 3 and the third light-emitting device 4 and the air layer, or the light extraction layer group 8 may be provided between the light-emitting surfaces of all three of the first light-emitting device 2, the second light-emitting device 3 and the third light-emitting device 4 and the air layer. The light extraction layer group 8 is located between the light emitting surface of at least one of the first light emitting device 2 , the second light emitting device 3 and the third light emitting device 4 and the air layer.

[0142] The light extraction layer groups 8 of the respective light-emitting devices may be provided individually or collectively.

[0143] The following description will be made by taking the arrangement of the light extraction layer group 8 on the light emitting surface of the first light emitting device 2 as an example.

[0144] The refractive index of the light extraction layer group 8 is smaller than the refractive index of the film layer bonded to the light extraction layer group 8 , and larger than the refractive index of air.

[0145] If the light emitted from the first light-emitting device 2, the second light-emitting device 3 and the third light-emitting device 4 is directly incident on the air, the refractive index of the air is significantly different from that of the first light-emitting device 2, the second light-emitting device 3 and the third light-emitting device 4, so that the critical angle of total reflection is relatively large. For example, when the refractive index of the film layer on the light-emitting surface of the first light-emitting device 2, the second light-emitting device 3 and the third light-emitting device 4 is approximately 2.4, the critical angle of total reflection is approximately 24 degrees, and the light having an angle with the normal greater than the critical angle will be totally reflected, resulting in only approximately 4.3% of the light being emitted from the first light-emitting device 2, the second light-emitting device 3 and the third light-emitting device 4; and due to the effect of total reflection, approximately 66% of the light forms an optical waveguide inside the light-emitting device, and approximately 22% of the light forms an optical waveguide inside the backplane 1.

[0146] The above-mentioned arrangement enables the light emitted from the first light-emitting device 2, the second light-emitting device 3 and the third light-emitting device 4 to enter the light extraction layer group 8 and the air in turn. Since the refractive index from the light extraction layer group 8 to the air gradually decreases, a large amount of light generated by the light directly hitting the air is avoided from being totally reflected, thereby improving the light extraction efficiency of the display panel.

[0147] The light extraction layer group 8 may include at least two porous structure layers 8a. For example, the light extraction layer group 8 may include two porous structure layers 8a. The light extraction layer group 8 may also include three porous structure layers 8a. The light extraction layer group 8 may also include more porous structure layers 8a.

[0148] The refractive index of the porous structure layer 8a decreases as the distance from the backplane 1 increases, that is, the refractive index of the porous structure layer 8a decreases as the distance from the light-emitting surface increases. For example, the porous structure layer 8a is provided with three layers, namely a first porous structure layer 81, a second porous structure layer 82, and a third porous structure layer 83, which are stacked in sequence. The first porous structure layer 81 is closer to the backplane 1 than the third porous structure layer 83, that is, the first porous structure layer 81, the second porous structure layer 82, and the third porous structure layer 83 are stacked in sequence in a direction away from the backplane 1. The thickness of the first porous structure layer 81, the second porous structure layer 82, and the third porous structure layer 83 can be the same or different. The thickness of the first porous structure layer 81, the second porous structure layer 82 and the third porous structure layer 83 can be greater than or equal to 0.2 microns and less than or equal to 2.5 microns. For example, the thickness of the first porous structure layer 81, the second porous structure layer 82 and the third porous structure layer 83 can be 0.5 microns, 0.7 microns, 1 micron, 1.3 microns, 1.5 microns, 1.8 microns, 2 microns, 2.2 microns, etc.

[0149] The refractive index of the first porous structure layer 81 is greater than that of the second porous structure layer 82, and the refractive index of the second porous structure layer 82 is greater than that of the third porous structure layer 83. Furthermore, the refractive index of the first porous structure layer 81 is less than that of the film layer bonded to the light extraction layer group 8, and the refractive index of the third porous structure layer 83 is greater than that of air.

[0150] For example, the refractive index of the first porous structure layer 81 is greater than 1 and less than or equal to 1.5. For example, the refractive index of the first porous structure layer 81 can be 1.03, 1.05, 1.08, 1.12, 1.15, 1.17, 1.2, 1.23, 1.25, 1.28, 1.3, 1.32, 1.35, 1.37, 1.4, 1.43, 1.45, 1.48, etc. The refractive index of the second porous structure layer 82 is greater than or equal to 1.5 and less than or equal to 1.9. For example, the refractive index of the second porous structure layer 82 can be 1.52, 1.55, 1.57, 1.6, 1.63, 1.65, 1.68, 1.7, 1.72, 1.75, 1.77, 1.8, 1.83, 1.85, 1.88, etc. The refractive index of the third porous structure layer 83 is greater than or equal to 1.9 and less than 2.4. For example, the refractive index of the third porous structure layer 83 can be 1.92, 1.95, 1.97, 2, 2.03, 2.05, 2.08, 2.1, 2.12, 2.15, 2.17, 2.2, 2.23, 2.25, 2.28, 2.3, 2.33, 2.35, 2.38, etc.

[0151] The total volume of pores per unit volume of the porous structure layer 8a increases as the distance from the back plate 1 increases, that is, the total volume of pores per unit volume of the porous structure layer 8a increases as the distance from the light-emitting surface increases. Further, taking the above-described porous structure layer 8a as having three layers as an example, the total volume of pores per unit volume of the first porous structure layer 81 is smaller than the total volume of pores per unit volume of the second porous structure layer 82, and the total volume of pores per unit volume of the second porous structure layer 82 is smaller than the total volume of pores per unit volume of the third porous structure layer 83.

[0152] The larger the total volume of pores per unit volume of the porous structure layer 8a, the closer the refractive index of the porous structure layer 8a is to that of air. That is, the larger the total volume of pores per unit volume of the porous structure layer 8a, the smaller the refractive index of the porous structure layer 8a. The refractive index of the porous structure layer 8a is controlled by controlling the total volume of pores per unit volume of the porous structure layer 8a. That is, the total volume of pores per unit volume of the porous structure layer 8a increases as the distance from the back plate 1 increases, thereby achieving a decrease in the refractive index of the porous structure layer 8a as the distance from the back plate 1 increases.

[0153] The pores within the porous structure layer 8a are generally nanometer-sized. The increase in the total volume of the pores per unit volume of the porous structure layer 8a can be an increase in the number of pores per unit volume of the porous structure layer 8a, or an increase in the volume of a single pore within the porous structure layer 8a. Alternatively, the increase in the number of pores per unit volume of the porous structure layer 8a and the increase in the volume of a single pore within the porous structure layer 8a can also be achieved.

[0154] 13 to 20 , in some exemplary embodiments of the present disclosure, a plurality of recessed structures 84 may be provided on the light extraction layer group 8. The plurality of recessed structures 84 may further destroy the conditions for total reflection, thereby improving light extraction efficiency.

[0155] 13 to 16 , the plurality of recessed structures 84 may be arranged periodically. For example, as shown in FIG. 23 , the plurality of recessed structures 84 may be arranged in a dot shape (e.g., a circle, an ellipse, a rectangle, a trapezoid, or various regular or irregular polygons). The plurality of recessed structures 84 may have the same shape and size and be arranged in an array. As shown in FIG. 24 , the plurality of recessed structures 84 may be arranged in a strip shape. The plurality of recessed structures 84 may have the same shape and size, and the distance between two adjacent recessed structures 84 may be the same.

[0156] Of course, as shown in Figures 17 to 20, multiple recessed structures 84 can also be arranged non-periodically; for example, the positive projection of the recessed structure 84 on the back plate 1 can be set as a point or strip, and at least one of the shapes and sizes of the multiple recessed structures 84 is different, and the distance between two adjacent recessed structures 84 is also different.

[0157] As shown in Figures 13 and 17 , the recessed structure 84 can be a via hole that penetrates the light extraction layer group 8. That is, the recessed structure 84 can penetrate all of the porous structure layers 8a. Furthermore, taking the aforementioned porous structure layer 8a as having three layers as an example, the recessed structure 84 can penetrate the first porous structure layer 81, the second porous structure layer 82, and the third porous structure layer 83.

[0158] Of course, with reference to Figures 14 to 16 and Figures 18 to 20, the recessed structure 84 is a blind hole that does not penetrate the light extraction layer group 8, that is, the recessed structure 84 does not penetrate all the porous structure layers 8a. The porous structure layer 8a described above is also set as three layers as an example for explanation. With reference to Figures 15 and 19, the recessed structure 84 may only penetrate a portion of the third porous structure layer 83. With reference to Figures 14 and 18, the recessed structure 84 may penetrate the third porous structure layer 83 and extend to a portion of the second porous structure layer 82. With reference to Figures 16 and 20, the recessed structure 84 may penetrate the third porous structure layer 83 and the second porous structure layer 82, and extend to a portion of the first porous structure layer 81.

[0159] In addition, the recessed structure 84 may only penetrate the third porous structure layer 83 without extending into the second porous structure layer 82 ; the recessed structure 84 may only penetrate the third porous structure layer 83 and the second porous structure layer 82 without extending into the first porous structure layer 81 .

[0160] As shown in Figure 22 , the display panel may further include a filling portion 85 disposed within the recessed structure 84. The refractive index of the filling portion 85 is lower than that of the light extraction layer group 8, that is, the refractive index of the filling portion 85 is lower than that of all porous structure layers 8a. The presence of multiple filling portions 85 within the recessed structure 84 further disrupts the conditions for total internal reflection, improving light extraction efficiency.

[0161] Taking the above-mentioned porous structure layer 8a as an example of being set as three layers, the refractive index of the filling part 85 is smaller than the refractive index of the first porous structure layer 81, and the refractive index of the filling part 85 is smaller than the refractive index of the second porous structure layer 82, and the refractive index of the filling part 85 is smaller than the refractive index of the third porous structure layer 83.

[0162] It should be noted that the first light-emitting device 2, the second light-emitting device 3 and the third light-emitting device 4 can be Micro LEDs, and the first light-emitting device 2, the second light-emitting device 3 and the third light-emitting device 4 can be face-mounted, flip-chip or vertical.

[0163] As shown in Figures 21 and 22, a first P-electrode 101 and an N-electrode 104 are provided on one side of the backplate 1. A current spreading layer 400 is provided on the side of the first P-electrode 101 facing away from the backplate 1. A first P-type semiconductor layer 21 is provided on the side of the current spreading layer 400 facing away from the backplate 1. A first light-emitting layer 22 is provided on the side of the first P-type semiconductor layer 21 facing away from the backplate 1. A first N-type semiconductor layer 23 is provided on the side of the first light-emitting layer 22 facing away from the backplate 1. The first N-type semiconductor layer 23 is connected to the N-electrode 104. A light extraction layer group 8 is provided on the side of the first N-type semiconductor layer 23 facing away from the backplate 1. The current spreading layer 400 is made of materials such as ITO (indium tin oxide) and IZO (indium zinc oxide).

[0164] As shown in Figures 21 and 22, a first P-electrode 101 is provided on one side of the backplate 1. A current spreading layer 400 is provided on the side of the first P-electrode 101 facing away from the backplate 1. A first P-type semiconductor layer 21 is provided on the side of the current spreading layer 400 facing away from the backplate 1. A first light-emitting layer 22 is provided on the side of the first P-type semiconductor layer 21 facing away from the backplate 1. A first N-type semiconductor layer 23 is provided on the side of the first light-emitting layer 22 facing away from the backplate 1. A light extraction layer group 8 is provided on the side of the first N-type semiconductor layer 23 facing away from the backplate 1. An N-electrode 104 is provided on the side of the light extraction layer group 8 facing away from the backplate 1. Due to the small area of ​​the N-electrode 104, it has little effect on the light emission of the first light-emitting device 2. By placing the two electrodes of the vertical first light-emitting device 2 on its two sides, and the current flowing through the device perpendicular to the film surface, the single-chip operating current density can be greatly improved, which is more conducive to the expansion of the current and the recombination of electrons and holes, and a more uniform light pattern can be obtained. In addition, the vertical light-emitting diode also has the advantages of good heat dissipation, high luminous intensity, low power consumption and long life.

[0165] The first N-type semiconductor layer 23, the second N-type semiconductor layer 33, and the third N-type semiconductor layer 43 may be, but are not limited to, N-type gallium nitride layers (N-GaN). The first P-type semiconductor layer 21, the second P-type semiconductor layer 31, and the third P-type semiconductor layer 41 may be, but are not limited to, P-type gallium nitride layers (P-GaN). The first light-emitting layer 22, the second light-emitting layer 32, and the third light-emitting layer 42 may be, but are not limited to, multiple quantum well (MQW) material layers.

[0166] Based on the same inventive concept, an exemplary embodiment of the present disclosure provides a method for manufacturing a display panel. As shown in FIG. 25 , the method for manufacturing a display panel may include the following steps:

[0167] Step S10: providing a base substrate.

[0168] Step S20: forming a first filter material layer and a first light-emitting device material layer on one side of the base substrate.

[0169] Step S30: transferring the first light-emitting device material layer and the first filter material layer to a backplane.

[0170] In step S40, the first light-emitting device material layer and the first filter material layer are etched to form a first light-emitting device and a first filter layer, a second light-emitting device and a second filter layer are sequentially formed on the side of the backplane where the first light-emitting device is formed, and a third light-emitting device is formed on the side of the backplane where the first light-emitting device is formed.

[0171] Among them, the distance between the second light-emitting device and the backplane is greater than the distance between the first light-emitting device and the backplane, the distance between the third light-emitting device and the backplane is greater than the distance between the second light-emitting device and the backplane, the first light-emitting device emits light of a first color, the second light-emitting device emits light of a second color, and the third light-emitting device emits light of a third color. The first filter layer can only transmit light of the first color, the second filter layer can only transmit light of the second color, or the second filter layer can only transmit light of the first color and the second color.

[0172] The following describes the various steps of the method for manufacturing a display panel.

[0173] Step S20: forming a first filter material layer and a first light-emitting device material layer on one side of the base substrate.

[0174] In this example embodiment, referring to FIG26 , forming the first filter material layer 5a and the first light-emitting device material layer on one side of the substrate 100 may include: forming a first buffer material layer 91a on one side of the substrate 100, i.e., epitaxially growing the first buffer material layer 91a on one side of the substrate 100; alternately forming the first semiconductor layer 51 and the first doped semiconductor layer on the side of the first buffer material layer 91a away from the substrate 100, i.e., alternately growing the first semiconductor layer 51 and the first doped semiconductor layer on the side of the first buffer material layer 91a away from the substrate 100; and both the first semiconductor layer 51 and the first doped semiconductor layer form multiple layers, for example, the number of layers of the first semiconductor layer 51 is greater than or equal to 10 and less than or equal to 50, and the number of layers of the first doped semiconductor layer is greater than or equal to 10 and less than or equal to 50; the multiple first semiconductor layers 51 and the multiple first doped semiconductor layers form a first filter original material layer, i.e., the first filter original material layer includes multiple first semiconductor layers 51 and multiple first doped semiconductor layers that are alternately arranged.

[0175] The first doped semiconductor layer is GaN (gallium nitride) doped silicon with a doping concentration range of 1E19 to 1E22 cm -3 (10 19 ~10 22 cm -3 ), and the greater the doping concentration, the thinner the thickness.

[0176] A first light-emitting device material layer is formed on the side of the first filter original material layer away from the base substrate 100; specifically, a first N-type semiconductor material layer 23a, a first light-emitting material layer 22a and a first P-type semiconductor material layer 21a are epitaxially grown in sequence on the side of the first filter original material layer away from the base substrate 100.

[0177] Then, the first doped semiconductor layer is electro-etched. Specifically, the first doped semiconductor layer is electro-etched through an oxalic acid solution, so that the first doped semiconductor layer forms a first porous semiconductor layer 52, and the first filter raw material layer forms a first filter material layer 5a. The electro-etching can be carried out at room temperature, with the first doped semiconductor layer serving as an anode and the platinum foil serving as a counter electrode (cathode). Oxalic acid with a concentration of 0.25M (mol / L) is used as the electrolyte. The etching process is carried out under a constant voltage mode. After etching, the substrate is rinsed with deionized water and blow-dried in N2 (nitrogen).

[0178] The thickness of the first filter material layer 5 a is greater than or equal to 50 nanometers and less than or equal to 200 nanometers, so that the thickness of the subsequently formed first filter layer 5 is greater than or equal to 50 nanometers and less than or equal to 200 nanometers. For example, the thickness of the first filter layer 5 can be 55 nanometers, 60 nanometers, 65 nanometers, 70 nanometers, 75 nanometers, 80 nanometers, 85 nanometers, 90 nanometers, 95 nanometers, 100 nanometers, 105 nanometers, 110 nanometers, 115 nanometers, 120 nanometers, 125 nanometers, 130 nanometers, 135 nanometers, 140 nanometers, 145 nanometers, 150 nanometers, 155 nanometers, 160 nanometers, 165 nanometers, 170 nanometers, 175 nanometers, 180 nanometers, 185 nanometers, 190 nanometers, 195 nanometers, etc.

[0179] The first filter material layer 5 a is formed during the process of forming the first light-emitting device 2 , without requiring additional process steps, thereby avoiding increased costs.

[0180] An N-electrode material layer is formed on the backplate 1 and etched to form an N-electrode 104. A P-electrode material layer is formed on the backplate 1 and etched to form a first P-electrode 101, a second P-electrode 102, and a third P-electrode 103. The specific structures of the N-electrode 104, the first P-electrode 101, the second P-electrode 102, and the third P-electrode 103 have been described in detail above and will not be repeated here. Alternatively, the first P-electrode 101, the second P-electrode 102, and the third P-electrode 103 may be formed first, followed by the N-electrode 104.

[0181] Step S30: transferring the first light-emitting device material layer and the first filter material layer to a backplane.

[0182] 27 , the first light emitting device material layer and the first filter material layer 5 a are transferred to the backplane 1 so that the first P-type semiconductor material layer 21 a is in contact with the N-electrode 104 , the first P-electrode 101 , the second P-electrode 102 , and the third P-electrode 103 . The base substrate 100 is removed.

[0183] In step S40, the first light-emitting device material layer and the first filter material layer are etched to form a first light-emitting device and a first filter layer, a second light-emitting device and a second filter layer are sequentially formed on the side of the backplane where the first light-emitting device is formed, and a third light-emitting device is formed on the side of the backplane where the first light-emitting device is formed.

[0184] In this example embodiment, as shown in Figure 28, a second P-type semiconductor material layer 31a, a second light-emitting material layer 32a, a second N-type semiconductor material layer 33a, a second filter original material layer, a second buffer material layer 92a, a third P-type semiconductor material layer 41a, a third light-emitting material layer 42a, a third N-type semiconductor material layer 43a and a third buffer material layer 93a can be epitaxially grown in sequence on the side of the first buffer material layer 91a facing away from the back plate 1.

[0185] The second filter original material layer is formed as follows: the second semiconductor layer 61 and the second doped semiconductor layer are alternately epitaxially grown on the side of the second N-type semiconductor material layer 33a away from the back plate 1, that is, the second semiconductor layer 61 and the second doped semiconductor layer are alternately grown on the side of the second N-type semiconductor material layer 33a away from the back plate 1; and the second semiconductor layer 61 and the second doped semiconductor layer are both formed into multiple layers, for example, the number of layers of the second semiconductor layer 61 is greater than or equal to 10 and less than or equal to 50, and the number of layers of the second doped semiconductor layer is greater than or equal to 10 and less than or equal to 50; the multiple layers of second semiconductor layers 61 and the multiple layers of second doped semiconductor layers form the second filter original material layer, that is, the second filter original material layer includes the multiple layers of second semiconductor layers 61 and the multiple layers of second doped semiconductor layers that are alternately arranged.

[0186] The second doped semiconductor layer is GaN (gallium nitride) doped silicon with a doping concentration range of 1E19 to 1E22 cm -3 (10 19 ~10 22 cm -3 ), and the greater the doping concentration, the thinner the thickness.

[0187] The second doped semiconductor layer is electro-etched. Specifically, the second doped semiconductor layer is electro-etched through an oxalic acid solution, so that the second doped semiconductor layer forms a second porous semiconductor layer 62, and the second filter raw material layer forms a second filter material layer 6a. The electro-etching can be performed at room temperature, with the second doped semiconductor layer serving as the anode and the platinum foil serving as the counter electrode (cathode). Oxalic acid with a concentration of 0.25M (mol / L) is used as the electrolyte. The etching process is performed under a constant voltage mode. After etching, the substrate is rinsed with deionized water and dried by blowing in N2 (nitrogen).

[0188] The thickness of the second filter material layer 6 a is greater than or equal to 50 nanometers and less than or equal to 200 nanometers, so that the thickness of the subsequently formed second filter layer 6 is greater than or equal to 50 nanometers and less than or equal to 200 nanometers. For example, the thickness of the second filter layer 6 can be 55 nanometers, 60 nanometers, 65 nanometers, 70 nanometers, 75 nanometers, 80 nanometers, 85 nanometers, 90 nanometers, 95 nanometers, 100 nanometers, 105 nanometers, 110 nanometers, 115 nanometers, 120 nanometers, 125 nanometers, 130 nanometers, 135 nanometers, 140 nanometers, 145 nanometers, 150 nanometers, 155 nanometers, 160 nanometers, 165 nanometers, 170 nanometers, 175 nanometers, 180 nanometers, 185 nanometers, 190 nanometers, 195 nanometers, etc.

[0189] The second filter material layer 6a is formed during the process of forming the second light-emitting device 3, without requiring additional process steps, thus avoiding increased costs.

[0190] Then, as shown in Figures 29 to 31, the above structure is etched multiple times so that the first light-emitting device 2, the first filter layer 5, the second light-emitting device 3, the second filter layer 6, and the third light-emitting device 4 are stacked in sequence in a direction away from the backplane 1. In addition, a portion of the first N-type semiconductor layer 23 of the first light-emitting device 2 is exposed, a portion of the second P-type semiconductor layer 31 and the second N-type semiconductor layer 33 of the second light-emitting device 3 are exposed, and a portion of the third P-type semiconductor layer 41 and the third N-type semiconductor layer 43 of the third light-emitting device 4 are exposed. The specific structures of these film layers have been described in detail above and will not be repeated here.

[0191] 32 , an insulating layer 10 is formed, covering the light-emitting device formed above; and the insulating layer 10 is etched to form five vias 1001, which are connected one by one to the exposed portion of the second P-type semiconductor layer 31, the exposed portion of the third P-type semiconductor layer 41, the exposed portion of the first N-type semiconductor layer 23, the exposed portion of the second N-type semiconductor layer 33, and the third N-type semiconductor layer 43.

[0192] Finally, as shown in Figure 3, a connecting conductor material layer is formed on the side of the insulating layer 10 away from the back plate 1, and the connecting conductor material layer is etched to form an N-electrode connection part 111, a second P-electrode connection part 112 and a third P-electrode connection part 113. The specific structures of these connection parts have been described in detail above and will not be repeated here.

[0193] In some other example embodiments of the present disclosure, after the first light-emitting device material layer and the first filter material layer 5a are transferred to the back panel 1 and the base substrate 100 is removed, as shown in Figure 33, the first light-emitting device 2 material layer, the first filter material layer 5a, and the first buffer material layer 91a are etched to form the first light-emitting device 2, the first filter layer 5, and the first buffer layer 91, leaving only the first light-emitting device 2 and the first filter layer 5 on the side of the first P electrode 101 facing away from the back panel 1, so that the first light-emitting device 2 is connected to the first P electrode 101.

[0194] 34 , the first buffer layer 91 and the first filter layer 5 are etched to form via holes, which are connected to the first N-type semiconductor layer 23 .

[0195] As shown in Figure 35 , a first conductive material layer is formed on the side of the N-electrode 104, first buffer layer 91, second P-electrode 102, and third P-electrode 103 facing away from the backplate 1. The first conductive material layer is then etched to form a first connecting portion 121, a second connecting portion 122, a third connecting portion 123, and a fourth connecting portion 124 spaced apart from each other. The first connecting portion 121 is located on the side of the N-electrode 104 facing away from the backplate 1, the second connecting portion 122 is located on the side of the first buffer layer 91 facing away from the backplate 1, the third connecting portion 123 is located on the side of the second P-electrode 102 facing away from the backplate 1, and the fourth connecting portion 124 is located on the side of the third P-electrode 103 facing away from the backplate 1. Furthermore, the second connecting portion 122 is connected to the first N-type semiconductor layer 23 through vias in the first buffer layer 91 and the first filter layer 5. A first insulating isolation layer 151 is formed in the gaps between the first connecting portion 121, the second connecting portion 122, the third connecting portion 123, and the fourth connecting portion 124.

[0196] As shown in FIG36 , epitaxial growth is performed on the first connecting portion 121, the second connecting portion 122, the third connecting portion 123, and the fourth connecting portion 124, in sequence, on the side facing away from the backplate 1. The second filtering material layer is then electroetched to form the second filtering material layer 62a. The formation method is the same as in the previous exemplary embodiment and will not be repeated here.

[0197] As shown in Figure 37, the above-mentioned film layer is etched to form a second light-emitting device 3, a second filter layer 6, and a second buffer layer 92. The second light-emitting device 3 is formed on the side of the third connecting portion 123 away from the back plate 1, the second filter layer 6 is formed on the side of the second light-emitting device 3 away from the back plate 1, and the second buffer layer 92 is formed on the side of the second filter layer 6 away from the back plate 1; and vias are formed in the second buffer layer 92 and the second filter layer 6, and the vias are connected to the second N-type semiconductor layer 33.

[0198] A second conductive material layer is epitaxially grown on the side of the first connecting portion 121, the second connecting portion 122, the second buffer layer 92, and the fourth connecting portion 124 facing away from the backplate 1. The second conductive material layer is then etched to form the fifth connecting portion 131, the sixth connecting portion 132, the seventh connecting portion 133, and the eighth connecting portion 134, which are spaced apart from each other. The fifth connecting portion 131 is located on the side of the first connecting portion 121 facing away from the backplate 1, the sixth connecting portion 132 is located on the side of the second connecting portion 122 facing away from the backplate 1, the seventh connecting portion 133 is located on the side of the second buffer layer 92 facing away from the backplate 1, and the eighth connecting portion 134 is located on the side of the fourth connecting portion 124 facing away from the backplate 1. Furthermore, the seventh connecting portion 133 is connected to the second N-type semiconductor layer 33 through vias in the second buffer layer 92 and the second filter layer 6. A second insulating isolation layer 152 is formed in the gaps between the fifth connecting portion 131, the sixth connecting portion 132, the seventh connecting portion 133, and the eighth connecting portion 134.

[0199] As shown in Figure 10, the third P-type semiconductor material layer 41a, the third light-emitting material layer 42a, the third N-type semiconductor material layer 43a, the third filtering original material layer, and the third buffer material layer 93a are epitaxially grown in sequence on the side of the fifth connecting part 131, the sixth connecting part 132, the seventh connecting part 133 and the eighth connecting part 134 away from the back plate 1.

[0200] The third light filtering original material layer is formed as follows: the third semiconductor layer 71 and the third doped semiconductor layer are alternately epitaxially grown on the side of the third N-type semiconductor material layer 43a away from the back plate 1, that is, the third semiconductor layer 71 and the third doped semiconductor layer are alternately grown on the side of the third N-type semiconductor material layer 43a away from the back plate 1; and the third semiconductor layer 71 and the third doped semiconductor layer are both formed into multiple layers, for example, the number of layers of the third semiconductor layer 71 is greater than or equal to 10 and less than or equal to 50, and the number of layers of the third doped semiconductor layer is greater than or equal to 10 and less than or equal to 50; the multiple layers of third semiconductor layers 71 and the multiple layers of third doped semiconductor layers form the third light filtering original material layer, that is, the third light filtering original material layer includes the multiple layers of third semiconductor layers 71 and the multiple layers of third doped semiconductor layers that are alternately arranged.

[0201] The third doped semiconductor layer is GaN (gallium nitride) doped silicon with a doping concentration range of 1E19 to 1E22 cm -3 (10 19 ~10 22 cm -3 ), and the greater the doping concentration, the thinner the thickness.

[0202] The third doped semiconductor layer is electro-etched. Specifically, the third doped semiconductor layer is electro-etched through an oxalic acid solution, so that the third doped semiconductor layer forms a third porous semiconductor layer 72, and the third filter raw material layer forms a third filter material layer 7a. The electro-etching can be performed at room temperature, with the third doped semiconductor layer serving as the anode and the platinum foil serving as the counter electrode (cathode). Oxalic acid with a concentration of 0.25M (mol / L) is used as the electrolyte. The etching process is performed under a constant voltage mode. After etching, the substrate is rinsed with deionized water and dried by blowing in N2 (nitrogen).

[0203] The thickness of the third filter material layer 7a is greater than or equal to 50 nanometers and less than or equal to 200 nanometers, so that the thickness of the subsequently formed third filter layer 7 is greater than or equal to 50 nanometers and less than or equal to 200 nanometers. For example, the thickness of the third filter layer 7 can be 55 nanometers, 60 nanometers, 65 nanometers, 70 nanometers, 75 nanometers, 80 nanometers, 85 nanometers, 90 nanometers, 95 nanometers, 100 nanometers, 105 nanometers, 110 nanometers, 115 nanometers, 120 nanometers, 125 nanometers, 130 nanometers, 135 nanometers, 140 nanometers, 145 nanometers, 150 nanometers, 155 nanometers, 160 nanometers, 165 nanometers, 170 nanometers, 175 nanometers, 180 nanometers, 185 nanometers, 190 nanometers, 195 nanometers, etc.

[0204] The third filter material layer 7a is formed during the process of forming the third light-emitting device 4, without requiring additional process steps, thereby avoiding increased costs.

[0205] Then, the above-mentioned film layer is etched to form a third light-emitting device 4 and a third filter layer 7. The third light-emitting device 4 is formed on the side of the eighth connecting portion 134 away from the back plate 1, the third filter layer 7 is formed on the side of the third light-emitting device 4 away from the back plate 1, and the third buffer layer 93 is formed on the side of the third filter layer 7 away from the back plate 1; and vias are formed on the third buffer layer 93 and the third filter layer 7, and the vias are connected to the third N-type semiconductor layer 43.

[0206] A third conductor layer 14 is epitaxially grown on the side of the fifth connecting part 131, the sixth connecting part 132, the seventh connecting part 133 and the third buffer layer 93 facing away from the back plate 1. The third conductor layer 14 is connected to the third N-type semiconductor layer 43 through a via. The fourth connecting part 124, the fifth connecting part 131, the sixth connecting part 132 and the third N-type semiconductor layer 43 are electrically connected through the third conductor layer 14, so that the first N-type semiconductor layer 23 of the first light-emitting device 2, the second N-type semiconductor layer 33 of the second light-emitting device 3 and the third N-type semiconductor layer 43 of the third light-emitting device 4 are all electrically connected to the N electrode 104.

[0207] In some further example embodiments of the present disclosure, referring to Figures 38 to 42, for ease of understanding, the first filter layer 5, the second filter layer 6 and the third filter layer 7 are omitted in the figures, and only one first light-emitting device 2 is shown; the preparation method may further include: forming a light extraction layer group 8 on the light-emitting surface of at least one of the first light-emitting device 2, the second light-emitting device 3 and the third light-emitting device 4, and the refractive index of the light extraction layer group 8 is less than the refractive index of the first light-emitting device 2, the second light-emitting device 3 or the third light-emitting device 4, and greater than the refractive index of air.

[0208] Specifically, as shown in Figure 38 , a first N-type semiconductor layer 23, a first light-emitting layer 22, a first P-type semiconductor layer 21, and a current spreading layer 400 are sequentially epitaxially grown on one surface of a sapphire base layer 200. As shown in Figure 39 , the current spreading layer 400 is bonded to the temporary base layer 300 via an adhesive layer 500. As shown in Figure 40 , the sapphire base layer 200 is removed.

[0209] As shown in FIG41 , at least two layers of doping material layers 86 are sequentially formed on the light-emitting surface of at least one of the first light-emitting device 2, the second light-emitting device 3, and the third light-emitting device 4. For example, the doping material layer 86 may be formed on the light-emitting surface of any one of the first light-emitting device 2, the second light-emitting device 3, and the third light-emitting device 4, or on the light-emitting surfaces of any two of the first light-emitting device 2, the second light-emitting device 3, and the third light-emitting device 4. The doping material layer 86 may be formed on the light-emitting surfaces of all three of the first light-emitting device 2, the second light-emitting device 3, and the third light-emitting device 4. The number of layers of the doping material layer 86 may be two, three, or more. The doping material layer 86 is silicon-doped gallium nitride (GaN).

[0210] The doping concentration of the doping material layer 86 increases with the distance from the light emitting surface, that is, the farther the doping material layer 86 is from the light emitting surface, the higher the doping concentration. Specifically, taking the doping material layer 86 as an example with three layers, the doping concentrations from the air layer to the backplane 1 are 1e19-1e21cm -3 (10 19 ~10 21 cm -3 )、1e17-1e19cm -3 (10 17 ~10 19 cm -3 )、1e15-1e17cm -3 (10 15 ~10 17 cm -3 ).

[0211] As shown in Figure 42, the doping material layer 86 is electrochemically corroded so that the doping material layer 86 forms a porous structure layer 8a; specifically, the light-emitting device formed with the doping material layer 86 is immersed in an acidic solution (for example, an oxalic acid solution, whose concentration is about 1% to 10%) and an appropriate bias voltage (about 1V to 10V) is applied to form the doping material layer 86 into a porous structure layer 8a; since the higher the doping concentration, the more nano-scale pores are formed, the smaller the refractive index of the porous structure layer 8a, and therefore, the refractive index of the porous structure layer 8a decreases with increasing distance from the backplane 1.

[0212] Furthermore, when a recessed structure 84 is provided on the light extraction layer group 8, the light extraction layer group 8 needs to be etched to form the recessed structure 84. The specific structure of the recessed structure 84 has been described in detail above and will not be repeated here. The depth of the recessed structure 84 can be controlled by the etching time.

[0213] In addition, when a filling portion 85 is provided in the recessed structure 84, it is necessary to form a filling material layer on the side of the light extraction layer group 8 facing away from the back plate 1 after the recessed structure 84 is formed, and at least part of the filling material layer is formed in the recessed portion. The filling material layer is then etched to remove the filling material layer outside the recessed portion, and the filling material layer formed in the recessed portion forms the filling portion 85.

[0214] It should be noted that although the steps of the method for manufacturing a display panel in the present disclosure are described in a specific order in the accompanying drawings, this does not require or imply that the steps must be performed in this specific order, or that all steps must be performed to achieve the desired results. Additionally or alternatively, certain steps may be omitted, multiple steps may be combined into one step, and / or one step may be broken down into multiple steps.

[0215] Based on the same inventive concept, an exemplary embodiment of the present disclosure provides a display device, which may include any of the display panels described above. The specific structure of the display panel has been described in detail above, so it will not be repeated here.

[0216] The specific type of the display device is not particularly limited, and any type of display device commonly used in the field can be used, such as mobile devices such as mobile phones, wearable devices such as watches, VR devices, etc. Those skilled in the art can make corresponding choices based on the specific purpose of the display device, which will not be elaborated here.

[0217] It should be noted that, in addition to the display panel, the display device also includes other necessary components and components, such as the housing, circuit board, power cord, etc. Taking the display as an example, technical personnel in this field can make corresponding supplements based on the specific usage requirements of the display device, which will not be repeated here.

[0218] Compared with the prior art, the beneficial effects of the display device provided by the exemplary embodiment of the present invention are the same as the beneficial effects of the display panel provided by the above exemplary embodiment, and are not described in detail here.

[0219] Those skilled in the art will readily appreciate other embodiments of the present disclosure after considering the specification and practicing the invention disclosed herein. This application is intended to cover any variations, uses, or adaptations of the present disclosure that follow the general principles of the present disclosure and include common knowledge or customary techniques in the art not disclosed herein. The description and examples are to be considered as exemplary only, with the true scope and spirit of the present disclosure being indicated by the appended claims.

Claims

1. A display panel, wherein: include: Back panel; A first light-emitting device, a second light-emitting device, and a third light-emitting device are arranged on the same side of the back plate, the distance between the second light-emitting device and the back plate is greater than the distance between the first light-emitting device and the back plate, the distance between the third light-emitting device and the back plate is greater than the distance between the second light-emitting device and the back plate, the first light-emitting device emits light of a first color, the second light-emitting device emits light of a second color, and the third light-emitting device emits light of a third color; a first filter layer, provided on a side of the first light-emitting device facing away from the back plate, the first filter layer only transmitting light of the first color; The second filter layer is provided on a side of the second light emitting device away from the back plate. The second filter layer can only transmit light of the second color, or the second filter layer can only transmit light of the first color and the second color.

2. The display panel according to claim 1, wherein The display panel further includes: The third filter layer is arranged on a side of the third light emitting device away from the back plate, and the third filter layer can only transmit the light of the third color.

3. The display panel according to claim 2, wherein: The third filter layer includes multiple third semiconductor layers and multiple third porous semiconductor layers, and the third semiconductor layers and the third porous semiconductor layers are alternately arranged.

4. The display panel according to claim 1, wherein: The first filter layer includes multiple layers of first semiconductor layers and multiple layers of first porous semiconductor layers, and the first semiconductor layers and the first porous semiconductor layers are alternately arranged.

5. The display panel according to claim 1, wherein: The second filter layer includes multiple second semiconductor layers and multiple second porous semiconductor layers, and the second semiconductor layers and the second porous semiconductor layers are alternately arranged.

6. The display panel according to any one of claims 1, 4 and 5, wherein: When the second light emitting device is stacked on the side of the first light emitting device away from the back plate, and the third light emitting device is stacked on the side of the second light emitting device away from the back plate, the second filter layer can only transmit light of the first color and the second color.

7. The display panel according to claim 6, wherein: The ratio of the thickness of the first filter layer to the thickness of the second filter layer is greater than or equal to 1.1 and less than or equal to 1.

3.

8. The display panel according to any one of claims 2 to 5, wherein: When the orthographic projection of the first light emitting device on the back panel, the orthographic projection of the second light emitting device on the back panel, and the orthographic projection of the third light emitting device on the back panel do not overlap, the second filter layer can only transmit light of the second color.

9. The display panel according to claim 8, wherein: The ratio of the thickness of the second filter layer to the thickness of the first filter layer is greater than or equal to 1.5 and less than or equal to 2.5, and the ratio of the thickness of the third filter layer to the thickness of the first filter layer is greater than or equal to 1.1 and less than or equal to 1.

5.

10. The display panel according to any one of claims 1 to 5, wherein: The display panel further includes: The light extraction layer group is arranged between the light emitting surface of at least one of the first light emitting device, the second light emitting device and the third light emitting device and the air layer. The refractive index of the light extraction layer group is smaller than the refractive index of the film layer bonded to the light extraction layer, and is greater than the refractive index of air.

11. The display panel according to claim 10, wherein: The light extraction layer group includes at least two porous structure layers, and the refractive index of the porous structure layer decreases as the distance from the back plate increases.

12. The display panel according to claim 10, wherein: The light extraction layer group includes at least two porous structure layers, and the total volume of pores per unit volume of the porous structure layer increases with increasing distance from the back plate.

13. The display panel according to claim 10, wherein: A plurality of recessed structures are provided on the light extraction layer group.

14. The display panel according to claim 13, wherein: The plurality of recessed structures are arranged periodically, or the plurality of recessed structures are arranged aperiodically.

15. The display panel according to claim 13, wherein: The recessed structure is a via hole penetrating the light extraction layer group, or the recessed structure is a blind hole that does not penetrate the light extraction layer group.

16. The display panel according to claim 13, wherein: The display panel further includes: A filling portion is provided in the recessed structure, wherein the refractive index of the filling portion is smaller than that of the light taking portion. The refractive index of the output layer group.

17. A method for preparing a display panel, wherein: include: providing a substrate; forming a first filter material layer and a first light emitting device material layer on one side of the base substrate; transferring the first light emitting device material layer and the first filter material layer to a backplane; Etching the first light-emitting device material layer and the first filter material layer to form a first light-emitting device and a first filter layer, sequentially forming a second light-emitting device and a second filter layer on the side of the backplane where the first light-emitting device is formed, and forming a third light-emitting device on the side of the backplane where the first light-emitting device is formed; In which, the distance between the second light-emitting device and the backplane is greater than the distance between the first light-emitting device and the backplane, the distance between the third light-emitting device and the backplane is greater than the distance between the second light-emitting device and the backplane, the first light-emitting device emits light of a first color, the second light-emitting device emits light of a second color, and the third light-emitting device emits light of a third color. The first filter layer can only transmit light of the first color, the second filter layer can only transmit light of the second color, or the second filter layer can only transmit light of the first color and the second color.

18. The method for manufacturing a display panel according to claim 17, wherein: A first filter material layer and a first light emitting device material layer are formed on one side of the base substrate, comprising: forming a first buffer material layer on one side of the base substrate; A first semiconductor layer and a first doped semiconductor layer are alternately formed on a side of the first buffer material layer facing away from the base substrate, and the first semiconductor layer and the first doped semiconductor layer are each formed into multiple layers, and the multiple layers of the first semiconductor layer and the multiple layers of the first doped semiconductor layer form a first filter original material layer; forming a first light emitting device material layer on a side of the first light filtering original material layer away from the base substrate; The first doped semiconductor layer is electro-etched to form a first porous semiconductor layer, so that the first filter original material layer forms the first filter material layer.

19. The method for manufacturing a display panel according to claim 17, wherein: The preparation method further comprises: A third filter layer is formed on a side of the third light emitting device facing away from the back plate, and the third filter layer can only transmit light of the third color.

20. The method for manufacturing a display panel according to claim 17, wherein: The preparation method further comprises: A light extraction layer group is formed on the light emitting surface of at least one of the first light emitting device, the second light emitting device and the third light emitting device, and the refractive index of the light extraction layer group is smaller than the refractive index of the film layer bonded to the light extraction layer group and greater than the refractive index of air.

21. The method for manufacturing a display panel according to claim 20, wherein: A light extraction layer group is formed on a light emitting surface of at least one of the first light emitting device, the second light emitting device, and the third light emitting device, comprising: At least two doping material layers are sequentially formed on the light-emitting surface of at least one of the first light-emitting device, the second light-emitting device, and the third light-emitting device, wherein the doping concentration of the doping material layer increases with increasing distance from the light-emitting surface; The doping material layer is electrochemically etched to form a porous structure layer from the doping material layer, wherein the refractive index of the porous structure layer decreases as the distance from the back plate increases.

22. A display device, wherein: include: The display panel according to any one of claims 1 to 16.

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