Parameterization instruction selection method and related apparatus

Abstract

A parameterization instruction selection method, applied to optimizing a compilation process executed by a compiler. In the parameterization instruction selection method, during compiling, corresponding machine instruction sets are pre-generated for instructions in a code to be compiled, and one or more corresponding machine instructions that can be selected by each instruction in the code during compiling are indicated on the basis of the machine instruction sets, so that a compiler does not select a default machine instruction for the instruction in the code any more, and the compiler is guided to select different machine instruction combinations during compiling, so as to obtain a plurality of different target files; finally, a target file having optimal execution performance is selected by executing the plurality of target files. Thus, the flexibility of an instruction selection process is improved, and the target file having higher execution performance is obtained by means of compiling.

Description

A parameterized instruction selection method and related device

[0001] This application claims priority to the Chinese patent application filed with the State Intellectual Property Office on February 29, 2024, with application number 202410234625.8 and application name “A parameterized instruction selection method and related device”, the entire contents of which are incorporated by reference into this application. Technical Field

[0002] The present application relates to the field of computer technology, and in particular to a parameterized instruction selection method and related devices. Background Art

[0003] Compilation is the process of translating source code written in a high-level language into a target file consisting of machine language. In simple terms, compilation is the process of converting a high-level language into a binary language that a computer can understand.

[0004] Generally speaking, the compilation process is performed by a compiler. The compiler first compiles the source code into intermediate code and then converts the instructions in the intermediate code into machine instructions, resulting in the target file. In most cases, a single instruction in the intermediate code can be implemented using different machine instructions. Therefore, the conversion of instructions from the intermediate code into machine instructions often involves the process of instruction selection.

[0005] However, current compilers usually have a fixed instruction selection method, that is, for a certain type of instruction in the intermediate code, they often select the default machine instruction for the instruction of that type, making the instruction selection process relatively fixed, which easily leads to poor execution performance of the final compiled target file.

[0006] Summary of the Invention

[0007] The present application provides a parameterized instruction selection method that can guide the compiler to select more optimal machine instructions during the compilation process, and then compile a target file with higher execution performance.

[0008] A first aspect of the present application provides a parameterized instruction selection method, which is applied to the process of a compiler compiling code. In this method, first code is obtained. The first code is code that the compiler needs to compile, for example, intermediate code obtained after the compiler performs a preliminary compilation of source code. In addition, the first code includes multiple instructions, and the compiler needs to further compile the first code to obtain a target file.

[0009] Then, an instruction table is generated based on the multiple instructions in the first code. The instruction table includes multiple machine instruction sets corresponding to the multiple instructions. During compilation, the multiple instructions select machine instructions from the corresponding machine instruction sets. That is, each of the multiple machine instruction sets has a corresponding instruction in the multiple instructions, i.e., the multiple machine instruction sets correspond one-to-one to the multiple instructions in the first code. Each machine instruction set indicates one or more machine instructions that can be selected by the corresponding instruction in the first code during compilation. In other words, for the multiple instructions in the first code, a machine instruction set can be generated for each of some or all of the instructions in the first code, and the machine instruction set indicates the machine instructions that can be selected by the instruction during compilation. The machine instruction set can include one or more machine instructions. If a machine instruction set includes only one machine instruction, then the instruction corresponding to the machine instruction set can only have one corresponding machine instruction during compilation; if a machine instruction set includes multiple machine instructions, then the instruction corresponding to the machine instruction set can select any one of multiple machine instructions during compilation.

[0010] Next, based on the instruction table, multiple rounds of machine instruction selection are performed for multiple instructions to obtain multiple target files. These target files are obtained by selecting different machine instruction combinations for the multiple instructions from multiple machine instruction sets. In other words, based on the instruction table, corresponding machine instructions can be selected for multiple instructions in the first code to obtain multiple target files. These target files are obtained by selecting different machine instruction combinations for the multiple instructions from multiple machine instruction sets. Each round of machine instruction selection selects a machine instruction from the corresponding machine instruction set for each of the multiple instructions, so that after each round of machine instruction selection, a target file consisting of multiple machine instructions is obtained. Because the instructions in the first code have corresponding machine instruction sets, and the machine instruction sets may include multiple selectable machine instructions, when generating each target file, any one of the machine instructions can be selected from the machine instruction set corresponding to the instruction in the first code. Thus, by selecting different machine instruction combinations from the machine instruction set for the instructions in the first code that correspond to the machine instruction set including multiple machine instructions, multiple different target files can be obtained. In other words, a target file is equivalent to a machine instruction combination.

[0011] For example, assuming that the first code includes instructions A and B, and the machine instruction set corresponding to instruction A includes machine instruction 1 and machine instruction 2, and the machine instruction set corresponding to instruction B includes machine instruction 3 and machine instruction 4. In this way, when generating target file 1, the corresponding machine instruction 1 can be selected for instruction A, and the corresponding machine instruction 3 can be selected for instruction B, that is, the machine instruction combination of target file 1 is machine instruction 1 + machine instruction 3; when generating target file 2, the corresponding machine instruction 2 can be selected for instruction A, and the corresponding machine instruction 3 can be selected for instruction B, that is, the machine instruction combination of target file 2 is machine instruction 2 + machine instruction 3; when generating target file 3, the corresponding machine instruction 1 can be selected for instruction A, and the corresponding machine instruction 4 can be selected for instruction B, that is, the machine instruction combination of target file 3 is machine instruction 1 + machine instruction 4; when generating target file 4, the corresponding machine instruction 2 can be selected for instruction A, and the corresponding machine instruction 4 can be selected for instruction B, that is, the machine instruction combination of target file 1 is machine instruction 2 + machine instruction 4.

[0012] Finally, a target file with the highest execution performance is selected from the multiple target files. For example, the multiple target files are executed separately, and based on the execution performance of the multiple target files, one or more target files with the highest execution performance are selected. The execution performance of the target file can, for example, refer to performance information such as the startup speed or response speed of the target file.

[0013] In this solution, during the compilation process, a corresponding machine instruction set is generated in advance for the instructions in the code to be compiled, so as to indicate the corresponding one or more machine instructions that can be selected for each instruction in the code during compilation based on the machine instruction set, so that the compiler no longer selects the default machine instruction for the instruction in the code, and guides the compiler to select different machine instruction combinations during the compilation process, thereby obtaining multiple different target files, and finally selecting the target file with the best execution performance by executing multiple target files, thereby improving the flexibility of the instruction selection process, and then compiling to obtain a target file with higher execution performance.

[0014] Since the traditional compilation process is a closed process, the compiler will compile the code according to the established compilation process, which results in the same code often only compiling to a fixed target file. In addition, in the traditional compilation process, the compiler often only selects the default machine instruction for instructions in the code that can select different machine instructions as the compilation result, resulting in an inflexible method for selecting machine instructions and difficulty in selecting the optimal machine instruction. Because, in many cases, the default machine instruction selected by the compiler is not the optimal machine instruction. Then, in this solution, by generating multiple corresponding machine instruction sets for the code, it is equivalent to providing an external interface for the compilation process, allowing the compiler to arbitrarily select corresponding machine instructions for instructions corresponding to multiple machine instructions, thereby obtaining different machine instruction combinations, and finally determining the performance of multiple different machine instruction combinations by executing the target file, and determining one or more machine instruction combinations (i.e., target files) with the best execution performance.

[0015] In one possible implementation, the method may also generate multiple instruction configuration files based on multiple instructions, each instruction configuration file including at least one configuration information corresponding to a single instruction, wherein the configuration information indicates conditions that the corresponding instruction must meet when selecting a machine instruction. Multiple rounds of machine instruction selection are then performed for the multiple instructions based on the multiple instruction configuration files to obtain the multiple target files, where the multiple target files correspond one-to-one to the multiple instruction configuration files.

[0016] That is to say, a plurality of instruction configuration files are first generated based on a plurality of instructions in the first code. Among them, each of the plurality of instruction configuration files is independently generated based on the first code, and the plurality of instruction configuration files include at least one configuration information, that is, each instruction configuration file generates configuration information for at least one instruction in the first code. Among the plurality of instruction configuration files, different instruction configuration files configure different configuration information for the plurality of instructions. Specifically, each instruction configuration file includes at least one configuration information, and each configuration information in the at least one configuration information has a corresponding instruction in a plurality of instructions (that is, each instruction that needs to generate configuration information has a unique corresponding configuration information), and each configuration information is used to indicate the conditions that need to be met when selecting the corresponding machine instruction for the instruction in the first code. That is, the configuration information is equivalent to the machine instruction selection reference information corresponding to the instruction in the first code, ensuring that the configuration information needs to be referenced to complete the selection process when selecting the machine instruction for the instruction in the first code.

[0017] In this way, based on the multiple instruction configuration files, corresponding machine instructions can be selected for the multiple instructions in the first code, thereby obtaining multiple target files corresponding to the multiple instruction configuration files. That is, there is a one-to-one correspondence between the multiple instruction configuration files and the multiple target files, and the multiple target files are obtained based on different instruction configuration files.

[0018] Finally, the plurality of target files are executed respectively, and one or more target files with the highest execution performance are selected based on the execution performance of the plurality of target files. The execution performance of the target file may refer to performance information such as the startup speed and response speed of the target file.

[0019] In this solution, by generating different configuration information combinations (i.e., instruction configuration files) for the instructions in the same code, different conditions can be specified for the instructions in the code when selecting the corresponding machine instructions, and thus different target files can be compiled based on the same code. In this way, by comparing the execution performance between different target files, the target file with the best execution performance can be effectively determined, which is conducive to compiling the best target file when it is difficult to determine the best configuration information for each instruction in the code. In addition, by generating multiple independent instruction configuration files, isolation between configuration information combinations can be achieved, and a separate backup of each configuration information combination can be achieved. In this way, when generating multiple target files, multiple target files can be generated in parallel based on multiple instruction configuration files, thereby improving the generation efficiency of the target files; and after finally selecting the target file with the best performance, it is possible to trace back to the corresponding instruction configuration file, thereby facilitating further analysis of the configuration information (for example, studying what kind of configuration information makes it easy to select the best machine instruction).

[0020] In one possible implementation, at least one configuration information includes one or more of the following conditions: the type of functional unit used by the machine instruction, whether the machine instruction updates the status register, the highest number of bits of the machine instruction, the addressing mode of the machine instruction, or whether the machine instruction contains an immediate value.

[0021] That is, when selecting a machine instruction for an instruction with corresponding configuration information in the first code, it is necessary to ensure that the selected machine instruction satisfies one or more of the above conditions indicated by the configuration information.

[0022] In one possible implementation, in the process of generating multiple instruction configuration files based on multiple instructions in the first code, configuration information for each of the multiple instruction configuration files may be generated sequentially based on the execution order of the multiple instructions in the first code and the context of the instructions. The context of the instructions may include the execution status of the instructions and / or the configuration information generated for the instructions. Furthermore, the order in which the configuration information in the instruction configuration files is generated is related to the execution order of the instructions corresponding to the configuration information.

[0023] In other words, the earlier the instruction corresponding to the configuration information is executed in the first code, the earlier the configuration information is generated in the instruction configuration file. Furthermore, when generating configuration information corresponding to an instruction, in addition to analyzing the instruction itself, the context of the instruction can also be analyzed to generate the optimal configuration information.

[0024] In this solution, the configuration information corresponding to the instructions is generated in sequence based on the execution order of the instructions in the code and the context of the instructions. This allows the influence of the instruction context on the selection of machine instructions to be taken into account during the generation of the configuration information, so as to generate configuration information that can select the optimal machine instruction and ensure the quality of the target file finally generated based on the configuration information.

[0025] In one possible implementation, in the process of sequentially generating the configuration information in the instruction configuration file, an instruction configuration template can be first generated based on the execution order of multiple instructions in the first code. The instruction configuration template is used to indicate the target instruction for which the configuration information needs to be generated among the multiple instructions and the position of the target instruction among the multiple instructions. The target instruction may include one or more instructions, and the number of instructions included in the target instruction is the same as the number of configuration information in the instruction configuration file. That is, the instruction configuration template is used to clarify the instructions in the first code for which the configuration information needs to be generated and the relative positions of these instructions in the first code.

[0026] Then, based on the context of the target instruction, corresponding configuration information is sequentially filled in for the target instruction in the instruction configuration template to obtain a first instruction configuration file, wherein the context of the target instruction is obtained based on the position of the target instruction in the plurality of instructions. The plurality of instruction configuration files include the first instruction configuration file.

[0027] In this solution, by pre-generating an instruction configuration template based on the execution order of instructions in the code, the instructions for which configuration information needs to be generated in the code and the location of these instructions in the code can be implemented based on the instruction configuration template. In this way, when subsequently generating configuration information for the instructions in the code, the construction of the instruction configuration part can be completed by simply filling the instruction configuration template with the configuration information based on the instructions of the instruction configuration template; moreover, an instruction configuration template can be reused to generate multiple different instruction configuration files, improving the efficiency of generating instruction configuration files.

[0028] In one possible implementation, when the configuration information in the first instruction configuration file is used to indicate the type of functional unit used by a machine instruction, the target instruction for which the configuration information is to be generated supports compilation as a machine instruction that uses multiple functional units. That is, only when the instruction in the first code itself supports being compiled as a machine instruction that uses multiple functional units does the instruction need to specify the type of functional unit used by the machine instruction during the instruction selection phase. If the instruction in the first code itself does not support being compiled as a machine instruction that uses multiple functional units, then the instruction does not need to specify the type of functional unit used by the machine instruction during the instruction selection phase.

[0029] In this solution, the target instructions in the code for which configuration information needs to be generated are determined from the perspective of the type of configuration information that needs to be generated for the instructions. This ensures that the configuration information generated for the target instructions can indeed affect the process of selecting machine instructions for the target instructions, ensuring that the configuration information generated for the target instructions is valid and avoiding the generation of invalid configuration information.

[0030] In a possible implementation, the multiple instructions include a first instruction and a second instruction, and both the first instruction and the second instruction support being compiled into machine instructions that use the first functional unit or the second functional unit.

[0031] In the process of generating corresponding configuration information for an instruction in the first code, first configuration information corresponding to the first instruction may be generated based on the first instruction and the context of the first instruction. The first configuration information is used to indicate that the machine instruction selected for the first instruction uses the first functional unit, and the context of the first instruction is used to indicate that the first functional unit and the second functional unit are not occupied. In other words, based on the context of the first instruction, it can be determined that neither the first functional unit nor the second functional unit is occupied by an instruction. Therefore, a machine instruction using the first functional unit or the second functional unit can be selected for the first instruction. For example, in this embodiment, a machine instruction using the first functional unit is selected by default for the first instruction.

[0032] Then, based on the second instruction and the context of the second instruction, corresponding second configuration information is generated for the second instruction, the second configuration information is used to indicate that the machine instruction selected for the second instruction uses the second functional unit, and the context of the second instruction is used to indicate that the first instruction executed before the second instruction has occupied the first functional unit.

[0033] That is to say, when it is determined based on the context of the second instruction that other instructions before the execution of the second instruction have occupied the first functional unit, machine instructions of the unoccupied second functional unit can be selected for the second instruction, thereby avoiding selecting machine instructions of the same functional unit for both the first instruction and the second instruction, so as to avoid the situation where subsequent instructions wait for execution.

[0034] In this solution, for instructions in the code that can be compiled into machine instructions using different functional units, configuration information is generated for the instructions by combining the context of the instructions, so that machine instructions using different functional units can be selected for different instructions as much as possible, avoiding the situation where instructions wait for execution when different machine instructions are executed by the same functional unit, and improving the execution speed of the compiled target file.

[0035] A second aspect of the present application provides a parameterized instruction selection device, including: an acquisition module, used to acquire a first code, the first code including multiple instructions; a processing module, used to generate multiple machine instruction sets corresponding to the multiple instructions based on the multiple instructions, the multiple instructions are used to select machine instructions for compilation from the corresponding machine instruction sets; the processing module is also used to perform multiple rounds of machine instruction selection for the multiple instructions to obtain multiple target files, the multiple target files are obtained by selecting different machine instruction combinations for the multiple instructions from the multiple machine instruction sets; the processing module is also used to select the target file with the highest execution performance from the multiple target files.

[0036] In one possible implementation, the processing module is further used to: generate multiple instruction configuration files based on multiple instructions, each instruction configuration file includes at least one configuration information corresponding to a single instruction, and the configuration information is used to indicate the conditions that the corresponding instruction needs to meet when selecting a machine instruction; perform multiple rounds of machine instruction selection for multiple instructions based on the multiple instruction configuration files to obtain multiple target files, and the multiple target files correspond one-to-one to the multiple instruction configuration files.

[0037] In one possible implementation, at least one configuration information includes one or more of the following conditions: the type of functional unit used by the machine instruction, whether the machine instruction updates the status register, the highest number of bits of the machine instruction, the addressing mode of the machine instruction, or whether the machine instruction contains an immediate value.

[0038] In a possible implementation, the processing module is further configured to generate configuration information in multiple instruction configuration files based on the execution order of multiple instructions in the first code and the context of the instructions.

[0039] In one possible implementation, the processing module is further used to: generate an instruction configuration template based on the execution order of multiple instructions in the first code, the instruction configuration template is used to indicate the target instruction for which configuration information needs to be generated among the multiple instructions and the position of the target instruction among the multiple instructions; based on the context of the target instruction, fill in the corresponding configuration information for the target instruction in the instruction configuration template in sequence to obtain a first instruction configuration file, wherein the context of the target instruction is obtained based on the position of the target instruction among the multiple instructions, and the multiple instruction configuration files include the first instruction configuration file.

[0040] In a possible implementation, when the configuration information in the instruction configuration file is used to indicate the type of functional unit used by the machine instruction, the target instruction for which the configuration information is to be generated supports compilation into a machine instruction that uses multiple functional units.

[0041] In one possible implementation, the multiple instructions include a first instruction and a second instruction, both of which support compilation into machine instructions that use a first functional unit or a second functional unit; the processing module is further used to: generate corresponding first configuration information for the first instruction based on the first instruction and the context of the first instruction, the first configuration information being used to indicate that the machine instruction selected for the first instruction uses the first functional unit, and the context of the first instruction is used to indicate that the first functional unit and the second functional unit are not occupied; generate corresponding second configuration information for the second instruction based on the second instruction and the context of the second instruction, the second configuration information being used to indicate that the machine instruction selected for the second instruction uses the second functional unit, and the context of the second instruction is used to indicate that the first instruction executed before the second instruction has occupied the first functional unit.

[0042] In a possible implementation, the first code is an intermediate code.

[0043] A third aspect of the present application provides a parameterized instruction selection device, which may include a processor coupled to a memory, wherein the memory stores program instructions. When the program instructions stored in the memory are executed by the processor, the method of the first aspect or any implementation of the first aspect is implemented. For details of the steps in each possible implementation of the first aspect executed by the processor, please refer to the first aspect and will not be repeated here.

[0044] In a fourth aspect, the present application provides a computer-readable storage medium, in which a computer program is stored. When the computer-readable storage medium is run on a computer, the computer executes the method of any implementation of the first aspect.

[0045] A fifth aspect of the present application provides a circuit system, the circuit system including a processing circuit, and the processing circuit is configured to execute a method of any implementation manner of the above-mentioned first aspect.

[0046] In a sixth aspect, the present application provides a computer program product, which, when executed on a computer, enables the computer to execute the method of any implementation manner of the first aspect.

[0047] The seventh aspect of the present application provides a chip system, which includes a processor for supporting a server or a feature screening device to implement the functions involved in any implementation of the first aspect, for example, processing the data and / or information involved in the above method. In one possible design, the chip system also includes a memory for storing program instructions and data necessary for the server or feature screening device. The chip system can be composed of a chip, or it can include a chip and other discrete devices.

[0048] The beneficial effects of the second to seventh aspects mentioned above can be referred to the introduction of the first aspect mentioned above, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0049] FIG1 is a schematic structural diagram of an electronic device 101 provided in an embodiment of the present application;

[0050] FIG2 is a flow chart of a parameterized instruction selection method provided in an embodiment of the present application;

[0051] FIG3 is a schematic diagram of an application flow of a parameterized instruction selection method provided in an embodiment of the present application;

[0052] FIG4 is a schematic diagram of an execution flow of a parameterized instruction selection method provided in an embodiment of the present application in an actual application process;

[0053] FIG5 is a schematic diagram of establishing a mapping relationship between instructions and indexes for a function in an intermediate code according to an embodiment of the present application;

[0054] FIG6 is a schematic diagram of an embodiment of the present application providing a method for instantiating an instruction configuration template to generate different instruction configuration files;

[0055] FIG7 is a schematic diagram of generating a target file based on an instruction configuration file according to an embodiment of the present application;

[0056] FIG8 is a schematic diagram of generating an instruction configuration table provided in an embodiment of the present application;

[0057] FIG9 is a schematic diagram of a process for instantiating an instruction configuration template according to an embodiment of the present application;

[0058] FIG10 is a schematic diagram of a parameterized instruction selection process according to an embodiment of the present application;

[0059] FIG11 is a schematic diagram of the structure of a parameterized instruction selection device provided in an embodiment of the present application;

[0060] FIG12 is a schematic structural diagram of an execution device provided in an embodiment of the present application;

[0061] FIG13 is a schematic diagram of the structure of a computer-readable storage medium provided in an embodiment of the present application. DETAILED DESCRIPTION

[0062] In order to make the purpose, technical solutions and advantages of this application more clear, the embodiments of this application are described below in conjunction with the accompanying drawings. Obviously, the described embodiments are only embodiments of a part of this application, rather than all embodiments. It is known to those skilled in the art that with the emergence of new application scenarios, the technical solutions provided in the embodiments of this application are also applicable to similar technical problems.

[0063] The terms "first", "second", etc. in the specification and claims of this application and the above-mentioned drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that the descriptions used in this way can be interchangeable where appropriate so that the embodiments can be implemented in a sequence other than that illustrated or described in this application. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or modules is not necessarily limited to those steps or modules clearly listed, but may include other steps or modules that are not clearly listed or that are inherent to these processes, methods, products or devices. The naming or numbering of steps in this application does not mean that the steps in the method flow must be executed in the time / logical sequence indicated by the naming or numbering. The named or numbered process steps can change the execution order according to the technical purpose to be achieved, as long as the same or similar technical effects can be achieved.

[0064] The division of units in this application is a logical division. In actual application, there may be other division methods. For example, multiple units can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the coupling or direct coupling or communication connection between each other shown or discussed can be through some interfaces, and the indirect coupling or communication connection between units can be electrical or other similar forms, which are not limited in this application. Moreover, the units or sub-units described as separate components may or may not be physically separated, may or may not be physical units, or may be distributed into multiple circuit units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of this application.

[0065] To facilitate understanding, some technical terms involved in the embodiments of this application are first introduced below.

[0066] (1) Source code

[0067] Source code (also known as source program) refers to an uncompiled text file written in a specific programming language. It is a series of human-readable computer language instructions. In modern programming languages, source code can be in the form of books or tapes, but the most common format is a text file. This typical format is used to compile computer programs. The ultimate goal of computer source code is to translate human-readable text into binary instructions that a computer can execute. This process is called compilation and is accomplished by a compiler.

[0068] (2) Compilation

[0069] Compilation is the process of converting source code into an executable file using a compiler. Simply put, compilation converts source code written in a high-level language into binary system that computers can understand. Since computers only understand 1s and 0s, the compiler essentially converts the familiar language into binary system.

[0070] Generally speaking, the process of a compiler translating a source code into an executable file is divided into five stages: lexical analysis; syntax analysis; semantic analysis and intermediate code generation; code optimization; and target code generation.

[0071] (3) Intermediate code

[0072] Intermediate code is a syntax-oriented internal representation of a source program that is easily translated into a target program. Its understandability and ease of generating target code are somewhere between the source and target languages. Common intermediate languages ​​include Reverse Polish Notation, Quaternary Notation, Triple Notation, and Tree Notation.

[0073] (4) Target file

[0074] The file generated by the compiler after compiling the source code is called an object file. Generally speaking, an object file is composed of machine instructions that can be directly understood by the computer.

[0075] (5) Machine instructions

[0076] Machine instructions are instructions that the central processing unit (CPU) can directly recognize and execute. They are represented by binary code. Machine instructions typically consist of two parts: an opcode and an operand. The opcode specifies the operation to be performed by the instruction, i.e., its function. The operand indicates the objects involved in the operation and the location where the result of the operation is stored.

[0077] (6) Instruction selection

[0078] Instruction selection is an important step in the compilation process, which is mainly used to convert intermediate code into machine instructions, that is, to select the corresponding machine instructions for the instructions in the intermediate code.

[0079] During the source code compilation process, the compiler first compiles the source code into intermediate code, then converts the instructions in the intermediate code into machine instructions, resulting in the target file. Because a single instruction in the intermediate code can often be implemented using different machine instructions, the conversion of the intermediate code into machine instructions typically involves an instruction selection process. Furthermore, the quality of the machine instructions selected for the intermediate code during the conversion process often affects the quality of the resulting target file.

[0080] However, current compilers usually have a fixed instruction selection method, that is, for a certain type of instruction in the intermediate code, the default machine instruction will often be selected for the instruction of that type, making the instruction selection process relatively fixed, which can easily lead to poor execution performance of the target file finally compiled (that is, obtaining a target file of poor quality), such as slow startup speed or response speed when the target file is running.

[0081] Based on this, this embodiment provides a parameterized instruction selection method. During the compilation process, an instruction configuration file is generated in advance for the code to be compiled, so as to indicate the conditions that the instructions in the code must meet when selecting the corresponding machine instructions based on the configuration information in the instruction configuration file, thereby limiting the range of machine instructions that can be selected by the instructions in the code during the code compilation process, so that the compiler no longer selects the default machine instructions for the instructions in the code, guiding the compiler to select better machine instructions during the compilation process, improving the flexibility of the instruction selection process, and then compiling a target file with higher execution performance.

[0082] The parameterized instruction selection method provided in the embodiments of the present application can be applied to electronic devices deployed with a compiler. For example, the electronic devices can be servers, mobile phones, personal computers (PCs), laptops, tablet computers, etc.

[0083] Please refer to Figure 1, which is a schematic diagram of the structure of an electronic device 101 provided in an embodiment of the present application. As shown in Figure 1, electronic device 101 includes a processor 103, which is coupled to a system bus 105. Processor 103 can be one or more processors, each of which can include one or more processor cores. A display adapter (video adapter) 107 can drive a display 109, which is coupled to system bus 105. System bus 105 is coupled to an input / output (I / O) bus via a bus bridge 111. An I / O interface 115 is coupled to the I / O bus. The I / O interface 115 communicates with various I / O devices, such as an input device 117 (e.g., a touch screen), an external memory 121 (e.g., a hard disk, floppy disk, optical disk, or USB flash drive), a multimedia interface, etc., a transceiver 123 (capable of sending and / or receiving radio communication signals), a camera 155 (capable of capturing still and dynamic digital video images), and an external USB port 125. Optionally, the interface connected to the I / O interface 115 may be a USB interface.

[0084] The processor 103 may be any conventional processor, including a reduced instruction set computing (RISC) processor, a complex instruction set computing (CISC) processor, or a combination thereof. Alternatively, the processor may be a dedicated device such as an ASIC.

[0085] Electronic device 101 can communicate with software deployment server 149 via network interface 129. Exemplarily, network interface 129 is a hardware network interface, such as a network card. Network 127 can be an external network, such as the Internet, or an internal network, such as Ethernet or a virtual private network (VPN). Alternatively, network 127 can be a wireless network, such as a WiFi network or a cellular network.

[0086] The hard drive interface 131 is coupled to the system bus 105. The hard drive interface is connected to the hard drive 133. The internal memory 135 is coupled to the system bus 105. The data running in the internal memory 135 may include the operating system (OS) 137 of the electronic device 101, the application 143, and the scheduler.

[0087] The operating system consists of a shell 139 and a kernel 141. Shell 139 is an interface between the user and the operating system's kernel. The shell is the outermost layer of the operating system. The shell manages the interaction between the user and the operating system: it waits for user input, interprets user input to the operating system, and processes various operating system output.

[0088] The kernel 141 consists of the parts of the operating system that manage memory, files, peripherals, and system resources. The kernel 141 directly interacts with the hardware. The operating system kernel typically runs processes and provides inter-process communication, CPU time slice management, interrupts, memory management, and I / O management.

[0089] The following is a detailed description of the parameterized instruction selection method provided by an embodiment of the present application. Please refer to Figure 2, which is a flow chart of a parameterized instruction selection method provided by an embodiment of the present application. As shown in Figure 2, the parameterized instruction selection method includes the following steps 201-204.

[0090] Step 201: Obtain a first code, where the first code includes a plurality of instructions.

[0091] In this embodiment, the first code is, for example, an intermediate code obtained after the compiler preliminarily compiles the source code. Furthermore, the first code includes multiple instructions, and the compiler needs to further compile the first code to obtain a target file.

[0092] Step 202: Generate an instruction table based on multiple instructions in the first code, where the instruction table includes multiple machine instruction sets corresponding to the multiple instructions, each of the multiple machine instruction sets has corresponding instructions in the multiple instructions, and each machine instruction set is used to indicate one or more machine instructions that can be selected by the corresponding instruction during compilation.

[0093] That is, multiple machine instruction sets correspond one-to-one to multiple instructions in the first code. Each machine instruction set is used to indicate one or more machine instructions that can be selected by the corresponding instruction in the first code during compilation. That is to say, for multiple instructions in the first code, a machine instruction set can be generated for each instruction of some or all instructions in the first code, and the machine instruction set indicates the machine instructions that can be selected by the instruction during compilation. Among them, the machine instruction set may include one or more machine instructions. If the machine instruction set includes only one machine instruction, it means that the instruction corresponding to the machine instruction set can only have one corresponding machine instruction during compilation; if the machine instruction set includes multiple machine instructions, it means that the instruction corresponding to the machine instruction set can select any one of multiple machine instructions during compilation.

[0094] Step 203 : Based on the instruction table, perform multiple rounds of machine instruction selection for multiple instructions in the first code to obtain multiple target files, where the multiple target files are obtained by selecting different machine instruction combinations for multiple instructions from multiple machine instruction sets.

[0095] Because the instructions in the first code have corresponding machine instruction sets, and the machine instruction set may include multiple selectable machine instructions, when generating each target file, any one of the machine instructions in the machine instruction set corresponding to the instructions in the first code can be selected. In this way, for the instructions in the first code corresponding to the machine instruction set including multiple machine instructions, by selecting different machine instruction combinations from the machine instruction set for these instructions, multiple different target files can be obtained. In other words, a target file is equivalent to a machine instruction combination.

[0096] For example, assuming that the first code includes instructions A and B, and the machine instruction set corresponding to instruction A includes machine instruction 1 and machine instruction 2, and the machine instruction set corresponding to instruction B includes machine instruction 3 and machine instruction 4. In this way, when generating target file 1, the corresponding machine instruction 1 can be selected for instruction A, and the corresponding machine instruction 3 can be selected for instruction B, that is, the machine instruction combination of target file 1 is machine instruction 1 + machine instruction 3; when generating target file 2, the corresponding machine instruction 2 can be selected for instruction A, and the corresponding machine instruction 3 can be selected for instruction B, that is, the machine instruction combination of target file 2 is machine instruction 2 + machine instruction 3; when generating target file 3, the corresponding machine instruction 1 can be selected for instruction A, and the corresponding machine instruction 4 can be selected for instruction B, that is, the machine instruction combination of target file 3 is machine instruction 1 + machine instruction 4; when generating target file 4, the corresponding machine instruction 2 can be selected for instruction A, and the corresponding machine instruction 4 can be selected for instruction B, that is, the machine instruction combination of target file 1 is machine instruction 2 + machine instruction 4.

[0097] Step 204 : Execute the multiple target files separately, and select one or more target files with the highest execution performance based on the execution performance of the multiple target files.

[0098] The execution performance of the target file may refer to, for example, performance information such as the startup speed and response speed of the target file.

[0099] In this solution, during the compilation process, a corresponding machine instruction set is generated in advance for the instructions in the code to be compiled, so as to indicate the corresponding one or more machine instructions that can be selected for each instruction in the code during compilation based on the machine instruction set, so that the compiler no longer selects the default machine instruction for the instruction in the code, and guides the compiler to select different machine instruction combinations during the compilation process, thereby obtaining multiple different target files, and finally selecting the target file with the best execution performance by executing multiple target files, thereby improving the flexibility of the instruction selection process, and then compiling to obtain a target file with higher execution performance.

[0100] Since the traditional compilation process is a closed process, the compiler will compile the code according to the established compilation process, which results in the same code often only compiling to a fixed target file. In addition, in the traditional compilation process, the compiler often only selects the default machine instruction for instructions in the code that can select different machine instructions as the compilation result, resulting in an inflexible method for selecting machine instructions and difficulty in selecting the optimal machine instruction. Because, in many cases, the default machine instruction selected by the compiler is not the optimal machine instruction. Then, in this solution, by generating multiple corresponding machine instruction sets for the code, it is equivalent to providing an external interface for the compilation process, allowing the compiler to arbitrarily select corresponding machine instructions for instructions corresponding to multiple machine instructions, thereby obtaining different machine instruction combinations, and finally determining the performance of multiple different machine instruction combinations by executing the target file, and determining one or more machine instruction combinations (i.e., target files) with the best execution performance.

[0101] Optionally, in the above embodiment, multiple instruction configuration files can also be generated based on multiple instructions in the first code. Each of the multiple instruction configuration files is independently generated based on the first code, and the multiple instruction configuration files include at least one configuration information, that is, each instruction configuration file generates configuration information for at least one instruction in the first code. Among the multiple instruction configuration files, different instruction configuration files configure different configuration information for multiple instructions. Specifically, each instruction configuration file includes at least one configuration information, and each configuration information in the at least one configuration information has a corresponding instruction in multiple instructions (that is, each instruction that needs to generate configuration information has a unique corresponding configuration information), and each configuration information is used to indicate the conditions that need to be met when selecting the corresponding machine instruction for the instruction in the first code. That is, the configuration information is equivalent to the machine instruction selection reference information corresponding to the instruction in the first code, ensuring that the configuration information needs to be referenced to complete the selection process when selecting the machine instruction for the instruction in the first code.

[0102] Specifically, the instruction configuration file is used to record the configuration information corresponding to the instructions in the first code. For multiple instructions in the first code, corresponding configuration information can be generated for all or part of the instructions in the first code, and each instruction for which configuration information needs to be generated has a unique corresponding configuration information. In this way, the configuration information in the instruction configuration file has a corresponding relationship with the instructions in the first code. Moreover, each configuration information in the instruction configuration file is used to indicate the conditions that need to be met when selecting the corresponding machine instruction for the instruction in the first code. That is, the configuration information is equivalent to the machine instruction selection reference information corresponding to the instruction in the first code, ensuring that when selecting the machine instruction for the instruction in the first code, the configuration information needs to be referenced to complete the selection process.

[0103] For example, assuming that the instructions for which configuration information needs to be generated in the first code are instruction A and instruction B, then when generating the instruction configuration file, the instruction configuration file may include configuration information A corresponding to instruction A and configuration information B corresponding to instruction B. Furthermore, configuration information A is used to indicate condition A that needs to be met when selecting a corresponding machine instruction for instruction A; configuration information B is used to indicate condition B that needs to be met when selecting a corresponding machine instruction for instruction B.

[0104] That is to say, by generating an instruction configuration file, it is equivalent to specifying the conditions that the instructions in the first code must meet when selecting machine instructions, narrowing the set of optional machine instructions for the instructions in the first code, and ensuring that specific machine instructions can be selected when selecting corresponding machine instructions for the instructions in the first code.

[0105] It should be noted that in the instruction configuration file, corresponding configuration information may be configured for all instructions in the first code, or for part of the instructions in the first code. In actual applications, this can be determined based on the specific circumstances of the first code. This embodiment does not limit the number of instructions in the first code that require configuration information. In addition, the configuration information in the instruction configuration file may be automatically generated by the electronic device based on the instructions in the first code (for example, based on an automatic script), or may be generated by the user by manual filling; or, a portion of the configuration information in the instruction configuration file may be automatically generated by the electronic device, and the other portion may be generated by manual filling by the user. This embodiment does not specifically limit the method of generating this configuration information.

[0106] In this way, based on multiple instruction configuration files, corresponding machine instructions can be selected for multiple instructions in the first code, thereby obtaining multiple target files corresponding to the multiple instruction configuration files. That is, there is a one-to-one correspondence between the multiple instruction configuration files and the multiple target files, and the multiple target files are obtained based on different instruction configuration files. In other words, after obtaining the instruction configuration files, the conditions that must be met when selecting machine instructions for the instructions in the first code can be determined based on the configuration information in the instruction configuration files, thereby ensuring that the requirements are met when selecting corresponding machine instructions for the instructions.

[0107] That is to say, in the process of compiling the first code, for the instructions in the first code that have corresponding configuration information, it is also necessary to select corresponding machine instructions for the instructions in the first code based on the configuration information in the instruction configuration file to ensure that the selected machine instructions can meet the conditions indicated in the configuration information.

[0108] It is understandable that, for instructions in the first code that do not have configuration information, the compiler may select machine instructions based on a traditional instruction selection method.

[0109] Finally, the plurality of target files are executed respectively, and one or more target files with the highest execution performance are selected based on the execution performance of the plurality of target files. The execution performance of the target file may refer to performance information such as the startup speed and response speed of the target file.

[0110] In this solution, by generating different configuration information combinations (i.e., instruction profiles) for instructions in the same code, different conditions can be specified for selecting corresponding machine instructions for the instructions in the code, thereby compiling different target files based on the same code. In this way, by comparing the execution performance of different target files, the target file with the best execution performance can be effectively determined. This is beneficial for compiling the optimal target file even when it is difficult to determine the optimal configuration information for each instruction in the code.

[0111] Optionally, for any configuration information in the instruction configuration file, the configuration information may include one or more of the following conditions: the type of functional unit used by the machine instruction, whether the machine instruction updates the status register, the highest bit of the machine instruction, the addressing mode of the machine instruction, or whether the machine instruction contains an immediate value. In other words, when selecting a machine instruction for an instruction with corresponding configuration information in the first code, it is necessary to ensure that the selected machine instruction meets one or more of the above conditions indicated by the configuration information. In addition to the conditions introduced above, the configuration information may also be used to indicate other conditions, which are not specifically limited in this embodiment.

[0112] The functional unit used by the machine instruction may refer to a functional unit in an electronic device for executing the machine instruction, such as a scalar operation unit or a logic operation unit.

[0113] In this embodiment, by generating a corresponding instruction configuration file for the code, it is equivalent to providing an external interface for the compilation process, allowing users to freely configure the range of instruction selection during the code compilation process, ensuring that the compiler also needs to consider the conditions indicated in the instruction configuration file when selecting the corresponding machine instructions for the instructions in the code, thereby guiding the compiler to select better machine instructions, and ultimately compiling a target file with higher execution performance.

[0114] Since the instructions in the first code can generate configuration information from different perspectives, such as the type of functional unit used by the machine instruction, whether the machine instruction updates the status register, the highest bit of the machine instruction, the addressing mode of the machine instruction, or whether the machine instruction contains an immediate value, etc., in some cases, it is often difficult to generate the optimal configuration information for all instructions in the first code that require configuration information generation (i.e., it is difficult to determine from which perspectives to generate the configuration information to obtain the optimal configuration information), and thus select the optimal machine instruction.

[0115] Based on this, in this embodiment, multiple different instruction configuration files may be generated, and the same code may be compiled based on the different instruction configuration files to obtain different target files, and finally the optimal target file may be selected from the multiple different target files.

[0116] For example, after obtaining the first code, multiple instruction configuration files may be generated based on multiple instructions in the first code. Each of the multiple instruction configuration files is independently generated based on the first code, and each of the multiple instruction configuration files includes at least one configuration information, i.e., each instruction configuration file generates configuration information for at least one instruction in the first code. Different instruction configuration files in the multiple instruction configuration files may configure different configuration information for the multiple instructions.

[0117] For example, among multiple instruction configuration files, the configuration information generated by instruction configuration file A for the instructions in the first code is used to indicate the type of functional unit used by the machine instruction; the configuration information generated by instruction configuration file B for the instructions in the first code is used to indicate the highest number of bits of the machine instruction. For another example, the configuration information generated by instruction configuration file C for instruction A in the first code is used to indicate the type of functional unit used by the machine instruction, and the configuration information generated for instruction B in the first code is used to indicate the highest number of bits of the machine instruction; the configuration information generated by instruction configuration file D for instruction A in the first code is used to indicate the highest number of bits of the machine instruction, and the configuration information generated for instruction A in the first code is used to indicate the type of functional unit used by the machine instruction. In general, by generating corresponding configuration information for the instructions in the first code from different angles, multiple instruction configuration files with different configuration information combinations can be obtained.

[0118] Then, based on the multiple instruction configuration files, corresponding machine instructions can be selected for the multiple instructions in the first code, thereby obtaining multiple target files corresponding to the multiple instruction configuration files. That is, each instruction configuration file in the multiple instruction configuration files can be used to guide the compilation process of the first code, thereby generating a corresponding target file. In other words, there is a one-to-one correspondence between the multiple instruction configuration files and the multiple target files, and the multiple target files are obtained based on different instruction configuration files.

[0119] After obtaining the multiple target files, the multiple target files can be executed respectively, and the execution performance of each of the multiple target files can be obtained, such as the performance information of each target file, such as the startup speed and response speed.

[0120] In this way, based on the execution performance of multiple target files, one or more target files with the highest execution performance can be selected as the target files ultimately deployed to a specific application scenario, thereby completing the compilation of the first code.

[0121] It should be noted that, during the generation of multiple instruction configuration files and the generation of multiple target files based on the multiple instruction configuration files, some methods for achieving optimal parameter configuration (such as Autotuner technology) can be used to analyze which configuration information is generated for the instructions, so as to improve the performance of the target file finally compiled. In this way, by continuously generating different configuration information for the instructions in the first code and analyzing the impact of different configuration information on the compilation of the first code, the optimal configuration information configured for the instructions in the first code can be gradually determined, thereby ensuring that the optimal target file can be compiled based on the instruction configuration files.

[0122] In this solution, by generating different configuration information combinations (i.e., instruction profiles) for instructions in the same code, different conditions can be specified for selecting corresponding machine instructions for the instructions in the code, thereby compiling different target files based on the same code. In this way, by comparing the execution performance of different target files, the target file with the best execution performance can be effectively determined. This is beneficial for compiling the optimal target file even when it is difficult to determine the optimal configuration information for each instruction in the code.

[0123] For ease of understanding, the following describes how to generate a corresponding instruction configuration file for the instructions in the first code.

[0124] Optionally, after obtaining the first code, the configuration information in the instruction configuration file may be generated sequentially based on the execution order of multiple instructions in the first code and the context of the instructions. The context of the instructions may include the execution status of the instructions and / or the configuration information generated for the instructions.

[0125] That is, the configuration information in the instruction configuration file is generated sequentially based on the execution order of the instructions corresponding to the configuration information in the first code. The earlier the execution order of the instructions corresponding to the configuration information in the first code, the earlier the configuration information is generated in the instruction configuration file. Furthermore, when generating the configuration information corresponding to an instruction, in addition to analyzing the instruction itself, the context of the instruction can also be analyzed to generate the optimal configuration information.

[0126] It is understandable that the execution order of multiple instructions in the first code is often fixed, so the execution order of the machine instructions in the target file compiled based on the first code is often fixed and matches the execution order of the instructions in the first code. Moreover, on the basis that the instructions have a fixed execution order, the execution of some instructions at the front of the execution order may often have a certain impact on the execution of some instructions at the back of the execution order. Therefore, when selecting the corresponding machine instructions for the instructions in the first code, it is often easier to select the optimal machine instructions by considering the context of the instructions. For example, when some instructions at the front of the execution order select machine instructions of a certain number of bits, then the related instructions at the back of the execution order may also select machine instructions of the same number of bits, so as to improve the execution speed of the machine instructions.

[0127] Based on this, this solution generates configuration information corresponding to instructions in sequence based on the execution order of instructions in the code and the context of the instructions. This allows the impact of the instruction context on the selection of machine instructions to be taken into account during the generation of configuration information, so as to generate configuration information that can select the optimal machine instruction and ensure the quality of the target file ultimately generated based on the configuration information.

[0128] Exemplarily, in obtaining the first code, an instruction configuration template may be first generated based on the execution order of multiple instructions in the first code, and the instruction configuration template is used to indicate the target instruction for which configuration information needs to be generated among the multiple instructions and the position of the target instruction among the multiple instructions. Among them, the target instruction may include one or more instructions, and the number of instructions included in the target instruction is the same as the number of configuration information in the instruction configuration file. For example, the instruction configuration template may include a specific instruction (i.e., a target instruction) indicating that configuration information needs to be generated in the first code, and an index corresponding to each instruction in the target instruction. The index corresponding to the instruction may be used to indicate the position of the instruction among the multiple instructions of the first code.

[0129] Then, based on the context of the target instruction, corresponding configuration information is filled in the instruction configuration template for the target instruction in turn to obtain an instruction configuration file, wherein the context of the target instruction is obtained based on the position of the target instruction in multiple instructions.

[0130] In this solution, by pre-generating an instruction configuration template based on the execution order of instructions in the code, the instructions for which configuration information needs to be generated in the code and the location of these instructions in the code can be implemented based on the instruction configuration template. In this way, when subsequently generating configuration information for the instructions in the code, the construction of the instruction configuration part can be completed by simply filling the instruction configuration template with the configuration information based on the instructions of the instruction configuration template; moreover, an instruction configuration template can be reused to generate multiple different instruction configuration files, improving the efficiency of generating instruction configuration files.

[0131] Since the corresponding configuration information can be generated for the instruction from different perspectives in this embodiment, the target instruction in the first code for which the configuration information needs to be generated may also be related to the type of configuration information. For example, in the case where the configuration information in the instruction configuration file is used to indicate the type of functional unit used by the machine instruction, then the target instruction for which the configuration information needs to be generated needs to support compilation as a machine instruction that uses multiple functional units. That is, only when the instruction in the first code itself supports being compiled as a machine instruction that uses multiple functional units, does this instruction need to specify the type of functional unit used by the machine instruction in the instruction selection stage; if the instruction in the first code itself does not support being compiled as a machine instruction that uses multiple functional units (for example, the instruction can only be compiled as a machine instruction that uses a specific functional unit), then this instruction does not need to specify the type of functional unit used by the machine instruction in the instruction selection stage.

[0132] In this solution, the target instructions in the code for which configuration information needs to be generated are determined from the perspective of the type of configuration information that needs to be generated for the instructions. This ensures that the configuration information generated for the target instructions can indeed affect the process of selecting machine instructions for the target instructions, ensuring that the configuration information generated for the target instructions is valid and avoiding the generation of invalid configuration information.

[0133] In addition, the following will illustrate how to generate configuration information based on the execution order of instructions and the context of instructions.

[0134] Specifically, the multiple instructions of the first code include a first instruction and a second instruction, and both the first instruction and the second instruction support compilation as machine instructions that use the first functional unit or the second functional unit. That is, in the instruction selection stage, there are multiple machine instructions that can be selected for the first instruction and the second instruction. The compiler can select machine instructions that use the first functional unit for the first instruction and the second instruction, or it can select machine instructions that use the second functional unit for the first instruction and the second instruction. In addition, the execution order of the first instruction in the first code is before the second instruction, that is, the first instruction is executed before the second instruction.

[0135] During the process of generating configuration information in the instruction configuration file, first configuration information corresponding to the first instruction is first generated for the first instruction based on the first instruction and the context of the first instruction. The first configuration information is used to indicate that the machine instruction selected for the first instruction uses the first functional unit, and the context of the first instruction is used to indicate that the first functional unit and the second functional unit are not occupied. In other words, based on the context of the first instruction, it can be determined that neither the first functional unit nor the second functional unit is occupied by an instruction, and therefore a machine instruction using the first functional unit or the second functional unit can be selected for the first instruction. For example, in this embodiment, a machine instruction using the first functional unit is selected by default for the first instruction.

[0136] Then, based on the second instruction and the context of the second instruction, corresponding second configuration information is generated for the second instruction, the second configuration information is used to indicate that the machine instruction selected for the second instruction uses the second functional unit, and the context of the second instruction is used to indicate that the first instruction executed before the second instruction has occupied the first functional unit.

[0137] That is, if it is determined based on the context of the second instruction that other instructions prior to the execution of the second instruction have already occupied the first functional unit, a machine instruction of the unoccupied second functional unit can be selected for the second instruction, thereby avoiding the selection of machine instructions of the same functional unit for both the first instruction and the second instruction. In this way, when executing the target file, the first functional unit is used to execute the machine instruction corresponding to the first instruction, and the second functional unit is used to execute the machine instruction corresponding to the second instruction, thereby minimizing the situation where different machine instructions are executed by the same functional unit and the situation where instructions are waiting to be executed, thereby improving the execution speed of the machine instructions.

[0138] In this solution, for instructions in the code that can be compiled into machine instructions using different functional units, configuration information is generated for the instructions by combining the context of the instructions, so that machine instructions using different functional units can be selected for different instructions as much as possible, avoiding the situation where instructions wait for execution when different machine instructions are executed by the same functional unit, and improving the execution speed of the compiled target file.

[0139] The parameterized instruction selection method provided by this embodiment is introduced above. To facilitate understanding, the following will describe in detail how to implement the parameterized instruction selection method provided by this embodiment in actual applications with reference to specific examples.

[0140] For example, please refer to Figure 3, which is a schematic diagram of the application process of a parameterized instruction selection method provided by an embodiment of the present application. As shown in Figure 3, in the first compilation stage, the compiler first translates the source code into intermediate code, and then the configuration template generation module outputs the corresponding instruction configuration template based on the input intermediate code, and then performs different instantiation processes on the same instruction configuration template (that is, different configuration information combinations are configured for the instructions in the intermediate code), thereby obtaining multiple different instruction configuration files (such as instruction configuration file A and instruction configuration file B in Figure 3).

[0141] During the secondary compilation phase, the compiler uses the instruction configuration file and the corresponding intermediate code as compilation input. When the parameterized instruction selection module executes the steps, it selects machine instructions that meet the configuration information requirements for the instructions based on the configuration information indicated by the instruction configuration file, thereby obtaining the target file. In this way, when the compiler compiles the same intermediate code, it can output different target files based on the different instruction configuration files input. For example, based on instruction configuration file A, the compiler's parameterized instruction selection module outputs target file A; based on instruction configuration file B, the compiler's parameterized instruction selection module outputs target file B.

[0142] In general, this embodiment expands the interface for the compiler to interact with the outside world. By configuring the instruction selection phase of the compilation process based on the instruction configuration file A to implement instruction selection, the interaction between external input and the instruction selection phase can be achieved.

[0143] Please refer to Figure 4, which is a schematic diagram of the execution flow of a parameterized instruction selection method provided in an embodiment of the present application in an actual application process. As shown in Figure 4, in an actual application process, the execution flow of the parameterized instruction selection method includes the following steps 401-405.

[0144] Step 401: Analyze the intermediate code to establish a mapping relationship between instructions and indexes in the intermediate code.

[0145] Exemplarily, please refer to Figure 5, which is a schematic diagram of a mapping relationship between instructions and indexes for functions in an intermediate code provided by an embodiment of the present application. As shown in Figure 5, for function A (Function A) in the intermediate code, a mapping relationship between instructions and indexes in Function A can be established, thereby indicating the relative position of instructions in the intermediate code for which configuration information needs to be generated. Specifically, the established mapping relationship includes three items: index (index), instruction (instr) and configuration information (config info). Among them, among these three items, the index is used to indicate the relative position of the instruction in the intermediate code, and the value of the index starts from 1; the instruction is used to indicate the instruction corresponding to the current index in the intermediate code; the configuration information refers to the configuration information corresponding to the instruction in the current mapping relationship. Since the configuration information has not been generated yet, the specific content of the configuration information can be no data, which is used to indicate that the current configuration information is to be generated.

[0146] For example, for the following intermediate code:

[0147] In the index table corresponding to Function A::Basic Block A1, the index value of Instr a is 1, and the index value of Instr b is 2.

[0148] Step 402: Generate an instruction configuration template based on the mapping relationship between instructions and indexes.

[0149] After obtaining the mapping relationship between instructions and indexes, the template data object can be initialized, and then the instruction configuration template (source.config) can be output according to a specific file format. Specifically, the instruction configuration template can be further generated based on the original intermediate code in combination with the mapping relationship between instructions and indexes, so as to clearly indicate the index and configuration information in the original intermediate code, so as to determine the location of each instruction for which configuration information needs to be generated and the context of the instruction.

[0150] For example, the following is a schematic diagram of the format of a generated instruction configuration template.

[0151] Step 403: Instantiate the instruction configuration template to obtain multiple instruction configuration files.

[0152] This step involves executing multiple different instantiations of the instruction configuration template to obtain multiple different instruction configuration files. Specifically, the instruction configuration template already indicates the mapping relationship between indexes, instructions, and configuration information. The instantiation process can generate specific configuration information for instructions with configuration information. Furthermore, different instantiation processes for the same instruction configuration template can generate different configuration information for the same instruction, so that different instruction configuration information is actually used to indicate different configuration information combinations.

[0153] For example, for the same instruction configuration template, corresponding configuration information can be generated from different perspectives. For example, based on the instruction configuration template, corresponding configuration information can be generated for each instruction from the perspective of the type of functional unit used by the machine instruction, indicating the type of functional unit used by the machine instruction selected by each instruction, thereby obtaining instruction configuration file A. For another example, based on the instruction configuration template, corresponding configuration information can be generated for each instruction from the perspective of the highest number of bits of the machine instruction, indicating the highest number of bits of the machine instruction selected by each instruction, thereby obtaining instruction configuration file B.

[0154] Please refer to Figure 6, which is a schematic diagram of an embodiment of the present application for executing an instantiation process on an instruction configuration template to generate different instruction configuration files. As shown in Figure 6, for the same instruction configuration template (i.e., the instruction configuration template corresponding to Function A), different configuration information can be generated for the instructions therein, thereby generating different configuration information combinations for the same instruction set to obtain different instruction configuration files. For example, in instruction configuration file A, the configuration information generated for instruction a (Instr a) is config-Aa, the configuration information generated for instruction b (Instr b) is config-Ab... The configuration information generated for instruction f (Instr f) is config-Af. In instruction configuration file B, the configuration information generated for instruction a (Instr a) is config-Ba, the configuration information generated for instruction b (Instr b) is config-Bb... The configuration information generated for instruction f (Instr f) is config-Bf.

[0155] It should be noted that, for any two different instruction configuration files, the two instruction configuration files may differ in configuration information corresponding to only some instructions, or in configuration information corresponding to all instructions. This embodiment does not impose any specific limitation on this.

[0156] Step 404 : Implement parameterized instruction selection based on the instruction configuration file and output multiple target files.

[0157] In this step, for the same intermediate code, machine instructions can be selected for the instructions in the intermediate code based on multiple different instruction configuration files, thereby outputting multiple different target files. Moreover, there is a one-to-one correspondence between the multiple target files and the multiple instruction configuration files.

[0158] For example, please refer to Figure 7, which is a schematic diagram of a target file generated based on an instruction configuration file provided by an embodiment of the present application. As shown in Figure 7, in the instruction configuration file, corresponding configuration information is indicated for the instructions in the intermediate code (i.e., instr a to instr f). For example, the corresponding configuration information of instr a and instr c is config-Aa, the corresponding configuration information of instr b, instr e, and instr f is config-Ab, and instr d has no corresponding configuration information. Then, in the instruction selection stage, the corresponding machine instruction can be selected based on the configuration information corresponding to each instruction, thereby obtaining the target file. For example, for instr a in the intermediate code, based on the configuration information config-Aa, the machine instructions Instr a-11 and Instr a-12 can be selected, that is, the instruction instr a in the intermediate code is implemented by the machine instructions in the target file Instr a-11 and Instr a-12. For instr b in the intermediate code, based on the configuration information config-Ab, the machine instruction Instr b-11 can be selected. For instr d in the intermediate code, since instr d has no corresponding configuration information, machine instructions Instr d-11, Instr d-12, and Instr d-13 can be selected based on the default configuration information.

[0159] Step 405: Screen multiple target files to obtain the optimal target file.

[0160] After obtaining multiple target files, each target file can be executed separately under the same operating environment to obtain the execution performance of each target file, such as the startup speed of each target file or the response speed during operation, etc., and then the target file with the best execution performance is selected as the optimal target file, so as to facilitate the subsequent deployment of the optimal target file in the actual application environment.

[0161] For ease of understanding, the following will describe in detail the execution process of multiple steps in the embodiment shown in FIG4 from the perspective of the type of functional unit used by the machine instruction as configuration information, with reference to examples.

[0162] Specifically, this embodiment is based on the compilation framework under the Low Level Virtual Machine (LLVM), adds an instruction configuration template generator module, defines an output interface for external interaction: -mllvm-linglong-autotuner-for-agx-mvu=true, identifies and modifies the instruction selection module, combines Autotuner technology, and uses parameterized instruction selection technology to perform configurable instruction selection tuning on the vector instruction function unit, so that the final result is performance improvement.

[0163] First, in the instruction mapping establishment stage, the source code file Source.c is input, and the compiler outputs the intermediate code Source.ll. The parameterized instruction selection will take the intermediate code Source.ll as input, and generate an instruction configuration table for all instructions in the intermediate code Source.ll, wherein the instruction configuration table only initializes the configuration table item Config_info to "no data" for configurable instructions. As shown in Figure 8, Figure 8 is a schematic diagram of the generation of an instruction configuration table provided in an embodiment of the present application. In Figure 8, since the Load instruction and the Store instruction only use a single functional unit, there is no need to generate configuration information, and the generation process of the instruction configuration table will not initialize Config_info. However, the Vadd and Vsub instructions can use two functional units and require configuration information. The generation process of the instruction configuration table will initialize Config_info to "no data".

[0164] Then, when the instruction configuration table is generated, an instruction configuration template can be further generated based on the instruction configuration table and the intermediate code. Taking Function B in the intermediate code shown in Figure 8 as an example, the specific instruction configuration template generated can be shown as follows.

[0165] Secondly, by instantiating the instruction configuration template, the instruction configuration file can be obtained.

[0166] Specifically, in this example, a script program can be used to identify instructions marked with "no data" in the instruction configuration template, and fill in the Config info item data of the instructions marked with "no data" in the instruction configuration template, thereby obtaining the instruction configuration file.

[0167] Specifically, in the process of filling the configuration information corresponding to the instruction in the instruction configuration template, it is actually possible to select the corresponding configuration information from the optional configuration information set of each instruction based on the context of the instruction, and fill the selected configuration information into the Config info item data corresponding to the instruction, thereby generating corresponding configuration information for each instruction.

[0168] Please refer to Figure 9, which is a schematic diagram of the process of instantiating an instruction configuration template provided by an embodiment of the present application. As shown in Figure 9, the instructions marked with "no data" in the instruction configuration template include the vadd instruction and the vsub instruction. For the vadd instruction, the optional configuration information set of the vadd instruction is {@axu,@mvu}; the optional configuration information set of the vsub instruction is {@axu,@mvu}. That is, vadd and vsub are both multi-function unit instructions, which can be executed in the axu functional unit or the mvu functional unit.

[0169] During the process of instantiating the instruction configuration template, according to the context of the vadd instruction, when the vadd instruction is executed, neither the axu functional unit nor the mvu functional unit is occupied by other instructions. At this time, the two functional units axu and mvn can be selected. For example, the axu functional unit is selected by default. Therefore, the instruction selected for the vadd instruction in the instantiation process is vadd@axu, and the vadd instruction configuration information is updated to @axu.

[0170] When instantiating the configuration information corresponding to the vsub instruction in the instruction configuration template, according to the context of the vsub instruction, when the vsub instruction is executed, the axu functional unit has been occupied by the vadd instruction. At this time, the mvu functional unit can be selected for the vsub instruction. Therefore, the instruction selected for the vsub instruction in the instantiation process is vsub@mvu, and the vsub instruction configuration information is updated to @mvu.

[0171] Finally, based on the obtained instruction configuration file, the corresponding machine instruction is selected for each instruction with configuration information in the intermediate code, thereby realizing the parameterized instruction selection process.

[0172] For example, please refer to Figure 10, which is a schematic diagram of a parameterized instruction selection process provided by an embodiment of the present application. As shown in Figure 10, in the instruction configuration file, the instructions vadd, vasub, and add with configuration information are all multi-functional unit instructions. The parameterized instruction selection process can select and use the machine instructions of the corresponding functional unit according to the configuration information of the instruction. The configuration information corresponding to the instruction vadd%a%a%b with an index value of 5 is @axu, so the machine instructions generated for this instruction can be specifically vadd.v4i16@axu a15,a15,a14. The configuration information corresponding to the instruction vsub%c%c%d with an index value of 6 is @@mvu, so the machine instructions generated for this instruction can be specifically vsud.v4i16@mvu a7,a7,a8. The configuration information corresponding to the instruction add%g1,%g2,%g3 with an index value of 9 is @axu, so the machine instructions generated for this instruction can be specifically vadd.v4i16@axu a20,a21,a21.

[0173] The above describes in detail the method provided by the embodiment of the present application. Next, the device provided by the embodiment of the present application for executing the above method will be introduced.

[0174] Please refer to Figure 11, which is a schematic diagram of the structure of a parameterized instruction selection device provided in an embodiment of the present application. As shown in Figure 11, the parameterized instruction selection device provided in this embodiment includes: an acquisition module 1101, which is used to acquire a first code, wherein the first code includes multiple instructions; a processing module 102, which is used to generate multiple machine instruction sets corresponding to the multiple instructions based on the multiple instructions, wherein the multiple instructions are used to select machine instructions for compilation from the corresponding machine instruction sets; the processing module 102 is also used to perform multiple rounds of machine instruction selection for the multiple instructions to obtain multiple target files, wherein the multiple target files are obtained by selecting different machine instruction combinations for the multiple instructions from the multiple machine instruction sets; and the processing module 102 is also used to select the target file with the highest execution performance from the multiple target files.

[0175] In one possible implementation, the processing module 1102 is further used to: generate multiple instruction configuration files based on multiple instructions, each instruction configuration file includes at least one configuration information corresponding to a single instruction, and the configuration information is used to indicate the conditions that the corresponding instruction needs to meet when selecting the corresponding machine instruction; based on the multiple instruction configuration files, perform multiple rounds of machine instruction selection for the multiple instructions to obtain multiple target files, and the multiple target files correspond one-to-one to the multiple instruction configuration files.

[0176] In one possible implementation, at least one configuration information includes one or more of the following conditions: the type of functional unit used by the machine instruction, whether the machine instruction updates the status register, the highest number of bits of the machine instruction, the addressing mode of the machine instruction, or whether the machine instruction contains an immediate value.

[0177] In a possible implementation of the processing module 1102 , the processing module 1102 is further configured to generate configuration information in multiple instruction configuration files based on the execution order of multiple instructions in the first code and the context of the instructions.

[0178] In one possible implementation, the processing module 1102 is further used to: generate an instruction configuration template based on the execution order of multiple instructions in the first code, the instruction configuration template being used to indicate the target instruction for which configuration information needs to be generated among the multiple instructions and the position of the target instruction among the multiple instructions; based on the context of the target instruction, fill in the corresponding configuration information for the target instruction in the instruction configuration template in sequence to obtain a first instruction configuration file, wherein the context of the target instruction is obtained based on the position of the target instruction among the multiple instructions, and the multiple instruction configuration files include the first instruction configuration file.

[0179] In a possible implementation, when the configuration information in the instruction configuration file is used to indicate the type of functional unit used by the machine instruction, the target instruction for which the configuration information is to be generated supports compilation into a machine instruction that uses multiple functional units.

[0180] In one possible implementation, the multiple instructions include a first instruction and a second instruction, and both the first instruction and the second instruction support compilation into machine instructions that use the first functional unit or the second functional unit; the processing module 1102 is also used to: generate corresponding first configuration information for the first instruction based on the first instruction and the context of the first instruction, the first configuration information is used to indicate that the machine instruction selected for the first instruction uses the first functional unit, and the context of the first instruction is used to indicate that the first functional unit and the second functional unit are not occupied; generate corresponding second configuration information for the second instruction based on the second instruction and the context of the second instruction, the second configuration information is used to indicate that the machine instruction selected for the second instruction uses the second functional unit, and the context of the second instruction is used to indicate that the first instruction executed before the second instruction has occupied the first functional unit.

[0181] In a possible implementation, the first code is an intermediate code.

[0182] Please refer to Figure 12, which is a structural diagram of an execution device provided in an embodiment of the present application. As shown in Figure 12, the execution device 1200 is used to execute the parameterized instruction selection method introduced in the above embodiment, and the execution device 1200 can be specifically expressed as a server, which is not limited here. Specifically, the execution device 1200 includes: a receiver 1201, a transmitter 1202, a processor 1203 and a memory 1204 (wherein the number of processors 1203 in the execution device 1200 can be one or more, and Figure 12 takes one processor as an example), wherein the processor 1203 may include an application processor 12031 and a communication processor 12032. In some embodiments of the present application, the receiver 1201, the transmitter 1202, the processor 1203 and the memory 1204 may be connected via a bus or other means.

[0183] The memory 1204 may include a read-only memory and a random access memory, and provides instructions and data to the processor 1203. A portion of the memory 1204 may also include non-volatile random access memory (NVRAM). The memory 1204 stores processor and operation instructions, executable modules, or data structures, or subsets or extended sets thereof. The operation instructions may include various operation instructions for implementing various operations.

[0184] Processor 1203 controls the operation of the execution device. In specific applications, the various components of the execution device are coupled together via a bus system. In addition to a data bus, the bus system may also include a power bus, a control bus, and a status signal bus. However, for clarity, all bus systems are referred to as a bus system in the figure.

[0185] The method disclosed in the above embodiment of the present application can be applied to the processor 1203, or implemented by the processor 1203. The processor 1203 can be an integrated circuit chip with signal processing capabilities. During the implementation process, each step of the above method can be completed by an integrated logic circuit of the hardware in the processor 1203 or an instruction in the form of software. The above-mentioned processor 1203 can be a general-purpose processor, a digital signal processor (digital signal processing, DSP), a microprocessor or a microcontroller, and can further include an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components.

[0186] The processor 1203 can implement or execute the various methods, steps, and logic block diagrams disclosed in the embodiments of the present application. A general-purpose processor can be a microprocessor or the processor can also be any conventional processor, etc. The steps of the method disclosed in the embodiments of the present application can be directly embodied as being executed by a hardware decoding processor, or can be executed by a combination of hardware and software modules in the decoding processor. The software module can be located in a storage medium mature in the art, such as a random access memory, a flash memory, a read-only memory, a programmable read-only memory, or an electrically erasable programmable memory, a register, etc. The storage medium is located in the memory 1204, and the processor 1203 reads the information in the memory 1204 and completes the steps of the above method in combination with its hardware.

[0187] Receiver 1201 can be used to receive input digital or character information and generate signal input related to executing device-related settings and function control. Transmitter 1202 can be used to output digital or character information through the first interface. Transmitter 1202 can also be used to send instructions to the disk group through the first interface to modify data in the disk group. Transmitter 1202 can also include a display device such as a display screen.

[0188] The execution device provided in the embodiments of the present application may specifically be a chip, which includes: a processing unit and a communication unit. The processing unit may be, for example, a processor, and the communication unit may be, for example, an input / output interface, a pin, or a circuit. The processing unit may execute computer-executable instructions stored in the storage unit so that the chip in the execution device executes the method described in the above embodiment. Optionally, the storage unit is a storage unit in the chip, such as a register, a cache, etc. The storage unit may also be a storage unit located outside the chip in the wireless access device, such as a read-only memory (ROM) or other type of static storage device that can store static information and instructions, a random access memory (RAM), etc.

[0189] Please refer to Figure 13, which is a schematic diagram of the structure of a computer-readable storage medium provided in an embodiment of the present application. The present application also provides a computer-readable storage medium. In some embodiments, the method disclosed in Figure 2 above can be implemented as computer program instructions encoded in a machine-readable format on a computer-readable storage medium or on other non-transitory media or products.

[0190] 13 schematically illustrates a conceptual partial view of an example computer-readable storage medium including a computer program for executing a computer process on a computing device, arranged in accordance with at least some embodiments presented herein.

[0191] In one embodiment, computer readable storage medium 1300 is provided using signal bearing medium 1301. Signal bearing medium 1301 may include one or more program instructions 1302 that, when executed by one or more processors, may provide the functionality or portions of the functionality described above with respect to FIG.

[0192] In some examples, signal bearing medium 1301 may include computer readable medium 1303 such as, but not limited to, a hard drive, compact disk (CD), digital video disk (DVD), digital tape, memory, ROM or RAM, and the like.

[0193] In some embodiments, the signal-bearing medium 1301 may include a computer-recordable medium 1304, such as, but not limited to, a memory, a read / write (R / W) CD, a R / W DVD, or the like. In some embodiments, the signal-bearing medium 1301 may include a communication medium 1305, such as, but not limited to, a digital and / or analog communication medium (e.g., a fiber optic cable, a waveguide, a wired communication link, a wireless communication link, or the like). Thus, for example, the signal-bearing medium 1301 may be communicated via a wireless form of the communication medium 1305 (e.g., a wireless communication medium conforming to the IEEE 802.X standard or other transmission protocol).

[0194] The one or more program instructions 1302 may be, for example, computer-executable instructions or logic-implemented instructions. In some examples, the computing device may be configured to provide various operations, functions, or actions in response to the program instructions 1302 communicated to the computing device via one or more of computer-readable media 1303, computer-recordable media 1304, and / or communication media 1305.

[0195] It should also be noted that the device embodiments described above are merely illustrative, in which the units described as separate components may or may not be physically separate, and the components displayed as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the present embodiment. In addition, in the drawings of the device embodiments provided in this application, the connection relationship between the modules indicates that there is a communication connection between them, which can be specifically implemented as one or more communication buses or signal lines.

[0196] Through the description of the above embodiments, those skilled in the art can clearly understand that the present application can be implemented by means of software plus necessary general hardware, and of course can also be implemented by special hardware including application-specific integrated circuits, special CPUs, special memories, special components, etc. In general, all functions performed by computer programs can be easily implemented with corresponding hardware, and the specific hardware structures used to implement the same function can also be various, such as analog circuits, digital circuits or special circuits, etc. However, for the present application, software program implementation is a better implementation method in most cases. Based on such an understanding, the technical solution of the present application is essentially or the part that contributes to the prior art can be embodied in the form of a software product, which is stored in a readable storage medium, such as a computer's floppy disk, USB flash drive, mobile hard disk, ROM, RAM, magnetic disk or optical disk, etc., and includes a number of instructions to enable a computer device (which can be a personal computer, training equipment, or network equipment, etc.) to execute the methods of each embodiment of the present application.

[0197] In the above embodiments, all or part of the embodiments may be implemented by software, hardware, firmware, or any combination thereof. When implemented by software, all or part of the embodiments may be implemented in the form of a computer program product.

[0198] The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the process or function according to the embodiment of the present application is generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable devices. The computer instructions can be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions can be transmitted from a website, computer, training equipment or data center to another website, computer, training equipment or data center via a wired (e.g., coaxial cable, optical fiber, digital subscriber line) or wireless (e.g., infrared, wireless, microwave, etc.) method. The computer-readable storage medium can be any available medium that a computer can store or a data storage device such as a training equipment, data center, etc. that includes one or more available media integrations. Available media can be magnetic media, (e.g., floppy disk, hard disk, tape), optical media (e.g., DVD), or semiconductor media (e.g., solid-state drive (SSD)), etc.

Claims

1. A method for parameterizing instruction selection, characterized in that: include: Obtaining a first code, where the first code includes a plurality of instructions; generating a plurality of machine instruction sets corresponding to the plurality of instructions based on the plurality of instructions, the plurality of instructions being used to select machine instructions for compilation from the corresponding machine instruction sets; performing multiple rounds of machine instruction selection for the plurality of instructions to obtain a plurality of target files, the plurality of target files being obtained by selecting different machine instruction combinations for the plurality of instructions from the plurality of machine instruction sets; An object file with the highest execution performance is selected from the multiple object files.

2. The method according to claim 1, characterized in that The method further comprises: generating a plurality of instruction configuration files based on the plurality of instructions, each instruction configuration file including at least one configuration information corresponding to a single instruction, the configuration information being used to indicate a condition that the corresponding instruction needs to satisfy when selecting a machine instruction; The performing multiple rounds of machine instruction selection for the multiple instructions to obtain multiple target files includes: Multiple rounds of machine instruction selection are performed for the multiple instructions based on the multiple instruction configuration files to obtain the multiple target files, where the multiple target files correspond one-to-one to the multiple instruction configuration files.

3. The method according to claim 2, characterized in that The at least one configuration information includes one or more of the following conditions: the type of functional unit used by the machine instruction, whether the machine instruction updates the status register, the highest bit of the machine instruction, the addressing mode of the machine instruction, or whether the machine instruction contains an immediate value.

4. The method according to any one of claims 2 to 3, characterized in that: The generating of multiple instruction configuration files based on multiple instructions in the first code includes: Configuration information in the plurality of instruction configuration files is generated based on the execution order of the plurality of instructions in the first code and the context of the instructions.

5. The method according to claim 4, characterized in that The generating, based on the execution order of the plurality of instructions in the first code and the context of the instructions, the configuration information in the plurality of instruction configuration files comprises: generating an instruction configuration template based on the execution order of the plurality of instructions in the first code, the instruction configuration template being used to indicate a target instruction among the plurality of instructions for which configuration information is to be generated and a position of the target instruction among the plurality of instructions; Based on the context of the target instruction, the corresponding configuration information is filled in the instruction configuration template for the target instruction in sequence to obtain a first instruction configuration file, wherein the context of the target instruction is obtained based on the position of the target instruction in the multiple instructions, and the multiple instruction configuration files include the first instruction configuration file.

6. The method according to claim 5, characterized in that When the configuration information in the first instruction configuration file is used to indicate the type of functional unit used by the machine instruction, the target instruction for which the configuration information needs to be generated supports compilation into a machine instruction that uses multiple functional units.

7. The method according to claim 4, characterized in that The multiple instructions include a first instruction and a second instruction, both of which support being compiled into machine instructions that use the first functional unit or the second functional unit; The generating, based on the execution order of the plurality of instructions in the first code and the context of the instructions, the configuration information in the plurality of instruction configuration files comprises: generating first configuration information corresponding to the first instruction based on the first instruction and a context of the first instruction, wherein the first configuration information is used to indicate that a machine instruction selected for the first instruction uses the first functional unit, and the context of the first instruction is used to indicate that the first functional unit and the second functional unit are not occupied; Based on the second instruction and the context of the second instruction, corresponding second configuration information is generated for the second instruction, wherein the second configuration information is used to indicate that the machine instruction selected for the second instruction uses the second functional unit, and the context of the second instruction is used to indicate that the first instruction executed before the second instruction has occupied the first functional unit.

8. The method according to any one of claims 1 to 7, characterized in that The first code is an intermediate code.

9. A parameterized instruction selection device, characterized in that: include: An acquisition module, configured to acquire a first code, where the first code includes a plurality of instructions; a processing module, configured to generate, based on the plurality of instructions, a plurality of machine instruction sets corresponding to the plurality of instructions, the plurality of instructions being used to select machine instructions for compilation from the corresponding machine instruction sets; The processing module is further configured to perform multiple rounds of machine instruction selection for the multiple instructions to obtain multiple target files, wherein the multiple target files are obtained by selecting different machine instruction combinations for the multiple instructions from the multiple machine instruction sets; The processing module is further configured to select a target file with the highest execution performance from the multiple target files.

10. The device according to claim 9, characterized in that The processing module is further configured to: generating a plurality of instruction configuration files based on the plurality of instructions, each instruction configuration file including at least one configuration information corresponding to a single instruction, the configuration information being used to indicate a condition that the corresponding instruction needs to satisfy when selecting a machine instruction; Multiple rounds of machine instruction selection are performed for the multiple instructions based on the multiple instruction configuration files to obtain the multiple target files, where the multiple target files correspond one-to-one to the multiple instruction configuration files.

11. The device according to claim 10, characterized in that The at least one configuration information includes one or more of the following conditions: the type of functional unit used by the machine instruction, whether the machine instruction updates the status register, the highest bit of the machine instruction, the addressing mode of the machine instruction, or whether the machine instruction contains an immediate value.

12. The device according to any one of claims 9 to 11, characterized in that: The processing module is further configured to: Configuration information in the plurality of instruction configuration files is generated based on the execution order of the plurality of instructions in the first code and the context of the instructions.

13. The device according to claim 12, characterized in that The processing module is further configured to: generating an instruction configuration template based on the execution order of the plurality of instructions in the first code, the instruction configuration template being used to indicate a target instruction among the plurality of instructions for which configuration information is to be generated and a position of the target instruction among the plurality of instructions; Based on the context of the target instruction, the corresponding configuration information is filled in the instruction configuration template for the target instruction in sequence to obtain a first instruction configuration file, wherein the context of the target instruction is obtained based on the position of the target instruction in the multiple instructions, and the multiple instruction configuration files include the first instruction configuration file.

14. The device according to claim 13, characterized in that When the configuration information in the first instruction configuration file is used to indicate the type of functional unit used by the machine instruction, the target instruction for which the configuration information needs to be generated supports compilation into a machine instruction that uses multiple functional units.

15. The device according to claim 12, characterized in that The multiple instructions include a first instruction and a second instruction, both of which support being compiled into machine instructions that use the first functional unit or the second functional unit; The processing module is further configured to: generating first configuration information corresponding to the first instruction based on the first instruction and a context of the first instruction, wherein the first configuration information is used to indicate that a machine instruction selected for the first instruction uses the first functional unit, and the context of the first instruction is used to indicate that the first functional unit and the second functional unit are not occupied; Based on the second instruction and the context of the second instruction, corresponding second configuration information is generated for the second instruction, wherein the second configuration information is used to indicate that the machine instruction selected for the second instruction uses the second functional unit, and the context of the second instruction is used to indicate that the first instruction executed before the second instruction has occupied the first functional unit.

16. The device according to any one of claims 9 to 15, characterized in that The first code is an intermediate code.

17. A parameterized instruction selection device, characterized in that: The device comprises a memory and a processor; the memory stores codes, the processor is configured to execute the codes, and when the codes are executed, the device executes the method according to any one of claims 1 to 8.

18. A computer storage medium, characterized in that The computer storage medium stores instructions, which, when executed by a computer, cause the computer to implement the method according to any one of claims 1 to 8.

19. A computer program product, characterized in that The computer program product stores instructions, which, when executed by a computer, cause the computer to implement the method according to any one of claims 1 to 8.

Images