Data transmission method and related device

By directly writing data to the storage space of the network card in computer communication and using notification messages to process data, the transmission delay and memory usage problems between the host and the network card are solved, and more efficient data transmission is achieved.

WO2025180321A1PCT designated stage Publication Date: 2025-09-04HUAWEI TECH CO LTD
View PDF 5 Cites 0 Cited by

Patent Information

Application Number
PCT/CN2025/078756
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-02-29
Filing Date
2025-02-24
Publication Date
2025-09-04

AI Technical Summary

Technical Problem

During computer communication, in the prior art, when sending data to be transmitted from the host to the network card, there are problems with large transmission delay and large host memory space.

Method used

By obtaining the reserved storage space address in the network card, the target data and queue elements are written directly into the network card's storage space, and the notification message instructs the network card to process the data, reducing the number of times the data is copied in the host memory and the PCIe bus interaction.

Benefits of technology

It reduces the data transmission delay and the use of host memory space, and improves data transmission efficiency.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN2025078756_04092025_PF_FP_ABST
    Figure CN2025078756_04092025_PF_FP_ABST
Patent Text Reader

Abstract

The present application provides a data transmission method and a related device. The data transmission method can be applied to a host in a computing device, the computing device further comprises a network interface card, and the host is communicatively connected to the network interface card. The data transmission method comprises: acquiring a first storage address and a second storage address; writing target data into a first address space in the network interface card, and one or more queue elements into a second address space in the network interface card, wherein the target data comprises one or more segments of sub-data, and each queue element corresponds to one segment of sub-data among the target data; and sending notification information to the network interface card, the notification information being used for instructing the network interface card to respectively process corresponding sub-data on the basis of descriptor information in the one or more queue elements. The data transmission method can be used for reducing a transmission delay of sending data to be transmitted from the host to the network interface card in a computer communication process, and reducing the occupation of a memory space of the host.
Need to check novelty before this filing date? Find Prior Art

Description

A data transmission method and related equipment

[0001] This application claims priority to the Chinese patent application with application number 202410245922.2 filed with the State Intellectual Property Office of China on February 29, 2024, and priority to the Chinese patent application with the invention name “A Data Transmission Method and Related Equipment”, all contents of which are incorporated by reference into this application. Technical Field

[0002] The present application relates to the field of computer technology, and in particular to a data transmission method and related equipment. Background Art

[0003] During computer communication, data to be transmitted typically needs to be sent from the sending host to the sending network interface card (NIC), which then transmits the data to the receiving end. Currently, sending data from the sending host to the NIC typically requires multiple data exchanges between the host and the NIC, such as copying the data to be transmitted and queue elements (e.g., work queue elements (WQEs)).

[0004] Because hosts and peripherals like network cards are often connected via the Peripheral Component Interconnect Express (PCIe) bus, multiple data exchanges between the host and the network card must occur via the PCIe bus ports, often resulting in significant transmission latency. Furthermore, in existing technologies, these multiple data exchanges between the host and the network card also occupy a significant amount of host memory space.

[0005] Therefore, in the process of computer communication, how to reduce the transmission delay of sending the data to be transmitted from the host to the network card and reduce the occupation of the host memory space is an urgent problem to be solved. Summary of the Invention

[0006] In order to solve the above technical problems, an embodiment of the present application provides a data transmission method and related equipment, which is used to reduce the transmission delay of sending the data to be transmitted from the host to the network card during computer communication and reduce the occupancy of the host memory space.

[0007] In a first aspect, an embodiment of the present application provides a data transmission method, which can be applied to a host in a computing device, wherein the computing device also includes a network card, and the host is in communication with the network card; the data transmission method may include:

[0008] Obtain a first storage address and a second storage address, wherein the first storage address and the second storage address correspond to a first address space and a second address space in the network card, respectively; write target data to the first address space in the network card, and write one or more queue elements to the second address space in the network card; wherein the target data includes one or more segments of sub-data, each queue element in the one or more queue elements corresponds to a segment of sub-data in the target data, and each queue element includes descriptor information of the corresponding sub-data; send notification information to the network card, wherein the notification information is used to instruct the network card to process the corresponding sub-data respectively based on the descriptor information in the one or more queue elements.

[0009] An embodiment of the present application provides a data transmission method, which can be applied to a host in a computing device, which is communicatively connected to a network card in the computing device; regarding how to send data to be transmitted from the host to the network card during computer communication, the existing technology generally writes the data to be transmitted and the corresponding queue element into the host's memory, and then the network card reads the data to be transmitted and the queue element from the host's memory respectively. On the one hand, there are multiple data copy processes (for example, copying the data to be transmitted from the user state of the operating system to the kernel state, and then copying it from the host's memory to the network card's memory), and on the other hand, multiple data interactions are required through the port of the PCIe bus, which increases the overall transmission delay. ; In the data transmission method provided in the embodiment of the present application, after the host obtains the address of the storage space reserved in the network card (i.e., the first storage address and the second storage address corresponding to the first address space and the second address space respectively), the data to be transmitted (i.e., the target data) and the corresponding queue element are written into the storage space through the address, and then the host sends a notification message to instruct the network card to process the data to be transmitted based on the queue element. This can reduce the number of data copies in the process of sending the data to be transmitted from the host to the network card (for example, the process of copying the queue element from the host's memory to the network card's memory can be omitted) and the number of data interactions via the PCIe bus port, thereby reducing the overall transmission delay. In addition, in the prior art, it is usually necessary to apply for memory in the host to store the data to be transmitted (as a cache buffer) and the corresponding queue elements, while the data transmission method provided in the embodiment of the present application enables the host to use the storage space in the network card through the corresponding address, thereby reducing the occupancy of the host's memory space.

[0010] In one possible implementation, the host includes a base address register, and the base address register is configured to be accessible to both the host and the network card; obtaining the first storage address and the second storage address includes: reading the first storage address and the second storage address in the base address register, wherein the first storage address and the second storage address in the base address register are written to the base address register by the network card. The embodiment of the present application provides a specific solution for the host to obtain the address of the storage space reserved in the network card. Since both the host and the network card can access the base address register in the PCIe configuration space, after the network card writes the address of the reserved storage space to the corresponding base address register, the host can obtain the address by reading the value in the base address register. The solution is simple and fast.

[0011] In one possible implementation, before writing one or more queue elements to the second address space in the network card, the method further includes: determining the descriptor information in the one or more queue elements based on the first storage address, wherein the descriptor information includes physical address information corresponding to the writing of the corresponding sub-data into the first address space. This embodiment of the present application provides a specific composition scheme for queue elements, wherein the queue elements may include descriptor information, which may be physical address information, so that the network card can determine the physical address of the corresponding sub-data after writing to the first address space based on the descriptor information in each queue element.

[0012] In one possible implementation, the physical address information includes an operation key and data length of the corresponding sub-data, and a virtual address corresponding to the sub-data written into the first address space. The operation key is used to determine the mapping relationship between the virtual address and the physical address of the first address space. The embodiment of the present application provides a specific composition scheme for queue elements. The queue elements may include descriptor information. The network card can determine the physical address of the corresponding sub-data after it is written into the first address space based on the operation key, data length, and virtual address (i.e., physical address information) in the descriptor information of each queue element.

[0013] In one possible implementation, the target data is written to the first address space in the network card, and the one or more queue elements are written to the second address space in the network card, including: based on the first storage address, the target data is written to the first address space by executing a load instruction and a store instruction or by direct memory access; and based on the second storage address, the one or more queue elements are written to the second address space by executing a load instruction and a store instruction or by direct memory access. The embodiment of the present application provides a specific scheme for writing target data and queue elements to a storage space reserved in a network card. In addition to the direct memory access writing method, the target data and queue elements can also be written by executing load instructions and store instructions, using accumulators, special registers, etc. The scheme is simple and fast.

[0014] In one possible implementation, the first storage address and the second storage address are virtual addresses corresponding to the first address space and the second address space, respectively. This embodiment of the present application provides a specific composition scheme for the address of the storage space reserved in the network card, and the address can be a virtual address corresponding to the storage space (for example, the starting address of the storage space in the base address register).

[0015] In one possible implementation, the first address space and the second address space are both located in a target memory in the network card, and the target memory is a static random access memory or a dynamic random access memory. This embodiment of the present application provides a specific solution for the location of a reserved storage space in a network card. The storage space can be located in the static random access memory or the dynamic random access memory in the network card, which is simple and flexible.

[0016] In a second aspect, an embodiment of the present application provides a data transmission method, which can be applied to a network card in a computing device, wherein the computing device also includes a host, and the host is communicatively connected to the network card; the data transmission method may include:

[0017] Sending a first storage address and a second storage address to the host, wherein the first storage address and the second storage address respectively correspond to the first address space and the second address space in the network card; receiving notification information sent by the host, and obtaining one or more queue elements based on the notification information, wherein the one or more queue elements are written by the host to the second address space, each of the one or more queue elements corresponds to a piece of sub-data, and each queue element includes descriptor information of the corresponding sub-data; processing the corresponding sub-data respectively based on the descriptor information in the one or more queue elements, and the sub-data corresponding to each queue element is written by the host to the first address space.

[0018] An embodiment of the present application provides a data transmission method, which can be applied to a network card in a computing device, and the network card is communicatively connected to a host in the computing device; regarding how to send data to be transmitted from the host to the network card during computer communication, the existing technology generally writes the data to be transmitted and the corresponding queue element into the host's memory, and then the network card reads the data to be transmitted and the queue element from the host's memory respectively. On the one hand, there are multiple data copy processes (for example, copying the data to be transmitted from the user state of the operating system to the kernel state, and then copying it from the host's memory to the network card's memory), and on the other hand, multiple data interactions are required through the port of the PCIe bus, which increases the overall transmission delay; and in the present application, In the data transmission method provided in the embodiment of the application, the network card can send the address of the reserved storage space (i.e., the first storage address and the second storage address corresponding to the first address space and the second address space, respectively) to the host, and then after the host writes the data to be transmitted (i.e., the target data) and the corresponding queue element into the storage space through the address, the network card receives the notification message sent by the host, and then processes the data to be transmitted based on the queue element, which can reduce the number of data copies in the process of sending the data to be transmitted from the host to the network card (for example, the process of copying the queue element from the host's memory to the network card's memory can be omitted) and the number of data interactions via the PCIe bus port, thereby reducing the overall transmission delay. In addition, in the prior art, it is usually necessary to apply for memory in the host to store the data to be transmitted (as a cache buffer) and the corresponding queue elements, while the data transmission method provided in the embodiment of the present application enables the host to use the storage space in the network card through the corresponding address, thereby reducing the occupancy of the host's memory space.

[0019] In one possible implementation, the host includes a base address register, and the base address register is configured to be accessible to both the host and the network card; sending the first storage address and the second storage address to the host includes: writing the first storage address and the second storage address into the base address register. This embodiment of the present application provides a specific solution for a network card to send the address of a reserved storage space to a host. Since both the host and the network card can access the base address register in the PCIe configuration space, after the network card writes the address of the reserved storage space to the corresponding base address register, the host can obtain the address by reading the value in the base address register. This solution is simple and quick.

[0020] In one possible implementation, the descriptor information includes physical address information corresponding to the corresponding sub-data in the first address space. This embodiment of the present application provides a specific composition scheme for queue elements. Queue elements may include descriptor information, which may be physical address information. Thus, the network card can determine the physical address of the corresponding sub-data in the first address space based on the descriptor information in each queue element.

[0021] In one possible implementation, the physical address information includes an operation key, a data length, and a virtual address corresponding to the corresponding sub-data in the first address space. The operation key is used to determine a mapping relationship between a virtual address and a physical address in the first address space. This embodiment of the present application provides a specific composition scheme for queue elements. Queue elements may include descriptor information. The network card may determine the physical address of the corresponding sub-data in the first address space based on the operation key, data length, and virtual address (i.e., physical address information) in the descriptor information of each queue element.

[0022] In one possible implementation, the processing of the corresponding sub-data based on the descriptor information in the one or more queue elements includes: determining the physical address of the corresponding sub-data in the first address space based on the descriptor information in each queue element, and obtaining the sub-data based on the physical address; and encapsulating the corresponding sub-data into a corresponding message based on the descriptor information in each queue element. The embodiment of the present application provides a specific solution for a network card to process data to be transmitted based on queue elements. The network card can determine the physical address of the corresponding sub-data based on the descriptor information in each queue element, and then obtain the sub-data, and then encapsulate the sub-data based on the descriptor information to obtain the corresponding message. The solution is simple and fast.

[0023] In one possible implementation, the first storage address and the second storage address are virtual addresses corresponding to the first address space and the second address space, respectively. This embodiment of the present application provides a specific composition scheme for the address of the storage space reserved in the network card, and the address can be a virtual address corresponding to the storage space (for example, the starting address of the storage space in the base address register).

[0024] In one possible implementation, the first address space and the second address space are both located in a target memory in the network card, and the target memory is a static random access memory or a dynamic random access memory. This embodiment of the present application provides a specific solution for the location of a reserved storage space in a network card. The storage space can be located in the static random access memory or the dynamic random access memory in the network card, which is simple and flexible.

[0025] In a third aspect, an embodiment of the present application provides a computing device, which may include a host and a network card, wherein the host is communicatively connected to the network card; the host is configured to:

[0026] Obtain a first storage address and a second storage address, wherein the first storage address and the second storage address correspond to a first address space and a second address space in the network card, respectively; write target data to the first address space in the network card, and write one or more queue elements to the second address space in the network card; wherein the target data includes one or more segments of sub-data, each queue element in the one or more queue elements corresponds to a segment of sub-data in the target data, and each queue element includes descriptor information of the corresponding sub-data; send notification information to the network card, wherein the notification information is used to instruct the network card to process the corresponding sub-data respectively based on the descriptor information in the one or more queue elements.

[0027] An embodiment of the present application provides a computing device, which may include a host and a network card, wherein the host is in communication connection with the network card; regarding how to send data to be transmitted from the host to the network card during computer communication, the prior art generally writes the data to be transmitted and the corresponding queue element into the host's memory, and then the network card reads the data to be transmitted and the queue element from the host's memory respectively. On the one hand, there are multiple data copy processes (for example, copying the data to be transmitted from the user state of the operating system to the kernel state, and then copying it from the host's memory to the network card's memory), and on the other hand, multiple data interactions are required through the port of the PCIe bus, which increases the overall transmission delay; and in the present application In the computing device provided in the embodiment, after the host obtains the address of the storage space reserved in the network card (i.e., the first storage address and the second storage address corresponding to the first address space and the second address space respectively), the data to be transmitted (i.e., the target data) and the corresponding queue element are written into the storage space through the address, and then the host sends a notification message to instruct the network card to process the data to be transmitted based on the queue element. This can reduce the number of data copies in the process of sending the data to be transmitted from the host to the network card (for example, the process of copying the queue element from the host's memory to the network card's memory can be omitted) and the number of data interactions via the PCIe bus port, thereby reducing the overall transmission delay. In addition, in the prior art, it is usually necessary to apply for memory in the host to store the data to be transmitted (as a cache buffer) and the corresponding queue elements, while the data transmission method provided in the embodiment of the present application enables the host to use the storage space in the network card through the corresponding address, thereby reducing the occupancy of the host memory space.

[0028] In one possible implementation, the host includes a base address register, which is configured to be accessible to both the host and the network card; the host is specifically used to: read the first storage address and the second storage address in the base address register, where the first storage address and the second storage address in the base address register are written into the base address register by the network card.

[0029] In a possible implementation, the host is specifically configured to determine the descriptor information in the one or more queue elements based on the first storage address, where the descriptor information includes physical address information corresponding to the writing of the corresponding sub-data into the first address space.

[0030] In one possible implementation, the physical address information includes an operation key of the corresponding sub-data, a data length, and a virtual address corresponding to the writing of the corresponding sub-data to the first address space, and the operation key is used to determine the mapping relationship between the virtual address and the physical address of the first address space.

[0031] In one possible implementation, the host is specifically used to: based on the first storage address, write the target data into the first address space by executing a load instruction and a store instruction or through direct memory access; and based on the second storage address, write the one or more queue elements into the second address space by executing a load instruction and a store instruction or through direct memory access.

[0032] In a possible implementation, the first storage address and the second storage address are virtual addresses corresponding to the first address space and the second address space, respectively.

[0033] In a possible implementation, the first address space and the second address space are both located in a target memory in the network card, and the target memory is a static random access memory or a dynamic random access memory.

[0034] In a fourth aspect, an embodiment of the present application provides a computing device, which may include a host and a network card, wherein the host is in communication with the network card; the network card is configured to:

[0035] Sending a first storage address and a second storage address to the host, wherein the first storage address and the second storage address correspond to the first address space and the second address space in the network card, respectively; receiving notification information sent by the host, and obtaining one or more queue elements based on the notification information, wherein the one or more queue elements are located in the second address space, each of the one or more queue elements corresponds to a segment of sub-data, and each queue element includes descriptor information of the corresponding sub-data; processing the corresponding sub-data respectively based on the descriptor information in the one or more queue elements, and the sub-data corresponding to each queue element is located in the first address space.

[0036] An embodiment of the present application provides a computing device, which may include a host and a network card, wherein the host is communicatively connected to the network card; regarding how to send data to be transmitted from the host to the network card during computer communication, the existing technology generally writes the data to be transmitted and the corresponding queue element into the host's memory, and then the network card reads the data to be transmitted and the queue element from the host's memory respectively. On the one hand, there are multiple data copy processes (for example, copying the data to be transmitted from the user state of the operating system to the kernel state, and then copying it from the host's memory to the network card's memory), and on the other hand, multiple data interactions are required through the port of the PCIe bus, which increases the overall transmission delay; and in the embodiment of the present application, In the provided computing device, the network card can send the address of the reserved storage space (i.e., the first storage address and the second storage address corresponding to the first address space and the second address space, respectively) to the host, and then after the host writes the data to be transmitted (i.e., the target data) and the corresponding queue element into the storage space through the address, the network card receives the notification message sent by the host, and then processes the data to be transmitted based on the queue element, which can reduce the number of data copies in the process of sending the data to be transmitted from the host to the network card (for example, the process of copying the queue element from the host's memory to the network card's memory can be omitted) and the number of data interactions via the PCIe bus port, thereby reducing the overall transmission delay. In addition, in the prior art, it is usually necessary to apply for memory in the host to store the data to be transmitted (as a cache buffer) and the corresponding queue elements, while the data transmission method provided in the embodiment of the present application enables the host to use the storage space in the network card through the corresponding address, thereby reducing the occupancy of the host memory space.

[0037] In a possible implementation, the host includes a base address register, and the base address register is configured to be accessible to both the host and the network card; the network card is specifically configured to write the first storage address and the second storage address into the base address register.

[0038] In a possible implementation, the descriptor information includes physical address information corresponding to the corresponding sub-data in the first address space.

[0039] In one possible implementation, the physical address information includes an operation key, data length, and a virtual address corresponding to the corresponding sub-data in the first address space, and the operation key is used to determine a mapping relationship between the virtual address and the physical address of the first address space.

[0040] In one possible implementation, the network card is specifically used to: determine the physical address of the corresponding sub-data in the first address space based on the descriptor information in each queue element, and obtain the sub-data based on the physical address; and encapsulate the corresponding sub-data into a corresponding message based on the descriptor information in each queue element.

[0041] In a possible implementation, the first storage address and the second storage address are virtual addresses corresponding to the first address space and the second address space, respectively.

[0042] In a possible implementation, the first address space and the second address space are both located in a target memory in the network card, and the target memory is a static random access memory or a dynamic random access memory.

[0043] In a fifth aspect, an embodiment of the present application provides a computer program product, which includes computer program code. When the computer program product runs on a computer, it enables the computer to execute the data transmission method in any possible implementation of the first aspect or the second aspect above.

[0044] In a sixth aspect, an embodiment of the present application provides a computer-readable storage medium comprising computer instructions, which, when executed on a computing device, enables the computing device to execute the data transmission method provided in any possible implementation of the first or second aspect above.

[0045] It is understandable that the computing devices provided in the third and fourth aspects, the computer program product provided in the fifth aspect, and the computer-readable storage medium provided in the sixth aspect are all used to execute the data transmission method provided in any possible implementation of the first or second aspects of this application. Therefore, the beneficial effects that can be achieved can be referenced to the beneficial effects of the corresponding methods and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0046] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0047] FIG1A is a schematic diagram showing the principle of an existing data transmission method provided by an embodiment of the present application;

[0048] FIG1B is a schematic diagram of the architecture of a computing device provided in an embodiment of the present application;

[0049] FIG2 is a schematic diagram of an application scenario of a data transmission method and related devices provided in an embodiment of the present application;

[0050] FIG3A is a schematic diagram of a flow chart of a data transmission method provided in an embodiment of the present application;

[0051] FIG3B is a schematic diagram showing the principle of a data transmission method provided in an embodiment of the present application;

[0052] FIG3C is a schematic diagram showing the principle of another data transmission method provided in an embodiment of the present application;

[0053] FIG4 is a flow chart of another data transmission method provided in an embodiment of the present application;

[0054] FIG5 is a flow chart of another data transmission method provided in an embodiment of the present application;

[0055] FIG6A is a schematic diagram showing the principle of another data transmission method provided in an embodiment of the present application;

[0056] FIG6B is a schematic diagram showing the principle of another data transmission method provided in an embodiment of the present application;

[0057] FIG6C is a schematic diagram showing the principle of another data transmission method provided in an embodiment of the present application;

[0058] FIG7 is a schematic diagram of the structure of a computing device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0059] The embodiments of the present application will be described below in conjunction with the drawings in the embodiments of the present application.

[0060] The terms "first," "second," "third," and "fourth," etc., in the specification and claims of this application and the accompanying drawings are used to distinguish between different objects, rather than to describe a specific order. In addition, the terms "including," "having," and any variations thereof, are intended to cover non-exclusive inclusions. For example, a process, method, system, product, or apparatus comprising a series of steps or elements is not limited to the listed steps or elements, but may optionally include steps or elements not listed, or may optionally include other steps or elements inherent to the process, method, product, or apparatus.

[0061] References herein to "embodiments" mean that a particular feature, structure, or characteristic described in connection with the embodiments may be included in at least one embodiment of the present application. The appearance of this phrase in various places in the specification does not necessarily refer to the same embodiment, nor does it constitute an independent or alternative embodiment that is mutually exclusive of other embodiments. It is understood, both explicitly and implicitly, by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0062] As used in this specification, the terms "component," "module," "system," and the like are used to represent computer-related entities, hardware, firmware, a combination of hardware and software, software, or software in execution. For example, a component can be, but is not limited to, a process running on a processor, a processor, an object, an executable file, an execution thread, a program, and / or a computer. By way of illustration, both an application running on a computing device and a computing device can be a component. One or more components can reside in a process and / or an execution thread, and a component can be located on a computer and / or distributed between two or more computers. In addition, these components can be executed from various computer-readable media having various data structures stored thereon. Components can communicate, for example, via local and / or remote processes based on signals having one or more data packets (e.g., data from two components interacting with another component on a local system, a distributed system, and / or a network, such as the Internet interacting with other systems via signals).

[0063] First, the technical problems that the present application specifically aims to solve are analyzed and proposed. In the process of computer communication, when the sending end transmits data to the receiving end, the data to be transmitted needs to be sent from the host to the network card first. Please refer to Figure 1A for details. Figure 1A is a schematic diagram of the principle of an existing data transmission method provided by an embodiment of the present application. As shown in Figure 1A, when the local end (i.e., the sending end) transmits data to the opposite end 103, the data to be transmitted needs to be sent from the host 101 in the local end to the network card 102 first, and then the network card 102 transmits the data to the opposite end 103, wherein the host 101 and the network card 102 can be connected via a PCIe bus communication. In the prior art, the data transmission method in which the local end sends the data to be transmitted from the host to the network card generally requires first writing the data to be transmitted and the corresponding queue element into the host memory. The data transmission method can specifically include the following steps 1 to 7.

[0064] Step 1: The host's application (i.e., the network card driver) writes the data to be transmitted and the corresponding queue elements to the host's memory. For example, as shown in ① in Figure 1A, the central processing unit 1011 in the host 101 runs the network card driver and copies the data sent from the user state of the host 101 to the kernel state address space (i.e., memory 1014) through the PCIe bridge (PCIe Bridge) 1012.

[0065] Step 2: The host application notifies the network card to read the data to be transmitted and the corresponding queue elements in the host memory. For example, as shown in ② in Figure 1A, the host 101 can send the corresponding notification message to the network card 102 through the downstream port of the PCIe bus, that is, from PCIe endpoint (Endpoint) 1013 to PCIe endpoint 1021.

[0066] Step 3: The NIC reads the queue element from the host's memory and sends it to the NIC's memory. For example, as shown in ③ in FIG1A , the NIC 102 may read the queue element from the memory 1014 of the host 101 and send the queue element to the memory 1023 via direct memory access (DMA) and the downstream port of the PCIe bus (from PCIe endpoint 1013 to PCIe endpoint 1021).

[0067] Step 4: The network card reads the queue element in the memory and generates a buffer descriptor (BD) information for direct memory access based on the queue element. For example, as shown in ④ in Figure 1A, the processor 1022 in the network card 102 can read the queue element from the memory 1023 and parse it, thereby generating buffer descriptor information that the network card 102 can recognize.

[0068] Step 5: The network card sends the generated cache descriptor information to the host. For example, as shown in step ⑤ in FIG1A , the network card 102 may send the generated cache descriptor information to the host 101 via the upstream port of the PCIe bus (from PCIe endpoint 1021 to PCIe endpoint 1013).

[0069] Step 6: The network card sends the data to be transmitted in the host memory to the network card memory through direct memory access. For example, as shown in ⑥ in Figure 1A, the network card 102 can send the data to be transmitted in the memory 1014 of the host 101 to the memory 1023 through direct memory access and the downstream port of the PCIe bus (from PCIe endpoint 1013 to PCIe endpoint 1021).

[0070] Step 7: The network card reads the data to be transmitted in the memory and encapsulates the data to be transmitted into a corresponding message based on the corresponding queue element. For example, as shown in ⑦ in Figure 1A, the processor 1022 in the network card 102 can read the data to be transmitted from the memory 1023 and generate a corresponding message.

[0071] The data transmission method described above has the following disadvantages:

[0072] Disadvantage 1: The overall transmission delay is relatively large. On the one hand, this method requires writing the data to be transmitted and the corresponding queue element to the host's memory (such as step 1 above), and then the network card reads the data to be transmitted and the queue element from the host's memory respectively (such as steps 2 to 6 above). There are multiple data copy processes, which increases the transmission delay. For example, as shown in Figure 1A, in the above step 1, the central processing unit 1011 of the host 101 needs to copy the data to the memory 1014. At this time, the memory 1014 is a double data rate synchronous dynamic random access memory (DDR). Taking SDRAM as an example, the delay of copying data to the memory 1014 is about 100 nanoseconds. On the other hand, this method also requires multiple data exchanges through the ports of the PCIe bus, which increases the transmission delay. For example, as shown in Figure 1A, in the above steps 2, 3, 5 and 6, the host 101 and the network card 102 need to perform multiple data exchanges through the upstream or downstream ports of the PCIe bus. Each data exchange includes at least the inherent delay of the PCIe bus reading and writing, which is about 500 nanoseconds.

[0073] Disadvantage 2: It takes up a lot of host memory space. This method requires allocating memory in the host. For example, as shown in Figure 1A, before executing step 1 above, the CPU 1011 in the host 101 needs to run the network card driver and request memory from the memory 1014 to store the data to be transmitted (as a buffer) and the corresponding queue elements.

[0074] Taking into account the shortcomings of the existing technology, the technical problems that this application actually aims to solve include: during computer communication, how to reduce the transmission delay of sending the data to be transmitted from the host to the network card and reduce the occupation of the host memory space.

[0075] Based on the technical problems raised above, in order to facilitate understanding of the embodiments of the present application, the composition architecture of one of the computing devices on which the embodiments of the present application are based is exemplarily described below. Please refer to Figure 1B, which is a schematic diagram of the architecture of a computing device provided by an embodiment of the present application. As shown in Figure 1B, the computing device as this end (i.e., the sending end) may include a host 101 and a network card 102, and the host 101 and the network card 102 may be connected to each other via a PCIe bus communication. In addition, the network card 102 may be connected to the opposite end 103 (i.e., the receiving end), so that in the computer communication process, the data to be transmitted can be first sent from the host 101 in the local end to the network card 102, and then the network card 102 transmits the data to the opposite end 103.

[0076] The host 101 may include a central processing unit 1011, a PCIe bridge 1012, a PCIe endpoint 1013, and a memory 1014. The network card 102 may include a PCIe endpoint 1021, a processor 1022, and a memory 1023. Optionally, the network card 102 may further include a memory 1024, which may be an external memory. Specifically, the central processing unit 1011, the PCIe endpoint 1013, and the memory 1014 in the host 101 may be communicatively connected via the PCIe bridge 1012. The host 101 and the network card 102 may be communicatively connected via the PCIe endpoint 1013 and the PCIe endpoint 1021. The PCIe endpoint 1021, the processor 1022, the memory 1023, and the memory 1024 in the network card may also be communicatively connected to each other.

[0077] It can be understood that the component architecture in Figure 1B is only an exemplary implementation in the embodiment of the present application, and the computing device in the embodiment of the present application includes but is not limited to the above component architecture.

[0078] To facilitate understanding of the embodiments of the present application, the following examples illustrate scenarios in which the data transmission method and related devices in the present application are applied, which may include:

[0079] Scenario 1: During computer communication, when the sending end transmits data to the receiving end based on the Transmission Control Protocol or Internet Protocol (TCP / IP protocol), please refer to Figure 2. Figure 2 is a schematic diagram of an application scenario of a data transmission method and related equipment provided in an embodiment of the present application. As shown in (1) in Figure 2, during data transmission based on the TCP / IP protocol, the sending end 201 can send data from the host to the local network card through the network programming socket (Socket nested word) and the local network card driver at the local application layer, and then the local network card of the sending end 201 sends the data to be transmitted to the remote network card in the receiving end 203 through the network transmission medium 202. Thereafter, the remote application layer of the receiving end 203 obtains the data in the remote network card; wherein, the data transmission method and related equipment provided in the embodiment of the present application can be used to reduce the transmission delay of sending data from the local application layer of the sending end 201 to the local network card, and reduce the occupancy of the host memory of the sending end 201.

[0080] Scenario 2: During computer communication, when the sending end transmits data to the receiving end based on a network communication protocol that supports Remote Direct Memory Access (RDMA) technology, as shown in (2) in FIG2 , during data transmission based on RDMA technology, the sending end 204 can send data from the host to the local RDMA network card (supporting RDMA function) through the RDMA application programming interface (i.e., Verbs interface) and the local network card driver at the local application layer. Then, the local RDMA network card of the sending end 204 sends the data to be transmitted to the RDMA network card in the receiving end 206 through the network transmission medium 205. After that, the remote application layer of the receiving end 206 obtains the data in the RDMA network card. Among them, the network communication protocol that supports RDMA technology may include the IB (InfiniBand) protocol, RDMA over Converged Ethernet (RDMA over Converged Ethernet), and the like. Ethernet, RoCE) protocol, Internet Wide Area RDMA Protocol (iWARP), etc.; the data transmission method and related equipment provided in the embodiments of the present application can be used to reduce the transmission delay of sending data from the local application layer of the sending end 204 to the local RDMA network card, and reduce the host memory usage of the sending end 204.

[0081] It can be understood that the above application scenario is only an exemplary implementation in the embodiment of the present application, and the application scenarios in the embodiment of the present application include but are not limited to the above application scenarios.

[0082] Based on the composition architecture of the computing device provided in FIG1B and the corresponding application scenario in this application, and in combination with the data transmission method provided in this application, the technical problems raised in this application are specifically analyzed and solved.

[0083] Please refer to Figure 3A, which is a schematic flow diagram of a data transmission method provided in an embodiment of the present application. This method can be applied to the computing device architecture described in Figure 1B above, wherein the host 101 can be used to support and execute steps S301 through S304 of the method flow shown in Figure 3A. The following description will be based on the host side of the computing device, with reference to Figure 3A. The method may specifically include the following steps S301, S303, and S304, and may optionally include step S302.

[0084] Step S301: Acquire a first storage address and a second storage address.

[0085] Specifically, the first storage address and the second storage address correspond to a first address space and a second address space in the network card, respectively.

[0086] In one possible implementation, the host includes a base address register, which is configured to be accessible to both the host and the network card; obtaining the first storage address and the second storage address includes: reading the first storage address and the second storage address in the base address register, where the first storage address and the second storage address in the base address register are written by the network card to the base address register. For example, please refer to Figure 3B, which is a schematic diagram of the principle of a data transmission method provided by an embodiment of the present application. As shown in Figure 3B, the host's PCIe configuration space may include multiple base address registers (Base Address Register, BAR), wherein, when the base address register N is configured to be accessible to both the host and the network card, if the network card reserves a portion of storage space in the on-chip memory space (On Chip Memory Space) or the external memory space (Extend DDR Space), and writes the address of the reserved storage space to the base address register N in the PCIe configuration space, the host can obtain the address by reading the base address register N, thereby establishing a space mapping between the reserved storage space and the host's direct memory space (Direct Memory Space), that is, exposing the reserved storage space to the kernel of the host operating system.

[0087] Exemplarily, the first storage address and the second storage address are virtual addresses corresponding to the first address space and the second address space, respectively. For example, the first storage address and the second storage address may be virtual addresses corresponding to actual physical addresses of the first address space and the second address space, respectively, after being processed by an input / output memory management unit (IOMMU).

[0088] Exemplarily, the first address space and the second address space are both located in a target memory in the network card, and the target memory is a static random access memory or a dynamic random access memory.

[0089] Optionally, before executing step S303, that is, before writing one or more queue elements into the second address space in the network card, the following step S302 may be further included:

[0090] Step S302: Determine the descriptor information in the one or more queue elements based on the first storage address.

[0091] Specifically, the descriptor information includes physical address information corresponding to the sub-data written into the first address space. At this time, the physical address information corresponds to the actual physical address after the sub-data is written into the first address space in the network card.

[0092] Optionally, the physical address information includes an operation key of the corresponding sub-data, a data length, and a virtual address corresponding to the writing of the corresponding sub-data to the first address space, and the operation key is used to determine the mapping relationship between the virtual address and the physical address of the first address space. For example, when the one or more queue elements are one or more work queue elements WQE, and the work queue element corresponds to a work request sent by the host to the network card, each work queue element WQE may include a local address (i.e., a virtual address corresponding to the writing of the corresponding sub-data to the first address space), a local key (i.e., an operation key of the corresponding sub-data), and a data size (i.e., a data length of the corresponding sub-data), wherein the network card can determine the corresponding mapping table through the local key, thereby determining the mapping relationship between the local address and the actual physical address of the corresponding sub-data written to the first address space through the mapping table, and then can determine the actual physical address in combination with the data size.

[0093] Step S303: writing target data into the first address space in the network card, and writing one or more queue elements into the second address space in the network card.

[0094] Specifically, the target data includes one or more segments of sub-data, each of the one or more queue elements corresponds to a segment of sub-data in the target data, and each of the queue elements includes descriptor information of the corresponding sub-data.

[0095] Exemplarily, the host can write the target data and the one or more queue elements to the first address space and the second address space respectively through the first storage address and the second storage address. For example, after the host reads the first storage address and the second storage address from the base address register, the host's network card driver can map the first storage address and the second storage address to the host CPU's addressing space by calling a memory-mapped I / O (MMIO) function provided by the operating system, thereby allowing the host to use the same assembly instructions as those used to read and write memory to access the first address space and the second address space.

[0096] Exemplarily, the one or more queue elements may be one or more work queue elements (WQEs), which may correspond to work requests sent by the host to the network interface card (NIC). For example, when the host sends a write work request to the RDMA NIC, the corresponding work queue element (WQE) may be sent to a send queue (Send Queue, SQ), and the NIC may then read the work queue element (WQE) from the send queue.

[0097] Optionally, writing the target data to the first address space in the network card and writing one or more queue elements to the second address space in the network card include: based on the first storage address, writing the target data to the first address space by executing a load instruction and a store instruction or through direct memory access; and based on the second storage address, writing the one or more queue elements to the second address space by executing a load instruction and a store instruction or through direct memory access.

[0098] Optionally, before executing step S303, the host's network card driver may determine a memory space in the host or network card for remote direct memory access by performing a memory registration (MR) operation. For example, the host's network card driver may determine a memory space in the network card's on-chip memory that has the same data size as the target data by performing the MR operation, register the memory space as an RDMA protection domain (RDMA Memory Region), and determine the RDMA protection domain's starting address, data length, operation key, and other attributes.

[0099] Illustratively, before executing step S303 , when the network card driver of the host performs a memory registration operation, the memory space for remote direct memory access may be determined based on the target data and the data size of the one or more queue elements. For example, please refer to Figure 3C, which is a schematic diagram of the principle of another data transmission method provided by an embodiment of the present application. As shown in (1) in Figure 3C, when the host's network card driver performs a memory registration operation, it can first call a PCIe device memory application function (such as a pcie dma allloc function) to determine a memory space for remote direct memory access in the network card's on-chip memory. The memory space can be used to store M queue elements including a send work queue, a receive work queue (Receive Queue, RQ), and a completion work queue (Completion Queue, CQ). At this time, the total data size of the M queue elements should be less than or equal to the queue specification size specified by the network card's on-chip memory; in addition, another memory space for remote direct memory access can be determined in the host's memory through a host memory application function (such as a kmalloc function). The memory space can be used to store other N queue elements. Accordingly, as shown in (2) in FIG3C , when the host's network card driver performs a memory registration operation, it can also first determine a memory space for remote direct memory access in the network card's on-chip memory by calling the PCIe device memory request function. This memory space can be used to store data to be transmitted (as a cache buffer), that is, M sub-data corresponding to the M queue elements shown in (1) in FIG3C ; in addition, another memory space for remote direct memory access can be determined in the host's memory through the host memory request function. This memory space can be used to store N sub-data corresponding to the other N queue elements shown in (1) in FIG3C .

[0100] Step S304: Send notification information to the network card.

[0101] Specifically, the notification information is used to instruct the network card to process corresponding sub-data respectively based on the descriptor information in the one or more queue elements.

[0102] Exemplarily, the notification information may be a doorbell (DB) message. The host may write data to the Doorbell address in the virtual address space to instruct the network card to determine the corresponding queue element based on the offset of the Doorbell address, and then process the corresponding sub-data based on the descriptor information in the queue element.

[0103] Please refer to Figure 4, which is a schematic flow diagram of another data transmission method provided in an embodiment of the present application. This method can be applied to the computing device architecture described in Figure 1B above, wherein the network card 102 can be used to support and execute steps S401 through S403 of the method flow shown in Figure 4. The following description will be based on the network card side of the computing device, with reference to Figure 4. The method may specifically include the following steps S401 through S403.

[0104] Step S401: Sending a first storage address and a second storage address to the host.

[0105] Specifically, the first storage address and the second storage address correspond to a first address space and a second address space in the network card, respectively.

[0106] Optionally, the host includes a base address register, and the base address register is configured to be accessible to both the host and the network card; sending the first storage address and the second storage address to the host includes: writing the first storage address and the second storage address into the base address register.

[0107] Exemplarily, the first storage address and the second storage address are virtual addresses corresponding to the first address space and the second address space, respectively.

[0108] Exemplarily, the first address space and the second address space are both located in a target memory in the network card, and the target memory is a static random access memory or a dynamic random access memory.

[0109] Step S402: Receive notification information sent by the host, and obtain one or more queue elements based on the notification information.

[0110] Specifically, the one or more queue elements are written by the host into the second address space, each of the one or more queue elements corresponds to a segment of sub-data, and each queue element includes descriptor information of the corresponding sub-data.

[0111] Optionally, the descriptor information includes physical address information corresponding to the corresponding sub-data in the first address space.

[0112] Exemplarily, the physical address information includes an operation key, data length, and a virtual address corresponding to the corresponding sub-data in the first address space. The operation key is used to determine a mapping relationship between the virtual address and the physical address in the first address space.

[0113] Exemplarily, the notification information may be a doorbell message. After the host writes data to the doorbell address in the virtual address space, the network card may determine the corresponding queue element based on the offset of the doorbell address.

[0114] Step S403: Process the corresponding sub-data respectively based on the descriptor information in the one or more queue elements.

[0115] Specifically, the sub-data corresponding to each queue element is written by the host into the first address space.

[0116] Optionally, the processing of corresponding sub-data based on the descriptor information in the one or more queue elements includes: determining the physical address of the corresponding sub-data in the first address space based on the descriptor information in each queue element, and obtaining the sub-data based on the physical address; and encapsulating the corresponding sub-data into a corresponding message based on the descriptor information in each queue element.

[0117] Please refer to Figure 5, which is a flowchart of another data transmission method provided in an embodiment of the present application. This method can be applied to the computing device architecture described in Figure 1B above. The following description will be made from both the host side and the network interface card side of the computing device in conjunction with Figure 5. The method may specifically include the following steps S501 and steps S503-S506, and may optionally also include step S502.

[0118] Step S501: the network card sends a first storage address and a second storage address to the host.

[0119] Specifically, the first storage address and the second storage address correspond to a first address space and a second address space in the network card, respectively.

[0120] Optionally, the host includes a base address register, which is configured to be accessible to both the host and the network card; the network card sends the first storage address and the second storage address to the host, including: the network card writes the first storage address and the second storage address into the base address register.

[0121] Optionally, the host includes a base address register, which is configured to be accessible to both the host and the network card; after the network card writes the first storage address and the second storage address into the base address register, the host can obtain the first storage address and the second storage address by reading the base address register.

[0122] Exemplarily, the first storage address and the second storage address are virtual addresses corresponding to the first address space and the second address space, respectively.

[0123] Exemplarily, the first address space and the second address space are both located in a target memory in the network card, and the target memory is a static random access memory or a dynamic random access memory.

[0124] Optionally, before executing step S503, that is, before the host writes one or more queue elements into the second address space in the network card, the following step S502 may be further included:

[0125] Step S502: The host determines the descriptor information in the one or more queue elements based on the first storage address.

[0126] Specifically, the descriptor information includes physical address information corresponding to the sub-data written into the first address space. At this time, the physical address information corresponds to the actual physical address after the sub-data is written into the first address space in the network card.

[0127] Optionally, the physical address information includes an operation key of the corresponding sub-data, a data length, and a virtual address corresponding to the writing of the corresponding sub-data into the first address space, and the operation key is used to determine a mapping relationship between the virtual address and the physical address of the first address space.

[0128] Step S503: The host writes target data into the first address space, and writes one or more queue elements into the second address space.

[0129] Specifically, the target data includes one or more segments of sub-data, each of the one or more queue elements corresponds to a segment of sub-data in the target data, and each of the queue elements includes descriptor information of the corresponding sub-data.

[0130] Exemplarily, the host may write the target data and the one or more queue elements into the first address space and the second address space through the first storage address and the second storage address, respectively.

[0131] Exemplarily, the one or more queue elements may be one or more work queue elements WQE, and the work queue elements may correspond to work requests sent by the host to the network card.

[0132] Optionally, the host writes the target data to the first address space in the network card, and writes one or more queue elements to the second address space in the network card, including: the host writes the target data to the first address space by executing a load instruction and a store instruction or by direct memory access based on the first storage address; and writes the one or more queue elements to the second address space by executing a load instruction and a store instruction or by direct memory access based on the second storage address.

[0133] Optionally, before executing the above step S503 , the network card driver of the host may determine the memory space for remote direct memory access in the host or the network card by performing a memory registration operation.

[0134] Illustratively, before executing step S503 , when the network card driver of the host performs a memory registration operation, the memory space for remote direct memory access may be determined based on the target data and the data size of the one or more queue elements.

[0135] Step S504: The host sends notification information to the network card.

[0136] Specifically, the notification information is used to instruct the network card to process corresponding sub-data respectively based on the descriptor information in the one or more queue elements.

[0137] Exemplarily, the notification information may be a doorbell message. The host may write data to the Doorbell address in the virtual address space and transmit the data to the network card via the transaction layer packet (TLP) of the PCIe bus, thereby ringing the doorbell and causing the network card to respond.

[0138] Step S505: The network card obtains one or more queue elements based on the notification information.

[0139] Specifically, the network card may determine the storage address of the corresponding queue element based on the notification information, thereby obtaining the corresponding queue element.

[0140] Exemplarily, the notification information may be a doorbell message. After the host writes data to the Doorbell address in the virtual address space, the network card may determine the queue pair number QPN (Queue Pair Number) of the corresponding queue element based on the offset of the Doorbell address, thereby determining the storage address of the corresponding queue element.

[0141] Step S506: The network card processes the corresponding sub-data respectively based on the descriptor information in the one or more queue elements.

[0142] Specifically, the network card may generate a corresponding data message based on the descriptor information, and the data message is used to be sent to the receiving end through the network transmission medium. The payload in the data message is the sub-data corresponding to the descriptor information.

[0143] Optionally, the network card processes the corresponding sub-data respectively based on the descriptor information in the one or more queue elements, including: the network card determines the physical address of the corresponding sub-data in the first address space based on the descriptor information in each queue element, and obtains the sub-data based on the physical address; and encapsulates the corresponding sub-data into a corresponding message based on the descriptor information in each queue element.

[0144] The embodiment of the present application provides a computing device using the composition architecture shown in FIG1B. As shown in FIG1B, the computing device may include a host 101 and a network card 102, and the host 101 and the network card 102 may be connected via a PCIe bus.

[0145] The host 101 can be used to obtain a first storage address and a second storage address, wherein the first storage address and the second storage address correspond to a first address space and a second address space in the network card, respectively; write target data to the first address space in the network card, and write one or more queue elements to the second address space in the network card; wherein the target data includes one or more segments of sub-data, each queue element in the one or more queue elements corresponds to a segment of sub-data in the target data, and each queue element includes descriptor information of the corresponding sub-data; send notification information to the network card, wherein the notification information is used to instruct the network card to process the corresponding sub-data respectively based on the descriptor information in the one or more queue elements.

[0146] Optionally, the host 101 may include a base address register, which is configured to be accessible to both the host 101 and the network card 102; the host 101 can be used to read the first storage address and the second storage address in the base address register, and the first storage address and the second storage address in the base address register are written to the base address register by the network card 102.

[0147] Optionally, the host 101 may be configured to determine the descriptor information in the one or more queue elements based on the first storage address, where the descriptor information includes physical address information corresponding to the sub-data written into the first address space.

[0148] Exemplarily, the physical address information includes an operation key of the corresponding sub-data, a data length, and a virtual address corresponding to the writing of the corresponding sub-data into the first address space, and the operation key is used to determine a mapping relationship between the virtual address and the physical address of the first address space.

[0149] Optionally, the host 101 can be used to write the target data into the first address space based on the first storage address by executing a load instruction and a store instruction or through direct memory access; and write the one or more queue elements into the second address space based on the second storage address by executing a load instruction and a store instruction or through direct memory access.

[0150] The network card 102 can be used to send a first storage address and a second storage address to the host, where the first storage address and the second storage address correspond to the first address space and the second address space in the network card respectively; receive notification information sent by the host, and obtain one or more queue elements based on the notification information, where the one or more queue elements are written by the host to the second address space, each of the one or more queue elements corresponds to a piece of sub-data, and each queue element includes descriptor information of the corresponding sub-data; process the corresponding sub-data based on the descriptor information in the one or more queue elements, where the sub-data corresponding to each queue element is written by the host to the first address space.

[0151] Optionally, the host 101 may include a base address register, which is configured to be accessible to both the host 101 and the network card 102; the network card 102 may be configured to write the first storage address and the second storage address into the base address register.

[0152] Optionally, the network card 102 can be used to determine the physical address of the corresponding sub-data in the first address space based on the descriptor information in each queue element, and obtain the sub-data based on the physical address; and encapsulate the corresponding sub-data into a corresponding message based on the descriptor information in each queue element.

[0153] Exemplarily, the first storage address and the second storage address are virtual addresses corresponding to the first address space and the second address space, respectively.

[0154] Exemplarily, the first address space and the second address space are both located in a target memory in the network card, and the target memory is a static random access memory or a dynamic random access memory.

[0155] For example, please refer to FIG6A, which is a schematic diagram of the principle of another data transmission method provided by an embodiment of the present application. As shown in FIG6A, when the host 101 has obtained the first storage address and the second storage address, and the first storage address and the second storage address correspond to the first address space and the second address space of the memory 1023 of the network card 102, respectively, the data transmission method for sending the data to be transmitted from the host 101 in the local end to the network card 102 may specifically include the following steps 1 to 3: Step 1, as shown in ① in FIG6A, the central processing unit 1011 in the host 101 may run the network card driver, and by executing the loading instruction and the storage instruction, the data to be transmitted and the corresponding The corresponding queue element is written to the memory 1023 in the network card 102, and the memory 1023 can be the on-chip memory of the network card; Step 2, as shown in ② in Figure 6A, the host 101 can send the corresponding notification message to the network card 102 through the downstream port of the PCIe bus, that is, from the PCIe endpoint 1013 to the PCIe endpoint 1021. The transmission delay of Step 2 is approximately 500 nanoseconds; Step 3, as shown in ③ in Figure 6A, the processor 1022 in the network card 102 can read the data to be transmitted and the corresponding queue element from the memory 1023, and generate a corresponding message based on the data to be transmitted and the corresponding queue element. The transmission delay of Step 3 is approximately 10 nanoseconds.

[0156] The transmission delay in step 1 is approximately (500 + X * Y * 40) nanoseconds, including the inherent delay of the PCIe bus read and write of approximately 500 nanoseconds, and the delay of each message pipeline processing, which is (X * Y * 40) nanoseconds. X can be the number of data packets sent for each message slice, and Y can be the packet forwarding rate (unit: Mpps). The size of X can be determined based on the data size of each message and the slice size.

[0157] For example, please refer to Figure 6B, which is a schematic diagram of the principle of another data transmission method provided by an embodiment of the present application. As shown in Figure 6B, when the host 101 has obtained the first storage address and the second storage address, and the first storage address and the second storage address correspond to the first address space and the second address space of the memory 1024 of the network card 102, respectively, the data transmission method for sending the data to be transmitted from the host 101 in the local end to the network card 102 may specifically include the following steps 1 to 4: Step 1, as shown in ① in Figure 6B, the central processing unit 1011 in the host 101 may run the network card driver, and write the data to be transmitted and the corresponding queue element to the memory 1024 in the network card 102 by executing the load instruction and the storage instruction. The memory 1024 may be the external memory of the network card; Step 2, as shown in Figure As shown in step ② of FIG6B , the host 101 can send the corresponding notification message to the network card 102 through the downstream port of the PCIe bus, that is, from the PCIe endpoint 1013 to the PCIe endpoint 1021. The transmission delay of step 2 is approximately 500 nanoseconds. In step 3, as shown in step ③ of FIG6B , the processor 1022 in the network card 102 can copy the data to be transmitted and the corresponding queue element from the memory 1024 to the memory 1023. The memory 1023 can be the on-chip memory of the network card. The transmission delay of step 3 is approximately 100 nanoseconds. In step 4, as shown in step ④ of FIG6B , the processor 1022 in the network card 102 can read the data to be transmitted and the corresponding queue element from the memory 1023, and generate a corresponding message based on the data to be transmitted and the corresponding queue element. The transmission delay of step 4 is approximately 10 nanoseconds. At this time, the transmission delay of step 1 is approximately (500+X*Y*40+100) nanoseconds. Regarding the transmission delay of (500+X*Y*40) nanoseconds, please refer to the relevant description of the transmission delay of step 1 shown in ① of Figure 6A above, which will not be repeated here. The transmission delay of 100 nanoseconds can be the read and write delay of the external memory of the network card, that is, the memory 1024 (such as DDR SDRAM).

[0158] In one possible implementation, as shown in FIG6B , when the host 101 has obtained the first storage address and the second storage address, and the first storage address and the second storage address correspond to the first address space and the second address space of the memory 1024 of the network card 102, respectively, the data transmission method of sending the data to be transmitted from the host 101 in the local end to the network card 102 may specifically include the following steps 1 to 4: Step 1, as shown in ① in FIG6B , the central processing unit 1011 in the host 101 may run the network card driver in the virtual machine (VM), and based on the preset address translation table and by executing the load instruction and the storage instruction, write the data to be transmitted and the corresponding queue element to the memory 1024 in the network card 102. The memory 1024 may be the external memory of the network card; at this time, steps 2 to 4 can refer to the relevant descriptions of steps 2 to 4 shown in ② to ④ in the above-mentioned FIG6B , and will not be repeated here. Among them, in step 1, the host driver accesses the address of the base address register corresponding to the virtual function (Virtual Function, VF) of the virtual machine, and the address can be a continuous address allocated by the operating system; the address translation table can be preset in the network card 102, and the network card driver can obtain the physical addresses of the first address space and the second address space in the memory 1024 through a virtualization table lookup process based on the address translation table. For example, the address translation table may include the identifier of the virtual function VF of the virtual machine, the host virtual address (Host Virtual Address, HVA) and the physical address (Guest Physical Address, GPA) of the memory in the network card. By querying the identifier of the virtual function VF and the virtual address of the host, the corresponding physical address can be converted from the mapping relationship.

[0159] For example, please refer to Figure 6C, which is a schematic diagram of the principle of another data transmission method provided in an embodiment of the present application. As shown in Figure 6C, when the host 101 has obtained the first storage address and the second storage address, and the first storage address and the second storage address correspond to the first address space and the second address space of the memory 1024 of the network card 102 respectively, the data transmission method of sending the data to be transmitted from the host 101 in the local end to the network card 102 may specifically include the following steps 1 to 5: Step 1, as shown in ① in Figure 6C, the central processing unit 1011 in the host 101 can run the network card driver and write the data to be transmitted and the corresponding queue element to the memory 1014. The transmission delay of step 1 is about 100 nanoseconds; Step 2, as shown in ② in Figure 6C, the central processing unit 1011 in the host 101 can run the network card driver and write the data to be transmitted and the corresponding queue element to the network card through direct memory access The memory 1024 in 102 may be an external memory of the network card; in step 3, as shown in ③ in FIG6C , the host 101 may send the corresponding notification message to the network card 102 through the downstream port of the PCIe bus, that is, from the PCIe endpoint 1013 to the PCIe endpoint 1021. The transmission delay of step 3 is approximately 500 nanoseconds; in step 4, as shown in ④ in FIG6C , the processor 1022 in the network card 102 may copy the data to be transmitted and the corresponding queue element from the memory 1024 to the memory 1023. The memory 1023 may be an on-chip memory of the network card. The transmission delay of step 3 is approximately 100 nanoseconds; in step 5, as shown in ⑤ in FIG6C , the processor 1022 in the network card 102 may read the data to be transmitted and the corresponding queue element from the memory 1023, and generate a corresponding message based on the data to be transmitted and the corresponding queue element. The transmission delay of step 5 is approximately 10 nanoseconds. At this time, the transmission delay of step 2 is approximately (500+X*Y*40+100) nanoseconds. Regarding the transmission delay of (500+X*Y*40) nanoseconds, please refer to the relevant description of the transmission delay of step 1 shown in ① of the above-mentioned Figure 6A, which will not be repeated here. The transmission delay of 100 nanoseconds can be the read and write delay of the external memory of the network card, that is, the memory 1024.

[0160] Please refer to Figure 7, which is a schematic diagram of the structure of a computing device provided by an embodiment of the present application. The computing device 701 includes at least one processor 702, at least one memory 703, and at least one communication interface 704. In addition, the device may also include common components such as an antenna, which will not be described in detail here.

[0161] The processor 702 may be a general-purpose central processing unit (CPU), a microprocessor, an application-specific integrated circuit (ASIC), or one or more integrated circuits for controlling the execution of the above program.

[0162] The communication interface 704 is used to communicate with other devices or communication networks, such as Ethernet, Radio Access Network (RAN), core network, Wireless Local Area Networks (WLAN), etc.

[0163] The memory 703 may be a read-only memory (ROM) or other types of static storage devices that can store static information and instructions, a random access memory (RAM) or other types of dynamic storage devices that can store information and instructions, or an electrically erasable programmable read-only memory (EEPROM), a compact disc read-only memory (CD-ROM) or other optical disc storage, optical disc storage (including compressed optical disc, laser disc, optical disc, digital versatile disc, Blu-ray disc, etc.), a magnetic disk storage medium or other magnetic storage device, or any other medium that can be used to carry or store desired program codes in the form of instructions or data structures and can be accessed by a computer, but is not limited thereto. The memory may be independent and connected to the processor via a bus. The memory may also be integrated with the processor.

[0164] The memory 703 is used to store application code for executing the above solution, and the execution is controlled by the processor 702. The processor 702 is used to execute the application code stored in the memory 703.

[0165] It should be noted that the code stored in the memory 703 can be used to execute the data transmission method provided in the embodiment of the present application. The functions of each functional unit in the computing device 701 described in the embodiment of the present application can be found in the relevant description in the method embodiment provided in the present application and will not be repeated here.

[0166] In the above embodiments, the description of each embodiment has its own focus. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0167] It should be noted that for the aforementioned method embodiments, for the sake of simplicity, they are all expressed as a series of action combinations, but those skilled in the art should be aware that this application is not limited by the order of the actions described, because according to this application, certain steps may be performed in other orders or simultaneously. Secondly, those skilled in the art should also be aware that the embodiments described in this specification are all preferred embodiments, and the actions and modules involved are not necessarily required by this application.

[0168] In the several embodiments provided in this application, it should be understood that the disclosed devices or apparatuses can be implemented in other ways. For example, the device embodiments or apparatus embodiments described above are merely schematic. For example, the division of the above-mentioned units is merely a logical function division. In actual implementation, there may be other division methods, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, and the indirect coupling or communication connection of devices, devices or units can be electrical or other forms.

[0169] The units described above as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of these units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0170] In addition, the functional units in the embodiments of the present application may be integrated into a single processing unit, or each unit may exist physically separately, or two or more units may be integrated into a single unit. The aforementioned integrated units may be implemented in the form of hardware or software functional units.

[0171] If the above-mentioned integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application is essentially or the part that contributes to the prior art or all or part of the technical solution can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions for enabling a computer device (which can be a personal computer, a server or a network device, etc., specifically a processor in a computer device) to execute all or part of the steps of the above-mentioned methods of each embodiment of the present application. Among them, the aforementioned storage medium may include: various media that can store program codes, such as a U disk, a mobile hard disk, a magnetic disk, an optical disk, a read-only memory or a random access memory.

[0172] As described above, the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the above embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the above embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims

1. A data transmission method, characterized in that: The method is applied to a host in a computing device, wherein the computing device further includes a network card, and the host is communicatively connected to the network card; the method includes: Obtain a first storage address and a second storage address, where the first storage address and the second storage address correspond to a first address space and a second address space in the network card, respectively; Writing target data into the first address space of the network card, and writing one or more queue elements into the second address space of the network card; wherein the target data includes one or more segments of sub-data, each of the one or more queue elements corresponds to a segment of sub-data in the target data, and each of the queue elements includes descriptor information of the corresponding sub-data; Notification information is sent to the network card, where the notification information is used to instruct the network card to process corresponding sub-data respectively based on the descriptor information in the one or more queue elements.

2. The method according to claim 1, characterized in that The host includes a base address register, and the base address register is configured to be accessible to both the host and the network card; and obtaining the first storage address and the second storage address includes: The first storage address and the second storage address in the base address register are read, where the first storage address and the second storage address in the base address register are written into the base address register by the network card.

3. The method according to claim 1 or 2, characterized in that Before writing one or more queue elements into the second address space in the network card, the method further includes: The descriptor information in the one or more queue elements is determined based on the first storage address, where the descriptor information includes physical address information corresponding to the sub-data written into the first address space.

4. The method according to claim 3, characterized in that The physical address information includes an operation key of the corresponding sub-data, a data length, and a virtual address corresponding to the writing of the corresponding sub-data into the first address space. The operation key is used to determine a mapping relationship between the virtual address and the physical address of the first address space.

5. The method according to any one of claims 1 to 4, characterized in that Writing the target data into the first address space in the network card, and writing one or more queue elements into the second address space in the network card, comprises: Based on the first storage address, the target data is written into the first address space by executing a load instruction and a store instruction or by direct memory access; and based on the second storage address, the one or more queue elements are written into the second address space by executing a load instruction and a store instruction or by direct memory access.

6. The method according to any one of claims 1 to 5, characterized in that The first storage address and the second storage address are virtual addresses corresponding to the first address space and the second address space, respectively.

7. The method according to any one of claims 1 to 6, characterized in that The first address space and the second address space are both located in a target memory in the network card, and the target memory is a static random access memory or a dynamic random access memory.

8. A data transmission method, characterized in that: A network card is applied to a computing device, the computing device further comprising a host, the host being communicatively connected to the network card; the method comprising: Sending a first storage address and a second storage address to the host, where the first storage address and the second storage address correspond to a first address space and a second address space in the network card, respectively; receiving notification information sent by the host, and obtaining one or more queue elements based on the notification information, wherein the one or more queue elements are written by the host to the second address space, each of the one or more queue elements corresponds to a segment of sub-data, and each queue element includes descriptor information of the corresponding sub-data; The corresponding sub-data are processed respectively based on the descriptor information in the one or more queue elements, and the sub-data corresponding to each queue element is written by the host into the first address space.

9. The method according to claim 8, characterized in that The host includes a base address register, and the base address register is configured to be accessible to both the host and the network card; and sending the first storage address and the second storage address to the host includes: The first storage address and the second storage address are written into the base address register.

10. The method according to claim 8 or 9, characterized in that The descriptor information includes physical address information corresponding to the corresponding sub-data in the first address space.

11. The method according to claim 10, characterized in that The physical address information includes an operation key, data length, and a virtual address of the corresponding sub-data in the first address space. The operation key is used to determine a mapping relationship between a virtual address and a physical address in the first address space.

12. The method according to any one of claims 8 to 11, characterized in that The processing of corresponding sub-data based on the descriptor information in the one or more queue elements includes: Based on the descriptor information in each queue element, determine the physical address of the corresponding sub-data in the first address space, and obtain the sub-data based on the physical address; and based on the descriptor information in each queue element, encapsulate the corresponding sub-data into a corresponding message.

13. The method according to any one of claims 8 to 12, characterized in that: The first storage address and the second storage address are virtual addresses corresponding to the first address space and the second address space, respectively.

14. The method according to any one of claims 8 to 13, characterized in that: The first address space and the second address space are both located in a target memory in the network card, and the target memory is a static random access memory or a dynamic random access memory.

15. A computing device, characterized in that The computing device includes a host and a network card, wherein the host is in communication with the network card; the host is configured to: Obtain a first storage address and a second storage address, where the first storage address and the second storage address correspond to a first address space and a second address space in the network card, respectively; Writing target data into the first address space of the network card, and writing one or more queue elements into the second address space of the network card; wherein the target data includes one or more segments of sub-data, each of the one or more queue elements corresponds to a segment of sub-data in the target data, and each of the queue elements includes descriptor information of the corresponding sub-data; Notification information is sent to the network card, where the notification information is used to instruct the network card to process corresponding sub-data respectively based on the descriptor information in the one or more queue elements.

16. The computing device according to claim 15, wherein: The host includes a base address register, and the base address register is configured to be accessible to both the host and the network card; the host is specifically configured to: The first storage address and the second storage address in the base address register are read, where the first storage address and the second storage address in the base address register are written into the base address register by the network card.

17. The computing device according to claim 15 or 16, characterized in that The host is specifically used for: The descriptor information in the one or more queue elements is determined based on the first storage address, where the descriptor information includes physical address information corresponding to the sub-data written into the first address space.

18. The computing device according to claim 17, wherein: The physical address information includes an operation key of the corresponding sub-data, a data length, and a virtual address corresponding to the writing of the corresponding sub-data into the first address space. The operation key is used to determine a mapping relationship between the virtual address and the physical address of the first address space.

19. The computing device according to any one of claims 15 to 18, wherein: The host is specifically used for: Based on the first storage address, the target data is written into the first address space by executing a load instruction and a store instruction or by direct memory access; and based on the second storage address, the one or more queue elements are written into the second address space by executing a load instruction and a store instruction or by direct memory access.

20. The computing device according to any one of claims 15 to 19, wherein: The first storage address and the second storage address are virtual addresses corresponding to the first address space and the second address space, respectively.

21. The computing device according to any one of claims 15 to 20, wherein: The first address space and the second address space are both located in a target memory in the network card, and the target memory is a static random access memory or a dynamic random access memory.

22. A computing device, characterized in that The computing device includes a host and a network card, wherein the host is in communication with the network card; the network card is configured to: Sending a first storage address and a second storage address to the host, where the first storage address and the second storage address correspond to a first address space and a second address space in the network card, respectively; receiving notification information sent by the host, and obtaining one or more queue elements based on the notification information, wherein the one or more queue elements are written by the host to the second address space, each of the one or more queue elements corresponds to a segment of sub-data, and each queue element includes descriptor information of the corresponding sub-data; The corresponding sub-data are processed respectively based on the descriptor information in the one or more queue elements, and the sub-data corresponding to each queue element is written by the host into the first address space.

23. The computing device of claim 22, wherein: The host includes a base address register, and the base address register is configured to be accessible to both the host and the network card; the network card is specifically configured to: The first storage address and the second storage address are written into the base address register.

24. The computing device according to claim 22 or 23, wherein: The descriptor information includes physical address information corresponding to the corresponding sub-data in the first address space.

25. The computing device of claim 24, wherein: The physical address information includes an operation key, data length, and a virtual address of the corresponding sub-data in the first address space. The operation key is used to determine a mapping relationship between a virtual address and a physical address in the first address space.

26. The computing device according to any one of claims 22 to 25, wherein: The network card is specifically used for: Based on the descriptor information in each queue element, determine the physical address of the corresponding sub-data in the first address space, and obtain the sub-data based on the physical address; and based on the descriptor information in each queue element, encapsulate the corresponding sub-data into a corresponding message.

27. The computing device according to any one of claims 22 to 26, wherein: The first storage address and the second storage address are virtual addresses corresponding to the first address space and the second address space, respectively.

28. The computing device according to any one of claims 22 to 27, wherein: The first address space and the second address space are both located in a target memory in the network card, and the target memory is a static random access memory or a dynamic random access memory.

29. A computer program product comprising a computer program, characterized in that When the computer program is executed by a processor, the steps of the data transmission method according to any one of claims 1 to 14 are implemented.

30. A computer-readable storage medium, characterized in that The computer-readable storage medium is used to store a computer program. When the computer program is executed, the method according to any one of claims 1 to 14 is executed.

Citation Information

Patent Citations

  • Data processing method and equipment

    CN113688072A

  • Computing device and request processing method

    CN115858434A

  • Host data reading method and system

    CN117234972A

  • Data transmission method and device and storage medium

    CN117453582A

  • Network card equipment and data transmission system

    CN117648264A