Method for quantum error mitigation, computing system and computer program
By constructing and classically simulating auxiliary quantum circuits with varying noise strengths, the method effectively mitigates quantum noise in target circuits, reducing bias and overhead in error estimation.
Patent Information
- Application Number
- PCT/EP2025/054671
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2024-03-01
- Filing Date
- 2025-02-21
- Publication Date
- 2025-09-04
AI Technical Summary
Existing noise-agnostic quantum error mitigation techniques introduce systematic bias errors and have high sampling overhead, while noise-aware techniques fail to accurately model hardware noise.
Construct auxiliary quantum circuits based on the target circuit, execute both with varying noise strengths, simulate classically to derive noise-free values, and model noise dependency using Taylor polynomials to reduce noise impact on expectation value estimation.
Reduces bias errors and sampling overhead, providing robust noise-reduced estimates of quantum circuit outcomes without extensive extrapolation.
Smart Images

Figure EP2025054671_04092025_PF_FP_ABST
Abstract
Description
[0001] Method for quantum error mitigation, computing system and computer program
[0002] The present invention is related to a method for mitigating errors caused by noise in a target quantum circuit P executed by a quantum processor comprising a number of N qubits, said target quantum circuit P comprising an instruction to apply a target quantum gate sequence to an initial state of said N qubits to thereby obtain a final state thereof, and to apply a measurement to the final state for deriving a target expectation value of an observable O.
[0003] Error mitigation is expected to play a crucial role in the Noisy Intermediate Scale Quantum (NISQ) era in which performing quantum error correction is not yet possible due to hardware noise and lack of a sufficient number of qubits. In contrast to error correction that reduces the error of logical qubits, the idea of quantum error mitigation (QEM) is to reduce the impact of the quantum noise on the execution of a quantum circuit, in particular, on the estimation of an expectation value of a quantity of interest.
[0004] There exist two conceptionally different approaches to quantum error mitigation. “Noise- aware” techniques require a precise knowledge of the noise underlying the execution of the quantum circuit. “Noise-agnostic” techniques, on the other hand, do not require a knowledge of the underlying noise or noise model. Noise-agnostic error mitigation techniques have a lower sampling overhead compared with noise-aware techniques, in particular compared with Probabilistic Error Cancellation (PEC) introduced by K. Temme et.al, “Error Mitigation for Short-Depth Quantum Circuits”, Physical Review Letters 119, 180509 (2017). Noise-aware techniques have the further problem that in practice the noise model on which the technique relies may not capture the noise of the quantum processor sufficiently well, so that error mitigation only partially removes the effect of the noise.
[0005] Noise-agnostic error mitigation techniques, like Zero Noise Extrapolation (ZNE) proposed in "Error Mitigation for Short-Depth Quantum Circuits” by K. Temme et.al, Physical Review Letters 119, 180509 (2017) and “Efficient Variational Quantum Simulator Incorporating Active Error Minimization” by Y. Li et.al, Physical Review X 7 021050 (2017) or Clifford data regression proposed in “Error Mitigation with Clifford Quantum-Circuit Data” by P. Czarnik et.al, Quantum 5, 592 (2021 ) do not require knowledge of the underlying noise model. Traditionally, noise-agnostic techniques are based on fitting a set of noisy data to a specific model function. This, however, may introduce a systematic and unknown bias error to the outcome of the error mitigation. Due to these problems in the prior art, it is therefore an object of the present invention to propose an improved noise-agnostic method for error mitigation and to further propose a computing system and a computer program for carrying out said method.
[0006] According to a first aspect of the present invention, there is provided a method for mitigating errors caused by noise in a target quantum circuit P executed by a quantum processor comprising a number of N qubits, said target quantum circuit P comprising an instruction to apply a target quantum gate sequence to an initial state of said N qubits to thereby obtain a final state thereof, and to apply a measurement to the final state for deriving a target expectation value of an observable O, said method comprising: i) constructing at least one auxiliary quantum circuit At, i=1 , ..., NA≥ 1 , on the basis of said target quantum circuit P, each auxiliary quantum circuit Atcomprising an instruction to apply an auxiliary quantum gate sequence to the initial state of said N qubits to thereby obtain an auxiliary final state thereof and to apply the measurement to said auxiliary final state for deriving an auxiliary expectation value of the observable O, wherein the auxiliary quantum gate sequence is constructed on the basis of the target quantum gate sequence such that the auxiliary quantum circuit is efficiently classically simulable; ii) selecting a plurality of execution strategies Smm = 1 M for the target and auxiliary quantum circuits, each execution strategy corresponding to an execution of the target and auxiliary quantum circuits with an associated value Am≥ 1 of a noise strength iii) for each execution strategy Sm, executing the target and auxiliary quantum circuits P and Ai by said quantum processor according to the execution strategy Smto thereby obtain a target estimator value Eo(P, Am) associated with the target quantum circuit, and for each auxiliary quantum circuit an auxiliary estimator value EotdpAjn), of the expectation value of the observable O associated with the value Amof the noise strength A of said execution strategy Sm; iv) simulating, by a classical computer, an execution of each auxiliary quantum circuit Ai to thereby obtain a noise-free auxiliary estimator value Eo( / tj,0) of the expectation value of the observable O; v) modelling a noise-dependency of the target estimator value Eo(P, Am) on the basis of the auxiliary estimator values Eo(Ai, Am) and the noise-free auxiliary estimator values EoG4(,0) of a circuit set 4, of nA< NAof the auxiliary circuits to thereby derive for each noise strength value Ama noise-reduced target estimator value Er(2m) from said target estimator value Eo(P,Am) on the basis of said model; vi) expressing the noise-reduced target estimator value Er(Am) by its K-th Taylor polynomial about an expansion value selected among the M noise strength values Am, m=1 M, wherein derivatives are replaced by difference quotients which are calculated by use of the noise-reduced target estimator values Er(Am), and deriving an error mitigated value Eemof the target estimator value of the expectation value of the observable O from said K-th Taylor polynomial.
[0007] The method according to the first aspect of the present invention does not require extrapolation of the set of data evaluated at different values of the noise strength, contrary to the noise-agnostic error mitigation techniques known in the art. Thereby, the bias error may be reduced, the sampling overhead for deriving the estimator values may also be reduced, and the results may be very robust, in particular against errors in the values Amof the noise strength.
[0008] The quantum processor comprises N qubits, means for applying a sequence of quantum gates, and measurement means to apply a measurement to a state of the N qubits. In general, the quantum processor may comprise a plurality of qubits, i.e., N > 2. In particular, the quantum processor may be operative to apply a sequence of single- and two-qubit gates to the state of the N qubits. The quantum processor is operative to apply a measurement to the state of the N qubits for deriving an expectation value of the observable O. The expectation value of the observable O may be derived by classical post-processing of the measurement outcome of the measurement. Classical post-processing may be performed by use of the classical computer or a classical processor. In one example, the expectation value of the observable O may be estimated by measuring each of the N qubits in the computational basis, and by classical post-processing of the obtained measurement outcomes. However, the invention is not limited to this, and there are other possibilities for deriving the expectation value of the observable O. The quantum processor is operative to execute the target quantum circuit and the auxiliary quantum circuits according to the selected execution strategies.
[0009] In general, a quantum circuit defined on N qubits comprises an instruction to apply a sequence of quantum gates to an initial state of the N qubits to thereby map said initial state to a final state of the N qubits and to apply a measurement to the final state for deriving an expectation value of an observable. In the ideal, noise-free case, the sequence of quantum gates implements a unitary transformation which maps the initial state to the final state. Executing the quantum circuit comprises repeatedly executing the quantum circuit to thereby obtain for each execution a measurement outcome. This is due to the probabilistic nature of quantum mechanics that requires many executions (shots) of the quantum circuit for obtaining an estimator value of the observable. Then, the estimator value of the expectation value of the observable O is obtained from the measurement outcomes, in particular by classical postprocessing. In one example, the estimator value may be derived as a mean value. Le., when a j-th execution of the quantum circuit allows to derive a value Oj for the observable O, the expectation value may be approximated by £j=1Oj wherein S is the number of shots.
[0010] The estimator value of the expectation value of the observable O which is obtained for the quantum circuit Q = P or Q = Ai and the value Amof the noise strength associated with the execution strategy Smis denoted by E0(Q, Am). As the execution strategy Smis associated with the value Amof the noise strength, one may also write E0(Q, Sm)= E0(Q, Am). I.e., the estimator value depends on the execution strategy, respectively the noise strength.
[0011] The target quantum circuit P is a quantum circuit of interest, and the estimator value of the expectation value of the observable O may be related to the solution of a computational problem in one example. The goal of QEM is to obtain an approximation of the estimator value in the zero-noise limit, E0(P, A=0). The target quantum circuit P comprises instructions for realizing a target unitary transformation by an application of a predetermined target quantum gate sequence. The auxiliary quantum circuit comprises instructions for realizing an auxiliary unitary transformation by an application of a predetermined auxiliary quantum gate sequence.
[0012] The target quantum circuit comprises the instruction to apply the target quantum gate sequence to the initial state of the N qubits. The target quantum gate sequence comprises a sequence of a plurality of quantum gates. Each of the quantum gates may be implementable by the quantum processor. The target quantum gate sequence is applied to the initial state. The quantum processor is operative to prepare the initial state.
[0013] The method comprises constructing at least one auxiliary quantum circuit Aton the basis of the target quantum circuit. Each auxiliary quantum circuit comprises an instruction to apply an auxiliary quantum gate sequence to the initial state of said N qubits. The auxiliary quantum circuits are constructed such that their auxiliary quantum gate sequences are all different from each other. In particular, the auxiliary quantum gate sequences act on the same number N of qubits as the target quantum gate sequence. Further, the target quantum circuit and each auxiliary quantum circuit act on the same initial state. The auxiliary quantum gate sequence is constructed on the basis of the target quantum gate sequence. In particular, at least one, and in particular all auxiliary quantum gate sequences may be obtained by starting from the target sequence and by replacing, removing and / or adding quantum gates thereto, but the invention is not limited to this. The auxiliary quantum circuit is in particular such that its noise behavior is similar to the one of the target quantum circuit, for example due to having the same or a similar sequence of two-qubit gates as the target quantum circuit, as two-qubit gates are far more noise-sensitive than single-qubit gates.
[0014] In general, quantum circuits are hard to simulate on a classical computer as the underlying Hilbert space of the N qubits has a dimension which grows exponentially in the number of qubits. In many cases, the runtime on a classical computer scales exponentially in the number of qubits. The auxiliary quantum circuits are constructed such that they are efficiently classically simulable. That is, it is possible to simulate the auxiliary quantum circuits on the classical computer in a time which scales less than exponentially in the number of qubits, and in particular logarithmically or polynomially in the number of qubits. The method comprises simulating each auxiliary quantum circuit by the classical computer to thereby obtain the associated noise-free auxiliary estimator value E0{Ait0). The noise-free auxiliary estimator value estimates the expectation value of the observable O for the noise-free auxiliary final state obtained by a noise-free application of the auxiliary quantum gate sequence of the auxiliary quantum circuit A, to the initial state.
[0015] In one example, said constructing of said at least one auxiliary quantum circuit may be performed by or assisted by the classical computer. Additionally, or alternatively, said constructing of said at least one auxiliary quantum circuit may be performed by the user of the method. The user may then provide information defining the auxiliary quantum circuit(s), in particular its / their quantum gate sequence(s), to the classical computer and / or to the quantum processor.
[0016] In one example, a single auxiliary quantum circuit is constructed on the basis of the target quantum circuit P and executed by the quantum processor. This example has a particularly small computational cost. Alternatively, several (NA ≥1 ) auxiliary quantum circuits A may be derived from the quantum circuit P and executed by the quantum process and the classical computer in one example. It will become more clear below, why and when such an approach may be useful.
[0017] According to the method of the present invention, the target and auxiliary quantum circuits are executed according to an execution strategy associated with a value Amof the noise strength A. I.e., the execution strategy Smis such that the target and the auxiliary quantum circuits are all executed with the value Xmof the noise strength. Each execution strategy S,nmay comprise an execution strategy for the target quantum circuit and for each auxiliary quantum circuit an execution strategy so that an execution of the target quantum circuit with the execution strategy is associated with the value Amof the noise strength and an execution of the auxiliary quantum circuit with the execution strategy is also associated with the value Amof the noise strength. In the following, this may also be covered by “execution of the target and auxiliary quantum circuits with the execution strategy S„, “. An execution strategy specifies how the unitary transformation corresponding to the gate sequence of the quantum circuit is realized by the quantum processor. For example, the gate sequence of the quantum circuit may be modified while still realizing the same unitary transformation and / or the implementation of the quantum gates may be modified, e.g., by different gate application times. In the absence of noise, the execution strategy would have no influence on the outcome of the computation, as in theory each execution strategy results in the realization of the same unitary transformation mapping the initial state to the same final state. However, in NISQ quantum processors, the execution of every quantum circuit is inevitably noisy. The different execution strategies introduce different amounts of noise in the execution of the quantum circuit by the quantum processor as quantified by the value Amof the noise strength A, e.g., due to a different number of executed quantum gates. The noise strength A is a dimensionless parameter. The value Amof the noise strength associated with a certain execution strategy may be assigned by a user of the method based on well-thought considerations. For example, different execution strategies may comprise changing physical parameters when implementing the quantum gates by the quantum processor or by inserting a sequence of abundant gates in the predetermined gate sequence of the quantum circuit, said sequence of abundant quantum gates being equivalent to the identity if operated noiselessly. Examples of different execution strategies and their associated value Amof the noise strength will be presented below. It will become obvious from these examples that the execution strategy may require changes in the physical parameters when implementing the quantum gates which are the same changes or which are different changes for the target and the auxiliary quantum circuits or that the insertion of a sequence of abundant gates in the quantum gate sequence of the quantum circuit is the same or different for the target and the auxiliary circuits so that the execution of the target and auxiliary quantum circuits according to the execution strategy is with the same value Amof the noise strength. In one example, the number of execution strategies is M=2. In another example, the number of execution strategies is M=3. In other examples, the number of execution strategies is M=4, 5, 6 or larger.
[0018] In one example, the execution strategies may be selected by a user of the method and provided to the classical computer and / or the quantum processor. In another example, said execution strategies may be selected by the classical computer, e.g., on the basis of a user input, e. g, on the basis of a desired value of the noise strength.
[0019] In one example, there may be an intrinsic or optimal execution strategy of the target and auxiliary quantum circuits by the quantum processor for which it is expected that the error of the estimator value of the expectation value of the observable O is minimal. For example, this optimal / intrinsic execution strategy may be obtained for a special realization of the unitary transformation of the quantum circuit by an execution of a particular gate sequence, e.g. a special sequence of one- and two qubit gates, wherein each quantum gate is implemented in an optimal way on the quantum processor. For the target quantum circuit, this special gate sequence may be the target gate sequence, and for the auxiliary quantum circuit, this special gate sequence may be the auxiliary gate sequence in one example. Further, the application time for the quantum gates may be optimized for this optimal execution strategy. This optimal / intrinsic execution strategy may be associated with a value of Aj = 1 of the noise strength. Then, every other execution strategy is not the optimal one, and is associated with a value Am> 1 of the noise strength. Thus, different execution strategies may comprise different realizations of the unitary transformation of the quantum circuit via different gate sequences. For example, if the optimal / intrinsic execution strategy with value A±= 1 is by an application of the target / auxiliary gate sequence, execution strategies with a value of Am> 1 may comprise inserting at least one gate sequence in the target / auxiliary gate sequence which is equal to the identity in the zero-noise limit. The inserted gate sequences may be different for the target and each auxiliary quantum circuit. Additionally, or alternatively, the quantum gates may be realized differently by the quantum processor, e.g., via different gate times.
[0020] Executing the target quantum circuit P and each auxiliary quantum circuit according to each of a plurality of execution strategies to thereby obtain an estimator value and an auxiliary estimator value of the observable O for each execution strategy Smis known in the art. It is well-known that quantifying Amfor a given execution strategy, while physically motivated, may have an inevitable uncertainty, resulting in an uncertainty of the noise-mitigated estimator value.
[0021] The target estimator value Eo(P, Am) depends on the value Amof the noise strength. The exact dependency, and in particular, its zero noise limit, is unknown, however. On the other hand, the zero-noise limit of the auxiliary estimator value, Eo(4,-, 0) is known. Therefore, according to the method of the present invention a set of nA<NAauxiliary circuits is used for modelling the noise-dependency of the target estimator value Eo(P,Am) to thereby derive for each noise strength value Ama noise-reduced target estimator value Er(Am~) from said target estimator value £b (P,Am) on the basis of said model. Thereby, the noise-dependency as it is inferable from the auxiliary estimator values may be removed from the noise-reduced target estimator values in one example. Therefore, it is expected that the noise-reduced target estimator value Er(Am) has a reduced noise-dependency compared to the target estimator value Eo(P, Am).
[0022] In one example, the circuit set Atof the auxiliary circuits may contain all constructed auxiliary circuits. In another example, it may contain a strict subset thereof. For example, it may turn out after the execution of the auxiliary circuits that some of them have a noise dependency that appears to be very different from the one of the target quantum circuit. In this case, these auxiliary quantum circuits may be omitted from the circuit set Ai and thereby omitted in the modelling and deriving of the noise-reduced target estimator value Er(Am). In one example, the circuit set A, may contain only one auxiliary quantum circuit At. Examples how this one auxiliary quantum circuit A, is selected among the constructed auxiliary quantum circuits are presented below.
[0023] The noise-reduced target estimator value m)isexpressed by its K-th Taylor polynomial about an expansion value ^ selected among the M noise strength values Am, wherein derivatives are replaced by difference quotients which are calculated by use of the noise-reduced target estimator values Er(Am). That is, wherein D^A^) is a k-th order difference quotient which approximates the k-th derivative and the lowest order difference quotient (k=0), is equal to the noise- reduced target estimator value for the expansion coefficient . In one example, K=1 . In another example, K=2. In other examples, the order K of the Taylor polynomial is 3 or larger, i.e., K > 3.
[0024] In general, the k-th order difference quotien ) approximates the k-th derivative to a certain accuracy and may be expressed as whereinmare real coefficients and k . The number of non-zero coefficients 8~mmay be related to the accuracy of the approximation for a given order k of the derivative. The difference quotient may be a forward, a backward or a central difference quotient in one example. The values of the noise strength Ammay be arbitrarily spaced in one example, i.e., the difference between two subsequent values Am- A„l+1may be arbitrary. Ways how to obtain the difference quotients in this case are disclosed, e.g., in B. Fornberg, “Generation of Finite Difference Formulas on Arbitrarily Spaced Grids”, Mathematics of Computation Volume 51 , 184, 699-706 (1988). In one example, the values of the noise strength Ammay be equally spaced, i.e., the difference between two subsequent values Am- Am+1is the same for all subsequent values, Am+1- Am= h > 0. In one example, the order K of the Taylor polynomial may be at most M -1 , the number of selected execution strategies M minus 1. In one example, M=2 and K=1. In another example, M=3 and K=2. In one example, Am= m for m=1, ..., M, so that Am+1- Am=1=h.
[0025] The K-th Taylor polynomial is defined for arbitrary values of the noise-strength,
[0026] As explained above, one may expect that the noise-reduced target estimator value Er(Am) has as reduced noise-dependency compared to the target estimator value £0(P, Am), i.e., it is less sensitive to changing the value Am. In this case the K-th Taylor polynomial may be a very good approximation of the noise-reduced target estimator value Er(Am) even when K is small. Then, the error-mitigated value Eemof the target estimator value of the expectation value of the observable O may be derived from the K-th Taylor polynomial with a high accuracy without the need of implementing the target and auxiliary quantum circuits for many execution strategies.
[0027] In one example, at least one, and in particular all steps (i), (v) and (vi) may be completely or partially implemented by the classical computer.
[0028] In one embodiment, the deriving of the noise-reduced target estimator value Er(Am) may be such that the noise-reduced target estimator value is equal to the target estimator value Eo(P,Am) in the zero-noise limit, Er(0) = Eo(P, 0), i.e., it may be derived from = lnthis case, the error-mitigated value of the target estimator value of the expectation value of the observable O may be derived from the zero-noise limit of the K-th Taylor polynomial of the noise-reduced target estimator value which is equal to the K-th Taylor polynomial of the zero-noise limit of the noise-reduced target estimator value Er(0) around the expansion value A^\ In particular, the error-mitigated value of the target estimator value may be derived as the zero-noise limit of the K-th Taylor polynomial about the expansion valueA one example.
[0029] In one embodiment of the method, the expansion value may be the smallest value of the selected values of the noise strength, . This embodiment may be particularly useful when the target estimator value and the noise-reduced target estimator value are equal in the zero-noise limit and the error-mitigated value of the target estimator value of the expectation value of the observable O is derived from the zero-noise limit of the K-th Taylor polynomial or may be derived as ., the zero-noise limit of the K-th Taylor polynomial about the smallest value Axof the noise strength.
[0030] In one further expedient embodiment, the modelling of the noise-dependency may be on the basis of a parametric model with a real parameter / ?, and said method further comprises selecting an optimal model with an optimal parameter value p* such that a value of a first cost function Q( / ?) which is indicative of an amount of a remaining noise-dependency of the noise- reduced target estimator value Er(Am; / ?) is minimized for the noise-reduced target estimator value £'r(Am; y?*) derived on the basis of said optimal model. In this case, the approximation of the noise-reduced target estimator value Er(Am;P") by its K-th Taylor polynomial may be a particularly good approximation, and the accuracy of the error mitigation technique may be further improved. The model parameter may comprise a single model parameter or a plurality of model parameters in one example. The real parameter p may be a single parameter or it may comprise a plurality of real parameters pt.
[0031] In one example, the minimization of the first cost function may be implemented on the classical computer.
[0032] The form of the first cost function C1(p) is not limited as long as it is indicative of the amount of the remaining noise-dependency of the noise-reduced target estimator value Er(Am;P). In one useful embodiment, the first cost function C^p) may be defined as an absolute value of a difference between a zero-noise limit of the K-th Taylor polynomial parameter p, its K-th Taylor polynomial also depends on the model parameter p. As the difference quotients are calculated by use of the noise-dependent target estimator value Er(Am; p~), they also depend on the model parameter / ?,
[0033] The value of the first cost function may be easily calculated, for example, by use of a classical computer. The value of the first cost function may be understood as follows: The zero noise limit of the K-th Taylor polynomial may be expressed as
[0034] Thus, the value of the first cost function may be understood as indicating the amount of the contribution of the sum of the higher order terms, k ≥ 1 , i.e. in the zero-noise limit of the K-th Taylor polynomial compared to the lowest order coefficient which is the noise-reduced target estimator value Erp^ for the expansion value A$.
[0035] In one example of the above embodiment, the error mitigated value Eemof the target estimator value may be derived on the basis of the noise-reduced target estimator value the expansion value A^ and for the optimal parameter value / ?*. In particular, A^ may be the smallest value Axof the noise strength, the noise-reduced target estimator value Er(Am; P) and the target estimator value E0(P,Am) may be equal in the zero-noise limit Er(0; / ?)= E0(P, 0), and the error-mitigated value may be estimated to be equal to the value of the noise-reduced target estimator value Er(A1,- p*') for the expansion value A1and for the optimal value p*. This is a good approximation as the sum of the higher order terms is minimized compared to Er(Ar; p*) for the optimal value / ?*.
[0036] In a further expedient embodiment of the present invention, the parametric model may be based on quotients of the auxiliary estimator values and the noise-free estimator values, to the power of a corresponding real parameter pi tthe noise-reduced target estimator value Er(Am) is derived as a linear combination of products of the corresponding target estimator value E0(P, Am) and an inverse of each of said quotients, Er(Am, {pi, ci},yi) = , wherein the q are real parameters with = 1, and the method further comprises selecting optimal parameter values p * and ct* for the real parameters ptand q such that the value of the first cost function 'sminimized for the noise-reduced target estimator value Er(Am, ct*}”=i) derived on the basis of said optimal parameter values.
[0037] Such a model may be particularly well-suited to eliminate noise contributions with an exponential decay from the target estimator values, as it is expected for noise in state-of-the art quantum processors.
[0038] A priori, it may not be clear which auxiliary quantum circuit approximates the noise behavior of the target quantum circuit best. Thus, by expressing the noise-reduced target estimator value as a linear combination of the inverse of each of the quotients over the set of auxiliary quantum circuits and by optimizing also with respect to the coefficients chthe contribution of those auxiliary quantum circuit(s) in the linear combination which approximate(s) the noise behavior of the target quantum circuit best may be optimized.
[0039] However, in another example, there is only one auxiliary quantum circuit in the circuit set, so that Q = 1 and there is only an optimization over the single real parameter = ft.
[0040] In a further embodiment the circuit set A] is selected such that one may expect a good approximation of the noise dependency of the target estimator value by the estimator values of the auxiliary circuits. For example, the circuit set A, may be selected such that for each auxiliary quantum circuit A, of the circuit set A{the quotient of the target estimator value E0QP,A^) for the expansion value A^ and the auxiliary estimator value of said auxiliary circuit AbE0(AbA^), for the expansion value A^ is smaller than a threshold value 1+£, i.e., 1+a. In one example, £=0.10, or £=0.075 or £=0.05 or £=0.025 or £=0.001 . 1.e., the noise behavior of the auxiliary quantum circuit is very similar to the noise behavior of the target quantum circuit for the expansion value A^.
[0041] In one expedient embodiment, the circuit set Atof the auxiliary circuits may be a strict subset of nA< NAof the constructed auxiliary circuits, and said method further comprises selecting an optimal circuit set AJ of the auxiliary circuits among the constructed ones for the modelling of the noise-dependency such that a value of a second cost function C2Q4;) which is indicative of an approximation error £(>4 / ) of approximating a zero-noise limit of the noise- reduced target estimator value £>(0; XJ by its K-th Taylor polynomial is minimized for the zeronoise limit of the noise-reduced target estimator value £r(0; Aj*) derived on the basis of said optimal circuit set 4,. That is, the noise-reduced estimator value may be expressed as wherein £Q4;) is the approximation error. The noise-reduced target estimator value and thereby the difference quotients and the approximation error may also depend on the parameter p in one example, but this dependency is not explicitly stated for ease of representation. By selecting the optimal circuit set A,* such that the approximation error £(>! / ) is minimized, the approximation accuracy of the noise-reduced target estimator value by its K- th Taylor polynomial wherein the derivatives are replaced by difference quotients is optimized. Thereby, the accuracy of the method is further improved.
[0042] In another expedient embodiment, the method may further comprise deriving a model estimator value E(l; At) by replacing the target and auxiliary estimator values in the noise- reduced target estimator value Fr(AM;) by a target fitting function and nAauxiliary fitting functions which are respectively derived from a fit to a target set of the target estimator values and a fit to a respective set of nAauxiliary sets of the auxiliary estimator values, estimating the approximation error £(4 / ) as a sum of a truncation error and a discretization error of approximating the zero-noise limit of the noise-reduced target estimator value Er(A = 0; Af~) by the zero-noise limit of its K-th order Taylor polynomial by use of said model estimator value E^ Aj), and defining the second cost function as an absolute value of a quotient of the estimated approximation error £( / l;) and the noise-reduced target estimator value EXA^pMr) for the expansion value
[0043] _A
[0044] In one example, the target fitting function may be of the form / r(A) = ae b with real parameters a and b. Optimal values a*, b* may be obtained by fitting said target fitting function to the set of target estimator values {Eo(P, Am)}^=1, resulting in an optimal target fitting function fr W = a*e b\ in another example, for each auxiliary circuit A(the respective auxiliary fitting
[0045] A function may be of the form / j(A) = c^ebt with real parameters atand bt. Optimal values a-, b- may be obtained by fitting for each auxiliary circuit Atthe respective auxiliary fitting function / i(A) to the respective mator values {E0(Ai, Am)}"=1resulting in an optimal auxiliary fitting functio n / f(A) = cz e i. In an example where the noise-reduced target estimator value is of the form parameter values c* and ft as explained above, the model estimator value is of the f roorrmm U it is argued in S. Endo, et. al., “Practical quantum error mitigation for near-future applications,” Phys. Rev. X 8, 031027 (2018) that a fitting function that assumes an exponential decay of the estimator value of some observable with the noise strength is a good ansatz. Exponential fits are also commonly applied in Zero Noise Extrapolation (ZNE), see e.g. Y. Kim et al, Nature 618, 500-505 (2023). The use of a multi-exponential fit function is disclosed in Z Cai, “Multiexponential error extrapolation and combining error mitigation techniques for NISQ applications,” npj Quantum Information 7, 80 (2021 ).
[0046] Approximating the noise-reduced target estimator value Er(Am; A,) by the K-th order Taylor polynomial wherein the derivatives are replaced by difference quotients may be associated with two sorts of error: the truncation error which is due to the truncation of the Taylor polynomial at order K, and the discretization error which is due to approximating the k- th derivative in the K-th Taylor polynomial by the k-th difference quotient. The approximation error is the sum of the truncation error and the discretization error.
[0047] The noise-reduced target estimator value is known for the discrete values Amof the noise strength. If the noise-reduced target estimator value was a continuous function, its zero-noise limit could be expressed by a Taylor polynomial of order K about the expansion value with the truncation error £t(K,- A!) according to
[0048] The truncation error £t(K; A]) may be expressed as = ' This truncation error may be estimated, up to order K > K, by replacing the noise-reduced target estimator value by the model estimator value F(A; A]) which is a continuous function, and by terminating the sum at order K > K. I.e., the truncation error may be estimated as £tAs the moclel estimator value is a continuous function, e.g., the one defined above, its derivatives may be evaluated which allows the calculation of the truncation error. This calculation may be performed by the classical computer in one example. d^E (A- / ! )
[0049] The discretization error is due to replacing the k-th derivative — - 1 , by the k-th
[0050] MA A—— A^^ order difference quotient Z)[k] A^. For illustration, we assume in the following an example where three execution strategies Sm, m=l, 2, 3 with associated noise strength values are selected, and the noise strength values are equally spaced, i.e. , Am= A1+ (m - l)h, h>0. Further, according to the example, the Taylor expansion of the zero-noise limit of noise-reduced target estimator value is around the smallest value Atof the noise strength to the order K=2: In the example, the first derivative ■ is replaced by the first order difference quotient to accuracy 2. i.e., AI') = -3Er(A1;>!;)+4Er(A1+ / i;^;)-Er(A1+2h;A;) . .. , . . .. d2Er(A;Ai) . . . . .
[0051] — — — — — - — — - and the second derivative — ~ - |A=A1is approximated by the second order difference quotient to accuracy 1 , = The discretization error may be approximated by expanding the difference quotients around the value Ar. I.e., =
[0052] The discretization error for the first difference quotient may be approximated to order 4 by Similarly, for the second difference quotient, one obtains
[0053] •••, so that the discretization error for the first difference quotient may be approximated to order
[0054] Thus, for the above example, the truncation and discretization error may be estimated to order K as
[0055] In principle, the auxiliary quantum gate sequence of the auxiliary quantum circuit(s) may be arbitrarily constructed on the basis of the target gate sequence as long as it acts on the same number of qubits as the target quantum gate sequence and as long as the auxiliary quantum circuit is efficiently classically simulable. In a preferred embodiment, the target quantum gate sequence may comprise a first quantum gate acting on at least one qubit, and wherein constructing at least one of said auxiliary circuits Atcomprises replacing said first quantum gate by a replacement gate or removing said first quantum gate without a replacement. In one expedient example, the replacement gate acts on the same qubits as the first quantum gate. That is, when the first quantum gate is a p-qubit gate (for example, a two-qubit gate) acting on the p qubits qlt> qp, the replacement gate is also a p-qubit gate acting on the same qubits q1(..., qp. In one embodiment, several quantum gates, for example two, three or more quantum gates of the target gate sequence may each be replaced by a particular replacement gate to thereby obtain the auxiliary gate sequence.
[0056] In another embodiment, several quantum gates, that is two, three or more quantum gates of the target gate sequence, may be removed from the target gate sequence without a replacement. For example, the auxiliary quantum gate sequence of one of the auxiliary quantum circuits may be constructed by removing all single qubit gates from the target gate sequence.
[0057] In one expedient embodiment, said first quantum gate may comprise a non-Clifford gate, and said first quantum gate may be replaced by a replacement gate which comprises a Clifford gate. In one embodiment, all non-Clifford gates may be replaced by a replacement gate comprising a Clifford gate. In one embodiment, the replacement gate may be a Clifford gate. In a further embodiment, the replacement gate may be a Clifford gate which is the closest Clifford gate to said first quantum gate. Alternatively, an angle of said Clifford gate may be randomly selected. The angle 6Cof the Clifford gate may be randomly selected from a set of all Clifford angles, i.e 0C£{0,p 7r,y}, based on a user-defined distribution. An example of user- defined distribution is:
[0058] -ve2 / e 'o'2in which V0 is the difference between the non-Clifford angle of the first quantum gate and the set of Clifford angles 0C, and the width a is arbitrarily defined by a user of the method. In the special case where a = 0, using this distribution is equivalent to using the closest Clifford gate for the replacement.
[0059] If all quantum gates of the target gate sequence are replaced by Clifford gates, the constructed auxiliary quantum circuit is classically simulable. However, there are also other possibilities to derive a classically simulable auxiliary quantum circuit from the target quantum circuit.
[0060] In one embodiment, the target quantum gate sequence may comprise a plurality of non- Clifford gates, and wherein constructing at least one of said auxiliary quantum circuits from said target quantum circuit P comprises replacing each non-Clifford gate of a first number of the non-Clifford gates by a Clifford gate and keeping each non-Clifford gate of a second number of the non-Clifford gates. I.e. , the auxiliary gate sequence comprises at least the first number of Clifford gates and the second number of non-Clifford gates. In particular, the first and second numbers are both non-zero. In an expedient example, the auxiliary gate sequence differs from the target gate sequence only in that each of the non-Clifford gates of the first number of non-Clifford gates is replaced by a Clifford gate. In particular, the second number is small so that efficient classical simulation of the respective auxiliary quantum circuit is feasible with a classical computer. The second number may be selected by a user of the method. In particular, the user may select the second number depending on how man non-Clifford gates are in the target quantum circuit and on how many non-Clifford gates are feasible for the classical simulation. In one example, it may be determined randomly, e.g., by the classical computer, which non-Clifford gates are kept.
[0061] In one embodiment, a first execution strategy Si associated with a first value A, of the noise strength A may comprise an implementation of a second quantum gate of said gate sequence by an application of a control pulse C during an application time T by said quantum processor, and wherein a second execution strategy Sj associated with a second value Aj of the noise strength A which is larger than the first value of the noise strength, Aj > At, comprises an implementation of the second quantum gate by an application of a recalibrated control pulse C' for a stretched application time T' = T ■ Aj / Atby said quantum processor. The gate sequence is the target gate sequence for the target quantum circuit and it is the auxiliary gate sequence for the auxiliary quantum circuit. In this way, the same value of the noise strength may be obtained for the target quantum circuit and the auxiliary quantum circuit(s).
[0062] In one embodiment, the first execution strategy Si associated with the first value Atof the noise strength A may comprise an implementation of each quantum gate Gk of said gate sequence by an application of a control pulse Ci during an application time T> by said quantum processor, and the second execution strategy associated with a second value Aj of the noise strength X which is larger than the first value of the noise strength Aj > Atmay comprise an implementation of each quantum gate G, of the gate sequence by an application of a recalibrated control pulse C / for a stretched application time Tj’ = Ti *(Aj / Ai ) by said quantum processor. Different execution strategies are thus realized by a pulse level control. The gate sequence is the target gate sequence for the target quantum circuit and it is the auxiliary gate sequence for the auxiliary quantum circuit. In this way, the same value of the noise strength may be obtained for the target quantum circuit and the auxiliary quantum circuit. In a further embodiment, a third execution strategy may comprise adding an additional gate sequence corresponding to an identity operation to said gate sequence, wherein the additional gate sequence corresponds to a product of a unitary operation Ui and its hermitian conjugate Iff, wherein the unitary operation or its hermitian conjugate corresponds to at least one gate of said gate sequence of said quantum circuit. The additional gate sequence may be added before or after, and in particular directly before or directly after, the at least one gate in one example. The gate sequence is the target gate sequence for the target quantum circuit and it is the auxiliary gate sequence for the auxiliary quantum circuit. In this way, the same value of the noise strength may be obtained for the target quantum circuit and the auxiliary quantum circuit(s).
[0063] In one embodiment, the unitary operation or its hermitian conjugate may correspond to all quantum gates of the gate sequence of the target and auxiliary quantum circuits, respectively. In one embodiment, the additional gate sequence may correspond to a plurality of products of unitary operations Ui and the corresponding hermitian conjugate Iff, wherein each unitary Ui or its hermitian conjugate corresponds to at least one gate of the target and the auxiliary gate sequences, respectively. In one embodiment the additional gate sequence may be the complete gate sequence of the quantum circuit. For example, if the gate sequence of the quantum circuit is represented by the unitary U and is associated with a value A of the noise strength A which may be A =1 in one example, then an execution strategy with the value Ap= (2p+1 ) A of the noise strength may be realized by an application of the unitary operation UfUlfi )por i / (U+U )por (fJ^u yu. The gate sequence is the target gate sequence for the target quantum circuit and it is the auxiliary gate sequence for the auxiliary quantum circuit. In this way, the same value of the noise strength may be obtained for the target quantum circuit and the auxiliary quantum circuit(s).
[0064] In a further embodiment, a fourth execution strategy may comprise executing said gate sequence of the quantum circuit followed by executing the inverse of said gate sequence. The gate sequence is the target gate sequence for the target quantum circuit and it is the auxiliary gate sequence for the auxiliary quantum circuit. In this way, the same value of the noise strength may be obtained for the target quantum circuit and the auxiliary quantum circuit.
[0065] Thus, the execution strategies may comprise unitary folding as described, e.g. in "Digital zero noise exploitation for quantum error mitigation" by T. Giurgica-Tiron ef a / ., 2020 IEEE International Conference on Quantum Computing and Engineering (QCE), 306. There, for a circuit composed of d unitary layers U = Ld... L2Li wherein d represents the depth of the circuit and each block Lj can either represent a single layer of operations or just a single gate, "circuit folding" and "gate (or layer) folding" are described. The general circuit folding replacement rule is: ... Ld-rLd. The total number of layers of the new circuit is d(2p+l)+2s. Thus, if the original circuit is associated with a value Aj of the noise strength A, the execution strategy S, which comprises the application of the gate sequence described by the unitary Uj is associated with the value Aj = (1+2of the noise strength.
[0066] The general gate (or layer) folding replacement rule is as follows: wherein S is a subset of the full set of indices such that the number of elements in S is s = ISI. The number of gates (or layers) after the application of the gate folding rule is d*(2p+1 )+2s, so that this execution strategy is associated with the of the noise strength.
[0067] According to a second aspect of the present invention, there is provided a computing system comprising a classical computer and a quantum processor, wherein said classical processor is configured to carry out the steps iv), v) and vi) of the method according to the first aspect of the present invention, and the quantum processor is configured to carry out the step iii) of the method according to the first aspect of the present invention.
[0068] In one embodiment of the computing system, the classical computer may further be configured to carry out the step i) and / or the step ii) of the method according to the first aspect of the present invention.
[0069] According to a third aspect of the present invention, there is provided a computer program product including instructions, which, when the program is executed by the computing system according to the second aspect of the present invention, cause the computing system to carry out the steps iii) - vi) of the method according to the first aspect of the present invention.
[0070] In one embodiment of the computer program product, the program may further include instructions to carry out the step i) and / or the step ii) of the method according to the first aspect of the present invention.
[0071] In the following, the invention is described in more detail by way of example with reference to the drawings, in which Figure 1 depicts a schematic representation of a computing system according to a second aspect of the present invention;
[0072] Figure 2 depicts a flow chart of an embodiment of the method according to the first aspect of the present invention;
[0073] Figure 3 depicts a flowchart of a subroutine of an embodiment of the method according to the first aspect of the present invention;
[0074] Figure 4a is a representation of a target quantum gate sequence of a target quantum circuit P;
[0075] Figure 4b is a representation of a first example of an auxiliary quantum gate sequence constructed on the basis of the target quantum gate sequence shown in Fig. 4a;
[0076] Figure 4c is a representation of a second example of an auxiliary quantum gate sequence constructed on the basis of the target quantum gate sequence shown in Fig. 4a;
[0077] Figure 5a is a schematic representation of a first example of an execution strategy for a quantum circuit, in particular for the target and the auxiliary quantum circuits shown in Figs. 4a-4c;
[0078] Figure 5b is a schematic representation of a second example of an execution strategy for a quantum circuit, in particular for the target and the auxiliary quantum circuits shown in Figs. 4a-4c;
[0079] Figure 5c is a schematic representation of a third example of an execution strategy for a quantum circuit, in particular for the target and the auxiliary quantum circuits shown in Figs. 4a-4c;
[0080] Figure 6a is a schematic representation of a first example of a layout of eight qubits of a quantum processor of the present invention;
[0081] Figure 6b is a schematic representation of a second example of a layout of nine qubits of a quantum processor of the present invention;
[0082] Figure 6c is a schematic representation of a third example of a layout of ten qubits of a quantum processor of the present invention;
[0083] Figure 7a is a comparison of the estimator values of the ground state energy for the transverse Ising model for eight qubits of the quantum processor with the layout shown in Fig. 6a obtained according to various error mitigation methods for different sets of values of the noise strength;
[0084] Figure 7b is a comparison of the estimator values of the ground state energy for the transverse Ising model for nine qubits of the quantum processor with the layout shown in Fig. 6b obtained according to various error mitigation methods for different sets of values of the noise strength;
[0085] Figure 7c is a comparison of the estimator values of the ground state energy for the transverse Ising model for ten qubits of the quantum processor with the layout shown in Fig. 6c obtained according to various error mitigation methods for different sets of values of the noise strength.
[0086] Figure 1 depicts a schematic representation of a computing system 20 according to a second aspect of the present invention. The computing system 20 comprises a quantum processor 1 and a classical computer 10. Furthermore, the computing system 20 comprises an interface 50 interfacing the quantum processor 1 and the classical computer 10.
[0087] The classical computer 10 comprises a classical processor 11 , memory means 12 and an input / output unit 13. The classical computer 10 is operative to receive instructions specifying a target quantum circuit P which is a quantum circuit of interest, instructions on how to construct at least one classically simulable auxiliary quantum circuit Ai ti = 1, ... , NA, > 1 on the basis of the target quantum circuit P and a plurality of execution strategies Sm, i = 1 M, each execution strategy being associated with a value Amof a noise strength A for the target and the auxiliary quantum circuit(s). The classical computer 10 may be operative to receive these instructions, for example, via a user input into the input / output unit. The classical computer 10 may be further operative to construct the at least one auxiliary quantum circuit on the basis of the quantum circuit P in accordance with the received instructions and to transmit the instructions specifying the target quantum circuit P, the at least one constructed auxiliary quantum circuit A, i = 1, ..., NA, and the plurality of execution strategies Sm, m= 1 M to the quantum processor 1 via the interface 50.
[0088] The quantum processor 1 comprises a register of qubits 2, means for applying quantum gates 3 and measurement means 4. Furthermore, the quantum processor 1 also comprises a classical processor / controller 5 for control of the means for applying quantum gates 3 and the measurement means 4.
[0089] The register of qubits may comprise N ≥2 qubits. The type of qubits is not limited for the invention, and may comprise superconducting qubits, ion qubits, photonic qubits, atomic qubits, but is not limited to this. The means for applying quantum gates 3 is operative to apply quantum gates acting on a small number of qubits to the qubits of the qubit register. For example, the means for applying quantum gates 3 may be operative to apply a sequence of single-qubits gates and two-qubit gates according to the instruction of the quantum circuit and its execution strategy received from the controller 5. The measurement means 4 is operative to apply a measurement to the qubits of the register. The measurement is such that it allows to derive an expectation value of an observable O (more precisely, an estimator value of the expectation value) by classical post-processing. The measurement means 4 may be operative to perform single-qubit measurements in one example. In one example, the measurement basis may be determined by control of the controller. In one embodiment, the measurement may be performed in the computational basis.
[0090] The quantum processor 1 is further operative to receive, via the interface 50, instructions of the target quantum circuit and the auxiliary quantum circuits Atand the respective execution strategy. These instructions comprise an instruction specifying the initial state of the qubits, the target and auxiliary quantum gate sequences of single-qubit gates and two-qubit gates to be applied to the initial state of the qubits according to the target and auxiliary circuits, respectively, and the measurement for deriving an estimator value of the expectation value of the observable O. Then, the quantum processor 1 may be operative, by control of the controller, to execute the target and auxiliary quantum circuits according to the respective instruction and according to the respective execution strategy S,„ with associated value Amof the noise strength. That is, the quantum processor 1 is operative to prepare the register of qubits 2 in the initial state specified by the instruction, to apply the respective sequence of quantum gates by the means for applying quantum gates 3, and to implement the measurement by the measurement means 4 for deriving the expectation value of the observable O. The quantum circuit may be repeatedly executed by the quantum processor 1 and the measurement outcomes may be processed by the controller / classical processor 5 to thereby calculate an estimator value E0(P,Am) associated with the target quantum circuit P and the value Amof the noise strength of the execution strategy Smrespectively an auxiliary estimator value E0(Ai, Am) associated with the auxiliary quantum circuit A and the value Amof the noise strength associated with said execution strategy Sniof the observable O by classical post-processing. The quantum processor 1 may be further operative to transmit the determined estimator value, respectively auxiliary estimator values, via the interface 50 to the classical computer 10. Alternatively, the measurement outcomes may be transmitted to the classical processor 11 of the classical computer 10 via the interface 50 and the classical post-processing may be performed by the classical processor to calculate the target estimator value and the auxiliary estimator values.
[0091] A computer program is stored on the memory means 12 of the classical computer 10. The computer program comprises instructions, which, when the program is executed by the classical computer 10, cause the computer to simulate an execution of each auxiliary quantum circuit Aj to thereby obtain an associated noise-free estimator value E0(Ai, 0) of the expectation value of the observable O for the auxiliary quantum circuit Aj . As the auxiliary quantum circuit(s) is / are efficiently classically simulable, the simulation of the execution may be performed in a computation time which is less than exponential, and in particular polynomial in the number N of qubits in one example.
[0092] Furthermore, the computer program comprises instructions, which, when the program is executed by the classical computer 10, cause the computer to model a noise-dependency of the target estimator value Ab(P, Am) on the basis of the auxiliary estimator values £b(Xi, Am) and the noise-free auxiliary estimator values £o(Ai, 0) of a circuit set A, of nA< NAof the auxiliary circuits to thereby derive for each noise strength value Ama noise-reduced target estimator value Er(Am~) from said target estimator value &(P,4) on the basis of said model. Furthermore, the computer program comprises instructions, which, when the program is executed by the classical computer 10, cause the computer to express the noise-reduced target estimator value Er(Zm) by its K-th Taylor polynomial about an expansion value 2^ selected among the M noise strength values Am, m=1 , .... M, wherein derivatives are replaced by difference quotients which are calculated by use of the noise-reduced target estimator values ^(A^), and to derive an error mitigated value Eemof the target estimator value of the expectation value of the observable O from said K-th Taylor polynomial. The expansion value may be selected by a user of the method and may be provided to the classical computer by a user input. The classical computer is operative to receive this input.
[0093] Figure 2 depicts a flow chart of method steps of an embodiment of the method according to the first aspect of the present invention which is, at least in part, implementable by the computing system shown in Fig. 1 . The method starts as S1 with a selection of a target quantum circuit P. The target quantum circuit P may be selected by a user of the method. The target quantum circuit P may be related to the solution of a specific computational problem. An example of such a computational problem will be presented below.
[0094] The method proceeds to step S2, wherein NA ≥ 2 classically simulable auxiliary quantum circuits Ai, i = 1, ..., NA are constructed on the basis of the target quantum circuit P. In particular, the auxiliary gate sequence is constructed on the basis of the target gate sequence. Examples how the auxiliary quantum circuits are constructed are presented below. Constructing the auxiliary quantum circuits may be performed by use of the classical computer.
[0095] The method proceeds to step S3, where M ≥ 2 execution strategies Sm, m = 1 M with associated values Amof the noise strength are selected for the target and auxiliary quantum circuits. Possible ways how to select the execution strategies are presented below. The selecting may be carried out by the user of the method, and the selected execution strategies may be provided to the computing system shown in Fig. 1 by a user input into the input unit 13 in one example. In one example M = 2, 3, 4, or 5 execution strategies may be selected but the invention is not limited to this.
[0096] Then, at step S4, the target quantum circuit P and each of the auxiliary quantum circuits At are executed repeatedly (plurality of shots) by the quantum processor in accordance with each of the execution strategies Sm, m = 1 , ..., M to thereby obtain the target estimator values Eo(P, Am) and the auxiliary estimator values JEo(AbAm) of the observable O associated with the value of the noise strength.
[0097] At step S5, the execution of each of the auxiliary circuits A, is simulated on the classical computer to obtain an associated noise-free auxiliary estimator value ^(A^ O), i = 1 NA. As the auxiliary quantum circuits are efficiently classically simulable, the estimator values may be obtained efficiently by the classical computer.
[0098] At step S6, a circuit set which consists of one auxiliary circuit A / = {A)} is selected among the constructed auxiliary circuits for modelling of the noise-dependency of the target estimator value £b(P,Am) on the basis of the auxiliary estimator values ^(A-.A^) and the noise-free auxiliary estimator value £b(Aj, 0) for the circuit A- of the circuit set. It will be explained below with reference to Figure 3 how this selection may be performed.
[0099] At S7, the noise-dependency of the target estimator value is modelled. The modelling of the noise-dependency is on the basis of a parametric model with a real parameter 0. In particular, the parametric model is based on a quotient of the auxiliary estimator value Eo(A-,Am) associated with the value of the noise strength and the noise-free estimator value E0(Ai, 0) of the one auxiliary circuit A*, to the power of the real parameter / ?, .
[0100] At step S8, the noise-reduced target estimator value is derived. The noise-reduced target estimator value is derived as a product of the target estimator value Eo(P,Am) and the inverse of the quotient for the value Amof the noise strength, that is Er{Xm, p , A^) =
[0101] The method proceeds at step S9 wherein the zero-noise limit of the noise-reduced target estimator value Er(0,p; A-) is expressed by its K-th Taylor polynomial about an expansion value selected among the M noise strength values Am, m=1 M, wherein derivatives are replaced by difference quotients which are calculated by use of the noise- reduced target estimator values Er(Am; P.’A’t)- lnparticular, the expansion value is the smallest value of the selected values of the noise strength, = Ax. It is clear from the above, that the noise-reduced target estimator value is equal to the target estimator value in the zeronoise limit. In particular, the expression of the noise-reduced target estimator value by its K-th Taylor polynomial reads as follows: *i') is the zero-noise limit of the K-th Taylor polynomial of the noise-reduced target estimator value Fr(Z; / ?; / !■) around the smallest value Ai of the noise strength. is a k-th order difference quotient approximating the k-th derivative the noise-reduced target estimator values Er(Am; P; A}) for the one auxiliary circuit A*. In particular, the difference quotients are forward difference quotients. The lowest order difference quotient, p; A*i), is equal to the value of the noise-reduced target estimator value for the smallest value of the noise strength, P; A*i) =
[0102] Ej-^i, P; A*) and S(A1,P; A*i') is an approximation error of approximating the zero-noise limit of the noise-reduced target estimator value Er(A = O; / ?; XJ) by the zero-noise limit of the K-th Taylor polynomial T[k](A = 0; A1;P;Al').
[0103] The value of the parameter / 3 is selected (step S10) such that a value of the first cost function CiC / 3) = defined above is minimized. This results in an optimal value p*. Then, one may approximate the zero-noise limit of the noise-reduced target estimator value Er(0; P*,A*) by the lowest order difference quotient which is the noise-reduced target estimator value for the smallest value of the noise strength, i.e., Fr(0; (3* , X-) « £)[°](0;f3*; AX) = Er{Ar,- P*\A*j), as the contribution of the higher order terms in the K-th Taylor polynomial is negligible.
[0104] At step S11 , the error-mitigated value of the expectation value of the observable O is derived as the value Er(Ar,- p*; A*), i. e., the value of the noise-reduced target estimator value for the smallest value of the noise strength and the optimal value p* of the model and the one auxiliary quantum circuit A* of the circuit set. Figure 3 depicts a flow chart of a sub-routine of an embodiment of the method according to the first aspect of the present invention. This sub-routine may implement step S6 of the embodiment of the method shown in Figure 2 and may make steps S7-S10 obsolete for the selected auxiliary circuit as will become clear below. The sub-routine starts at step S61 with defining of a target fitting function / r(A) = ae b for the set of target estimator values {£'0(P,Am)}"=1, and fitting the target fitting function to said set to obtain optimal values a*, b* and a respective optimal target fitting function / ^(A) = a*e r.
[0105] At S62, an iteration is started by setting i, that is, the index of the auxiliary circuits, to i = 1 . The iteration may be carried out by the classical computer. The method proceeds to step __A
[0106] S63. At step 63, an auxiliary fitting function = atebi for the set of auxiliary estimator values is defined for the respective auxiliary circuit Atwith index i. The auxiliary function is fitted to the set of the auxiliary estimator values to obtain optimal values a*, b- and a respective optimal auxiliary fitting function = a- eb*.
[0107] At step S64, the noise-dependency of the target estimator value E0(P,Am) is modelled according to with a real parameter and the noise-reduced target estimator value is derived on the basis of said model according to Er(Am; fa; Ai) =
[0108] This step is similar to step S7 of the method illustrated in Fig. 2 for the auxiliary circuit
[0109] At S65, the zero-noise limit of the noise-reduced target estimator value Er(0; fa; Ai) is expressed by its K-th Taylor polynomial T[K](A = 0; A1; / ?jMi) = £'r(A1; / ?iMi) + around the smallest value of the noise strength, wherein the derivatives are replaced by the difference quotients DM(Alrfa;Ai) calculated on the basis of the noise-reduced target estimator values Er(Am; fa.- A^. This step is similar to step S9 shown in Figure 2 for the auxiliary circuit At.
[0110] At S66, an optimal parameter value / 3- is selected such that a value of the first cost function Q( / ?) = | — | is minimized. This is similar to the step S10 shown in Figure 2. Once the optimal parameter value (3- is selected, the method proceeds to step S67, where a noise-reduced model estimator value E(A; ^;A,) is derived for the optimal parameter value (3- by replacing the target and auxiliary estimator values in the derived noise-reduced target estimator value Er(Am; fa; At) by the respective optimal target and auxiliary fitting functions, i
[0111] The noise-reduced model estimator value is then used in step S68 to estimate a truncation and discretization error £( / ?■ MJ of approximating the zero-noise limit of the noise- reduced target estimator value by the zero-noise limit of its K-th Taylor polynomial 7^^; fa); Ai) for the optimal parameter value / ?*.
[0112] As explained above in the general part of the description, approximating the noise- reduced target estimator value by the K-th order Taylor polynomial wherein the derivatives are replaced by difference quotients may be associated with a truncation error which is due to the truncation of the Taylor polynomial at order K, and a discretization error of approximating the k-th derivative in the K-th Taylor polynomial by its k-th difference quotient.
[0113] The truncation error £t(K) may be estimated to order K > K as £t( / <, / ?) ~ wherein the derivatives of the noise-reduced target estimator value are replaced by the derivatives of the noise-reduced model estimator value E(A; fa; Ai) for the optimal value to enable a computation.
[0114] To estimate the discretization error, the noise-reduced target estimator values Fr(Am) in the k-th order difference quotients are replaced by the noise-reduced model estimator values E(Xm; fa; At), i.e., At) and the result is expanded in a Taylor series around the expansion value Ai to the order K resulting i wherein
[0115] £d(K, K) is the discretization error to the order K. Then, total error £( / ?*; which is the sum of the truncation error and the discretization error may be estimated to be 8(Ai; fa) »
[0116] Then, at step S69, the index i of the auxiliary circuit is increased by one. At step S70, it is verified whether i = < NA. If the answer is YES, the method returns to step S63. If the answer is NO, the method proceeds to step S71 , wherein the quantum circuit A* is selected among the NA auxiliary quantum circuits as the one circuit of the circuit set A, for which a value of the second cost function C2(4;) (see above) which is defined as the absolute value of the quotient of the truncation and discretization error S( / ?f ; and the noise-reduced target estimator value for the smallest value of the noise strength is minimal.
[0117] The sub-routine of Figure 3 may be used for implementing the step S6 of the method shown in Figure 2. Then, as the steps S7-S10 have already been implemented for the selected auxiliary circuit / I* by the steps S64, S65, S66 of the sub-routine shown in Figure 3, the method of Figure 2 may then skip these steps and proceed with step S11 after step 6. The error mitigated value of the target estimator value may then be derived as the value of the noise- reduced target estimator value for the smallest value A1of the noise strength obtained for the optimal parameter value [3- and the selected auxiliary quantum circuit A*i, E^Af,
[0118] In the following, examples how to construct the auxiliary quantum circuits on the basis of the target quantum circuit are explained with reference to Figures 4a to 4c. These constructions may be used in step S2 of the method shown in Figure 2.
[0119] Figure 4a is a schematic representation of a target gate sequence of a target quantum circuit P. A sequence of single-qubit gates R (ref. 20) and two-qubit gates 21 is applied to five qubits. While they are all denoted with the letter R, in general, the single-qubit gates are different for different qubits. The single-qubit gates 20 may be rotations around the X, Y and Z axes. In the target gate sequence shown in Fig. 4a, it is assumed that all single-qubit gates are non-Clifford gates. The two-qubit gates 21 may be controlled Z-gates or controlled-NOT gates in one example. The auxiliary gate sequence of the auxiliary quantum circuit shown in Figure 4b is constructed on the basis of the target gate sequence by replacing all non-Clifford gates in the target gate sequence shown in Figure 4a by the closest Clifford gate (C) 30 or a randomly selected Clifford gate. Alternatively, only a strict subset of the non-Clifford gates may be replaced. The auxiliary gate sequence of the auxiliary quantum circuit shown in Figure 4c is constructed on the basis of the target gate sequence shown in Figure 4a by removing all single qubit gates without a replacement. The constructed auxiliary circuits are efficiently classically simulable.
[0120] Possible ways to select the execution strategies are shown in Figs. 5a - 5c. These selection schemes may be used in step S3 of the method in Figure 2. If the complete gate sequence of the target or auxiliary quantum circuits is represented as a unitary U (see Fig. 5a), the execution strategy S2i+i may be defined as executing the gate sequence realizing the unitary U followed by executing (i-1 ) - times the gate sequence represented by tfiu. That is, the execution strategy Si is executing the target or auxiliary gate sequence realizing the unitary U (see Fig. 5a), the execution strategy S3is executing the gate sequence realizing the unitary U followed by U+U. Le., execute the target auxiliary gate sequence followed by the sequence realizing its hermitian conjugate followed by the target / auxiliary gate sequence. If the execution strategy Si is associated with a value A = 1 of the noise strength, the execution strategy S3(see Fig. 5b) is associated with the value A3= 3 of the noise strength A. The execution strategy S5(see Figure 5c) is realizing the unitary U followed by 2 times the gate sequence represented by U^U. That is, in total the unitary UU^UU^U is realized. The execution strategy S5 is associated with the value As = 5 of the noise strength A.
[0121] The target quantum circuit P may be related to the solution of a specific computational problem. An example of such a computational problem is discussed in the following. The problem is to compute the ground state energy of a transverse Ising Hamiltonian H with coupling strength g =2. The Hamiltonian is of the form wherein is the Pauli X-matrix acting on the qubit j, and } is acoupling term between connected qubits j and j' of the quantum processor. The computational problem is to find the ground state energy of said model on a quantum processor 1 . To this end, a QAOA (Quantum Approximate Optimization Algorithm)-type target quantum circuit is used to find the ground state energy of the transverse Ising model. Le., the observable is the energy. The target quantum circuit comprises a target gate sequence comprising single-qubit rotations around the X, Y and Z axis and controlled-Z operations.
[0122] Figure 6a is a schematic representation of a first example of a layout of 8 qubits of a quantum processor 1 of the present invention. The circles with Qi i = 0, ..., 7 represent the qubits and the solid lines between them is representative of their connectivity, that is, the possibility to implement two-qubit gates directly between them. The interaction term 0^0^ acts between those qubits between which there is connectivity.
[0123] Figure 6b is a schematic representation of a second example of a layout of 9 qubits of a quantum processor 1 of the present invention, and Figure 6c is a schematic representation of a third example of a layout of 10 qubits of a quantum processor 1 of the present invention. As for the example shown in Figure 6a, the circles are representative of the qubits and the solid lines are representative of the connectivity, and the interaction term of the transverse Ising Hamiltonian acts only between those qubits between which there is connectivity. For each of the target quantum circuits P(w)defined by the layouts presented in Figures 6a-6c, an auxiliary quantum circuit is constructed on the basis of the respective target quantum circuit wherein all non-Clifford gates are replaced by the closest Clifford gate. The index N = 7, 8, 9 denotes the number of qubits. The target and auxiliary circuits are implemented by a classical simulation of the corresponding quantum processors with the layouts shown in Figs. 6a-6c with execution strategies Smhaving associated values = m, m = 1 > 5 of the noise strength and a noise profile as shown in Fig. 6d. Thereby, target and auxiliary estimator values Eo(P(w), Am) and are derived. For each layout, the noise-reduced target estimator value is derived according to the model explained above and an optimal real parameter value p(N)’ is selected according to the first cost function defined above.
[0124] In the following, the error mitigated values of the energy which are obtained for different sets of selected execution strategies are compared with each other. To this end, the following sets are selected:
[0125] Set 1 , with the execution strategies Si and S2, represented by the set of values [Ax, A2] = [1,2] of the noise strength.
[0126] Set 2, with the execution strategies Si and S3, represented by the set of values [At, A3] = [1,3] of the noise strength.
[0127] Set 3, with the execution strategies Si and S4, represented by the set of values [A1(A4] = [1,4] of the noise strength.
[0128] Set 4, with the execution strategies Si and S5, represented by the set of values [A1(A5] = [1,5] of the noise strength.
[0129] Set 5, with the execution strategies Si, S3 and S5, represented by the set of values [A1(A3, A5] = [1,3,5] of the noise strength.
[0130] Set 6, with the execution strategies S2 and S4, represented by the set of values [A2,A4] = [2,4] of the noise strength.
[0131] Then, for each of the sets Set 1 - Set 5 of the execution strategies, the noise reduced target estimator value is expressed by its K-th Taylor polynomial (K=1 for Set 1 - Set 4, and K=3 for the Set 5) about the smallest values of the noise strength, wherein the derivatives are replaced by the difference quotients (in particular, by forward difference quotients) calculated by use of the noise-reduced target estimator values with the value of the noise strength in the set of values of the noise strength of the respective Set 1 - Set 5. For the Set 6, the noise reduced target estimator value is expressed by its K-th Taylor polynomial, K=2, about the value A2of the noise strength, wherein the derivatives are replaced by the difference quotients (in particular, by forward difference quotients) calculated by use of the noise-reduced target estimator values with the value of the noise strength in the set of values of the noise strength of the Set 6.
[0132] The results are shown in Figure 7a for N = 8 qubits, in Figure 7b for N = 9 qubits and in Figure 7c for N = 10 qubits. The error mitigated value EEM= (0 )EMof the target estimator value which is the value of the ground state energy, is plotted against the different sets [Ai,Ak], I = 1, 2, k = 2, 3, 4 and [A1,A3, / l5] of the noise strength values. The exact value of the ground state energy is indicated by a horizontal dashed line. The results for the method according to the present invention are labelled with “NREM”. These results are compared with results obtained by using other methods known in the art. "ZNE, Exponential” is Zero-Noise Extrapolation wherein the zero-noise limit of the target estimator value is obtained by an _A exponential fit according to KQ CPM) = ae t with real parameters a and t. “ZNE, Richardson” is Zero-Noise Extrapolation according to Richardson with a polynomial fit for the target estimator value E0(P,A) = a0+ arA + a2A2+ •••. For “eZNE” (enhanced Zero-Noise Extrapolation) which is based on M. Urbanek et. al., “Mitigating depolarizing noise on quantum computers with noise-estimation circuits”, Physical Review Letters 127, 270502 (2021 ), the noise-reduced target estimator value E^(Am,p) is calculated for the parameter value = 1 and the noise-reduced target estimator value is extrapolated to the limit of zero noise using the Richardson technique. It is clear from the Figures 7a - 7c that the results for Zero-Noise Extrapolation according to “ZNE, Exponential” and “ZNE, Richardson” are strongly sensitive with respect to the noise strength, while the results for the method according to the present invention are very robust against changes of the values of the noise strength. Further, the error mitigated values of the energy which is obtained according to the method of the present invention are closer to the exact ground state energy than the values obtained according to eZNE.
[0133] The results may be further improved by selecting the auxiliary quantum circuit in an appropriate way, for example, as it was explained above, by constructing a plurality of auxiliary quantum circuits and selecting the one auxiliary quantum circuit for deriving the noise-reduced target estimator value for which the value of the second cost function is minimal. Alternatively, one may select the auxiliary quantum circuit(s) such that the fraction of the target estimator value and the auxiliary estimator value for the smallest value of the noise strength is below a threshold, for example, 1.05, that is — ,7^ < 1.05 as explained above.
Claims
PATENT CLAIMS1. A method for mitigating errors caused by noise in a target quantum circuit P executed by a quantum processor comprising a number of N qubits, said target quantum circuit P comprising an instruction to apply a target quantum gate sequence to an initial state of said N qubits to thereby obtain a final state thereof, and to apply a measurement to the final state for deriving a target expectation value of an observable O, said method comprising: i) constructing at least one auxiliary quantum circuit Afi=1 , ..., NA ≥ 1, on the basis of said target quantum circuit P, each auxiliary quantum circuit Atcomprising an instruction to apply an auxiliary quantum gate sequence to the initial state of said N qubits to thereby obtain an auxiliary final state thereof and to apply the measurement to said auxiliary final state for deriving an auxiliary expectation value of the observable O, wherein the auxiliary gate sequence is constructed on the basis of the target gate sequence such that the auxiliary quantum circuit is efficiently classically simulable; ii) selecting a plurality of execution strategies Smm = 1 M for the target and auxiliary quantum circuits, each execution strategy corresponding to an execution of the target and auxiliary quantum circuits with an associated value Am> 1 of a noise strength A, AT< A2< < AM; iii) for each execution strategy Sm, executing the target and auxiliary quantum circuits P and Atby said quantum processor according to the execution strategy Smto thereby obtain a target estimator value Eo(P,Am) associated with the target quantum circuit, and for each auxiliary quantum circuit an auxiliary estimator value Eo(Ai,Am), of the expectation value of the observable O associated with the value Amof the noise strength A of said execution strategy Sm; iv) simulating, by a classical computer, an execution of each auxiliary quantum circuit Atto thereby obtain a noise-free auxiliary estimator value Eo(Ai,0) of the expectation value of the observable O; v) modelling a noise-dependency of the target estimator value Eo(P,Am)onthe basis of the auxiliary estimator values E0(AitAm) and the noise-free auxiliary estimator values Eo(Ai,0) of a circuit set A] of nA< NAof the auxiliary circuits to thereby derive for each noise strength value Ama noise-reduced target estimator value Er(Am) from said target estimator value Eo(P, Am) on the basis of said model; vi) expressing the noise-reduced target estimator value Er(Am) by its K-th Taylor polynomial T'[Ki(Am; A^^ about an expansion value A^ selected among the M noise strength values Am, m=1 M, wherein derivatives are replaced by differencequotients which are calculated by use of the noise-reduced target estimator values Εr(λm), and deriving an error mitigated value Eemof the target estimator value of the expectation value of the observable O from said K-th Taylor polynomial.
2. Method according to claim 1 , wherein the deriving of the noise-reduced target estimator value is such that the noise-reduced target estimator value is equal to the target estimator value in the zero-noise limit, Er(0) = Eo(P, 0).
3. Method according to claim 1 or 2, wherein the expansion value A^ is the smallest value of the selected values of the noise strength, A^)= A1.
4. Method according to anyone of the preceding claims, wherein the modelling of the noisedependency is on the basis of a parametric model with a real parameter / ?, and wherein said method further comprises selecting an optimal model with an optimal parameter value p* such that a value of a first cost function QC / ?) which is indicative of an amount of a remaining noise-dependency of the noise-reduced target estimator value Er(Am; / ?) is minimized for the noise-reduced target estimator value Er(Am; / ?*) derived on the basis of said optimal model, wherein in particular the first cost function (p(P) is defined as an absolute value of a difference between a zero-noise limit of the K-th Taylor polynomial Tm(A =its lowest-order coefficient which is the noise-reduced target estimator v n value A^, divided by said lowest-order coefficient,5. Method according to claim 4, wherein the parametric model is based on quotients of the auxiliary estimator values and the noise-free estimator values, to the power of a corresponding real parameter / ?,, the noise-reduced target estimator valueEr(Am) is derived as a linear combination of products of the corresponding target estimator value E0(P,Xm~) and an inverse of each of said quotients, E^Xm.Pi. Cd = , wherein the ctare real parameters with c;= 1, andthe method further comprises selecting optimal parameter values / ?f and c* for the real parameters ptand ctsuch that the value of the first cost function q) is minimized for the noise-reduced target estimator value Er(Am,p- , cp) derived on the basis of said optimal parameter values.
6. Method according to anyone of the preceding claims, wherein the circuit set A, of the auxiliary circuits is a strict subset of nA< NAof the constructed auxiliary circuits, and said method further comprises selecting an optimal circuit set A] of the auxiliary circuits among the constructed ones for the modelling of the noise-dependency such that a value of a second cost function C2G4 / ) which is indicative of an approximation error £(4,) of approximating a zero-noise limit of the noise-reduced target estimator value Er(0; AJ by its K-th Taylor polynomial is minimized for the zero-noise limit noise-reduced target estimator value Er(0;AI*') derived on the basis of said optimal circuit set A,*.
7. Method according to claim 6, wherein the method further comprises deriving a model estimator value ERA; A]) by replacing the target and auxiliary estimator values in the noise-reduced estimator value Er(A; A,), by a target fitting function and nAauxiliary fitting functions which are respectively derived from a fit to a target set of the target estimator values and a fit to a respective set of nAauxiliary sets of the auxiliary estimator values estimating the approximation erroras a sum of a truncation error and a discretization error of approximating the zero-noise limit of the noise-reduced target estimator value Er(X = 0) by use of said model estimator value E(A;Aj), and defining the second cost function as an absolute value of a quotient of the estimated approximation error £(4;) and the noise-reduced target estimator value Er(A.($; Ai') for the expansion value8. Method according to anyone of the preceding claims, wherein said target quantum gate sequence comprises a first quantum gate acting on at least one qubit, and wherein constructing at least one of said auxiliary circuits Atcomprises replacing said first quantum gate by a replacement gate or removing said first quantum gate without a replacement.
9. Method according to claim 8, wherein said first quantum gate comprises a non-Clifford gate, and said first quantum gate is replaced by a replacement gate which comprises a Clifford gate, wherein in particular said Clifford gate is the closest Clifford gate to said first quantum gate or wherein an angle of said Clifford gate is randomly selected.
10. Method according to claim 8 or 9, wherein said target quantum gate sequence comprises a plurality of non-Clifford gates, and wherein constructing at least one of said auxiliary quantum circuits comprises replacing each non-Clifford gate of a first number of the non-Clifford gates by a Clifford gate and keeping each non-Clifford gate of a second number of the non-Clifford gates.11 . Method according to anyone of the preceding claims, wherein a first execution strategy Sj associated with a first value Aj of the noise strength A comprises an implementation of a second quantum gate of the gate sequence by an application of a control pulse C during an application time T by said quantum processor, and wherein a second execution strategy 5) associated with a second value A;- of the noise strength A which is larger than the first noise strength, A;- > A, comprises an implementation of the second quantum gate by an application of a recalibrated control pulse C’ for a stretched application time T' = T ■ Ay- / Azby said quantum processor.
12. Method according to anyone of the preceding claims, wherein a third execution strategy comprises adding an additional gate sequence corresponding to an identity operation to said gate sequence of said quantum circuit, wherein the additional gate sequence corresponds to a product of a unitary operation Ui and its hermitian conjugate U?, and wherein the unitary operation or its hermitian conjugate corresponds to at least one gate of said gate sequence of said quantum circuit.
13. Method according to anyone of the preceding claims, wherein a fourth execution strategy comprises executing said gate sequence of said quantum circuit followed by executing the inverse of said gate sequence.
14. A computing system, said computing system comprising a classical computer and a quantum processor, wherein said classical computer is configured to carry out the steps iv), v), and vi) of the method according to claim 1 , and the quantum processor is configured to carry out the step iii) of the method according to claim 1 .
15. A computer program product including instructions which, when the program is executed by the computing system according to claim 14, cause the computing system to carry out the steps iii)-vi) of the method according to claim 1 .
16. A computer-readable data carrier having stored thereon the computer program product of claim 15.