Device for a multi-chiplet system and method for same

Abstract

A device for a multi-chiplet system comprising a plurality of chiplets, the device comprising a substrate for receiving at least some components of the multi-chiplet system; and a configurable electronic circuit designed to at least temporarily establish a data connection between at least some of the plurality of chiplets.

Description

[0001] Description and procedures for this

[0002] State of the art

[0003] The disclosure relates to at least one device for a multi-chiplet system.

[0004] The disclosure further relates to at least one method for a device for a multi-chiplet system.

[0005] Disclosure of the invention

[0006] Some examples relate to a device for a multi-chiplet system comprising a plurality of chiplets, comprising a substrate for receiving at least some components of the multi-chiplet system and a configurable electronic circuit configured to at least temporarily establish a data connection between at least some of the plurality of chiplets. In some examples, this enables flexible provision of the data connection.

[0007] In some examples, the configurable electronic circuit is embodied as a programmable hardware device. For example, the configurable electronic circuit is still programmable even when the device is incorporated into a target system, for example, when it is located in the field.

[0008] In some examples, the configurable electronic circuit is an FPGA, field programmable gate array.

[0009] In some examples, the configurable electronic circuit is configured, for example, to operate as a Peripheral Component Interconnect Express (PCIe), a non-transparent bridge (NTB), or a switch. In some examples, the configurable electronic circuit is configured, for example, to operate as a Compute Express Link (CXL), or a switch.

[0010] In some examples, the configurable electronic circuit is arranged on or in the substrate, for example, integrated into the substrate.

[0011] In some examples, a base chip, for example a base chiplet, for example a base die, is provided, and the configurable electronic circuit is arranged on or in the base chip, for example integrated into the base chip.

[0012] Some examples relate to a system comprising at least one device according to the disclosure and at least one multi-chiplet system comprising a plurality of chiplets, wherein at least temporarily a data connection can be established between at least some of the plurality of chiplets by means of the configurable electronic circuit.

[0013] Some examples relate to a method for a device for a multi-chiplet system having a plurality of chiplets, comprising a substrate for receiving at least some components of the multi-chiplet system and a configurable electronic circuit configured to at least temporarily establish a data connection between at least some of the plurality of chiplets, for example for a device according to the disclosure, comprising: determining, for example specifying, a target functionality for the configurable electronic circuit, for example with regard to establishing a data connection between at least some of the plurality of chiplets, configuring the configurable electronic circuit based on the target functionality.

[0014] In some examples, the method comprises: describing the target functionality using a hardware description language, for example Very High Speed ​​Integrated Circuit Hardware Description Language, VHDL, and, optionally, configuring the configurable electronic circuit using the hardware description language. Some examples relate to using the device according to the disclosure and / or the system according to the disclosure and / or the method according to the disclosure for at least one of the following elements: a) enabling a data connection between at least some of the plurality of chiplets, b) providing a, for example flexibly, changeable device for data connection of the plurality of chiplets, c) adapting the configurable electronic circuit to at least one data transmission standard, d) increasing flexibility with regard to manufacturing of the multi-chiplet system.

[0015] Further features, possible applications, and advantages of the invention will become apparent from the following description of examples of the invention, which are illustrated in the figures of the drawing. All described or illustrated features, individually or in any combination, constitute the subject matter of the invention, regardless of their summary in the claims or their references, as well as regardless of their wording or representation in the description or drawing.

[0016] The drawing shows:

[0017] Fig. 1 schematically shows a simplified block diagram,

[0018] Fig. 2 schematically shows a simplified block diagram,

[0019] Fig. 3 schematically shows a simplified block diagram,

[0020] Fig. 4 schematically shows a simplified flow diagram,

[0021] Fig. 5 schematically shows a simplified flow diagram,

[0022] Fig. 6 schematic examples of uses.

[0023] Some examples, Fig. 1 , relate to a device 100 for a multi-chiplet system 200 comprising a plurality of chiplets 201, 202, ..., comprising a substrate 110 for receiving at least some components of the multi-chiplet system 200 (e.g., at least some of the chiplets 201, 202, ...) and a configurable electronic circuit 120 configured to at least temporarily establish a data connection DV between at least some of the plurality of chiplets 201, 202, ... In some examples, this enables flexible provision of the data connection DV, e.g., by configuring or reconfiguring the configurable electronic circuit 120.

[0024] In some examples, for example, the configurable electronic circuit 120 may be configured or reconfigured (e.g., reconfigured) to perform a function of a switch or a bridge.

[0025] In some examples, Fig. 1 , the configurable electronic circuit 120 is embodied as a programmable hardware device. For example, the configurable electronic circuit 120 is still programmable even when the device 100 is incorporated into a target system, for example, located in the field. For example, the device 100 can be combined with a multi-chiplet system 200 to form a system 1000. For example, the configurable electronic circuit 120 can still be programmed even when the elements 100, 200 have been connected to the system 1000.

[0026] In some examples, Fig. 1 , the configurable electronic circuit 120 is an FPGA, field programmable gate array, or at least comprises an FPGA.

[0027] In some examples, Fig. 1 , the configurable electronic circuit 120 is configured, for example, to operate as a Peripheral Component Interconnect Express, PCIe, non-transparent bridge, NTB, switch.

[0028] In some examples, Fig. 1 , the configurable electronic circuit 120 is configured, for example, to operate as a Compute Express Link, CXL, switch.

[0029] In some examples, Fig. 1 , the configurable electronic circuit 120 is arranged on or in the substrate 110, for example integrated into the substrate 110.

[0030] In some examples, see Fig. 2, the device 100a, a base chip, for example a base chiplet, for example a base die, 130 is provided, and the configurable electronic circuit 120 is arranged on or in the base chip 130, for example, integrated into the base chip 130. Also in the configuration 100a according to Fig. 2, a system 1000a can be provided that includes the device 100a and the multi-chiplet system 200.

[0031] For example, the configurable electronic circuit 120 according to Fig. 2 can be used to enable a data connection DV, DV between a plurality of chiplets 201, 202 and / or components 130a of the base chip 130.

[0032] Fig. 3 schematically shows a simplified block diagram of a system 1000b comprising three chiplets 201, 202, 203 on a substrate 110'. Chiplet 201 comprises a functional component 201a, for example a central processor, CPU, or a system on a chip, SoC, and a configurable electronic circuit 201b according to the disclosure (e.g. at least similar to element 120 according to Fig. 1, 2), which is designed, for example configured, as a non-transparent PCIe switch (NTB).

[0033] Chiplet 202 has a functional component 202a, and chiplet 203 has a functional component 203a.

[0034] In some examples, Fig. 3, the configurable electronic circuit 201 b, here configured as an example, e.g. programmed, as an NTB PCIe switch, enables the establishment of respective data connections DV1, DV2, DV3 between the components 201 a, 201 b or 202 a, 201 b or 203 a, 201 b, wherein the element "RP" according to Fig. 3 symbolizes a respective PCIe root port, and wherein the element "EP" symbolizes a respective PCIe end point.

[0035] In some examples (see Fig. 3), the exemplary configuration of the configurable electronic circuit 201b can be flexibly modified, e.g., even in the field, e.g., after the chiplets or system 1000b have been installed in a target system, for example, through appropriate configuration, e.g., programming. In this way, the functionality of the configurable electronic circuit 201b can be adapted to future changes, such as a standard regarding the data connections DV1, DV2, DV2, e.g., through reconfiguration or reprogramming.

[0036] Some examples, see Fig. 1, 2, 3, relate to a system 1000, 1000a, 1000b comprising at least one device according to the disclosure and at least one multi-chiplet system comprising a plurality of chiplets, wherein at least temporarily a data connection can be established between at least some of the plurality of chiplets by means of the configurable electronic circuit.

[0037] Some examples, Fig. 4, relate to a method for a device 100, 100a for a multi-chiplet system having a plurality of chiplets, comprising a substrate for receiving at least some components of the multi-chiplet system and a configurable electronic circuit configured to at least temporarily establish a data connection between at least some of the plurality of chiplets, for example for a device according to the disclosure. The method comprises: determining 300, for example specifying 300a, a target functionality FUN for the configurable electronic circuit 120, for example with regard to establishing a data connection DV between at least some of the plurality of chiplets, configuring 302 the configurable electronic circuit 120 based on the target functionality FUN. The optional block 304 according to Fig.4 symbolizes optional data communication between multiple chiplets using the electronic circuit 120 configured according to block 302.

[0038] In some examples, Fig. 5, it is provided that the method comprises: describing 310 the target functionality FUN using a hardware description language, for example Very High Speed ​​Integrated Circuit Hardware Description Language, VHDL, and, optionally, configuring 312 the configurable electronic circuit 120 using the hardware description language.

[0039] Some examples, Fig. 6, relate to a use 400 of the device according to the disclosure and / or the system according to the disclosure and / or the method according to the disclosure for at least one of the following elements: a) enabling 401 a data connection between at least some of the plurality of chiplets, b) providing 402 a, for example, flexibly, changeable device for data connection of the plurality of chiplets, c) adapting 403 the configurable electronic circuit to at least one data transmission standard, d) increasing 404 flexibility with regard to manufacturing of the multi-chiplet system.

[0040] Some examples enable implementation of logic that can be used for networking for data communication between multiple chiplets, e.g., by means of the configurable electronic circuit 120. By way of example, a system comprising the device according to the examples is flexibly configurable and / or reconfigurable, e.g., with respect to the target functionality FUN for providing the data connection(s) between the chiplets, e.g., for networking the chiplets.

[0041] The principle according to the disclosure is applicable in some examples to PCIe, UCIe, or CXL data connections. Other types are also possible in further examples.

Claims

Claims 1 . Device (100; 100a) for a multi-chiplet system (200) comprising a plurality of chiplets (201, 202, ...), comprising a substrate (110) for receiving at least some components of the multi-chiplet system (200) and a configurable electronic circuit (120) which is designed to at least temporarily establish a data connection (DV) between at least some of the plurality of chiplets (201, 202, ...).

2. Device (100; 100a) according to claim 1, wherein the configurable electronic circuit (120) is designed as a programmable hardware device.

3. Device (100; 100a) according to at least one of the preceding claims, wherein the configurable electronic circuit (120) is an FPGA, field programmable gate array.

4. Device (100; 100a) according to at least one of the preceding claims, wherein the configurable electronic circuit (120) is designed to operate as a Peripheral Component Interconnect Express, PCIe, non-transparent bridge, NTB, switch.

5. Device (100; 100a) according to at least one of the preceding claims, wherein the configurable electronic circuit (120) is designed to operate as a Compute Express Link, CXL, switch.

6. Device (100; 100a) according to at least one of the preceding claims, wherein the configurable electronic circuit (120) is arranged on or in the substrate (110).

7. Device (100; 100a) according to at least one of the preceding claims, wherein a base chip, for example a base chiplet, for example a base die, (130) is provided, and wherein the configurable electronic circuit (120) is arranged on or in the base chip (130).

8. System (1000; 1000a; 1000b) comprising at least one device (100; 100a) according to at least one of the preceding claims and at least one multi-chiplet system (200) comprising a plurality of chiplets (201, 202, ...; 201, 202, 203), wherein at least temporarily a data connection (DV; DV1, DV2, DV3) can be established between at least some of the plurality of chiplets (201, 202, ...; 201, 202, 203) by means of the configurable electronic circuit (120).

9. A method for a device (100; 100a) for a multi-chiplet system (200) comprising a plurality of chiplets (201, 202, ...), comprising a substrate (110) for receiving at least some components of the multi-chiplet system (200) and a configurable electronic circuit (120) which is designed to at least temporarily establish a data connection (DV) between at least some of the plurality of chiplets (201, 202, ...), for example for a device (100; 100a) according to at least one of claims 1 to 7, comprising: determining (300), for example specifying (300a), a target functionality (FUN) for the configurable electronic circuit (120), for example with regard to establishing a data connection (DV) between at least some of the plurality of chiplets (201, 202, ...), configuring (302) the configurable electronic circuit (120) based on the target functionality (FUN).

10. The method according to claim 9, comprising: describing (310) the target functionality (FUN) by means of a hardware description language, for example Very High Speed ​​Integrated Circuit Hardware Description Language, VHDL, and, optionally, configuring (312) the configurable electronic circuit (120) using the hardware description language.

11. Use (400) of the device (100; 100a) according to at least one of claims 1 to 7 and / or of the system (1000; 1000a; 1000b) according to claim 8 and / or of the method according to at least one of claims 9 to 10 for at least one of the following elements: a) enabling (401) a data connection (DV; DV1, DV2, DV3) between at least some of the plurality of chiplets (201, 202, ...), b) providing (402) a, for example, flexibly, changeable device for data connection of the plurality of chiplets (201, 202, ...), c) adapting (403) the configurable electronic circuit (120) to at least one data transmission standard, d) Increasing (404) flexibility regarding manufacturing of the multi-chiplet system (200).

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