Semiconductor device and power conversion device using same

Abstract

Provided is a semiconductor device in which a gate-anode region of a diode can be provided in a small area even if the diode region is an isolated dot type in a reverse conducting IGBT (RC-IGBT) incorporating an IGBT and a diode in the same chip, and current density per chip can be improved.　This semiconductor device comprises an IGBT and a diode in the same chip, and is characterized in that the IGBT comprises a drift layer, a plurality of first trenches formed in the drift layer, and a gate electrode having a sidewall structure provided in the first trench, and the diode comprises the drift layer, a plurality of second trenches formed in the drift layer, and a structure in which a conductive member is embedded in the second trench.

Description

Semiconductor device and power conversion device using the same

[0001] The present invention relates to the structure of a semiconductor device, and in particular to a technique that is effective when applied to a reverse conducting IGBT (RC-IGBT) in which an IGBT and a diode are built in the same chip.

[0002] Due to the global trend toward realizing a carbon-neutral society, the power semiconductor market is growing steadily at a CAGR (compound annual growth rate) of 9.8%. In recent years, reverse-conducting IGBTs (Insulated Gate Bipolar Transistors) (hereinafter referred to as "RC-IGBTs"), which incorporate an IGBT and a diode on the same chip, have been commercialized, achieving low loss and low cost.

[0003] The RC-IGBT has the following advantages: (1) the chip size can be reduced by sharing the termination area between the IGBT and the diode, and (2) the thermal resistance can be reduced because the loss generated in the IGBT area or the diode area is dissipated throughout the entire chip.

[0004] In order to achieve reduced thermal resistance (uniform temperature) and lower on-state voltage in these RC-IGBTs, various configurations of diode arrangement, such as dot and stripe types, have been proposed.

[0005] Background art in this technical field includes, for example, technology such as that disclosed in Patent Document 1. Patent Document 1 discloses an IGBT having a trench gate and an emitter layer formed on the front surface side of a substrate and a collector layer formed on the back surface side of the substrate, and a diode having a trench gate and an anode layer formed on the front surface side of the substrate and a cathode layer formed on the back surface side of the substrate, wherein the trench gate of the diode section is insulated from the trench gate of the IGBT section, the trench gate of the IGBT section has a plurality of stripe sections, the trench gate of the diode section has a plurality of stripe sections, the trench gate of the diode section is arranged with a gap provided between it and the trench gate of the IGBT section in the extension direction of the trench gate of the IGBT section, and the gap is staggered in a plan view.

[0006] By using this structure, it is possible to shorten the distance between the trench gate of the IGBT and the trench gate of the diode, and to provide a p-well layer between the trench gate of the IGBT and the trench gate of the diode, thereby reducing the gate capacitance while ensuring sufficient breakdown voltage.

[0007] Furthermore, Patent Document 2 discloses a technique in which a gate electrode is provided on the side wall of a wide trench as a trench gate for an IGBT, thereby reducing the parasitic capacitance of the gate and improving the controllability of the gate drive circuit for dv / dt during the turn-on switching period.

[0008] JP 2018-41983 A JP 2011-119416 A

[0009] In the case of a structure in which a gate electrode is provided on the side wall of a wide trench as in Patent Document 2, the connection region between the gate and anode in the diode region cannot be formed as a flattened structure at the side gate portion, which causes problems such as element destruction due to mechanical stress during wire bonding required for electrical connection of the element surface or lead frame mounting, an increase in the pattern area for gate-anode connection, and limitations on the connection position during wire bonding, resulting in a reduction in the effective RC-IGBT area, a decrease in freedom of placement, and degradation of performance.

[0010] The above-mentioned Patent Document 1 does not take such a problem into consideration either, and there is room for improvement.

[0011] Therefore, an object of the present invention is to provide a semiconductor device and a power conversion device using the same, in which, in a reverse conducting IGBT (RC-IGBT) in which an IGBT and a diode are built in the same chip, even if the diode region is an isolated dot type, the gate-anode region of the diode can be installed in a small area and the current density per chip can be improved.

[0012] In order to solve the above-mentioned problems, the present invention provides a semiconductor device having an IGBT and a diode on the same chip, wherein the IGBT includes a drift layer, a plurality of first trenches formed in the drift layer, and a gate electrode with a sidewall structure provided in the first trench, and the diode includes the drift layer, a plurality of second trenches formed in the drift layer, and a structure in which a conductive member is buried in the second trench.

[0013] The present invention also provides a power conversion device having a pair of DC terminals, AC terminals in the same number as the number of phases of AC output, switching legs connected between the pair of DC terminals and each of which has two series-connected parallel circuits of a switching element and a diode of opposite polarity, the number of which is the same as the number of phases of the AC output, and a gate circuit for controlling the switching elements, wherein the switching elements are the semiconductor devices described above.

[0014] According to the present invention, in a reverse conducting IGBT (RC-IGBT) in which an IGBT and a diode are built in the same chip, even if the diode region is an isolated dot type, the gate-anode region of the diode can be installed in a small area, making it possible to realize a semiconductor device that can improve the current density per chip, and a power conversion device using the same.

[0015] Problems, configurations, and effects other than those described above will become apparent from the following description of the embodiments.

[0016] 5 is a top view of a reverse conducting IGBT chip according to a first embodiment of the present invention. It is an enlarged view of a portion A in FIG. 1. It is a cross-sectional view along the line A-A' in FIG. 2. It is a cross-sectional view along the line B-B' in FIG. 2. It is a top view of a reverse conducting IGBT chip according to a second embodiment of the present invention. It is a cross-sectional view along the line CC' in FIG. 5. It is a cross-sectional view along the line DD' in FIG. It is a cross-sectional view of a reverse conducting IGBT chip according to a third embodiment of the present invention. It is a cross-sectional view of a reverse conducting IGBT chip according to a fourth embodiment of the present invention. It is a cross-sectional view of a reverse conducting IGBT chip according to a fifth embodiment of the present invention. It is a cross-sectional view of a reverse conducting IGBT chip according to a fifth embodiment of the present invention. It is a circuit diagram showing a schematic configuration of a power conversion device according to a sixth embodiment of the present invention.

[0017] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. In the drawings, the same components are designated by the same reference numerals, and detailed description of overlapping parts will be omitted.

[0018] First Embodiment A semiconductor device according to a first embodiment of the present invention will be described with reference to FIGS.

[0019] Fig. 1 is a top view of a reverse conducting IGBT chip 2 of this embodiment. Fig. 2 is an enlarged view of part A in Fig. 1. Fig. 3 is a cross-sectional view of part A-A' in Fig. 2. Fig. 4 is a cross-sectional view of part B-B' in Fig. 2. Figs. 2 to 4 all show the main structure of the boundary region between the IGBT region 105 and the diode region 106.

[0020] 1, the semiconductor device 1 of this embodiment is a reverse conducting IGBT (RC-IGBT) that incorporates an IGBT region 105 and a diode region 106 within the same chip, and has a plurality of diode regions 106 surrounded by the IGBT region 105. This is a dot-type RC-IGBT in which the diode regions 106 are isolated.

[0021] A gate wiring 102 is arranged around the IGBT region 105, and the gate wiring 102 is connected to a gate electrode pad 103 on the surface of the reverse conducting IGBT chip 2. A termination region 101 is arranged around the IGBT region 105 and the gate wiring 102. An emitter electrode 104 is formed on the surface of the IGBT region 105.

[0022] As shown in FIGS. 2 to 4, the side gate 201, which is the gate electrode of the IGBT, is formed along the side wall of the wide trench 204. ＋ The emitter layer 308, the p-base layer 310, and the n － The gate insulating film 210 is disposed on each surface of the drift layer 301 .

[0023] 3 and 4, the gate electrode of the IGBT in this embodiment has a sidewall structure. The gate electrodes are provided on both trench sidewalls in one p-base layer 310 of the IGBT, and are arranged in a stripe pattern with two gate electrodes, i.e., a pair of gate electrodes, for one p-base layer 310.

[0024] On the opposite surface of the surface structure of the IGBT region 105 , a p-collector layer 311 is formed and connected to a back metal electrode 305 .

[0025] Furthermore, a polysilicon field plate 205 is provided between the gate electrodes (side gates 201) in the wide trench 204. The polysilicon field plate 205 is electrically connected to a surface metal electrode 307 via an emitter contact 203.

[0026] Similarly, n ＋ The emitter layer 308, the p-base layer 310, and the p ＋ The contact layer 309 is ＋ The emitter contact 203 is etched deeper than the emitter layer 308 and electrically connects to the surface metal electrode 307 .

[0027] n ＋ By forming the emitter contact 203 deeper than the emitter layer 308, ＋ emitter layer 308, p-base layer 310, n － This can suppress the thyristor action formed by the drift layer 301 and the p collector layer 311, and can suppress breakdown due to current concentration. In addition, the polysilicon field plate 205 ensures the flat structure of the IGBT region 105 and stabilizes the breakdown voltage.

[0028] The gate electrode of the diode region 106 is formed by a trench gate 206 in which polysilicon is buried in a trench 211, and is electrically connected to a surface metal electrode 307 by a gate contact 207. The surface metal electrode 307 serves as an emitter electrode (104 in FIG. 1) in the IGBT region 105 and as an anode electrode in the diode region 106.

[0029] Here, the trench gate 206 in which polysilicon is buried in the trench 211 allows the surface metal electrodes 307 in the IGBT region 105 and the diode region 106 to be formed flat.

[0030] By making the surface flat, cracks due to stress concentration in uneven portions and fluctuations in the electrical characteristics of the element are reduced, and the mechanical strength resistance is improved and reliability is improved when wire bonding is performed to make electrical connections using, for example, aluminum alloys, gold alloys, copper alloys, etc. In addition, the boundary area between the IGBT region 105 and the diode region 106, which have different gate structures, can be reduced, and the effective active area of ​​the reverse conducting IGBT chip 2 is expanded, thereby improving performance.

[0031] The trench gate 206 of the diode region 106 is in contact with the low-concentration p-anode layer 306 via the gate insulating film 210. The low-concentration p-anode layer 306 is connected to the surface metal electrode 307 by the low-concentration layer anode contact 209. On the opposite side of the surface structure of the diode region 106, ＋ A cathode layer 304 is formed and connected to a backside metal electrode 305 .

[0032] In addition, in the diode region 106, low-concentration p anode layers 306 of different widths are formed between the trench gates, and high-concentration p anode layers 401 are formed on the low-concentration p anode layers 306 between the narrow trench gates, and are connected to the surface metal electrode 307 by high-concentration layer anode contacts 208 (FIG. 4).

[0033] The on-voltage and recovery characteristics of the diode can be optimized by the arrangement of the high-concentration p anode layer 401 and the low-concentration p anode layer 306. In particular, in a reverse-conducting IGBT, there is a problem that excess carriers flow into the diode region 106 due to carrier injection from the p base layer 310 of the IGBT region 105. The recovery characteristics can be improved by forming the high-concentration p anode layer 401 on the low-concentration p anode layer 306 between the narrow trench gates to control the main carrier injection and by arranging only the low-concentration p anode layer 306 between the wide trench gates.

[0034] Furthermore, as shown in FIG. 1 , when the area of ​​the diode region 106 is smaller than the area of ​​the IGBT region 105, the current density in the diode region 106 becomes higher than that in the IGBT region 105, and if the contact is formed deep as in an IGBT, current will concentrate in an acute angle, causing a problem of recovery breakdown.

[0035] Therefore, as in this embodiment shown in Figures 3 and 4, by providing the high-concentration layer anode contact 208 and the low-concentration layer anode contact 209 in the diode region 106 at a depth shallower than the emitter contact 203 in the IGBT region 105, it is possible to suppress breakdown due to current concentration.

[0036] As described above, the semiconductor device 1 of this embodiment is a reverse conducting IGBT having the IGBT region 105 and the diode region 106 in the same chip. － drift layer 301 and n － The diode region 106 includes a plurality of first trenches (wide trenches 204) formed in the drift layer 301, and a gate electrode (side gate 201) having a sidewall structure provided in the first trenches (wide trenches 204). － drift layer 301 and n － The semiconductor device has a structure in which a plurality of second trenches (trenches 211) are formed in the drift layer 301 and a conductive member is buried in the second trenches (trenches 211).

[0037] The diode region 106 is n － The semiconductor device has an anode layer (low-concentration p anode layer 306 and high-concentration p anode layer 401) formed on the drift layer 301 and sandwiched between a plurality of second trenches (trenches 211), and has regions where the spacing between the plurality of second trenches (trenches 211) is wide and regions where it is narrow, and the anode layer (high-concentration p anode layer 401) in the region where the spacing between the second trenches (trenches 211) is narrow is formed to have a higher concentration than the anode layer (low-concentration p anode layer 306) in the region where the spacing between the second trenches (trenches 211) is wide.

[0038] Furthermore, the conductive member embedded in the second trench (trench 211 ) is connected to the cathode electrode (surface metal electrode 307 ) of the diode region 106 .

[0039] The IGBT region 105 is － n formed on the drift layer 301 ＋ an emitter layer 308;＋ The emitter layer 308 has an emitter contact 203 that connects the emitter electrode (surface metal electrode 307) of the IGBT region 105, and the diode region 106 has an n － The device has an anode layer (low-concentration p anode layer 306 and high-concentration p anode layer 401) formed on the drift layer 301, and anode contacts (high-concentration layer anode contact 208 and low-concentration layer anode contact 209) that connect the anode layer and the anode electrode (surface metal electrode 307) of the diode region 106, and the anode contacts (high-concentration layer anode contact 208 and low-concentration layer anode contact 209) are formed to a depth shallower than that of the emitter contact 203.

[0040] The IGBT region 105 is － The diode region 106 has a p-type base layer 310 formed on the drift layer 301. － The device has an anode layer (low-concentration p-anode layer 306 ) formed on the drift layer 301 , and the anode layer (low-concentration p-anode layer 306 ) is formed to have a lower concentration than the p-base layer 310 .

[0041] With the above-described configuration, it is possible to form a diode structure similar to the structure of an IGBT with a sidewall structure, which has small feedback capacitance, low loss, and low noise, on the same chip, and since it is possible to form a structure with shape stability and a small area and planarized connection between the anode layer and gate electrode, the performance of a reverse conducting IGBT in which the IGBT and diode are formed on the same element is improved.

[0042] In addition, since element destruction due to mechanical stress during wire bonding or lead frame mounting, which are necessary for electrical connection of the element surface, and restrictions on the connection position during wire bonding are suppressed, it becomes easy to connect bonding wires or connect bonding materials and lead frames to the emitter electrode (surface metal electrode 307) of the IGBT region 105 and the anode electrode (surface metal electrode 307) of the diode region 106.

[0043] Second Embodiment A semiconductor device according to a second embodiment of the present invention will be described with reference to FIGS.

[0044] Fig. 5 is a top view of the reverse conducting IGBT chip 2 of this embodiment, and corresponds to Fig. 2 of the first embodiment. Fig. 6 is a cross-sectional view of the CC' portion of Fig. 5. Fig. 7 is a cross-sectional view of the DD' portion of Fig. 5. Figs. 5 to 7 all show the main structure of the boundary region between the IGBT region 105 and the diode region 106.

[0045] The difference from Example 1 is that the gate electrode of the diode region 106 has a first portion (FIG. 6) made up of a trench gate 206 in which polysilicon is embedded in a trench structure, and a second portion (FIG. 7) made up of a sidewall structure (side gate 701).

[0046] The trench gate 206 (trench gate electrode), which is the gate electrode of the diode region 106, and the side gate 701 are connected by polysilicon on the same plane, and are electrically connected to the surface metal electrode 307 at the gate contact 207 on the trench gate 206 in the first portion ( FIG. 6 ).

[0047] In comparison with Example 1, a portion of the diode region 106 can be arranged in the same structure as the IGBT region 105, which reduces processing variations during manufacturing, stabilizes characteristics, and suppresses electric field concentration and current concentration due to shape differences, further improving reliability.

[0048] Furthermore, in the second portion of the diode region 106 (FIG. 7), the regions of the low-concentration p anode layer 306 and the high-concentration p anode layer 401 are formed in small areas due to the wide trench structure, and since there is little hole injection from the anode layer, it is possible to reduce the recovery current.

[0049] Third Embodiment A semiconductor device according to a third embodiment of the present invention will be described with reference to FIG.

[0050] FIG. 8 is a cross-sectional view of a reverse conducting IGBT chip of this embodiment, which corresponds to a modification of the second embodiment (FIG. 7).

[0051] The difference from Example 2 is that the gate contact 207 and the heavily doped anode contact 208 formed in the diode region 106 are formed deep relative to the upper surface of the silicon substrate, similar to the emitter contact 203 in the IGBT region 105.

[0052] With this structure, the high-concentration p-anode layer 401 in contact with the high-concentration anode contact 208 is formed by self-aligned ion implantation after the contact hole is formed, thereby reducing the number of steps and enabling low-cost manufacturing.

[0053] Similarly, the high-concentration layer anode contact 208 and the low-concentration layer anode contact 209 in FIGS. 3 and 4 of Example 1 can be formed deep relative to the upper surface of the silicon substrate, thereby reducing the number of steps and enabling low-cost manufacturing.

[0054] A semiconductor device according to a fourth embodiment of the present invention will be described with reference to FIGS.

[0055] 9 and 10 are cross-sectional views of the reverse conducting IGBT chip of this embodiment, and correspond to modifications of FIGS. 6 and 7 of the second embodiment, respectively.

[0056] The difference from the second embodiment is that the gate insulating film 901 of the trench gate 206 formed in the diode region 106 and the gate insulating film 1001 of the side gate 701 are thicker than the gate insulating film 210 of the side gate 201 in the IGBT region 105 .

[0057] As shown in FIG. 1 , when the area of ​​the diode region 106 is smaller than the area of ​​the IGBT region 105, the current density in the diode region 106 becomes higher than that in the IGBT region 105, and hot carriers are generated at the trench corners where the electric field strength is high during recovery, resulting in a problem of degraded reliability of the gate insulating film.

[0058] Therefore, by thickening the gate insulating films 901 and 1001 of the trench gate 206 and the side gate 701 in the diode region 106, the reliability of the gate insulating film is improved even when hot carriers are generated.

[0059] A semiconductor device according to a fifth embodiment of the present invention will be described with reference to FIGS.

[0060] 11 and 12 are cross-sectional views of the reverse conducting IGBT chip of this embodiment, and correspond to modifications of FIGS. 6 and 7 of the second embodiment, respectively.

[0061] The difference from Example 2 is that the trench gate 206 and the side gate 701 formed in the diode region 106 are covered with a deep low-concentration p-anode layer 1101. Because the trench corners are covered with a low-concentration p-type layer, electric field concentration at the trench corners is suppressed, and the breakdown voltage can be improved.

[0062] In addition, since each trench is covered with a p-type layer, － The parasitic capacitance between the drift layer 301 and the gate electrode is reduced, the gate voltage during recovery is stabilized, voltage fluctuations due to capacitive coupling are suppressed, and the recovery characteristics are stabilized.

[0063] Sixth Embodiment A power conversion device according to a sixth embodiment of the present invention will be described with reference to FIG.

[0064] 13 is a circuit diagram showing a schematic configuration of a power conversion device 500 of this embodiment. In this embodiment, an example will be described in which the semiconductor device of the present invention described in the first to fifth embodiments is applied to a power conversion device.

[0065] FIG. 13 shows an example of the circuit configuration of the power conversion device 500 and the connection relationship between a DC power supply and a three-phase AC motor (AC load).

[0066] In a power conversion device 500 of this embodiment, for example, the semiconductor device 1 of the first embodiment is used as power switching elements 501 to 506. The power switching elements 501 to 506 are the reverse conducting IGBT 1 of the first embodiment, which is an element in which an IGBT and a diode are combined.

[0067] As shown in FIG. 13, the power conversion device 500 of this embodiment includes a pair of DC terminals, namely, a P terminal 531 and an N terminal 532, and AC terminals, namely, a U terminal 533, a V terminal 534, and a W terminal 535, the number of which is the same as the number of phases of the AC output.

[0068] The power supply also includes a switching leg consisting of a pair of power switching elements 501 and 502 connected in series, with a U-terminal 533 connected to their series connection point as its output. Another switching leg consists of power switching elements 503 and 504 connected in series with the same configuration, with a V-terminal 534 connected to their series connection point as its output. Another switching leg consists of power switching elements 505 and 506 connected in series with the same configuration, with a W-terminal 535 connected to their series connection point as its output.

[0069] The three-phase switching legs consisting of power switching elements 501 to 506 are connected between DC terminals P terminal 531 and N terminal 532, and DC power is supplied from a DC power supply (not shown). The three-phase AC terminals of power conversion device 500, namely U terminal 533, V terminal 534, and W terminal 535, are connected to a three-phase AC motor (not shown) as a three-phase AC power supply.

[0070] Gate circuits 511 to 516 are connected to the input terminals of the gates of the power switching elements 501 to 506, each of which is made up of the reverse conducting IGBT 1, and the power switching elements 501 to 506 are controlled by the gate circuits 511 to 516, respectively. The gate circuits 511 to 516 are controlled in an integrated manner by an integrated control circuit (not shown).

[0071] The gate circuits 511 to 516 comprehensively and appropriately control the power switching elements 501 to 506, and the DC power of a DC power supply (not shown) is converted into three-phase AC power, which is output from the U terminal 533, the V terminal 534, and the W terminal 535.

[0072] Applying the semiconductor device 1 of the present invention to the power conversion device 500 has the following advantages: (1) cost reduction due to the ability to share the termination regions of the IGBT and diode, and (2) reduced thermal resistance due to losses generated in the IGBT region or diode region being dissipated throughout the entire chip.

[0073] The present invention is not limited to the above-described embodiments, but includes various modifications. For example, the above-described embodiments have been described in detail to clearly explain the present invention, and the present invention is not necessarily limited to those including all of the described configurations. Furthermore, it is possible to replace part of the configuration of one embodiment with the configuration of another embodiment, or to add the configuration of another embodiment to the configuration of one embodiment. Furthermore, it is possible to add, delete, or replace part of the configuration of each embodiment with other configurations.

[0074] REFERENCE SIGNS LIST 1...Semiconductor device (reverse conducting IGBT) 2...Reverse conducting IGBT chip 101...Termination region 102...Gate wiring 103...Gate electrode pad 104...Emitter electrode 105...IGBT region 106...Diode region 201, 701...Side gate 203...Emitter contact 204...Wide trench 205...Polysilicon field plate 206...Trench gate 207...Gate contact 208...Highly doped anode contact 209...Lightly doped anode contact 210...Gate insulating film 211...Trench 301...n － Drift layer 302...n Buffer layer 304...n ＋ Cathode layer 305... rear surface metal electrode 306... low concentration p anode layer 307... front surface metal electrode 308... n ＋ Emitter layer 309...p ＋ Contact layer 310...p base layer 311...p collector layer 401...highly doped p anode layer 500...power conversion device 501-506...power switching elements 511-516...gate circuits 521-526...diodes 531...P terminal 532...N terminal 533...U terminal 534...V terminal 535...W terminal 901, 1001...thick gate insulating film 1101...deep low-doped p anode layer.

Claims

1. A semiconductor device having an IGBT and a diode on the same chip, wherein the IGBT comprises a drift layer, a plurality of first trenches formed in the drift layer, and a gate electrode with a sidewall structure provided in the first trench, and the diode comprises the drift layer, a plurality of second trenches formed in the drift layer, and a structure in which a conductive material is buried in the second trench.

2. A semiconductor device according to claim 1, wherein the diode comprises a first portion and a second portion different from the first portion, the first portion having a trench gate electrode in which the conductive member is embedded within the second trench, the second portion having a plurality of third trenches formed within the drift layer, the third trenches being wider than the second trenches and arranged in a stripe pattern, and a pair of gate electrodes with a sidewall structure formed along the side walls of the third trenches, the pair of gate electrodes with a sidewall structure being connected to the trench gate electrode.

3. A semiconductor device according to claim 1, wherein the diode has an anode layer formed on the drift layer and sandwiched between the plurality of second trenches, and the plurality of second trenches have regions where the spacing between them is wide and regions where it is narrow, and the anode layer in the region where the spacing between the second trenches is narrow has a higher concentration than the anode layer in the region where the spacing between the second trenches is wide.

4. A semiconductor device according to claim 1, wherein the conductive member embedded in the second trench is connected to the cathode electrode of the diode.

5. A semiconductor device according to claim 1, wherein the IGBT has an emitter layer formed on the drift layer and an emitter contact connecting the emitter layer to the emitter electrode of the IGBT, and the diode has an anode layer formed on the drift layer and an anode contact connecting the anode layer to the anode electrode of the diode, and the anode contact is shallower in depth than the emitter contact.

6. A semiconductor device according to claim 1, wherein the IGBT has an emitter layer formed on the drift layer and an emitter contact connecting the emitter layer to the emitter electrode of the IGBT, and the diode has an anode layer formed on the drift layer and an anode contact connecting the anode layer to the anode electrode of the diode, and the anode contact and the emitter contact are formed deeper than the top surface of the silicon substrate.

7. A semiconductor device according to claim 1, wherein the gate electrode of the IGBT is provided in the first trench via a first insulating film, the conductive member of the diode is buried in the second trench via a second insulating film, and the second insulating film is thicker than the first insulating film.

8. A semiconductor device according to claim 1, wherein the diode has a p-type layer formed on the drift layer, and at least the bottom corners of the second trench are covered with the p-type layer.

9. A semiconductor device according to claim 2, wherein the diode has a p-type layer formed on the drift layer, and at least the bottom corners of the third trench are covered with the p-type layer.

10. A semiconductor device according to claim 1, wherein, in a plan view of the semiconductor device, the diode is arranged surrounded by the IGBT.

11. A semiconductor device according to claim 1, wherein the IGBT has a p-base layer formed on the drift layer, and the diode has an anode layer formed on the drift layer, and the anode layer has a lower impurity concentration than the p-base layer.

12. A semiconductor device according to claim 1, wherein a bonding wire is connected to the emitter electrode of said IGBT and the anode electrode of said diode.

13. A semiconductor device according to claim 1, wherein a bonding material and a lead frame are connected to the emitter electrode of said IGBT and the anode electrode of said diode.

14. A power conversion device having: a pair of DC terminals; AC terminals in the same number as the number of phases of AC output; switching legs connected between the pair of DC terminals, each of which has a switching element and two parallel circuits of the diodes of opposite polarity connected in series, the number of which is the same as the number of phases of the AC output; and a gate circuit for controlling the switching elements, wherein the switching elements are semiconductor devices as defined in any one of claims 1 to 13.

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