Liquid crystal display apparatus, display panel and array substrate thereof
Patent Information
- Application Number
- PCT/CN2024/080834
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-03-08
- Publication Date
- 2025-10-02
AI Technical Summary
In dual-cell-thickness products, there are changes in cell thickness at the junction of the transmissive and reflective areas, as well as film layer step differences at the connecting vias, which lead to irregular arrangement of liquid crystal molecules and light leakage, affecting the reflection contrast, especially in high-PPI products.
On the array substrate, part of the area connecting the via hole is set between the transmission area and the organic resin layer, the length of the second conductive part is extended, and it is electrically connected to the pixel electrode through a bridging structure. Transparent conductive material is used for blackening treatment to reduce the light leakage area of the reflective area.
It effectively reduces the light leakage area at the connection vias, improves the reflection contrast and display quality, and improves the display effect of high PPI products.
Smart Images
Figure CN2024080834_02102025_PF_FP_ABST
Abstract
Description
Liquid crystal display device, display panel and array substrate thereof Technical Field
[0001] The present disclosure relates to the field of display technology, and in particular to a liquid crystal display device, a display panel and an array substrate thereof. Background Art
[0002] In dual-cell-thickness products, there are two areas where the cell thickness varies. First, there's a cell thickness variation at the junction of the transmissive and reflective areas. This is where the organic resin layer changes from being fully covered in the reflective area to being stripped away in the transmissive area. The high-thickness organic resin slope creates a significant step difference, causing irregular alignment of the liquid crystal molecules and light leakage. Second, the organic resin layer also experiences a significant film step difference at the connection vias, where the cell thickness is high, failing to meet the black state optical requirements of the reflective area. Consequently, significant light leakage occurs throughout the entire connection via. For products with a higher PPI (pixel density), the area of the connection vias accounts for a significant proportion of the total pixel area, and light leakage at the connection vias significantly impacts the reflective contrast ratio.
[0003] It should be noted that the information disclosed in the above background technology section is only used to enhance the understanding of the background of the present disclosure, and therefore may include information that does not constitute prior art known to ordinary technicians in the field.
[0004] Summary of the Invention
[0005] The purpose of the present disclosure is to overcome the above-mentioned deficiencies of the prior art, provide a liquid crystal display device, a display panel and an array substrate thereof, and improve the light leakage phenomenon in the reflective area.
[0006] According to one aspect of the present disclosure, a liquid crystal display array substrate is provided, wherein the array substrate has a display area, wherein the display area has sub-pixel areas distributed in an array, and each sub-pixel area includes a transmissive area and a reflective area that are adjacently arranged;
[0007] The array substrate comprises a base substrate, a passivation layer, an organic resin layer, a pixel electrode layer and a metal reflective layer stacked in sequence, and a switching transistor is provided in the sub-pixel area of the array substrate;
[0008] The organic resin layer is disposed in the reflective area, and the metal reflective layer covers the organic resin layer;
[0009] The passivation layer has a connection via hole; at least a portion of the connection via hole is located between the transmission area and the organic resin layer;
[0010] The pixel electrode layer is provided with a pixel electrode in the sub-pixel area; the pixel electrode is electrically connected to the first electrode of the switching transistor through the connecting via hole, and the pixel electrode covers the transmission area.
[0011] In one disclosed example of the present disclosure, the array substrate further includes a driving layer located between the base substrate and the passivation layer;
[0012] The driving layer includes a semiconductor layer and a source-drain metal layer stacked on a base substrate;
[0013] The semiconductor layer has a first electrode of a switching transistor, and the source-drain metal layer has a second conductive portion; the second conductive portion is electrically connected to the first electrode of the switching transistor, and the pixel electrode is electrically connected to the second conductive portion through the connecting via.
[0014] In a disclosed example of the present disclosure, the pixel electrode is directly electrically connected to the second conductive portion through the connecting via.
[0015] In a disclosed example of the present disclosure, the second conductive portion has a first surface away from the base substrate, and the first surface is located in the transmission area;
[0016] At least a portion of the first surface is blackened.
[0017] In a disclosed example of the present disclosure, the array substrate further includes a bridging layer, wherein the bridging layer has a bridging structure located in the sub-pixel area;
[0018] One end of the bridge structure is electrically connected to the second conductive portion, and the other end is electrically connected to the pixel electrode through the connecting via hole.
[0019] In a disclosed example of the present disclosure, the material of the bridge structure is a transparent conductive material.
[0020] In a disclosed example of the present disclosure, the second conductive portion is overlapped above one end of the bridge structure.
[0021] In a disclosed example of the present disclosure, a connection position between the bridge structure and the second conductive portion is located within the reflective area.
[0022] In a disclosed example of the present disclosure, the array substrate further includes a metal shielding structure;
[0023] The metal shielding structure is located between the passivation layer and the organic resin layer; and the orthographic projection of the metal shielding structure on the base substrate completely covers the orthographic projection of the channel region of the active layer of the switching transistor on the base substrate.
[0024] In a disclosed example of the present disclosure, the organic resin layer has an organic resin structure in the sub-pixel area, and the thickness of the organic resin structure is 2-3 μm.
[0025] In one disclosed example of the present disclosure, the side of the organic resin structure facing away from the base substrate has a plurality of protrusions.
[0026] In a disclosed example of the present disclosure, the shape of the protrusion along the edge line perpendicular to the cross section of the base substrate is semicircular or parabolic.
[0027] In a disclosed example of the present disclosure, the array substrate further includes a common electrode layer;
[0028] The driving layer further includes a gate layer, and the common electrode layer and the gate layer are arranged in the same layer.
[0029] In a disclosed example of the present disclosure, the connection via is located in the transmission area.
[0030] In one disclosed example of the present disclosure, the array substrate further includes a driving layer located between the base substrate and the passivation layer;
[0031] The driving layer includes a semiconductor layer, a bridge layer and a source-drain metal layer stacked on a substrate;
[0032] The semiconductor layer has a first electrode of the switching transistor, the bridge layer has a bridge structure located in the sub-pixel area, and the source-drain metal layer has a second conductive portion; the second conductive portion is electrically connected to the first electrode of the switching transistor, one end of the bridge structure is electrically connected to the second conductive portion, and the other end is electrically connected to the pixel electrode through the connecting via;
[0033] The material of the bridge structure is a transparent conductive material.
[0034] In a disclosed example of the present disclosure, the connection via is located in the reflective area; a light shielding layer is provided on the upper surface or the lower surface of the passivation layer; and the light shielding layer surrounds the connection via.
[0035] In a disclosed example of the present disclosure, the light shielding layer is located on the upper surface of the passivation layer.
[0036] According to another aspect of the present disclosure, a liquid crystal display panel is provided, comprising the array substrate described above, and a color filter substrate arranged in a cell with the array substrate, wherein a liquid crystal layer is provided between the array substrate and the color filter substrate.
[0037] In a disclosed example of the present disclosure, the thickness of the liquid crystal layer in the transmission area is 1.5 to 2 times the thickness of the liquid crystal layer in the reflection area.
[0038] According to another aspect of the present disclosure, a liquid crystal display device is provided, comprising a backlight module and the above-mentioned liquid crystal display panel, wherein the backlight module is located on a side of an array substrate away from a color filter substrate.
[0039] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure. BRIEF DESCRIPTION OF THE DRAWINGS
[0040] The accompanying drawings are incorporated into and constitute a part of the specification, illustrate embodiments consistent with the present disclosure, and together with the specification, are used to explain the principles of the present disclosure. Obviously, the drawings described below are only some embodiments of the present disclosure, and those skilled in the art can derive other drawings based on these drawings without inventive effort.
[0041] FIG1 is a schematic structural diagram of a display panel in the first disclosed embodiment of the present disclosure.
[0042] FIG2 is a schematic structural diagram of a display panel in the first disclosed embodiment of the present disclosure.
[0043] FIG3 is a schematic structural diagram of a driving layer in the first disclosed embodiment of the present disclosure.
[0044] FIG4 is a schematic structural diagram of a driving layer in the first disclosed embodiment of the present disclosure.
[0045] FIG5 is a schematic structural diagram of a display panel in the first disclosed embodiment of the present disclosure.
[0046] FIG6 is a schematic structural diagram of an array substrate in the first disclosed embodiment of the present disclosure.
[0047] FIG. 7 is a schematic structural diagram of an array substrate in a second disclosed embodiment of the present disclosure.
[0048] FIG8 is a schematic diagram of a top view of the structure of an array substrate in the related art.
[0049] FIG9 is a schematic diagram of a structure after a connecting via hole is offset in the related art.
[0050] FIG10 is a schematic diagram of a top view of the array substrate in the second disclosed embodiment of the present disclosure.
[0051] FIG11 is a schematic diagram of the structure after the connecting via is offset in the second disclosed embodiment of the present disclosure.
[0052] Explanation of the accompanying symbols: ARR, array substrate; AA, display area; PA, sub-pixel area; TA, transmission area; FA, reflection area; SBT, base substrate; PVX, passivation layer; YO, organic resin layer; PEL, pixel electrode layer; PE, pixel electrode; JO, metal reflection layer; SW, switching transistor; HO, connection via; SC, metal shielding layer; DRL, drive layer; GT, gate layer; GI, gate insulation layer; SCL, semiconductor layer; SD, source and drain metal layer; ML1, first conductive part; ML2, second conductive part; CF, color filter substrate; LC, liquid crystal layer; ZG, bridge layer; PNL, display panel; FSA, frame sealing glue; PP, sub-pixel; GL, scan line; DL, data voltage line; CL, common voltage line; COMP, common electrode; BM, black matrix; BB, peripheral area. DETAILED DESCRIPTION
[0053] Example embodiments will now be described more fully with reference to the accompanying drawings. However, the example embodiments can be implemented in many forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete and will fully convey the concepts of the example embodiments to those skilled in the art. Like reference numerals in the figures represent identical or similar structures, and thus their detailed descriptions will be omitted. Furthermore, the figures are merely schematic illustrations of the present disclosure and are not necessarily drawn to scale.
[0054] Although relative terms such as "upper" and "lower" are used in this specification to describe the relationship of one illustrated component to another, these terms are used herein for convenience only, such as in accordance with the orientation of the illustrations in the accompanying drawings. It will be understood that if the illustrated device were flipped upside down, the component described as "upper" would become the component "lower." When a structure is referred to as "on" another structure, this may mean that the structure is integrally formed with the other structure, that the structure is "directly" disposed on the other structure, or that the structure is "indirectly" disposed on the other structure via the other structure.
[0055] The terms "a", "an", "the", "said" and "at least part" are used to indicate the presence of one or more elements / components / etc.; the terms "including" and "having" are used to express open-ended inclusion and mean that additional elements / components / etc. may be present in addition to the listed elements / components / etc.; the terms "first", "second", etc. are used only as labels and are not intended to limit the quantity of their objects.
[0056] Structural layer A is located on the side of structural layer B away from the base substrate. This means that structural layer A is formed on the side of structural layer B facing away from the base substrate. When structural layer B is a patterned structure, part of structural layer A may be located at the same physical height as structural layer B or lower than the physical height of structural layer B, with the base substrate serving as a height reference.
[0057] A thin film transistor (TFT) includes an active layer, a gate insulating layer and a gate that are stacked. The active layer is located in the semiconductor layer, and the active layer includes a channel region and a source and a drain located on both sides of the channel region. The channel region maintains semiconductor properties, and the source and the drain are both conductive. In the embodiment of the present disclosure, when using transistors with opposite polarities or when the direction of current changes during circuit operation, the functions of the "source" and the "drain" are sometimes interchanged, that is, the "source" and the "drain" can be interchanged. In the embodiment of the present disclosure, for any transistor, one of the "source" and the "drain" is referred to as the first electrode of the transistor, and the other is referred to as the second electrode of the transistor.
[0058] The present disclosure provides a double-liquid crystal box thick semi-transparent and semi-reflective liquid crystal display device, including a display panel PNL and a backlight module. The semi-transparent and semi-reflective liquid crystal display device has the functions of both transmission and reflection display. When the ambient light is insufficient, it can use its own backlight source for transmission display. When the ambient light is sufficient, it can reflect the ambient light to increase the brightness and improve outdoor readability. It can even turn off the backlight source to reduce power consumption. Therefore, whether in a dark room or under strong light, the semi-transparent and semi-reflective products can have good image quality performance. In order to maximize the aperture ratio, the display panel of the semi-transparent and semi-reflective liquid crystal display device usually designs the transistor device in the reflective area and is covered by the reflective layer. Specifically, referring to Figure 1, the liquid crystal display panel PNL may include an array substrate ARR and a color film substrate CF arranged in a pair of boxes, and a liquid crystal layer LC sandwiched between the array substrate ARR and the color film substrate CF. The backlight module is located on the side of the array substrate ARR away from the color film substrate CF. The display panel PNL also has a sealing glue FSA surrounding the liquid crystal layer LC. The array substrate ARR is used to drive the deflection of liquid crystal molecules in the liquid crystal layer LC to control the amount of light transmitted and achieve grayscale display. The color filter substrate CF allows light passing through the liquid crystal layer LC to pass through the color filter substrate CF to form corresponding colored light, thus achieving full-color display.
[0059] In the first disclosed embodiment of the present disclosure, the array substrate ARR is the substrate facing the backlight module. By changing the signals and voltages on the array substrate ARR, the rotation direction of the liquid crystal molecules in the liquid crystal layer LC is controlled, thereby controlling whether polarized light is emitted from each pixel, thereby achieving the display purpose. Referring to Figure 2, the array substrate ARR has a display area AA and a peripheral area BB. The display area AA has multiple scan lines GL and multiple data voltage lines DL located on one side of the base substrate SBT. In this example, the scan lines GL are arranged in the row direction, and the data voltage lines DL are arranged in the column direction. The multiple scan lines GL and the multiple data voltage lines DL intersect in the extension direction, defining multiple sub-pixel areas PA. The sub-pixels PP and the pixel driving circuit can be located in the sub-pixel areas PA. In this example, the pixel driving circuit can be a thin-film transistor serving as a switching transistor SW. The sub-pixel PP can include a pixel electrode PE and a common electrode COMP. The pixel electrode PE and the common electrode COMP at least partially meet and overlap to form a capacitor. The array substrate ARR can also be provided with a common voltage line CL extending in the row direction. The second electrode of the switching transistor SW is electrically connected to the data voltage line DL, the first electrode of the switching transistor SW is electrically connected to the pixel electrode PE, the gate of the switching transistor SW is electrically connected to the scan line GL, and the common electrode COMP is electrically connected to the common voltage line CL. During operation, the common voltage line CL can apply a common voltage to the common electrode COMP; the switching transistor SW can respond to the scan signal applied to the scan line GL and apply the driving voltage on the data voltage line DL to the pixel electrode PE. In this way, by controlling the electric field strength between the pixel electrode PE and the common electrode COMP, the degree of twisting or tilting of the liquid crystal molecules within the corresponding range of the pixel electrode PE can be adjusted, thereby adjusting the polarization direction of the polarized light passing through the liquid crystal molecules, and ultimately adjusting the light output rate of the display panel PNL within the corresponding range of the pixel electrode PE, thereby achieving brightness control of the sub-pixel PP.
[0060] The peripheral area BB of the array substrate ARR has a first peripheral area bound to a source driver circuit, and a second peripheral area having a gate driver circuit. The first peripheral area is located at one end of the array substrate ARR in the column direction, and the second peripheral area is located at one end of the array substrate ARR in the row direction. The gate driver circuit is electrically connected to each scan line GL and is used to apply a scan signal to the scan line GL that turns on the switching transistor SW. The source driver circuit is electrically connected to the data voltage line DL and is used to generate a data voltage based on the screen synchronization data and apply it to the data voltage line DL.
[0061] In the first disclosed embodiment of the present disclosure, referring to FIG1 , the color filter substrate CF is a substrate facing the user. Referring to FIG1 and FIG2 , the color filter substrate CF is provided with a color filter unit (the color filter unit is not shown in the figure) and a black matrix BM surrounding the color filter unit. The black matrix BM needs to cover metal traces such as the data voltage trace DL, the common voltage trace CL and the scan trace GL to avoid reflections from these metal traces. Not only that, a fringe electric field will be formed between traces such as the data voltage trace DL and the scan trace GL and electrodes such as the common electrode COMP and the pixel electrode PE. The fringe electric field will cause the deflection of the liquid crystal molecules at the edge of the common electrode COMP and the pixel electrode PE to be disordered, which will easily lead to abnormal reflections at the edge of the pixel. In order to ensure the normal display of the liquid crystal display panel PNL, the black matrix BM needs to cover the edge of the common electrode COMP or the pixel electrode PE.
[0062] In the first disclosed embodiment of the present disclosure, an alignment layer is provided between the array substrate ARR and the color film substrate CF. For example, a first alignment layer is provided on the upper surface of the array substrate ARR (the surface of the array substrate ARR away from the base substrate SBT), and a second alignment layer is provided on the lower surface of the color film substrate CF (the surface of the color film substrate CF close to the base substrate SBT). The first alignment layer is formed on a first transparent conductive film (serving as a pixel layer), and the second alignment layer is formed on a second transparent conductive film (serving as a common electrode layer).
[0063] In a first disclosed embodiment of the present disclosure, the first transparent conductive film and the second transparent conductive film may be made of indium tin oxide (ITO).
[0064] In the first disclosed embodiment of the present disclosure, polarizers are provided on the sides of the array substrate ARR and the color filter substrate CF facing away from each other. For example, a first polarizer is provided on the lower surface of the array substrate ARR (the surface of the array substrate ARR close to the base substrate SBT), and a second polarizer is provided on the upper surface of the color filter substrate CF (the surface of the color filter substrate CF away from the base substrate SBT).
[0065] In the first disclosed embodiment of the present disclosure, the deflection properties of the first polarizer and the second polarizer may be consistent. Of course, they may also be inconsistent, for example, perpendicular to each other.
[0066] In the first disclosed embodiment of the present disclosure, in order to ensure the aesthetic appearance of the entire display screen, display or display device, the second polarizer provided on the color film substrate CF can extend outward to the edge of the color film substrate CF. In this way, the side of the color film substrate CF facing the user will not have an abrupt step due to the presence of the second polarizer, which can improve the aesthetics of the display screen, display or display device. Of course, the first polarizer provided on the array substrate ARR can only cover the area of the array substrate ARR located on the inner side of the sealing glue FSA, so that the material of the first polarizer can be saved and the cost can be reduced. After the backlight module emits light, the light passes through the first polarizer on the array substrate ARR and is irradiated onto the array substrate ARR, and passes through the array substrate ARR, rotates through the liquid crystal layer LC, and then passes through the color film substrate CF and passes through the second polarizer on the color film substrate CF, thereby displaying the picture.
[0067] In the first disclosed embodiment of the present disclosure, a wave plate may be positioned between the second polarizer and the color filter substrate CF. This ensures that natural light, after passing through the second polarizer and the wave plate, enters the liquid crystal layer LC as circularly polarized light. In this example, the wave plate can be configured as either a quarter-wave plate or a half-wave plate, depending on actual needs. In other examples, the wave plate may be omitted, and the alignment angle of the second alignment layer may be adjusted to ensure that the light entering the liquid crystal layer LC is circularly polarized.
[0068] In the first disclosed embodiment of the present disclosure, referring to FIG10 , each sub-pixel area PA may include a transmissive area TA and a reflective area FA disposed adjacent to each other. In this example, the transmissive area TA allows the backlight emitted by the backlight module disposed on the side of the array substrate ARR facing away from the color filter substrate CF to pass through; the reflective area FA reflects ambient light incident from the side of the color filter substrate CF to achieve display utilizing ambient light. The transflective display panel PNL generally has two modes: one is when there is sufficient ambient light, the backlight is turned off, and a full reflection mode display is performed through the reflective area FA; the other is when there is insufficient ambient light, the backlight module is turned on, and display is performed through both the transmission of the backlight by the transmissive area TA and the reflection of the ambient light by the reflective area FA.
[0069] In the first disclosed embodiment of the present disclosure, referring to FIG5 , the thickness of the liquid crystal layer LC in the transmissive area TA is 1.5 to 2 times the thickness of the liquid crystal layer LC in the reflective area FA. It is understood that in the ECB normally black display mode, since the initial black state liquid crystal has no twist and does not change its phase in response to incident light, the reflection and transmission phases are modulated entirely by the cell thickness. Therefore, a cell thickness difference of twice the cell thickness is the optimal optical path choice. The optical path difference between reflected and transmitted light is consistent, ensuring a coordinated transmissive and reflective display with consistent grayscale. If the TN normally white mode is used, due to the twist of the liquid crystal, the optimal cell thickness difference is not twice, but rather between 1.5 and 2 times.
[0070] In the first disclosed embodiment of the present disclosure, referring to FIG10 , the area of the transmissive area TA in each sub-pixel area PA is smaller than the area of the reflective area FA. This is because the display panel PNL primarily utilizes ambient light to achieve a fully reflective display mode. Therefore, the area of the reflective area FA is larger than the area of the transmissive area TA, thereby better enabling display primarily utilizing ambient light.
[0071] In the first disclosed embodiment of the present disclosure, referring to FIG6 and FIG7 , the array substrate ARR includes a common electrode layer COML, a stacked base substrate SBT, a driving layer DRL, a passivation layer PVX, an organic resin layer YO, a pixel electrode layer PEL, and a metal reflective layer JO.
[0072] In the first disclosed embodiment of the present disclosure, the substrate substrate SBT can be a substrate substrate SBT of an inorganic material, a substrate substrate SBT of an organic material, or a substrate substrate SBT in which organic and inorganic materials are alternately stacked. For example, in one embodiment of the present disclosure, the material of the substrate substrate SBT can be a glass material such as soda-lime glass, quartz glass, sapphire glass, etc. In another embodiment of the present disclosure, the material of the substrate substrate SBT can be polymethylmethacrylate (PMMA), polyvinyl alcohol (PVA), polyvinylphenol (PVP), polyethersulfone (PES), polyimide, polyamide, polyacetal, polycarbonate (PC), polyethylene terephthalate (PET), polyethylene naphthalate (PEN), or a combination thereof. In another embodiment of the present disclosure, the substrate SBT may be a flexible substrate SBT, for example, the substrate SBT may be made of polyimide (PI). The substrate SBT may also be a composite of multiple layers. For example, in one embodiment of the present disclosure, the substrate SBT may include a bottom film layer, a pressure-sensitive adhesive layer, a first polyimide layer, and a second polyimide layer stacked in sequence.
[0073] In the first disclosed embodiment of the present disclosure, the driving layer DRL has a switching transistor SW for controlling the pixel electrode PE. In this example, the switching transistor SW can be a bottom-gate switching transistor. It can be understood that in other embodiments of the present disclosure, the switching transistor SW can also be a top-gate switching transistor. For example, referring to Figures 3 and 5, the driving layer DRL includes a gate layer GT, a gate insulating layer GI, a semiconductor layer SCL, and a source-drain metal layer SD stacked on the substrate SBT. The gate layer GT is formed with a scan line GL, and the gate layer GT is provided with a side branch portion, which can serve as the gate of the switching transistor SW. The semiconductor layer SCL is formed with an active layer of the switching transistor SW, which includes a channel region of the switching transistor SW and a second electrode of the switching transistor SW and a first electrode of the switching transistor SW located on both sides of the channel region. The source / drain metal layer SD is formed with a data voltage line DL, as well as a first conductive portion ML1 and a second conductive portion ML2. The first conductive portion ML1 is used to electrically connect the data voltage line DL to the second electrode of the switching transistor SW, and the second conductive portion ML2 is used to electrically connect the first electrode of the switching transistor SW to the pixel electrode PE. For another example, referring to FIG. 4 , the drive layer DRL includes a semiconductor layer SCL, a gate insulating layer GI, a gate layer GT, an interlayer dielectric layer, and a source / drain metal layer SD, which are stacked on a base substrate SBT. The gate layer GT is provided with a side branch portion, which can serve as the gate of the switching transistor SW. The semiconductor layer SCL forms the active layer of the switching transistor SW, which includes the channel region of the switching transistor SW and the second electrode and the first electrode of the switching transistor SW located on both sides of the channel region. The source / drain metal layer SD is formed with a data voltage line DL, as well as a first conductive portion ML1 and a second conductive portion ML2. The first conductive portion ML1 is used to electrically connect the data voltage line DL to the second electrode of the switching transistor SW, and the second conductive portion ML2 is used to electrically connect the first electrode of the switching transistor SW to the pixel electrode PE. The gate insulating layer GI has vias that expose the second electrode and a portion of the first electrode of the switching transistor SW, respectively. The first conductive portion ML1 is electrically connected to the second electrode of the switching transistor SW through the vias in the gate insulating layer GI, and one end of the second conductive portion ML2 is electrically connected to the first electrode of the switching transistor SW through the vias in the gate insulating layer GI.
[0074] In the first disclosed embodiment of the present disclosure, referring to Figures 6 and 7 , a passivation layer PVX, an organic resin layer YO, a pixel electrode layer PEL, and a metal reflective layer JO are sequentially formed on the upper surface of the source / drain metal layer SD (on the side of the source / drain metal layer SD away from the base substrate SBT). The organic resin layer YO is disposed within the reflective area FA, and the metal reflective layer JO covers the organic resin layer YO. A plurality of pixel electrodes PE are disposed within the pixel electrode layer PEL, each covering the entire transmissive area TA and the reflective area FA, with a certain gap reserved between adjacent pixel electrodes PE. The metal reflective layer JO also acts as a reflective electrode, with the orthographic projection of the reflective electrode on the base substrate SBT being smaller than the orthographic projection of the pixel electrode PE on the base substrate SBT. This results in the reflective electrode region being the reflective area FA, and the remaining pixel electrodes PE being the transmissive area TA. In the transmissive area TA, light emitted from the backlight module behind the display panel PNL passes through the array substrate ARR and the liquid crystal layer LC, and then emerges from the color filter substrate CF, thereby providing light for the display. In the reflective area FA, external light supplied from the front of the display panel PNL is incident through the color filter substrate CF, passes through the liquid crystal layer LC, and then enters the reflective electrode. It is then reflected by the reflective electrode and emitted through the liquid crystal layer LC and the color filter substrate CF, thereby providing light for the display.
[0075] In the first disclosed embodiment of the present disclosure, the gate layer GT is made of metal material.
[0076] In the first disclosed embodiment of the present disclosure, the common electrode layer COML can be provided on the same layer as the gate layer GT. This can enhance the supply of common voltage within the display panel PNL. In this example, the common electrode layer COML, like the gate layer GT, is made of a metal material.
[0077] In the first disclosed embodiment of the present disclosure, the organic resin layer YO has an organic resin structure in the sub-pixel area PA. The thickness of the organic resin structure is 2-3 μm. The dielectric constant of the organic resin structure is small, which can be used to reduce the parasitic capacitance between the pixel electrode PE of the reflective area FA and the metal wiring below, thereby improving the image quality.
[0078] In the first disclosed embodiment of the present disclosure, the materials of the pixel electrode PE and the common electrode COMP are both indium tin oxide (ITO), that is, the pixel electrode PE and the common electrode COMP are both transparent electrodes. It will be understood that in some other embodiments of the present disclosure, the material of at least one of the pixel electrode PE and the common electrode COMP may also be other conductive materials, in particular, other transparent conductive metal oxide materials.
[0079] In the first disclosed embodiment of the present disclosure, the metal reflective layer JO is made of materials such as aluminum or silver to achieve good reflection of the ambient light irradiated thereon.
[0080] In the first disclosed embodiment of the present disclosure, the material of the semiconductor layer SCL is a metal oxide semiconductor material. It is understood that in other embodiments of the present disclosure, the material of the semiconductor layer SCL may also be a silicon semiconductor material, such as polycrystalline silicon, amorphous silicon, or low-temperature polycrystalline silicon. The gate insulating layer GI may also be configured as a multi-layer structure or directly as a single-layer structure as needed.
[0081] In the first disclosed embodiment of the present disclosure, the switch transistor SW is a thin film transistor.
[0082] In related art, as shown in Figure 8 , the passivation layer PVX has a first connection via in the reflective area FA that partially exposes the second conductive portion ML2. The organic resin layer YO also has a second connection via in the reflective area FA that exposes the first connection via. The pixel electrode PE is electrically connected to the second conductive portion ML2 via the second connection via in the organic resin layer YO and the first connection via in the passivation layer PVX. The second connection via in the organic resin layer YO is generally designed to be larger than the first connection via in the passivation layer PVX to ensure smooth conduction even if the first and second connection vias deviate from their alignment due to process fluctuations. In a double-cell-thickness transflective display panel PNL, the refractive index difference between the liquid crystal cell in the reflective area FA and the transmissive area TA is defined as Δn, and the liquid crystal cell thicknesses in the reflective area FA and the transmissive area TA are d and d', respectively. Ambient light from the color filter substrate CF first enters the reflective area FA and then reflects out of the reflective area FA, passing through the liquid crystal cell and the color filter substrate CF twice. This optical path creates an optical path difference of 2*Δn*d. The backlight emitted by the backlight module is incident on the array substrate ARR, transmits through the liquid crystal cell, and then exits the color filter substrate CF, passing through the liquid crystal cell only once. The optical path difference generated by this optical path is △n*d'. When d' = 2d, the optical path difference required for the transmissive area TA and the reflective area FA to transition between black and white states is similar, resulting in a good overall optical effect. Parameters such as transmittance and contrast in the reflective and transmissive areas FA and TA can be adjusted to achieve optimal values simultaneously. However, as shown in Figure 5, the difference in liquid crystal cell thickness causes irregular arrangement of liquid crystal molecules at the transition between the reflective and transmissive areas FA and TA, as well as at the connecting vias, resulting in a certain amount of light leakage. Specifically, in dual-cell-thickness products, there are two locations where the cell thickness varies. First, there's a cell thickness variation at the junction of the transmissive area TA and the reflective area FA. The organic resin layer YO changes from being fully covered in the reflective area FA to being removed from the transmissive area TA. The high-thickness organic resin slope has a large step difference, causing irregular arrangement of the liquid crystal molecules and light leakage. Second, the connection vias on the organic resin layer YO also have a large film layer step difference. Furthermore, the high cell thickness here doesn't meet the black-state optical requirements of the reflective area FA, resulting in severe light leakage throughout the connection vias. For products with a higher PPI (pixel density), the area of the connection vias accounts for a larger proportion of the total pixel area, and light leakage at the connection vias significantly impacts the reflective contrast. If a black matrix is used for shielding, the black matrix size design needs to take into account process deviations while still being able to completely cover the vias. Usually, the black matrix and connecting vias are located on the color filter substrate CF and the array substrate ARR respectively. The two substrates have poor alignment accuracy. In addition, the black matrix and the connecting vias are vertically far apart (a thick liquid crystal layer LC is sandwiched between the two substrates). These factors make the black matrix size too large, which will significantly reduce the aperture ratio of the reflective area FA.
[0083] To address the above-mentioned issues, in a first disclosed embodiment of the present disclosure, referring to Figures 6, 7, and 10, at least a portion of the connecting via HO is positioned between the transmissive area TA and the organic resin layer YO. For example, by aligning the boundary of the organic resin structure in the reflective area FA with the connecting via HO originally located in the reflective area FA, there is no need to separately design a second connecting via on the organic resin structure. Instead, the connecting via HO is designed only in the passivation layer PVX, and the pixel electrode PE is electrically connected to the second conductive portion ML2 via the connecting via HO on the passivation layer PVX. This eliminates the need to drill holes in the organic resin layer YO, thereby reducing the light leakage area in the reflective area FA. Furthermore, the light leakage area at the connecting via HO can be at least partially aligned with the light leakage area at the boundary between the reflective area FA and the transmissive area TA, thereby reducing the light leakage area. This effectively improves the problem of low reflection contrast caused by light leakage from the connecting via in the reflective area FA, thereby enhancing display quality.
[0084] In the first disclosed embodiment of the present disclosure, to ensure that at least a portion of the connection via HO is located between the organic resin layer YO in the transmissive area TA, as shown in Figures 6 and 7 , the length of the second conductive portion ML2 is extended, allowing the pixel electrode PE to be directly electrically connected to the second conductive portion ML2 through the connection via HO. In this way, the first conductive portion ML1 and the second conductive portion ML2 can be prepared at one time, and then the electrical connection between the pixel electrode PE and the second conductive portion ML2 can be achieved, thereby improving production efficiency.
[0085] In the first disclosed embodiment of the present disclosure, the source / drain metal layer SD is made of conventional Mo / Al / Mo, Ti / Al / Ti, or Cu-related metals. Selecting a material with a low surface metal reflectivity can reduce light leakage caused by reflection from the second conductive portion ML2 below the connection via HO of the passivation layer PVX. Furthermore, because the size of the second conductive portion ML2 is determined by the size of the connection via HO of the passivation layer PVX (it is necessary to ensure that the connection via HO of the passivation layer PVX still has a certain overlap area with the second conductive portion ML2 after alignment deviation occurs during the process), the connection via HO of the passivation layer PVX should be minimized in design based on process capabilities.
[0086] In the first disclosed embodiment of the present disclosure, the second conductive portion ML2 has a first surface away from the base substrate SBT, the first surface is located in the transmission area TA, and at least a portion of the first surface is blackened. For example, Mo oxidation treatment is used to form black MoOx. MoOx is a mixture of MoO3, MoO2 and other compounds. In this way, the reflection and light leakage intensity of the second conductive portion ML2 can be further reduced, thereby improving light leakage. In this example, the first surface beyond the reflection area FA is all blackened.
[0087] In the first disclosed embodiment of the present disclosure, the pixel electrode PE can be indirectly electrically connected to the second conductive portion ML2 via the connecting via HO. For example, referring to FIG. 7 , the array substrate ARR further includes a bridging layer ZG having a bridging structure located within the sub-pixel region; one end of the bridging structure is electrically connected to the second conductive portion ML2, and the other end is electrically connected to the pixel electrode PE via the connecting via HO.
[0088] In the first disclosed embodiment of the present disclosure, the bridge structure overlaps the second conductive portion ML2.
[0089] In the first disclosed embodiment of the present disclosure, the material of the bridging structure is a transparent conductive material. In this way, a layer of transparent conductive material can be added to overlap the second conductive portion ML2 of the source-drain metal layer SD to replace the second conductive portion ML2 below the connection via HO of the passivation layer PVX, so that the reflective light leakage area here is changed into a transmissive opening area, thereby improving light leakage while increasing the transmissive opening ratio. At the same time, the method of adding a layer of transparent conductive material can adopt a method of adding a separate mask process, but this will lead to increased costs. Alternatively, the source-drain metal layer SD and the newly added transparent conductive material can adopt a HTM (semi-transmissive membrane illumination technology) semi-transmissive mask, and the cost of this method remains basically unchanged. In this example, the material of the bridging structure can be consistent with the material of the pixel electrode PE.
[0090] In the first disclosed embodiment of the present disclosure, the second conductive portion ML2 of the source-drain metal layer SD is electrically connected to the bridging structure by overlapping the second conductive portion ML2 of the source-drain metal layer SD on top of the bridging structure. In this way, a more stable electrical connection can be obtained and the bridging structure can be prevented from climbing and breaking.
[0091] In the first disclosed embodiment of the present disclosure, the connection between the bridge structure and the second conductive portion ML2 is located within the reflective area FA. This further improves light leakage while increasing the transmittance aperture ratio. In other embodiments, the bridge structure can also be made of the same material as the second conductive portion ML2.
[0092] In the first disclosed embodiment of the present disclosure, referring to Figures 6 and 7, the upper surface of the organic resin structure of the organic resin layer YO (the side of the organic resin structure away from the substrate SBT) can be made into an uneven morphology through the HTM (semi-transmissive membrane illumination technology) process. For example, the side of the organic resin structure away from the substrate SBT has evenly distributed protrusions; and the transition between two adjacent protrusions is smooth. In this way, diffuse reflection can be achieved and the reflection viewing angle can be improved.
[0093] In the first disclosed embodiment of the present disclosure, referring to FIG. 6 and FIG. 7 , the shape of the protrusion along the edge line of the cross section perpendicular to the substrate SBT is semicircular or parabolic.
[0094] In the first disclosed embodiment of the present disclosure, the channel region of the active layer of the switching transistor SW (the active layer of the switching transistor SW is away from the basic side of the substrate) is shielded to prevent the switching transistor SW from leaking abnormally. For example, referring to Figures 6 and 7, a metal shielding layer SC is provided between the organic resin layer YO and the passivation layer PVX. The metal shielding layer SC has a metal shielding structure in the sub-pixel area PA. The orthographic projection of the metal shielding structure on the substrate SBT completely covers the orthographic projection of the channel region of the active layer of the switching transistor SW on the substrate SBT. In this way, the backlight source emitted by the backlight module can be prevented from being reflected by the lower surface of the metal reflective layer JO and irradiating the channel region of the active layer of the switching transistor SW, generating photogenerated carriers, thereby causing the switching transistor SW to leak abnormally.
[0095] In the first disclosed embodiment of the present disclosure, the metal shielding layer SC above the switch transistor SW is an independent floating gate structure. The metal shielding layer SC above the data voltage line DL and the scan line GL is connected to a common voltage.
[0096] In the first disclosed embodiment of the present disclosure, the edge of the organic resin structure close to the transmission area has a slope width of about 4 microns and a slope angle of about 45 degrees. The distance between the metal reflective layer and the bottom of the organic resin structure is about 1.25 microns.
[0097] In the second disclosed embodiment of the present disclosure, referring to FIG6 and FIG7, the connecting via HO is located in the reflective area FA. In this example, the material of the bridging structure is a transparent conductive material. For example, the material of the bridging structure can be consistent with the material of the pixel electrode PE. By adding a layer of transparent conductive material and directly overlapping the second conductive part ML2 of the source and drain metal layer SD, the second conductive part ML2 below the connecting via HO of the passivation layer PVX is replaced, and the reflective light leakage area here is changed into a transmissive opening area, thereby improving light leakage while increasing the transmissive opening ratio. At the same time, the method of adding a layer of transparent conductive material can adopt the method of adding a separate mask process, which increases the cost, or the source and drain metal layer SD and the newly added transparent conductive material can adopt a HTM (semi-transmissive membrane illumination technology) semi-transmissive mask, and the cost of this method remains basically unchanged.
[0098] In the third disclosed embodiment of the present disclosure, the position of the connecting via HO is not changed, and the connecting via HO is still only located in the reflective area FA, but a light-shielding layer surrounding the connecting via HO is provided on the upper surface or lower surface of the passivation layer PVX to reduce light leakage. The COA process technology is used to prepare the light-shielding layer. In this way, while ensuring that the light leakage of the organic resin in the reflective area FA is blocked, the size of the light-shielding layer can be reduced, thereby improving the problem of excessive decrease in reflectivity and aperture ratio due to poor alignment accuracy between the color filter substrate and the base substrate, and the distance between the black matrix BM and the pixel via. In this example, the light-shielding layer can be the black matrix BM. In this example, the light-shielding layer is located on the upper surface of the passivation layer PVX. In other examples, the light-shielding layer can also be located on the lower surface of the passivation layer PVX.
[0099] Based on the above, taking the display panel PNL in normally white mode and a wave plate provided between the second polarizer and the color filter substrate CF as an example, the display principle of the display panel PNL is as follows:
[0100] When achieving bright-state display, external natural light passes through the second polarizer, thereby forming a first linearly polarized light. This first linearly polarized light passes through the wave plate to form circularly polarized light. After passing through the liquid crystal layer LC, the circularly polarized light becomes a second linearly polarized light. The polarization direction of the second linearly polarized light is perpendicular to the first polarization direction. After the second linearly polarized light is reflected by the metal reflective layer JO (reflective electrode), the polarization direction does not change. After the reflected light passes through the liquid crystal layer LC and the wave plate, it becomes a third linearly polarized light. The polarization direction of the third linearly polarized light is the same as that of the first linearly polarized light, so it can be emitted through the second polarizer. (In the reflective display panel PNL in the normally white mode, the liquid crystal layer LC has a phase modulation effect on light that is equivalent to that of a quarter-wave plate when it is not powered).
[0101] To achieve a dark state, a voltage is applied to the liquid crystal layer LC, rendering it inactive in terms of the light's phase. At this point, natural light from the outside world passes through the second polarizer, forming a first linearly polarized light. This first linearly polarized light then passes through the wave plate, transforming into circularly polarized light. This circularly polarized light remains unchanged after passing through the liquid crystal layer LC and reflecting off the metal reflective layer JO (reflective electrode). Subsequently, the circularly polarized light passes through the wave plate, transforming into a second linearly polarized light. This second linearly polarized light is perpendicular to the first linearly polarized light and, therefore, cannot escape from the second polarizer, causing the reflective display device to display a black screen.
[0102] When achieving an intermediate state display (i.e., displaying a grayscale image between white and black), a voltage is applied to the liquid crystal layer LC, causing it to undergo a certain degree of deflection. At this point, natural light from the outside world passes through the second polarizer, forming a first linearly polarized light. This first linearly polarized light passes through the wave plate and forms elliptically polarized light. For example, if this elliptically polarized light is left-handed elliptically polarized light, after being reflected by the metal reflective layer JO (reflective electrode), it becomes right-handed elliptically polarized light. After passing through the liquid crystal layer LC and the wave plate, the right-handed elliptically polarized light forms a fourth linearly polarized light. The angle between the polarization direction of this fourth linearly polarized light and the first linearly polarized light is greater than 0° and less than 90°, allowing some light to pass through the polarizer and exit, forming a grayscale image.
[0103] Based on the above, the display panel PNL in the present disclosure has the following advantages:
[0104] 1. The reflection contrast of the display panel PNL proposed in this disclosure is greatly improved compared with the related art.
[0105] Using a solution from the related art, the light leakage area of the organic resin layer YO's connection via is completely separated from the light leakage area at the junction of the transmissive area TA and the reflective area FA. Assuming the light leakage area of the organic resin layer YO's connection via is a, and the light leakage area at the junction of the transmissive area TA and the reflective area FA is b, the total light leakage area of the sub-pixel area PA is the sum of the two areas, i.e., a + b, resulting in a larger light leakage area. The connection via of the organic resin layer YO is covered by the metal reflective layer JO, which generally has an extremely high surface reflectivity (>90%) and a high reflection (light leakage) intensity.
[0106] However, by adopting the solution disclosed in the present invention, at least part of the light leakage area connected to the via hole HO overlaps with the light leakage area at the junction of the transmission area TA and the reflection area FA. Assuming that the overlapping area is c, the total light leakage area of the sub-pixel area PA is a+bc, and the light leakage area is reduced. The part of the light leakage area connected to the via hole HO that does not overlap with the light leakage area at the junction of the transmission area TA and the reflection area FA mainly refers to the second conductive part ML2 (metal conductive material) area extending from the bottom of the connection via hole HO on the passivation layer PVX. The light leakage in this area is mainly caused by the reflection of the surface of the second conductive part ML2. Conventional metal conductive materials are generally Mo materials with low reflectivity (<60%). Although the box thickness here does not meet the black state requirements of the reflection area, the reflection (leakage) intensity is small due to the low reflectivity of the metal. Combining these two points, by adopting the solution disclosed in the present invention, the overall light leakage is improved and the reflection contrast is improved.
[0107] 2. Process tolerance increases.
[0108] Referring to Figures 8 and 9, it is assumed that in the related art, the first connection via on the passivation layer PVX is a square hole with a size of D2. In this example, D2 is 4μm, and the second connection via on the organic resin layer YO is a square hole with a size of D1. In this example, D1 is 6μm. The centers of the first connection via and the second connection via coincide with each other. After the alignment deviation occurs, the center of the first connection via is offset by 2μm relative to the second connection via in the negative direction of the X-axis and the Y-axis. The size of the remaining overlapping area (conductive area) of the first connection via and the second connection via is D3. In this example, D3 is 3μm, and the overlapping area is 3*3=9μm. 2 .
[0109] In the disclosed solution, referring to Figures 10 and 11, the connection vias HO on the passivation layer PVX are offset by 2μm in the negative directions of the X-axis and the Y-axis. Since the organic resin layer YO of the transmission area TA is completely dug out, its boundaries are much larger than the boundaries of the connection vias HO on the passivation layer PVX in the positive and negative directions of the X-axis and the positive direction of the Y-axis. In these three directions, even if the connection vias HO on the passivation layer PVX have alignment deviations, it does not affect the overlapping area between the edge of the organic resin layer YO and the connection vias HO on the passivation layer PVX, and the process tolerance is increased. In the negative direction of the Y-axis (at the junction of the transmission and reflection), the overlapping area of the vias is reduced due to the alignment deviation, and the remaining overlapping area is 3*4=12μm 2 .
[0110] Based on the above, the proposed solution in this disclosure achieves a larger via area than existing design methods, while maintaining the same process capability, thereby increasing process tolerance. While maintaining the same via area, the size of the connecting via HO on the passivation layer PVX can be further reduced to approximately 3.5 x 3.5 μm.
[0111] 3. Low cost and good compatibility.
[0112] The disclosed solution can achieve low costs by reducing the number of masks. Since the sub-pixel area PA stacking structure and the process mask sequence remain unchanged, the gate insulation layer GI mask and the metal shielding layer SC mask can be removed as appropriate. The source and drain metal layer SD and the bridge structure can use a semi-transparent mask (HTM) to reduce costs, without affecting the conduction of the connecting via HO.
[0113] In summary, the solution disclosed in this disclosure increases process tolerance, improves product yield, and reduces costs.
[0114] Those skilled in the art will readily appreciate other embodiments of the present disclosure after considering the specification and practicing the invention disclosed herein. This application is intended to cover any variations, uses, or adaptations of the present disclosure that follow the general principles of the present disclosure and include common knowledge or customary techniques in the art not disclosed herein. The description and examples are to be considered as exemplary only, with the true scope and spirit of the present disclosure being indicated by the appended claims.
Claims
1. A liquid crystal display array substrate, wherein: The array substrate has a display area, the display area has sub-pixel areas distributed in an array, and each sub-pixel area includes a transmission area and a reflection area that are adjacently arranged; The array substrate comprises a base substrate, a passivation layer, an organic resin layer, a pixel electrode layer and a metal reflective layer stacked in sequence, and a switching transistor is provided in the sub-pixel area of the array substrate; The organic resin layer is disposed in the reflective area, and the metal reflective layer covers the organic resin layer; The passivation layer has a connection via hole; at least a portion of the connection via hole is located between the transmission area and the organic resin layer; The pixel electrode layer is provided with a pixel electrode in the sub-pixel area; the pixel electrode is electrically connected to the first electrode of the switching transistor through the connecting via hole, and the pixel electrode covers the transmission area.
2. The liquid crystal display array substrate according to claim 1, wherein: The array substrate further includes a driving layer located between the base substrate and the passivation layer; The driving layer includes a semiconductor layer and a source-drain metal layer stacked on a base substrate; The semiconductor layer has a first electrode of a switching transistor, and the source-drain metal layer has a second conductive portion; the second conductive portion is electrically connected to the first electrode of the switching transistor, and the pixel electrode is electrically connected to the second conductive portion through the connecting via.
3. The liquid crystal display array substrate according to claim 2, wherein: The pixel electrode is directly electrically connected to the second conductive portion through the connecting via hole.
4. The liquid crystal display array substrate according to claim 3, wherein: The second conductive portion has a first surface away from the base substrate, and the first surface is located in the transmission area; At least a portion of the first surface is blackened.
5. The liquid crystal display array substrate according to claim 2, wherein: The array substrate further includes a bridging layer, wherein the bridging layer has a bridging structure located in the sub-pixel area; One end of the bridge structure is electrically connected to the second conductive portion, and the other end is electrically connected to the pixel electrode through the connecting via hole.
6. The liquid crystal display array substrate according to claim 5, wherein: The material of the bridge structure is a transparent conductive material.
7. The liquid crystal display array substrate according to claim 5, wherein: The second conductive portion is overlapped above one end of the bridge structure.
8. The liquid crystal display array substrate according to claim 5, wherein: The connection position between the bridge structure and the second conductive portion is located in the reflective area.
9. The liquid crystal display array substrate according to claim 2, wherein: The array substrate further includes a metal shielding structure; The metal shielding structure is located between the passivation layer and the organic resin layer; and the orthographic projection of the metal shielding structure on the base substrate completely covers the orthographic projection of the channel region of the active layer of the switching transistor on the base substrate.
10. The liquid crystal display array substrate according to claim 1, wherein: The organic resin layer has an organic resin structure in the sub-pixel region, and the thickness of the organic resin structure is 2-3 μm.
11. The liquid crystal display array substrate according to claim 10, wherein: The organic resin structure has a plurality of protrusions on a side facing away from the base substrate.
12. The liquid crystal display array substrate according to claim 11, wherein: The shape of the protrusion along the edge line perpendicular to the cross section of the base substrate is semicircular or parabolic.
13. The liquid crystal display array substrate according to claim 2, wherein: The array substrate further includes a common electrode layer; The driving layer further includes a gate layer, and the common electrode layer and the gate layer are arranged in the same layer.
14. The liquid crystal display array substrate according to claim 1, wherein: The connection via hole is located in the transmission area.
15. The liquid crystal display array substrate according to claim 14, wherein: The array substrate further includes a driving layer located between the base substrate and the passivation layer; The driving layer includes a semiconductor layer, a bridge layer and a source-drain metal layer stacked on a substrate; The semiconductor layer has a first electrode of the switching transistor, the bridge layer has a bridge structure located in the sub-pixel area, and the source-drain metal layer has a second conductive portion; the second conductive portion is electrically connected to the first electrode of the switching transistor, one end of the bridge structure is electrically connected to the second conductive portion, and the other end is electrically connected to the pixel electrode through the connecting via; The material of the bridge structure is a transparent conductive material.
16. The liquid crystal display array substrate according to claim 1, wherein: The connecting via hole is located in the reflective area; a light shielding layer is provided on the upper surface or the lower surface of the passivation layer; and the light shielding layer surrounds the connecting via hole.
17. The liquid crystal display array substrate according to claim 16, wherein: The light shielding layer is located on the upper surface of the passivation layer.
18. A liquid crystal display panel, wherein: The invention comprises the array substrate according to any one of claims 1 to 17, and a color filter substrate arranged in a box with the array substrate, wherein a liquid crystal layer is provided between the array substrate and the color filter substrate.
19. The liquid crystal display panel according to claim 18, wherein: The thickness of the liquid crystal layer in the transmission area is 1.5 to 2 times the thickness of the liquid crystal layer in the reflection area.
20. A liquid crystal display device, wherein: It comprises a backlight module and a liquid crystal display panel according to any one of claims 18 to 19, wherein the backlight module is located on a side of the array substrate away from the color filter substrate.