Information processing method and electronic control device

Abstract

According to one embodiment, an electronic control device repeatedly executes an elapsed time determination task within a time interval that is shorter than a set cycle during background processing that is executed without dependence on the input of an interruption request. The elapsed time determination task determines whether a fixed-cycle task has been executed within the set cycle, and upon determining that the fixed-cycle task has not been executed within the set cycle during the elapsed time determination task, the electronic control device executes the fixed-cycle task during the background processing.

Description

Information processing method and electronic control device

[0001] The present invention relates to an information processing method and an electronic control device.

[0002] Various techniques for causing a processor to execute arithmetic processing at fixed intervals have been known. For example, Patent Document 1 listed below discloses the following technique for ensuring the execution of a control task that is executed at each set interval. That is, a control task that is to be executed at each set interval is divided into a first task portion that is to be executed in synchronization with the set interval and a second task portion other than the first task portion. When an execution control means that controls the execution of the control task detects a task overrun, in which the control task does not finish within the set interval, it causes at least the first task portion of the next control task to be executed within the set interval.

[0003] Japanese Patent Application Laid-Open No. 2005-301812

[0004] In the conventional technology described above, a timer is provided in an electronic control device, and an interrupt request is generated at the timing of a signal generated by the timer at a set period, and the processor executes a task based on the input of the interrupt request, so that the task is executed at the set period. Therefore, the conventional technology has a problem that, for example, if an abnormality occurs in the timer or an abnormality occurs in the interrupt controller that outputs an interrupt request to the processor in accordance with a signal from the timer, the processor will not be able to execute the task at a fixed period based on the interrupt request.

[0005] In one aspect, the present invention has been made in consideration of the above circumstances, and its purpose is to provide an information processing method and an electronic control device that cause a processor to perform calculation processing at a fixed period even when an interrupt request is not output normally.

[0006] In order to solve the above-mentioned problems, one aspect of the present invention provides an information processing method that causes a processor to repeatedly execute a periodic task at set intervals, wherein the processor is capable of executing background processing that is executed independently of input of an interrupt request, and interrupt processing that is executed by interrupting execution of the background processing in response to input of the interrupt request, wherein a timer interrupt request, which is the interrupt request output in accordance with a signal repeatedly output from a timer at set intervals, is repeatedly input at set intervals, causing the periodic task to be repeatedly executed at set intervals in the interrupt processing, and wherein a time elapsed determination task that determines whether the periodic task has been executed at the set interval is repeatedly executed at time intervals shorter than the set interval in the background processing, and when the time elapsed determination task determines that the periodic task has not been executed at the set interval, the periodic task is executed in the background processing.

[0007] According to the present invention, it is possible to provide an information processing method and an electronic control device that cause a processor to execute arithmetic processing at fixed intervals even when an interrupt request is not normally output.

[0008] 10 is a diagram illustrating a schematic example of a hardware configuration of an electronic control device according to an embodiment; FIG. 11 is a diagram illustrating a schematic example of a software configuration of an electronic control device according to an embodiment; FIG. 12 is a diagram illustrating an example of an expected processing time table; FIG. 13 is a diagram illustrating an example of a processing flow when an electronic control device according to an embodiment is released from a reset state and executes various processes; FIG. 14 is a diagram illustrating an example of a processing flow for updating an interrupt count value and the like that is executed when an electronic control device according to an embodiment executes each interrupt process; FIG. 15 is a diagram illustrating how the interrupt count value, previous interrupt count value, and number of interrupts for each interrupt process change due to an interrupt for each interrupt process; FIG. 16 is a diagram illustrating a processing flow for an elapsed time determination task; FIG. 17 is a diagram illustrating a problem that occurs when the time interval for executing the elapsed time determination task is set to be equal to or longer than a set period; FIG. 18 is a diagram illustrating how the problem shown in FIG. 8 is solved by setting the time interval for executing the elapsed time determination task shorter than the set period; FIG. 19 is a diagram illustrating an example in which a fixed-period task is executed at a set period based on the determination result of the elapsed time determination task even when timer startup has failed.

[0009] An embodiment according to one aspect of the present invention (hereinafter also referred to as "the present embodiment") will be described below with reference to the drawings. However, the present embodiment described below is merely an example of the present invention in all respects. Needless to say, various improvements and modifications can be made without departing from the scope of the present invention. In other words, when implementing the present invention, specific configurations according to the embodiment may be appropriately adopted. Note that, although data appearing in the present embodiment are described in natural language, more specifically, they are specified using pseudo-language, commands, parameters, machine language, etc. that can be recognized by a computer.

[0010] §1 Application Example In an electronic control device (electronic control device 1) according to an embodiment, a periodic task CT is activated (timer activation) when the interrupt controller 40 outputs an interrupt request IR (particularly, a timer interrupt request TIR) in response to a compare match signal from the timer 30. Within this periodic task CT, the CPU (Central Processing Unit) 10 performs processing requested to be executed at a set period PC and outputs a PRUN signal. If the monitoring circuit 20 (particularly, the watchdog timer provided in the monitoring circuit 20) determines that the CPU 10 has ceased to periodically update (output) the PRUN signal, the monitoring circuit 20 resets the CPU 10. Hereinafter, the "compare match signal" will be abbreviated as the "CM signal." Similarly, the "watchdog timer" will be abbreviated as the "WDT."

[0011] Here, for example, if an abnormality occurs in the timer 30 or in the interrupt controller 40 that outputs the timer interrupt request TIR to the CPU 10 in accordance with the CM signal from the timer 30, the timer interrupt request TIR may not be output normally. Even when the timer interrupt request TIR is not output normally, that is, even when an abnormality occurs in the timer start, the electronic control unit 1 executes the following process to cause the CPU 10 to execute arithmetic processing at the set period PC.

[0012] That is, the electronic control unit 1 determines whether there is an abnormality in timer activation (output of timer interrupt request TIR) in background processing (hereinafter abbreviated as "BG processing") BP that is independent of interrupt requests IR, and specifically, executes the elapsed time determination task DT. In particular, the electronic control unit 1 repeatedly executes the elapsed time determination task DT at time intervals shorter than the set period PC. Then, if it determines that there is an abnormality in timer activation, the electronic control unit 1 switches the activation factor of the fixed-period task CT from timer activation (timer interrupt request TIR) to activation based on the determination result of the elapsed time determination task DT (determined activation). Then, the electronic control unit 1 executes the fixed-period task CT in the BG processing BP.

[0013] By switching the activation factor of the periodic task CT from timer activation to judgment activation when it is determined that there is an abnormality in the timer activation, the electronic control unit 1 can execute (activate) the periodic task CT even when there is an abnormality in the timer activation. In particular, the electronic control unit 1 repeatedly executes the elapsed time determination task DT at time intervals shorter than the set period PC, thereby repeatedly executing the periodic task CT at the set period PC even when there is an abnormality in the timer activation. Therefore, the CPU 10 in the electronic control unit 1 can continue to output a PRUN signal for each set period PC even when there is an abnormality in the timer activation, and the monitoring circuit 20 (WGT) will not reset the CPU 10. In the electronic control unit 1, the CPU 10 executes various processes (computations) without relying on a timer interrupt request TIR and is not reset by the monitoring circuit 20, so it can continue processing that was repeatedly executed at the set period PC in the periodic task CT, for example.

[0014] The electronic control unit 1 according to this embodiment may estimate an elapsed time ET, which is the time "from the start of execution of the most recently executed periodic task CT to the start of execution of the elapsed time determination task DT," for each elapsed time determination task DT. The electronic control unit 1 may use the estimated elapsed time ET to determine whether there is an abnormality in the timer start, and may determine that there is an abnormality in the timer start if, for example, the estimated elapsed time ET is equal to or greater than a predetermined abnormality determination time TT.

[0015] For example, even if the timer 30 fails, the electronic control unit 1 can estimate the elapsed time ET by continuing to execute processing that is independent of the timer interrupt request TIR. That is, even if the timer 30 fails, the electronic control unit 1 can execute the BG processing BP (particularly, the elapsed time determination task DT) that is independent of the interrupt request IR (timer interrupt request TIR), and estimate the elapsed time ET in the elapsed time determination task DT. The electronic control unit 1 then determines whether there is an abnormality in the timer activation using the estimated elapsed time ET. If an abnormality is determined, the electronic control unit 1 switches the activation factor of the periodic task CT from timer activation to determination activation, and executes the periodic task CT in the BG processing BP. Therefore, even if the timer 30 fails, the electronic control unit 1 can continue "executing the periodic task CT for each set period PC."

[0016] The electronic control unit 1 according to this embodiment may estimate the elapsed time ET using the estimated processing time APT of each process. The estimated processing time APT of each process is an estimated value (estimated time) of the "time required from the start of execution to the completion of execution (processing time PT)" of each process. The estimated processing time APT of each process may also be rephrased as a time estimated in advance as the processing time PT of each process. The estimated processing time APT of each process may be determined, for example, based on the processing time PT measured in advance for each process, or may be a representative value (such as the average, minimum, maximum, median, or mode) of the processing time PT measured in advance for each process.

[0017] For example, even in a situation where the timer 30 has failed and it is not possible to calculate the elapsed time ET based on the change in the value of the timer 30, the electronic control unit 1 can estimate the elapsed time ET using the estimated processing time APT of each process. Then, the electronic control unit 1 can use the estimated elapsed time ET to determine whether there is an abnormality in the timer start, that is, whether the periodic task CT has been executed based on the timer interrupt request TIR.

[0018] As described above, the electronic control unit 1 repeatedly executes the elapsed time determination task DT, which determines whether there is an abnormality in the timer start, at time intervals shorter than the set period PC (the execution period of the periodic task CT, the output period of the PRUN signal). If the elapsed time determination task DT determines that there is an abnormality in the timer start, the electronic control unit 1 executes the periodic task CT based on the result of the determination. Therefore, even if there is an abnormality in the timer start, the electronic control unit 1 can execute the periodic task CT at the set period PC. Furthermore, as will be described in detail later, by repeatedly executing the elapsed time determination task DT at time intervals shorter than the set period PC, the electronic control unit 1 can improve the estimation accuracy of the elapsed time ET estimated in each elapsed time determination task DT. In other words, by shortening the execution interval of the elapsed time determination task DT, the electronic control unit 1 can suppress the influence of the length of the processing time PT(G) (estimated processing time APT(G)) of the BG processing BP on the estimation of the elapsed time ET, thereby enabling the elapsed time ET to be estimated with high accuracy. The electronic control unit 1, the outline of which has been explained above, will now be explained in detail with reference to FIGS. 1 to 10. FIG.

[0019] §2 Configuration Example [Hardware Configuration] FIG. 1 schematically illustrates an example of the hardware configuration of the electronic control unit 1. As illustrated in FIG. 1, the electronic control unit 1 includes, for example, a CPU 10, a monitoring circuit 20, a timer 30, an interrupt controller 40, a ROM (Read Only Memory) 50, a RAM (Random Access Memory) 60, and a bus 70. The electronic control unit 1 may further include a DMC (Direct Memory Access) controller, a converter that converts analog signals to digital signals (or digital signals to analog signals), input / output ports for inputting and outputting various signals, and the like. The CPU 10, the monitoring circuit 20, the interrupt controller 40, the timer 30, the ROM 50, and the RAM 60 are electrically connected to each other via the bus 70. While the example illustrated in FIG. 1 illustrates an example in which the interrupt controller 40 is realized as hardware, the interrupt controller 40 may also be realized as software by the CPU 10 executing a predetermined program.

[0020] The CPU 10 is an example of a "processor" of the present invention and executes (calculates) various processes (programs). The monitoring circuit 20 monitors the execution status of the CPU 10. The monitoring circuit 20 according to this embodiment includes, for example, a WDT, which determines the status of a PRUN signal output by the CPU 10 while the CPU 10 is executing a process (program). If the output of the PRUN signal becomes abnormal due to a runaway or other reason, the monitoring circuit 20 outputs a RESET signal to the CPU 10 to reset (initialize) the CPU 10 and release (release) the CPU 10 from the abnormal state such as runaway. For example, if the monitoring circuit 20 (WDT) does not receive a PRUN signal from the CPU 10 for a predetermined time (for example, a set period PC), it outputs a RESET signal to the CPU 10 to reset the CPU 10.

[0021] The timer 30 outputs a CM signal to the interrupt controller 40 every time a time period corresponding to a preset "execution period of the periodic task CT" (set period PC) has elapsed. That is, the timer 30 repeatedly outputs the CM signal to the interrupt controller 40 for each set period PC. In this embodiment, in order to activate the periodic task CT by the timer 30, the timer 30 repeatedly outputs the CM signal to the interrupt controller 40 for each set period PC. Then, in accordance with the CM signal repeatedly output from the timer 30 for each set period PC, the interrupt controller 40 repeatedly outputs a timer interrupt request TIR, which is an interrupt request IR, to the CPU 10 for each set period PC.

[0022] The interrupt controller 40 outputs an interrupt request IR to the CPU 10, causing the CPU 10 to interrupt the processing currently being executed (specifically, the BG processing BP) and execute a predetermined processing (specifically, the interrupt processing IP).

[0023] In this embodiment, the processing (programs) executed by the CPU 10 are broadly divided into a BG processing BP and an interrupt processing IP. The BG processing BP is processing that is executed independently of the input of an interrupt request IR from the interrupt controller 40 to the CPU 10. The interrupt processing IP is processing that is executed dependent on the input of an interrupt request IR from the interrupt controller 40 to the CPU 10. In other words, the CPU 10 can execute a BG processing BP that is executed independently of the input of an interrupt request IR, and an interrupt processing IP that is executed by interrupting the execution of the BG processing BP in response to the input of an interrupt request IR.

[0024] When an interrupt request IR is input from the interrupt controller 40, the CPU 10 suspends execution of the BG processing BP and executes the interrupt processing IP. That is, the interrupt controller 40 outputs the interrupt request IR to the CPU 10, causing the CPU 10 to suspend execution of the BG processing BP and execute the interrupt processing IP. For example, when a CM signal is input from the timer 30, the interrupt controller 40 outputs a timer interrupt request TIR, which is the interrupt request IR, to the CPU 10, causing the CPU 10 to suspend execution of the BG processing BP and execute the interrupt processing IP.

[0025] In this embodiment, the interrupt processing IPs are broadly divided into an interrupt processing IP (IA) that executes a periodic task CT and an interrupt processing IP (IB) that is an interrupt processing IP other than the interrupt processing IP (IA). The interrupt processing IP (IB) is an example of a "priority interrupt process" in the present invention. The execution priority of the interrupt processing IP (IB) is higher than the execution priority of the interrupt processing IP (IA) (i.e., the periodic task CT). As described above, when the CPU 10 receives a timer interrupt request TIR from the interrupt controller 40, it suspends execution of the BG process BP and executes the interrupt processing IP (IA), and in particular, executes the periodic task CT in the interrupt processing IP (IA). When the timer interrupt request TIR is repeatedly input at each set period PC, the CPU 10 repeatedly executes the interrupt processing IP (IA) at each set period PC, and in particular, repeatedly executes the periodic task CT in the interrupt processing IP (IA) at each set period PC. Furthermore, when the CPU 10 receives a priority interrupt request PIR from the interrupt controller 40, it suspends execution of the interrupt processing IP(IA) and executes the interrupt processing IP(IB), i.e., it suspends execution of the periodic task CT and executes the interrupt processing IP(IB). The priority interrupt request PIR is an interrupt request IR that requests an interrupt (i.e., the start of execution) of the interrupt processing IP(IB). For example, when a predetermined signal is input from a peripheral circuit (peripheral device) such as a communication circuit (not shown), the interrupt controller 40 outputs the priority interrupt request PIR to the CPU 10, causing the CPU 10 to execute the interrupt processing IP(IB). In response to the input of the priority interrupt request PIR, the CPU 10 can execute an interrupt processing IP other than the interrupt processing IP(IA), in other words, an interrupt processing IP other than the periodic task CT, specifically, the interrupt processing IP(IB).

[0026] The processing of the interrupt controller 40 described so far can be summarized as follows, for example. That is, the interrupt controller 40 repeatedly outputs a timer interrupt request TIR to the CPU 10 at each set period PC in accordance with the CM signal repeatedly input from the timer 30 at each set period PC. The interrupt controller 40 repeatedly outputs the timer interrupt request TIR to the CPU 10 at each set period PC, thereby causing the CPU 10 to repeatedly execute an interrupt process IP(IA) at each set period PC, that is, repeatedly execute a fixed-period task CT at each set period PC. The interrupt controller 40 also outputs a priority interrupt request PIR to the CPU 10, causing the CPU 10 to suspend execution of the interrupt process IP(IA) and execute an interrupt process IP(IB).

[0027] The ROM 50 stores a program (determination control program 51) for causing the electronic control unit 1 to execute an information processing method PM. The information processing method PM causes the electronic control unit 1 to execute information processing (FIG. 4) described below that executes a background processing process BP (particularly, an "elapsed time determination task DT" described below). The RAM 60 also stores various information used when executing the determination control program 51, such as an interrupt count value ICV, an estimated processing time APT, an abnormality determination time TT, a state determination flag SF, and a previous interrupt count value PCV. The interrupt count value ICV, the estimated processing time APT, the abnormality determination time TT, the state determination flag SF, and the previous interrupt count value PCV will be described in detail below.

[0028] [Software Configuration] FIG. 2 schematically illustrates an example of the software configuration of the electronic control unit 1 according to this embodiment. The electronic control unit 1 loads a determination control program 51 stored in a ROM 50 onto a RAM 60. The electronic control unit 1 then controls each component by interpreting and executing instructions contained in the determination control program 51 loaded onto the RAM 60 using a CPU 10. As a result, as shown in FIG. 2 , the electronic control unit 1 according to this embodiment operates as a computer including an elapsed time determination unit 120 as a software module. The CPU 10 also realizes an interrupt counter 110 as a software module by interpreting and executing instructions contained in a program corresponding to each interrupt processing IP (i.e., the interrupt processing IP(IA) and the interrupt processing IP(IB)). That is, the interrupt counter 110 and the elapsed time determination unit 120 illustrated in FIG. 2 are each software modules realized by the CPU 10.

[0029] The interrupt counter 110 updates the interrupt count value ICV and the like upon execution of each of the interrupt processing IP(IA) and the interrupt processing IP(IB). For example, the interrupt counter 110 increments the interrupt count value ICV of each interrupt processing IP by "1." Specifically, the interrupt counter 110 increments the interrupt count value ICV(IB) in the interrupt count value table 61 stored in the RAM 60 by "1" each time the interrupt processing IP(IB) is executed (e.g., each time the execution of the interrupt processing IP(IB) starts). The interrupt counter 110 also increments the interrupt count value ICV(IA) in the interrupt count value table 61 by "1" each time the interrupt processing IP(IA) (i.e., the periodic task CT) is executed (e.g., each time the execution of the interrupt processing IP(IA) starts). Furthermore, each time an interrupt processing IP(IA) is executed, the interrupt counter 110 clears to "0" the interrupt count value ICV(IB) in the interrupt count value table 61 and the previous interrupt count value PCV(IB) in the previous interrupt count value table 69. Details of the updating of the interrupt count value ICV and the like of each interrupt processing IP by the interrupt counter 110 will be described later with reference to FIG.

[0030] In the BG process BP, the elapsed time determination unit 120 repeatedly executes an elapsed time determination task DT, which determines whether the periodic task CT has been executed at the set period PC, at time intervals shorter than the set period PC. In particular, the elapsed time determination unit 120 calculates the number of interrupts NI in the elapsed time determination task DT, and then updates the value of the previous interrupt count value PCV in the previous interrupt count value table 69 stored in the RAM 60 with the value of the interrupt count value ICV in the interrupt count value table 61. Specifically, the elapsed time determination unit 120 calculates the number of interrupts NI(IA) of the interrupt processing IP(IA) from the interrupt count value ICV(IA) and the previous interrupt count value PCV(IA), and then updates the value of the previous interrupt count value PCV(IA) with the value of the interrupt count value ICV(IA). In addition, the elapsed time determination unit 120 calculates the number of interrupts NI(IB) of the interrupt processing IP(IB) from the interrupt count value ICV(IB) and the previous interrupt count value PCV(IB), and then updates the value of the previous interrupt count value PCV(IB) with the value of the interrupt count value ICV(IB). In the illustrated example, the elapsed time determination unit 120 includes an interrupt count calculation unit 122, an elapsed time estimation unit 124, and an elapsed time determination unit 126.

[0031] The interrupt count calculation unit 122 calculates (calculates) the number of interrupts NI of each interrupt processing IP in each elapsed time determination task DT. The number of interrupts NI of each interrupt processing IP is, for example, the number of times an interrupt of each interrupt processing IP has occurred in each BG processing BP (or, if an interrupt of a periodic task CT has occurred in a BG processing BP, the number of times after the execution of the periodic task CT has started).

[0032] Specifically, the number of interrupts NI(IA) of the interrupt processing IP(IA) (i.e., the periodic task CT) is the number of times the periodic task CT is executed in each BG processing BP including each elapsed time determination task DT. In other words, the number of interrupts NI(IA) is the number of times an interrupt occurs in the interrupt processing IP(IA) in each BG processing BP. When a periodic task CT is executed between the previously executed elapsed time determination task DT and the currently executed elapsed time determination task DT, the number of interrupts NI(IB) of the interrupt processing IP(IB) indicates the following number of times: In other words, the number of interrupts NI(IB) indicates the number of times an interrupt occurs in the interrupt processing IP(IB) from "the start of execution of the most recently executed periodic task CT to the start of execution of the currently executed elapsed time determination task DT." The "interval between the last executed elapsed time determination task DT and the currently executed elapsed time determination task DT" may be rephrased as the execution period (processing time PT) of the BG processing BP including the currently executed (i.e., currently executing) elapsed time determination task DT. Furthermore, the "interval between the last executed elapsed time determination task DT and the currently executed elapsed time determination task DT" may be interpreted as the time from the previously executed elapsed time determination task DT (at the start of its execution) to the currently executed elapsed time determination task DT (at the start of its execution). If no periodic task CT is executed between the previously executed elapsed time determination task DT and the currently executed elapsed time determination task DT, the interrupt count NI(IB) of the interrupt processing IP(IB) indicates the following number of times: In other words, the interrupt count NI(IB) indicates the number of interrupts of the interrupt processing IP(IB) that occurred "between the previously executed elapsed time determination task DT and the currently executed elapsed time determination task DT." In other words, the number of interrupts NI(IB) indicates the number of times an interrupt by the interrupt process IP(IB) has occurred in the BG process BP including the elapsed time determination task DT currently being executed.

[0033] For example, the interrupt count calculation unit 122 references the interrupt count value table 61 and the previous interrupt count value table 69 stored in the RAM 60 to obtain the interrupt count value ICV(IA) and the previous interrupt count value PCV(IA), respectively. The interrupt count calculation unit 122 then calculates the number of interrupts NI(IA) of the interrupt processing IP(IA) by subtracting the previous interrupt count value PCV(IA) from the interrupt count value ICV(IA). Similarly, the interrupt count calculation unit 122 references the interrupt count value table 61 and the previous interrupt count value table 69 to obtain the interrupt count value ICV(IB) and the previous interrupt count value PCV(IB). The interrupt count calculation unit 122 then calculates the number of interrupts NI(IB) of the interrupt processing IP(IB) by subtracting the previous interrupt count value PCV(IB) from the interrupt count value ICV(IB).

[0034] The elapsed time estimation unit 124 calculates the time (elapsed time ET) that has elapsed from the start of execution of the most recently executed periodic task CT (i.e., the interrupt processing IP (IA)) to the start of execution of the elapsed time judgment task DT to be executed this time, for each elapsed time judgment task DT.

[0035] For example, if a periodic task CT has been executed between the previously executed elapsed time determination task DT and the currently executed elapsed time determination task DT, the elapsed time estimation unit 124 may calculate the elapsed time ET for the currently executed elapsed time determination task DT as follows: That is, the elapsed time estimation unit 124 may calculate the elapsed time ET as the sum of (1) the processing time PT(IA) of the most recently executed periodic task CT, (2) the total processing time PT(IB) of each interrupt process IP(IB) executed after the start of execution of the currently executed periodic task CT in the BG processing BP including the currently executed elapsed time determination task DT, and (3) the processing time PT(G) of the currently executed BG processing BP including the elapsed time determination task DT (more precisely, the time required for the execution of the portion of the currently executed BG processing BP that was executed after the completion of the most recently executed periodic task CT). Furthermore, for example, if no periodic task CT is executed between the previously executed elapsed time determination task DT and the currently executed elapsed time determination task DT, the elapsed time estimation unit 124 may calculate the elapsed time ET for the currently executed elapsed time determination task DT as follows: That is, the elapsed time estimation unit 124 may calculate the elapsed time ET as the sum of (1) the previous elapsed time PET, which is the "elapsed time ET calculated for the previously executed elapsed time determination task DT," (2) the total processing time PT(IB) of each interrupt process IP(IB) executed in the BG processing BP including the currently executed elapsed time determination task DT, and (3) the processing time PT(G) of the BG processing BP including the currently executed elapsed time determination task DT.

[0036] Alternatively, the elapsed time estimation unit 124 may estimate the elapsed time ET using the estimated processing time APT of each process. For example, the elapsed time estimation unit 124 first references the estimated processing time table 63 stored in the RAM 60 to obtain the estimated processing time APT of each process. That is, the elapsed time estimation unit 124 obtains the estimated processing time APT(G) of the BG processing BP including the elapsed time determination task DT to be executed (currently being executed), the estimated processing time APT(IA) of the interrupt processing IP(IA), and the estimated processing time APT(IB) of the interrupt processing IP(IB). The estimated processing time APT(IA) is the estimated value of the processing time PT(IA) of the interrupt processing IP(IA), i.e., the estimated value of the processing time PT of the periodic task CT. The estimated processing time APT(IB) is the estimated value of the processing time PT(IB) of the interrupt processing IP(IB). The estimated processing time APT(G) is an estimated value of the processing time PT(G) of the BG processing BP. The elapsed time estimation unit 124 then estimates the elapsed time ET using the acquired estimated processing times APT(G), APT(IA), and APT(IB). In particular, the elapsed time estimation unit 124 estimates the elapsed time ET using the interrupt count NI of each interrupt processing IP calculated by the interrupt count calculation unit 122 and the estimated processing times APT(G), APT(IA), and APT(IB). The method of estimating the elapsed time ET will be described in detail later.

[0037] 3 , the estimated processing time table 63 pre-stores the estimated processing time APT(IA) of the interrupt processing IP(IA) and the estimated processing time APT(IB) of the interrupt processing IP(IB). The estimated processing time table 63 also pre-stores the estimated processing time APT(G) of each BG processing BP, including each elapsed time determination task DT. For example, when the elapsed time determination tasks DT(A), DT(B), and DT(C) are executed in the BG processing BP(A), BP(B), and BP(C), the estimated processing time APT(G) of each of the BG processing BP(A), BP(B), and BP(C) is pre-stored. In the illustrated example, the estimated processing times APT(G(A)), APT(G(B)), and APT(G(C)) of each of the BG processing BP(A), BP(B), and BP(C) are pre-stored in the estimated processing time table 63.

[0038] In this embodiment, the elapsed time determination task DT is repeatedly executed at time intervals shorter than the execution period of the periodic task CT, i.e., at time intervals shorter than the set period PC. Therefore, in order to repeatedly execute the elapsed time determination task DT at time intervals shorter than the set period PC, the processing time PT(G) (estimated processing time APT(G)) of each BG processing BP in which each elapsed time determination task DT is executed is set shorter than the set period PC. Therefore, each of the BG processing BP(A), BP(B), and BP(C) illustrated in FIG. 3 may be further divided into multiple parts so that the processing time PT(G) (estimated processing time APT(G)) is shorter than the set period PC. For example, the BG processing BP(A) may be divided into a BG processing BP(A1) whose estimated processing time APT(G(A1)) is shorter than the set period PC, and a BG processing BP(A2) whose estimated processing time APT(G(A2)) is shorter than the set period PC. The BG processing BP(A1) executes the elapsed time determination task DT(A1), and the BG processing BP(A2) executes the elapsed time determination task DT(A2). In this case, the estimated processing time APT(G(A1)) of the BG processing BP(A1) and the estimated processing time APT(G(A2)) of the BG processing BP(A2) are each stored in the estimated processing time table 63.

[0039] The elapsed time determination unit 126 determines whether the periodic task CT has been executed in the set period PC for each elapsed time determination task DT. Specifically, the elapsed time determination unit 126 first obtains the abnormality determination time TT by referencing the abnormality determination time table 65 stored in the RAM 60. The elapsed time determination unit 126 compares the obtained abnormality determination time TT with the elapsed time ET calculated (estimated) by the elapsed time estimation unit 124. If the elapsed time ET is equal to or greater than the abnormality determination time TT, the elapsed time determination unit 126 determines that the periodic task CT has not been executed in the set period PC. If the elapsed time determination unit 126 determines that the periodic task CT has not been executed in the set period PC, it updates the value of the state determination flag SF in the state determination flag table 67 stored in the RAM 60 to "1 (abnormal)." If the elapsed time determination unit 126 determines that the periodic task CT has been executed in the set period PC, it updates the value of the state determination flag SF in the state determination flag table 67 to "0 (normal)." When the value of the state determination flag SF in the state determination flag table 67 is "1," the CPU 10 switches the activation factor of the periodic task CT from timer activation (timer interrupt request TIR) to activation based on the determination result of the elapsed time determination task DT (determined activation). Then, the CPU 10 executes the periodic task CT in the BG processing BP.

[0040] The abnormality determination time TT is a preset time, and may be equal to the set cycle PC, for example. The abnormality determination time TT may also be a time obtained by adding a margin (allowance time) to the set cycle PC, that is, may be greater than (longer than) the set cycle PC. In this embodiment, the abnormality determination time TT may be any time that is equal to or greater than the set cycle PC.

[0041] §3 Operation Example (Overall Overview) Figure 4 is a flowchart showing an example of the processing procedure when the electronic control unit 1 (CPU 10) is released from the reset state (reset by the monitoring circuit 20) and executes various processes. As shown in Figure 4, when the electronic control unit 1 completes the reset in step S10, it executes necessary processing such as setting peripherals (peripheral circuits, peripheral devices) in the initialization processing in step S20, and then enters a repetitive loop processing from step S30. In this embodiment, this loop processing from step S30 is referred to as BG processing BP.

[0042] In the electronic control unit 1, an interrupt processing IP is executed (interrupted) from the BG processing BP. Specifically, at least one of the interrupt processing IP(IA) and the interrupt processing IP(IB) is executed. While the interrupt processing IP(IA) is being executed, the execution of the BG processing BP is stopped (interrupted). When the execution of the interrupt processing IP(IA) is completed, the execution of the BG processing BP is resumed from the point where it was stopped (interrupted). Furthermore, when the interrupt processing IP(IA) is interrupted by another interrupt processing IP (in this embodiment, the interrupt processing IP(IB)), the execution of the interrupted interrupt processing IP(IA) is stopped, and the interrupt processing IP(IB) is executed. Then, when the execution of the interrupt processing IP(IB) is completed, the execution of the interrupt processing IP(IA) interrupted by the interrupt processing IP(IB) is resumed from the point where it was stopped.

[0043] In this embodiment, the fixed-period task CT is executed by repeatedly executing an interrupt processing IP (particularly, interrupt processing IP(IA)) triggered by a timer start (timer interrupt request TIR) at set cycles PC. That is, the fixed-period task CT is executed in the interrupt processing IP(IA). As described above, the interrupt processing IP includes the interrupt processing IP(IA) (fixed-period task CT) and the interrupt processing IP(IB), and the processing priority of the interrupt processing IP(IB) is higher than the processing priority of the interrupt processing IP(IA).

[0044] 4, in this embodiment, the BG processing BP is divided into multiple parts and executed. In the illustrated example, BG processing BP(A), BP(B), and BP(C) are executed in steps S30, S40, and S50, respectively. Furthermore, an elapsed time determination task DT is executed in each BG processing BP. In the illustrated example, the elapsed time determination task DT(A) is executed in BG processing BP(A), the elapsed time determination task DT(B) is executed in BG processing BP(B), and the elapsed time determination task DT(C) is executed in BG processing BP(C). Here, it is sufficient for the electronic control unit 1 to repeatedly execute the elapsed time determination task DT at time intervals shorter than the set cycle PC. In other words, it is sufficient for each elapsed time determination task DT to be repeatedly executed in each BG processing BP at time intervals shorter than the set cycle PC. For this reason, the BG processing BP is divided into a plurality of BG processing BPs so that the execution interval of the elapsed time determination task DT executed in each BG processing BP (the time interval between the points at which each elapsed time determination task DT is executed) is shorter than the set cycle PC. The BG processing BP is only required to be divided into a plurality of BG processing BPs so that the execution interval of the elapsed time determination task DT is shorter than the set cycle PC, and there are no particular limitations on the number of BG processing BPs into which the BG processing BP is divided.

[0045] (Interrupt Processing) As described above, an interrupt processing IP can interrupt the BG processing BP. Specifically, at least one of the interrupt processing IP(IA) and the interrupt processing IP(IB) can interrupt the BG processing BP. In each interrupt processing IP, the interrupt count value ICV of the interrupt processing IP is counted, and for example, the interrupt count value ICV of the interrupt processing IP is counted up by "1". In this embodiment, the interrupt count value ICV is counted up in each of the interrupt processing IP(IA) and the interrupt processing IP(IB) (count value update calculation).

[0046] In the count value update calculation of each interrupt processing IP, the CPU 10 operates as the interrupt counter 110 and executes the update of the interrupt count value ICV of each interrupt processing IP. Specifically, as shown in FIG. 5A, in the interrupt processing IP(IB), the CPU 10 counts up the interrupt count value ICV(IB) by "1" (S110). Also, as shown in FIG. 5B, in the interrupt processing IP(IA), the CPU 10 counts up the interrupt count value ICV(IA) by "1" (S210). Furthermore, in the interrupt processing IP(IA), the CPU 10 clears the interrupt count value ICV(IB) and the previous interrupt count value PCV(IB) of the interrupt processing IP(IB) to "0" (S220).

[0047] 6 is a diagram illustrating how the interrupt count value ICV, previous interrupt count value PCV, and number of interrupts NI of each interrupt processing IP change due to an interrupt by each interrupt processing IP. For simplification, each BG processing BP (processing time PT of each BG processing BP) is depicted as if the BG processing BP is being executed while each interrupt processing IP is being executed, but in reality, the execution of the BG processing BP is suspended while each interrupt processing IP is being executed. Each BG processing BP is depicted in a similar manner in each of FIGS. 8 to 10.

[0048] As a result of the above-described count value update calculation being performed in each interrupt processing IP, the interrupt count value ICV and previous interrupt count value PCV of each interrupt processing IP change, for example, as illustrated in Figure 6. In the illustrated example, an interrupt occurs in interrupt processing IP(IA) (i.e., periodic task CT) at times t2, t8, t12, and t17, and the interrupt count value ICV(IA) of interrupt processing IP(IA) is incremented by "1." At times t3, t4, t9, t10, t11, t13, t16, and t18, an interrupt occurs in interrupt processing IP(IB), and the interrupt count value ICV(IB) of interrupt processing IP(IB) is incremented by "1." In addition, at times t2, t8, t12, and t17 when an interrupt occurs in the interrupt processing IP(IA), the interrupt count value ICV(IB) and the previous interrupt count value (IB) of the interrupt processing IP(IB) are each cleared to "0".

[0049] (Background Processing) Next, the BG processing BP, particularly the elapsed time determination task DT executed in each BG processing BP, will be described in detail using FIG. 7 and other figures. FIG. 7 is a flowchart showing an example of the processing procedure for the elapsed time determination task DT (the elapsed time determination task DT executed in each BG processing BP in steps S30, S40, and S50 of FIG. 4). The processing procedure described below is an example of the processing procedure for an information processing method PM that causes a processor (CPU 10) to repeatedly execute a periodic task CT at set intervals PC. However, the processing procedure described below is merely an example, and each step may be modified as much as possible. Furthermore, steps may be omitted, replaced, or added to the processing procedure described below as appropriate depending on the embodiment.

[0050] In step S310, the CPU 10 operates as the interrupt count calculation unit 122 and calculates the number of interrupts NI for each of the interrupt processing IP(IA) (i.e., the periodic task CT) and the interrupt processing IP(IB). That is, in the elapsed time determination task DT, the CPU 10 first calculates the number of interrupts NI. In particular, the CPU 10 calculates each number of interrupts NI as the difference between the interrupt count value ICV at the time of execution (e.g., the start of execution) of the currently executed elapsed time determination task DT and the previous interrupt count value PCV set in the previously executed elapsed time determination task DT. Specifically, the CPU 10 calculates the number of interrupts NI(IA) for the interrupt processing IP(IA) and the number of interrupts NI(IB) for the interrupt processing IP(IB) using the equation "NI = ICV - PCV."

[0051] 5B, when an interrupt occurs in the interrupt processing IP(IA) (i.e., the periodic task CT), the interrupt count value ICV and the previous interrupt count value PCV of the interrupt processing IPs other than the interrupt processing IP(IA) are cleared to "0." Specifically, in the interrupt processing IP(IA), the interrupt count value ICV(IB) and the previous interrupt count value PCV(IB) of the interrupt processing IP(IB) are cleared to "0." Therefore, (1) when the periodic task CT is being executed between the previously executed elapsed time determination task DT and the currently executed elapsed time determination task DT (i.e., an interrupt in the interrupt processing IP(IA) has occurred), the number of interrupts NI(IB) of the interrupt processing IP(IB) will be as follows: In other words, the interrupt count NI(IB) indicates the number of interrupts of the interrupt processing IP(IB) that occurred "from the start of execution of the periodic task CT (i.e., the time when an interrupt of the interrupt processing IP(IA) occurred) to the start of execution of the elapsed time determination task DT that is currently being executed." Also, (2) if the periodic task CT is not executed between the previously executed elapsed time determination task DT and the currently executed elapsed time determination task DT, the interrupt count NI(IB) of the interrupt processing IP(IB) indicates the following number of times: In other words, the interrupt count NI(IB) indicates the number of interrupts of the interrupt processing IP(IB) that occurred "between the previously executed elapsed time determination task DT and the currently executed elapsed time determination task DT."

[0052] In step S320, the CPU 10 operates as the elapsed time estimation unit 124 and determines whether a fixed-period task CT (i.e., an interrupt processing IP(IA)) was executed between the previously executed elapsed time determination task DT and the currently executed elapsed time determination task DT. Specifically, the CPU 10 determines whether the number of interrupts NI(IA) of the interrupt processing IP(IA) (i.e., the fixed-period task CT) is "0." If the number of interrupts NI(IA) of the interrupt processing IP(IA) is not "0" (No in step S320), the CPU 10 determines that the interrupt processing IP(IA) (i.e., the fixed-period task CT) was executed between the previously executed elapsed time determination task DT and the currently executed elapsed time determination task DT. If the CPU 10 determines that a fixed-period task CT was executed between the previously executed elapsed time determination task DT and the currently executed elapsed time determination task DT, the CPU 10 proceeds to step S330. If the interrupt count NI(IA) of the interrupt processing IP(IA) is "0" (Yes in step S320), the CPU 10 determines that the interrupt processing IP(IA) (i.e., the fixed-period task CT) has not been executed between the previously executed elapsed time determination task DT and the currently executed elapsed time determination task DT. If the CPU 10 determines that the fixed-period task CT has not been executed between the previously executed elapsed time determination task DT and the currently executed elapsed time determination task DT, the CPU 10 proceeds to step S350.

[0053] In step S330, the CPU 10 operates as the elapsed time estimation unit 124 and calculates the elapsed time ET from the start of execution of the most recently executed fixed-period task CT (i.e., the interrupt processing IP(IA)) to the start of execution of the elapsed time determination task DT (to be executed this time). That is, the CPU 10 calculates the elapsed time ET when a fixed-period task CT is executed between the previously executed elapsed time determination task DT and the currently executed elapsed time determination task DT (elapsed time calculation 1). For example, the CPU 10 calculates the elapsed time ET from the start of execution of a fixed-period task CT executed between the previously executed elapsed time determination task DT and the currently executed elapsed time determination task DT to the start of execution of the currently executed elapsed time determination task DT. That is, the CPU 10 calculates the elapsed time ET from the start of execution of a fixed-period task CT executed by interrupting the BG processing BP including the currently executed (i.e., currently executing) elapsed time determination task DT to the start of execution of the currently executed elapsed time determination task DT.

[0054] In step S330, the CPU 10 according to this embodiment estimates the elapsed time ET using the estimated processing time APT of each interrupt processing IP and the estimated processing time APT(G) of the BG processing BP including the currently executed elapsed time determination task DT. Specifically, the CPU 10 estimates the elapsed time ET as follows using the estimated processing times APT(IA), APT(IB), and APT(G) and the number of interrupts NI(IB) of the interrupt processing IP(IB) calculated in step S310. That is, the CPU 10 calculates (estimates) the elapsed time ET as follows: ET = APT(IA) + APT(IB) × NI(IB) + APT(G). Using the example shown in FIG. 9 , for the elapsed time determination task DT(A2), the CPU 10 estimates the elapsed time ET as follows: ET = APT(IA) + APT(IB) × 1 + APT(G(A2)). After calculating (estimating) the elapsed time ET, the CPU 10 proceeds to step S340.

[0055] In step S340, the CPU 10 operates as the elapsed time determination unit 126, updates the value of the "state determination flag SF" indicating whether the periodic task CT has been executed at the set period PC to "0 (normal)", and proceeds to step S390.

[0056] In step S350, the CPU 10 operates as the elapsed time estimation unit 124 and calculates the elapsed time ET from the start of execution of the most recently executed periodic task CT (i.e., the interrupt processing IP(IA)) to the start of execution of the elapsed time determination task DT (to be executed this time). That is, the CPU 10 calculates the elapsed time ET in the case where no periodic task CT was executed between the last executed elapsed time determination task DT and the current executed elapsed time determination task DT (elapsed time calculation 2). In particular, the CPU 10 calculates the elapsed time ET in the currently executed (i.e., currently executing) elapsed time determination task DT using the previous elapsed time PET, which is the "elapsed time ET estimated in the previously executed elapsed time determination task DT."

[0057] In step S350, the CPU 10 according to this embodiment estimates the elapsed time ET as follows, using the previous elapsed time PET, the estimated processing time APT(IB), the estimated processing time APT(G) of the BG processing BP including the elapsed time determination task DT to be executed currently, and the number of interrupts NI(IB). That is, the CPU 10 calculates (estimates) the elapsed time ET as follows: "ET = PET + APT(IB) × NI(IB) + APT(G)." Using the example shown in FIG. 9 as an example, the CPU 10 estimates the elapsed time ET for the elapsed time determination task DT(B1) as follows: "ET = PET(A2) + APT(IB) × 1 + APT(G(B1))." The previous elapsed time PET(A2) is the elapsed time ET calculated in the elapsed time determination task DT(A2).

[0058] As shown in the above-described calculation method (computation method) for the elapsed time ET, in this embodiment, the elapsed time ET may be accumulated across multiple executions of the elapsed time determination task DT. For example, if a periodic task CT (i.e., an interrupt process IP(IA)) is not executed between the previously executed elapsed time determination task DT and the currently executed elapsed time determination task DT, the elapsed time ET is accumulated across multiple executions of the elapsed time determination task DT. Specifically, in the currently executed elapsed time determination task DT, the CPU 10 estimates (calculates) the elapsed time ET by adding the previous elapsed time PET to the estimated processing time APT(IB) multiplied by the number of interrupts NI(IB) and the estimated processing time APT(G).

[0059] In step S360, the CPU 10 operates as the elapsed time determination unit 126 and determines whether the periodic task CT has been executed at the set period PC. Using the elapsed time ET calculated in step S350, the CPU 10 determines how much time has elapsed since the start of the most recently executed periodic task CT until the start of the currently executed (i.e., currently running) elapsed time determination task DT. The CPU 10 then determines whether the time (elapsed time ET) from the start of the most recently executed periodic task CT to the start of the elapsed time determination task DT is less than the predetermined abnormality determination time TT. If the elapsed time ET is less than the abnormality determination time TT (Yes in step S360), the CPU 10 determines that the periodic task CT has been executed at the set period PC and updates the value of the status determination flag SF to "0 (normal)" (step S370). If the elapsed time ET is equal to or greater than the abnormality determination time TT (No in step S360), the CPU 10 determines that the periodic task CT is not being executed at the set period PC, and updates the value of the status determination flag SF to "1 (abnormal)" (step S380).

[0060] In step S390, the CPU 10 operates as the elapsed time determination unit 120 and updates the value of the previous interrupt count value PCV with the value of the interrupt count value ICV. Therefore, the difference obtained by subtracting the previous interrupt count value PCV from the interrupt count value ICV indicates the number of interrupts of each interrupt processing IP (interrupt processing IP(IA) and interrupt processing IP(IB)) that occurred between the elapsed time determination task DT executed last time and the elapsed time determination task DT executed this time. For example, the difference obtained by subtracting the previous interrupt count value PCV from the interrupt count value ICV indicates the number of interrupts of each interrupt processing IP that occurred for the BG processing BP including the elapsed time determination task DT executed this time.

[0061] In step S400, it is determined whether the value of the status determination flag SF set in each of steps S340, S370, and S380 is "0 (normal)." If the value of the status determination flag SF is "0" (Yes in S400), the CPU 10 terminates the execution of the currently executed elapsed time determination task DT, that is, terminates the execution of the currently executed BG processing BP including the currently executed elapsed time determination task DT. Upon completing the currently executed BG processing BP including the currently executed elapsed time determination task DT, the CPU 10 starts, for example, the next BG processing BP, that is, starts the execution of the next BG processing BP including the next elapsed time determination task DT. If the value of the status determination flag SF is "1 (abnormal)" (Yes in S400), the CPU 10 executes the periodic task CT (step S410).

[0062] In the example shown in FIG. 7 , the CPU 10 executes the periodic task CT of S410 in the currently executed elapsed time determination task DT, i.e., in the BG processing BP including the currently executed elapsed time determination task DT. However, it is not essential for the CPU 10 to execute the periodic task CT based on the determination result that the value of the state determination flag SF is "1" (i.e., the periodic task CT based on the determination activation) in the currently executed BG processing BP including the elapsed time determination task DT. The CPU 10 may execute the periodic task CT based on the determination activation in the BG processing BP step. For example, the CPU 10 may determine whether the value of the state determination flag SF is "1" at the start of execution of each BG processing BP, and if it determines that the value of the state determination flag SF is "1," execute the periodic task CT based on the determination activation in the BG processing BP. For example, when the CPU 10 updates the value of the state determination flag SF to "1" in the elapsed time determination task DT to be executed this time (i.e., currently being executed), it may execute a periodic task CT based on the determination start in the BG processing BP to be executed next after the "BG processing BP including the elapsed time determination task DT to be executed this time."

[0063] (Regarding the Influence of Background Processing Time on Calculation of Elapsed Time) As described above, the CPU 10 uses the processing time PT(G) (or the estimated processing time APT(G)) of the BG processing BP in calculating (estimating) the elapsed time ET. Hereinafter, the influence of the processing time PT(G) (or the estimated processing time APT(G)) on the calculation (estimation) of the elapsed time ET will be described with reference to FIG. 8 .

[0064] The CPU 10 repeatedly executes the BG processing BP, i.e., repeatedly executes the elapsed time determination task DT, which includes a calculation (estimation) of the elapsed time ET. The time interval (execution interval) between repeatedly executed elapsed time determination tasks DT matches the processing time PT(G) of the BG processing BP, unless an interrupt from the interrupt processing IP occurs. For example, the time interval between the previously executed elapsed time determination task DT and the currently executed elapsed time determination task DT matches the processing time PT(G) of the BG processing BP including the currently executed elapsed time determination task DT.

[0065] On the other hand, in a situation where an interruption of an interrupt processing IP (IA) (i.e., a periodic task CT) occurs to a BG processing BP, the "time required to execute the BG processing BP (time required for processing)" used to calculate (estimate) the elapsed time ET should preferably be the following value: That is, it is preferable to use the "time required to execute (the actual time required for processing) the portion of the BG processing BP that was executed after the execution of the periodic task CT was completed (actually processed after the execution of the periodic task CT was completed)" to calculate (estimate) the elapsed time ET.

[0066] However, it is not necessarily easy for the CPU 10 executing the BG processing BP to determine "at what point during the execution of the BG processing BP the execution of the periodic task CT was completed." In other words, it is not necessarily easy for the BG processing BP to determine "at what point during the execution of the BG processing BP the execution of the periodic task CT was completed." Therefore, in this embodiment, the CPU 10 estimates the elapsed time ET by uniformly using the following value, regardless of the timing at which the execution of the periodic task CT was completed, instead of the time required to execute the portion of the BG processing BP that was "executed after the execution of the periodic task CT was completed." That is, the CPU 10 estimates the elapsed time ET by using the time required to execute all of the BG processing BP (particularly the time estimated to be required to execute all of the BG processing BP), specifically, the estimated processing time APT(G) of the BG processing BP. The CPU 10 can simplify the calculation for estimating the elapsed time ET by uniformly using the estimated processing time APT (G) of the BG processing BP regardless of the timing at which the execution of the periodic task CT is completed.

[0067] However, by estimating the elapsed time ET using this method, the time required to execute the portion of the BG processing BP that was not actually executed after the periodic task CT completed execution is added as an error factor. For example, the time required to execute the portion of the BG processing BP that was executed before the periodic task CT was interrupted (started execution) is added as an error factor when estimating the elapsed time ET. Therefore, if the estimated processing time APT (G) of the BG processing BP is used uniformly regardless of the timing at which the periodic task CT completed execution, the accuracy of the estimation of the elapsed time ET may deteriorate.

[0068] In the example shown in FIG. 8 , for the elapsed time determination task DT(A), which begins execution at time t25, it is desirable to use the time required for the execution of the "portion of the BG processing BP(A) from time t23 onward, when the periodic task CT begins execution," to calculate the elapsed time ET. Therefore, if the estimated processing time APT(G) of the BG processing BP is uniformly used to calculate the elapsed time ET, the following problem occurs. That is, for the elapsed time determination task DT(A), the elapsed time ET is estimated using the processing time PT(G(A)) of the BG processing BP(A), which includes the time between times t21 and t23 (more precisely, the estimated processing time APT(G(A))). Therefore, the time between times t21 and t23 (the estimated processing time APT(G(A)) corresponding to this time) is added as an error factor to the estimation of the elapsed time ET.

[0069] If no interrupt occurs to the BG processing BP from the interrupt processing IP(IA) (periodic task CT), the "processing time PT(G) of the BG processing BP (more precisely, the estimated processing time APT(G))" used in calculating the elapsed time ET does not include errors due to the factors described above. In the illustrated example, the CPU 10 calculates the elapsed time ET for the elapsed time determination task DT(B) that begins execution at time t32 by using the processing time PT(G(B)) of the BG processing BP(B) from time t26 to t32 (more precisely, the estimated processing time APT(G(B))). The time from time t26 to t32 is the processing time PT(G(B)) of the BG processing BP(B) including the elapsed time determination task DT(B). Therefore, the time from time t26 to t32 does not become an error factor in the calculation of the elapsed time ET.

[0070] However, if the time interval between repeated executions of the elapsed time determination task DT is long, it is delayed to detect that the periodic task CT is not being executed in the set period PC, which can cause the periodicity of the periodic task CT to deteriorate. In the illustrated example, the processing time PT(G(B)) (estimated processing time APT(G(B))) of the BG processing BP(B) including the elapsed time determination task DT(B) is longer than the set period PC. This delays the timing at which the elapsed time determination task DT(B) is executed (starts execution). In the illustrated example, the periodic task CT executed most recently with respect to the elapsed time determination task DT(B) is the periodic task CT(1) executed in the interrupt processing IP(IA(1)), and the periodic task CT(1) is executed in the set period PC(1). However, the execution of the elapsed time determination task DT(B) starts at time t32, after the set period PC(2) next to the set period PC(1) has elapsed. In other words, when the elapsed time determination task DT(B) starts to execute, the set period PC (set period PC(2)) next to the "set period PC (set period PC(1)) at which the periodic task CT was executed most recently" has already elapsed. Therefore, in the elapsed time determination task DT(B), the CPU 10 cannot appropriately determine whether the periodic task CT was executed at the set period PC.

[0071] Therefore, in this embodiment, it is desirable to make the processing time PT(G) (estimated processing time APT(G)) of each BG processing BP including each elapsed time judgment task DT as small (shortened) as possible. In this embodiment, the elapsed time judgment task DT is repeatedly executed at time intervals shorter than the set period PC, that is, at time intervals shorter than the execution period of the periodic task CT (for example, the output period of the PRUN signal). In other words, the processing time PT(G) (estimated processing time APT(G)) of each BG processing BP including each elapsed time judgment task DT is shorter than the set period PC.

[0072] In the example shown in FIG. 9 , the CPU 10 repeatedly executes a background processing BP (particularly, an elapsed time determination task DT) at time intervals shorter than the set cycle PC. Specifically, the background processing BP (A) is divided into a background processing BP (A1) and a background processing BP (A2). The processing time PT(G(A1)) (estimated processing time APT(G(A1))) of the background processing BP (A1) is shorter than the set cycle PC, and the processing time PT(G(A2)) (estimated processing time APT(G(A2))) of the background processing BP (A2) is shorter than the set cycle PC. The CPU 10 executes the elapsed time determination task DT(A1) in the background processing BP (A1), and the elapsed time determination task DT(A2) in the background processing BP (A2). Similarly, the BG processing BP(B) is divided into a BG processing BP(B1) and a BG processing BP(B2). The processing time PT(G(B1)) (estimated processing time APT(G(B1))) of the BG processing BP(B1) is shorter than the set cycle PC, and the processing time PT(G(B2)) (estimated processing time APT(B(A2))) of the BG processing BP(B2) is shorter than the set cycle PC. The CPU 10 executes the elapsed time determination task DT(B1) in the BG processing BP(B1) and the elapsed time determination task DT(B2) in the BG processing BP(B2).

[0073] Then, in the elapsed time determination task DT(A2) which starts execution at time t47, the processing time PT(G(A2)) (estimated processing time APT(G(A2))) of the BG processing BP(A2) from time t44 is used to estimate the elapsed time ET. Therefore, in estimating the elapsed time ET in the elapsed time determination task DT(A2), the CPU 10 can exclude the "processing time PT(G(A1)) (estimated processing time APT(G(A1))) of the BG processing BP(A1))" from time t41 to t43.

[0074] (Example of switching the trigger for starting a periodic task from timer start to judgment start) Figure 10 shows an example in which the periodic task CT is executed by judgment start when execution of an interrupt processing IP (IA) (i.e., the periodic task CT) due to timer start (timer interrupt request TIR) fails. In particular, Figure 10 shows that by repeatedly executing the elapsed time judgment task DT at the time intervals exemplified in Figure 9, the CPU 10 can appropriately determine whether the periodic task CT has been executed with the set period PC, and can execute the periodic task CT with the set period PC.

[0075] In the illustrated example, at time t45, an interrupt by the interrupt processing IP(IA(1)) occurs due to timer activation (timer interrupt request TIR), i.e., the fixed-period task CT(1) is being executed in the interrupt processing IP(IA(1)) at time t45. Then, at time t47 after time t45, the CPU 10 starts execution of the elapsed time determination task DT(A2). Because there is an interrupt by the interrupt processing IP(IA(1)) to the BG processing BP(A2) including the elapsed time determination task DT(A2), i.e., because the fixed-period task CT(1) is being executed between the elapsed time determination task DT(A1) and the elapsed time determination task DT(A2), the CPU 10 executes steps S330 and S340 of FIG. 7 . That is, in the elapsed time determination task DT (A2), the CPU 10 calculates the elapsed time ET (step S330), and updates the value of the "state determination flag SF" to "0" (step S340).

[0076] At time t51, which is after time t47, the CPU 10 starts executing the elapsed time determination task DT(B1). The time interval from time t47 to time t51 is shorter than the set period PC. Because there is no interrupt from the interrupt processing IP(IA(1)) to the BG processing BP(B1) including the elapsed time determination task DT(B1), that is, because the fixed-period task CT is not being executed between the elapsed time determination task DT(A2) and the elapsed time determination task DT(B1), the CPU 10 executes step S350 in FIG. 7. That is, in the elapsed time determination task DT(B1), the CPU 10 calculates (estimates) the elapsed time ET using the previous elapsed time PET(A2), which is the elapsed time ET calculated in the elapsed time determination task DT(A2). Specifically, the CPU 10 estimates (calculates) the elapsed time ET by multiplying the estimated processing time APT(IB) of the interrupt processing IP(IB) by the number of interrupts NI(IB) (1 in the illustrated example) of the interrupt processing IP(IB) for the BG processing BP(B1). The CPU 10 then adds the estimated processing time APT(G(B1)) of the BG processing BP(B1) to the previous elapsed time PET(A2). Next, the CPU 10 executes step S360, that is, determines whether the elapsed time ET is less than the abnormality determination time TT. As described above, the abnormality determination time TT is equal to, for example, the set period PC. In the illustrated example, the elapsed time ET from the start of execution of the most recently executed periodic task CT(1) (time t45) to the start of execution of the elapsed time determination task DT(B1) (time t51) is longer (greater) than the set period PC. Therefore, the CPU 10 determines that the elapsed time ET is equal to or greater than the abnormality determination time TT (No in step S360), and updates the value of the state determination flag SF to "1" (step S380).

[0077] When the CPU 10 confirms that the value of the state determination flag SF is "1" (No in S400), it determines that the periodic task CT was not executed in the set period PC and executes the periodic task CT in the background processing routine BP (step S410, "determined start"). In the illustrated example, the CPU 10 executes the periodic task CT(2) at time t52. As is clear from the figure, time t52 is included in the set period PC(2), which is the set period PC following the "set period PC(1) in which the periodic task CT(1) was executed." In other words, the CPU 10 executes the periodic task CT(2) by determined start in the set period PC (specifically, the set period PC(2)) following the "set period PC(1) in which the periodic task CT(1) was executed." Therefore, the CPU 10 can execute the periodic task CT in the set period PC even if an abnormality occurs in the timer start (i.e., the timer interrupt request TIR is not output normally).

[0078] As described above, when the CPU 10 determines in the BG processing BP that the periodic task CT is not being executed in the interrupt processing IP (IA) initiated by the timer (timer interrupt request TIR), the CPU 10 executes the periodic task CT in the BG processing BP. Specifically, in the BG processing BP, which is executed independently of the input of the interrupt request IR, the CPU 10 executes the elapsed time determination task DT, which calculates the elapsed time ET from the start of execution of the most recently executed periodic task CT and compares the elapsed time ET with the abnormality determination time TT. In particular, the CPU 10 repeatedly executes the elapsed time determination task DT at time intervals shorter than the set period PC. If the elapsed time ET is equal to or greater than the abnormality determination time TT, the CPU 10 determines that the periodic task CT is not being executed in the set period PC, i.e., that the interrupt processing IP (IA) initiated by the timer interrupt request TIR is not being executed (e.g., the timer has failed to start). When the CPU 10 determines that the periodic task CT is not being executed at the set period PC, it executes the periodic task CT in the background processing routine BP. That is, it switches the trigger for the periodic task CT from timer-activated to determined-activated, and executes the periodic task CT. Therefore, even if an abnormality occurs in the timer activation (i.e., the timer interrupt request TIR is not output normally), the CPU 10 can execute the periodic task CT at the set period PC, and in particular, can repeatedly execute the periodic task CT at the set period PC. Therefore, even if an abnormality occurs in the timer activation, the CPU 10 can repeatedly output, for example, a PRUN signal at the set period PC, thereby avoiding a situation in which the monitoring circuit 20 outputs a RESET signal to the CPU 10.

[0079] [Features] As described above, the electronic control device 1 according to this embodiment includes a CPU 10, a timer 30, and an interrupt controller 40. The CPU 10 is a processor capable of executing a background processing (BP) process, which is executed independently of an interrupt request (IR), and an interrupt processing (IP) process, which is executed by interrupting the background processing (BP) process in response to an interrupt request (IR). The timer 30 repeatedly outputs a CM signal at set intervals (PC). The interrupt controller 40 repeatedly outputs a timer interrupt request (TIR), which is an interrupt request (IR), to the CPU 10 at set intervals (PC) in accordance with the CM signal repeatedly input from the timer 30 at set intervals (PC). The interrupt controller 40 repeatedly outputs the timer interrupt request (TIR) ​​to the CPU 10 at set intervals (PC), thereby causing the CPU 10 to repeatedly execute a fixed-period task (CT) in the interrupt processing IP (particularly, the interrupt processing IP (IA)) at set intervals (PC). The CPU 10 includes an elapsed time determination unit 120 (determination unit). The elapsed time determination unit 120 repeatedly executes an elapsed time determination task DT, which determines whether a periodic task TC has been executed in a set cycle PC, in the BG processing BP, at time intervals shorter than the set cycle PC. If the elapsed time determination unit 120 determines that the periodic task TC has not been executed in the set cycle PC, the CPU 10 executes the periodic task TC in the BG processing BP.

[0080] The information processing method PM according to this embodiment causes the CPU 10 to repeatedly execute a periodic task CT at a set period PC. The CPU 10 is capable of executing a background processing process (BP) and an interrupt processing process (IP). The CPU 10 repeatedly executes the periodic task CT at the set period PC in the interrupt processing process IP (particularly, the interrupt processing process IP (IA)) by repeatedly receiving a timer interrupt request TIR at the set period PC. The timer interrupt request TIR is an interrupt request IR output in accordance with a CM signal repeatedly output from the timer 30 at the set period PC. Furthermore, the CPU 10 repeatedly executes an elapsed time determination task DT in the background processing process BP, at time intervals shorter than the set period PC, to determine whether the periodic task TC has been executed at the set period PC. If the elapsed time determination task DT determines that the periodic task TC has not been executed at the set period PC, the CPU 10 executes the periodic task TC in the background processing process BP.

[0081] According to this configuration, the electronic control unit 1 (information processing method PM) repeatedly executes the elapsed time determination task DT at time intervals shorter than the set period PC in the background processing BP, which is executed independently of the input of an interrupt request IR. If the elapsed time determination task DT determines that the periodic task TC was not executed in the set period PC, the electronic control unit 1 (information processing method PM) causes the CPU 10 to execute the periodic task TC in the background processing BP. In other words, if the electronic control unit 1 (information processing method PM) determines that the periodic task TC was not executed in the set period PC, the electronic control unit 1 (information processing method PM) switches the activation factor of the periodic task CT from timer activation to determination activation, causing the CPU 10 to execute the periodic task TC in the background processing BP. Therefore, the electronic control unit 1 (information processing method PM) can cause the CPU 10 to execute the periodic task TC in the set period PC even if the timer interrupt request TIR is not normally output.

[0082] §4 Modifications Although the embodiments of the present invention have been described above in detail, the above description is merely an example of the present invention in every respect. It goes without saying that various improvements and modifications can be made without departing from the scope of the present invention. For example, the following modifications are possible. Note that, in the following, the same reference numerals are used for components similar to those in the above embodiment, and descriptions of similar points to those in the above embodiment are omitted where appropriate. The following modifications can be combined as appropriate.

[0083] In the above embodiment, an example was described in which the estimated processing time APT of each process is a representative value of the processing time PT measured in advance for each process. However, in this embodiment, the estimated processing time APT of each process may be determined based on the processing time PT measured in advance for each process. For example, the estimated processing time APT of each process may be changed as appropriate depending on the processing load state of each process. For example, the estimated processing time APT of each process used to calculate (estimate) the elapsed time ET in the currently executed elapsed time determination task DT may be the processing time PT of each process measured in the previously executed BG processing BP including the elapsed time determination task DT. By using the processing time PT of each process measured in the previously executed BG processing BP including the previously executed elapsed time determination task DT as the estimated processing time APT of each process in the currently executed elapsed time determination task DT, the electronic control device 1 (information processing method PM) achieves the following effects. That is, the "processing time PT of each process measured in the BG processing BP including the elapsed time determination task DT executed last time" is likely to be close to the "processing time PT of each process in the BG processing BP including the elapsed time determination task DT executed this time." Therefore, the electronic control unit 1 (information processing method PM) can precisely calculate the elapsed time ET by using the above-mentioned "estimated processing time APT of each process."

[0084] In addition, in the present embodiment, an example has been described in which the interrupt processing IP consists of two types of interrupt processing IPs: an interrupt processing IP (IA) that executes the periodic task CT and an interrupt processing IP (IB) that is another interrupt processing IP. However, the interrupt processing IP may consist of three or more types of interrupt processing IPs. For example, the interrupt processing IP may consist of three types of interrupt processing IPs: an interrupt processing IP (IA) and interrupt processing IPs (IB) and IP(C) that are other interrupt processing IPs than the interrupt processing IP (IA). In this case, the elapsed time ET may be calculated (estimated) taking into account the number of interrupts NI(C) and the processing time PT(C) (estimated processing time APT(C)) of the interrupt processing IP(C). Therefore, the information processing method PM according to this embodiment can be easily applied even when there are three or more types of interrupt processing IPs.

[0085] 1...Electronic control device, 10...CPU (processor), 30...Timer, 40...Interrupt controller, 120...Elapsed time determination unit (determination unit), APT...Expected processing time, BP...Background processing, CT...Fixed period task, DT...Elapsed time determination task, ET...Elapsed time, IP...Interrupt processing, IP(IB)...Interrupt processing (priority interrupt processing), IR...Interrupt request, PC...Set period, PIR...Priority interrupt request, PM...Information processing method, TIR...Timer interrupt request, TT...Abnormality determination time

Claims

1. An information processing method for causing a processor to repeatedly execute a periodic task at set intervals, wherein the processor is capable of executing background processing that is executed independently of input of an interrupt request, and interrupt processing that is executed by interrupting execution of the background processing in response to input of the interrupt request, wherein a timer interrupt request, which is the interrupt request output in accordance with a signal repeatedly output from a timer at set intervals, is repeatedly input at set intervals, causing the periodic task to be repeatedly executed at set intervals in the interrupt processing, wherein the background processing repeatedly executes an elapsed time determination task that determines whether the periodic task has been executed at the set interval, at time intervals shorter than the set interval, and wherein if the elapsed time determination task determines that the periodic task has not been executed at the set interval, the periodic task is executed in the background processing.

2. The information processing method according to claim 1, wherein the processor suspends execution of the periodic task and executes priority interrupt processing when a priority interrupt request, which is an interrupt request different from the timer interrupt request, is input.

3. The information processing method according to claim 2, wherein the processor, in the elapsed time determination task, estimates the elapsed time from the start of execution of the most recently executed fixed-period task to the start of execution of the fixed-period task, and determines whether the fixed-period task has been executed at the set cycle by comparing the estimated elapsed time with a predetermined abnormality determination time.

4. The information processing method according to claim 3, wherein the processor estimates the elapsed time using an estimated processing time that is pre-estimated as the time required from the start of execution to the completion of execution for each of the background processing, the periodic task, and the priority interrupt processing.

5. When the processor determines that the fixed-period task was executed between the elapsed time judgment task executed last time and the elapsed time judgment task to be executed currently, it calculates, in the elapsed time judgment task to be executed currently, a total time which is the sum of: the expected processing time of the fixed-period task; a value obtained by multiplying the expected processing time of the priority interrupt processing by the number of times an interrupt of the priority interrupt processing occurred from the start of execution of the fixed-period task to the start of execution of the elapsed time judgment task to be executed currently; and the expected processing time of the background processing including the elapsed time judgment task to be executed currently; when it determines that the fixed-period task was not executed between the elapsed time judgment task executed last time and the elapsed time judgment task to be executed currently, it calculates, in the elapsed time judgment task to be executed currently, a total time which is the sum of: the expected processing time of the fixed-period task; The information processing method according to claim 4 , wherein the elapsed time is estimated as a sum of the estimated processing time of the background processing including the elapsed time determination task to be executed this time.

6. An electronic control device comprising: a CPU capable of executing background processing that is executed independently of input of an interrupt request, and interrupt processing that is executed by interrupting execution of the background processing in response to input of the interrupt request; a timer that repeatedly outputs a signal at set intervals; and an interrupt controller that repeatedly outputs a timer interrupt request, which is the interrupt request, to the CPU at set intervals in accordance with the signal repeatedly input from the timer at set intervals, thereby causing the CPU to repeatedly execute a fixed-period task at set intervals in the interrupt processing; wherein the CPU includes a determination unit that repeatedly executes, at time intervals shorter than the set interval, an elapsed time determination task in the background processing that determines whether the fixed-period task has been executed at the set interval; and when the determination unit determines that the fixed-period task has not been executed at the set interval, the CPU executes the fixed-period task in the background processing.

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