Second stage beamforming for ultrasound imaging probes

Abstract

An ultrasound imaging probe arranged to perform receive beamforming operation from ultrasound signals received by said probe, wherein said probe comprises: - a two-dimensional array of transducer elements wherein said elements are arranged to receive said ultrasound signals; - an Application Specific Integrated Circuit, ASIC, in electric connection with said two-dimensional array for receiving said ultrasound signals, and wherein said ASIC is configured to perform beamforming on said received signals; wherein said array of transducer elements is arranged in a plurality of groups of transducer elements; wherein said ASIC is arranged for performing a first stage beamforming on each of said plurality of groups, to generate a first stage beamformed signal for a respective group; wherein said ASIC is arranged for performing a second stage beamforming on each of said plurality groups, to generate a second stage beamformed signal for forwarding said second stage beamformed signals; and wherein both said first and second stage beamforming are performed in the analog domain, for generating an analog first stage beamformed signal and analog second stage beamformed signal, respectively for forwarding to an ultrasound system for being further processed and / or being displayed.

Description

[0001] Title: second stage beamforming for ultrasound imaging probes

[0002] Description:

[0003] The present invention relates to an ultrasound probe and inventive concept of beamforming by an ultrasound system having such a probe.

[0004] Background of the invention

[0005] An ultrasound imaging probe consists of a 1 D or a 2D array of transducer elements and multiple cables or also referred to as signal cables, which connects the transducer elements, directly or indirectly to the ultrasound system. There are several challenges related to the number of cables in ultrasound probes which relate, amongst others to maneuverability, usability, and potential signal interference. As the number of cables increases, handling the probe becomes more cumbersome for the operator, impacting the overall user experience. In applications like Transesophageal Echocardiography (TEE), where space is limited and maneuverability is crucial, a high cable count poses challenges in terms of probe insertion and positioning within the esophagus. The increased number of cables can impede the probe's flexibility, potentially affecting patient comfort and the operator's ability to navigate the probe precisely for optimal imaging, especially, but not limited to, applications in the field of transesophageal echocardiography and intracardiac echocardiography.

[0006] As such, there is a need to reduce the number of cables of such probes. Moreover, ultrasound imaging probes with a 2D transducer array may even require at least some measures to reduce the number of cables, as the number of ultrasound transducer elements typically exceeds the number of cables that can individually be connected (with cables corresponding to arrays of elements ranging typically from 500 to 20000 elements).

[0007] In ultrasound imaging, beamforming plays a critical role in forming high-quality images. Traditional beamforming techniques involve transmitting ultrasound pulses and receiving echoes using individual transducer elements, followed by combining these signals to create images. However, this process generates a significant amount of info that must be transferred to the imaging system, posing challenges for applications with limited data transfer capacity, such as handheld ultrasound devices and miniaturized probes with a two-dimensional transducer array where the number of elements is greater than the number of cables. To address this issue, two-stage beamforming methods have been developed. In the first stage, which occurs within the ultrasound probe itself, the information contained in the signals is processed to reduce the amount of information from individual transducer elements into a group output or also referred to as partial sum, as being the output of the first stage (whereas the output of the second stage is referred to as scanline data). This reduction significantly decreases the information transfer requirements. Subsequently, the output from the first stage is converted to a digital signal by Analog to Digital Converters, ADCs, and through the second stage beamforming and subsequently processed further to reconstruct the images out of all data being received.

[0008] With a technique which is known as “Micro-beamforming” or “Sub-Aperture- Beamforming”, the transducer elements are divided into groups such that the receive signals from the elements of a group are combined with beamforming time delays in the probe at the first stage, before being forwarded over the cables to the imaging system or other backend system. The first stage realizes a “delay and sum” operation for a group of elements (typically but not limited to a group of 3x3, 4x4, 5x5 elements), while the second stage performs a similar operation on the partial sums of the groups. This approach of micro-beamforming reduces the number of cables required for transfer of the signals, making it particularly suitable for applications with space and weight constraints, such as transesophageal echocardiography and intracardiac echocardiography systems.

[0009] With this known technique, the first stage beamforming is implemented in the analog domain, by use of capacitor banks to delay and sum the element signals, while the second stage is implemented in the digital domain. This requires numerous cables and ADCs respectively (typically 64 / 128 / 192 / 256 channels) to convert the signal from analog to digital, and dedicated hardware handling the digital data stream and its calculations. Such a technique therefore requires complex electronics for the conversion and bulky (i.e. hardware with high computational power) hardware for processing the digital data stream and performing the calculations thereon, which is usually expensive and power-hungry, limiting its mobile usage.

[0010] Although the known approaches do reduce the number of cables, the number of cables that are still required prevents compatibility with handheld devices as smartphones using minimal additional hardware, and requiring minimal power, and lacking the high computational processing power of the known, bulky, systems.

[0011] Accordingly, there is a need for an ultrasound imaging probe which is compatible with handheld devices such as general-purpose handheld devices like smartphones, and dedicated handheld viewing specifically designed for viewing ultrasound images, but also for other processing devices which are portable and / or handheld. In particular, there is a need for an ultrasound imaging probe in which at least some of the limitations of traditional probes have been overcome, without or at least minimizing the compromising on capabilities of known ultrasound imaging probes arranged for bulky systems.

[0012] Summary

[0013] In a first aspect, there is provided, an ultrasound imaging probe arranged to perform receive beamforming operation from ultrasound signals received by said probe, wherein said probe comprises: a two-dimensional array of transducer elements wherein said elements are arranged to receive said ultrasound signals; an Application Specific Integrated Circuit, ASIC, in electric connection with said two-dimensional array for receiving said ultrasound signals, and wherein said ASIC is configured to perform beamforming on said received signals; wherein said array of transducer elements is arranged in a plurality of groups of transducer elements; wherein said ASIC is arranged for performing a first stage beamforming on each of said plurality of groups, to generate a first stage beamformed signal for a respective group; wherein said ASIC is arranged for performing a second stage beamforming on each of said plurality groups, to generate a second stage beamformed signal for forwarding said second stage beamformed signals; characterized in that both said first and second stage beamforming are performed in the analog domain, for generating analog first stage beamformed signals and analog second stage beamformed signals, respectively, for forwarding to an ultrasound system for being further processed and / or being displayed.

[0014] Although systems are known wherein both first and second stage beamforming are implemented in the ultrasound imaging probe, by use of integrated ADC’s, the present invention, in a first aspect, provides an ultrasound imaging probe wherein both the first and second stage beamforming are performed in the analog domain.

[0015] Implementing both stages in the analog domain has several advantages, amongst others; reduction of the number of (signal) cables, for example 4 or 8 cables as compared to 64 / 128 / 192 / 256 typical cable count of known probes, and a corresponding reduction in required ADCs, and corresponding data bandwidth. Moreover, less requirements are for hardware performing the calculations for the second stage beamforming, minimal power requirements, which together enable compatibility with handheld viewing devices as smartphones requiring minimal to zero additional hardware.

[0016] With the implementation of performing both the first and second stage in the analog domain, also challenges arise, such as in development of an integrated second stage beamformer in the analog domain capable of realizing an extended delay range for the “delay and sum” operation which is an important part of the second stage beamforming. In opposite to the first stage beamforming where the delay range might only cover one group or sub-aperture (a few hundreds of nanoseconds), the delay range for the second stage might cover the complete aperture and might go up to over 10 microseconds. Furthermore this “delay and sum” operation might be performed with time-varying delays, referred to as dynamic delay, while for the first stage this is typically not required. In an example, the second stage beamforming comprises a dynamic delay mechanism, wherein the delay for each group of transducer elements is dynamically adjusted as a function of time of arrival of the received ultrasound signals.

[0017] The dynamic delay mechanism may be implemented by the ASIC by dynamically adjusting the received ultrasound signals as a function of time of arrival, e.g. the delays may be closer to zero as time advances. The delays may be implemented as a dynamic adjustment of a group delays wherein there is dynamic control over the group delay, e.g. having a smaller delay as time advances. The dynamic delay may in an example be implemented by varying an l / Q demodulation period and an integration period of the second stage beamforming. Dynamic delay may however also be implemented by adjusting sampling periods, capacitor bank read / write sequences, or interpolation coefficients.

[0018] Unlike traditional static beamforming, where each group of transducer elements is delayed by a fixed amount, dynamic delay allows for real-time adaptation of the delays as a function of the time of arrival of the received signals. This dynamic adjustment is beneficial for maintaining optimal focus along the beamline when imaging targets at varying depths or when the relative positions of the transducer groups result in non-uniform arrival times.

[0019] In disclosed embodiments, the dynamic delay mechanism may be realized by varying the timing parameters that control the beamforming process. One embodiment achieves this by adjusting the integration period used during the signal accumulation phase in the second-stage beamformer. For instance, while a center group of transducer elements might use a fixed integration period, groups located toward the periphery can have their integration period shortened. This intentional shortening allows the corresponding write pointer in the capacitor bank to "catch up" with the center group's pointer, effectively reducing the group delay in a stepwise manner (for example in increments of certain small time period of like 25 ns). As time progresses, and as the differences in travel times diminish, the integration period for these side groups may revert back to the longer period or continue alternating, thereby dynamically controlling the relative delays across the array. The technical basis for this dynamic delay concept may be derived from the concept of delay-and-sum beamforming. In conventional systems, the delay applied to each element or group is fixed, often based on the geometry of the transducer array and the assumed speed of sound in the tissue. However, in dynamic beamforming, the delays must be continuously adjusted to compensate for changes in the focus position along the beamline. This adjustment may be achieved by varying the timing of the signal sampling and integration, thus effectively modifying the delay without altering the underlying hardware configuration or relying exclusively on l / Q demodulation.

[0020] While the original disclosure primarily illustrates dynamic delay in the context of l / Q demodulation, the underlying principle is broader than such l / Q demodulation implementation. By controlling the temporal offset between the write pointer (which determines when the analog signal is captured in the capacitor bank) and the common read pointer (which samples the stored signals), it is possible to implement dynamic delay independently. For example, even if the beamformed output is generated by a direct analog delay-and-sum process without employing baseband conversion via l / Q demodulation, the dynamic delay mechanism can be realized through similar means. In such a system, the dynamic adjustment of the integration period serves as the key parameter to control the effective delay applied to each group of transducer elements.

[0021] In an example, the dynamic delays may be implemented in capacitor bank read / write sequences wherein the capacitor banks, used for storing the integrated signals, are controlled by multiple write pointers (one per group) and a common read pointer. The dynamic delay is realized when the timing of the write pointers is modulated relative to the read pointer. In practical terms, this means that for groups situated away from the center of the array (where delays are naturally larger due to the geometry), the beamformer employs a reduced integration period to progressively reduce the delay difference. Conversely, groups near the center maintain a constant integration period. This method provides a smooth transition in delay adjustment, ensuring that all groups converge to the appropriate timing as the beam focuses at different depths. Accordingly, the invention is not limited to systems that employ l / Q demodulation; as it can be implemented in many second-stage beamformer that uses a capacitor bank with configurable timing.

[0022] In an example, said ASIC is arranged for said second stage beamforming to utilize an l / Q demodulation scheme to generate a second stage beamformed signal.

[0023] In an example, said ASIC is arranged for applying a dynamic l / Q demodulation scheme to non-equidistant sampled l / Q demodulation data. l / Q modulation (and hence, l / Q demodulation), short for In-phase and Quadrature demodulation, is a signal processing technique known in communication systems. It involves separating a modulated signal into its in-phase (I) and quadrature (Q) components. In-phase represents the signal's amplitude at one specific point in its cycle, while quadrature represents the amplitude 90 degrees out of phase. These components are then processed together.

[0024] The use of l / Q (de)modulation on the first stage beamformed signals is considered not an obvious choice for an analogue second stage beamform to be forwarded from the ultrasound imaging probe to the low computational power processing or viewing system.. l / Q modulation is traditionally recognized for its role in data reduction before analog-to-digital conversion (ADC) and its facilitation of envelope detection. In typical scenarios, a single demodulation signal (LO), characterized by fixed frequency and phase, is employed. This technique is predominantly utilized outside the realm of receive (RX) beamforming processes and is primarily associated with signal acquisition tasks. Its implementation results in conditionally lossless data reduction, effectively reducing the sampling rate required for subsequent ADC operations. However, these conventional applications do not directly align with the objectives of the present invention. In the context of the current application, which involves analog domain receive second stage beamforming for enhanced power efficiency and compactness, the conventional uses of l / Q modulation are not directly applicable. This deviation from the typical use renders such use non-obvious, especially since leveraging the benefits of l / Q modulation for receive beamforming necessitates addressing the issue of phase rotation. Unlike digital domain operations where phase rotation can be easily executed, implementing phase adjustments of two separate sampled signals in the analog domain presents distinct challenges. By integrating phase rotation into the signal processing pipeline, compatibility is ensured with the analog domain constraints while advantages of l / Q modulation are put into practice.

[0025] To address the challenge of phase rotation in the analog domain, the phase rotation may be applied before sampling, thereby, thereby implementing the phase rotation in the time-continuous domain of the received signal for easier implementation. By leveraging the degree of freedom in the phase of the demodulation signal (LO), the phase rotation is incorporated into the signal processing process. Furthermore, adjustments to the sampling / integration period may be made to accommodate the pre-sampling phase rotation, enabling effective integration of l / Q modulation into the receive beamforming process. It is to be understood that integration is used for low-pass filtering, which is part of the l / Q demodulation.

[0026] Thus, even though l / Q (de)modulation thus seems like a non-obvious choice, the inventors came to the insight that l / Q demodulation is very useful. In the proposed ultrasound probe, l / Q demodulation is applied, and the signal is thus first demodulated (i.e. the carrier is removed).

[0027] Further, l / Q demodulation, would reduce the data bandwidth of the signals in a lossless manner, under the condition that the bandwidth < 100%, which eases the challenge to realize the required delay range. Furthermore, the l / Q demodulation might be implemented by extending it by a time-varying local oscillator (LO) signal per group to realize the dynamic delay, which is required for the second stage beamforming. This technique is referred to as “dynamic l / Q demodulation”. The output of the l / Q demodulated signals is then integrated on capacitor banks, similarly to the technique of the first stage beamformer, but due to the time-varying LO signal the sampling and integration becomes “non-equidistant”.

[0028] In an example, the ASIC is arranged for said second stage beamforming to utilize an l / Q demodulation scheme to generate one or more second stage beamformed signals, and preferably 2, 4, 8 or 16 parallel signals forwarded over a plurality of cables to the ultrasound system, wherein the number of cables corresponds with the number of beamformed signals, or more preferably, wherein the cables comprise differential pairs.

[0029] Typically, the Application Specific Integrated Circuit, ASIC, in the probe performs the first stage beamforming whereas the second stage beamforming is performed in the ultrasound system, or also referred to as the processing device to which the probe is attached and which typically may comprise input means such as a keyboard and mouse, and a screen to display the images onto. The ASIC according to the present disclosure, which is disposed in the probe, however is arranged and configured to perform both the first stage and the second stage beamforming.

[0030] In the first stage beamforming, the delay span is relatively low, considering typical group size of a 4x4 or 5x5 elements. The delay span for the second stage is however much larger, for example for 64x16 elements the delay span may not only be larger due to the larger number of elements but delay span is also defined by the pitch between the elements and hence, the area of the array. Applying the same technique of the first stage beamforming in the second stage would require a lot of capacitors. This is not practical as such many capacitors would not fit in the probe and in the ASIC currently available.

[0031] As such, the inventors, in a search for a suitable technique to apply the second stage beamforming in the ASIC, without requiring such many capacitors, found that l / Q demodulation could fulfil these requirements. With the l / Q demodulation, the signals are moved to the base band by demodulation and a low sampling resolution such as 200 ns would be sufficient for a center frequency of 5 MHz. Due to the reduced sampling rate, less power is required by the ASIC, which is also beneficial. With l / Q demodulation the output of the first stage beamformer is fed into the second stage beamformer and the output of the second stage beamformer consists of one I signal and one Q signal. In an example, there may be several pairs of I and Q signals, which may be forwarded to the ultrasound system over a corresponding number of cables, or double amount of cables in case of differential pairs. Such forwarding is beneficial or may be required for multi-line acquisition.

[0032] The ASIC is preferably configured to perform the second stage beamforming by demodulating the time signal, e.g. by multiplying it with a square wave for the I signal and a corresponding square wave which is shifted 90 degrees for the Q signal. After multiplication, the signals are integrated / written into a capacitor bank. Accordingly, the probe may comprise a capacitor bank, and preferably a capacitor bank with separate capacitors for the I and Q signals. Each group may have the same write pointers for the I and for the Q. As the capacitor banks may be shared for all groups, there may be one common read pointer for I and Q. The write and read pointers may come in pairs, for I and for Q, and are sampled together.

[0033] In an example the ASIC is arranged for applying a dynamic l / Q demodulation scheme to non-equidistant sampled l / Q demodulation data.

[0034] The ASIC may be configured for performing static receive (Rx) beamforming wherein the delays do not change as a function of time. Hence, a fixed demodulation frequency is used. However, according to a preferred embodiment or example of the present invention, the ASIC is configured to perform dynamic receive beamforming wherein the group delays are changed as a function of time of arrival and the focus is moved along the steering line. The ASIC is thus preferably configured for dynamic receive beamforming to allow for dynamic focus along the scanline.

[0035] The dynamic delays may be performed in accordance with one or more of the position of the group on the array, the steering angle of the scanline, the focal depth and number. The further the group is away from the center of the transducer, the larger the delay change may be. Hence, the delay may be configured in accordance with the distance between the group and center of the array. Other characteristics may also be applicable, for example, in the time domain, the delays may be determined based on one or more of the sound speed, the distance between the transducer elements, position of the transducer elements in the array. More in general, a specific implementation of dynamic delays may comprise (real-time) adjustment of the time delays to optimize the formation of the ultrasound beam and the resulting image, taking into account the characteristics as indicated above, and / or characteristics of the imaged tissue.

[0036] In an example the ASIC is arranged for applying said l / Q demodulation scheme to generate said analog second stage beamformed signal which is generated with a reduced sampling rate. The reduced sampling rate may be given by the signal bandwidth instead of the signal carrier frequency. Due to the use of l / Q demodulation and the signal being brought to baseband, a lower or reduced sampling rate is sufficient.

[0037] In an example the ASIC is arranged for applying said l / Q demodulation scheme to generate said analog second stage beamformed signal which is generated with a non-uniform sampling of said analog first stage beamformed signals of each group of elements.

[0038] In an example the ASIC comprises at least two capacitor banks, with separate capacitors allocated for the In-phase (I) signal and Quadrature (Q) signals of the second stage beamforming.

[0039] In an example the ASIC comprises a capacitor bank having a dedicated set of write pointers, one for the In-phase (I) signal and Quadrature (Q) signals from the second stage beamforming.

[0040] In an example the ASIC comprises a capacitor bank having common read pointers for the In-phase (I) signal and Quadrature (Q) signals from the second stage beamforming. The capacitor banks may have common read pointers with one write pointer per group signal and the l / Q thus may share the same control signals. In an example the ASIC may comprise a plurality of capacitor banks having a common read pointers for the In-phase (I) signal and Quadrature (Q) signals from the second stage beamforming.

[0041] The above-mentioned and other features and advantages of the invention are illustrated in the following description with reference to the enclosed drawings which are provided by way of illustration only and which are not limitative to the present invention.

[0042] Brief description of the Drawings

[0043] Fig. 1 shows an ultrasound imaging probe;

[0044] Fig. 2 shows a second stage beamformer according to the present disclosure;

[0045] Fig. 3 shows group center delta delays for an array of 64x16 elements;

[0046] Fig. 4 shows the square waves for one period of l / Q demodulation;

[0047] Fig. 5 shows a capacitor bank with read, write and clear event pointers;

[0048] Fig. 6a-e shows a second stage beamformer at t=10.5 ps;

[0049] Fig. 7a-d shows steps of a second stage beamformer.

[0050] Detailed Description

[0051] For a better understanding of the invention the like parts of the invention will be depicted with the same reference numerals.

[0052] Figure 1 illustrates an example of an ultrasound imaging probe (in particular the tip 100 of the probe). The probe 100 is a miniaturized 2D, or 3D ultrasound imaging probe for example designed for transesophageal echocardiography, TEE application. The ultrasound imaging probe 100 may be used for an application in which it is placed directly on the skin, but it may also be designed for use inside a body opening. With the probe and the processing and / or viewing device to which the probe is connected, images can be obtained of internal body structures. The probe is thus typically connected to a device or also referred to as an ultrasound machine, which processes the received signals and creates the resulting images. There are various types of ultrasound probes, each with its own specialty and design, such as linear probes, and 2D array probes.

[0053] In an ultrasound imaging probe 100 several typical components can be distinguished, include the housing of the tip 120, the array of transducer elements 123, the ASIC (Application-Specific Integrated Circuit) 122, and a PCB (Printed Circuit Board) 121 to connect the ASIC and connect with a plurality of coaxial cables 130 to provide the signals to the ultrasound machine (not shown but connected at the distal end of the cable 110). The housing of the tip 120 is the part of the probe that comes into contact with the patient's skin or body opening. The matrix or array of transducer elements 123 is the part of the probe that emits and receives ultrasound waves. The ASIC 122 is a specialized integrated circuit that processes the signals received by the transducer arrays. The PCB 123 is a board that connects the ASIC and the transducer arrays and provides the signals to the ultrasound machine.

[0054] The array 123 typically consists of a matrix of numerous individual transducer elements, e.g. piezo elements or MUTs (Micromachined Ultrasonic Transducers). As the probe 100 may be inserted through the mouth and down the esophagus, its construction needs to be flexible and limited in dimensional diameter. The cable can only contain about limited number of wires for connection of the transducer as more wires would decrease the flexibility and dimension in such a way that the probe is hard to operate and uncomfortable for the patient.

[0055] The elements of an ASIC 122 may be combined into groups of for example 4x4 or 5x5 elements to reduce cable 130 count. Delay-and-sum may be applied within each group separately - also referred to as first stage beamforming.

[0056] The delay span of the second stage beamformer is much larger than the first stage beamformer (for example, a span over 64x16 elements for the complete array versus 4x4 or 5x5 elements for one group). If the second stage beamformer would be implemented in a similar manner as a typical first stage beamformer, a lot of capacitors would be needed. This would not fit into ASICs currently available. The ASIC of the present disclosure implements l / Q demodulation as part of the second stage beamformer. Since signals are moved to base band by demodulation, a sampling rate of 200 ns may be sufficient for a center frequency of 5 MHz (compared to 40 ns, which is typically used for the first stage). Furthermore, the reduced sampling rate decreases power consumption in the ASIC.

[0057] First, the architecture of the second stage beamformer is explained in the paragraph below and in reference to Figure 2. The l / Q demodulation, which is used within the beamformer, is explained below. Whereas the first stage beamformer has static delays, but may also have dynamic delays, the second stage beamformer may use dynamic delays which change as a function of time.

[0058] The architecture of the second stage beamformer according to an example of the present disclosure is shown in Figure 2. The group outputs of the first stage beamformer are fed into the second stage beamformer. The output of the second stage beamformer comprises one I signal and one Q signal.

[0059] The following steps may be performed in the second stage beamformer:

[0060] Time signal is l / Q demodulated by multiplication with a square wave (for I) and a square wave 90° shifted (for Q). Alternatively, also a sinusoidal wave may be used. The period of the square wave may be 200 ns. After multiplication, the I and Q signals are integrated for low-pass filtering. The integration period may be 200 ns.

[0061] The integrated signals may be written into a capacitor bank; there may be separate banks for I and for Q. Each group may has one common write pointer for I and for Q.

[0062] Since the capacitor banks may be shared for all groups, there may be one common read pointer for I and for Q. The read pointers may move each 200 ns to the next capacitor.

[0063] Note that a pair of the write pointers and read pointers: for I and Q.

[0064] In this example, a period of 200 ns is taken (integration period and sampling resolution). For the ASIC of the probe of the present disclosure, several possibilities for the l / Q periods may be selected, including a 200 ns full period, corresponding 5 MHz l / Q frequency, and 175 ns reduced period. The full period and corresponding l / Q frequency are the l / Q demodulation period and sampling rate, whereas the reduced period is used for dynamic receive beamforming.

[0065] For static receive beamforming (in which the delays do not change as a function of time), a fixed demodulation frequency is used, although the control signals may still not be the same as an initial phase rotation may be required for delay resolution < sampling time. In this example, the input signal is multiplied by a square wave of 5 MHz to obtain I and multiplied by the same square wave but 90° phase shifted to obtain Q. Since the signal is brought to baseband, a lower sampling rate is sufficient. The signal is integrated over 200 ns and stored in the sampling capacitors. The signal is read from the sampling capacitors with the same rate of 200 ns. The time offset between the write pointer (might be at a different position for each group) and the read pointer (one shared pointer for all groups) defines the delay for each group.

[0066] For ultrasound, the signal is first demodulated (i.e. the carrier frequency is removed). The beamformed l / Q signal can directly be shown as a B-mode image by plotting the envelope: E(t) = sqrt(l(t)A2 + Q(t)A2). Alternatively, the beamformed l / Q signal could be modulated to reobtain a signal in the time domain.

[0067] Static receive beamforming means that for each steering angle, only one focal point can be chosen. On top of the static beamforming as explained in the previous section, dynamic receive beamforming may be applied.

[0068] For dynamic receive beamforming, the focus is moved along the steering line. The group delays change as a function of time of arrival. The further the group is from the center of the transducer, the larger the delay change (as shown in Figure 3 shown group center delays for an array of 64x16 elements, steering (0°,0°)).

[0069] For the known ultrasound probes, this dynamic beamforming is applied in the ultrasound system. Putting this second stage beamformer in accordance with the present disclosure into the ASIC is favorable since it reduces the cable count. Furthermore, digitization of the signal (in the system) takes less effort since the sampling rate is reduced. A novelty of the second stage beamformer is the varying mixing period and integration period, which correlates to the group delay (dynamic - changes as a function of time).

[0070] The time difference between the write pointer and the read pointer defines the delay. The delay is the sum of a static part (the delays at infinity) and a dynamic part (the so-called delta delays). As seen in Figure 3, the delta delays get closer and closer to 0 as distance (thus time of arrival) advances. The (virtual) center of the array, where the scanline has its origin, has per definition 0 ns delay all over the distance. In the case where the origin is defined underneath the array (virtual origin), the virtual center of the array moves with the steering angle. The write pointers of the non-center groups must catch up with the write pointer of the center group, until the distances between the write pointers get constant (delta delays 0). This is implemented as a varying demodulation / integration time. The center write pointer moves to the next capacitor each 200 ns. The write pointers for the groups outside the center move to the next capacitor each 175 ns or 200 ns dynamically — each time that 175 ns is applied, the pointer catches up a bit with the center write pointer, thus changing the delay in Figure 3 by one 25 ns step. The square waves for demodulation are shown in Figure 4.

[0071] Note that due to the varying demodulation frequency, the resulting frequency of the beamformed signal might be slightly different per group and as a function of depth. This may also be the case for traditional delay-and-sum beamforming, where the time axis is stretched as a function of depth, resulting also into a frequency shift as a function of depth.

[0072] The capacitor bank is schematically shown in Figure 5. In the example shown, there are 48 capacitors in a row. The capacitors are cyclic - after the last capacitor, the pointers move to the first capacitor again. Two write pointers are shown: one for a center group (Wc) and one for a group at the side (Ws). In the example, there are 64 write pointers per ASIC; one for each group. There are two capacitor banks - one for I and one for Q. The write and read pointers are linked; they are at the same position in the I bank and the Q bank. Per group, the two outputs of the I and Q integrators are connected to the I and the Q write pointer. The write pointers move to the next capacitor after the integration period has elapsed (thus after 200 ns or 175 ns). The read pointer is shared for all groups and moves equidistantly every 200 ns to the next capacitor. The delay for a certain group is given by the distance between the write pointer (W) and the read pointer (R). After reading, the capacitor is cleared (CLR).

[0073] In conclusion, all groups, e.g. 64 in the example shown, may write to a shared capacitor bank (I and Q separately). There is one read pointer which gives the beamformed signal (I and Q separately).

[0074] An example of the second stage beamformer, for various travel times, is given in Figure 6, and explained in the next paragraphs.

[0075] The array is indicated in Fig 6a by a black line. The black stripes below the array are the groups including delays. The tilt of the lines is given by the micro-delays, whereas the vertical offsets between the groups match with the group delays.

[0076] The focal point is indicated by a circle, which moves as a function of time. When time is advancing, the curvature of the groups gets flatter. The green line indicates the receive line from the focal point to a group in the center, whereas the blue line indicates the line to a side group.

[0077] The second subfigure 6b indicates the delay which is applied to the center (green) and the side (blue) group, as a function of time. This time correlates with the offset of the group as indicated in the first subfigure. As time advances, the difference in travel time between the side and center group get smaller, which means the delays go towards zero.

[0078] The third subfigure 6c indicates the capacitor number where the I and Q signals are stored (write pointers), for both the center group (green) and the side group (blue). It is observed that that blue line gets closer to the green line as time advances. The fourth subfigure 6d indicates the integration time; during this time the write pointer is connected to one capacitor before moving to the next one. There are two choices for the integration time: the “normal” integration time (in this example 200 ns, thus 5 MHz) and the “reduced” integration time which is 1 / 8 lower (in this example 175 ns).

[0079] There are two separate capacitor banks for the I and Q signals, but for simplicity only one bank is shown in Figure 6e. Note that the 48 capacitors are cyclic, the capacitor next to the outermost right capacitor is the first capacitor again. In subfigure 6c, the capacitor number is just increasing; in reality, the modulo 48 must be taken. The maximum delay which the second stage beam former can handle is 46 200 ns = 9.2 ps.

[0080] Like for the first stage beamformer, there is a read pointer and a clear event. They are indicated by the red arrow and grey block respectively. The write pointers of the center group and side group are indicated by Wc and Ws. The delay of a certain group is defined as the distance between the write pointer and the read pointer. The center group does not have any delay; the integration time stays constant at 200 ns. The side group has a delay which decreases as a function of time. This delay change is implemented as a shorter integration period. Since only two values are possible for the integration period, the integration period is alternating between 200 and 175 ns. The slope of the delay as a function of time gets smaller as time advances. This is observed in Figure 6d, where the 175 ns integration periods occur less and less often as time advances.

[0081] When the integration period for the side group is 175 ns, the write pointer Ws moves 25 ns faster than Wc - the write pointer Ws is thus catching up with Wc as time advances. At focus infinity, the write pointers Ws and Wc are writing to the same capacitor - meaning no group delay.

[0082] This example shows only two write pointers, but there are 64 write pointers per bank for one ASIC - one for each group, at least in this example, but the number of groups may also be different, e.g. 4, 8, 16, 32, 128, 256, etc. In Figure 7, the steps for dynamic l / Q beamforming are explained in more detail. A part of the time scale in Figure 6a-e is explained in more detail.

[0083] The modulation period and integration period correlates to the group delay and may vary between 200 ns and 175 ns. In Figure 7, the subsequent periods are indicated by the shaded bars. The 200 ns and 175 ns periods are indicated by the colors red and blue respectively.

[0084] In Figure 7 a, the input to the second stage beamformer is shown for one group. For simplicity, a continuous sine wave of 5 MHz is assumed. The frequency for l / Q demodulation and integration is also set to 200 ns, which matches to the 5 MHz center frequency.

[0085] In Figure 7 b, the modulation square wave for I is shown (for Q the signal is 90° shifted, but not included in the figure for simplicity). The period of the square wave is either 200 ns or 175 ns as indicated by the color of the bars.

[0086] In Figure 7 c, the resulting I signal is shown - this is a multiplication of the input signal in (a) and the square wave in (b).

[0087] Finally, in Figure d, the I signal is shown after integration over 200 ns or 175 ns periods. Each shaded bar corresponds to a position of the write pointer Ws. The Ws pointer thus moves after either 200 ns or 175 ns to the next capacitor. The read pointer R moves always after 200 ns to the next capacitor for reading - in this way dynamic receive group delay is applied.

[0088] With the second stage beamformer of the present disclosure a beamformed I and Q signal is obtained. By l / Q demodulation, the second stage beamforming assumes a time-continuous signal. Although there may be a first stage beamformer, sampling the signal at 25 MHz, eq. 40 ns, the signal may be treated as time- continuous. For the second stage beamformer, less capacitors are needed than without l / Q demodulation and a courser integration time saves power for the receive clock. The second stage beamformer is typically within the ultrasound system, but according to the present disclosure it is implemented in the ASIC itself. The second stage beamformer combines the group outputs of the first stage into a beamformed output. A distinguishing feature is that the dynamic receive group delays are implemented in the l / Q domain. The I and Q signals of the groups are written into capacitor banks, with a course time resolution and non-obvious phase rotation since the signals are shifted to baseband in the frequency domain. The dynamic delay is implemented by varying the l / Q demodulation period and integration period which results in a time-shift on a 200 ns basis and a phase rotation for sub-200 ns resolution. The outputs of the second stage beamformer are a beamformed I signal and a beamformed Q signal, which are read from the capacitor banks with a time resolution of 200 ns.

[0089] Based on the above description, a skilled person may provide modifications and additions to the method and arrangement disclosed, which modifications and additions are all comprised by the scope of the appended claims.

Claims

CLAIMS1. An ultrasound imaging probe arranged to perform receive beamforming operation from ultrasound signals received by said probe, wherein said probe comprises: a two-dimensional array of transducer elements wherein said elements are arranged to receive said ultrasound signals; an Application Specific Integrated Circuit, ASIC, in electric connection with said two-dimensional array for receiving said ultrasound signals, and wherein said ASIC is configured to perform beamforming on said received signals; wherein said array of transducer elements is arranged in a plurality of groups of transducer elements; wherein said ASIC is arranged for performing a first stage beamforming on each of said plurality of groups, to generate a first stage beamformed signal for a respective group; wherein said ASIC is arranged for performing a second stage beamforming on each of said plurality groups, to generate a second stage beamformed signal for forwarding said second stage beamformed signals; and wherein both said first and second stage beamforming are performed in the analog domain, for generating an analog first stage beamformed signal and analog second stage beamformed signal, respectively for forwarding to an ultrasound system for being further processed and / or being displayed.

2. The ultrasound imaging probe according to claim 1 , wherein the second stage beamforming comprises a dynamic delay mechanism, wherein the delay for each group of transducer elements is dynamically adjusted as a function of time of arrival of the received ultrasound signals.

3. The ultrasound imaging probe according to claim 1 , wherein said ASIC is arranged for said second stage beamforming to utilize an l / Q demodulation scheme to generate one or more second stage beamformed signals, and preferably 2, 4, 8 or 16 parallel signals forwarded over a plurality of cables to the ultrasound system.

4. The ultrasound imaging probe according to any of the previous claims, wherein said ASIC is arranged for applying a dynamic l / Q demodulation scheme to non- equidistant sampled l / Q demodulation data.

5. The ultrasound imaging probe according to any of the previous claims, wherein said ASIC is arranged for applying said l / Q demodulation scheme to generate said analog second stage beamformed signal which is generated with a reduced sampling rate.

6. The ultrasound imaging probe according to any of the previous claims, wherein said ASIC is arranged for applying said l / Q demodulation scheme to generate said analog second stage beamformed signal which is generated with a non-uniform sampling of said analog first stage beamformed signals of each group of elements.

7. The ultrasound imaging probe according to any of the previous claims, wherein said ASIC comprises two capacitor banks, with separate capacitors allocated for the In-phase (I) signal and Quadrature (Q) signals of the second stage beamforming.

8. The ultrasound imaging probe according to any of the previous claims, wherein said ASIC comprises a capacitor bank having a dedicated set of write pointers, one of the In-phase (I) signal and Quadrature (Q) signals from the second stage beamforming.

9. The ultrasound imaging probe according to any of the previous claims, wherein said ASIC comprises a capacitor bank having common read pointers for the In-phase (I) signal and Quadrature (Q) signals from the second stage beamforming.

10. The ultrasound imaging probe according to any of the previous claims, wherein said ASIC comprises a plurality of capacitor banks having a common read pointers for the In-phase (I) signal and Quadrature (Q) signals from the second stage beamforming.

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