Semiconductor device

Abstract

Provided is a semiconductor device which has excellent electrical properties. The present invention includes: a first insulator; an oxide semiconductor on the first insulator; a first conductor and a second conductor which are spaced apart from each other on the oxide semiconductor; a second insulator which is disposed on the first conductor and the second conductor and has an opening overlapping a region between the first conductor and the second conductor; a third insulator which is disposed in the opening and is in contact with a top surface of the oxide semiconductor, a side surface of the first conductor, a side surface of the second conductor, and a side surface of the second insulator; and a third conductor that is disposed on the third insulator in the opening and has a region overlapping the oxide semiconductor via the third insulator. The oxide semiconductor has indium, the first insulator has a silicon oxide film, and the silicon oxide film has nitrogen dioxide.

Description

Semiconductor Devices

[0001] One embodiment of the present invention relates to a semiconductor device, a memory device, and an electronic device each including an oxide semiconductor. Another embodiment of the present invention relates to a method for manufacturing the semiconductor device.

[0002] One embodiment of the present invention is not limited to the above technical field, and examples of the technical field of one embodiment of the present invention include semiconductor devices, display devices, light-emitting devices, power storage devices, memory devices, electronic devices, lighting devices, input devices (e.g., touch sensors), input / output devices (e.g., touch panels), driving methods thereof, and manufacturing methods thereof.

[0003] In this specification and the like, a semiconductor device refers to any device that can function by utilizing semiconductor characteristics. Semiconductor elements such as transistors, as well as semiconductor circuits, arithmetic devices, and memory devices are all embodiments of semiconductor devices. Display devices (such as liquid crystal display devices and light-emitting display devices), projection devices, lighting devices, electro-optical devices, power storage devices, memory devices, semiconductor circuits, imaging devices, electronic devices, and the like may be considered to include semiconductor devices.

[0004] In recent years, the development of semiconductor devices has progressed, and semiconductor devices mainly use LSIs (Large Scale Integration), CPUs (Central Processing Units), memories, etc. A CPU is an aggregate of semiconductor elements that have semiconductor integrated circuits (at least transistors and memories) formed into chips by processing a semiconductor wafer and on which electrodes serving as connection terminals are formed.

[0005] 2. Description of the Related Art Semiconductor circuits (IC chips) such as LSIs, CPUs, and memories are mounted on circuit boards, such as printed wiring boards, and are used as components of various electronic devices.

[0006] Furthermore, a technology for constructing a transistor using a semiconductor thin film formed on a substrate having an insulating surface has attracted attention. Such transistors are widely applied to electronic devices such as integrated circuits (ICs) and image display devices (also simply referred to as display devices). While silicon-based semiconductor materials are widely known as semiconductor thin films applicable to transistors, oxide semiconductors have also attracted attention as other materials.

[0007] Furthermore, it is known that a transistor using an oxide semiconductor has an extremely small leakage current in a non-conducting state. For example, Patent Document 1 discloses a CPU with low power consumption that utilizes the property of a transistor using an oxide semiconductor having a small leakage current. Furthermore, Patent Document 2 discloses a memory device that can retain stored data for a long period of time by utilizing the property of a transistor using an oxide semiconductor having a small leakage current.

[0008] JP 2012-257187 A JP 2011-151383 A

[0009] An object of one embodiment of the present invention is to provide a semiconductor device having favorable electrical characteristics. Another object of one embodiment of the present invention is to provide a semiconductor device with high field-effect mobility. Another object of one embodiment of the present invention is to provide a highly reliable semiconductor device. Another object of one embodiment of the present invention is to provide a semiconductor device that can be miniaturized or highly integrated. Another object of one embodiment of the present invention is to provide a semiconductor device with high operating speed. Another object of one embodiment of the present invention is to provide a semiconductor device with low power consumption. Another object of one embodiment of the present invention is to provide a semiconductor device in which variation in electrical characteristics of transistors is small. Another object of one embodiment of the present invention is to provide a novel semiconductor device. Another object of one embodiment of the present invention is to provide a method for manufacturing a semiconductor device with high productivity. Another object of one embodiment of the present invention is to provide a method for manufacturing a novel semiconductor device.

[0010] Note that the description of these problems does not preclude the existence of other problems. One embodiment of the present invention does not necessarily have to solve all of these problems. Problems other than these can be extracted from the description in the specification, drawings, and claims.

[0011] One embodiment of the present invention is a semiconductor device including: a first insulator; an oxide semiconductor over the first insulator; a first conductor and a second conductor that are spaced apart from each other and are over the oxide semiconductor; a second insulator that is disposed over the first conductor and the second conductor and has an opening that overlaps with a region between the first conductor and the second conductor; a third insulator that is disposed in the opening and is in contact with a top surface of the oxide semiconductor, a side surface of the first conductor, a side surface of the second conductor, and a side surface of the second insulator; and a third conductor that is disposed on the third insulator in the opening and has a region that overlaps with the oxide semiconductor with the third insulator interposed therebetween. The oxide semiconductor includes indium. The first insulator includes a silicon oxide film, and the silicon oxide film includes nitrogen dioxide.

[0012] In the semiconductor device, it is preferable that the nitrogen dioxide is not bonded to the silicon dioxide contained in the silicon oxide film.

[0013] In the semiconductor device, one of the transition levels of nitrogen dioxide in the first insulator is preferably higher than the upper edge of the valence band of the oxide semiconductor and lower than the lower edge of the conduction band of the oxide semiconductor.

[0014] In the above semiconductor device, it is preferable that the oxide semiconductor include a first layer and a second layer over the first layer, the first layer contain indium, the second layer contain indium, gallium, zinc, and oxygen, and the indium content in the first layer be higher than the indium content in the second layer.

[0015] In the above semiconductor device, it is preferable that the second layer is divided into a third layer located below the first conductor and a fourth layer located below the second conductor.

[0016] Furthermore, in the above-mentioned semiconductor device, it is preferable that the side of the third layer facing the third conductor is positioned recessed from the side of the first conductor facing the third conductor, and the side of the fourth layer facing the third conductor is positioned recessed from the side of the second conductor facing the third conductor.

[0017] In the above semiconductor device, it is preferable that the third insulator have a stacked-layer structure, and a layer of the third insulator in contact with the oxide semiconductor contains hafnium oxide.

[0018] In the above semiconductor device, it is preferable that an oxide layer be included between the oxide semiconductor and the first insulator, and the oxide layer contain yttrium, zirconium, and oxygen.

[0019] Another aspect of the present invention provides a semiconductor device including: a first insulator; an oxide semiconductor on the first insulator; a first conductor and a second conductor spaced apart from each other on the oxide semiconductor; a second insulator disposed on the first conductor and the second conductor and having an opening overlapping with a region between the first conductor and the second conductor; a third insulator disposed in the opening and in contact with a top surface of the oxide semiconductor, a side surface of the first conductor, and a side surface of the second conductor; a fourth insulator disposed between the second insulator and the third insulator in the opening; and a third conductor disposed on the third insulator in the opening and having a region overlapping with the oxide semiconductor via the third insulator. the oxide semiconductor includes indium; the first insulator includes a silicon oxide film that includes nitrogen dioxide; the first conductor and the second conductor each include a first conductive layer and a second conductive layer on the first conductive layer, wherein the shortest distance between the first conductive layer of the first conductor and the first conductive layer of the second conductor is smaller than the shortest distance between the second conductive layer of the first conductor and the second conductive layer of the second conductor; and the fourth insulator is in contact with a top surface of the first conductive layer of the first conductor, a side surface of the second conductive layer of the first conductor, a top surface of the first conductive layer of the second conductor, and a side surface of the second conductive layer of the second conductor.

[0020] In the semiconductor device, it is preferable that the nitrogen dioxide is not bonded to the silicon dioxide contained in the silicon oxide film.

[0021] In the semiconductor device, one of the transition levels of nitrogen dioxide in the first insulator is preferably higher than the upper edge of the valence band of the oxide semiconductor and lower than the lower edge of the conduction band of the oxide semiconductor.

[0022] In the above semiconductor device, it is preferable that the oxide semiconductor include a first layer and a second layer over the first layer, the first layer contain indium, the second layer contain indium, gallium, zinc, and oxygen, and the indium content in the first layer be higher than the indium content in the second layer.

[0023] Furthermore, in the above semiconductor device, it is preferable that the second layer is divided into a third layer located below the first conductive layer of the first conductor and a fourth layer located below the first conductive layer of the second conductor.

[0024] Furthermore, in the above-mentioned semiconductor device, it is preferable that the side of the third layer facing the third conductor is positioned recessed from the side of the first conductive layer of the first conductor facing the third conductor, and the side of the fourth layer facing the third conductor is positioned recessed from the side of the first conductive layer of the second conductor facing the third conductor.

[0025] In the above semiconductor device, it is preferable that the third insulator have a stacked-layer structure, and a layer of the third insulator in contact with the oxide semiconductor contains hafnium oxide.

[0026] In the above semiconductor device, it is preferable that an oxide layer be included between the oxide semiconductor and the first insulator, and the oxide layer contain yttrium, zirconium, and oxygen.

[0027] According to one embodiment of the present invention, a semiconductor device having favorable electrical characteristics can be provided. According to one embodiment of the present invention, a semiconductor device having high field-effect mobility can be provided. According to one embodiment of the present invention, a highly reliable semiconductor device can be provided. According to one embodiment of the present invention, a semiconductor device that can be miniaturized or highly integrated can be provided. According to one embodiment of the present invention, a semiconductor device having high operating speed can be provided. According to one embodiment of the present invention, a semiconductor device with low power consumption can be provided. According to one embodiment of the present invention, a semiconductor device with little variation in electrical characteristics of transistors can be provided. According to one embodiment of the present invention, a novel semiconductor device can be provided. According to one embodiment of the present invention, a method for manufacturing a semiconductor device with high productivity can be provided. According to one embodiment of the present invention, a novel semiconductor device can be provided. According to one embodiment of the present invention, a novel display device can be provided.

[0028] Note that the description of these effects does not preclude the existence of other effects. One embodiment of the present invention does not necessarily have all of these effects. Effects other than these can be extracted from the description in the specification, drawings, and claims.

[0029] FIG. 1A is a schematic diagram showing an example of a semiconductor device. FIG. 1B is a calculation model related to the semiconductor device. FIG. 2 is a band diagram related to the semiconductor device. FIG. 3A is a plan view showing an example of a semiconductor device. FIGS. 3B to 3D are cross-sectional views showing an example of a semiconductor device. FIGS. 4A and 4B are cross-sectional views showing an example of a semiconductor device. FIGS. 5A to 5C are cross-sectional views showing an example of a semiconductor device. FIG. 6A is a plan view showing an example of a semiconductor device. FIGS. 6B to 6D are cross-sectional views showing an example of a semiconductor device. FIGS. 7A to 7C are cross-sectional views showing an example of a semiconductor device. FIG. 8 is a cross-sectional view showing an example of a semiconductor device. FIGS. 9A to 9C are cross-sectional views showing an example of a semiconductor device. FIGS. 10A to 10E are cross-sectional views showing an example of a semiconductor device. FIG. 11A is a plan view showing an example of a semiconductor device. FIGS. 11B to 11D are cross-sectional views showing an example of a semiconductor device. FIG. 12 is a cross-sectional view showing an example of a semiconductor device. FIG. 13A is a plan view showing an example of a semiconductor device. FIGS. 13B to 13D are cross-sectional views showing an example of a semiconductor device. FIG. 14A is a plan view showing an example of a semiconductor device. 14B to 14D are cross-sectional views showing an example of a semiconductor device. FIG. 15A is a plan view showing an example of a semiconductor device. FIGS. 15B to 15D are cross-sectional views showing an example of a semiconductor device. FIG. 16A is a plan view showing an example of a semiconductor device. FIGS. 16B to 16D are cross-sectional views showing an example of a semiconductor device. FIGS. 17A to 17C are cross-sectional views showing an example of a semiconductor device. FIGS. 18A to 18C are cross-sectional views showing an example of a semiconductor device. FIGS. 19A to 19C are cross-sectional views showing an example of a semiconductor device. FIGS. 20A to 20C are cross-sectional views showing an example of a semiconductor device. FIGS. 21A to 21C are cross-sectional views showing an example of a semiconductor device. FIGS. 22A to 22C are cross-sectional views showing an example of a semiconductor device. FIG. 23A is a plan view showing an example of a semiconductor device. FIGS. 23B to 23D are cross-sectional views showing an example of a semiconductor device. FIGS. 24A and 24B are cross-sectional views showing an example of a semiconductor device. FIG. 25A is a plan view showing an example of a manufacturing method of a semiconductor device. 25B to 25D are cross-sectional views showing an example of a method for manufacturing a semiconductor device.FIG. 26A is a plan view illustrating an example of a method for manufacturing a semiconductor device. FIGS. 26B to 26D are cross-sectional views illustrating an example of a method for manufacturing a semiconductor device. FIG. 27A is a plan view illustrating an example of a method for manufacturing a semiconductor device. FIGS. 27B to 27D are cross-sectional views illustrating an example of a method for manufacturing a semiconductor device. FIG. 28A is a plan view illustrating an example of a method for manufacturing a semiconductor device. FIGS. 28B to 28D are cross-sectional views illustrating an example of a method for manufacturing a semiconductor device. FIG. 29A is a plan view illustrating an example of a method for manufacturing a semiconductor device. FIGS. 29B to 29D are cross-sectional views illustrating an example of a method for manufacturing a semiconductor device. FIGS. 30A1 to 30D2 are cross-sectional views illustrating an example of a method for manufacturing a semiconductor device. FIG. 31A is a plan view illustrating an example of a method for manufacturing a semiconductor device. FIGS. 31B to 31D are cross-sectional views illustrating an example of a method for manufacturing a semiconductor device. FIG. 32A is a plan view illustrating an example of a method for manufacturing a semiconductor device. FIGS. 32B to 32D are cross-sectional views illustrating an example of a method for manufacturing a semiconductor device. FIG. 33A is a plan view illustrating an example of a method for manufacturing a semiconductor device. 33B to 33D are cross-sectional views illustrating an example of a manufacturing method of a semiconductor device. FIGS. 34A1 to 34B2 are cross-sectional views illustrating an example of a manufacturing method of a semiconductor device. FIGS. 35A1 to 35B2 are cross-sectional views illustrating an example of a manufacturing method of a semiconductor device. FIG. 36 is a block diagram illustrating a configuration example of a semiconductor device. FIGS. 37A to 37H are diagrams illustrating an example of a circuit configuration of a memory cell. FIG. 38 is a cross-sectional view illustrating an example of a semiconductor device. FIGS. 39A and 39B are perspective views illustrating an example of a configuration of a semiconductor device. FIG. 40 is a cross-sectional view illustrating an example of a semiconductor device. FIG. 41 is a cross-sectional view illustrating an example of a semiconductor device. FIG. 42 is a block diagram illustrating a CPU. FIGS. 43A and 43B are perspective views of a semiconductor device. FIGS. 44A and 44B are perspective views of a semiconductor device. FIGS. 45A and 45B are diagrams illustrating various memory devices by layer. FIGS. 46A and 46B are diagrams illustrating an example of electronic equipment, and FIGS. 46C to 46E are diagrams illustrating an example of a mainframe computer. FIG. 47 is a diagram illustrating an example of space equipment. Fig. 48 is a diagram showing an example of a storage system applicable to a data center. Fig. 49A and Fig. 49B are configuration examples of a display device.Fig. 50 is a configuration example of a display device. Fig. 51 is a configuration example of a display device. Fig. 52 is a configuration example of a display device. Figs. 53A to 53D are configuration examples of a display device. Figs. 54A and 54B are configuration examples of a display device. Figs. 55A and 55B are diagrams for explaining a configuration example of a display device. Figs. 56A to 56D are diagrams for explaining a configuration example of a display device. Figs. 57A to 57D are diagrams for explaining a configuration example of a display device. Fig. 58 is a diagram for explaining a configuration example of a display device. Figs. 59A to 59F are configuration examples of electronic devices. Figs. 60A to 60F are configuration examples of electronic devices. Figs. 61A to 61G are configuration examples of electronic devices.

[0030] The embodiments will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and it will be readily understood by those skilled in the art that various changes can be made in form and detail without departing from the spirit and scope of the present invention. Therefore, the present invention should not be interpreted as being limited to the description of the embodiments shown below.

[0031] In the configuration of the invention described below, the same parts or parts having similar functions are denoted by the same reference numerals in different drawings, and repeated explanations thereof will be omitted. Furthermore, when referring to similar functions, the same hatching pattern may be used and no particular reference numeral may be assigned.

[0032] Furthermore, for ease of understanding, the position, size, range, etc. of each component shown in the drawings may not represent the actual position, size, range, etc. Therefore, the disclosed invention is not necessarily limited to the position, size, range, etc. disclosed in the drawings.

[0033] In this specification, the ordinal numbers "first" and "second" are used for convenience and do not limit the number of components or the order of the components (for example, the order of processes or the order of stacking). Furthermore, the ordinal numbers assigned to components in one part of this specification may not match the ordinal numbers assigned to the same components in other parts of this specification or in the claims.

[0034] Note that the terms "film" and "layer" can be interchanged in some cases or depending on the situation. For example, the term "conductive layer" can be interchanged with the term "conductive film." The term "insulating film" can be interchanged with the term "insulating layer." The term "oxide semiconductor film" can be interchanged with the term "oxide semiconductor layer." The term "conductor" can be interchanged with the term "conductive layer" or the term "conductive film" in some cases or depending on the situation. The term "insulator" can be interchanged with the term "insulating layer" or the term "insulating film" in some cases or depending on the situation. The term "oxide semiconductor" can be interchanged with the term "oxide semiconductor layer" or the term "oxide semiconductor film" in some cases or depending on the situation.

[0035] Furthermore, in this specification, "parallel" refers to a state in which two straight lines are arranged at an angle of -10 degrees or more and 10 degrees or less. Therefore, it also includes cases where the angle is -5 degrees or more and 5 degrees or less. Furthermore, "substantially parallel" refers to a state in which two straight lines are arranged at an angle of -20 degrees or more and 20 degrees or less. Furthermore, "perpendicular" refers to a state in which two straight lines are arranged at an angle of 80 degrees or more and 100 degrees or less. Therefore, it also includes cases where the angle is 85 degrees or more and 95 degrees or less. Furthermore, "substantially perpendicular" refers to a state in which two straight lines are arranged at an angle of 70 degrees or more and 110 degrees or less.

[0036] The openings include, for example, grooves, slits, etc. Furthermore, the area in which the openings are formed may be referred to as an opening portion.

[0037] Furthermore, in the drawings used in this specification and the like, the sidewalls of the insulator at the openings in the insulator are shown as being perpendicular or approximately perpendicular to the substrate surface or the surface on which the film is formed, but they may also be tapered.

[0038] In this specification, a tapered shape refers to a shape in which at least a portion of the side of the structure is inclined relative to the substrate surface or the surface on which the structure is to be formed. For example, it is preferable to have a region in which the angle between the inclined side and the substrate surface or the surface on which the structure is to be formed (hereinafter, sometimes referred to as the taper angle) is less than 90°. The side of the structure and the substrate surface do not necessarily need to be completely flat, but may be approximately planar with a slight curvature or approximately planar with a slight unevenness.

[0039] In this specification and the like, a transistor using an oxide semiconductor or a metal oxide for a semiconductor layer and a transistor having an oxide semiconductor or a metal oxide for a channel formation region may be referred to as an OS transistor. A transistor having silicon for a channel formation region may be referred to as a Si transistor.

[0040] Embodiment 1 In this embodiment, a semiconductor device including an oxide semiconductor and a manufacturing method of the semiconductor device will be described with reference to FIGS. 1A to 35B2.

[0041] First, an OS transistor according to one embodiment of the present invention will be described with reference to a schematic diagram shown in FIG. 1A. FIG. 1A is a schematic diagram illustrating the vicinity of a channel formation region of an OS transistor. As shown in FIG. 1A, an insulator 250 is provided between an oxide semiconductor 230 and a conductor 260. An insulator 224 is provided to face the insulator 250 with the oxide semiconductor 230 interposed therebetween.

[0042] The oxide semiconductor 230 has a region that functions as a channel formation region. The oxide semiconductor 230 is preferably formed using a metal oxide containing indium. For example, indium oxide (also referred to as In oxide or IO), In—Ga oxide, In—Zn oxide, or In—Ga—Zn oxide can be used. The conductor 260 functions as a gate electrode of the OS transistor. The insulator 250 functions as a gate insulator of the OS transistor. The insulator 224 preferably functions as a base film for the oxide semiconductor 230, and can be formed using, for example, silicon oxide or silicon oxynitride. Note that the detailed structures of the oxide semiconductor 230, the conductor 260, the insulator 250, and the insulator 224 can be referred to in the later description.

[0043] 1A, the insulator 224 includes impurities 220. When the insulator 224 includes silicon oxide or silicon oxynitride, the impurities 220 preferably include nitrogen. For example, the impurities 220 may include nitrogen dioxide (NO ２ That is, nitrogen dioxide is contained in the silicon oxide film or the silicon oxynitride film.

[0044] Here, NO in silicon oxide ２ The results of calculations of the transition level of the charge state of the model by first-principles calculations will be described below. The calculations were performed using SiO with a low-temperature quartz (α-quartz) crystal structure as shown in FIG. 1B. ２ (c-SiO ２ ) was used as a model. In this model, NO is interstitially ２ (hereinafter referred to as NO ２ It is sometimes called a model.) For comparison, NO, N ２ O, O, O ２ Calculations were also carried out for a model incorporating

[0045] NO ２ In the model, structural optimization calculations were performed for the state where the charge of the system was +1, the state where the charge of the system was 0, and the state where the charge of the system was -1. ２The change in the structure of the NO molecule was almost equivalent to the change in bond angle when the charge number of an isolated molecule in the gas phase was changed. ２ is responsible for the formation of the silicon dioxide (SiO ２ ) in NO ２ It is presumed that SiO exists in a state close to an isolated molecule. ２ NO not bound to ２ The NO in the insulator 224 ２ is SiO ２ For example, the NO in the insulator 224 ２ is the surrounding SiO ２ and may be spaced apart by as much as the covalent bond radius.

[0046] The results of first-principles calculations for each model are shown in Figure 2. ２ The band diagram of NO ２ , NO, N ２ O, O, O ２ The transition level of the model is shown. ２ The band diagram of shows the conduction band bottom Ec and the valence band top Ev with respect to the vacuum level Evac. Also, the transition levels are shown: a transition level (+1 / 0) where the charge of the system transitions between +1 and 0 states, a transition level (0 / -1) where the charge of the system transitions between 0 and -1 states, and a transition level (0 / -2) where the charge of the system transitions between 0 and -2 states. The value of each transition level is calculated based on the SiO ２ 2 shows values ​​(unit: eV) with the Ev of 111 as the reference (0.0 eV). ｘ ) are also shown. Here, IGZO(111) refers to an In-Ga-Zn oxide with an atomic ratio of In:Ga:Zn=1:1:1. ｘ Ec and Ev are experimental values.

[0047] As shown in FIG. 2, IGZO(111) and InO ｘ Within the band gap of NO ２There is a transition level (0 / -1) of the model, where IGZO(111) or InO ｘ is used as the oxide semiconductor 230, and c-SiO ２ is the insulator 224, and NO ２ 1A is considered, where the impurity 220 is an impurity. In this case, one of the transition levels of the impurity 220 in the insulator 224 can be said to be equal to or higher than Ev and equal to or lower than Ec of the oxide semiconductor 230.

[0048] When the OS transistor is turned on, a potential is supplied to the conductor 260 serving as the gate electrode, and electrons are injected into the oxide semiconductor 230. However, as shown in FIG. 2, NO ２ Since there is a transition level (0 / -1) in the model, the electrons are transferred to the impurity 220 (NO ２ The electrons are trapped by the impurity 220 (NO ２ ) has a charge of -1, so the impurity 220 has a negative fixed charge. ２ O, O, O ２ In the model in which the transition level (0 / −1) or the transition level (0 / −2) is higher than or too close to the Ec of the oxide semiconductor 230, it is difficult for the impurity 220 to function as a negative fixed charge.

[0049] As described above, when the impurity 220 in the insulator 224 becomes a negative fixed charge, a larger potential needs to be supplied to the conductor 260 to turn on the OS transistor. That is, when the impurity 220 in the insulator 224 becomes a negative fixed charge, the threshold voltage of the OS transistor can be shifted in the positive direction.

[0050] In an OS transistor, oxygen vacancies (V Ｏ ) and impurities such as hydrogen, the electrical characteristics are likely to fluctuate. Ｏ The nearby hydrogen is V Ｏ Defects in which hydrogen has entered (hereinafter referred to as V Ｏ H) and generates electrons that serve as carriers.Ｏ When the OS transistor contains the SiO 2 , the OS transistor tends to be normally on.

[0051] However, as described above, by configuring the impurity 220 in the insulator 224 to have a negative fixed charge, a negative shift in the electrical characteristics of the OS transistor can be suppressed, and the OS transistor can have normally-off characteristics. As a result, a semiconductor device with favorable electrical characteristics can be provided.

[0052] The impurities 220 in the insulator 224 can be evaluated by electron spin resonance (ESR) or thermal desorption spectroscopy (TDS) analysis.

[0053] For example, when silicon oxide is used for the insulator 224 and nitrogen dioxide is added as the impurity 220, the insulator 224 can be evaluated by ESR measurement. ２ Since NO has a lone electron, it can be measured by ESR. ２ The absorption peak due to the g-value is in the range of 1.94 to 2.05. Therefore, the spin density corresponding to the absorption peak with the g-value of 1.94 to 2.05 obtained by ESR measurement of the insulator 224 is 4.8×10 −３ spins / nm ３ Above 1.0 x 10 −２ spins / nm ３ is less than or equal to 7.38×10 −３ spins / nm ３ Above 1.0 x 10 −２ spins / nm ３ When the absorption peak of the ESR obtained from the insulator 224 containing the impurity 220 has the above value, the threshold voltage of the OS transistor can be 0 V or higher. Furthermore, the addition process of the impurity 220 can be performed efficiently, and productivity of the semiconductor device can be improved.

[0054] Note that the insulator 224 having the above spin density is not limited to the vicinity of the oxide semiconductor 230. The insulator 224 preferably has the above spin density in a region surrounding an OS transistor, such as a region where a marker is formed or a region where an electrode pad is formed.

[0055] The impurity 220 is preferably added to the insulator 224 by plasma treatment using a gas containing nitrogen. The gas containing nitrogen is nitrogen gas or dinitrogen monoxide (N ２ The insulator 224 having silicon oxide can be formed by plasma-excited N ２ or N ２ By treating with O, NO is obtained as an impurity 220. ２ can be added.

[0056] The plasma treatment can be performed using a sputtering apparatus, a CVD apparatus, a dry etching apparatus, a CVD apparatus using a high-density plasma source, a dry etching apparatus using a high-density plasma source, etc. Therefore, when a film formation step or an etching step using these apparatuses is performed before or after the plasma treatment, these steps and the plasma treatment can be performed consecutively.

[0057] Furthermore, the plasma treatment can add oxygen released by heating (hereinafter sometimes referred to as excess oxygen) to the insulator 224. In this case, oxygen gas may be used in addition to a nitrogen-containing gas in the plasma treatment. By performing heat treatment in a state where excess oxygen is added to the insulator 224, oxygen is diffused from the insulator 224 to the oxide semiconductor 230, and oxygen vacancies (V Ｏ ) can be reduced. This can improve the electrical characteristics and reliability of the OS transistor including the oxide semiconductor 230.

[0058] Further, the substrate can be heated during the plasma treatment. Heat treatment can be performed before or after the plasma treatment. The temperature for the substrate heating or heat treatment can be, for example, 200° C. to 450° C., preferably 350° C. to 400° C. In this manner, by performing the substrate heating or heat treatment before forming the oxide semiconductor 230, excess oxygen contained in the insulator 224 can be reduced. This can prevent excessive oxygen from being contained in the insulator 224, and the amount of oxygen in the insulator 224 can be adjusted to an appropriate amount. Therefore, excessive oxygen can be prevented from being supplied to the oxide semiconductor 230, which can prevent the threshold voltage of the OS transistor from being excessively increased. In this manner, the electrical characteristics of the OS transistor can be improved. Furthermore, the reliability of the OS transistor can be improved. Furthermore, by performing the substrate heating or heat treatment at a temperature of 450° C. or lower, further 400° C. or lower, elimination of the impurities 220 due to the substrate heating or heat treatment can be prevented.

[0059] <Configuration Example of Semiconductor Device> Next, a configuration example of a planar semiconductor device (transistor 200) will be described with reference to FIGS. 3 and 4. FIGS. 3A to 3D are plan views and cross-sectional views of the transistor 200. FIG. 3A is a plan view of the semiconductor device. FIGS. 3B to 3D are cross-sectional views of the semiconductor device. FIG. 3B is a cross-sectional view of the portion indicated by the dashed-dotted line A1-A2 in FIG. 3A and is also a cross-sectional view of the transistor 200 in the channel length direction. FIG. 3C is a cross-sectional view of the portion indicated by the dashed-dotted line A3-A4 in FIG. 3A and is also a cross-sectional view of the transistor 200 in the channel width direction. FIG. 3D is a cross-sectional view of the portion indicated by the dashed-dotted line A5-A6 in FIG. 3A and is also a cross-sectional view of the transistor 200 in the channel width direction. Note that some elements are omitted from the plan view of FIG. 3A for clarity. FIGS. 4A and 4B show enlarged cross-sectional views of the transistor 200 in the channel length direction.

[0060] The transistor 200 includes a conductor 205 embedded in the insulator 216, an insulator 221 over the insulator 216 and the conductor 205, an insulator 222 over the insulator 221, an insulator 224 over the insulator 222, an oxide semiconductor 230 over the insulator 224, a conductor 242a and a conductor 242b over the oxide semiconductor 230, an insulator 271a over the conductor 242a, an insulator 271b over the conductor 242b, an insulator 250 over the oxide semiconductor 230, and a conductor 260 over the insulator 250. Here, the oxide semiconductor 230 corresponds to the oxide semiconductor 230 shown in FIG. 1A , the conductor 260 corresponds to the conductor 260 shown in FIG. 1A , the insulator 250 corresponds to the insulator 250 shown in FIG. 1A , and the insulator 224 corresponds to the insulator 224 shown in FIG. 1A .

[0061] The oxide semiconductor 230 has a region that functions as a channel formation region of the transistor 200. The conductor 260 has a region that functions as a first gate electrode (also referred to as an upper gate electrode or a top gate electrode) of the transistor 200. The insulator 250 has a region that functions as a first gate insulator of the transistor 200. The conductor 205 has a region that functions as a second gate electrode (also referred to as a lower gate electrode or a bottom gate electrode) of the transistor 200. The insulators 224, 222, and 221 each have a region that functions as a second gate insulator of the transistor 200. The conductor 242a has a region that functions as one of a source electrode and a drain electrode of the transistor 200. The conductor 242b has a region that functions as the other of the source electrode and the drain electrode of the transistor 200.

[0062] An insulator 275 is provided over the insulator 271a and the insulator 271b, and an insulator 280 is provided over the insulator 275. Openings reaching the insulator 222 and the oxide semiconductor 230 are formed in the insulator 280 and the insulator 275, and the openings overlap with the region between the conductor 242a and the conductor 242b. In a top view (which can also be referred to as a plan view), the side surfaces of the insulator 280 in the openings coincide or substantially coincide with the side surfaces of the conductor 242a and the conductor 242b. The insulators 250 and 260 are disposed inside the openings provided in the insulator 280 and the insulator 275. An insulator 282 is provided in contact with the top surface of the insulator 280, the upper end of the insulator 250, and the top surface of the conductor 260. An insulator 283 is provided on the insulator 282. An insulator 214 is provided under the insulator 216 and the conductor 205. An insulator 212 is provided under the insulator 214. The insulators 212, 214, 280, 282, 283, and 285 function as interlayer films.

[0063] Openings reaching conductor 242a are formed in insulators 285, 283, 282, 280, 275, and 271a, and conductors 240a and 241a are provided in the openings. Insulator 241a is provided in contact with the sidewall of the opening, and conductor 240a is provided inside insulator 241a. Furthermore, openings reaching conductor 242b are formed in insulators 285, 283, 282, 280, 275, and 271b, and conductors 240b and 241b are provided in the openings. Insulator 241b is provided in contact with the sidewall of the opening, and conductor 240b is provided inside insulator 241b. The conductor 240a and the conductor 240b function as vias that connect a wiring or the like provided over the transistor 200 to the source or drain of the transistor 200. Note that the shape of the conductor 240a and the conductor 240b when viewed from above can be a circle, a roughly circular shape such as an ellipse, a polygonal shape such as a rectangle, a polygonal shape such as a rectangle with rounded corners, or the like.

[0064] The oxide semiconductor 230 has a channel formation region. The oxide semiconductor 230 further has a source region and a drain region. The source region and the drain region are n-type regions (low-resistance regions) having a higher carrier concentration than the channel formation region. The oxide semiconductor 230 may have a single-layer structure or a stacked structure of two or more layers.

[0065] The crystallinity of a semiconductor material used for the oxide semiconductor 230 is not particularly limited, and any of an amorphous semiconductor, a single crystal semiconductor, and a semiconductor having crystallinity other than single crystal (a microcrystalline semiconductor, a polycrystalline semiconductor, or a semiconductor having a crystalline region in part) may be used. Use of a single crystal semiconductor or a crystalline semiconductor is preferable because deterioration of transistor characteristics can be suppressed.

[0066] The band gap of a metal oxide functioning as a semiconductor is preferably 2.0 eV or more, more preferably 2.5 eV or more. By using a metal oxide with a wide band gap for the oxide semiconductor 230, the off-state current of the transistor 200 can be reduced. Because the off-state current of an OS transistor is small, the power consumption of the semiconductor device can be sufficiently reduced. Furthermore, because the OS transistor has high frequency characteristics, the semiconductor device can operate at high speed.

[0067] For an oxide semiconductor that can be used for a semiconductor layer of a transistor according to one embodiment of the present invention, refer to the description in Embodiment 2. Detailed description thereof will be omitted here.

[0068] Note that the semiconductor device of this embodiment may also be applied to a transistor using another semiconductor material for a channel formation region, such as a semiconductor made of a single element or a compound semiconductor.

[0069] Examples of semiconductors made of elemental elements that can be used as semiconductor materials include silicon and germanium. Examples of silicon that can be used as semiconductor materials include single-crystal silicon, polycrystalline silicon, microcrystalline silicon, and amorphous silicon. Examples of polycrystalline silicon include low-temperature polysilicon (LTPS).

[0070] Compound semiconductors that can be used for the semiconductor material include silicon carbide, silicon germanium, gallium arsenide, indium phosphide, boron nitride, and boron arsenide. Boron nitride that can be used for the semiconductor layer preferably has an amorphous structure. Boron arsenide that can be used for the semiconductor layer preferably has a cubic crystal structure. Other examples of compound semiconductors include organic semiconductors and nitride semiconductors. The aforementioned oxide semiconductors are also a type of compound semiconductor. These semiconductor materials may contain impurities as dopants.

[0071] Here, the oxide semiconductor 230 used in the semiconductor device preferably contains indium oxide. For example, the oxide semiconductor 230 can be made of indium oxide, indium gallium oxide, indium zinc oxide, indium gallium zinc oxide, or indium gallium tin zinc oxide. The oxide semiconductor 230 can have a stacked structure. For example, the oxide semiconductor 230 can have a stacked structure of indium oxide and indium gallium zinc oxide on the indium oxide. As shown in FIG. 4A , the oxide semiconductor 230 can have a structure including an oxide semiconductor 230a on the insulator 224, an oxide semiconductor 230b on the oxide semiconductor 230a, and an oxide semiconductor 230c on the oxide semiconductor 230b. For example, the oxide semiconductor 230b can be made of indium oxide, and the oxide semiconductors 230a and 230c can be made of indium gallium zinc oxide. For example, the oxide semiconductor 230a can have a composition of In:Ga:Zn=1:3:2 (atomic ratio) or a composition close to that. For example, the oxide semiconductor 230c can have a composition of In:Ga:Zn=1:1:1 [atomic ratio] or a composition close to that. As described above, when the oxide semiconductor 230 contains indium oxide, a semiconductor device with high field-effect mobility can be provided. Furthermore, a semiconductor device with excellent electrical characteristics, frequency characteristics, and reliability can be provided. With such a structure, the oxide semiconductor 230c containing indium gallium zinc oxide, which has low oxygen permeability, can be provided between the oxide semiconductor 230b containing indium oxide, which has high oxygen permeability, and the conductor 242a (conductor 242b). This can reduce oxygen extraction from the oxide semiconductor 230b by the conductor 242a (conductor 242b), thereby reducing an increase in contact resistance between the oxide semiconductor 230b and the conductor 242a (conductor 242b). Note that the description in Embodiment 2 can be referred to for the detailed structure of the oxide semiconductor 230.

[0072] 4A and the like, the oxide semiconductor 230 has a three-layer structure of oxide semiconductors 230a to 230c, but the present invention is not limited to this. For example, as shown in FIG. 5A, the oxide semiconductor 230 may have a two-layer structure of oxide semiconductors 230a and 230b. In this case, the top surface of the oxide semiconductor 230b is in contact with the bottom surface of the insulator 250, the bottom surface of the conductor 242a, and the bottom surface of the conductor 242b. Alternatively, as shown in FIG. 5B, the oxide semiconductor 230 may have a single-layer structure of the oxide semiconductor 230b. In this case, the bottom surface of the oxide semiconductor 230b is in contact with the top surface of the insulator 224.

[0073] 5C , the oxide semiconductor 230c may be divided in a region overlapping with the insulator 250, forming an oxide semiconductor 230ca and an oxide semiconductor 230cb. Preferably, the top surface of the oxide semiconductor 230ca is in contact with the bottom surface of the conductor 242a, and the oxide semiconductor 230ca is aligned or substantially aligned with the conductor 242a in a top view. Similarly, preferably, the top surface of the oxide semiconductor 230cb is in contact with the bottom surface of the conductor 242b, and the oxide semiconductor 230cb is aligned or substantially aligned with the conductor 242b in a top view. Furthermore, part of the top surface of the oxide semiconductor 230b is in contact with the insulator 250. With this structure, the oxide semiconductor 230ca (oxide semiconductor 230cb) is formed between the conductor 242a (conductor 242b) and the oxide semiconductor 230b, and the channel of the transistor 200 can be formed only in the oxide semiconductor 230b. For example, when aluminum oxide is used for the insulator 250a and indium oxide is used for the oxide semiconductor 230b, the aluminum oxide and the indium oxide are in contact with each other at the interface between the insulator 250a and the oxide semiconductor 230b. This structure can prevent impurity traps from being formed at the interface. This can improve the on-state current, carrier mobility, and frequency characteristics of the transistor 200.

[0074] The oxide semiconductor 230b preferably contains indium (In), and more preferably has a high In content. For example, the In content in the oxide semiconductor 230b is preferably higher than the In content in either or both of the oxide semiconductor 230a and the oxide semiconductor 230c. By using a metal oxide with a high In content as the oxide semiconductor 230b, it is possible to increase the on-state current and improve the frequency characteristics.

[0075] For example, the oxide semiconductor 230b preferably contains indium oxide. High-purity indium oxide with a reduced impurity concentration is preferably used for the oxide semiconductor 230b. When indium oxide is used for the oxide semiconductor 230b, the oxide semiconductor 230b preferably has high crystallinity, and preferably has single-crystal or single-crystal-like crystallinity.

[0076] When high-purity indium oxide with a reduced impurity concentration is used for the oxide semiconductor 230b, the concentration of the first element in the oxide semiconductor 230b is preferably low. Here, the first element is at least one of boron, aluminum, and gallium. The concentration of the first element in the oxide semiconductor 230b is, for example, preferably 1 atomic % or less, more preferably 0.1 atomic % or less, and even more preferably 0.01 atomic % (100 ppm) or less. By reducing the concentrations of boron and aluminum in the oxide semiconductor 230b, the crystallinity of the oxide semiconductor 230b can be improved. Furthermore, by reducing the concentration of gallium in the oxide semiconductor 230b, the amount of change in threshold voltage in a positive bias temperature stress (PBTS) test can be reduced. Therefore, a transistor with high reliability against positive bias application can be obtained.

[0077] The effective mass of electrons in indium oxide is small, for example, smaller than the effective mass of electrons in silicon. Therefore, by using indium oxide, which has a small effective mass of electrons, for the oxide semiconductor 230b, a transistor with high on-state current, high field-effect mobility, and high frequency characteristics (also referred to as f characteristics) can be realized. Furthermore, the effective mass of holes in indium oxide is large, for example, larger than the effective mass of holes in silicon. Therefore, by using indium oxide, which has a large effective mass of holes, for the oxide semiconductor 230b, a transistor with extremely low off-state current can be realized.

[0078] 6A to 6D , a layer 227 is preferably provided between the oxide semiconductor 230 and the insulator 224. The bottom surface of the layer 227 is in contact with the top surface of the insulator 224, and the top surface of the layer 227 is in contact with the bottom surface of the oxide semiconductor 230. The side surface of the layer 227 is preferably flush with the side surfaces of the insulator 224 and the oxide semiconductor 230. Here, FIGS. 6A to 6D correspond to FIGS. 3A to 3D, respectively, and are similar to FIGS. 3A to 3D except that the layer 227 is provided.

[0079] The layer 227 preferably has a higher resistivity than the oxide semiconductor 230. Alternatively, when the oxide semiconductor 230 has a stacked structure, the layer 227 preferably has a higher resistivity than at least one of the layers constituting the oxide semiconductor 230. For example, when the oxide semiconductor 230 has a stacked structure of oxide semiconductors 230a to 230c, the layer 227 preferably has a higher resistivity than any one of the oxide semiconductors 230a to 230c. Therefore, an insulator or a semiconductor is used for the layer 227. For example, an oxide layer or a metal oxide layer can be used for the layer 227. For example, an insulating material that can be used for an insulator, which will be described later, or a metal oxide material that can be used for an oxide semiconductor, which will be described later, can be used for the layer 227. The layer 227 can have a single layer or a stacked layer structure. Providing such a layer 227 can suppress diffusion of impurities from the bottom surface of the oxide semiconductor 230 into the oxide semiconductor 230. This can improve the electrical characteristics and reliability of the transistor 200 including the oxide semiconductor 230.

[0080] The layer 227 preferably has crystallinity, and preferably has single-crystal or single-crystal-like crystallinity. Here, the lattice constant of the layer 227 preferably matches or substantially matches (can also be referred to as lattice matching) the lattice constant of the oxide semiconductor 230. By forming the oxide semiconductor 230 over such a layer 227, the crystallinity of the layer 227 can be reflected in the oxide semiconductor 230, and the oxide semiconductor 230 with good crystallinity can be formed in some cases.

[0081] For example, yttria-stabilized zirconia (YSZ) can be used as the layer 227. Here, the layer 227 contains yttrium and zirconium. When YSZ is used for the layer 227, it is preferable that the YSZ has high crystallinity, and preferably has single crystal or near-single crystal crystallinity. By using YSZ with high crystallinity for the layer 227, the crystallinity of the YSZ can be reflected in the oxide semiconductor 230 in some cases. For example, by using indium oxide for the oxide semiconductor 230, indium oxide with single crystal or near-single crystal crystallinity can be formed.

[0082] As described above, when an oxide insulating material is used for the layer 227, it preferably contains at least one of gallium, aluminum, and zirconium. For example, aluminum oxide, gallium oxide, zirconium oxide, etc. may also be used.

[0083] For example, when an oxide semiconductor material that can be used for the oxide semiconductor 230 is used for the layer 227, an In—Ga—Zn oxide having an atomic ratio of In:Ga:Zn=1:3:2 or a composition thereof close thereto, or an In—Ga—Zn oxide having an atomic ratio of In:Ga:Zn=1:1:1 or a composition thereof close thereto can be used for the layer 227. Alternatively, indium zinc oxide, gallium zinc oxide, zinc oxide, or the like can be used. The crystal structure of the oxide semiconductor used for the layer 227 can be a c-axis aligned crystalline (CAAC) structure, which will be described later.

[0084] The layer 227 is not limited to the above. For example, the layer 227 may be made of silicon, silicon carbide, gallium nitride, or the like, which have high crystallinity.

[0085] 7A , a layer 227 can be formed between the oxide semiconductor 230 and the insulator 224 in a two-layer structure of the oxide semiconductor 230b and the oxide semiconductor 230c. That is, in the structure shown in FIG. 4B , the layer 227 can be provided instead of the oxide semiconductor 230a. Here, the top surface of the layer 227 is in contact with the bottom surface of the oxide semiconductor 230b. For example, YSZ can be used for the layer 227, indium oxide can be used for the oxide semiconductor 230b, and In—Ga—Zn oxide can be used for the oxide semiconductor 230c.

[0086] 7B , the oxide semiconductor 230 may have a single-layer structure of the oxide semiconductor 230b, and the layer 227 may be formed between the oxide semiconductor 230b and the insulator 224. That is, in the structure shown in FIG. 5A , the layer 227 may be provided instead of the oxide semiconductor 230a. Here, the top surface of the layer 227 is in contact with the bottom surface of the oxide semiconductor 230b. For example, YSZ may be used for the layer 227, and indium oxide may be used for the oxide semiconductor 230b.

[0087] 7A , the oxide semiconductor 230c may be divided in a region overlapping with the insulator 250 to form an oxide semiconductor 230ca and an oxide semiconductor 230cb, as shown in Fig. 7C . That is, in the structure shown in Fig. 5C , a layer 227 may be provided instead of the oxide semiconductor 230a.

[0088] A channel formation region and a source region and a drain region sandwiching the channel formation region in the transistor 200 are formed in the oxide semiconductor 230. At least part of the channel formation region overlaps with the conductor 260. The source region overlaps with the conductor 242a, and the drain region overlaps with the conductor 242b. Note that the source region and the drain region can be interchanged.

[0089] The channel formation region has fewer oxygen vacancies or a lower impurity concentration than the source and drain regions, and is therefore a high-resistance region with a low carrier concentration. Therefore, the channel formation region can be said to be i-type (intrinsic) or substantially i-type.

[0090] The source and drain regions are low-resistance regions with high carrier concentrations due to a large number of oxygen vacancies or high concentrations of impurities such as hydrogen, nitrogen, and metal elements. That is, the source and drain regions are n-type regions (low-resistance regions) with a higher carrier concentration than the channel formation region.

[0091] The carrier concentration in the channel formation region is 1×10 １８ cm −３ Below, 1 x 10 １７ cm −３ Less than 1 x 10 １６ cm −３ Less than 1 x 10 １５ cm −３ Less than 1 x 10 １４ cm −３ Less than 1 x 10 １３ cm −３ Less than 1 x 10 １２ cm −３ Less than 1 x 10 １１ cm −３ Less than or 1 x 10 １０ cm −３ The lower limit of the carrier concentration in the channel formation region is not particularly limited, but is preferably less than 1×10 −９ cm −３ It can be said that:

[0092] Note that when the carrier concentration of the oxide semiconductor 230 is reduced, the impurity concentration in the oxide semiconductor 230 is reduced to reduce the density of defect states. In this specification and the like, a semiconductor having a low impurity concentration and a low density of defect states is referred to as a highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor (or metal oxide). Note that an oxide semiconductor (or metal oxide) having a low carrier concentration may be referred to as a highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor (or metal oxide).

[0093] To stabilize the electrical characteristics of the transistor 200, it is effective to reduce the impurity concentration in the channel formation region in the oxide semiconductor 230. Furthermore, in order to reduce the impurity concentration in the oxide semiconductor 230, it is preferable to also reduce the impurity concentration in adjacent films. Examples of impurities include hydrogen, nitrogen, alkali metals, alkaline earth metals, iron, nickel, and silicon. Note that the impurities in the oxide semiconductor 230 refer to, for example, elements other than the main components constituting the oxide semiconductor 230. For example, an element with a concentration of less than 0.1 atomic % can be considered an impurity.

[0094] Furthermore, it may be difficult to clearly detect the boundaries between regions in the oxide semiconductor 230. The concentrations of metal elements and impurity elements such as hydrogen and nitrogen detected in each region may vary continuously within each region, rather than varying stepwise from region to region. That is, the concentrations of metal elements and impurity elements such as hydrogen and nitrogen may decrease in a region closer to the channel formation region.

[0095] In a transistor using an oxide semiconductor, if impurities and oxygen vacancies exist in a region where a channel is formed in the oxide semiconductor, the electrical characteristics are likely to fluctuate and the reliability may be reduced. Ｏ H) and generate electrons that serve as carriers. Therefore, if oxygen vacancies are present in the channel formation region of the oxide semiconductor, the transistor is likely to have normally-on characteristics (a channel exists and current flows through the transistor even when no voltage is applied to the gate electrode). Therefore, impurities, oxygen vacancies, and V Ｏ It is preferable that H be reduced as much as possible. In other words, it is preferable that the carrier concentration of a channel formation region in the oxide semiconductor be reduced and that the channel formation region be i-type (intrinsic) or substantially i-type.

[0096] In response to this problem, an insulator containing excess oxygen is provided near the oxide semiconductor and heat treatment is performed, whereby oxygen is supplied from the insulator to the oxide semiconductor, and oxygen vacancies and V ＯH can be reduced. However, if an excessive amount of oxygen is supplied to the source region or the drain region, the on-state current or the field-effect mobility of the transistor 200 may decrease. Furthermore, variations in the amount of oxygen supplied to the source region or the drain region within the substrate surface may cause variations in the characteristics of a semiconductor device including the transistor. Furthermore, if the amount of oxygen supplied from the insulator to the oxide semiconductor becomes excessively large, this may adversely affect the electrical characteristics and reliability of the transistor. Furthermore, oxygen may diffuse into conductors such as the gate electrode, source electrode, and drain electrode, causing the conductors to oxidize and lose their conductivity.

[0097] First, an insulator having a barrier property against hydrogen is formed near the transistor 200, and V Ｏ It is preferable to reduce H.

[0098] At least one of the insulators 212, 214, 221, 222, 275, 282, and 283 preferably functions as a barrier insulator against hydrogen. At least one of the insulators 212, 214, 221, 222, 275, 282, and 283 preferably functions as a barrier insulator against impurities. At least one of the insulators 212, 214, 221, 222, 275, 282, and 283 preferably functions as a barrier insulator against oxygen. Note that it is not necessarily necessary to provide all of the insulators 212, 214, 221, 222, 275, 282, and 283. If the insulator has sufficient barrier properties against hydrogen, impurities, oxygen, and the like, it can be formed by appropriately selecting from the insulator 212, the insulator 214, the insulator 221, the insulator 222, the insulator 275, the insulator 282, and the insulator 283. For example, a structure can be used in which the insulator 216 and the conductor 205 are formed in contact with the upper surface of the insulator 212 without providing the insulator 214.

[0099] In this specification etc., a barrier insulator refers to an insulator having barrier properties. In this specification etc., having barrier properties refers to having a property that makes it difficult for a corresponding substance to diffuse (also referred to as a property that makes it difficult for a corresponding substance to permeate, a property that has low permeability of a corresponding substance, or a function to suppress the diffusion of a corresponding substance). Alternatively, it refers to having a function to capture or fix a corresponding substance inside the insulator (also referred to as gettering). Note that when hydrogen is described as a corresponding substance, it can refer to, for example, a hydrogen atom, a hydrogen molecule, a water molecule, and OH. − Furthermore, unless otherwise specified, impurities when described as corresponding substances refer to impurities in the channel formation region or semiconductor layer, and include, for example, hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, and nitrogen oxide molecules (N ２ O, NO, NO ２ The term "oxygen" refers to at least one of an oxygen atom, an oxygen molecule, etc., when described as a corresponding substance.

[0100] As an insulator having a function of suppressing hydrogen diffusion, it is preferable to use, for example, silicon nitride or silicon nitride oxide.In addition, for example, aluminum oxide, magnesium oxide, hafnium oxide, zirconium oxide, oxide containing aluminum and hafnium (hafnium aluminate), oxide containing hafnium and zirconium (hafnium zirconium oxide), gallium oxide, indium gallium zinc oxide, etc. may also be used.

[0101] An insulator having a function of suppressing diffusion of hydrogen is preferably used for the insulators 212, 221, 275, and 283. For example, silicon nitride, which has a higher hydrogen barrier property, may be used for the insulators 212, 221, 275, and 283.

[0102] Some insulators capable of suppressing hydrogen diffusion have the ability to capture or fix hydrogen. Examples of insulators capable of capturing or fixing hydrogen include metal oxides such as hafnium-containing oxides, aluminum-containing oxides, oxides containing aluminum and hafnium (hafnium aluminate), oxides containing hafnium and zirconium (hafnium zirconium oxide), and magnesium oxide. Insulators capable of capturing or fixing hydrogen preferably have an amorphous structure. In metal oxides with such amorphous structures, oxygen atoms have dangling bonds, which may have the ability to capture or fix hydrogen through these dangling bonds. In other words, metal oxides with amorphous structures have a high ability to capture or fix hydrogen. Adding silicon to the above metal oxides can suppress polycrystallization and facilitate amorphousization. Therefore, it is preferable to use metal oxides with silicon added to the above metal oxides (e.g., hafnium silicate, aluminum silicate, etc.).

[0103] An insulator having a function of capturing or fixing hydrogen is preferably used for the insulators 214, 222, and 282. For example, aluminum oxide may be used for the insulators 214 and 282. Furthermore, for example, hafnium oxide, which is a high dielectric constant (high-k) material, is preferably used for the insulator 222, which functions as a second gate insulator.

[0104] Furthermore, the inorganic insulators listed as insulators having a function of suppressing hydrogen diffusion and insulators having a function of capturing or fixing hydrogen also have a barrier property against oxygen.

[0105] 4A , an insulator 212 having a function of suppressing diffusion of hydrogen and an insulator 214 having a function of capturing or fixing hydrogen are preferably provided under the transistor 200. Providing the insulator 212 under the transistor 200 can suppress diffusion of hydrogen from a lower layer of the transistor 200. Furthermore, providing the insulator 214 over the insulator 212 can capture or fix hydrogen contained in the insulator 216 or the like to the insulator 214. This can reduce the hydrogen concentration in the oxide semiconductor 230 and its vicinity.

[0106] 4A , an insulator 221 having a function of suppressing diffusion of hydrogen and an insulator 222 having a function of capturing or fixing hydrogen are preferably provided under the transistor 200. By providing the insulator 221 under the transistor 200, diffusion of hydrogen from a lower layer of the transistor 200 can be suppressed. By providing the insulator 222 over the insulator 221, hydrogen contained in the insulator 224 or the like can be captured or fixed to the insulator 222. This allows the hydrogen concentration in the oxide semiconductor 230 and its vicinity to be reduced.

[0107] 4A , an insulator 275 is preferably provided to cover the oxide semiconductor 230, the conductor 242a, the conductor 242b, and the like. By providing the insulator 275 in this manner, diffusion of hydrogen from the insulator 280 to the oxide semiconductor 230, the conductor 242a, the conductor 242b, and the like can be suppressed.

[0108] 4A , an insulator 282 having a function of capturing or fixing hydrogen and an insulator 283 having a function of suppressing diffusion of hydrogen are preferably provided over the transistor 200. Providing the insulator 283 over the transistor 200 can suppress diffusion of hydrogen from the upper layer of the transistor 200. Providing the insulator 282 under the insulator 283 can capture or fix hydrogen contained in the insulator 280 or the like to the insulator 282. This can reduce the hydrogen concentration in the oxide semiconductor 230 and its vicinity.

[0109] In this way, by using a structure in which the top and bottom of the transistor 200 are surrounded by barrier insulators against hydrogen, diffusion of hydrogen into the oxide semiconductor is reduced, and the V Ｏ H can be reduced. As a result, the electrical characteristics and reliability of the transistor 200 can be improved.

[0110] Furthermore, oxygen that is released by heating is preferably contained in the insulator 280. By supplying the oxygen to the oxide semiconductor 230 through the insulator 250 by heat treatment, oxygen vacancies in the channel formation region can be reduced.

[0111] As shown in FIG. 4A, the insulator 282 may have a laminated structure of an insulator 282a and an insulator 282b on the insulator 282a.

[0112] In this case, oxygen can be added to the insulator 280 by forming the insulator 282b by sputtering in an atmosphere containing oxygen gas. By forming the insulator 282b after the insulator 282a has already been formed, oxygen is added through the insulator 282a, allowing the amount of oxygen added to the insulator 280 to be controlled. If the insulator 282a is thick, the oxygen addition is more likely to be hindered, and the amount of oxygen injected into the insulator 280 decreases. If the insulator 282a is thin, the oxygen addition is less likely to be hindered, and the amount of oxygen injected into the insulator 280 increases. For example, by setting the thickness of the insulator 282a to a value between 1 nm and 20 nm, preferably between 3 nm and 10 nm, an appropriate amount of oxygen can be supplied to the insulator 280.

[0113] Furthermore, in order to prevent oxygen from being added to the insulator 280 during the formation of the insulator 282a, it is preferable to form the insulator 282a using an atomic layer deposition (ALD) method. Furthermore, in order to thin the film thickness of the insulator 282a as described above, it is preferable to form the insulator 282a using an ALD method. Examples of the ALD method include a thermal ALD method in which a precursor and a reactant are reacted using only thermal energy, and a plasma enhanced ALD (PEALD) method in which a plasma excited reactant is used.

[0114] Some precursors used in the ALD method contain carbon and other impurities. Therefore, films formed by the ALD method may contain more impurities such as carbon than films formed by other film formation methods. Therefore, the insulator 282a may have a higher carbon concentration than the insulator 282b. Note that the impurities can be quantified using secondary ion mass spectrometry (SIMS), X-ray photoelectron spectroscopy (XPS), or Auger electron spectroscopy (AES).

[0115] For example, when both the insulator 282a and the insulator 282b contain aluminum oxide, the carbon concentration of the insulator 282a may be higher than that of the insulator 282b. In this case, the carbon concentration of the insulator 282a is found to be 1×10 １８ atoms / cm ３ That's it, 1 x 10 ２１ atoms / cm ３ The insulator 282a preferably has a carbon concentration of 1×10 or less. １９ atoms / cm ３ That's it, 1 x 10 ２１ atoms / cm ３ The carbon concentration of the insulator 282b may be in the range of 1×10 to 1×10. ２０ atoms / cm ３The insulator 282b preferably has a carbon concentration of 4.46×10 or less. １７ atoms / cm ３ That's it, 1 x 10 １９ atoms / cm ３ It may have the following areas:

[0116] As described above, by performing heat treatment on the insulator 280 that contains oxygen that is released by heating, a suitable amount of oxygen can be supplied to the oxide semiconductor 230 through the insulator 250. During the heat treatment, the insulators 282 and 283, which have a barrier property against oxygen, are formed over the insulator 280, which can prevent excessive diffusion of oxygen contained in the insulator 280 from the insulator 280. Furthermore, the insulator 275, which has a barrier property against oxygen, is formed between the insulator 280 and the oxide semiconductor 230, the conductor 242a, and the conductor 242b, which can prevent excessive diffusion of oxygen contained in the insulator 280 from the insulator 280. Furthermore, by performing the heat treatment with openings formed in parts of the insulators 280, 282, and 283, part of the oxygen contained in the insulator 280 can be diffused outward, which can also adjust the amount of oxygen supplied from the insulator 280 to the oxide semiconductor 230.

[0117] Here, the insulator 250 preferably has a structure that allows oxygen to diffuse from the insulator 280 to the oxide semiconductor 230 and suppresses oxidation of the conductors 242 a, 242 b, and 260.

[0118] 3B and 3C , the insulator 250 is disposed in openings formed in the insulators 280 and 275. The insulator 250 is formed in the openings in contact with the top surface of the insulator 222, the side surface of the insulator 224, the side surface and top surface of the oxide semiconductor 230, the side surface of the conductor 242a, the side surface of the conductor 242b, the side surface of the insulator 271a, the side surface of the insulator 271b, the side surface of the insulator 275, and the side surface of the insulator 280. Furthermore, as shown in FIG. 4A , when the oxide semiconductor 230 includes oxide semiconductors 230a to 230c, the insulator 250 is in contact with the side surface of the oxide semiconductor 230a, the side surface of the oxide semiconductor 230b, and the top surface and side surface of the oxide semiconductor 230c. Here, the crystallinity of the oxide semiconductor 230c shown in FIG. 4A is preferably high. Since the oxide semiconductor 230c has a large contact area with the insulator 250, the carrier mobility can be increased when the transistor 200 is on.

[0119] Here, as shown in Figures 4A, 9A, etc., the insulator 250 preferably has a stacked structure of an insulator 250a in contact with the oxide semiconductor 230, an insulator 250b on the insulator 250a, and an insulator 250c on the insulator 250b.

[0120] The insulator 250b is preferably made of silicon oxide, silicon oxynitride, or the like, which has a high withstand voltage. To improve the withstand voltage, the insulator 250b may be thicker than the insulator 250a. By using such an oxide insulator, high-temperature heat treatment can be performed to diffuse oxygen in the insulator 250b. Therefore, heat treatment can supply oxygen contained in the insulator 280 to the oxide semiconductor 230 through the insulator 250b. In this specification and the like, an oxynitride refers to a material whose composition contains more oxygen than nitrogen, and a nitride oxide refers to a material whose composition contains more nitrogen than oxygen. For example, silicon oxynitride refers to a material whose composition contains more oxygen than nitrogen, and silicon nitride oxide refers to a material whose composition contains more nitrogen than oxygen.

[0121] In order to suppress oxidation of the conductor 242a, the conductor 242b, and the conductor 260, it is preferable to provide an oxygen barrier insulator near each of the conductor 242a, the conductor 242b, and the conductor 260. For example, it is preferable to provide an oxygen barrier insulator for the insulator 250a and the insulator 250c.

[0122] The insulator 250a preferably has a barrier property against oxygen. The insulator 250a is preferably at least less permeable to oxygen than the insulator 250b. The insulator 250a has a region in contact with the side surface of the conductor 242a and the side surface of the conductor 242b. The insulator 250a has a barrier property against oxygen, which can prevent the side surfaces of the conductors 242a and 242b from being oxidized and forming an oxide film on the side surfaces. This can prevent a decrease in the on-state current or the field-effect mobility of the transistor 200. Furthermore, this structure can reduce the amount of oxygen in the insulator 250b absorbed by the conductors 242a and 242b. Therefore, an appropriate amount of oxygen can be supplied from the insulator 250b to the oxide semiconductor 230, and oxygen vacancies in the channel formation region of the oxide semiconductor 230 can be reduced.

[0123] Furthermore, by providing the insulator 250a between the insulator 280 and the insulator 250b and between the insulator 250b and the oxide semiconductor 230, excessive supply of oxygen from the insulator 280 to the oxide semiconductor 230 can be suppressed, and an appropriate amount of oxygen can be supplied to the oxide semiconductor 230. Therefore, the amount of oxygen in the channel formation region of the oxide semiconductor 230 and its vicinity can be controlled to an appropriate amount, thereby preventing the transistor 200 from becoming excessively normally off and improving reliability. Furthermore, excessive oxidation of the source and drain regions can be suppressed, which can cause a decrease in on-state current or a decrease in field-effect mobility of the transistor 200.

[0124] Therefore, the insulator 250a preferably has a thickness that does not excessively hinder the diffusion of oxygen from the insulator 280 to the insulator 250b and from the insulator 250b to the oxide semiconductor 230. For example, the thickness of the insulator 250a is preferably 0.1 nm to 5.0 nm, more preferably 0.5 nm to 5.0 nm, still more preferably 0.5 nm to less than 3.0 nm, and still more preferably 0.5 nm to 2.0 nm.

[0125] As described above, it is preferable to appropriately diffuse oxygen from the insulator 280 to the insulator 250b and from the insulator 250b to the oxide semiconductor 230, and to suppress the diffusion of oxygen from the insulator 250b to the conductor 242a and the conductor 242b as much as possible. In the semiconductor device according to this embodiment, the contact area between the insulator 250a and the conductor 242a and the contact area between the insulator 250a and the conductor 242b are much smaller than the contact area between the insulator 250a and the oxide semiconductor 230. In other words, it is estimated that the amount of oxygen diffusing from the insulator 250b to the conductor 242a and the conductor 242b via the insulator 250a is smaller than the amount of oxygen diffusing from the insulator 250b to the oxide semiconductor 230 via the insulator 250a. Therefore, by controlling the amount of oxygen contained in the insulator 280 and ensuring that an appropriate amount of oxygen is supplied from the insulator 280 to the insulator 250b and the oxide semiconductor 230, oxidation of the conductor 242a and the conductor 242b can be reduced.

[0126] The insulator 250a in contact with the channel formation region of the oxide semiconductor 230 preferably has a function of capturing or fixing hydrogen. This can reduce the hydrogen concentration in the channel formation region of the oxide semiconductor 230. Therefore, the V Ｏ By reducing H, the channel forming region can be made i-type or substantially i-type.

[0127] Furthermore, it is preferable to use a high-dielectric constant (high-k) material for the insulator 250a. An example of a high-k material is an oxide containing one or both of aluminum and hafnium. Using a high-k material for the insulator 250a makes it possible to reduce the gate potential applied during transistor operation while maintaining the physical thickness of the gate insulator. Furthermore, it is possible to reduce the equivalent oxide thickness (EOT) of the insulator functioning as the gate insulator.

[0128] For the above reasons, it is preferable to use an oxide containing one or both of aluminum and hafnium as the insulator 250a, and it is more preferable to use an oxide having an amorphous structure and containing one or both of aluminum and hafnium. It is even more preferable to use aluminum oxide having an amorphous structure, because an amorphous film of aluminum oxide can be formed relatively easily using the ALD method. In this embodiment, an aluminum oxide film is used as the insulator 250a. Aluminum oxide has the function of capturing or fixing hydrogen and has barrier properties against oxygen, and therefore can be suitably used as the insulator 250a.

[0129] The insulator 250c also preferably has a barrier property against oxygen. The insulator 250c is provided between the channel formation region of the oxide semiconductor 230 and the conductor 260 and between the insulator 280 and the conductor 260. With this structure, oxygen contained in the channel formation region of the oxide semiconductor 230 can be prevented from diffusing to the conductor 260 and forming oxygen vacancies in the channel formation region of the oxide semiconductor 230. Furthermore, oxygen contained in the oxide semiconductor 230 and oxygen contained in the insulator 280 can be prevented from diffusing to the conductor 260 and oxidizing the conductor 260. The insulator 250c is preferably at least less permeable to oxygen than the insulator 250b. Furthermore, the insulator 250c preferably has a function of suppressing the diffusion of hydrogen. This can prevent impurities such as hydrogen contained in the conductor 260 from diffusing to the oxide semiconductor 230. For example, a silicon nitride film is preferably used as the insulator 250c.

[0130] 9A , in the case of a structure in which an oxide semiconductor 230ca is provided between the oxide semiconductor 230b and the conductor 242a, an oxide semiconductor 230cb is provided between the oxide semiconductor 230b and the conductor 242b, and the insulator 250 is in contact with the oxide semiconductor 230b, it is preferable that the insulator 250 has a three-layer structure of insulators 250a, 250b, and 250c, and that hafnium oxide is used for the insulator 250a, as shown in FIG. 9A . For example, a hafnium oxide film having a thickness of 2 nm can be used for the insulator 250a, a silicon oxide film having a thickness of 2 nm can be used for the insulator 250b, and a silicon nitride film having a thickness of 1 nm can be used for the insulator 250c.

[0131] By using hafnium oxide for the insulator 250a in this manner, the insulator 250a containing hafnium oxide can be provided in contact with the oxide semiconductor 230b containing indium oxide in the vicinity of the channel formation region of the transistor 200. With such a structure, impurities such as hydrogen and excess oxygen contained in the oxide semiconductor 230b can be absorbed by the insulator 250a. The hydrogen and oxygen absorbed by the insulator 250a can be removed from the insulator 250a by heat treatment. ２ In this manner, impurities such as hydrogen and an excess amount of oxygen in the oxide semiconductor 230b can be reduced, thereby improving the electrical characteristics and reliability of the transistor 200.

[0132] 9A shows a structure in which the layer 227 is provided between the oxide semiconductor 230b and the insulator 224, but the present invention is not limited to this. For example, as shown in FIG. 9C , a structure in which the layer 227 is not provided between the oxide semiconductor 230b and the insulator 224 can be used. In this case, a structure in which the oxide semiconductor 230b is in contact with the top surface of the insulator 224 can be used.

[0133] 4B, a structure in which an insulator 250d is provided on the insulator 250b can also be used. In this case, the insulator 250d can be an insulator that can be used for the insulator 250a and has the function of capturing or fixing hydrogen. For example, it is preferable to use an oxide containing hafnium as the insulator 250d. Examples of oxides that can be used for the hafnium include hafnium oxide, hafnium aluminate, hafnium silicate, hafnium zirconium oxide, and hafnium zirconium oxide containing yttrium. Alternatively, a hafnium zirconium oxide containing a lanthanoid such as lanthanum can also be used as the insulator 250d. Here, by providing the insulator 250d between the insulator 250c and the insulator 250b, hydrogen contained in the insulator 250b and the like can be more effectively captured and fixed. A channel formation region of the oxide semiconductor 230 and insulators 250a and 250d each having a function of capturing and fixing hydrogen are provided under an insulator 250c having a function of suppressing hydrogen diffusion. In the region where hydrogen diffusion from above is blocked by the insulator 250c, hydrogen contained in the channel formation region of the oxide semiconductor 230 and the like can be captured or fixed by the insulators 250a and 250d. This can reduce the hydrogen concentration in the oxide semiconductor 230, thereby suppressing a negative shift in the initial characteristics of the transistor 200 and achieving normally-off characteristics. Furthermore, negative drift degradation in a +GBT (Gate Bias-Temperature) stress test can be suppressed.

[0134] Note that a structure in which the insulator 250a, the insulator 250b, and the insulator 250d are provided without providing the insulator 250c can also be used. In this case, it is preferable to provide an insulator (e.g., silicon nitride) having a function of suppressing hydrogen diffusion as the insulator 283 over the insulator 250. With such a structure, the oxide semiconductor 230 and the insulators 250a and 250d having a function of capturing or fixing hydrogen are formed in a region covered with silicon nitride, which has a high hydrogen barrier property. Therefore, hydrogen contained in a channel formation region of the oxide semiconductor 230 can be captured or fixed by the insulator 250a and the insulator 250d.

[0135] By adopting the above-described structure, the channel formation region can be made i-type or substantially i-type, and the source region and drain region can be made n-type, thereby providing a semiconductor device with excellent electrical characteristics. Furthermore, by adopting the above-described structure, the semiconductor device can have excellent electrical characteristics even when miniaturized or highly integrated. Furthermore, miniaturizing the transistor 200 can improve frequency characteristics. Specifically, the cutoff frequency can be improved.

[0136] Furthermore, the hafnium-containing metal oxide used for the insulator 250d preferably functions as a high-k material. This configuration allows the gate potential applied during transistor operation to be reduced while maintaining the physical thickness of the gate insulator. Furthermore, it also allows the equivalent oxide thickness (EOT) of the insulator functioning as the gate insulator to be reduced.

[0137] Furthermore, it is preferable that the insulator 250d has ferroelectricity. For example, the insulator 250d can be made of ferroelectric hafnium zirconium oxide, hafnium zirconium oxide containing yttrium, or the like. The insulator 250d may also have a structure in which a layer of hafnium zirconium oxide is stacked on a layer of hafnium zirconium oxide containing yttrium. When a ferroelectric material is used for the insulator 250d, the insulator 250d does not necessarily need to have the function of capturing or fixing hydrogen. For example, the material capable of having ferroelectricity described in the third embodiment can be used for the insulator 250d.

[0138] In this way, by using a ferroelectric material for the insulator 250d, the transistor 200 can function as a Ferroelectric Field Effect Transistor (FeFET). The FeFET functions as a memory element by itself. Therefore, the structure of the memory element can be made smaller than that of a Dynamic Random Access Memory (DRAM) type memory element having a transistor and a capacitor. Therefore, miniaturization and high integration of a memory device including the transistor 200 can be achieved. Furthermore, productivity of a memory device including the transistor 200 can be improved.

[0139] The insulators 250a to 250d function as part of the first gate insulator. The insulators 250a to 250d, together with the conductor 260, are provided in openings formed in the insulator 280 or the like. To miniaturize the transistor 200, the thicknesses of the insulators 250a, 250c, and 250d are preferably small. The thicknesses of the insulators 250a, 250c, and 250d are preferably 0.1 nm to 20 nm, more preferably 0.1 nm to 10 nm, more preferably 0.5 nm to 5.0 nm, more preferably 1.0 nm to less than 5.0 nm, and still more preferably 1.0 nm to 3.0 nm. For example, aluminum oxide having a thickness of 1 nm can be used for insulator 250a, silicon oxide having a thickness of 2 nm can be used for insulator 250b, hafnium oxide, hafnium zirconium oxide, or hafnium zirconium oxide containing yttrium having a thickness of 2 nm can be used for insulator 250d, and silicon nitride having a thickness of 1 nm can be used for insulator 250c. Note that it is sufficient that insulators 250a, 250c, and 250d each have a region having a thickness within the above-described range at least in part.

[0140] In order to thin the film thicknesses of the insulators 250a to 250d as described above, it is preferable to deposit the insulators 250a to 250d by an ALD method. Furthermore, in order to form the insulators 250a to 250d in openings of the insulator 280 and the like with good coverage, it is preferable to deposit the insulators 250a to 250d by an ALD method.

[0141] Although the above description has been given of a structure in which the insulator 250 has a three-layer structure of insulators 250a to 250c or a four-layer structure of insulators 250a to 250d, the present invention is not limited to this. The insulator 250 can also have a single-layer structure, a two-layer structure, or a stacked structure of five or more layers. The insulator 250 can also have a structure including at least one of the insulators 250a to 250d. For example, the insulator 250 can also have a single-layer structure of the insulator 250c. In this case, the insulator 250 can also be formed using a single layer of hafnium zirconium oxide. By forming the insulator 250 using one, two, or three layers of the insulators 250a to 250d, the manufacturing process of the semiconductor device can be simplified and productivity can be improved.

[0142] When the insulator 250 has a four-layer structure or a five-layer structure, it can have a stacked structure as shown in Figures 10A to 10E, where Figures 10A to 10E are enlarged views corresponding to region A shown in Figure 4B.

[0143] 10A shows an example in which the insulator 250 has a stacked structure including an insulator 250a on the oxide semiconductor 230, an insulator 250d on the insulator 250a, an insulator 250b on the insulator 250d, and an insulator 250c on the insulator 250b. That is, the insulator 250 shown in FIG. 10A is obtained by swapping the positions of the insulators 250b and 250d in the insulator 250 shown in FIG. 4B . For example, the insulator 250a may be made of aluminum oxide with a thickness of 1 nm, the insulator 250d may be made of hafnium zirconium oxide or hafnium zirconium oxide containing yttrium with a thickness of 2 nm, the insulator 250b may be made of silicon oxide with a thickness of 2 nm, and the insulator 250c may be made of silicon nitride with a thickness of 1 nm. Alternatively, the insulator 250d may have a structure in which a layer of hafnium zirconium oxide is stacked on a layer of hafnium zirconium oxide containing yttrium. However, the insulators 250a to 250d are not limited to the above, and the insulating materials described above can be selected as appropriate for the insulators 250a to 250d, and the film thicknesses of the insulators 250a to 250d can also be selected as appropriate. By stacking the insulators 250a to 250d as shown in Figure 10A, the insulator 250a and the insulator 250d, which have the function of capturing or fixing hydrogen, are provided adjacent to each other, which enables more effective capture and fixation of hydrogen.

[0144] 10B , the positions of the insulator 250c and the insulator 250b can be swapped. In this case, the insulator 250 has a stacked structure including the insulator 250a on the oxide semiconductor 230, the insulator 250d on the insulator 250a, the insulator 250c on the insulator 250d, and the insulator 250b on the insulator 250c.

[0145] 10A , the insulator 250c can be provided in contact with both the top and bottom surfaces of the insulator 250b. In this case, as shown in FIG. 10C , the insulator 250 has a stacked structure including an insulator 250a on the oxide semiconductor 230, an insulator 250d on the insulator 250a, an insulator 250c1 on the insulator 250d, an insulator 250b on the insulator 250c1, and an insulator 250c2 on the insulator 250b. The insulators 250c1 and 250c2 may be any of the insulators that can be used for the insulator 250c. For example, the insulators 250c1 and 250c2 may each be made of silicon nitride with a thickness of 1 nm.

[0146] 10D shows an example in which the insulator 250 has a stacked structure including an insulator 250a on the oxide semiconductor 230, an insulator 250b on the insulator 250a, an insulator 250d1 on the insulator 250b, an insulator 250d1 on the insulator 250d1, and an insulator 250d2 on the insulator 250c. That is, the insulator 250 shown in FIG. 10D has a configuration in which insulators that can be used for the insulator 250d are provided in contact with the upper and lower surfaces of the insulator 250c in the insulator 250 shown in FIG. 4B . Here, an insulator that has the function of capturing or fixing hydrogen (e.g., hafnium oxide) can be used for the insulator 250d1, and an insulator that has ferroelectricity (e.g., hafnium zirconium oxide or hafnium zirconium oxide containing yttrium) can be used for the insulator 250d2. Alternatively, the insulator 250d2 may have a structure in which a layer of hafnium zirconium oxide is stacked on a layer of hafnium zirconium oxide containing yttrium. By using a ferroelectric material for the insulator 250d2 with such a structure, the transistor 200 can function as an FeFET. Furthermore, since the insulator 250d1 can capture or fix hydrogen, the electrical characteristics and reliability of the transistor 200 can be improved.

[0147] Furthermore, when an insulator 250d2 is formed and a ferroelectric material such as hafnium zirconium oxide is used for the insulator 250d2, a conductor 252 can be provided in contact with the underside of the insulator 250d2, as shown in FIG. 10E. The conductor 252 is preferably made of a material that easily generates polarization in the insulator 250d2, such as titanium nitride. In this case, the lower portion of the conductor 260 that contacts the insulator 250d2 (e.g., conductor 260a) is also preferably made of titanium nitride. This configuration allows the insulator 250d2 to be a ferroelectric, allowing the transistor 200 to function as an FeFET.

[0148] The insulator 224, together with the insulators 221 and 222, functions as a second gate insulator.

[0149] The insulator 224 in contact with the oxide semiconductor 230 can be formed using any of the insulating materials described in <<Insulators>>. The insulator 224 preferably contains, for example, silicon oxide or silicon oxynitride. This allows oxygen to be supplied from the insulator 224 to the oxide semiconductor 230, thereby reducing oxygen vacancies. Note that the insulator 224 may have a stacked structure of two or more layers. In this case, the insulator 224 is not limited to a stacked structure made of the same material, and may have a stacked structure made of different materials.

[0150] 1A, the insulator 224 includes impurities 220. When the insulator 224 includes silicon oxide or silicon oxynitride, the impurities 220 preferably include nitrogen. For example, nitrogen dioxide can be used as the impurities 220. It is preferable that at least a portion of the impurities 220 is not bonded to the insulator 224. For example, NOx as the impurities 220 ２ is the SiO contained in the insulator 224 ２ Located between the grid.

[0151] One of the transition levels of the impurity 220 in the insulator 224 is preferably located above the upper edge of the valence band of the oxide semiconductor 230 and below the lower edge of the conduction band of the oxide semiconductor 230. Here, the transition level is preferably a transition level between a zero charge state and a negative charge state. By providing such an impurity 220 in the insulator 224, electrons injected from the conductor 260 serving as the gate electrode can be trapped by the impurity 220, and the impurity 220 can function as a negative fixed charge. This allows a negative fixed charge to be provided near the top surface of the insulator 224, that is, on the back channel side of the transistor 200.

[0152] When a negative fixed charge is provided on the back channel side of the transistor 200, a larger potential needs to be supplied to the conductor 260 to turn on the transistor 200. That is, when the impurity 220 in the insulator 224 becomes a negative fixed charge, the threshold voltage of the transistor 200 can be shifted in the positive direction. This makes it possible to provide a semiconductor device having normally-off characteristics and favorable electrical characteristics.

[0153] The impurities 220 in the insulator 224 can be evaluated by ESR measurement, TDS analysis, or the like. For example, when silicon oxide or silicon oxynitride is used for the insulator 224 and nitrogen dioxide is added as the impurities 220, the impurities 220 can be evaluated by ESR measurement. The spin density corresponding to the absorption peak of the g-value of 1.94 or more and 2.05 or less obtained by ESR measurement of the insulator 224 is 4.8×10 −３ spins / nm ３ Above 1.0 x 10 −２ spins / nm ３ is less than or equal to 7.38×10 −３ spins / nm ３ Above 1.0 x 10 −２ spins / nm ３ When the absorption peak of the ESR obtained from the insulator 224 containing the impurity 220 has the above value, the threshold voltage of the transistor 200 can be set to 0 V or higher. Furthermore, the process of adding the impurity 220 can be performed efficiently, thereby improving the productivity of the semiconductor device.

[0154] The insulator 224 preferably contains excess oxygen. When heat treatment is performed in a state in which the insulator 224 contains excess oxygen, oxygen is diffused from the insulator 224 to the oxide semiconductor 230, and oxygen vacancies (V Ｏ ) can be reduced.

[0155] When YSZ or the like is used for the layer 227 shown in FIG. 6 and the like, a layer 227 with low oxygen permeability may be provided between the insulator 224 and the oxide semiconductor 230. In this case, oxygen can also be supplied from the insulator 224 to the oxide semiconductor 230 through the insulator 250, as shown in FIG. 8 . FIG. 8 is a cross-sectional view of the channel formation region of the transistor 200 taken along the A3-A4 direction. The arrows in FIG. 8 indicate the main diffusion direction of oxygen: oxygen contained in the insulator 224 diffuses into the insulator 250 in contact with the side surface of the insulator 224, and oxygen contained in the insulator 250 diffuses into the oxide semiconductor 230 from the top surface and side surface of the oxide semiconductor 230.

[0156] Here, the insulator 250 is in contact with the channel formation region of the oxide semiconductor 230 and its vicinity. As a result, oxygen supplied from the insulator 250 is concentrated in the channel formation region of the oxide semiconductor 230 and its vicinity, and the amount of oxygen supplied to the source and drain regions of the oxide semiconductor 230 is reduced. Therefore, excessive oxidation of the source and drain regions of the oxide semiconductor 230 can be prevented, and the carrier concentration in the source or drain region can be reduced, thereby preventing a decrease in the on-state current and field-effect mobility of the transistor 200.

[0157] Furthermore, it is preferable to use indium oxide for the oxide semiconductor 230 (particularly, the oxide semiconductor 230b). Indium oxide has high oxygen permeability, for example, higher than that of indium gallium zinc oxide. Therefore, by using indium oxide for the oxide semiconductor 230 (particularly, the oxide semiconductor 230b), oxygen vacancies in the oxide semiconductor 230 can be reduced by oxygen supplied from the insulator 224, and excess oxygen can be diffused from the oxide semiconductor 230. This prevents excessive oxygen from being contained in the oxide semiconductor 230, thereby preventing the threshold voltage of the transistor 200 from becoming excessively high. Therefore, the electrical characteristics and reliability of the transistor 200 including the oxide semiconductor 230 can be improved.

[0158] Furthermore, oxygen diffused from the oxide semiconductor 230 may be absorbed by structures around the oxide semiconductor 230, such as the insulator 250, the conductor 240, or the conductor 260. For example, the oxygen is absorbed when an oxide containing hafnium, such as hafnium oxide, is used for the insulator 250d, or when a metal, such as tungsten, is used for the conductors 240a and 240b. In this way, by absorbing the oxygen diffused from the oxide semiconductor 230 into the structures around the oxide semiconductor 230, it is possible to prevent the oxygen from being absorbed again by the oxide semiconductor 230 and to prevent an excessive amount of oxygen from being contained in the oxide semiconductor 230.

[0159] Similarly to the oxide semiconductor 230, the insulator 224 is preferably processed into an island shape. Thus, when a plurality of transistors 200 are provided, each transistor 200 has an insulator 224 of approximately the same size. As a result, the amount of oxygen supplied from the insulator 224 to the oxide semiconductor 230 in each transistor 200 becomes approximately the same. Therefore, variation in the electrical characteristics of the transistors 200 within the substrate surface can be suppressed.

[0160] The insulator 224 does not necessarily have to be processed into an island shape. For example, as shown in Figures 11A to 11D, the insulator 224 may not be formed into an island shape, but may have a shape in which an opening is formed in a part of it. Figures 11A to 11D correspond to Figures 3A to 3D, respectively, and are similar to Figures 3A to 3D except for the shape of the insulator 224.

[0161] 11A to 11D , the thickness of a region that does not overlap with the oxide semiconductor 230 is thinner than the thickness of a region that overlaps with the oxide semiconductor 230. An opening is formed in a region that does not overlap with the oxide semiconductor 230 and overlaps with the insulator 250. When multiple transistors are provided over the same substrate, forming the insulator 224 in this manner allows the oxide semiconductor 230 of each transistor to be formed over the same insulator 224. This can reduce variation in the amount of oxygen supplied from the insulator 224 to the oxide semiconductor 230 of each transistor. Therefore, variation in the electrical characteristics of each transistor can be reduced.

[0162] 11A to 11D , an opening is formed in a region that does not overlap with the oxide semiconductor 230 and overlaps with the insulator 250. However, the opening may not be provided. For example, as shown in FIG. 12 , the insulator 224 can be formed to cover the insulator 222. FIG. 12 is a cross-sectional view of the channel formation region of the transistor 200 taken along the A3-A4 direction. The arrows in FIG. 12 indicate the main diffusion direction of oxygen. Oxygen contained in the insulator 224 diffuses into the insulator 250 in contact with the side surface of the insulator 224, and oxygen contained in the insulator 250 diffuses into the oxide semiconductor 230 from the top surface and side surface of the oxide semiconductor 230. As shown in FIG. 12 , forming the insulator 224 to cover the insulator 222 increases the contact area between the insulator 224 and the insulator 250, thereby increasing the amount of oxygen that diffuses.

[0163] Furthermore, the insulator 224 that satisfies the above spin density is not limited to the vicinity of the transistor 200. It is preferable that the insulator 224 has the above spin density in the region surrounding the transistor 200, for example, the region where the marker is formed or the region where the electrode pad is formed.

[0164] Furthermore, the spin density is not necessarily uniform throughout the insulator 224. For example, the spin density may have a peak in the upper layer of the insulator 224 (which may also be referred to as the vicinity of the oxide semiconductor 230 or the insulator 275) and decrease toward the lower layer of the insulator 224 (which may also be referred to as the vicinity of the insulator 222). For example, the spin density may have a peak in the lower layer of the insulator 224 and decrease toward the upper layer of the insulator. For example, the spin density may have a peak between the upper and lower layers of the insulator 224 and decrease toward the upper and lower layers of the insulator 224.

[0165] In the transistor 200, the conductor 205 is arranged to overlap with the oxide semiconductor 230 and the conductor 260. The conductor 205 can be formed using any of the conductive materials described in the section <<Conductor>>. Here, the conductor 205 is preferably provided so as to be embedded in an opening formed in the insulator 216. Furthermore, the conductor 205 is preferably provided to extend in the channel width direction as shown in FIGS. 3A and 3C . With this structure, the conductor 205 functions as a wiring when a plurality of transistors are provided.

[0166] 4A, the conductor 205 preferably includes conductor 205a and conductor 205b. The conductor 205a is provided in contact with the bottom surface and sidewall of the opening. The conductor 205b is provided so as to fill a recess in the conductor 205a formed along the opening. Here, the height of the upper surface of the conductor 205 coincides with or approximately coincides with the height of the upper surface of the insulator 216.

[0167] Here, the conductor 205a is composed of hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, and nitrogen oxide molecules (N ２ O, NO, NO ２It is preferable to have a conductive material that has a function of suppressing the diffusion of impurities such as copper atoms, etc. Alternatively, it is preferable to have a conductive material that has a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms and oxygen molecules, etc.).

[0168] By using a conductive material that can reduce hydrogen diffusion for the conductor 205a, impurities such as hydrogen contained in the conductor 205b can be prevented from diffusing into the oxide semiconductor 230 via the insulator 216 or the like. Furthermore, by using a conductive material that can suppress oxygen diffusion for the conductor 205a, it is possible to prevent the conductor 205b from being oxidized and its conductivity from decreasing. Examples of conductive materials that can suppress oxygen diffusion include titanium, titanium nitride, tantalum, tantalum nitride, ruthenium, and ruthenium oxide. The conductor 205a can have a single-layer structure or a stacked-layer structure of the above conductive materials. For example, the conductor 205a preferably contains titanium nitride.

[0169] The conductor 205b is preferably made of a conductive material containing tungsten, copper, or aluminum as a main component. For example, the conductor 205b preferably contains tungsten.

[0170] The conductor 205 can function as a second gate electrode. In this case, the threshold voltage (Vth) of the transistor 200 can be controlled by changing the potential applied to the conductor 205 independently of the potential applied to the conductor 260. In particular, applying a negative potential to the conductor 205 can increase the Vth of the transistor 200 and reduce the off-state current. Therefore, applying a negative potential to the conductor 205 can reduce the drain current when the potential applied to the conductor 260 is 0 V compared to when a negative potential is not applied.

[0171] Furthermore, as described above, it is preferable to add the impurity 220 to the insulator 224 to form a negative fixed charge in the insulator 224. With such a structure, the threshold voltage of the transistor 200 can be controlled by the conductor 205 and the insulator 224. Therefore, a semiconductor device having normally-off characteristics can be provided.

[0172] The electrical resistivity of the conductor 205 is designed taking into consideration the potential applied to the conductor 205, and the film thickness of the conductor 205 is set to match the electrical resistivity. The film thickness of the insulator 216 is approximately the same as that of the conductor 205. Here, it is preferable to make the film thicknesses of the conductor 205 and the insulator 216 thin within the range permitted by the design of the conductor 205. By making the film thickness of the insulator 216 thin, the absolute amount of impurities such as hydrogen contained in the insulator 216 can be reduced, and therefore, diffusion of the impurities into the oxide semiconductor 230 can be suppressed.

[0173] 4A shows a stacked structure of the conductor 205a and the conductor 205b, but the present invention is not limited to this. The conductor 205 may have a single-layer structure or a stacked structure of three or more layers. For example, the conductor 205a may have a two-layer structure of tantalum nitride and titanium nitride on the tantalum nitride, and the conductor 205b containing tungsten may be provided on the conductor 205a. This structure can prevent impurities such as hydrogen and metal impurities such as copper contained in the lower layer of the transistor 200 from diffusing into the conductor 205.

[0174] Note that if the threshold voltage of the transistor 200 can be sufficiently controlled by the negative fixed charge due to the impurity 220 in the insulator 224, a structure without the conductor 205 functioning as the second gate electrode can be used, as shown in FIGS. 13A to 13D . In this case, the insulators 216, 214, and 212 can also be omitted, as shown in FIGS. 13A to 13D . Here, FIGS. 13A to 13D correspond to FIGS. 3A to 3D , respectively, and are similar to FIGS. 3A to 3D except that the conductor 205, the insulator 216, the insulator 214, and the insulator 212 are not provided. Such a structure can simplify the structure of the semiconductor device and improve the productivity of the semiconductor device.

[0175] Furthermore, in the above-described structure in which the conductor 205 is not provided, the insulator 224 may be further provided so as to extend in the substrate plane, as shown in FIGS. 14A to 14D . Alternatively, the oxide semiconductors 230 of the plurality of transistors 200 may be provided over the insulator 224. In this case, as shown in FIGS. 14A to 14D , the insulators 222 and 221 may also not be provided. Here, FIGS. 14A to 14D correspond to FIGS. 13A to 13D , respectively, and are similar to FIGS. 13A to 13D except that the insulator 224 is provided so as to extend in the substrate plane and that the insulators 222 and 221 are not provided. Such a structure can simplify the structure of the semiconductor device and improve the productivity of the semiconductor device.

[0176] Here, the insulator 224 preferably has high flatness. For example, the insulator 224 preferably has a surface with an average surface roughness Ra of 3 nm or less, preferably 2 nm or less, and more preferably 1 nm or less. By forming the oxide semiconductor 230 on such a surface, an oxide semiconductor with high crystallinity can be formed. Furthermore, when using such an insulator 224 with high flatness, the crystal structure of the insulator 224 is not limited. For example, the insulator 224 may have a crystalline structure or an amorphous structure. Furthermore, the insulator 224 may function as a substrate on which a semiconductor device is provided. Note that the average surface roughness Ra is a three-dimensional extension of the arithmetic mean roughness defined in JIS B 0601:2001 (ISO 4287:1997) so that it can be applied to curved surfaces. The average surface roughness Ra can be evaluated using an atomic force microscope (AFM).

[0177] The conductive materials described in the <<Conductor>> section can be used for the conductors 242a, 242b, and 260. In particular, it is preferable to use a conductive material that is resistant to oxidation or a conductive material that has the function of suppressing oxygen diffusion for the conductors 242a, 242b, and 260. Examples of such conductive materials include conductive materials containing nitrogen and conductive materials containing oxygen. This can suppress a decrease in the conductivity of the conductors 242a, 242b, and 260. When a conductive material containing metal and nitrogen is used for the conductors 242a, 242b, and 260, the conductors 242a, 242b, and 260 become conductors containing at least metal and nitrogen.

[0178] It is preferable to use a metal nitride for the conductors 242a and 242b, such as a nitride containing tantalum, a nitride containing titanium, a nitride containing molybdenum, a nitride containing tungsten, a nitride containing tantalum and aluminum, or a nitride containing titanium and aluminum. For example, tantalum nitride can be used for the conductors 242a and 242b. Alternatively, for example, ruthenium, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, or an oxide containing lanthanum and nickel may be used. These materials are preferable because they are conductive materials that are resistant to oxidation or that maintain their conductivity even when they absorb oxygen.

[0179] Note that hydrogen contained in the oxide semiconductor 230 or the like might diffuse to the conductor 242a or the conductor 242b. In particular, when a nitride containing tantalum is used for the conductor 242a and the conductor 242b, hydrogen contained in the oxide semiconductor 230 or the like might diffuse easily to the conductor 242a or the conductor 242b, and the diffused hydrogen might bond with nitrogen contained in the conductor 242a or the conductor 242b. In other words, hydrogen contained in the oxide semiconductor 230 or the like might be absorbed by the conductor 242a or the conductor 242b.

[0180] The conductors 242a and 242b may have a stacked structure. In this case, the above-mentioned conductive material may be used for the lower layers of the conductors 242a and 242b, and a conductive material with higher conductivity may be used for the upper layers of the conductors 242a and 242b. For example, tantalum nitride may be used for the lower layer and tungsten for the upper layer. Furthermore, as shown in FIG. 9B , the conductor 242a may have a stacked structure of a conductor 242a1 and a conductor 242a2 on the conductor 242a1, and the conductor 242b may have a stacked structure of a conductor 242b1 and a conductor 242b2 on the conductor 242b1. An oxide semiconductor 230ca may be provided below the conductor 242a1, and an oxide semiconductor 230cb may be provided below the conductor 242b1. The conductors 242a1 and 242b1 may be made of the above-mentioned conductive materials that are resistant to oxidation or conductive materials that have the function of suppressing oxygen diffusion. Furthermore, the conductor 242a2 and the conductor 242b2 may be made of a conductive material having higher conductivity than the conductor 242a1 and the conductor 242b1.

[0181] The insulators 271a and 271b are inorganic insulators that function as etching stoppers and protect the conductors 242a and 242b when processing the conductors 242a and 242b. Furthermore, since the insulators 271a and 271b contact the conductors 242a and 242b, they are preferably inorganic insulators that are less likely to oxidize the conductors 242a and 242b. Therefore, as shown in FIG. 4A , it is preferable that the insulator 271a has a layered structure of an insulator 271a1 and an insulator 271a2 on the insulator 271a1, and the insulator 271b has a layered structure of an insulator 271b1 and an insulator 271b2 on the insulator 271b1. Here, the insulators 271a1 and 271b1 are preferably made of a nitride insulator that can be used for the insulator 250c so as to prevent oxidation of the conductors 242a and 242b. The insulators 271a2 and 271b2 are preferably made of an oxide insulator that can be used for the insulator 250b so as to function as an etching stopper.

[0182] Here, the insulator 271a1 is in contact with the upper surface of the conductor 242a and a portion of the insulator 275, and the insulator 271b1 is in contact with the upper surface of the conductor 242b and a portion of the insulator 275. The insulator 271a2 is in contact with the upper surface of the insulator 271a1 and a lower surface of the insulator 275, and the insulator 271b2 is in contact with the upper surface of the insulator 271b1 and a lower surface of the insulator 275. For example, silicon nitride can be used as the insulators 271a1 and 271b1, and silicon oxide can be used as the insulators 271a2 and 271b2.

[0183] The insulators that form the insulators 271a and 271b function as masks for the conductors that form the conductors 242a and 242b. Therefore, as shown in FIG. 3D , the conductors 242a and 242b do not have curved surfaces between their side surfaces and top surfaces. As a result, the ends where the side surfaces and top surfaces of the conductors 242a and 242b intersect are angular. The angular ends where the side surfaces and top surfaces of the conductors 242a and 242b intersect are larger in cross-sectional area than when the ends have curved surfaces. Furthermore, using a nitride insulator that does not easily oxidize metals for the insulators 271a1 and 271b1 can prevent the conductors 242a and 242b from being excessively oxidized. As a result, the resistance of the conductors 242a and 242b is reduced, thereby increasing the on-state current of the transistor.

[0184] 3B and 3C , the conductor 260 is disposed in openings formed in the insulators 280 and 275. The conductor 260 is disposed in the openings so as to cover the top surface of the insulator 222, the side surface of the insulator 224, and the side surfaces and top surface of the oxide semiconductor 230 via the insulator 250. The top surface of the conductor 260 is disposed so as to be flush or substantially flush with the top end of the insulator 250 and the top surface of the insulator 280.

[0185] In the opening in which the conductor 260 and the insulator 250 are disposed, the sidewall of the opening may be perpendicular or approximately perpendicular to the upper surface of the insulator 222, or may be tapered. By tapering the sidewall, the coverage of the insulator 250 provided in the opening of the insulator 280 is improved, and defects such as voids can be reduced.

[0186] The conductor 260 functions as a first gate electrode of the transistor 200. Here, the conductor 260 is preferably provided to extend in the channel width direction, as shown in Figures 3A and 3C. With this configuration, when a plurality of transistors are provided, the conductor 260 functions as a wiring.

[0187] 3C , in a cross-sectional view of the transistor 200 in the channel width direction, a curved surface may be formed between the side surface of the oxide semiconductor 230 and the top surface of the oxide semiconductor 230. In other words, the end portions of the side surface and the top surface may be curved (hereinafter also referred to as rounded).

[0188] The radius of curvature of the curved surface is preferably greater than 0 nm and smaller than the film thickness of the oxide semiconductor 230 in the region overlapping with the conductors 242a and 242b, or smaller than half the length of the region not having the curved surface. Specifically, the radius of curvature of the curved surface is greater than 0 nm and smaller than 20 nm, preferably greater than or equal to 1 nm and smaller than or equal to 15 nm, and further preferably greater than or equal to 2 nm and smaller than or equal to 10 nm. Such a shape can improve the coverage of the oxide semiconductor 230 with the insulator 250 and the conductor 260.

[0189] In this specification, a transistor structure in which a channel formation region is electrically surrounded by the electric field of at least the first gate electrode is referred to as a surrounded channel (S-channel) structure. The S-channel structure disclosed in this specification is different from the Fin structure and the planar structure. On the other hand, the S-channel structure disclosed in this specification can also be considered as a type of Fin structure. In this specification, a Fin structure refers to a structure in which a gate electrode is disposed so as to surround at least two or more sides of the channel (specifically, two, three, or four sides, etc.). By employing the Fin structure and the S-channel structure, resistance to the short channel effect can be increased, in other words, a transistor in which the short channel effect is less likely to occur can be obtained.

[0190] By forming the transistor 200 in the S-channel structure, the channel formation region can be electrically surrounded. Note that the S-channel structure electrically surrounds the channel formation region, and therefore, can be said to be substantially equivalent to a gate all around (GAA) structure or a lateral gate all around (LGAA) structure. By forming the transistor 200 in the S-channel structure, the GAA structure, or the LGAA structure, the channel formation region formed at or near the interface between the oxide semiconductor 230 and the gate insulator can be the entire bulk of the oxide semiconductor 230. Therefore, the current density flowing through the transistor can be improved, which is expected to result in an increase in the on-state current or the field-effect mobility of the transistor.

[0191] In this embodiment, the insulator 224 is provided in an island shape. Therefore, as shown in FIG. 3C , at least a part of the bottom surface of the conductor 260 can be provided below the bottom surface of the oxide semiconductor 230. This allows the conductor 260 to be provided facing the top surface and side surface of the oxide semiconductor 230, and therefore the electric field of the conductor 260 can act on the top surface and side surface of the oxide semiconductor 230. By providing the insulator 224 in an island shape in this manner, the transistor 200 can have an S-channel structure.

[0192] 3C illustrates an example of a transistor with an S-channel structure, but the semiconductor device of one embodiment of the present invention is not limited to this. For example, the transistor structure that can be used in one embodiment of the present invention may be one or more selected from a planar structure, a Fin structure, and a GAA structure.

[0193] As shown in Fig. 4A, it is preferable that the conductor 260 has a two-layer structure. Here, it is preferable that the conductor 260 has a conductor 260a and a conductor 260b arranged on the conductor 260a. For example, it is preferable that the conductor 260a is arranged so as to surround the bottom and side surfaces of the conductor 260b. In this case, it is preferable to use a conductive material that is resistant to oxidation or a conductive material that has the function of suppressing oxygen diffusion as the conductor 260a.

[0194] The conductor 260a is preferably made of a conductive material that has a function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules, copper atoms, etc. Alternatively, it is preferably made of a conductive material that has a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms and oxygen molecules).

[0195] Furthermore, since the conductor 260a has the function of suppressing oxygen diffusion, it is possible to suppress a decrease in conductivity due to oxidation of the conductor 260b caused by oxygen contained in the insulator 280, etc. As a conductive material having the function of suppressing oxygen diffusion, it is preferable to use, for example, titanium, titanium nitride, tantalum, tantalum nitride, ruthenium, ruthenium oxide, or the like.

[0196] The conductor 260b is preferably made of a highly conductive material. For example, the conductor 260b may be made of a conductive material containing tungsten, copper, or aluminum as a main component. The conductor 260b may also have a layered structure, such as a layered structure of titanium or titanium nitride and the above conductive material.

[0197] In the transistor 200, the conductor 260 is formed in a self-aligned manner to fill an opening formed in the insulator 280 or the like. By forming the conductor 260 in this manner, the conductor 260 can be arranged to overlap the region between the conductor 242 a and the conductor 242 b without alignment.

[0198] The insulators 216, 280, and 285 preferably have a lower dielectric constant than the insulator 222. By using a material with a low dielectric constant as an interlayer film, parasitic capacitance between wirings can be reduced.

[0199] For example, it is preferable that insulators 216, 280, and 285 each have one or more of silicon oxide, silicon oxynitride, silicon oxide doped with fluorine, silicon oxide doped with carbon, silicon oxide doped with carbon and nitrogen, and silicon oxide having vacancies.

[0200] In particular, silicon oxide and silicon oxynitride are preferred because they are thermally stable. In particular, materials such as silicon oxide, silicon oxynitride, and silicon oxide having vacancies are preferred because they can easily form regions containing oxygen that is desorbed by heating.

[0201] Furthermore, the top surfaces of the insulators 216 and 280 may each be flattened.

[0202] It is preferable that the concentration of impurities such as water and hydrogen be reduced in the insulator 280. For example, it is preferable that the insulator 280 have an oxide containing silicon, such as silicon oxide or silicon oxynitride.

[0203] The conductive materials described in the section "Conductors" can be used for the conductors 240a and 240b. The conductive materials for the conductors 240a and 240b are preferably made of a conductive material containing, for example, tungsten, copper, or aluminum as a main component. The conductors 240a and 240b may also have a layered structure.

[0204] For example, as shown in Fig. 4A, the conductor 240a and the conductor 240b may have a two-layer laminated structure. The conductor 240a has a conductor 240a1 formed along the opening and a conductor 240a2 formed inside the conductor 240a1. The conductor 240b has a conductor 240b1 formed along the opening and a conductor 240b2 formed inside the conductor 240b1.

[0205] Like the conductor 205a, the conductor 240a1 and the conductor 240b1 are preferably made of a conductive material that has a function of suppressing the permeation of impurities such as water and hydrogen. For example, tantalum, tantalum nitride, titanium, titanium nitride, ruthenium, ruthenium oxide, or the like is preferably used. Furthermore, the conductive material that has a function of suppressing the permeation of impurities such as water and hydrogen may be used in a single layer or a stacked layer. Providing the conductor 240a1 and the conductor 240b1 can suppress impurities such as water and hydrogen from entering the oxide semiconductor 230 through the conductor 240a2 and the conductor 240b2. Note that the conductor 240a2 and the conductor 240b2 may be made of the conductive materials that can be used for the conductor 240a and the conductor 240b.

[0206] 3B, the upper surfaces of the conductors 240a and 240b may be formed to coincide or approximately coincide with the upper surface of the insulator 285. Also, as shown in FIG. 4A, the lower portion of the conductor 240a may be formed to be embedded in the conductor 242a. Similarly, the lower portion of the conductor 240b may be formed to be embedded in the conductor 242b.

[0207] The insulators 241a and 241b may be a barrier insulator that can be used for the insulator 275, for example. For example, silicon nitride may be used for the insulators 241a and 241b. The insulators 241a and 241b are provided in contact with the insulators 285, 283, 282, 275, 271a, and 271b. This can prevent impurities such as water and hydrogen contained in the insulator 280 and the like from being mixed into the oxide semiconductor 230 through the conductors 240a and 240b. Silicon nitride is particularly suitable because it has a high blocking property against hydrogen. Furthermore, oxygen contained in the insulator 280 can be prevented from being absorbed by the conductors 240a and 240b.

[0208] The insulators 241a and 241b may have a stacked structure. In this case, it is preferable that a first insulator in contact with the sidewall of an opening, such as the insulator 280, and a second insulator on the inner side thereof be a combination of a barrier insulator against oxygen and a barrier insulator against hydrogen.

[0209] 3A and the like show a configuration in which the widths of the conductors 240a and 240b in a top view are smaller than the width of the channel formation region of the oxide semiconductor 230 in a top view; however, the present invention is not limited to this. For example, as shown in FIGS. 15A to 15D , the widths of the conductors 240a and 240b in a top view can also be larger than the width of the channel formation region of the oxide semiconductor 230 in a top view. FIGS. 15A to 15D correspond to FIGS. 3A to 3D , respectively, and are similar to FIGS. 3A to 3D except that the top shapes of the insulator 224, the oxide semiconductor 230, the conductor 242a, the conductor 242b, the insulator 271a, the insulator 271b, the conductor 240a, and the conductor 240b are different.

[0210] As shown in FIG. 15A and other figures, the width L4 of the source region (drain region) of the oxide semiconductor 230 in the A5-A6 direction as viewed from above is preferably larger than the width L3 of the oxide semiconductor 230 in the A3-A4 direction near the channel formation region thereof. Note that the width L3 can also be referred to as the width of the oxide semiconductor 230 in the A3-A4 direction in a region overlapping with the conductor 260 as viewed from above. The width L4 can also be referred to as the width of the oxide semiconductor 230 in the A5-A6 direction in a region overlapping with the conductor 240a (conductor 240b) as viewed from above. This configuration can increase the margin for forming openings for embedding the wide conductors 240a and 240b. This can improve the productivity of the semiconductor device. Furthermore, the contact area between the conductor 240a (conductor 240b) and the conductor 242a (conductor 242b) can be increased, thereby reducing contact resistance. Furthermore, the contact area between the conductor 242a (the conductor 242b) and the oxide semiconductor 230 can be increased, and the contact resistance can be reduced. As a result, the on-state current of the transistor 200 can be increased, and the electrical characteristics of the semiconductor device can be improved.

[0211] Note that as shown in FIG. 15A , the insulator 224, the conductors 242a, 242b, the insulators 271a, and the insulators 271b are preferably formed so as to overlap with the top surface of the oxide semiconductor 230.

[0212] 3B and other figures, the insulator 250 is in contact with the side surface of the insulator 280 at the opening provided in the insulator 280. However, the present invention is not limited to this configuration. For example, an insulator may be provided between the insulator 250 and the insulator 280 at the opening.

[0213] Modifications of the semiconductor device described in <Configuration Example of Semiconductor Device> will be described with reference to Figures 16A to 17C. Figures 16A to 16D are plan views and cross-sectional views of a semiconductor device including a transistor 200, and correspond to the plan views and cross-sectional views shown in Figures 3A to 3D, respectively. Figures 17A to 17C are enlarged cross-sectional views of the transistor 200 in the channel length direction, and correspond to the enlarged cross-sectional view shown in Figure 4B.

[0214] 16A to 16D is a modified example of the transistor 200 shown in Figures 3A to 3D. Specifically, the transistor 200 shown in Figures 16A to 16D is mainly different from the transistor 200 shown in Figures 3A to 3D in that an insulator 255 is provided between the insulator 280 and the insulator 250. Hereinafter, differences from the above description of <Configuration example of semiconductor device> will be mainly described, and overlapping parts will be referred to and may not be described again.

[0215] 16, the conductors 242a and 242b are each shown as having a two-layer structure. The conductor 242a has a layered structure of a conductor 242a1 and a conductor 242a2 on the conductor 242a1. The conductor 242b has a layered structure of a conductor 242b1 and a conductor 242b2 on the conductor 242b1. The conductors 242a1 and 242b1 correspond to the lower layers of the conductors 242a and 242b, respectively, and the conductors 242a2 and 242b2 correspond to the upper layers of the conductors 242a and 242b, respectively.

[0216] 16B and 16C , the insulator 255 is disposed inside an opening formed in the insulator 280 or the like, and contacts the side surface of the insulator 280, the side surface of the conductor 242a2, the side surface of the conductor 242b2, the top surface of the conductor 242a1, the top surface of the conductor 242b1, and the top surface of the insulator 222 in the opening. In other words, the insulator 255 can be said to be formed in a sidewall shape in contact with the side wall of the opening formed in the insulator 280 or the like. Here, the side wall of the opening corresponds to, for example, the side surface of the insulator 280 or the like in the opening.

[0217] Furthermore, the insulator 250 contacts the side surface of the insulator 255 .

[0218] The insulator 255 preferably has a barrier property against oxygen. The insulator 255 having a barrier property against oxygen can prevent the side surfaces of the conductor 242a and the conductor 242b from being oxidized and an oxide film from being formed on the side surfaces. This can prevent a decrease in the on-state current or the field-effect mobility of the transistor 200. The insulator 255 can be a barrier insulator that can be used for the insulator 275, for example. For example, silicon nitride can be used as the insulator 255.

[0219] The opening in the insulator 280 overlaps the region between the conductors 242a2 and 242b2. In a top view, the side surfaces of the insulator 280 at the opening coincide or substantially coincide with the side surfaces of the conductors 242a2 and 242b2. Furthermore, portions of the conductors 242a1 and 242b1 are formed to protrude into the openings. In other words, the portion of the conductor 242a1 on whose upper surface the insulator 255 is formed (hereinafter, sometimes referred to as the protruding portion of the conductor 242a1) protrudes toward the conductor 260 more than the conductor 242a2. Similarly, the portion of the conductor 242b1 on whose upper surface the insulator 255 is formed (hereinafter, sometimes referred to as the protruding portion of the conductor 242b1) protrudes toward the conductor 260 more than the conductor 242b2.

[0220] Here, part of the top surface of the conductor 242a1 is in contact with the conductor 242a2, and part of the top surface of the conductor 242b1 is in contact with the conductor 242b2. Therefore, inside the opening, the insulator 255 is in contact with another part of the top surface of the conductor 242a1, another part of the top surface of the conductor 242b1, a side surface of the conductor 242a2, and a side surface of the conductor 242b2. Furthermore, the insulator 250 is in contact with the top surface of the oxide semiconductor 230, the side surface of the conductor 242a1, the side surface of the conductor 242b1, and the side surface of the insulator 255.

[0221] After dividing the conductive layer into the conductor 242a2 and the conductor 242b2, the insulator 255 is formed by anisotropic etching. The insulator 255 is formed in a sidewall shape in contact with the side wall of the opening provided in the insulator 280. The insulator 255 is formed in contact with the side surface of the conductor 242a2 and the side surface of the conductor 242b2, and has a function of protecting the conductor 242a2 and the conductor 242b2.

[0222] The insulator 255 also functions as a mask when dividing the conductive layer into the conductor 242a1 and the conductor 242b1. Therefore, as shown in FIG. 17A , in a cross-sectional view of the transistor 200, the side edges of the insulator 255 preferably coincide with the side edges of the conductor 242a1 and the conductor 242b1.

[0223] After dividing the conductor 242a1 and the conductor 242b1, it is preferable to perform heat treatment in an oxygen-containing atmosphere before forming the insulator 250. In this case, by forming the insulator 255 in contact with the side surfaces of the conductor 242a2 and the conductor 242b2, it is possible to prevent the conductors 242a2 and 242b2 from being excessively oxidized. Furthermore, even when microwave treatment is performed after dividing the conductor 242a1 and the conductor 242b1, it is possible to prevent the formation of an oxide film on the side surfaces of the conductors 242a and 242b.

[0224] The portions of the insulator 255, the insulator 250, and the conductor 260 that are disposed in the opening formed in the insulator 280 are provided to reflect the shape of the opening. Thus, the insulator 255 is provided to cover the sidewall of the opening, the insulator 250 is provided to cover the bottom of the opening and the insulator 255, and the conductor 260 is provided to fill the recess of the insulator 250.

[0225] As in the above-described <Configuration Example of a Semiconductor Device>, the insulator 250 may have a layered structure. For example, as shown in FIG. 17A , the insulator 250 may have a three-layer structure of insulators 250a, 250b, and 250c. Furthermore, as shown in FIG. 17B , the insulator 250 may have a four-layer structure of insulators 250a, 250b, 250c, and 250d. The insulator 250 is not limited to the structure shown in FIG. 17B , and may be formed by selecting one or more of the insulators 250a, 250b, 250c, and 250d. For example, the insulator 250 may have the structure shown in FIGS. 10A to 10D .

[0226] Furthermore, the film thickness of the insulator 255 is preferably 0.5 nm to 20 nm, more preferably 0.5 nm to 10 nm, and even more preferably 0.5 nm to 3 nm. By setting the insulator 255 to the above film thickness, excessive oxidation of the conductors 242a2 and 242b2 can be suppressed. Note that the insulator 255 only needs to have a region with the above film thickness in at least a portion. Furthermore, since the insulator 255 is provided in contact with the sidewall of the opening formed in the insulator 280 or the like, it is preferable to deposit the insulator 255 using an ALD method or the like, which has good coverage. If the film thickness of the insulator 255 is excessively thick, the deposition time of the insulator 255 by the ALD method increases, reducing productivity. Therefore, it is preferable to keep the film thickness of the insulator 255 within the above range. The insulator 255 preferably has a thickness that does not excessively hinder the diffusion of excess oxygen from the insulator 280 to the insulator 250b and from the insulator 250b to the oxide semiconductor 230.

[0227] As shown in FIG. 17A , in a cross-sectional view of the transistor 200 in the channel length direction, the distance L1 between the conductor 242a1 and the conductor 242b1 is smaller than the distance L2 between the conductor 242a2 and the conductor 242b2. Here, the distance L1 refers to the shortest distance between the conductor 242a1 and the conductor 242b1, and the distance L2 refers to the shortest distance between the conductor 242a2 and the conductor 242b2. This configuration makes it possible to further shorten the distance between the source and the drain, thereby shortening the channel length accordingly. This improves the frequency characteristics of the transistor 200. In this way, miniaturization of the semiconductor device can provide a semiconductor device with improved operating speed.

[0228] 17A , the difference between the distance L2 and the distance L1 is equal to twice the film thickness of the insulator 255. In other words, the distance L2 is equal to the distance L1 obtained by adding twice the film thickness of the insulator 255. Here, the film thickness of the insulator 255 refers to the width of at least a portion of the insulator 255 in the A1-A2 direction.

[0229] The insulator 255 may also have a stacked structure of two or more layers. In this case, at least one layer may be made of the inorganic insulator that is resistant to oxidation. For example, the first insulator of the insulator 255 may be made of the inorganic insulator that is resistant to oxidation, and the second insulator on the first insulator of the insulator 255 may be made of an insulator that is applicable to the insulator 250b (e.g., silicon oxide). The second insulator of the insulator 255 preferably has a lower dielectric constant than the first insulator of the insulator 255. In this way, by making the insulator 255 have a two-layer structure and increasing its thickness, the distance between the conductor 260 and the conductor 242a or conductor 242b can be increased, thereby reducing parasitic capacitance.

[0230] 17B and the like, the oxide semiconductor 230 has a three-layer structure of oxide semiconductors 230a to 230c, but the present invention is not limited to this. For example, as shown in FIG. 18A , the oxide semiconductor 230 may have a two-layer structure of oxide semiconductors 230a and 230b. In this case, the top surface of the oxide semiconductor 230b is in contact with the bottom surface of the insulator 250, the bottom surface of the conductor 242a1, and the bottom surface of the conductor 242b1. Alternatively, the oxide semiconductor 230 may have a single-layer structure of the oxide semiconductor 230b.

[0231] 18B , the oxide semiconductor 230c may be divided in a region overlapping with the insulator 250, forming an oxide semiconductor 230ca and an oxide semiconductor 230cb. Preferably, the top surface of the oxide semiconductor 230ca is in contact with the bottom surface of the conductor 242a1, and the oxide semiconductor 230ca is aligned or substantially aligned with the conductor 242a1 in a top view. Similarly, preferably, the top surface of the oxide semiconductor 230cb is in contact with the bottom surface of the conductor 242b1, and the oxide semiconductor 230cb is aligned or substantially aligned with the conductor 242b1 in a top view. Furthermore, part of the top surface of the oxide semiconductor 230b is in contact with the insulator 250. With this structure, the channel of the transistor 200 can be formed only in the oxide semiconductor 230b, not in the oxide semiconductor 230c. For example, when aluminum oxide is used for the insulator 250a and indium oxide is used for the oxide semiconductor 230b, the aluminum oxide and the indium oxide are in contact with each other at the interface between the insulator 250a and the oxide semiconductor 230b, which can prevent impurity traps from being formed at the interface, thereby improving the on-state current, carrier mobility, and frequency characteristics of the transistor 200.

[0232] 16A to 16D, the layer 227 can be provided between the oxide semiconductor 230 and the insulator 224, as in the above-described case.

[0233] 19A , a layer 227 can be formed between the oxide semiconductor 230 and the insulator 224 in a two-layer structure of an oxide semiconductor 230b and an oxide semiconductor 230c. That is, in the structure shown in FIG. 17B , the layer 227 can be provided instead of the oxide semiconductor 230a. Here, the top surface of the layer 227 is in contact with the bottom surface of the oxide semiconductor 230b. For example, YSZ can be used for the layer 227, indium oxide can be used for the oxide semiconductor 230b, and In—Ga—Zn oxide can be used for the oxide semiconductor 230c.

[0234] 19B , the oxide semiconductor 230 can have a single-layer structure of the oxide semiconductor 230b, and the layer 227 can be formed between the oxide semiconductor 230b and the insulator 224. That is, in the structure shown in FIG. 18A , the layer 227 can be provided instead of the oxide semiconductor 230a. Here, the top surface of the layer 227 is in contact with the bottom surface of the oxide semiconductor 230b. For example, YSZ can be used for the layer 227, and indium oxide can be used for the oxide semiconductor 230b.

[0235] 19C , the oxide semiconductor 230c in the structure shown in FIG. 19A may be divided in a region overlapping with the insulator 250 to form oxide semiconductors 230ca and 230cb. That is, in the structure shown in FIG. 18B , a layer 227 can be provided instead of the oxide semiconductor 230a.

[0236] 19C, the insulator 250 has a four-layer laminated structure of insulators 250a, 250b, 250c, and 250d, but the present invention is not limited to this. For example, as shown in FIG. 20A, the insulator 250 can have a three-layer laminated structure of insulators 250a, 250b, and 250c. Here, it is preferable to use hafnium oxide for the insulator 250a.

[0237] 9A , by using hafnium oxide for the insulator 250a, the insulator 250a containing hafnium oxide can be provided in contact with the oxide semiconductor 230b containing indium oxide in the vicinity of the channel formation region of the transistor 200. Thus, impurities such as hydrogen and excess oxygen in the oxide semiconductor 230b can be reduced, thereby improving the electrical characteristics and reliability of the transistor 200.

[0238] 20B , the conductor 242a2 may be provided on the oxide semiconductor 230ca and the conductor 242b2 may be provided on the oxide semiconductor 230cb without providing the conductor 242a1 and the conductor 242b1. In this case, the bottom surface of the insulator 255 is in contact with the top surface of the oxide semiconductor 230ca and the top surface of the oxide semiconductor 230cb.

[0239] 20A shows a structure in which the layer 227 is provided between the oxide semiconductor 230b and the insulator 224, but the present invention is not limited to this. For example, as shown in FIG. 20C , a structure in which the layer 227 is not provided between the oxide semiconductor 230b and the insulator 224 can be used. In this case, a structure in which the oxide semiconductor 230b is in contact with the top surface of the insulator 224 can be used.

[0240] Although the above describes an example in which the insulator 255 is formed in a sidewall shape by anisotropic etching, the present invention is not limited to this. As shown in Figure 17C, the insulator 255 can also have an opening inside an opening formed in the insulator 280 or the like. In this case, the opening in the insulator 255 can be formed by removing a portion of the insulating film that will become the insulator 255 by lithography. It is preferable that the opening in the insulator 255 overlaps the region between the conductor 242a1 and the conductor 242b1.

[0241] 17C, in a cross-sectional view, a protrusion is formed on the lower part of the insulator 255. The protrusion of the insulator 255 overlaps with the protrusion of the conductor 242a1 and the protrusion of the conductor 242b1.

[0242] 18C , the oxide semiconductor 230c may be divided into oxide semiconductors 230ca and 230cb in a region overlapping with the insulator 250. This can improve the on-state current, carrier mobility, and frequency characteristics of the transistor 200.

[0243] In the transistor 200 illustrated in FIG. 17C , the layer 227 can be provided between the oxide semiconductor 230 and the insulator 224 in a similar manner to the above.

[0244] 21A , a layer 227 can be formed between the insulator 224 and the oxide semiconductor 230 in a two-layer structure of the oxide semiconductor 230b and the oxide semiconductor 230c. That is, in the structure shown in FIG. 17C , the layer 227 can be provided instead of the oxide semiconductor 230a. Here, the top surface of the layer 227 is in contact with the bottom surface of the oxide semiconductor 230b. For example, YSZ can be used for the layer 227, indium oxide can be used for the oxide semiconductor 230b, and In—Ga—Zn oxide can be used for the oxide semiconductor 230c.

[0245] 21B , the oxide semiconductor 230 may have a single-layer structure of an oxide semiconductor 230b, and the layer 227 may be formed between the oxide semiconductor 230b and the insulator 224. Here, the top surface of the layer 227 is in contact with the bottom surface of the oxide semiconductor 230b. For example, YSZ may be used for the layer 227, and indium oxide may be used for the oxide semiconductor 230b.

[0246] 21C , the oxide semiconductor 230c in the structure shown in FIG. 21A may be divided in a region overlapping with the insulator 250 to form oxide semiconductors 230ca and 230cb. That is, in the structure shown in FIG. 18C , a layer 227 can be provided instead of the oxide semiconductor 230a.

[0247] 21C, the insulator 250 has a four-layer laminated structure of insulators 250a, 250b, 250c, and 250d, but the present invention is not limited to this. For example, as shown in FIG. 22A, the insulator 250 can have a three-layer laminated structure of insulators 250a, 250b, and 250c. Here, it is preferable to use hafnium oxide for the insulator 250a.

[0248] 9A , by using hafnium oxide for the insulator 250a, the insulator 250a containing hafnium oxide can be provided in contact with the oxide semiconductor 230b containing indium oxide in the vicinity of the channel formation region of the transistor 200. Thus, impurities such as hydrogen and excess oxygen in the oxide semiconductor 230b can be reduced, thereby improving the electrical characteristics and reliability of the transistor 200.

[0249] 22B , the conductor 242a2 may be provided on the oxide semiconductor 230ca, and the conductor 242b2 may be provided on the oxide semiconductor 230cb, without providing the conductor 242a1 and the conductor 242b1. In this case, the bottom surface of the insulator 255 is in contact with the top surface of the oxide semiconductor 230ca and the top surface of the oxide semiconductor 230cb.

[0250] 22A shows a structure in which the layer 227 is provided between the oxide semiconductor 230b and the insulator 224, but the present invention is not limited to this. For example, as shown in Fig. 22C, a structure in which the layer 227 is not provided between the oxide semiconductor 230b and the insulator 224 can be used. In this case, a structure in which the oxide semiconductor 230b is in contact with the upper surface of the insulator 224 can be used.

[0251] In the first modification, the insulator 255 is provided in contact with the sidewall of the opening formed in the insulator 280 or the like, but the present invention is not limited to this configuration. For example, the insulator 255 may not be provided in the opening.

[0252] 23A to 24 will be used to describe a modification of the semiconductor device described in Modification 1. Figures 23A to 23D are plan views and cross-sectional views of a semiconductor device including a transistor 200, and correspond to the plan views and cross-sectional views shown in Figures 16A to 16D, respectively. Figure 24 is an enlarged cross-sectional view of the transistor 200 in the channel length direction, and corresponds to the enlarged cross-sectional view shown in Figure 17C.

[0253] 23A to 23D is a modified example of the transistor 200 shown in Figures 16A to 16D. Specifically, the transistor 200 shown in Figures 23A to 23D is mainly different from the transistor 200 shown in Figures 16A to 16D in that the transistor 200 shown in Figures 23A to 23D does not have an insulator 255. Hereinafter, differences from the above-described <Structure Example of Semiconductor Device> and <Modification 1> will be mainly described, and overlapping parts will be referred to and may not be described again.

[0254] 24 , in a configuration in which the insulator 255 is not provided, a portion of the insulator 250 is arranged overlapping the protruding portions of the conductor 242a1 and the conductor 242b1. Also, a portion of the conductor 260 may be arranged overlapping the protruding portions of the conductor 242a1 and the conductor 242b1. Here, the protruding portions of the conductor 242a1 and the conductor 242b1 contact the insulator 250. Furthermore, the side surface of the insulator 250 contacts the side surface of the insulator 280, the side surface of the insulator 275, the side surface of the insulator 271a, the side surface of the insulator 271b, the side surface of the conductor 242a2, and the side surface of the conductor 242b2.

[0255] The portion of the insulator 250 that is disposed in the opening provided in the insulator 280 is formed to reflect the shape of the opening. Thus, the insulator 250 is formed to reflect the shapes of the conductors 242a1 and 242b1 that protrude into the opening.

[0256] 24 , in a cross-sectional view of the transistor 200 in the channel length direction, the distance L1 between the conductor 242a1 and the conductor 242b1 is smaller than the distance L2 between the conductor 242a2 and the conductor 242b2. This configuration allows the distance between the source and the drain to be shortened, thereby shortening the channel length accordingly. This improves the frequency characteristics of the transistor 200. By miniaturizing the semiconductor device in this way, a semiconductor device with improved operating speed can be provided.

[0257] 24, the width of the top of the conductor 260 can be made larger than the distance L1, thereby reducing the wiring resistance of the conductor 260. As a result, the power consumption of the semiconductor device can be reduced.

[0258] As in the above-described <Configuration Example of a Semiconductor Device>, the insulator 250 may have a layered structure. For example, as shown in FIG. 17A , the insulator 250 may have a three-layer structure of insulators 250a, 250b, and 250c. Furthermore, as shown in FIG. 17B , the insulator 250 may have a four-layer structure of insulators 250a, 250b, 250c, and 250d. The insulator 250 is not limited to the structure shown in FIG. 17B , and may be formed by selecting one or more of the insulators 250a, 250b, 250c, and 250d. For example, the insulator 250 may have the structure shown in FIGS. 10A to 10D .

[0259] 24B , the oxide semiconductor 230c may be divided into oxide semiconductors 230ca and 230cb in a region overlapping with the insulator 250. This can improve the on-state current, carrier mobility, and frequency characteristics of the transistor 200.

[0260] 24A and 24B , the oxide semiconductor 230 has a three-layer structure of oxide semiconductors 230a to 230c, but the present invention is not limited to this. As in the above <Structure example of a semiconductor device>, the oxide semiconductor 230 can have a single-layer, two-layer, or four or more-layer structure. Furthermore, a layer 227 can be provided between the oxide semiconductor 230 and the insulator 224.

[0261] <Constituent Materials of Semiconductor Device> Constituent materials that can be used for the semiconductor device will be described below. Each layer that constitutes the semiconductor device may have a single layer structure or a multilayer structure.

[0262] <<Substrate>> Substrates on which transistors are formed can include, for example, insulating substrates, semiconductor substrates, or conductive substrates. Examples of insulating substrates include glass substrates, quartz substrates, sapphire substrates, stabilized zirconia substrates (such as yttria-stabilized zirconia substrates), and resin substrates. Examples of semiconductor substrates include semiconductor substrates made of silicon or germanium, and compound semiconductor substrates made of silicon carbide, silicon germanium, gallium arsenide, indium phosphide, zinc oxide, or gallium oxide. Examples of semiconductor substrates include semiconductor substrates having an insulator region within the semiconductor substrate, such as SOI (Silicon-On-Insulator) substrates. Examples of conductive substrates include graphite substrates, metal substrates, alloy substrates, and conductive resin substrates. Examples of substrates include substrates having metal nitrides, substrates having metal oxides, substrates in which a conductor or semiconductor is provided on an insulator substrate, substrates in which a conductor or insulator is provided on a semiconductor substrate, and substrates in which a semiconductor or insulator is provided on a conductor substrate. Alternatively, one or more types of elements may be provided on the substrate, such as a capacitor element, a resistor element, a switch element, a light-emitting element, and a memory element.

[0263] <<Insulators>> In this embodiment, the insulators 212, 214, 216, 221, 222, 224, 250, 275, 280, 282, 283, 285, 241a, 241b, 271a, 271b, and 255 can be any of the following insulators as appropriate. Examples of the insulators include insulating oxides, nitrides, oxynitrides, nitride oxides, metal oxides, metal oxynitrides, and metal nitride oxides.

[0264] For example, as transistors become more miniaturized and highly integrated, problems such as leakage current may occur due to thinner gate insulators. Using a high-k material for the insulator that functions as the gate insulator allows for lower voltage operation of the transistor while maintaining the physical film thickness. On the other hand, using a material with a low dielectric constant for the insulator that functions as the interlayer film can reduce the parasitic capacitance that occurs between wiring. Therefore, it is advisable to select a material depending on the function of the insulator.

[0265] Examples of insulators with a high relative dielectric constant include gallium oxide, hafnium oxide, zirconium oxide, oxides containing aluminum and hafnium, oxynitrides containing aluminum and hafnium, oxides containing silicon and hafnium, oxynitrides containing silicon and hafnium, and nitrides containing silicon and hafnium.

[0266] Examples of insulators with a low dielectric constant include silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide doped with fluorine, silicon oxide doped with carbon, silicon oxide doped with carbon and nitrogen, silicon oxide having voids, and resin.

[0267] Furthermore, a transistor using a metal oxide can have stable electrical characteristics by being surrounded by an insulator that has a function of suppressing the permeation of impurities such as hydrogen and oxygen. Examples of insulators that have a function of suppressing the permeation of impurities such as hydrogen and oxygen include, for example, insulators containing one or more of boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, phosphorus, chlorine, argon, gallium, germanium, yttrium, zirconium, lanthanum, neodymium, hafnium, and tantalum, which can be used in a single layer or a stacked layer. Specifically, examples of insulators that have a function of suppressing the permeation of impurities such as hydrogen and oxygen include metal oxides such as aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, and tantalum oxide, and nitrides such as aluminum nitride, silicon nitride oxide, and silicon nitride.

[0268] The insulator functioning as the gate insulator preferably has a region containing oxygen that is released by heating. For example, by using a structure in which silicon oxide or silicon oxynitride having a region containing oxygen that is released by heating is in contact with the oxide semiconductor 230, oxygen vacancies in the oxide semiconductor 230 can be compensated for.

[0269] <<Conductor>> The conductor 205, the conductor 242a, the conductor 242b, the conductor 260, the conductor 240a, and the conductor 240b shown in this embodiment can be any of the conductors listed below. As the conductor, it is preferable to use a metal element selected from aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, cobalt, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium, lanthanum, or the like, or an alloy containing the above-mentioned metal element or an alloy combining the above-mentioned metal elements. Examples of the conductor include tantalum nitride, titanium nitride, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, and oxides containing lanthanum and nickel. In addition, tantalum nitride, titanium nitride, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, and oxides containing lanthanum and nickel are preferable because they are conductive materials that are resistant to oxidation or materials that maintain conductivity even when absorbing oxygen. Also, semiconductors with high electrical conductivity, typified by polycrystalline silicon containing impurity elements such as phosphorus, or silicides such as nickel silicide may be used.

[0270] When a conductor with a layered structure is used, for example, a layered structure combining the material containing the metal element described above and a conductive material containing oxygen, a layered structure combining the material containing the metal element described above and a conductive material containing nitrogen, or a layered structure combining the material containing the metal element described above and a conductive material containing oxygen and a conductive material containing nitrogen may be applied.

[0271] When an oxide is used for the channel formation region of a transistor, a conductor functioning as a gate electrode preferably has a stacked structure in which a material containing a metal element and a conductive material containing oxygen are combined. In this case, the conductive material containing oxygen is preferably provided on the channel formation region side. By providing the conductive material containing oxygen on the channel formation region side, oxygen desorbed from the conductive material is easily supplied to the channel formation region.

[0272] In particular, as a conductor functioning as a gate electrode, it is preferable to use a conductive material containing oxygen and a metal element contained in the metal oxide in which the channel is formed. Alternatively, the conductive materials containing the metal element and nitrogen described above may be used. For example, conductive materials containing nitrogen, such as titanium nitride and tantalum nitride, may be used. Alternatively, one or more of indium tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, and indium tin oxide doped with silicon may be used. Furthermore, indium gallium zinc oxide containing nitrogen may be used. Using such a material may allow hydrogen contained in the metal oxide in which the channel is formed to be captured. Alternatively, hydrogen introduced from an external insulator or the like may be captured.

[0273] 25A to 33D, an example of a method for manufacturing a semiconductor device according to one embodiment of the present invention will be described. Here, the case of manufacturing the semiconductor device illustrated in FIGS. 3A to 3D will be described as an example.

[0274] 25 to 29 and 31 to 33A are plan views. Also, each of FIGS. 25 to 29 and 31 to 33B is a cross-sectional view corresponding to the portion indicated by the dashed dotted line A1-A2 in each of FIGS. 25 to 29 and 31 to 33B, and is also a cross-sectional view of the transistor 200 in the channel length direction. Also, each of FIGS. 25 to 29 and 31 to 33C is a cross-sectional view corresponding to the portion indicated by the dashed dotted line A3-A4 in each of FIGS. 25 to 29 and 31 to 33C, and is also a cross-sectional view of the transistor 200 in the channel width direction. Also, each of FIGS. 25 to 29 and 31 to 33D is a cross-sectional view of the portion indicated by the dashed dotted line A5-A6 in each of FIGS. 25 to 29 and 31 to 33D, and is also a cross-sectional view of the transistor 200 in the channel width direction. 25 to 29 and 31 to 33A, some elements are omitted for clarity. Also, FIGS. 30A1 to 30D1 are cross-sectional views corresponding to a portion of FIG. 3B and are also cross-sectional views in the channel length direction of the transistor 200. Also, FIGS. 30A2 to 30D2 are cross-sectional views corresponding to a portion of FIG. 3C and are also cross-sectional views in the channel width direction of the transistor 200.

[0275] In the following, an insulating material for forming an insulator, a conductive material for forming a conductor, or a semiconductor material for forming a semiconductor can be formed as a film by appropriately using a sputtering method, a chemical vapor deposition (CVD) method, a molecular beam epitaxy (MBE) method, a pulsed laser deposition (PLD) method, an ALD method, or the like.

[0276] First, a substrate (not shown) is prepared, an insulator 212 is formed on the substrate, and an insulator 214 is formed on the insulator 212 (see FIGS. 25A to 25D ). The insulators 212 and 214 can be formed using any of the insulating materials described above. The insulators 212 and 214 can be formed by, for example, sputtering, CVD, MBE, PLD, or ALD. Sputtering, which does not require the use of hydrogen-containing molecules in the deposition gas, is preferable because it can reduce the hydrogen concentrations in the insulators 212 and 214.

[0277] In this embodiment, silicon nitride is formed as the insulator 212 by a sputtering method, and aluminum oxide is formed as the insulator 214 by a sputtering method. In this manner, by using silicon nitride, which has a function of suppressing hydrogen diffusion, for the insulator 212, diffusion of hydrogen from a lower layer of the transistor 200 can be suppressed. Furthermore, by using aluminum oxide, which has a function of capturing or fixing hydrogen, for the insulator 214, hydrogen contained in the insulator 216 or the like can be captured or fixed to the insulator 214. As a result, the hydrogen concentration in the oxide semiconductor 230 and its vicinity can be reduced.

[0278] Furthermore, it is preferable to perform heat treatment to reduce water and hydrogen adsorbed to the substrate (including the circuit elements and interlayer films formed over the substrate) before forming the insulator 212. In this embodiment, the temperature for the heat treatment is 400° C.

[0279] Next, the insulator 216 is deposited over the insulator 214. The insulator 216 is preferably deposited by sputtering. The hydrogen concentration in the insulator 216 can be reduced by using sputtering, which does not require the use of hydrogen-containing molecules in the deposition gas. However, the deposition of the insulator 216 is not limited to sputtering, and CVD, MBE, PLD, ALD, or the like may also be used as appropriate. In this embodiment, silicon oxide is deposited as the insulator 216 by sputtering.

[0280] The insulators 212, 214, and 216 are preferably successively deposited without exposure to the air. For example, a multi-chamber deposition apparatus can be used. This allows the insulators 212, 214, and 216 to be deposited with reduced hydrogen content and further reduces hydrogen contamination between deposition steps.

[0281] Next, an opening is formed in the insulator 216, reaching the insulator 214. The opening is formed in a region where the conductor 205 is to be formed. Wet etching may be used to form the opening, but dry etching is preferable for fine processing. Furthermore, it is preferable to select an insulator for the insulator 214 that functions as an etching stopper film when etching the insulator 216. For example, when silicon oxide or silicon oxynitride is used for the insulator 216, it is preferable to use silicon nitride, aluminum oxide, hafnium oxide, or the like for the insulator 214.

[0282] After the opening is formed, a conductive film that will become the conductor 205 is formed, and CMP treatment is performed until the insulator 216 is exposed, thereby removing a part of the conductive film that will become the conductor 205. In this way, the conductor 205 embedded in the insulator 216 can be formed (see FIGS. 25A to 25D).

[0283] The conductive film that becomes the conductor 205 can be formed using the above-mentioned conductive material by sputtering, CVD, MBE, PLD, ALD, or the like. For example, a tantalum nitride film, a titanium nitride film, and a tungsten film can be stacked using CVD. As a result, as shown in FIG. 4A , the conductor 205 can have a stacked structure of a conductor 205a in which titanium nitride is stacked on top of tantalum nitride, and a tungsten conductor 205b.

[0284] Next, an insulator 221 is formed over the insulator 216 and the conductor 205 (see FIGS. 25A to 25D).

[0285] The insulator 221 may be any of the above insulators that have barrier properties against oxygen, hydrogen, and water. The insulator 221 can be formed by, for example, a sputtering method, a CVD method, an MBE method, a PLD method, or an ALD method. In this embodiment, silicon nitride is formed as the insulator 221 by a PEALD method.

[0286] Next, an insulator 222 is formed on the insulator 221 (see FIGS. 25A to 25D).

[0287] The insulator 222 may be an insulator containing one or both of aluminum and hafnium oxides. As the insulator containing one or both of aluminum and hafnium oxides, for example, aluminum oxide, hafnium oxide, or an oxide containing aluminum and hafnium (hafnium aluminate) is preferably used. Alternatively, hafnium zirconium oxide is preferably used. An insulator containing one or both of aluminum and hafnium oxides has barrier properties against oxygen, hydrogen, and water. When the insulator 222 has barrier properties against hydrogen and water, hydrogen and water contained in structures provided around the transistor are prevented from diffusing into the transistor through the insulator 222, and thus oxygen vacancies in the oxide semiconductor 230 can be suppressed.

[0288] The insulator 222 can be formed by, for example, a sputtering method, a CVD method, an MBE method, a PLD method, or an ALD method. In this embodiment, hafnium oxide is formed as the insulator 222 by a thermal ALD method.

[0289] In this embodiment, silicon nitride is deposited as the insulator 221 by a PEALD method, and hafnium oxide is deposited as the insulator 222 by a thermal ALD method. By using silicon nitride, which has a function of suppressing hydrogen diffusion, for the insulator 221 in this manner, diffusion of hydrogen from a lower layer of the transistor 200 can be suppressed. Furthermore, by using hafnium oxide, which has a function of capturing or fixing hydrogen, for the insulator 222, hydrogen contained in the insulator 224 or the like can be captured or fixed to the insulator 222. As a result, the hydrogen concentration in the oxide semiconductor 230 and its vicinity can be reduced.

[0290] Next, an insulating film 224f is formed on the insulator 222 (see FIGS. 25A to 25D). The insulating film 224f may be an insulator corresponding to the insulator 224. By forming the insulating film 224f in this manner, the insulating film 224f is formed parallel or approximately parallel to the surface of the substrate.

[0291] The insulating film 224f can be formed by, for example, a sputtering method, a CVD method, an MBE method, a PLD method, or an ALD method. In this embodiment, silicon oxide is formed as the insulating film 224f by a sputtering method. The hydrogen concentration in the insulating film 224f can be reduced by using a sputtering method that does not require the use of hydrogen-containing molecules in the deposition gas. The insulating film 224f is preferably formed with a reduced hydrogen concentration because the insulating film 224f will be in contact with the oxide semiconductor 230 in a later step.

[0292] Next, the insulating film 224f is subjected to a plasma treatment to add impurities 220 to the insulating film 224f (see FIGS. 25A to 25D). The plasma treatment is performed using a gas containing nitrogen. The nitrogen-containing gas may be nitrogen gas or dinitrogen monoxide (N ２ 25B to 25D indicate gases that have been converted into plasma. The insulating film 224f containing silicon oxide or silicon oxynitride is etched with plasma N ２ or N ２ By treating with O, NO is obtained as an impurity 220. ２ can be added.

[0293] In the above plasma treatment, a sputtering apparatus, a PECVD apparatus, a PEALD apparatus, a dry etching apparatus, a CVD apparatus using a high density plasma source, or a dry etching apparatus using a high density plasma source can be used.

[0294] Further, the substrate can be heated during the plasma treatment. Furthermore, heat treatment can be performed before or after the plasma treatment. The temperature for the substrate heating or heat treatment is, for example, 200° C. to 450° C., preferably 300° C. to 400° C. In this manner, the substrate heating or heat treatment can reduce excess oxygen contained in the insulating film 224f. This can prevent excessive oxygen from being contained in the insulating film 224f and adjust the amount of oxygen in the insulating film 224f to an appropriate level. Therefore, excessive oxygen can be prevented from being supplied to the oxide semiconductor 230, thereby preventing the threshold voltage of the OS transistor from becoming excessively high. In this manner, the electrical characteristics of the transistor 200 can be improved. Furthermore, by setting the temperature for the substrate heating or heat treatment to 450° C. or lower, further 400° C. or lower, elimination of the impurities 220 due to the substrate heating or heat treatment can be prevented. The conditions for the heat treatment can be described later.

[0295] Next, an oxide semiconductor film 230f is formed over the insulating film 224f (see FIGS. 26A to 26D ). The oxide semiconductor film 230f can be formed using any of the above-described oxide semiconductor materials or the like by a sputtering method, a CVD method, an MBE method, a PLD method, or an ALD method. The oxide semiconductor film 230f can also be formed by the same method as that for forming an oxide semiconductor described in Embodiment 2. It is preferable to use indium oxide (e.g., indium oxide, indium gallium oxide, indium zinc oxide, indium gallium zinc oxide, or indium gallium tin zinc oxide) for the oxide semiconductor film 230f. The oxide semiconductor film 230f containing indium oxide can provide a semiconductor device with high field-effect mobility. Furthermore, a semiconductor device with favorable electrical characteristics, frequency characteristics, and reliability can be provided. By forming the oxide semiconductor film 230f as described above, the oxide semiconductor film 230f is formed parallel or substantially parallel to the surface of the substrate.

[0296] For example, when the oxide semiconductor 230 has a three-layer structure including oxide semiconductors 230a to 230c as shown in FIG. 4A , films to be the oxide semiconductors 230a to 230b can be deposited by ALD, and a film to be the oxide semiconductor 230c can be deposited by sputtering. Specifically, the film to be the oxide semiconductor 230a can be deposited to have a composition of In:Ga:Zn=1:3:2 (atomic ratio) or a composition thereabout. Alternatively, gallium oxide may be used for the film to be the oxide semiconductor 230a. Furthermore, indium oxide can be used for the film to be the oxide semiconductor 230b. Furthermore, the film to be the oxide semiconductor 230c can be deposited using an oxide target having a composition of In:Ga:Zn=1:1:1.2 (atomic ratio) or a composition thereabout.

[0297] In addition, for example, the oxide semiconductor 230 a can be formed by sputtering using an oxide target having an atomic ratio of In:Ga:Zn=1:3:2 or a composition close to that ratio.

[0298] 6A to 6D , in a structure in which the layer 227 is provided between the insulator 224 and the oxide semiconductor 230, a film to be the layer 227 is formed before the oxide semiconductor film 230f is formed. The layer 227 may be formed by a method selected as appropriate for the material to be used. For example, YSZ can be formed by a sputtering method as the film to be the layer 227. Alternatively, an In—Ga—Zn oxide film can be formed by a sputtering method as the film to be the layer 227. In this case, an oxide target having an atomic ratio of In:Ga:Zn=1:3:2 or a composition therearound can be used. When the transistor 200 having the structure shown in FIG. 7A is fabricated, a film to be the oxide semiconductor 230b and a film to be the oxide semiconductor 230c are formed on the layer 227. In this case, the films to be the oxide semiconductor 230b and the oxide semiconductor 230c can be formed under the above-described conditions.

[0299] Next, heat treatment is preferably performed. The heat treatment of the oxide semiconductor film 230f may be performed by the same method as the heat treatment described in Embodiment 2. For example, the heat treatment can be performed at 450° C. for one hour with a flow rate ratio of nitrogen gas to oxygen gas of 4:1.

[0300] The heat treatment can improve the crystallinity of the oxide semiconductor 230. As a result, the on-state current, the subthreshold swing value (S value), the field-effect mobility, the frequency characteristics, and the like of the transistor 200 can be improved, and a semiconductor device with favorable electrical characteristics can be provided. In addition, a highly reliable semiconductor device can be provided.

[0301] The heat treatment is preferably performed in a nitrogen gas or inert gas atmosphere, or in an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of an oxidizing gas. The heat treatment may be performed under reduced pressure. Alternatively, after the heat treatment in the nitrogen gas or inert gas atmosphere, the heat treatment may be performed in an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of an oxidizing gas to compensate for the desorbed oxygen.

[0302] The gas used in the heat treatment is preferably highly purified. For example, the amount of moisture contained in the gas used in the heat treatment is preferably 1 ppb or less, more preferably 0.1 ppb or less, and even more preferably 0.05 ppb or less. By performing the heat treatment using a highly purified gas, moisture and the like can be prevented from being introduced into the oxide semiconductor film 230f and the like as much as possible. Note that highly purified gas can also be used in the heat treatment before and after this step.

[0303] Furthermore, the heat treatment using oxygen gas as described above can reduce impurities such as carbon, water, and hydrogen in the oxide semiconductor film 230f. Reducing the impurities in the film in this manner can improve the crystallinity of the oxide semiconductor film 230f, resulting in a denser and more compact structure. This increases the crystalline regions in the oxide semiconductor film 230f, reducing in-plane variations in the crystalline regions in the oxide semiconductor film 230f. This reduces in-plane variations in the electrical characteristics of the transistor.

[0304] Furthermore, by performing heat treatment, oxygen can be supplied to the oxide semiconductor film 230f, and oxygen vacancies in the oxide semiconductor film 230f can be reduced, thereby improving the reliability of the transistor 200.

[0305] Furthermore, by performing heat treatment, hydrogen in the insulator 216, the insulating film 224f, and the oxide semiconductor film 230f moves to the insulator 222 and is absorbed into the insulator 222. In other words, hydrogen in the insulator 216, the insulating film 224f, and the oxide semiconductor film 230f diffuses into the insulator 222. Therefore, the hydrogen concentration in the insulator 222 increases, but the hydrogen concentrations in the insulator 216, the insulating film 224f, and the oxide semiconductor film 230f decrease. Note that by providing the insulator 221 in contact with the lower surface of the insulator 222, impurities such as moisture or hydrogen can be prevented from entering from below the insulator 221 during the heat treatment.

[0306] In particular, the insulating film 224f (later the insulator 224) functions as a second gate insulator of the transistor 200, and the oxide semiconductor film 230f (later the oxide semiconductor 230) functions as a channel formation region of the transistor 200. The transistor 200 formed using the insulating film 224f and the oxide semiconductor film 230f in which the hydrogen concentration is reduced has good reliability, which is preferable.

[0307] Next, a conductive film 242f is formed over the oxide semiconductor film 230f (see FIGS. 26A to 26D ). A conductor corresponding to the conductors 242a and 242b may be used as the conductive film 242f. By forming the conductive film 242f on and in contact with the oxide semiconductor film 230f without performing an etching step or the like after the oxide semiconductor film 230f is formed, the top surface of the oxide semiconductor film 230f can be protected by the conductive film 242f. This can reduce diffusion of impurities into the oxide semiconductor 230 included in the transistor, thereby improving the electrical characteristics and reliability of the semiconductor device.

[0308] The conductive film 242f can be formed by a sputtering method, a CVD method, an MBE method, a PLD method, or an ALD method.

[0309] In this embodiment, tantalum nitride is deposited as the conductive film 242f by a sputtering method. Note that heat treatment may be performed before the deposition of the conductive film 242f. The heat treatment may be performed under reduced pressure, and the conductive film 242f may be deposited successively without exposure to air. By performing such treatment, moisture and hydrogen adsorbed on the surface of the oxide semiconductor 230 can be removed, and the moisture and hydrogen concentrations in the oxide semiconductor 230 can be further reduced. The temperature of the heat treatment is preferably 100° C. or higher and 400° C. or lower.

[0310] Here, when indium oxide is used for the film to be the oxide semiconductor 230b and the conductive film 242f is provided in contact with the film to be the oxide semiconductor 230b, oxygen in the oxide semiconductor film 230f is extracted by the conductive film 242f because indium oxide has high oxygen permeability, and an oxide film might be formed at the interface between the conductive film 242f and the oxide semiconductor film 230f. The oxide film might increase the contact resistance between the conductors 242a and 242b of the transistor 200 and the oxide semiconductor 230. Furthermore, if the oxide film is formed non-uniformly on the substrate surface, shape defects might occur when the conductive film 242f, the oxide semiconductor film 230f, and the insulating film 224f are processed into island shapes in a later step.

[0311] In contrast, it is preferable to provide a film that becomes the oxide semiconductor 230c on a film that becomes the oxide semiconductor 230b. For example, an In—Ga—Zn oxide having an atomic ratio of In:Ga:Zn=1:1:1 or a composition close to that ratio can be used for the film that becomes the oxide semiconductor 230c. With this configuration, a film that becomes the oxide semiconductor 230c with low oxygen permeability can be provided on the film that becomes the oxide semiconductor 230b, thereby reducing extraction of oxygen from the oxide semiconductor film 230f by the conductive film 242f. This allows a transistor with excellent electrical characteristics to be provided, and improves the productivity of semiconductor devices.

[0312] Next, an insulating film 271f is formed on the conductive film 242f (see FIGS. 26A to 26D ). The insulating film 271f can be formed by sputtering, CVD, MBE, PLD, ALD, or the like. It is preferable to use an insulating film that has a function of suppressing oxygen permeation as the insulating film 271f. For example, the insulating film 271f may be formed by sputtering a stacked film of a silicon nitride film and a silicon oxide film on the silicon nitride film. This configuration allows the insulator 271a (insulator 271b) to have a stacked structure of a silicon nitride insulator 271a1 (insulator 271b1) and a silicon oxide insulator 271a2 (insulator 271b2).

[0313] Here, when the insulating film 271f is a laminated film, it is preferable to form the films successively without exposing them to the air environment. By forming the films without exposing them to the air, the vicinity of the interface of the laminated film of the insulating film 271f can be kept clean. Furthermore, it is more preferable to form the conductive film 242f to the insulating film 271f successively without exposing them to the air environment.

[0314] Note that heat treatment may be performed before the formation of the insulating film 271f. The heat treatment may be performed under reduced pressure, and the insulating film 271f may be formed successively without exposure to the air. By performing such treatment, moisture and hydrogen adsorbed on the surface of the conductive film 242f can be removed and the moisture and hydrogen concentrations in the conductive film 242f can be further reduced. The temperature of the heat treatment is preferably 100° C. or higher and 400° C. or lower.

[0315] Next, the insulating film 224f, the oxide semiconductor film 230f, the conductive film 242f, and the insulating film 271f are processed into island shapes by lithography to form the insulator 224, the oxide semiconductor 230, the conductor 242A, and the insulator 271A (see FIGS. 27A to 27D).

[0316] For the above processing, a dry etching method or a wet etching method can be used. Dry etching is suitable for fine processing. The insulating film 224f, the oxide semiconductor film 230f, the conductive film 242f, and the insulating film 271f may be processed under different conditions.

[0317] Here, the insulator 224, the oxide semiconductor 230, the conductor 242A, and the insulator 271A are preferably processed collectively into an island shape. In this case, the side edge of the conductor 242A preferably coincides with or substantially coincides with the side edge of the oxide semiconductor 230. Furthermore, the side edge of the insulator 224 preferably coincides with or substantially coincides with the side edge of the oxide semiconductor 230. Furthermore, the side edge of the insulator 271A preferably coincides with or substantially coincides with the side edge of the conductor 242A. Such a structure can reduce the number of steps required to manufacture a semiconductor device according to one embodiment of the present invention. Therefore, a highly productive method for manufacturing a semiconductor device can be provided.

[0318] The insulator 224, the oxide semiconductor 230, the conductor 242A, and the insulator 271A are formed so as to at least partially overlap with the conductor 205. The insulator 222 is exposed in a region that does not overlap with the insulator 224, the oxide semiconductor 230, the conductor 242A, or the insulator 271A. However, this is not limiting, and the insulator 224 may remain on the insulator 222 in a region that does not overlap with the oxide semiconductor 230. In this case, the insulator 224 does not have an island shape like the transistor 200 in FIGS. 11A to 11D , but has an opening in part.

[0319] 27B to 27D , the side surfaces of the insulator 224, the oxide semiconductor 230, the conductor 242A, and the insulator 271A may be tapered. The taper angle of the side surfaces of the insulator 224, the oxide semiconductor 230, the conductor 242A, and the insulator 271A may be, for example, greater than or equal to 60° and less than 90°. By tapering the side surfaces in this manner, coverage by the insulator 275 and the like can be improved in subsequent steps, and defects such as voids can be reduced.

[0320] Furthermore, without being limited to the above, the side surfaces of the insulator 224, the oxide semiconductor 230, the conductor 242A, and the insulator 271A may be perpendicular or approximately perpendicular to the top surface of the insulator 222. With such a structure, a reduction in area and high density can be achieved when providing multiple transistors.

[0321] In lithography, a resist is first exposed through a mask. The exposed area is then removed or left behind using a developer to form a resist mask. Next, etching is performed through the resist mask to process a conductor, semiconductor, insulator, or the like into a desired shape. For example, a resist mask can be formed by exposing the resist using KrF excimer laser light, ArF excimer laser light, EUV (Extreme Ultraviolet) light, or the like. An immersion technique may also be used, in which a liquid (e.g., water) is filled between the substrate and the projection lens for exposure. Alternatively, an electron beam or an ion beam may be used instead of the light described above. When an electron beam or an ion beam is used, a photomask may not be used.

[0322] The resist mask that is no longer needed after processing can be removed by performing a dry etching treatment such as ashing using oxygen plasma (hereinafter, sometimes referred to as oxygen plasma treatment), a wet etching treatment, a dry etching treatment followed by a wet etching treatment, or a wet etching treatment followed by a dry etching treatment.

[0323] Furthermore, a hard mask made of an insulator or a conductor may be used under the resist mask. When using a hard mask, an insulating or conductive film serving as a hard mask material may be formed on the insulating film 271f, a resist mask may be formed thereon, and the hard mask material may be etched to form a hard mask with a desired shape. For example, tungsten may be used as the hard mask material. Etching of the insulating film 271f and the like may be performed after removing the resist mask or may be performed while leaving the resist mask. In the latter case, the resist mask may be lost during etching. The hard mask may be removed by etching after etching the oxide semiconductor film 230f and the like. On the other hand, if the hard mask material does not affect subsequent processes or can be used in subsequent processes, it is not necessarily necessary to remove the hard mask.

[0324] Alternatively, a spin-on-carbon (SOC) film and a spin-on-glass (SOG) film may be formed between the workpiece and the resist mask. Using the SOC film and the SOG film as a mask can improve adhesion with the resist mask and improve the durability of the mask pattern. For example, a lithography method can be performed by forming an SOC film, an SOG film, and a resist mask in this order on the workpiece.

[0325] As the etching gas for the dry etching process, an etching gas containing halogen can be used, and specifically, an etching gas containing one or more of fluorine, chlorine, and bromine can be used. For example, the etching gas may contain C ４ F ６ Gas, C ５ F ６ Gas, C ４ F ８ Gas, CF ４ Gas, SF ６ Gas, CHF ３ Gas, CH ２ F ２ Gas, Cl ２ Gas, BCl ３ Gas, SiCl ４ gas, or BBr ３Gases such as fluorine-containing gases can be used alone or in combination of two or more gases. Oxygen gas, carbon dioxide gas, nitrogen gas, helium gas, argon gas, hydrogen gas, or hydrocarbon gas can be added to the above-mentioned etching gas as appropriate. Depending on the object to be dry-etched, gases containing hydrocarbon gas or hydrogen gas but not containing halogen gas can be used as the etching gas. Examples of hydrocarbons used in the etching gas include methane (CH ４ ), ethane (C ２ H ６ ), propane (C ３ H ８ ), butane (C ４ H １０ ), ethylene (C ２ H ４ ), propylene (C ３ H ６ ), acetylene (C ２ H ２ ), and propyne (C ３ H ４ The etching conditions can be appropriately set depending on the target to be etched.

[0326] A capacitively coupled plasma (CCP) etching apparatus having parallel-plate electrodes can be used as the dry etching apparatus. A capacitively coupled plasma etching apparatus having parallel-plate electrodes may be configured to apply a high-frequency voltage to one of the parallel-plate electrodes. Alternatively, a high-frequency voltage of the same frequency may be applied to each of the parallel-plate electrodes. Alternatively, a plurality of different high-frequency voltages may be applied to the parallel-plate electrodes. Such a CCP etching apparatus is called a dual-frequency capacitively coupled plasma (DF-CCP) etching apparatus. The DF-CCP etching apparatus may be configured to apply high-frequency voltages of different frequencies to each of the parallel-plate electrodes. Alternatively, a plurality of different high-frequency voltages may be applied to one of the parallel-plate electrodes. Alternatively, a dry etching apparatus having a high-density plasma source can be used. The dry etching apparatus having a high-density plasma source can be, for example, an inductively coupled plasma (ICP) etching apparatus. The etching apparatus can be appropriately configured according to the object to be etched. In the above-mentioned dry etching apparatus, reactive ion etching can be performed by applying a high-frequency voltage to the electrode on the substrate side to generate a self-bias potential. In reactive ion etching, etching is performed by accelerating ion species in the plasma and causing them to collide with the workpiece, thereby enabling highly anisotropic etching.

[0327] Furthermore, in the etching process, the insulator 271A can function as an etching stopper to protect the conductor 242A. For example, if a metal hard mask is formed on the insulator 271A in the etching process, it may be difficult to obtain an etching selectivity with respect to the conductor 242A when removing the hard mask. However, by forming the insulator 271A on the conductor 242A, the insulator 271A can function as an etching stopper to protect the conductor 242A in the etching process for removing the hard mask. This prevents a curved surface from being formed between the side and top surfaces of the conductor 242A, so that the conductors 242a and 242b formed later have angular ends where the side and top surfaces intersect, as shown in FIG. 3D . The angular ends where the side and top surfaces of the conductor 242A intersect increase the cross-sectional area of ​​the conductor 242A compared to when the ends have a curved surface. Furthermore, by using a nitride insulator, which does not easily oxidize metal, for the insulator 271A, excessive oxidation of the conductor 242A can be prevented, thereby reducing the resistance of the conductors 242a and 242b and increasing the on-state current of the transistor.

[0328] Furthermore, by processing the insulator 224 into an island shape, the insulator 275 can be provided in contact with the side surface of the insulator 224 and the top surface of the insulator 222 in a process described later. That is, the insulator 224 can be separated from the insulator 280 by the insulator 275. With such a structure, impurities such as excessive oxygen and hydrogen can be prevented from entering the oxide semiconductor 230 from the insulator 280 through the insulator 224.

[0329] Next, an insulator 275 is formed to cover the insulator 224, the oxide semiconductor 230, the conductor 242A, and the insulator 271A, and then an insulator 280 is formed over the insulator 275 (see FIGS. 28A to 28D ). The insulator 275 and the insulator 280 may be formed using any of the above insulating materials.

[0330] Here, it is preferable that the insulator 275 contacts the upper surface of the insulator 222 .

[0331] As the insulator 280, it is preferable to form an insulator with a flat upper surface by forming an insulating film to be the insulator 280 and performing CMP treatment on the insulating film. Note that it is also possible to form a silicon nitride film on the insulator 280 by, for example, a sputtering method and perform CMP treatment on the silicon nitride until it reaches the insulator 280.

[0332] The insulators 275 and 280 can each be formed using, for example, a sputtering method, a CVD method, an MBE method, a PLD method, or an ALD method.

[0333] The insulator 275 is preferably an insulator having a function of suppressing oxygen permeation. For example, it is preferable to form a silicon nitride film as the insulator 275 by a PEALD method. Alternatively, the insulator 275 may be formed by forming an aluminum oxide film by a sputtering method and then forming a silicon nitride film thereon by a PEALD method. The insulator 275 having the above structure can improve the function of suppressing the diffusion of impurities such as water and hydrogen, and oxygen.

[0334] In this manner, the oxide semiconductor 230 and the conductor 242A can be covered with the insulator 275, which has a function of suppressing oxygen diffusion. This can suppress oxygen from diffusing directly from the insulator 280 or the like into the oxide semiconductor 230 and the conductor 242A in a later step.

[0335] It is also preferable to form a silicon oxide film as the insulator 280 by a sputtering method. The insulating film to be the insulator 280 can be formed by sputtering in an oxygen-containing atmosphere, thereby forming the insulator 280 containing excess oxygen. The hydrogen concentration in the insulator 280 can be reduced by using a sputtering method that does not require the use of hydrogen-containing molecules in the deposition gas. Heat treatment may be performed before the deposition of the insulating film. The heat treatment may be performed under reduced pressure, and the insulating film may be deposited continuously without exposure to the atmosphere. By performing such treatment, moisture and hydrogen adsorbed on the surface of the insulator 275, etc., can be removed. The heat treatment conditions described above can be used for the heat treatment.

[0336] Next, the conductor 242A, the insulator 271A, the insulator 275, and the insulator 280 are processed by lithography to form openings that reach the oxide semiconductor 230 and the insulator 222 (see FIGS. 29A to 29D ). Here, the conductor 242A is divided to form the conductors 242a and 242b, and the insulator 271A is divided to form the insulators 271a and 271b. The openings formed in the insulators 280 and 275 overlap with the oxide semiconductor 230 and the conductor 205.

[0337] The lithography method can be any of the above-described methods as appropriate. To finely process the openings in the insulator 280, it is preferable to use a lithography method using short-wavelength light such as EUV light or an electron beam. For example, the openings can be formed in the insulator 280 and the conductors 242 a and 242 b can be formed using the method shown in FIGS. 30A1 to 30D2.

[0338] First, a coating film 277 is formed on the insulator 280, and then a coating film 278 is formed (see FIGS. 30A1 and 30A2). The coating films 277 and 278 may have the function of improving the adhesion between a resist mask (described later) and the insulator 280. The coating films 277 and 278 may be formed by, for example, spin coating. The coating films 277 and 278 may be made of a non-photosensitive organic resin.

[0339] Here, the coating film 278 functions as a mask in an etching process for processing the coating film 277. Therefore, in the etching conditions for the coating film 277, it is preferable that the etching rate of the coating film 278 is smaller than the etching rate of the coating film 277. For example, the coating film 277 may be a film containing carbon, and the coating film 278 may be a film containing silicon and carbon. In this embodiment, an SOC film is formed as the coating film 277, and an SOG film is formed as the coating film 278.

[0340] Note that the coating film 277 and the coating film 278 contain an organic solvent such as alcohol when they are applied, but the organic matter contained therein may be reduced or removed during subsequent processes or when the semiconductor device is completed. Note that the coating film may be provided as needed, and the coating film may be configured as a single layer, or if only a resist mask described later is sufficient, a configuration without a coating film may be provided.

[0341] Next, a resist mask 279 having an opening is formed on the coating film 278 using lithography (see FIGS. 30A1 and 30A2). The resist mask 279 can be formed by exposing the resist to, for example, KrF excimer laser light, ArF excimer laser light, or EUV (Extreme Ultraviolet) light. Alternatively, a liquid immersion technique may be used, in which a liquid (e.g., water) is filled between the substrate and the projection lens for exposure. Alternatively, an electron beam or an ion beam may be used instead of the light described above. Note that when an electron beam or an ion beam is used, a photomask may not be required.

[0342] In the steps shown in Figures 30B1 to 30D2 below, it is preferable to process the workpiece using a dry etching method. Dry etching is capable of anisotropic etching, making it suitable for forming openings with high aspect ratios. When performing anisotropic etching, reactive ion etching, for example, is preferable. Note that the above description can be referred to for the conditions for the dry etching method and the dry etching apparatus. Note that it is preferable to perform the steps shown in Figures 30B1 to 30D2 consecutively without exposure to the outside air. For example, a multi-chamber etching apparatus can be used to perform the processing without exposure to the outside air.

[0343] First, the coating film 278 is processed using a resist mask 279 to form an opening in the coating film 278. For example, when an SOG film is used as the coating film 278, a DF-CCP etching system is used, and CF 4 is used as the etching gas. ４ The etching process can be carried out using

[0344] Next, the coating film 277 is processed using the coating film 278 as a mask to form the coating film 277 having openings (see FIGS. 30B1 and 30B2). For example, when an SOC film is used as the coating film 277, a DF-CCP etching apparatus is used, and H is used as the etching gas. ２ and N ２ Here, since an SOG film is used as the coating film 278, it is possible to prevent the coating film 278 from disappearing during the etching process of the coating film 277.

[0345] It is also preferable to remove the resist mask 279 simultaneously during processing of the coating film 277. Since an SOC film is used for the coating film 277, the resist mask 279 can be easily removed. Note that if the resist mask 279 remains after the coating film 277 is formed, it is preferable to remove the resist mask 279.

[0346] Next, the insulator 280 is processed using the coating film 277 as a mask to form the insulator 280 having an opening. For example, when a silicon oxide film is used for the insulator 280, a DF-CCP etching apparatus is used, and C is used as an etching gas. ４ F ８ and C ４ F ６ and O ２ and Ar can be used for the etching process.

[0347] Furthermore, the insulator 275 and the insulator 271A are processed using the coating film 277 as a mask to form the insulator 275, the insulator 271a, and the insulator 271b having openings (see FIGS. 30C1 and 30C2). For example, when a silicon oxide film and a silicon nitride film are used for the insulator 275 and the insulator 271A, a DF-CCP etching system is used, and CH ２ F ２ and O ２ and Ar. At this time, the conductor 242A and the insulator 222 can function as an etching stopper. It is also preferable to simultaneously remove the coating film 278 while processing the insulators 275 and 271A.

[0348] After the insulators 271a and 271b are formed, it is preferable to perform a dry etching process such as ashing using oxygen plasma to remove the coating film 277. However, this is not limited to this, and the coating film 277 may be removed after the conductors 242a and 242b are formed.

[0349] Next, it is preferable to remove the surface oxide film of the conductor 242A using the insulator 280 as a mask. For example, when a tantalum nitride film is used for the conductor 242A, an ICP etching apparatus is used and BCl 3 is used as an etching gas. ３ and Cl ２ The etching process can be carried out using

[0350] Furthermore, the conductor 242A is processed using the insulator 280 as a mask to form the conductors 242a and 242b (see FIGS. 30D1 and 30D2). For example, when a tantalum nitride film is used for the conductor 242A, an ICP etching apparatus is used, and Cl is added to the etching gas. ２ and Ar. In this case, the oxide semiconductor 230 and the insulator 222 can function as an etching stopper. In this case, as shown in FIG. 30D2 , in a cross-sectional view of the transistor 200 in the channel width direction, a curved surface may be formed between the side surface of the oxide semiconductor 230 and the top surface of the oxide semiconductor 230. In other words, the end of the side surface and the end of the top surface may be rounded.

[0351] Furthermore, a depression might be formed in a portion of the oxide semiconductor 230 that is exposed from the conductor 242a and the conductor 242b. In other words, on the top surface of the oxide semiconductor 230, a region sandwiched between the conductor 242a and the conductor 242b might be lower in height than a region overlapping with the conductor 242a and a region overlapping with the conductor 242b.

[0352] In this manner, openings can be formed in the insulator 275 and the insulator 280, and the insulator 271a, the insulator 271b, the conductor 242a, and the conductor 242b can be formed.

[0353] In addition, when the conductors 242a and 242b have a two-layer structure and an insulator 255 is provided, as shown in Figures 16A to 16D, the following process can be performed. In this case, the conductor 242A has a layered structure consisting of conductors that will become conductors 242a1 and 242b1, and conductors that will become conductors 242a2 and 242b2. In the process shown in Figures 30D1 and 30D2, the etching process is stopped when the conductors 242a2 and 242b2 are formed, exposing the conductors that will become conductors 242a1 and 242b1. Next, an insulating film that will become the insulator 255 is formed, and a portion of the insulating film is removed by anisotropic etching. This allows the formation of sidewall-shaped insulators 255 that contact the side surfaces of the conductors 242a2 and 242b2. Furthermore, at this time, if the insulator 255 is formed by lithography, it is possible to form the insulator 255 in a shape having a protrusion at the bottom, as shown in Fig. 17C etc. Then, by removing the exposed portions of the conductors that will become the conductors 242a1 and 242b1 from the insulator 255, it is possible to form the conductors 242a1 and 242b1 below the insulator 255, the conductors 242a2, and the conductors 242b2.

[0354] Note that after processing the conductor 242A, an ashing treatment using oxygen plasma may be performed. By performing such oxygen plasma treatment, impurities generated during the etching treatment and diffused into the oxide semiconductor 230 and the like can be removed. Examples of such impurities include those originating from components contained in the workpiece of the etching treatment and components contained in the gas used in the etching treatment. Examples of such impurities include chlorine, fluorine, tantalum, silicon, and hafnium. Removing the impurities attached to the oxide semiconductor 230 in this manner can improve the electrical characteristics and reliability of the transistor.

[0355] Furthermore, the processing of the conductor 242A and the oxygen plasma treatment can be performed consecutively without exposure to the outside air. For example, a multi-chamber etching apparatus may be used to perform the treatment without exposure to the outside air.

[0356] Furthermore, cleaning treatment is preferably performed to remove impurities and the like that have adhered to the surface of the oxide semiconductor 230 during the etching process. Examples of cleaning methods include wet cleaning using a cleaning solution or the like (also referred to as wet etching treatment), plasma treatment using plasma, and cleaning by heat treatment. These cleaning methods may be combined as appropriate. Note that the cleaning treatment may deepen the recesses.

[0357] Wet cleaning may be performed using an aqueous solution in which one or more of oxalic acid, phosphoric acid, and hydrofluoric acid are diluted with carbonated water or pure water. Wet cleaning may also be performed using an aqueous solution in which ammonia water is diluted with carbonated water or pure water. Wet cleaning may also be performed using pure water or carbonated water. Alternatively, ultrasonic cleaning may be performed using these aqueous solutions, pure water, or carbonated water. Alternatively, these cleaning methods may be combined as appropriate.

[0358] In this specification and the like, an aqueous solution obtained by diluting hydrofluoric acid with pure water may be referred to as diluted hydrofluoric acid, and an aqueous solution obtained by diluting ammonia water with pure water may be referred to as diluted ammonia water. The concentration, temperature, etc. of the aqueous solution are adjusted appropriately depending on the impurities to be removed and the configuration of the semiconductor device to be cleaned. The ammonia concentration of the diluted ammonia water is preferably 0.01% or more and 5% or less, and more preferably 0.1% or more and 0.5% or less. The hydrogen fluoride concentration of the diluted hydrofluoric acid is preferably 0.01 ppm or more and 100 ppm or less, and more preferably 0.1 ppm or more and 10 ppm or less.

[0359] Note that the ultrasonic cleaning is preferably performed at a frequency of 200 kHz or higher, more preferably 900 kHz or higher, because damage to the oxide semiconductor 230 and the like can be reduced by using such a frequency.

[0360] The cleaning process may be repeated multiple times, and the cleaning solution may be changed for each cleaning process. For example, a first cleaning process may be performed using diluted hydrofluoric acid or diluted ammonia water, and a second cleaning process may be performed using pure water or carbonated water.

[0361] In this embodiment, wet cleaning is performed using carbonated water as the cleaning treatment. By performing such cleaning treatment, impurities attached to the surface of the oxide semiconductor 230 or diffused into the oxide semiconductor 230 can be removed. Furthermore, the surface layer of the oxide semiconductor 230 damaged by the etching treatment can also be removed.

[0362] It is preferable to perform heat treatment after the etching or cleaning. The temperature of the heat treatment is 100° C. to 650° C., preferably 250° C. to 600° C., more preferably 300° C. to 550° C., and still more preferably 350° C. to 400° C. Note that the heat treatment is performed in an atmosphere of nitrogen gas or an inert gas, or an atmosphere containing an oxidizing gas at 10 ppm or more, 1% or more, or 10% or more. The heat treatment is preferably performed in an atmosphere containing oxygen. For example, the heat treatment is preferably performed at 350° C. for 1 hour with a flow ratio of nitrogen gas to oxygen gas of 4:1. This allows oxygen to be supplied to the oxide semiconductor 230, thereby reducing oxygen vacancies. Furthermore, such heat treatment can improve the crystallinity of the oxide semiconductor 230. Furthermore, the supplied oxygen reacts with hydrogen remaining in the oxide semiconductor 230, converting the hydrogen into H ２ As a result, hydrogen remaining in the oxide semiconductor 230 is recombined with the oxygen vacancies to form V Ｏ The formation of H can be suppressed. Therefore, the electrical characteristics of the transistor including the oxide semiconductor 230 can be improved, and reliability can be improved. Furthermore, variation in the electrical characteristics of a plurality of transistors formed over the same substrate can be suppressed. Note that the heat treatment may be performed under reduced pressure. Alternatively, after the heat treatment in an oxygen atmosphere, the heat treatment may be performed in a nitrogen atmosphere without exposure to the air. Furthermore, the heat treatment can also serve as the heat treatment after the formation of the oxide semiconductor film 230f. Therefore, the heat treatment may cause the growth of a crystalline region of the oxide semiconductor 230.

[0363] 16A to 16D, when the conductors 242a and 242b are formed into a layered structure, an insulator 255 having an inorganic insulator that is resistant to oxidation is provided in contact with the side surfaces of the conductors 242a2 and 242b2. This prevents the conductors 242a2 and 242b2 from being excessively oxidized by the heat treatment, even if the conductors 242a2 and 242b2 are made of a tungsten film that is relatively easily oxidized.

[0364] Note that when heat treatment is performed with the conductor 242a and the conductor 242b in contact with the oxide semiconductor 230, the sheet resistance of a region of the oxide semiconductor 230 overlapping with the conductor 242a and the region of the oxide semiconductor 230 overlapping with the conductor 242b may decrease. Also, the carrier concentration may increase. Therefore, the resistance of the region of the oxide semiconductor 230 overlapping with the conductor 242a and the region of the oxide semiconductor 230 overlapping with the conductor 242b can be reduced in a self-aligned manner.

[0365] 4A , even when the oxide semiconductor 230 has a stacked structure and a metal oxide with relatively low conductivity or a metal oxide with a wide band gap is used for the oxide semiconductor 230c, the resistance of the region overlapping with the conductor 242a and the region overlapping with the conductor 242b in the oxide semiconductor 230 can be reduced as described above. This allows source and drain regions to be formed in the oxide semiconductor 230c.

[0366] Next, an insulating film 250f that will become the insulator 250 is formed so as to cover the openings formed in the insulator 280 and the like (see FIGS. 31A to 31D ). Here, the insulating film 250f is formed along the openings in the insulator 280 and the insulator 275. The insulating film 250f is in contact with the insulator 280, the conductor 242a, the conductor 242b, the insulator 222, the insulator 224, and the oxide semiconductor 230.

[0367] The insulating film 250f can be formed using a sputtering method, a CVD method, an MBE method, a PLD method, or an ALD method. For example, the insulating film 250f is preferably formed using an ALD method. The insulating film 250f is preferably formed to a thin film thickness, and it is necessary to minimize film thickness variation. In contrast, the ALD method is a film formation method in which a precursor and a reactant (e.g., an oxidizer) are alternately introduced. The film thickness can be adjusted by the number of times this cycle is repeated, allowing for precise film thickness adjustment. Furthermore, the insulating film 250f must be formed with good coverage on the bottom and side surfaces of the opening. By using the ALD method, atomic layers can be deposited one by one on the bottom and side surfaces of the opening, allowing the insulating film 250f to be formed with good coverage on the opening.

[0368] When the insulating film 250f is formed by the ALD method, ozone (O ３ ), oxygen (O ２ ), water (H ２ O) and the like can be used. ３ ), oxygen (O ２ By using HCl, HCl, or the like as an oxidizing agent, hydrogen diffusing into the oxide semiconductor 230 can be reduced.

[0369] The insulator 250 can have a layered structure as shown in Fig. 4B etc. Below, a method for forming the insulating film 250f when the insulator 250 has a four-layer structure of insulators 250a, 250b, 250d, and 250c, similar to Fig. 4B, will be described.

[0370] First, a film to become insulator 250a is formed so as to cover an opening formed in insulator 280 or the like, and then a film to become insulator 250b is formed on the film to become insulator 250a. In this embodiment, aluminum oxide is formed as the film to become insulator 250a by thermal ALD, and silicon oxide is formed as the film to become insulator 250b by PEALD.

[0371] Next, microwave treatment (also referred to as microwave plasma treatment or microwave-excited high-density plasma treatment) is preferably performed in an oxygen-containing atmosphere. Here, microwave treatment refers to treatment using, for example, a device having a power source that generates high-density plasma using microwaves. In addition, in this specification and the like, microwave refers to electromagnetic waves having a frequency of 300 MHz or more and 300 GHz or less.

[0372] In the microwave treatment, it is preferable to use a microwave treatment device having a power supply that generates high-density plasma using microwaves. Here, the frequency of the microwave treatment device is preferably 300 MHz to 300 GHz, more preferably 2.4 GHz to 2.5 GHz, and can be, for example, 2.45 GHz. The use of high-density plasma can generate high-density oxygen radicals. Furthermore, the power of the power supply that applies microwaves to the microwave treatment device is preferably 1000 W to 10,000 W, more preferably 2000 W to 5,000 W. Furthermore, the microwave treatment device may have a power supply that applies RF to the substrate side. Furthermore, by applying RF to the substrate side, oxygen ions generated by high-density plasma can be efficiently introduced into the oxide semiconductor 230.

[0373] The microwave treatment is preferably carried out under reduced pressure, with the pressure preferably being 10 Pa or higher and 1000 Pa or lower, and more preferably being 300 Pa or higher and 700 Pa or lower. The treatment temperature is preferably 750°C or lower, more preferably 500°C or lower, and can be, for example, about 250°C. After the oxygen plasma treatment, a heat treatment may be carried out without exposure to the outside air. The heat treatment temperature is, for example, preferably 100°C or higher and 750°C or lower, and more preferably 300°C or higher and 500°C or lower.

[0374] Furthermore, for example, the microwave treatment can be performed using oxygen gas and argon gas. Here, the oxygen flow rate ratio (O ２ / (O ２ The oxygen flow rate ratio (O + Ar) is greater than 0% and less than or equal to 100%. ２ / (O ２The oxygen flow rate ratio (O ２ / (O ２ The oxygen flow rate ratio (O ２ / (O ２ +Ar)) is set to 10% or more and 30% or less. By performing the microwave treatment in an atmosphere containing oxygen in this manner, the carrier concentration in the region exposed through the opening of the oxide semiconductor 230 can be reduced. Furthermore, by preventing an excessive amount of oxygen from being introduced into the chamber during the microwave treatment, an excessive decrease in the carrier concentration in the oxide semiconductor 230 can be prevented.

[0375] By performing microwave treatment in an atmosphere containing oxygen, oxygen gas can be converted into plasma using microwaves or high frequency waves such as RF, and the oxygen plasma can be applied to a region between the conductor 242 a and the conductor 242 b of the oxide semiconductor 230. The action of the plasma, microwaves, or the like can reduce the V Ｏ The H can be split into oxygen vacancies and hydrogen, and the hydrogen can be removed from the region. Here, when using the structure shown in FIG. 4B or the like, it is preferable to use an insulating film (such as aluminum oxide) that has the function of capturing or fixing hydrogen as the film that becomes the insulator 250a. With this structure, the hydrogen generated by the microwave treatment can be captured or fixed in the film that becomes the insulator 250a. In this way, the V included in the channel formation region Ｏ As a result, oxygen vacancies in the channel formation region and V Ｏ By supplying oxygen radicals generated by the oxygen plasma to the oxygen vacancies formed in the channel formation region, the oxygen vacancies in the channel formation region can be further reduced, and the carrier concentration can be lowered.

[0376] The oxygen implanted into the channel formation region can take various forms, such as oxygen atoms, oxygen molecules, oxygen ions, and oxygen radicals (atoms, molecules, or ions with an unpaired electron, also called O radicals). The oxygen implanted into the channel formation region may take one or more of the above forms, and oxygen radicals are particularly preferred. Furthermore, the film quality of the insulator 250 can be improved, thereby improving the reliability of the transistor.

[0377] Meanwhile, the oxide semiconductor 230 has a region overlapping with either the conductor 242a or the conductor 242b. The region can function as a source region or a drain region. Here, the conductor 242a and the conductor 242b preferably function as a shielding film against the action of microwaves, high frequency waves such as RF, oxygen plasma, and the like when microwave treatment is performed in an oxygen-containing atmosphere. Therefore, the conductor 242a and the conductor 242b preferably have a function of shielding electromagnetic waves of 300 MHz to 300 GHz, for example, 2.4 GHz to 2.5 GHz.

[0378] The conductors 242a and 242b shield the oxide semiconductor 230 from microwaves, high-frequency waves such as RF, oxygen plasma, and the like, and therefore these effects do not reach a region of the oxide semiconductor 230 that overlaps with either the conductor 242a or the conductor 242b. As a result, V Ｏ Since the amount of H is reduced and an excessive amount of oxygen is not supplied, a decrease in the carrier concentration can be prevented.

[0379] In this manner, oxygen vacancies and V Ｏ By removing H, the channel formation region can be made i-type or substantially i-type. Furthermore, the supply of excess oxygen to the regions that function as source or drain regions can be suppressed, and the conductivity (low resistance region state) before the microwave treatment can be maintained. This suppresses fluctuations in the electrical characteristics of the transistor, and suppresses variations in the electrical characteristics of the transistor within the substrate surface.

[0380] Furthermore, by performing microwave treatment to modify the film quality of the film that becomes the insulator 250a and the film that becomes the insulator 250b, diffusion of hydrogen, water, impurities, and the like can be suppressed. Therefore, in a post-process such as film formation of a conductive film that becomes the conductor 260 or a post-treatment such as heat treatment, diffusion of hydrogen, water, impurities, and the like through the insulator 250 into the oxide semiconductor 230 and the like can be suppressed. In this way, improving the film quality of the insulator 250 can improve the reliability of the transistor.

[0381] Next, a film that will become the insulator 250d is formed on the film that will become the insulator 250b. In this embodiment, the film that will become the insulator 250d is formed by thermal ALD using hafnium oxide. Alternatively, the film that will become the insulator 250d can be formed by thermal ALD using hafnium zirconium oxide. Note that microwave processing may be performed again after the film that will become the insulator 250d is formed.

[0382] Next, a film to become the insulator 250c is formed on the film to become the insulator 250d. In this embodiment, a silicon nitride film is formed by PEALD as the film to become the insulator 250c. In this manner, an insulating film 250f can be formed, which includes the films to become the insulators 250a to 250d.

[0383] Although the above describes an example in which microwave treatment is performed after the film to be the insulator 250b and the film to be the insulator 250d are formed, the present invention is not limited to this. A configuration in which microwave treatment is performed after the films to be the insulator 250c are formed may also be used. Alternatively, a configuration in which microwave treatment is performed before the film to be the insulator 250a is formed may also be used. Furthermore, a configuration in which microwave treatment is performed three or more times may also be used. Furthermore, the microwave treatment may also serve as the heat treatment described in Embodiment 2. Therefore, the microwave treatment may cause a crystalline region of the oxide semiconductor 230 to grow.

[0384] After the microwave treatment, heat treatment may be performed while the reduced pressure state is maintained. By performing such treatment, hydrogen in the insulating film and the oxide semiconductor 230 can be efficiently removed. Alternatively, the step of performing heat treatment while the reduced pressure state is maintained after the microwave treatment may be repeated multiple times. By repeatedly performing the heat treatment, hydrogen in the insulating film and the oxide semiconductor 230 can be more efficiently removed. Note that the heat treatment temperature is preferably 300° C. or higher and 500° C. or lower. The heat treatment described above can also serve as the heat treatment described in Embodiment 2. Therefore, the heat treatment may cause growth of a crystalline region in the oxide semiconductor 230.

[0385] Next, a conductive film 260f to be the conductor 260 is formed (see FIGS. 31A to 31D ). The conductive film 260f can be formed by a sputtering method, a CVD method, an MBE method, a PLD method, a plating method, or an ALD method using the above-described conductive material. For example, a titanium nitride film and a tungsten film may be stacked by a CVD method. As shown in FIG. 4A , the conductor 260 can have a stacked structure of a titanium nitride conductor 260a and a tungsten conductor 260b. Note that the conductive film 260f may be formed while heating the substrate. Heating the substrate can also serve as the heat treatment described in Embodiment 2. Therefore, the substrate heating may cause a crystalline region of the oxide semiconductor 230 to grow.

[0386] Next, the insulating film 250f and the conductive film 260f are polished by CMP until the insulator 280 is exposed. That is, the portions of the insulating film 250f and the conductive film 260f exposed from the openings are removed. As a result, the insulator 250 and the conductor 260 (the conductor 260a and the conductor 260b) are formed in the openings overlapping the conductor 205 (see FIGS. 32A to 32D).

[0387] As a result, the insulator 250 is provided in the opening in contact with the conductor 242a, the conductor 242b, the oxide semiconductor 230, the insulator 224, and the insulator 222. The conductor 260 is arranged to fill the opening with the insulator 250 interposed therebetween. In this manner, the transistor 200 is formed.

[0388] Next, the insulator 282 is deposited over the insulator 250, the conductor 260, and the insulator 280 (see FIGS. 33A to 33D). The insulator 282 can be deposited by, for example, a sputtering method, a CVD method, an MBE method, a PLD method, or an ALD method. The insulator 282 is preferably deposited by a sputtering method. By using a sputtering method that does not require the use of hydrogen-containing molecules in the deposition gas, the hydrogen concentration in the insulator 282 can be reduced.

[0389] 4A, the insulator 282 preferably has a stacked structure of an insulator 282a and an insulator 282b. Here, the insulator 282a is preferably formed by an ALD method, and the insulator 282b is preferably formed by a sputtering method.

[0390] In this embodiment, the insulator 282a may be formed using aluminum oxide by a thermal ALD method. Here, the thickness of the insulator 282a may be 1 nm to 20 nm, preferably 3 nm to 10 nm.

[0391] By forming the insulator 282a by the ALD method, the insulator 282a can be formed without causing excessive damage to the surface where the insulator 282a is formed. Therefore, excessive damage to the upper end of the insulator 250 and the top surface of the conductor 260 can be prevented, thereby improving the electrical characteristics and reliability of the transistor 200.

[0392] Furthermore, by forming the insulator 282a by an ALD method, the insulator 282a can be formed without adding oxygen to the insulator 280. This prevents excessive oxygen from being added to the insulator 280. Therefore, the electrical characteristics and reliability of the transistor 200 can be improved.

[0393] In this embodiment, the insulator 282b may be formed using aluminum oxide by a sputtering method. By using a sputtering method in which hydrogen-containing molecules are not used as a deposition gas, the hydrogen concentration in the insulator 282 can be reduced.

[0394] Here, by depositing the insulator 282b in an oxygen-containing atmosphere by sputtering, oxygen can be added to the insulator 280 during deposition. This allows the insulator 280 to contain excess oxygen. At this time, it is preferable to deposit the insulator 282b while heating the substrate. By depositing the insulator 282b on the insulator 282a, oxygen is added through the insulator 282a, allowing the amount of oxygen injected into the insulator 280 to be controlled. If the insulator 282a is thick, the oxygen addition is more likely to be hindered, and the amount of oxygen injected into the insulator 280 decreases. If the insulator 282a is thin, the oxygen addition is less likely to be hindered, and the amount of oxygen injected into the insulator 280 increases. For example, by setting the thickness of the insulator 282a within the above range, a sufficient amount of oxygen can be supplied to the oxide semiconductor 230 and an excessive amount of oxygen can be prevented from being supplied to the oxide semiconductor 230. This can improve the electrical characteristics and reliability of the transistor 200. Note that oxygen can be added to the top end of the insulator 250 as well as the insulator 280 when the insulator 282b is formed.

[0395] Furthermore, by forming the insulator 282b on the insulator 282a, the upper end of the insulator 250 and the upper surface of the conductor 260 can be protected from the impact of ion collisions caused by the sputtering formation of the insulator 282b.

[0396] The aluminum oxide film is formed using an aluminum target in an atmosphere containing oxygen gas. The amount of oxygen implanted into the insulator 280 can be controlled by the magnitude of the bias power applied to the substrate by the sputtering method. For example, the smaller the bias power, the less oxygen is implanted into the insulator 280, and the more likely the oxygen amount is to saturate even if the insulator 282b is thin. Furthermore, the greater the bias power, the more oxygen is implanted into the insulator 280. By reducing the bias power, the amount of oxygen implanted into the insulator 280 can be suppressed. Note that when applying a substrate bias using an RF power supply, the RF frequency is preferably 10 MHz or higher. Typically, it is 13.56 MHz. The higher the RF frequency, the less damage can be caused to the substrate.

[0397] Heat treatment may be performed before the formation of the insulator 282b. The heat treatment may be performed under reduced pressure, and the insulator 282b may be formed successively without exposure to the air. By performing such treatment, moisture and hydrogen adsorbed on the surface of the insulator 280 can be captured or fixed to the insulator 282a, thereby reducing the moisture and hydrogen concentrations in the insulator 280. The temperature of the heat treatment is preferably 100° C. or higher and 400° C. or lower. In this embodiment, the temperature of the heat treatment is 250° C.

[0398] 8 , oxygen can be diffused from the insulator 224 to the oxide semiconductor 230 through the insulator 250. Note that the heat treatment for supplying oxygen to the oxide semiconductor 230 can be performed as appropriate after the insulator 250 is formed.

[0399] Even when the layer 227 with low oxygen permeability is provided between the insulator 224 and the oxide semiconductor 230, excess oxygen contained in the insulator 224 can be supplied to the oxide semiconductor 230 through the insulator 250. Furthermore, supplying oxygen through the insulator 250 enables oxygen to be selectively supplied to the channel formation region of the oxide semiconductor 230 and its vicinity. Therefore, excessive oxidation of the source and drain regions of the oxide semiconductor 230 can be prevented, and therefore the carrier concentration in the source or drain regions can be reduced, thereby preventing a decrease in the on-state current and field-effect mobility of the transistor 200.

[0400] Furthermore, by using indium oxide having high oxygen permeability for the oxide semiconductor 230, oxygen vacancies in the oxide semiconductor 230 are sufficiently reduced, and excess oxygen can be diffused from the oxide semiconductor 230. This prevents excessive oxygen from being contained in the oxide semiconductor 230, thereby preventing the threshold voltage of the transistor 200 from becoming excessively high. Therefore, the electrical characteristics and reliability of the transistor 200 including the oxide semiconductor 230 can be improved.

[0401] Next, the insulator 283 is formed over the insulator 282 (see FIGS. 33A to 33D). The insulator 283 can be formed by a sputtering method, a CVD method, an MBE method, a PLD method, or an ALD method. The insulator 283 is preferably formed by a sputtering method. The hydrogen concentration in the insulator 283 can be reduced by using a sputtering method, which does not require the use of molecules containing hydrogen in the deposition gas. In this embodiment, silicon nitride is formed as the insulator 283 by a sputtering method.

[0402] In this embodiment, silicon nitride is formed as the insulator 283 by a sputtering method, and aluminum oxide is formed as the insulator 282 by a thermal ALD method and a sputtering method. By using silicon nitride, which has a function of suppressing hydrogen diffusion, for the insulator 283 in this manner, diffusion of hydrogen from the upper layer of the transistor 200 can be suppressed. Furthermore, by using aluminum oxide, which has a function of capturing or fixing hydrogen, for the insulator 282, hydrogen contained in the insulator 280 or the like can be captured or fixed to the insulator 282. As a result, the hydrogen concentration in the oxide semiconductor 230 and its vicinity can be reduced.

[0403] Next, the insulator 285 is formed over the insulator 283 (see FIGS. 33A to 33D). The insulator 285 can be formed by a sputtering method, a CVD method, an MBE method, a PLD method, or an ALD method. The insulator 285 is preferably formed by a sputtering method. The hydrogen concentration in the insulator 285 can be reduced by using a sputtering method, which does not require the use of molecules containing hydrogen in the deposition gas. In this embodiment, silicon oxide is formed as the insulator 285 by a sputtering method.

[0404] Here, it is preferable that the insulators 282, 283, and 285 are successively formed by sputtering without exposure to the atmospheric environment. By forming the insulators 282, 283, and 285 without exposure to the atmospheric environment, impurities or moisture from the atmospheric environment can be prevented from adhering to the insulators 282, 283, and 285, and the vicinity of the interface between the insulators 282 and 283 and the vicinity of the interface between the insulators 283 and 285 can be kept clean.

[0405] Next, openings reaching the conductor 242a are formed in the insulators 271a, 275, 280, 282, 283, and 285, and openings reaching the conductor 242b are formed in the insulators 271b, 275, 280, 282, 283, and 285. The openings may be formed using lithography. The openings are preferably formed by processing the workpiece using dry etching. Since dry etching allows anisotropic etching, it is suitable for forming openings with high aspect ratios. When performing anisotropic etching, reactive ion etching, for example, is preferably performed. The conditions for the dry etching method and the dry etching apparatus can be described above. The shape of the openings in a top view can be a circle, an approximately circular shape such as an ellipse, a polygonal shape such as a rectangle, or a polygonal shape with rounded corners such as a rectangle.

[0406] Next, after the openings are formed, heat treatment is performed. The temperature for the heat treatment may be 100° C. or higher and 600° C. or lower, preferably 250° C. or higher and 550° C. or lower, more preferably 350° C. or higher and 450° C. or lower. Note that the heat treatment is preferably performed in a nitrogen gas or inert gas atmosphere. Furthermore, the heat treatment is preferably performed in an atmosphere containing neither an oxidizing gas nor oxygen gas because the conductors 242a and 242b are exposed. For example, the heat treatment is preferably performed in a nitrogen gas atmosphere at 400° C. for one hour. Note that the heat treatment may be performed under reduced pressure. By the heat treatment, oxygen contained in the insulator 280 can be supplied to the oxide semiconductor 230 through the insulator 250. This can reduce oxygen vacancies in the channel formation region of the oxide semiconductor 230. The heat treatment can also serve as the heat treatment described in Embodiment 2. Therefore, the heat treatment may cause a crystalline region of the oxide semiconductor 230 to grow.

[0407] Here, because the side surface of the insulator 280 is exposed through the opening, the heat treatment can outwardly diffuse oxygen contained in the insulator 280, thereby controlling the amount of oxygen contained in the insulator 280. Meanwhile, because the insulators 282 and 283, which have a barrier property against oxygen, are provided on the insulator 280, oxygen does not outwardly diffuse from the top surface of the insulator 280. This can prevent excessive outward diffusion of oxygen from the insulator 280 and the formation of oxygen vacancies in the insulator 280. Furthermore, the oxide semiconductor 230, the conductor 242a, and the conductor 242b are covered with the insulator 275. This can prevent excessive oxygen from directly diffusing from the insulator 280 to the oxide semiconductor 230, the conductor 242a, and the conductor 242b during the heat treatment.

[0408] As described above, when the insulator 282b is formed, oxygen is added to the insulator 280 through the insulator 282a, thereby controlling the amount of oxygen added to the insulator 280. Furthermore, the heat treatment causes oxygen to diffuse outward from the side surfaces of the insulator 280, thereby making the amount of oxygen in the insulator 280 more favorable. In this manner, oxygen is supplied to the oxide semiconductor 230 from the insulator 280, the amount of oxygen being adjusted, thereby enabling a favorable amount of oxygen to be supplied to the oxide semiconductor 230. This reduces oxygen vacancies in the oxide semiconductor 230 and prevents excessive oxygen from being supplied to the oxide semiconductor 230. Therefore, the electrical characteristics and reliability of the transistor 200 can be improved. Furthermore, the step of exposing the side surfaces of the insulator 280 can also serve as a step of forming openings into which the conductors 240a and 240b are embedded, thereby simplifying the manufacturing process of the semiconductor device.

[0409] By performing the heat treatment, hydrogen contained in the insulator 280, the insulator 250, and the oxide semiconductor 230 moves to the insulator 282 and is trapped in the insulator 282. In other words, hydrogen contained in the insulator 280, the insulator 250, and the oxide semiconductor 230 diffuses into the insulator 282. Therefore, the hydrogen concentration in the insulator 282 increases, but the hydrogen concentrations in the insulators 280, 250, and the oxide semiconductor 230 decrease. Note that providing the insulator 283 in contact with the top surface of the insulator 282 can prevent impurities such as moisture or hydrogen from entering from above the insulator 283 during the heat treatment. By performing the heat treatment, hydrogen contained in the insulator 216, the insulator 224, and the oxide semiconductor 230 moves to the insulator 222 and is trapped in the insulator 222. In other words, hydrogen contained in the insulator 216, the insulator 224, and the oxide semiconductor 230 diffuses into the insulator 222. Therefore, the hydrogen concentration in the insulator 222 is increased, but the hydrogen concentrations in the insulator 216, the insulator 224, and the oxide semiconductor 230 are decreased. Note that by providing the insulator 221 in contact with the lower surface of the insulator 222, impurities such as moisture or hydrogen can be prevented from entering from below the insulator 221 during the heat treatment.

[0410] Next, insulating films to become the insulators 241a and 241b are formed along the shape of the openings. The insulating films can be formed by a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. The insulating films to become the insulators 241a and 241b are preferably formed by an ALD method because they are formed in openings with a large aspect ratio. Furthermore, it is preferable to use an insulating film that has a function of suppressing oxygen permeation as the insulating film to become the insulators 241a and 241b. For example, it is preferable to form a silicon nitride film by a PEALD method. Silicon nitride is preferable because it has high blocking properties against hydrogen.

[0411] Next, the insulating film is anisotropically etched to form insulators 241a and 241b. Here, the insulator 241a is formed to cover the sidewall of the opening above the conductor 242a, and the insulator 241b is formed to cover the sidewall of the opening above the conductor 242b. Dry etching or the like may be used for anisotropically etching the insulating film that will become the insulators 241a and 241b. For example, reactive ion etching is preferably performed. Providing the insulators 241a and 241b on the sidewalls of the openings suppresses oxygen penetration from the outside and prevents oxidation of the conductors 240a and 240b to be formed next. Furthermore, impurities such as water and hydrogen contained in the insulator 280 can be prevented from diffusing into the conductors 240a and 240b. Note that the anisotropic etching may form recesses in parts of the top surfaces of the conductors 242a and 242b.

[0412] Next, a conductive film that will become the conductor 240a and the conductor 240b is formed. The conductive film preferably has a layered structure including a conductor that has a function of suppressing the permeation of impurities such as water and hydrogen. For example, the conductive film may be a layered structure of tantalum nitride, titanium nitride, or the like, and tungsten, molybdenum, copper, or the like. The conductive films that will become the conductor 240a and the conductor 240b can be formed by a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like.

[0413] Next, CMP treatment is performed to remove parts of the conductive film that will become the conductors 240a and 240b, thereby exposing the top surface of the insulator 285. As a result, the conductive film remains only in the openings, and the conductors 240a and 240b can be formed with flat top surfaces (see FIGS. 3A to 3D). Note that the CMP treatment may remove part of the top surface of the insulator 285.

[0414] After the conductor 240a and the conductor 240b are formed, heat treatment may be further performed. The heat treatment may be performed under conditions similar to those of the above-described heat treatment. By performing the heat treatment, the amount of oxygen supplied to the oxide semiconductor 230 can be adjusted. This can improve the electrical characteristics and reliability of the transistor 200.

[0415] In this manner, the semiconductor device shown in FIGS. 3A to 3D can be manufactured.

[0416] 34A1 to 35B2, a manufacturing process of the semiconductor device illustrated in FIG.

[0417] First, the steps up to the step shown in FIGS. 28A to 28D are performed in the same manner as above, until the insulator 280 is formed (see FIGS. 34A1 and 34A2). However, in the structure shown in FIGS. 34A1 and 34A2, the oxide semiconductor 230 has a stacked structure of an oxide semiconductor 230b and an oxide semiconductor 230c on the oxide semiconductor 230b. The oxide semiconductor 230c is processed into an oxide semiconductor 230ca and an oxide semiconductor 230cb in a later step. In addition, a layer 227 is formed between the oxide semiconductor 230b and the insulator 224. For example, indium oxide can be used as the oxide semiconductor 230b, and an In—Ga—Zn oxide having an atomic ratio of In:Ga:Zn=1:1:1 or a composition close to that ratio can be used as the oxide semiconductor 230c. Alternatively, for example, the layer 227 can be made of an In—Ga—Zn oxide having an atomic ratio of In:Ga:Zn=1:3:2 or a composition close thereto.

[0418] 29A to 29D , the conductor 242A, the insulator 271A, the insulator 275, and the insulator 280 are processed to form openings that reach the oxide semiconductor 230 and the insulator 222 (see FIGS. 34B1 and 34B2 ). Here, the insulators 271a, 271b, the conductors 242a, and the conductors 242b are formed. At this time, recesses may be formed in portions of the oxide semiconductor 230c that are exposed from the conductors 242a and 242b.

[0419] Next, etching is performed to remove portions of the oxide semiconductor 230c that are exposed from the conductor 242a and the conductor 242b (see FIGS. 35A1 and 35A2 ). This separates the oxide semiconductor 230c into an oxide semiconductor 230ca located below the conductor 242a and an oxide semiconductor 230cb located below the conductor 242b. This structure allows the channel of the transistor 200 to be formed only in the oxide semiconductor 230b, not in the oxide semiconductor 230c. This improves the on-state current, carrier mobility, and frequency characteristics of the transistor 200. The etching can be performed by dry etching or wet etching. For example, wet etching is preferably performed using an etchant with a high etching selectivity relative to the oxide semiconductor 230b.

[0420] For example, when indium oxide is used for the oxide semiconductor 230b and In—Ga—Zn oxide with an atomic ratio of In:Ga:Zn=1:1:1 is used for the oxide semiconductor 230c, the oxide semiconductor 230c can be selectively etched by wet etching. For example, one or more of oxalic acid, phosphoric acid, nitric acid, acetic acid, hydrochloric acid, and hydrofluoric acid can be used as the etchant. A mixed solution of any of the above acids or a mixed solution of any of the above acids with another acid can also be used. For example, a mixed solution of phosphoric acid, hydrofluoric acid, and nitric acid can be used. A mixed solution of nitric acid, acetic acid, and phosphoric acid can also be used. A mixed solution of nitric acid and hydrochloric acid can also be used. An alkaline solution such as a tetramethylammonium hydroxide (TMAH) solution can also be used as the etchant. An aqueous solution obtained by diluting any of the above solutions with pure water can also be used.

[0421] 35A1 , when the oxide semiconductor 230c is processed by wet etching, the side surfaces of the oxide semiconductors 230ca and 230cb may be side-etched. In this case, in the transistor 200, the side surface of the oxide semiconductor 230ca facing the conductor 260 is recessed from the side surface of the conductor 242a facing the conductor 260, and the side surface of the oxide semiconductor 230cb facing the conductor 260 is recessed from the side surface of the conductor 242b facing the conductor 260. Therefore, the distance between the side surface of the oxide semiconductor 230ca facing the conductor 260 and the side surface of the oxide semiconductor 230cb facing the conductor 260 is longer than the distance between the side surface of the conductor 242a facing the conductor 260 and the side surface of the conductor 242b facing the conductor 260.

[0422] 20A and other figures, when the conductor 242a and the conductor 242b have a two-layer structure and the insulator 255 is provided, in the transistor 200, the side surface of the oxide semiconductor 230ca facing the conductor 260 is recessed from the side surface of the conductor 242a1 facing the conductor 260, and the side surface of the oxide semiconductor 230cb facing the conductor 260 is recessed from the side surface of the conductor 242b1 facing the conductor 260. Therefore, the distance between the side surface of the oxide semiconductor 230ca facing the conductor 260 and the side surface of the oxide semiconductor 230cb facing the conductor 260 is longer than the distance between the side surface of the conductor 242a1 facing the conductor 260 and the side surface of the conductor 242b1 facing the conductor 260.

[0423] 35A2, the side surface of the layer 227 may be side-etched. In this case, in the region overlapping with the conductor 260 of the transistor 200, the side surface of the layer 227 in the channel width direction is formed to be recessed from the side surface of the insulator 224 in the channel width direction.

[0424] Next, the insulator 250 is formed to cover the insulator 280, the oxide semiconductor 230b, the layer 227, the insulator 224, and the insulator 222 (see FIGS. 35B1 and 35B2). The description of FIGS. 31A to 31D can be referred to for the method for forming the insulator 250. By using a film formation method with good coverage, such as an ALD method, it may be possible to fill part of the insulator 250 in recesses on the side surfaces of the oxide semiconductor 230ca, the oxide semiconductor 230cb, and the layer 227.

[0425] As shown in FIG. 9A and other drawings, the insulator 250 can have a stacked structure including an insulator 250a, an insulator 250b on the insulator 250a, and an insulator 250c on the insulator 250b. For example, hafnium oxide with a thickness of 2 nm can be used for the insulator 250a, silicon oxide with a thickness of 2 nm can be used for the insulator 250b, and silicon nitride with a thickness of 1 nm can be used for the insulator 250c. By using hafnium oxide for the insulator 250a in this manner, the insulator 250a containing hafnium oxide can be provided in contact with the oxide semiconductor 230b containing indium oxide near the channel formation region of the transistor 200. With this structure, impurities such as hydrogen and excess oxygen contained in the oxide semiconductor 230b can be absorbed by the insulator 250a. The hydrogen and oxygen absorbed by the insulator 250a can be removed from the insulator 250a by heat treatment in a later step. ２ In this manner, impurities such as hydrogen and an excess amount of oxygen in the oxide semiconductor 230b can be reduced, thereby improving the electrical characteristics and reliability of the transistor 200.

[0426] 31A to 31D . In the steps illustrated in FIGS. 34A1 to 35B2 , the layer 227 is provided between the insulator 224 and the oxide semiconductor 230 b, as in FIG. 9A . However, the present invention is not limited to this. For example, as illustrated in FIG. 9C , the transistor 200 can be manufactured by the above method even in a case where the layer 227 is not provided between the insulator 224 and the oxide semiconductor 230 b.

[0427] The semiconductor device according to this embodiment includes an OS transistor. In this embodiment, the impurity 220 in the insulator 224 has a negative fixed charge, which can suppress a negative shift in the electrical characteristics of the OS transistor and provide normally-off characteristics. This makes it possible to provide a semiconductor device with favorable electrical characteristics.

[0428] This embodiment mode can be combined with other embodiment modes as appropriate. In addition, in this specification, when a plurality of configuration examples are shown in one embodiment mode, the configuration examples can be combined as appropriate.

[0429] Embodiment 2 In this embodiment, an oxide semiconductor that can be used as a semiconductor layer of a transistor will be described. The oxide semiconductor described in this embodiment can be used for the oxide semiconductor 230 shown in Embodiment 1, or the like. As the oxide semiconductor of one embodiment of the present invention, a layer containing a metal oxide can be used as a single layer or a stacked layer. Note that in an oxide semiconductor with a stacked structure, it may be difficult to identify boundaries between stacked films, as will be described later.

[0430] [Metal Oxide] The metal oxide according to one embodiment of the present invention preferably contains at least indium (In) or zinc (Zn), and particularly preferably contains indium as the main component. The metal oxide preferably contains two or three elements selected from indium, element M, and zinc, and particularly preferably contains indium and zinc as the main components. Here, the metal oxide may contain indium and zinc as the main components and may further contain element M. The element M is a metal element or a metalloid element having a high bond energy with oxygen, for example, a metal element or a metalloid element having a bond energy with oxygen higher than that of indium. Specific examples of element M include aluminum, gallium, tin, yttrium, titanium, vanadium, chromium, manganese, iron, cobalt, nickel, zirconium, molybdenum, hafnium, tantalum, tungsten, lanthanum, cerium, neodymium, magnesium, calcium, strontium, barium, boron, silicon, germanium, and antimony. The element M contained in the metal oxide is preferably one or more of the above elements, more preferably one or more selected from aluminum, gallium, tin, and yttrium, and even more preferably one or more selected from gallium and tin. When the element M contained in the metal oxide is gallium, the metal oxide according to one embodiment of the present invention preferably contains one or more selected from indium, gallium, and zinc. Note that in this specification and the like, metal elements and metalloid elements may be collectively referred to as "metal elements," and the "metal element" described in this specification and the like may also include metalloid elements.

[0431] Examples of metal oxides according to one embodiment of the present invention include indium zinc oxide (In-Zn oxide, also referred to as IZO (registered trademark)), indium tin oxide (In-Sn oxide, also referred to as ITO), indium titanium oxide (In-Ti oxide), indium gallium oxide (In-Ga oxide), indium gallium aluminum oxide (In-Ga-Al oxide), indium gallium tin oxide (In-Ga-Sn oxide, also referred to as IGTO), and indium aluminum zinc oxide (In-Al-Zn oxide, IAZO). Examples of usable metal oxides include indium tin zinc oxide (In—Sn—Zn oxide), indium titanium zinc oxide (In—Ti—Zn oxide), indium gallium zinc oxide (In—Ga—Zn oxide, also referred to as IGZO), indium tin oxide containing silicon oxide (ITSO), indium gallium tin zinc oxide (In—Ga—Sn—Zn oxide, also referred to as IGZTO), and indium gallium aluminum zinc oxide (In—Ga—Al—Zn oxide, also referred to as IGAZO or IAGZO). Alternatively, gallium zinc oxide (Ga—Zn oxide, also referred to as GZO), aluminum zinc oxide (Al—Zn oxide, also referred to as AZO), gallium tin oxide (Ga—Sn oxide), and aluminum tin oxide (Al—Sn oxide) can be used. Indium oxide can be used as the metal oxide according to one embodiment of the present invention. Gallium oxide, zinc oxide, and the like can be used as the metal oxide according to one embodiment of the present invention.

[0432] By increasing the content of indium in the metal oxide, the transistor can have a large on-state current and high frequency characteristics.

[0433] Note that the metal oxide may contain one or more metal elements having a higher period number in the periodic table instead of indium. Alternatively, the metal oxide may contain one or more metal elements having a higher period number in the periodic table in addition to indium. The greater the overlap of the orbitals of metal elements, the greater the carrier conduction in the metal oxide tends to be. Therefore, including a metal element having a higher period number in the periodic table may improve the field-effect mobility of a transistor. Examples of metal elements having a higher period number in the periodic table include metal elements belonging to the fifth period and the sixth period. Specific examples of such metal elements include yttrium, zirconium, silver, cadmium, tin, antimony, barium, lead, bismuth, lanthanum, cerium, praseodymium, neodymium, promethium, samarium, and europium. Note that lanthanum, cerium, praseodymium, neodymium, promethium, samarium, and europium are called light rare earth elements.

[0434] The metal oxide may also contain one or more nonmetallic elements, which may increase the field-effect mobility of the transistor. Examples of nonmetallic elements include carbon, nitrogen, phosphorus, sulfur, selenium, fluorine, chlorine, bromine, and hydrogen.

[0435] Furthermore, by increasing the zinc content in the metal oxide, the metal oxide can be made highly crystalline, which can suppress the diffusion of impurities in the metal oxide, thereby suppressing fluctuations in the electrical characteristics of the transistor and improving its reliability.

[0436] Furthermore, by increasing the content of element M in the metal oxide, the formation of oxygen vacancies in the metal oxide can be suppressed. Therefore, carrier generation due to oxygen vacancies can be suppressed, and a transistor with a small off-state current can be obtained. Furthermore, fluctuations in the electrical characteristics of the transistor can be suppressed, and reliability can be improved.

[0437] A structural example of an oxide semiconductor that can increase the field-effect mobility of a transistor will be described. For example, it is preferable to use a stacked structure of indium oxide and IGZO. Specifically, it is preferable that the oxide semiconductor has indium oxide and IGZO on the indium oxide. In addition, it is preferable to use IGZO containing nitrogen as the oxide semiconductor. For example, it is preferable to use IGZO containing nitrogen during or after film formation. ２ By performing O plasma treatment, IGZO containing nitrogen can be formed. As the oxide semiconductor, at least one of indium oxide, In—Ga oxide, In—Zn oxide, and IGZTO is preferably used.

[0438] In the present embodiment, an In-M-Zn oxide may be used as an example of the metal oxide.

[0439] The oxide semiconductor of one embodiment of the present invention preferably includes a crystalline metal oxide. Examples of the structure of a crystalline metal oxide include a c-axis aligned crystalline (CAAC) structure, a polycrystalline (poly-crystalline) structure, and a nanocrystalline (nc) structure. By using a crystalline metal oxide for an oxide semiconductor, the density of defect states in the oxide semiconductor can be reduced. Therefore, the reliability of a transistor including the oxide semiconductor of one embodiment of the present invention can be improved, and the reliability of a semiconductor device including the transistor can be improved.

[0440] Note that the crystallinity of the metal oxide contained in the oxide semiconductor is not particularly limited. For example, the oxide semiconductor may include one or more of an amorphous semiconductor (a semiconductor having an amorphous structure), a single-crystal semiconductor (a semiconductor having a single-crystal structure), or a semiconductor having crystallinity other than single crystal (a microcrystalline semiconductor, a polycrystalline semiconductor, or a semiconductor having a crystalline region in part). When the oxide semiconductor has crystallinity, deterioration of transistor characteristics may be suppressed.

[0441] The crystallinity of an oxide semiconductor can be analyzed by, for example, X-ray diffraction (XRD), transmission electron microscopy (TEM), or electron diffraction (ED). Alternatively, the analysis may be performed by combining a plurality of these techniques.

[0442] The oxide semiconductor of one embodiment of the present invention preferably includes a metal oxide having a CAAC structure. The CAAC structure is a crystal structure in which a plurality of microcrystals (typically, a plurality of microcrystals having a hexagonal crystal structure) have c-axis orientation and are connected without being oriented in the a-b plane. Furthermore, when a cross section of an oxide semiconductor having a CAAC structure is observed using a high-resolution TEM image (also referred to as a multi-beam interference image), it can be confirmed that metal atoms are arranged in a layered manner in the crystal parts. Therefore, an oxide semiconductor having a CAAC structure can also be said to have a structure having layered crystal parts.

[0443] For example, the CAAC structure is formed so that the c-axis is perpendicular or substantially perpendicular to the surface or surface of the oxide semiconductor on which the oxide semiconductor is to be formed. In the CAAC structure, metal atoms are arranged in layers parallel or substantially parallel to the surface on which the oxide semiconductor is to be formed. In the region having the CAAC structure, the c-axis is preferably within 90°±20° (70° or more and 110° or less), more preferably within 90°±15° (75° or more and 105° or less), more preferably within 90°±10° (80° or more and 100° or less), and even more preferably within 90°±5° (85° or more and 95° or less) relative to the surface on which the oxide semiconductor is to be formed.

[0444] When an oxide semiconductor has a CAAC structure, a group of bright spots (specifically, bright spots arranged in layers) reflecting the layered arrangement of metal atoms is observed in a cross section of the oxide semiconductor observed using a TEM image. Specifically, the bright spots are observed to be arranged in layers in a direction parallel or approximately parallel to the surface on which the oxide semiconductor is formed.

[0445] When electron diffraction is performed on an oxide semiconductor having a CAAC structure, spots (bright points) indicating c-axis orientation are observed in the electron diffraction pattern.

[0446] Furthermore, an FFT pattern obtained by performing a fast Fourier transform (FFT) process on a TEM image reflects reciprocal lattice space information similar to an electron diffraction pattern.

[0447] A cross-sectional TEM image of an oxide semiconductor having a CAAC structure is acquired, and an FFT pattern is created by performing FFT processing on each region in the cross-sectional TEM image. The crystal axis direction of each region can be calculated from the created FFT pattern. Specifically, the direction of the line segment connecting two spots that are high in brightness and are approximately equidistant from the center among the spots observed in the created FFT pattern is defined as the crystal axis direction. Regions in which the crystal axis direction of each region calculated from the FFT pattern is preferably 70° to 110° (within 90°±20°) relative to the surface to be formed, more preferably 75° to 105° (within 90°±15°), more preferably 80° to 100° (within 90°±10°), and even more preferably 85° to 95° (within 90°±5°) can be considered to have a CAAC structure.

[0448] When an oxide semiconductor having a CAAC structure is viewed from a direction perpendicular to the surface on which it is formed using a TEM image, a triangular or hexagonal atomic arrangement is observed in the a-b plane, and the oxide semiconductor has crystallinity.

[0449] [Composition of Metal Oxide] The metal oxide according to one embodiment of the present invention preferably contains indium (In), and more preferably has a high In content. By using a metal oxide with a high In content as an oxide semiconductor, the on-state current of a transistor can be increased and the frequency characteristics can be improved. For example, indium oxide is preferably used as the oxide semiconductor.

[0450] Furthermore, the metal oxide according to one embodiment of the present invention may contain zinc. When the metal oxide contains zinc, it becomes a metal oxide with high crystallinity, for example, a metal oxide having a CAAC structure. For example, an In-Zn oxide can be used as the oxide semiconductor. Specifically, a metal oxide having a composition of In:Zn = 1:1 [atomic ratio] or a composition close thereto, a composition of In:Zn = 2:1 [atomic ratio] or a composition close thereto, or a composition of In:Zn = 4:1 [atomic ratio] or a composition close thereto can be used. Note that a composition close thereto includes a range of ±30% of the desired atomic ratio.

[0451] Furthermore, the metal oxide according to one embodiment of the present invention can contain an element M. When the metal oxide contains the element M, oxygen vacancies can be suppressed from being formed in the metal oxide. Thus, the reliability of a transistor including an oxide semiconductor can be improved.

[0452] For example, the oxide semiconductor may be an In—Zn oxide containing a trace amount of element M. Specifically, a metal oxide having an atomic ratio of In:Ga:Zn=4:0.1:1 or a composition thereof, an atomic ratio of In:Ga:Zn=2:0.1:1 or a composition thereof, or an atomic ratio of In:Ga:Zn=1:0.1:1 or a composition thereof may be used. Alternatively, a metal oxide having an atomic ratio of In:Sn:Zn=4:0.1:1 or a composition thereof, an atomic ratio of In:Sn:Zn=2:0.1:1 or a composition thereof, or an atomic ratio of In:Sn:Zn=1:0.1:1 or a composition thereof may be used.

[0453] The oxide semiconductor can be an In—Zn oxide containing an element M. Specifically, metal oxides having a composition of In:M:Zn=1:1:1 (atomic ratio) or a composition thereabout, In:M:Zn=1:1:1.2 (atomic ratio) or a composition thereabout, In:M:Zn=1:1:0.5 (atomic ratio) or a composition thereabout, In:M:Zn=1:1:2 (atomic ratio) or a composition thereabout, In:M:Zn=4:2:3 (atomic ratio) or a composition thereabout, In:M:Zn=1:3:2 (atomic ratio) or a composition thereabout, or In:M:Zn=1:3:4 (atomic ratio) or a composition thereabout can be used.

[0454] When a metal oxide is formed by sputtering, the composition of the formed metal oxide may differ from that of the sputtering target. In particular, the zinc content in the formed metal oxide may decrease to about 50% of that in the sputtering target.

[0455] Furthermore, when forming a metal oxide film containing multiple metal elements, such as In—Ga—Zn oxide, using the ALD method, the ratio of the number of cycles of precursors containing each metal element can be set to match the target composition. For example, when forming an In—Ga—Zn oxide film with an atomic ratio of In:Ga:Zn=1:3:2, one cycle of forming an In-containing precursor and treating it with an oxidizing agent can be performed, three cycles of forming a Ga-containing precursor and treating it with an oxidizing agent can be performed, and two cycles of forming a Zn-containing precursor and treating it with an oxidizing agent can be performed. However, the ratio of the number of cycles of precursors containing each metal element and the atomic ratio of each metal element in the formed metal oxide film may not match.

[0456] The composition of a metal oxide used in an oxide semiconductor can be analyzed by, for example, EDX, XPS, inductively coupled plasma-mass spectrometry (ICP-MS), or inductively coupled plasma-atomic emission spectrometry (ICP-AES). Alternatively, the analysis may be performed by combining a plurality of these techniques. Note that for elements with low content, the actual content and the content obtained by analysis may differ due to the influence of analytical accuracy. For example, when the content of element M is low, the content of element M obtained by analysis may be lower than the actual content.

[0457] The oxide semiconductor of one embodiment of the present invention may have a stacked structure of two or more layers. When the oxide semiconductor has a two-layer structure including a first layer and a second layer over the first layer, the second layer preferably has a different composition from the first layer. When the oxide semiconductor has a three-layer structure including a first layer, a second layer over the first layer, and a third layer over the second layer, the second layer preferably has a different composition from the first layer and the third layer. Note that the first layer can have the same composition as the third layer. Alternatively, the first layer and the third layer can have different compositions. The first to third layers can be used for the oxide semiconductors 230a to 230c described in Embodiment 1.

[0458] The first to third layers may each be made of the metal oxides described above.

[0459] The second layer can be made of, for example, indium oxide, In—Zn oxide, or In—Zn oxide containing a trace amount of element M. Increasing the In content in the second layer can increase the on-state current and improve the frequency characteristics.

[0460] The conduction band minimums of the first and third layers are preferably located closer to the vacuum level than the conduction band minimum of the second layer. In other words, the energy of the conduction band minimum of the first and third layers is preferably lower than the energy of the conduction band minimum of the second layer. In this case, the second layer is sandwiched between the first and third layers, whose conduction band minimums are located closer to the vacuum level, and can function mainly as a current path (channel).

[0461] By sandwiching the second layer between the first layer and the third layer, carriers trapped at and near the interface of the second layer can be reduced. Furthermore, the channel can be moved away from the surface of the gate insulating layer, reducing the effects of surface scattering. This allows for a buried channel transistor in which the channel is moved away from the insulating layer interface, thereby increasing field-effect mobility. Furthermore, the effects of interface states that may form on the back channel side can be reduced, suppressing light degradation of the transistor (e.g., negative bias light degradation), and improving transistor reliability.

[0462] Depending on the constituent elements and compositions of the first, second, and third layers, the second layer may be sandwiched between the first and third layers, whose conduction band minimums are closer to the vacuum level than the second layer. This configuration allows for a buried channel to be realized. In other words, this configuration creates a path through which more current flows in the second layer. This can increase the on-state current or improve reliability.

[0463] When forming a buried channel using the first to third layers, for example, the first and third layers can be made of a metal oxide having a higher Ga content than the second layer. Specifically, the first and third layers can each be made of a metal oxide having an In:Ga:Zn=1:1:1 atomic ratio or a composition thereabout, a metal oxide having an In:Ga:Zn=1:3:2 atomic ratio or a composition thereabout, or a metal oxide having an In:Ga:Zn=1:3:4 atomic ratio or a composition thereabout. Alternatively, Ga-Zn oxide or gallium oxide can be used. Increasing the Ga content of the first and third layers can sometimes position the conduction band minimum of each of the first and third layers closer to the vacuum level than the conduction band minimum of the second layer.

[0464] Furthermore, increasing the Ga content in the first layer and the third layer can improve the barrier properties of the first layer and the third layer against hydrogen. Therefore, hydrogen can be prevented from diffusing from below the first layer or from above the third layer to the second layer. Furthermore, increasing the Ga content in the first layer and the third layer can reduce impurities such as hydrogen and water contained in the oxide semiconductor due to heat or the like applied after the formation of the oxide semiconductor.

[0465] Furthermore, increasing the Ga content in the first layer and the third layer can improve the oxygen barrier properties of the first layer and the third layer. This can suppress oxygen release from the second layer where the channel is formed, and can suppress the formation of oxygen vacancies in the second layer or an increase in the amount of oxygen vacancies in the second layer. This can improve the electrical characteristics of the transistor.

[0466] Furthermore, by increasing the Ga content in the first layer, the resistivity of the first layer can be made higher than that of the second layer in some cases. When the first layer is provided on the back channel side, providing a layer with high resistivity as the first layer can suppress a negative shift in threshold voltage or a decrease in on-current. Therefore, the threshold voltage of the transistor is shifted positively, and the transistor can be made normally off. As described above, the electrical characteristics of the transistor can be improved, and the reliability of the transistor can be improved.

[0467] The band gap of a metal oxide can be evaluated by optical evaluation using a spectrophotometer, spectroscopic ellipsometry, photoluminescence, X-ray photoelectron spectroscopy, or X-ray absorption fine structure (XAFS). Furthermore, a combination of these techniques can be used for analysis. The electron affinity or the bottom of the conduction band can be determined from the ionization potential, which is the energy difference between the vacuum level and the top of the valence band, and the band gap. The ionization potential can be evaluated by, for example, ultraviolet photoelectron spectroscopy (UPS).

[0468] The first layer and the third layer may be made of a metal oxide having a higher In content than the second layer. Alternatively, one of the first layer and the third layer may be made of a metal oxide having a higher In content than the second layer, and the other may be made of a metal oxide having a higher Ga content than the second layer.

[0469] The first layer, the second layer, and the third layer may each have a plurality of layers having the above-described compositions stacked together. For example, the first layer may have a structure in which a metal oxide having a high In content is stacked on a metal oxide having a high Ga content. For example, the third layer may have a structure in which a metal oxide having a high Ga content is stacked on a metal oxide having a high In content.

[0470] [Method for Manufacturing Oxide Semiconductor] The oxide semiconductor of one embodiment of the present invention can be formed by a sputtering method, a CVD method, a vacuum evaporation method, an MBE method, a PLD method, an ALD method, or the like.

[0471] The oxide semiconductor of one embodiment of the present invention can be manufactured by forming a metal oxide by two different deposition methods. For example, the oxide semiconductor of one embodiment of the present invention can be manufactured by forming a metal oxide by a first deposition method and a second deposition method.

[0472] The oxide semiconductor of one embodiment of the present invention can have a two-layer structure including a first layer and a second layer over the first layer. In the case where the oxide semiconductor has a two-layer structure, the oxide semiconductor can be manufactured by forming the first layer over a surface to be formed by a first film formation method and then forming the second layer thereover by a second film formation method.

[0473] The first film formation method is preferably a film formation method that causes less damage to the surface on which the oxide semiconductor is formed than the second film formation method. This can prevent the formation of a mixed layer at the interface between the oxide semiconductor and the layer on which the oxide semiconductor is formed. Furthermore, impurities such as silicon can be prevented from being mixed into the second layer formed on the first layer, which may lead to higher crystallinity of the oxide semiconductor.

[0474] Examples of the first film formation method include ALD, CVD, and MBE. Examples of CVD methods include plasma enhanced CVD (PECVD), thermal CVD, photo-assisted CVD, and MOCVD. The MBE method is a film formation method that grows a thin film having a crystalline structure that reflects the crystalline system of the substrate, and can be considered one of the film formation methods that cause little damage to the surface on which the film is formed. A wet method can also be used as the first film formation method. The wet method is one of the film formation methods that cause little damage to the surface on which the film is formed. Examples of the wet method include spray coating.

[0475] The second film formation method is preferably a method capable of forming a crystalline metal oxide film. It is particularly preferable that the metal oxide film formed in this case has a CAAC structure. Examples of the second film formation method include a sputtering method and a PLD method. Since a metal oxide film formed by a sputtering method is likely to have crystallinity, the sputtering method is suitable as the second film formation method.

[0476] When a metal oxide is formed on a surface to be formed using the second film formation method, damage to the surface to be formed may cause alloying between components contained in the metal oxide and components contained in the layer on the surface to be formed. This alloying may result in the formation of a mixed layer at the interface between the metal oxide and the layer on the surface to be formed. This mixed layer may also be referred to as an alloyed region. The formation of the mixed layer may also be referred to as alloying.

[0477] For example, when a sputtering method is used as the second film formation method, a mixed layer may be formed by particles (also referred to as sputtering particles) emitted from a target or the like, or by energy imparted to a substrate by the sputtering particles or the like. Specifically, when a metal oxide film is formed using the second film formation method on a silicon-containing insulating layer, such as a silicon oxide film, as a formation surface, silicon may be mixed into the metal oxide. There is a concern that the inclusion of impurities such as silicon into the metal oxide may inhibit the crystallization of the metal oxide. Furthermore, there is a concern that using an oxide semiconductor containing impurities in a transistor may adversely affect the initial characteristics or reliability of the transistor. Furthermore, even when a heat treatment, which will be described later, is performed, it is difficult to enhance the crystallinity of the alloyed region.

[0478] Therefore, as described above, by forming a metal oxide by the first film formation method before forming a metal oxide by the second film formation method, it is possible to prevent impurities from being mixed into the oxide semiconductor. Furthermore, it is possible to prevent alloying with the layer on which the metal oxide is to be formed. Therefore, it is possible to improve the initial characteristics and reliability of the transistor. Furthermore, it is possible to further increase the crystallinity of the oxide semiconductor.

[0479] A mixed layer may be formed at the interface between the first layer and the second layer. The mixed layer contains the component contained in the first layer and the component contained in the second layer. For example, when gallium oxide is used for the first layer and a metal oxide containing indium is used for the second layer, the mixed layer contains gallium and indium. Furthermore, for example, when the indium content in the second layer is higher than the indium content in the first layer, the indium content in the mixed layer is equal to or greater than the indium content in the first layer and equal to or less than the indium content in the second layer.

[0480] The ALD method is suitable as the first film formation method because it can suppress damage to the surface to be formed compared to the sputtering method. Furthermore, the ALD method is a film formation method with superior coverage compared to the sputtering method, and by using the ALD method as the film formation method for the first layer, the coverage of the oxide semiconductor can be improved. Therefore, the oxide semiconductor can be well coated on steps, openings, etc. with a high aspect ratio.

[0481] The first layer may be, for example, a metal oxide having a microcrystalline structure or an amorphous structure, which has lower crystallinity than a CAAC structure. The crystallinity of the first layer may be increased by forming a second layer having high crystallinity on the first layer having low crystallinity, or by performing heat treatment after forming the second layer, with the second layer acting as a nucleus. This may increase the crystallinity of the entire oxide semiconductor, including the vicinity of the interface with the surface on which the oxide semiconductor is formed.

[0482] The layer serving as the surface to be formed is, for example, an insulating film such as a silicon oxide film, a silicon oxynitride film, a silicon nitride film, a silicon nitride oxide film, an aluminum oxide film, or a hafnium oxide film. Note that, depending on the transistor structure, the layer may be a conductive film such as a titanium nitride film, a tungsten film, or an ITSO film. The layer serving as the surface to be formed does not need to be crystalline. Note that, when the layer has crystallinity, it may have a crystal structure with low lattice matching with the metal oxide contained in the oxide semiconductor.

[0483] The first layer is preferably formed by ALD. Here, a method for forming an In-M-Zn oxide as the first layer by ALD will be described.

[0484] First, a source gas containing an indium precursor is introduced into a reaction chamber, and the precursor is adsorbed onto the surface to be formed. Next, an oxidizing agent is introduced into the reaction chamber as a reactant and reacted with the adsorbed precursor, thereby removing components other than indium while leaving indium adsorbed onto the substrate, thereby forming a layer in which indium and oxygen are combined.

[0485] Next, a source gas containing a precursor having element M is introduced into the reaction chamber and is adsorbed onto the layer in which indium and oxygen are bonded. Next, an oxidizing agent is introduced into the reaction chamber as a reactant and reacted with the adsorbed precursor, thereby desorbing components other than element M while leaving element M adsorbed on the substrate, thereby forming a layer in which element M and oxygen are bonded.

[0486] Next, a source gas containing a zinc-containing precursor is introduced into the reaction chamber and adsorbed onto the layer in which the element M and oxygen are bonded. Next, an oxidizing agent is introduced into the reaction chamber as a reactant and reacted with the adsorbed precursor, thereby desorbing components other than zinc while leaving zinc adsorbed on the substrate, thereby forming a layer in which zinc and oxygen are bonded.

[0487] By repeating the above-described method, an In-M-Zn oxide can be formed as an oxide semiconductor on a layer that is a surface to be formed by an ALD method.

[0488] When an oxide semiconductor is formed using the ALD method, ozone (O ３ ), oxygen (O ２ ), water (H ２ O) and the like can be used. ３ ), oxygen (O ２ By using HCl, etc. as an oxidizing agent, the amount of hydrogen mixed into the oxide semiconductor can be reduced.

[0489] In the above, after the precursor is adsorbed, it is preferable to stop the introduction of the precursor-containing source gas, purge the reaction chamber, and then discharge excess precursor, reaction products, etc. from the reaction chamber. Also, in the above, it is preferable to stop the introduction of the oxidant, after the adsorbed precursor is reacted with the oxidant, purge the reaction chamber, and then discharge excess reactant, reaction products, etc. from the reaction chamber.

[0490] Furthermore, in the present specification and elsewhere, unless otherwise specified, when ozone, oxygen, or water is used as a reactant or oxidant, it is not limited to the gas or molecular state, but also includes the plasma state, radical state, and ion state.

[0491] The second layer is preferably formed by sputtering.

[0492] An In-M-Zn oxide can be used as a target for sputtering. When forming a metal oxide by sputtering, oxygen or a mixed gas of oxygen and a noble gas can be used as a sputtering gas. In addition, by increasing the proportion of oxygen contained in the sputtering gas, the amount of excess oxygen in the oxide film to be formed can be increased.

[0493] Furthermore, a metal oxide with higher crystallinity may be formed as the ratio of the flow rate of oxygen gas to the total film-forming gas used during deposition (hereinafter also referred to as oxygen flow rate ratio) increases.

[0494] When a metal oxide is formed by a sputtering method, an oxygen-excess metal oxide may be formed when the percentage of oxygen contained in the sputtering gas is set to more than 30% and less than or equal to 100%, preferably 70% to 100%. A transistor using an oxygen-excess metal oxide for a channel formation region can have relatively high reliability. However, one embodiment of the present invention is not limited thereto. An oxygen-deficient metal oxide is formed when the percentage of oxygen contained in the sputtering gas is set to 1% to 30%, preferably 5% to 20%. A transistor using an oxygen-deficient metal oxide for a channel formation region can have relatively high field-effect mobility.

[0495] When forming a metal oxide using a sputtering method, it is preferable to heat the substrate. By increasing the substrate temperature (stage temperature) during metal oxide formation, a metal oxide with high crystallinity may be formed. When forming a metal oxide using a sputtering method, the substrate heating temperature is preferably, for example, 100°C or higher and 400°C or lower, and more preferably 200°C or higher and 300°C or lower.

[0496] By using the above-described manufacturing method, the thickness of the mixed layer formed at the interface between the layer to be formed and the metal oxide can be reduced, or the thickness of the alloyed region formed at the interface between the layer to be formed and the metal oxide can be reduced to an extent that it cannot be observed. For example, the thickness of the alloyed region can be set to 0 nm or more and 3 nm or less, preferably 0 nm or more and 2 nm or less, more preferably 0 nm or more and 1 nm or less, and even more preferably 0 nm or more and less than 0.3 nm.

[0497] The thickness of the alloyed region may be calculated by performing a line analysis of the composition of the alloyed region and its surroundings using SIMS or energy dispersive X-ray spectroscopy (EDX).

[0498] For example, EDX line analysis is performed on the alloyed region and its periphery, with the direction perpendicular to the surface on which the first layer is formed as the depth direction. Next, in the profile of the quantitative values ​​of each element in the depth direction obtained by this analysis, the depth at which the quantitative value of a metal that is the main component of the first layer and is not the main component of the layer that will become the surface on which the layer is formed (In if the first layer contains In) becomes half-value is defined as the depth (position) of the interface between the region and the first layer. Furthermore, the depth at which the quantitative value of an element that is the main component of the layer that will become the surface on which the layer is formed and is not the main component of the first layer (e.g., Si) becomes half-value is defined as the depth (position) of the interface between the region and the layer that will become the surface on which the layer is formed. From the above, the thickness of the alloyed region can be calculated.

[0499] In the oxide semiconductor of one embodiment of the present invention, when the thickness of the alloyed region is observed by EDX analysis, the thickness is, for example, 0 nm to 3 nm, preferably 0 nm to 2 nm, more preferably 0 nm to 1 nm, and still more preferably 0 nm to less than 0.3 nm.

[0500] For example, when SIMS analysis is performed on an oxide semiconductor formed on a silicon oxide film, which is a surface to be formed, the depth at which the silicon concentration is 50% of the maximum concentration of the silicon oxide film is defined as the interface, and the silicon concentration is 1.0×10 ２１ atoms / cm ３ , preferably 5.0×10 ２０ atoms / cm ３ , more preferably 1.0 × 10 ２０ atoms / cm ３ The distance between the depth at which the thickness decreases and the interface is defined as thickness t. The thickness t is preferably 3 nm or less, and more preferably 2 nm or less.

[0501] By reducing the thickness of the alloyed region, the thickness t can be set to a value within the above range.

[0502] Note that by reducing the alloyed region, it is possible to form a CAAC structure near the formation surface. Here, the vicinity of the formation surface refers to, for example, a region that is more than 0 nm and not more than 3 nm, preferably more than 0 nm and not more than 2 nm, more preferably 1 nm or more and not more than 2 nm, approximately perpendicularly from the formation surface of the oxide semiconductor.

[0503] Note that the CAAC structure near the formation surface can be confirmed in some cases by observation using a TEM. For example, in cross-sectional observation of an oxide semiconductor using a high-resolution TEM, bright spots arranged in layers in a direction parallel to the formation surface are confirmed near the formation surface.

[0504] The oxide semiconductor of one embodiment of the present invention can have a three-layer structure including a first layer, a second layer over the first layer, and a third layer over the second layer.

[0505] When the oxide semiconductor has a three-layer structure, the oxide semiconductor can be manufactured by forming a first layer on a surface to be formed by a first film formation method, then forming a second layer by a second film formation method, and finally forming a third layer by the first film formation method.

[0506] Even when the first layer and the third layer are formed using compositions that make it difficult to form a CAAC structure when a single layer is formed, the oxide semiconductor can have a structure in which the entire oxide semiconductor including the first layer and the third layer has the CAAC structure by crystal growth using the second layer as a nucleus. Alternatively, the CAAC structure can be formed in a region including at least a part of each of the first layer and the third layer and the second layer.

[0507] In particular, even when the first layer and the third layer have a high In content, the oxide semiconductor can have suitable crystallinity for a semiconductor layer of a transistor. In the oxide semiconductor of one embodiment of the present invention, the increase in the In content can improve the on-state characteristics of the transistor, and the improvement in reliability can be achieved by using a CAAC structure with high crystallinity.

[0508] The first and third layers may be made of a metal oxide having the same composition as that of the second layer. Using the same composition may make it easier for the first and third layers to become CAAC after heat treatment.

[0509] Because the second layer has high crystallinity, the third layer can grow using the crystals of the second layer as nuclei or seeds. Therefore, even if a film formation method that easily imparts crystallinity is not used as a film formation method for the third layer, the third layer can be crystallized. Here, for example, by forming the third layer using a film formation method that has higher coverage than the second layer, the oxide semiconductor can have both high crystallinity and high coverage throughout the entire layer.

[0510] Furthermore, the second layer has excellent crystallinity because the influence of the surface on which it is formed is reduced by providing the first layer, and therefore the third layer, which is crystallized using the second layer as a nucleus or seed, is also expected to have excellent crystallinity.

[0511] When an oxide semiconductor is used as a semiconductor layer of a transistor, the third layer, which is the uppermost layer of the oxide semiconductor, may be in contact with a gate insulating layer. By increasing the crystallinity of the layer in contact with the gate insulating layer, carrier mobility can be increased when the transistor is in an on state.

[0512] The first layer and the third layer each have high crystallinity, using the highly crystalline second layer as a nucleus or seed. Specifically, the crystallinity of the first layer may be increased by heat treatment during or after the deposition of the second layer. The crystallinity of the third layer may be increased by heat treatment during or after the deposition of the third layer. The heat treatment has an assisting effect of increasing the crystallinity.

[0513] As described above, in the method for forming an oxide semiconductor according to one embodiment of the present invention, the crystallinity of the upper and lower metal oxides (the first and third layers in this case) can be increased by using the second layer having a highly crystalline metal oxide (i.e., CAAC) as a nucleus or seed. This increases the crystallinity of the entire oxide semiconductor. In other words, the upper and lower metal oxides can be grown in a solid phase using the second layer as a nucleus or seed to form an oxide semiconductor with high crystallinity. An oxide semiconductor formed by such a deposition method, i.e., a CAAC film in this case, can be referred to as an axial growth CAAC (AG CAAC).

[0514] In an oxide semiconductor, a region having a CAAC structure is preferably present widely throughout the entire layer. A region having a CAAC structure in a first layer is crystallinely connected to a region having a CAAC structure in a second layer. A region having a CAAC structure in a third layer is crystallinely connected to a region having a CAAC structure in a second layer. As a result, the boundary between the first layer and the second layer may not be observed. Also, the boundary between the second layer and the third layer may not be observed. An oxide semiconductor may be expressed as a single layer with no clearly observable interface. An oxide semiconductor may be expressed as a single layer.

[0515] In each of the first to third layers, in a region having the CAAC structure, for example, bright spots aligned parallel or approximately parallel to the surface on which the oxide semiconductor is formed are observed in cross-sectional observation using a high-resolution TEM. Furthermore, the c-axis of the CAAC structure in each of the first to third layers is preferably parallel or approximately parallel to the normal direction of the surface on which the oxide semiconductor is formed.

[0516] Furthermore, a portion of the first layer or the third layer may not be crystallized.

[0517] When the oxide semiconductor has a three-layer structure, the oxide semiconductor can also be manufactured by forming a first layer on a surface to be formed by a first film formation method, then forming a second layer by the first film formation method, and then forming a third layer by the second film formation method.

[0518] As described above, using a metal oxide with a high In content in a transistor can increase t...

Claims

a first insulator; and an oxide semiconductor on the first insulator; a first conductor and a second conductor spaced apart from each other on the oxide semiconductor; a second insulator disposed on the first conductor and the second conductor, the second insulator having an opening formed therein that overlaps with a region between the first conductor and the second conductor; a third insulator disposed in the opening and in contact with an upper surface of the oxide semiconductor, a side surface of the first conductor, a side surface of the second conductor, and a side surface of the second insulator; a third conductor disposed on the third insulator in the opening and having a region overlapping with the oxide semiconductor with the third insulator interposed therebetween; the oxide semiconductor contains indium, the first insulator includes a silicon oxide film; The silicon oxide film contains nitrogen dioxide. Semiconductor device. 　 In claim 1, the nitrogen dioxide is not bonded to the silicon dioxide contained in the silicon oxide film; Semiconductor device. 　 In claim 1, one of the transition levels of nitrogen dioxide in the first insulator is equal to or higher than the upper edge of the valence band of the oxide semiconductor and equal to or lower than the lower edge of the conduction band of the oxide semiconductor; Semiconductor device. 　 In any one of claims 1 to 3, the oxide semiconductor has a first layer and a second layer on the first layer; the first layer comprises indium; the second layer comprises indium, gallium, zinc, and oxygen; the indium content of the first layer is higher than the indium content of the second layer; Semiconductor device. 　 In claim 4, the second layer is divided into a third layer located below the first conductor and a fourth layer located below the second conductor; Semiconductor device. 　 In claim 5, a side surface of the third layer on the third conductor side is set back from a side surface of the first conductor on the third conductor side, a side surface of the fourth layer on the third conductor side is set back from a side surface of the second conductor on the third conductor side; Semiconductor device. 　 In claim 5, the third insulator has a laminated structure, the third insulator layer in contact with the oxide semiconductor contains hafnium oxide; Semiconductor device. 　 In claim 4, an oxide layer between the oxide semiconductor and the first insulator; The oxide layer comprises yttrium, zirconium, and oxygen. Semiconductor device. 　 a first insulator; and an oxide semiconductor on the first insulator; a first conductor and a second conductor spaced apart from each other on the oxide semiconductor; a second insulator disposed on the first conductor and the second conductor, the second insulator having an opening formed therein that overlaps with a region between the first conductor and the second conductor; a third insulator disposed in the opening and in contact with an upper surface of the oxide semiconductor, a side surface of the first conductor, and a side surface of the second conductor; a fourth insulator disposed within the opening between the second insulator and the third insulator; and a third conductor disposed on the third insulator in the opening and having a region overlapping with the oxide semiconductor with the third insulator interposed therebetween; the oxide semiconductor contains indium, the first insulator includes a silicon oxide film; the silicon oxide film contains nitrogen dioxide; the first conductor and the second conductor each have a first conductive layer and a second conductive layer on the first conductive layer; a shortest distance between the first conductive layer of the first conductor and the first conductive layer of the second conductor is smaller than a shortest distance between the second conductive layer of the first conductor and the second conductive layer of the second conductor; the fourth insulator is in contact with an upper surface of the first conductive layer of the first conductor, a side surface of the second conductive layer of the first conductor, an upper surface of the first conductive layer of the second conductor, and a side surface of the second conductive layer of the second conductor; Semiconductor device. 　 In claim 9, the nitrogen dioxide is not bonded to the silicon dioxide contained in the silicon oxide film; Semiconductor device. 　 In claim 9, one of the transition levels of nitrogen dioxide in the first insulator is equal to or higher than the upper edge of the valence band of the oxide semiconductor and equal to or lower than the lower edge of the conduction band of the oxide semiconductor; Semiconductor device. 　 In any one of claims 9 to 11, the oxide semiconductor has a first layer and a second layer on the first layer; the first layer comprises indium; the second layer comprises indium, gallium, zinc, and oxygen; the indium content of the first layer is higher than the indium content of the second layer; Semiconductor device. 　 In claim 12, the second layer is divided into a third layer located below the first conductive layer of the first conductor and a fourth layer located below the first conductive layer of the second conductor; Semiconductor device. 　 In claim 13, a side surface of the third layer facing the third conductor is set back from a side surface of the first conductor facing the third conductor of the first conductive layer, a side surface of the fourth layer on the third conductor side is disposed so as to be set back from a side surface of the second conductor of the first conductive layer on the third conductor side; Semiconductor device. 　 In claim 13, the third insulator has a laminated structure, the third insulator layer in contact with the oxide semiconductor contains hafnium oxide; Semiconductor device. 　 In claim 12, an oxide layer between the oxide semiconductor and the first insulator; The oxide layer comprises yttrium, zirconium, and oxygen. Semiconductor device.

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