Control device, optical system and lithography apparatus

Abstract

The invention relates to a control device (100) for controlling at least one actuator (200) for actuating an optical element (310) of an optical system (300), comprising an amplifier (110) which is designed to receive a provided supply voltage (V1) at an input node (K1) and to provide a control voltage (V2) for the actuator (200) at an output node (K2), wherein the amplifier (110) has a resistive voltage divider (R1, R2) for adjusting the amplification of the amplifier (110) with a first resistor (R1) and a second resistor (R2) and a capacitive voltage divider (C1, C2) with a first capacitor (C1) and a second capacitor (C2), wherein the capacitive voltage divider (C1, C2) is connected in parallel to the resisitve voltage divider (R1, R2).

Description

[0001] CONTROL DEVICE, OPTICAL SYSTEM AND LITHOGRAPHY -

[0002] ATTACHMENT

[0003] The present invention relates to a control device for controlling at least one actuator of an optical system, an optical system with such a control device and a lithography system with such an optical system.

[0004] The content of the priority application DE 10 2024 202 944.0 is incorporated in its entirety by reference.

[0005] Microlithography systems are known that feature actuatable optical elements, such as microlens arrays or micromirror arrays. Microlithography is used to manufacture microstructured components, such as integrated circuits. The microlithography process is carried out using a lithography system that features an illumination system and a projection system.

[0006] Driven by the pursuit of ever smaller structures in the production of integrated circuits, EUV lithography systems are currently being developed that use light with a wavelength in the range of 0.1 nm to 30 nm, particularly 13.5 nm. Since most materials absorb light at this wavelength, such EUV lithography systems must use reflective optics, i.e., mirrors, instead of the previously used refractive optics, i.e., lenses.

[0007] The image of a mask (reticle) illuminated by the illumination system is projected by the projection system onto a substrate coated with a light-sensitive layer (photoresist) and positioned in the image plane of the projection system, such as a silicon wafer, to transfer the mask structure to the light-sensitive coating of the substrate. Actuable optical elements can be used to improve the image of the mask on the substrate. For example, wavefront errors during exposure that lead to enlarged and / or blurred images can be compensated.

[0008] A MEMS actuator (MEMS; Microelectromechanical System) or a PMN actuator (PMN; Lead Magnesium Niobate), for example, can be used as an actuator. A PMN actuator enables distance positioning in the sub-micrometer or sub-nanometer range. When a direct current is applied, the actuator, whose actuator elements are stacked on top of one another, experiences a force that causes a specific linear expansion. The position set by the direct current (DC) voltage can be negatively influenced by external electromechanical crosstalk at the inherently resulting resonance points of the actuator controlled by the direct current. MEMS mirrors and actuators suitable for controlling them are described, for example, in DE 10 2016 213 025 A1.

[0009] To control the actuator, a control device comprising an amplifier, for example a Class A amplifier, is used. Such a control device for controlling an actuator for actuating an optical element of an optical system is described, for example, in patent application DE 10 2023 206 070.DE 10 2023 206 070 describes a control device with an amplifier configured to receive a provided supply voltage at an input node and to provide a control voltage for the actuator at an output node. The device also includes a supply device coupled to the input node for providing the supply voltage, which supply device comprises a series circuit of a plurality of DC / DC converters, which can be coupled between the input node and ground, for providing a respective DO voltage, and a number of further DC / DO converters, which can be connected in series with the series circuit, for providing a DO voltage. To adjust the gain of the amplifier, the amplifier comprises a resistive voltage divider with a first resistor and a second resistor.

[0010] Resistive voltage dividers are typically implemented with passive resistor components, as these provide simple and linear scaling of voltage levels. Integrated passive resistors are also available in various materials, resistance values, and high-voltage capabilities. Transistor-based active resistors can also be a good choice depending on the application. In closed-loop systems, highly linear and highly accurate measurement of the amplifier's output voltage level can be achieved by leveraging the ratio and matching capabilities of integrated resistors.

[0011] However, problems can arise if, for example, the quiescent current flow through the resistors of the resistive voltage divider is to be kept in the microampere range or below to ensure the lowest possible power consumption. For this purpose, the resistance values ​​of the resistors of the resistive voltage divider are dependent on the high voltage level of the supply voltage, particularly in a range of 10 6 Ohms. However, due to these high-value resistors, the resistive voltage divider generates thermal noise, which can also be referred to as thermal noise. This problem becomes particularly clear when considering the equation below for the thermal noise power and voltage density for a single passive resistor: where k is the Boltzmann constant (k = 1.38e-23 J / K), T = 300 K for room temperature and R is an equivalent resistance value.

[0012] Some example values ​​for the increase in thermal noise for high-ohm resistors are shown in Table 1 below:

[0013] Table 1

[0014] Furthermore, thermal noise can be amplified by resistors when used in the amplifier's feedback path. For a non-inverting amplifier with a high-voltage operational amplifier controlled by a control voltage, which has a resistive divider with a series connection of two resistors connected between the amplifier's output node and ground, the output noise at the amplifier's output node due to the resistors can be approximately calculated as follows: where Sni = 4KTR1 denotes the noise power of the resistor Ri and Aci denotes the control loop gain of the non-inverting amplifier. Assuming that the non-inverting amplifier is an ideal amplifier with infinite gain and zero output impedance, the values ​​for the resistance of the resistor Ri and the voltage noise Vnout can be estimated as follows:

[0015] Table 2

[0016] Table 2 shows thermal noise of high-value resistors amplified by a gain Aci of 100 in the closed loop of the amplifier.

[0017] Against this background, one object of the present invention is to improve the control of an actuator of an optical system with regard to reducing thermal noise.

[0018] According to a first aspect, a control device for controlling at least one actuator for actuating an optical element of an optical system is proposed. The control device comprises an amplifier configured to receive a provided supply voltage at an input node and to provide a control voltage for the actuator at an output node. The amplifier has a resistive voltage divider for adjusting the gain of the amplifier, comprising a first resistor and a second resistor, and a capacitive voltage divider comprising a first capacitor and a second capacitor. The capacitive voltage divider is connected in parallel with the resistive voltage divider.

[0019] Preferably, the amplifier is configured to receive the supply voltage provided at the input node and to provide an amplified drive voltage for the actuator using a quiescent current at the output node. The quiescent current is, in particular, the current flowing through the amplifier even when it is not dynamically active. The quiescent current is used to adjust the operating point at the output node. The quiescent current can also be referred to as the bias current.

[0020] The supply voltage is, in particular, a high voltage (or high voltage) and lies, for example, in a range of 40 V to 200 V. As already explained above, the current flow of the amplifier's quiescent current should preferably be kept in the microampere range or below to enable the lowest possible power consumption. For this purpose, the resistance values ​​of the resistors of the resistive voltage divider are to be adjusted depending on the high supply voltage, in particular in a range of 10 6Ohms. As already mentioned above, the high-value resistors of the resistive voltage divider generate thermal noise. This thermal noise effect depends on the resistance value. In other words, the high supply voltage required to drive the actuator to actuate the optical element requires resistance values, which amplifies the thermal noise. The proposed capacitive voltage divider, which is connected in parallel with the resistive voltage divider in the amplifier, advantageously reduces this thermal noise.

[0021] Table 3

[0022] Table 3 shows the thermal noise of high-value resistors amplified by a gain Aci of 100 in the closed-loop amplifier, where Aci of 100 is given by the equation 1+R1 / R2 and 1+C2 / C1. The resistor R2 not included in Table 3 can be calculated using the equation Aci = 100 = 1 + R1 / R2. Furthermore, the capacitor C2 not included in Table 3 can be calculated using the equation Acl = 100 = 1 + C2 / C1. A comparison of Table 3 with Table 2 shows an improvement in the voltage noise Vnout by a factor of 10 with the increase in frequency over each decade above the low-pass cutoff frequency of 1 Hz.

[0023] Furthermore, the capacitive voltage divider is also suitable for compensating the noise of other noise sources, such as 1 / f noise.

[0024] Especially at higher frequencies, the capacitive voltage divider with the first capacitor and the second capacitor dominates over the resistive voltage divider with the first resistor and the second resistor, which can reduce the effects of the resistive load, supply fluctuations and thermal noise.

[0025] The actuator is, in particular, a MEMS actuator, a capacitive actuator, for example, a PMN actuator (PMN; lead magnesium niobate) or a PZT actuator (PZT; lead zirconate titanate) or a LiNbO3 actuator (lithium niobate). The actuator is, in particular, configured to actuate an optical element of the optical system. Examples of such an optical element include lenses, mirrors, and adaptive mirrors.

[0026] The optical system is preferably a projection optics system of the lithography system or projection exposure system. However, the optical system can also be an illumination system. The projection exposure system can be an EUV lithography system. EUV stands for "Extreme Ultraviolet" and refers to a wavelength of the working light between 0.1 nm and 30 nm. The projection exposure system can also be a DUV lithography system. DUV stands for "Deep Ultraviolet" and refers to a wavelength of the working light between 30 nm and 250 nm.According to one embodiment, the capacitance values ​​of the first capacitor and the second capacitor of the capacitive voltage divider are matched to the resistance values ​​of the first resistor and the second resistor of the resistive voltage divider such that the first capacitor and the second capacitor of the capacitive voltage divider reduce thermal noise of the resistors of the resistive voltage divider, in particular above a specific frequency. The specific frequency is preferably the pole frequency X, with X=1 / (2*pi*R1*C1), for example, for the circuit in Fig. 5.

[0027] According to a further embodiment, the respective resistor is embodied as an active resistor. According to a further embodiment, the respective capacitor is embodied as an active capacitor. Such active components are described, for example, in Maloberti 2003, "Analog Design for CMOS VLSI Systems," page 197, 4.3 Voltage Divider.

[0028] The design of resistors and / or capacitors as active components has the advantage of particularly small space requirements, which is particularly important in optical systems of lithography systems.

[0029] According to a further embodiment, the respective resistor (RI, R2) is designed as a multilayer polysilicon resistor or as a diode-connected transistor or as a duty-cycled resistor or as a pseudo-resistor. Pseudo-resistors are described, for example, in Djekic 2018, IEEE Journal SSCS, “A 0.1% THD, 1-MOhm to 1-GOhm Tunable, Temperature-Compensated Transimpedance Amplifier Using a Multi-Element Pseudo-Resistor.” Various types of duty-cycled resistors are summarized, for example, in Livanelioglu 2022, IEEE SSC Letters, “A compact and PVT-Robust Segmented Duty-Cycled Resistor Realizing TOhm Impedances for Neural Recording Interface Circuits.” According to a further embodiment, the first capacitor of the capacitive voltage divider is designed as a trimmable capacitor.

[0030] According to a further embodiment, the second capacitor of the capacitive voltage divider is designed as a trimmable capacitor.

[0031] In case the performance of the gains in the closed loop of the amplifier is affected by parasitic capacitances, the trimmable capacitor can be trimmed to compensate for the occurring parasitic capacitances.

[0032] According to a further embodiment, the amplifier comprises a voltage-controlled current source with an operational amplifier controllable by a control voltage and a transistor. The operational amplifier is connected to a control terminal of the transistor.

[0033] The transistor is, in particular, a field-effect transistor (FET), preferably a MOSFET. In this case, the control terminal of the transistor is designed as a gate terminal.

[0034] According to another embodiment, the first resistor is connected between the input node and the output node of the amplifier, and the second resistor is connected between the transistor and ground. The first capacitor is connected in parallel with the first resistor between the input node and the output node of the amplifier, and the second capacitor is connected in parallel with the second resistor between the transistor and ground.

[0035] According to a further embodiment, the transistor of the voltage-controlled current source is a field-effect transistor whose gate terminal is connected to the output of the operational amplifier, whose drain terminal is connected to the output node of the amplifier, and whose source terminal is connected to ground via the second resistor. The source terminal is also connected to the inverting input of the operational amplifier via a feedback branch. The non-inverting input of the operational amplifier is connected to an input node of the control device for receiving the control voltage.

[0036] According to a further embodiment, the amplifier comprises a class-A amplifier with an operational amplifier controllable by a control voltage and a transistor. The resistive voltage divider is connected to the first resistor and the second resistor between the output node of the amplifier and ground. The center tap of the resistive voltage divider and the center tap of the capacitive voltage divider are connected to the non-inverting input of the operational amplifier via a feedback branch. The inverting input of the operational amplifier is connected to an input node of the control device for receiving the control voltage. The first capacitor is connected in parallel to the first resistor between the output node of the amplifier and the center tap, and the second capacitor is connected in parallel to the second resistor between the center tap and ground.The Class A amplifier advantageously has only low signal distortion and thus enables precise actuator control.

[0037] According to a further embodiment, the transistor of the class-A amplifier is a field-effect transistor whose gate terminal is connected to the output of the operational amplifier, whose drain terminal is connected to the output node of the amplifier, and whose source terminal is connected to ground. According to a further embodiment, the amplifier is a non-inverting amplifier with a high-voltage operational amplifier controllable by a control voltage. A voltage supply terminal of the high-voltage operational amplifier is connected to the first node for receiving the supply voltage, and the resistive voltage divider with the first resistor and the second resistor is connected between the output node of the amplifier and ground.The center tap of the resistive voltage divider and the center tap of the capacitive voltage divider are connected to the inverting input of the high-voltage operational amplifier via a feedback branch, the non-inverting input of the high-voltage operational amplifier being connected to an input node of the control device for receiving the control voltage, the first capacitor being connected in parallel to the first resistor between the output node of the amplifier and the center tap, and the second capacitor being connected in parallel to the second resistor between the center tap and ground. For example, the ADHV4702-1 operational amplifier can be used as a high-voltage operational amplifier. The high-voltage operational amplifier is designed specifically for the range from 40V to 200V.

[0038] According to a further embodiment, the control device is configured to control a plurality N of actuators, wherein the respective actuator is configured to actuate an optical element associated with the actuator.

[0039] According to a further embodiment, the amplifier is a Class AB amplifier. The Class AB amplifier is a suitable alternative to the Class A amplifier proposed above.

[0040] According to a further embodiment, the amplifier is designed as a switching amplifier, wherein a filter unit with at least one inductance is preferably connected between the actuator and the switching amplifier. The filter unit receives the drive voltage provided by the amplifier and provides a filtered drive voltage on the output side.

[0041] The filter unit forms, in particular, a low-pass filter which smooths the drive voltage over time. Preferably, the filtered drive voltage corresponds to a time average of the drive voltage. The filter unit can, in particular, be designed as a multi-stage filter and have both inductances and capacitors. The filter unit is preferably configured to filter the amplified signal, i.e. the drive voltage, such that a remaining alternating current component in the filtered drive voltage is less than 0.1% of the amplitude. The filter unit can also be referred to as a demodulator. Preferably, the filter unit is designed as at least a second-order filter. More preferably, the filter unit is designed as a higher-order filter, in particular a fourth-order filter. Higher filter orders can, for example, be realized by a cascade of lower-order filters.The filter unit is designed, in particular, as a passive filter. The filter unit has, for example, a cutoff frequency in a range of 1 kHz - 10 kHz. The slope of the filter unit and the type of filter unit, in particular whether the filter unit is designed as a Butterworth filter, a Chebyshev filter, a Bessel filter, a Sallen-Key filter, or another filter type, are specifically selected for each application.

[0042] According to a second aspect, a control device for controlling at least one actuator for actuating an optical element of an optical system is proposed. The control device comprises an amplifier which is configured to receive a provided supply voltage at an input node and to provide a control voltage for the actuator at an output node, wherein the amplifier has a resistive voltage divider for adjusting the gain of the amplifier, comprising a first resistor and a second resistor, and a capacitive voltage divider comprising a first capacitor and a second capacitor. The first capacitor is connected between the output node of the amplifier and ground, and the second capacitor is connected in parallel with the second resistor.

[0043] According to one embodiment, the capacitance values ​​of the first capacitor and the second capacitor of the capacitive voltage divider are matched to the resistance values ​​of the first resistor and the second resistor of the resistive voltage divider such that the first capacitor and the second capacitor of the capacitive voltage divider improve a power supply rejection ratio and an accuracy of the amplification.

[0044] According to a further embodiment, the amplifier comprises a voltage-controlled current source with an operational amplifier controllable by a control voltage and a transistor, wherein the operational amplifier is connected to a control terminal of the transistor.

[0045] According to a further embodiment, the first resistor is connected between the input node and the output node of the amplifier and the second resistor is connected between the transistor and ground.

[0046] According to a further embodiment, the transistor of the voltage-controlled current source is a field-effect transistor whose gate terminal is connected to the output of the operational amplifier, whose drain terminal is connected to the output node of the amplifier and whose source terminal is connected to ground via the second resistor and via a feedback branch to the inverting input of the operational amplifier, wherein the non-inverting input of the operational amplifier is connected to an input node of the control device for receiving the control voltage.

[0047] According to a third aspect, an optical system with a number of actuatable optical elements is proposed, wherein each of the actuatable optical elements of the number is assigned an actuator, wherein each actuator is assigned a control device for controlling the actuator according to the first aspect, according to one of the embodiments of the first aspect, according to the second aspect or according to one of the embodiments of the second aspect.

[0048] The optical system comprises in particular a micromirror array and / or a microlens array with a plurality of independently actuatable optical elements.

[0049] In embodiments, groups of actuators can be defined, with all actuators in a group being assigned the same control device.

[0050] According to one embodiment, the optical system is designed as an illumination optics or as a projection optics of a lithography system.

[0051] According to a further embodiment, the optical system comprises a vacuum housing in which the actuatable optical elements, the associated actuators and the control device are arranged.

[0052] According to a fourth aspect, a lithography system is proposed which has an optical system according to the third aspect or according to one of the embodiments of the third aspect. The lithography system is, for example, an EUV lithography system whose working light lies in a wavelength range from 0.1 nm to 30 nm, or a D UV lithography system whose working light lies in a wavelength range from 30 nm to 250 nm.

[0053] "One" in this case is not necessarily limited to a single element. Rather, multiple elements, such as two, three, or more, may also be included. Any other counting term used here should not be understood as implying a limitation to the exact number of elements stated. Rather, numerical deviations upwards and downwards are possible, unless otherwise stated.

[0054] Further possible implementations of the invention also include combinations of features or embodiments described above or below with respect to the exemplary embodiments that are not explicitly mentioned. In this case, the person skilled in the art will also add individual aspects as improvements or additions to the respective basic form of the invention.

[0055] Further advantageous embodiments and aspects of the invention are the subject of the dependent claims and the exemplary embodiments of the invention described below. The invention will be explained in more detail below using preferred embodiments with reference to the accompanying figures.

[0056] Fig. 1 shows a schematic meridional section of a projection exposure system for EUV projection lithography;

[0057] Fig. 2 shows a schematic representation of an embodiment of an optical system; Fig. 3 shows a schematic block diagram of a first embodiment of a control device for controlling an actuator for actuating an optical element of an optical system.

[0058] Fig. 4 shows a schematic block diagram of a second embodiment of a control device for controlling an actuator for actuating an optical element of an optical system!

[0059] Fig. 5 shows a schematic block diagram of a third embodiment of a control device for controlling an actuator for actuating an optical element of an optical system!

[0060] Fig. 6 shows a schematic block diagram of a fourth embodiment of a control device for controlling an actuator for actuating an optical element of an optical system! and

[0061] Fig. 7 shows a schematic block diagram of a fifth embodiment of a control device for controlling an actuator for actuating an optical element of an optical system.

[0062] In the figures, identical or functionally equivalent elements are provided with the same reference numerals unless otherwise indicated. Furthermore, it should be noted that the representations in the figures are not necessarily to scale.

[0063] Fig. 1 shows an embodiment of a projection exposure system 1 (lithography system), in particular an EUV lithography system. One embodiment of an illumination system 2 of the projection exposure system 1 has, in addition to a light or radiation source 3, an illumination optics 4 for illuminating an object field 5 in an object plane 6. In an alternative embodiment, the light source 3 can also be provided as a separate module from the rest of the illumination system 2. In this case, the illumination system 2 does not include the light source 3.

[0064] A reticle 7 arranged in the object field 5 is exposed. The reticle 7 is held by a reticle holder 8. The reticle holder 8 can be displaced via a reticle displacement drive 9, in particular in a scanning direction.

[0065] For illustrative purposes, Fig. 1 shows a Cartesian coordinate system with an x-direction (x), a y-direction (y), and a z-direction (z). The x-direction (x) runs perpendicular to the drawing plane. The y-direction (y) runs horizontally, and the z-direction (z) runs vertically. The scanning direction in Fig. 1 runs along the y-direction (y). The z-direction (z) runs perpendicular to the object plane (6).

[0066] The projection exposure system 1 comprises a projection optics 10. The projection optics 10 serves to image the object field 5 into an image field 11 in an image plane 12. The image plane 12 runs parallel to the object plane 6. Alternatively, an angle other than 0° between the object plane 6 and the image plane 12 is also possible.

[0067] A structure on the reticle 7 is imaged onto a light-sensitive layer of a wafer 13 arranged in the region of the image field 11 in the image plane 12. The wafer 13 is held by a wafer holder 14. The wafer holder 14 can be displaced via a wafer displacement drive 15, in particular along the y-direction y. The displacement of the reticle 7 via the reticle displacement drive 9 on the one hand and of the wafer 13 via the wafer displacement drive 15 on the other hand can be synchronized with one another. The light source 3 is an EUV radiation source. The light source 3 emits in particular EUV radiation 16, which is also referred to below as useful radiation, illumination radiation or illumination light. The useful radiation 16 has in particular a wavelength in the range between 5 nm and 30 nm.Light source 3 can be a plasma source, for example, an LPP (Laser Produced Plasma) or a DPP (Gas Discharged Produced Plasma) source. It can also be a synchrotron-based radiation source. Light source 3 can be a free-electron laser (FEL).

[0068] The illumination radiation 16 emanating from the light source 3 is focused by a collector 17. The collector 17 can be a collector with one or more ellipsoidal and / or hyperboloidal reflection surfaces. The at least one reflection surface of the collector 17 can be exposed to the illumination radiation 16 at grazing incidence (Gl), i.e., at angles of incidence greater than 45°, or at normal incidence (NI), i.e., at angles of incidence less than 45°. The collector 17 can be structured and / or coated, on the one hand, to optimize its reflectivity for the useful radiation and, on the other hand, to suppress stray light.

[0069] After the collector 17, the illumination radiation 16 propagates through an intermediate focus in an intermediate focal plane 18. The intermediate focal plane 18 can represent a separation between a radiation source module, comprising the light source 3 and the collector 17, and the illumination optics 4.

[0070] The illumination optics 4 comprises a deflecting mirror 19 and, downstream of this in the beam path, a first facet mirror 20. The deflecting mirror 19 can be a flat deflecting mirror or, alternatively, a mirror with a beam-influencing effect beyond the pure deflection effect. Alternatively or additionally, the deflecting mirror 19 can be designed as a spectral filter that separates a useful wavelength of the illumination radiation 16 from stray light of a different wavelength. If the first facet mirror 20 is arranged in a plane of the illumination optics 4 that is optically conjugate to the object plane 6 as the field plane, it is also referred to as a field facet mirror. The first facet mirror 20 comprises a plurality of individual first facets 21, which can also be referred to as field facets. Only a few of these first facets 21 are shown in Fig. 1 as examples.

[0071] The first facets 21 can be designed as macroscopic facets, in particular as rectangular facets or as facets with an arcuate or partially circular edge contour. The first facets 21 can be designed as flat facets or, alternatively, as convexly or concavely curved facets.

[0072] As is known, for example, from DE 10 2008 009 600 A1, the first facets 21 themselves can also be composed of a plurality of individual mirrors, in particular a plurality of micromirrors. The first facet mirror 20 can, in particular, be designed as a microelectromechanical system (MEMS system). For details, reference is made to DE 10 2008 009 600 A1.

[0073] Between the collector 17 and the deflecting mirror 19, the illumination radiation 16 runs horizontally, i.e. along the y-direction y.

[0074] In the beam path of the illumination optics 4, a second facet mirror 22 is arranged downstream of the first facet mirror 20. If the second facet mirror 22 is arranged in a pupil plane of the illumination optics 4, it is also referred to as a pupil facet mirror. The second facet mirror 22 can also be arranged at a distance from a pupil plane of the illumination optics 4. In this case, the combination of the first facet mirror 20 and the second facet mirror 22 is also referred to as a specular reflector. Specular reflectors are known from US 2006 / 0132747 A1, EP 1 614 008 B1, and US Pat. No. 6,573,978.

[0075] The second facet mirror 22 comprises a plurality of second facets 23. In the case of a pupil facet mirror, the second facets 23 are also referred to as pupil facets.

[0076] The second facets 23 can also be macroscopic facets, which can, for example, be round, rectangular, or hexagonal, or alternatively facets composed of micromirrors. Reference is also made to DE 10 2008 009 600 A1 in this regard.

[0077] The second facets 23 can have planar or alternatively convex or concave curved reflection surfaces.

[0078] The illumination optics 4 thus form a double-faceted system. This basic principle is also known as a honeycomb condenser (EnglJ Fly's Eye Integrator).

[0079] It may be advantageous not to arrange the second facet mirror 22 exactly in a plane that is optically conjugate to a pupil plane of the projection optics 10. In particular, the second facet mirror 22 can be arranged tilted relative to a pupil plane of the projection optics 10, as described, for example, in DE 10 2017 220 586 A1. With the aid of the second facet mirror 22, the individual first facets 21 are imaged into the object field 5. The second facet mirror 22 is the last bundle-forming mirror or actually the last mirror for the illumination radiation 16 in the beam path upstream of the object field 5.

[0080] In a further embodiment of the illumination optics 4 (not shown), a transmission optics can be arranged in the beam path between the second facet mirror 22 and the object field 5, which transmission optics contributes in particular to the imaging of the first facets 21 into the object field 5. The transmission optics can have exactly one mirror, but alternatively also two or more mirrors, which are arranged one behind the other in the beam path of the illumination optics 4. The transmission optics can in particular comprise one or two mirrors for normal incidence (Ni mirrors, normal incidence mirrors) and / or one or two mirrors for grazing incidence (Gl mirrors, grazing incidence mirrors).

[0081] In the embodiment shown in Fig. 1, the illumination optics 4 has exactly three mirrors after the collector 17, namely the deflection mirror 19, the first facet mirror 20 and the second facet mirror 22.

[0082] In a further embodiment of the illumination optics 4, the deflection mirror 19 can also be omitted, so that the illumination optics 4 can then have exactly two mirrors after the collector 17, namely the first facet mirror 20 and the second facet mirror 22.

[0083] The imaging of the first facets 21 by means of the second facets 23, or with the second facets 23 and a transfer optics, into the object plane 6 is usually only an approximate imaging. The projection optics 10 comprises a plurality of mirrors Mi, which are numbered according to their arrangement in the beam path of the projection exposure system 1.

[0084] In the example shown in Fig. 1, the projection optics 10 comprises six mirrors M1 to M6. Alternatives with four, eight, ten, twelve, or a different number of mirrors M1 are also possible. The projection optics 10 is a double-obscured optic. The penultimate mirror M5 and the last mirror M6 each have a passage opening for the illumination radiation 16. The projection optics 10 has an image-side numerical aperture that is greater than 0.5 and can also be greater than 0.6, for example, 0.7 or 0.75.

[0085] Reflection surfaces of the mirrors Mi can be designed as freeform surfaces without a rotational symmetry axis. Alternatively, the reflection surfaces of the mirrors Mi can be designed as aspherical surfaces with exactly one rotational symmetry axis of the reflection surface shape. The mirrors Mi, like the mirrors of the illumination optics 4, can have highly reflective coatings for the illumination radiation 16. These coatings can be designed as multilayer coatings, in particular with alternating layers of molybdenum and silicon.

[0086] The projection optics 10 has a large object-image offset in the y-direction y between a y-coordinate of a center of the object field 5 and a y-coordinate of the center of the image field 11. This object-image offset in the y-direction y can be approximately as large as a z-distance between the object plane 6 and the image plane 12.

[0087] The projection optics 10 can, in particular, be anamorphic. It has, in particular, different image scales ßx, ßy in the x and y directions x, y. The two image scales ßx, ßy of the projection optics 10 are preferably (ßx, ßy) = (+ / - 0.25, / +- 0.125). A positive image scale ß means an image without image inversion. A negative sign for the image scale ß means an image with image inversion.

[0088] The projection optics 10 thus leads to a reduction in the ratio 4 in the x-direction x, i.e. in the direction perpendicular to the scanning direction.

[0089] The projection optics 10 leads to a reduction of 84 in the y-direction y, i.e. in the scanning direction.

[0090] Other magnifications are also possible. Magnifications with the same sign and absolutely identical in the x and y directions (x, y), for example, with absolute values ​​of 0.125 or 0.25, are also possible.

[0091] The number of intermediate image planes in the x- and y-directions x, y in the beam path between the object field 5 and the image field 11 can be the same or can be different, depending on the design of the projection optics 10. Examples of projection optics with different numbers of such intermediate images in the x- and y-directions x, y are known from US 2018 / 0074303 A1.

[0092] Each of the second facets 23 is assigned to exactly one of the first facets 21 to form a respective illumination channel for illuminating the object field 5. This can result in particular in illumination according to the Köhler principle. The far field is broken down into a plurality of object fields 5 with the aid of the first facets 21. The first facets 21 generate a plurality of images of the intermediate focus on the second facets 23 assigned to them. The first facets 21 are each imaged onto the reticle 7 by an assigned second facet 23, superimposed on one another, to illuminate the object field 5. The illumination of the object field 5 is in particular as homogeneous as possible. It preferably has a uniformity error of less than 2%. Field uniformity can be achieved by superimposing different illumination channels.

[0093] By arranging the second facets 23, the illumination of the entrance pupil of the projection optics 10 can be geometrically defined. By selecting the illumination channels, in particular the subset of the second facets 23 that guide light, the intensity distribution in the entrance pupil of the projection optics 10 can be adjusted. This intensity distribution is also referred to as the illumination setting or illumination pupil fill.

[0094] A likewise preferred pupil uniformity in the area of ​​defined illuminated sections of an illumination pupil of the illumination optics 4 can be achieved by redistributing the illumination channels.

[0095] Further aspects and details of the illumination of the object field 5 and in particular of the entrance pupil of the projection optics 10 are described below.

[0096] The projection optics 10 can, in particular, have a homocentric entrance pupil. This can be accessible. It can also be inaccessible.

[0097] The entrance pupil of the projection optics 10 cannot usually be precisely illuminated with the second facet mirror 22. When the projection optics 10 images the center of the second facet mirror 22 telecentrically onto the wafer 13, the aperture rays often do not intersect at a single point. However, a surface can be found in which the pairwise determined distance of the aperture rays is minimized. This surface represents the entrance pupil or a surface conjugated to it in spatial space.

[0098] In particular, this surface shows a finite curvature.

[0099] It is possible that the projection optics 10 have different entrance pupil positions for the tangential and sagittal beam paths. In this case, an imaging element, in particular an optical component of the transmission optics, should be provided between the second facet mirror 22 and the reticle 7. With the help of this optical element, the different positions of the tangential entrance pupil and the sagittal entrance pupil can be taken into account.

[0100] In the arrangement of the components of the illumination optics 4 shown in Fig. 1, the second facet mirror 22 is arranged in a surface conjugate to the entrance pupil of the projection optics 10. The first facet mirror 20 is arranged tilted relative to the object plane 6. The first facet mirror 20 is arranged tilted relative to an arrangement plane defined by the deflection mirror 19. The first facet mirror 20 is arranged tilted relative to an arrangement plane defined by the second facet mirror 22.

[0101] Fig. 2 shows a schematic representation of an embodiment of an optical system 300 for a lithography system or projection exposure system 1, as shown, for example, in Fig. 1. Furthermore, the optical system 300 of Fig. 2 can also be used, for example, in a DUV lithography system.

[0102] The optical system 300 of Fig. 2 has a plurality of actuatable optical elements 310. The optical system 300 is embodied here as a micromirror array, wherein the optical elements 310 are micromirrors. Each micromirror 310 can be actuated by means of an associated actuator 200. For example, a respective micromirror 310 can be tilted about two axes and / or displaced in one, two, or three spatial axes by means of the associated actuator 200. For reasons of clarity, the reference numerals are shown only for the top row of these elements.

[0103] The control device 100 controls the respective actuator 200, for example, with a control voltage V2 (see Figs. 3 to 7). This adjusts a position of the respective micromirror 310. The control device 100 is described in particular with reference to Figs. 3 to 7.

[0104] Figure 3 shows a schematic block diagram of a first embodiment of a control device 100 for controlling an actuator 200 for actuating an optical element 310 of an optical system 300. In the embodiments of Figures 3 to 7, the actuator 200 is a capacitive actuator and is depicted as a capacitor in these Figures 3 to 7.

[0105] The control device 100 according to Fig. 3 comprises an amplifier 110. The amplifier 110 can also be referred to as an amplifier stage or amplifier circuit. Preferably, the amplifier 110 is configured to receive the supply voltage VI provided at the input node K1 and, using a quiescent current II, to provide an amplified control voltage V2 for the actuator 200 at the output node K2.

[0106] The amplifier 110 comprises a resistive voltage divider RI, R2 for adjusting the gain of the amplifier 110. The resistive voltage divider RI, R2 comprises a first resistor RI and a second resistor R2. Furthermore, the amplifier 110 comprises a capacitive voltage divider Cl, C2 with a first capacitor Cl and a second capacitor C2. The capacitive voltage divider Cl, C2 is connected in parallel to the resistive voltage divider RI, R2. In particular, the capacitance values ​​of the first capacitor Cl and the second capacitor C2 of the capacitive voltage divider Cl, C2 are matched to the resistance values ​​of the first resistor RI and the second resistor R2 of the resistive voltage divider RI, R2 such that the first capacitor Cl and the second capacitor C2 of the capacitive voltage divider Cl, C2 reduce thermal noise of the resistors of the resistive voltage divider RI, R2.For example, the respective resistor R1, R2 is designed as an active resistor. For example, the respective resistor R1, R2 is designed as a multilayer polysilicon resistor, a diode-connected transistor, or a pseudo-resistor. The respective capacitor C1, C2 can also be designed as an active capacitor.

[0107] In the first embodiment according to Fig. 3, the amplifier 110 comprises a voltage-controlled current source 120 with an operational amplifier 121 controllable by a control voltage V3 and a transistor 122. The operational amplifier 121 is connected to the control terminal G of the transistor 122.

[0108] As illustrated in Figure 3, the first resistor RI is connected between the input node K1 and the output node K2 of the amplifier 110. The second resistor R2 is connected between the transistor 122 and ground GND. The first transistor C1 is connected in parallel with the first resistor RI between the input node K1 and the output node K2 of the amplifier 110. The second capacitor C2 is connected in parallel with the second resistor R2 between the transistor 122 and ground GND.

[0109] In the first embodiment according to Fig. 3, transistor 122 of voltage-controlled current source 120 is a field-effect transistor (FET). The gate terminal G (as control terminal) of FET 122 is connected to the output of operational amplifier 121. The drain terminal D of FET 122 is connected to the output node K2 of amplifier 110. The source terminal S of FET 122 is connected to ground GND via the second resistor R2. Furthermore, the source terminal S is connected to the inverting input of operational amplifier 122 via a feedback branch 123. The non-inverting input of operational amplifier 121 is connected to an input node K3 of control device 100 for receiving control voltage V3.

[0110] Fig. 4 shows a schematic block diagram of a second embodiment of a control device 100 for controlling an actuator 200 for actuating an optical element 310 of an optical system 300. In the second embodiment according to Fig. 4, the amplifier 110 comprises a class A amplifier 130. In particular, the amplifier 110 in Fig. 4 is designed as a class A amplifier 130. The class A amplifier 130 of Fig. 4 has an operational amplifier 131 controllable by a control voltage V3 and a transistor 132. The transistor 132 of Fig. 4 is designed as a field effect transistor (FET).

[0111] The resistive voltage divider RI, R2 of Fig. 4 is connected between the output node K2 of amplifier 110 and ground GND. The capacitive voltage divider Cl, C2 is also connected between the output node K2 of amplifier 110 and ground GND. The center tap M of the resistive voltage divider RI, R2 and the center tap of the capacitive voltage divider Cl, C2 are connected to each other and are further connected via a feedback branch 133 to the non-inverting input of the operational amplifier 131. The inverting input of the operational amplifier 131 is connected to an input node K3 of the control device 100 for receiving the control voltage V3. The first capacitor Cl is connected in parallel with the first resistor RI between the output node K2 of amplifier 110 and the center tap M. The second capacitor C2 is connected in parallel with the second resistor R2 between the center tap M and ground GND.The gate terminal G of FET 132 is connected to the output of operational amplifier 131. The drain terminal D of FET 132 is connected to the output node K2 of amplifier 110. The source terminal S of FET 132 is connected to ground GND.

[0112] Fig. 5 shows a schematic block diagram of a third embodiment of a control device 100 for controlling an actuator 200 for actuating an optical element 310 of an optical system 300. In the third embodiment according to Fig. 5, the amplifier 110 is a non-inverting amplifier with a high-voltage operational amplifier 140 controllable by a control voltage V3. A voltage supply terminal of the high-voltage operational amplifier 140 is connected to the first node K1 of the amplifier 110 for receiving the supply voltage V1. The resistive resistor divider RI, R2 of Fig. 5 with the first resistor RI and the second resistor R2 is connected between the output node K2 of the amplifier 110 and ground GND. The capacitive voltage divider C1, C2 is also connected between the output node K2 of the amplifier 110 and ground GND.Thus, the capacitive voltage divider Cl, C2 is connected in parallel to the resistive voltage divider RI, R2.

[0113] The center tap M of the resistive voltage divider RI, R2 and the center tap of the capacitive voltage divider Cl, C2 are connected to each other and connected via a feedback branch 141 to the inverting input of the high-voltage operational amplifier 140. The non-inverting input of the high-voltage operational amplifier 140 is connected to an input node K3 of the control device 100 for receiving the control voltage V3. The first capacitor Cl is connected in parallel with the first resistor RI between the output node K2 of the amplifier 110 and the center tap M. The second capacitor C2 is connected in parallel with the second resistor

[0114] R2 connected between the center tap M and ground GND.

[0115] Fig. 6 shows a schematic block diagram of a fourth embodiment of a control device 100 for controlling an actuator 200 for actuating an optical element 310 of an optical system 300. The fourth embodiment according to Fig. 6 is based on the third embodiment according to Fig. 5 and differs from it in that the second capacitor C2 in Fig. 6 is designed as a trimmable capacitor. The additional capacitance CP shown in Fig. 6 denotes a parasitic capacitance. More details on this are given below.

[0116] The parasitic capacitor of the upper plate of the second capacitor C2 and the parasitic capacitor of the lower plate of the first capacitor C1 can affect the capacitive divider ratio, or the gain, of the closed-loop circuit. The total parasitic capacitance can be modeled as a single capacitor CP connected to the center tap M. As long as CP is small compared to C2, it can be neglected. If CP impairs the closed-loop gain performance, C2 can be trimmed to compensate for the parasitic capacitance CP in the circuit shown in Fig. 6.

[0117] Fig. 7 shows a schematic block diagram of a fifth embodiment of a control device 100 for controlling an actuator 200 for actuating an optical element 310 of an optical system 300.

[0118] The control device 100 according to Fig. 7 comprises an amplifier 110. The amplifier 110 can also be referred to as an amplifier stage or amplifier circuit. Preferably, the amplifier 110 is configured to receive the supply voltage V1 provided at the input node K1 and, using a quiescent current I1, to provide an amplified control voltage V2 for the actuator 200 at the output node K2.

[0119] The amplifier 110 includes a resistive voltage divider RI, R2 for adjusting the gain of the amplifier 110. The resistive voltage divider RI, R2 includes a first resistor RI and a second resistor R2. Furthermore, the amplifier 110 includes a capacitive voltage divider Cl, C2 with a first capacitor Cl and a second capacitor C2.

[0120] As Fig. 7 illustrates, the first capacitor C is connected between the output node K2 of the amplifier 110 and ground GND and the second capacitor C2 is connected in parallel with the second resistor R2.

[0121] In particular, the capacitance values ​​of the first capacitor C1 and the second capacitor C2 of the capacitive voltage divider C1, C2 are matched to the resistance values ​​of the first resistor R1 and the second resistor R2 of the resistive voltage divider R1, R2 such that the first capacitor C1 and the second capacitor C2 of the capacitive voltage divider C1, C2 improve a power supply rejection ratio and an accuracy of the amplification.

[0122] For example, the respective resistor R1, R2 is designed as an active resistor. The respective capacitor C1, C2 can also be designed as an active capacitor. For example, the respective resistor R1, R2 is designed as a multilayer polysilicon resistor, a diode-connected transistor, or a pseudo-resistor.

[0123] In the first embodiment according to Fig. 7, the amplifier 110 comprises a voltage-controlled current source 150 with an operational amplifier 151 controllable by a control voltage V3 and a transistor 152. The operational amplifier 151 is connected to the control terminal G of the transistor 152. In the embodiment according to Fig. 7, the transistor 152 of the voltage-controlled current source 150 is a field-effect transistor (FET). The gate terminal G (as the control terminal) of the FET 152 is connected to the output of the operational amplifier 151. The drain terminal D of the FET 152 is connected to the output node K2 of the amplifier 110. The source terminal S of the FET 152 is connected to ground GND via the second resistor R2. Furthermore, the source terminal S is connected to the inverting input of the operational amplifier 151 via a feedback branch 153.The non-inverting input of the operational amplifier 151 is connected to an input node K3 of the control device 100 for receiving the control voltage V3.

[0124] The second capacitor C2 is connected in parallel to the second resistor R2 between the transistor 152 and ground GND.

[0125] Although the present invention has been described using exemplary embodiments, it can be modified in many ways.

[0126] LIST OF REFERENCE SYMBOLS

[0127] 1 projection exposure system

[0128] 2 lighting system

[0129] 3 Light source

[0130] 4 Lighting optics

[0131] 5 Object field

[0132] 6 Object level

[0133] 7 reticles

[0134] 8 reticle holders

[0135] 9 Reticle displacement drive

[0136] 10 Projection optics

[0137] 11 Image field

[0138] 12 Image plane

[0139] 13 wafers

[0140] 14 wafer holders

[0141] 15 Wafer relocation drive

[0142] 16 Illumination radiation

[0143] 17 Collector

[0144] 18 Intermediate focal plane

[0145] 19 Deflecting mirrors

[0146] 20 first facet mirror

[0147] 21 first facet

[0148] 22 second facet mirror

[0149] 23 second facet

[0150] 100 control device

[0151] 110 amplifiers

[0152] 120 voltage-controlled current source

[0153] 121 Operation Amplifier

[0154] 122 Transistor 123 Feedback branch

[0155] 130 Class A amplifiers

[0156] 131 Operational reinforcements

[0157] 132 transistors

[0158] 133 Feedback branch

[0159] 140 High-voltage operational amplifiers

[0160] 141 Feedback branch

[0161] 150 voltage-controlled current source

[0162] 151 Operation Amplifier

[0163] 152 transistors

[0164] 153 Feedback branch

[0165] 200 actuator

[0166] 300 optical system

[0167] 310 optical element

[0168] C 1 first capacitor

[0169] C2 second capacitor

[0170] CP parasitic capacitance

[0171] D Drain connection

[0172] G Gate connection

[0173] GND ground potential

[0174] 11 Quiescent current

[0175] Kl input node of the amplifier

[0176] K2 Output node of the amplifier

[0177] K3 Input node of the control device

[0178] M center tap

[0179] ml mirror

[0180] M2 mirror

[0181] M3 mirror

[0182] M4 mirror M5 mirror

[0183] M6 mirror

[0184] RI first resistance

[0185] R2 second resistor S source terminal

[0186] VI Supply voltage

[0187] V2 control voltage

[0188] V3 control voltage

Claims

PATENT CLAIMS 1. A control device (100) for controlling at least one actuator (200) for actuating an optical element (310) of an optical system (300), comprising: an amplifier (110) configured to receive a provided supply voltage (V1) at an input node (K1) and to provide a control voltage (V2) for the actuator (200) at an output node (K2), wherein the amplifier (110) has a resistive voltage divider (RI, R2) for adjusting the gain of the amplifier (110) with a first resistor (RI) and a second resistor (R2) and a capacitive voltage divider (CI, C2) with a first capacitor (CI) and a second capacitor (C2), wherein the capacitive voltage divider (CI, C2) is connected in parallel to the resistive voltage divider (RI, R2), wherein the capacitance values ​​of the first capacitor (CI) and the second Capacitor (C2) of the capacitive voltage divider (Cl,C2) are matched to the resistance values ​​of the first resistor (Rl) and the second resistor (R2) of the resistive voltage divider (Rl, R2) in such a way that the first capacitor (Cl) and the second capacitor (C2) of the capacitive voltage divider (Cl, C2) reduce thermal noise of the resistors of the resistive voltage divider (Rl, R2).

2. Control device according to claim 1, wherein the respective resistor (Rl, R2) is designed as an active resistor and / or the respective capacitor (C1, C2) is designed as an active capacitor.

3. Control device according to claim 1, wherein the respective resistor (RI, R2) is designed as a multilayer polysilicon resistor or as a diode-connected transistor or as a pseudo-resistor.

4. Control device according to one of claims 1 to 3, wherein the first capacitor (C 1) and / or the second capacitor (C2) of the capacitive voltage divider (C 1, C2) is designed as a trimmable capacitor.

5. Control device according to one of claims 1 to 4, wherein the amplifier (110) comprises a voltage-controlled current source (120) with an operational amplifier (121) controllable by a control voltage (V3) and a transistor (122), wherein the operational amplifier (121) is connected to a control terminal (G) of the transistor (122).

6. Control device according to claim 5, wherein the first resistor (Rl) is connected between the input node (Kl) and the output node (K2) of the amplifier (110) and the second resistor (R2) is connected between the transistor (122) and ground (GND), wherein the first capacitor (C1) is connected in parallel to the first resistor (Rl) between the input node (Kl) and the output node (K2) of the amplifier (110) and the second capacitor (C2) is connected in parallel to the second resistor (R2) between the transistor (122) and ground (GND).

7. Control device according to claim 6, wherein the transistor (122) of the voltage-controlled current source (120) is a field-effect transistor, the gate terminal (G) of which is connected to the output of the operational amplifier (121), the drain terminal (D) of which is connected to the output node (K2) of the amplifier (110) and the source terminal (S) of which is connected to ground (GND) via the second resistor (R2) and a feedback branch (123) is connected to the inverting input of the operational amplifier (121), wherein the non-inverting input of the operational amplifier (121) is connected to an input node (K3) of the control device (100) for receiving the control voltage (V3).

8. Control device according to one of claims 1 to 4, wherein the amplifier (110) comprises a class-A amplifier (130) with an operational amplifier (131) controllable by a control voltage (V3) and a transistor (132), wherein the resistive voltage divider (R1, R2) is connected to the first resistor (R1) and the second resistor (R2) between the output node (K2) of the amplifier (110) and ground (GND), wherein the center tap (M) of the resistive voltage divider (R1, R2) and the center tap of the capacitive voltage divider (C1, C2) are connected via a feedback branch (133) to the non-inverting input of the operational amplifier (131), wherein the inverting input of the operational amplifier (131) is connected to an input node (K3) of the control device (100) for receiving the control voltage (V3),wherein the first capacitor (C1) is connected in parallel to the first resistor (R1) between the output node (K2) of the amplifier (110) and the center tap (M), and the second capacitor (C2) is connected in parallel to the second resistor (R2) between the center tap (M) and ground (GND).

9. Control device according to claim 8, wherein the transistor (132) of the class A amplifier (130) is a field effect transistor whose gate terminal (G) is connected to the output of the operational amplifier (131), whose drain terminal (D) is connected to the output node (K2) of the amplifier (110) and whose source terminal (S) is connected to ground (GND).

10. Control device according to one of claims 1 to 4, wherein the amplifier (110) is a non-inverting amplifier with a high-voltage operational amplifier (140) controllable by a control voltage (V3), wherein a voltage supply terminal of the high-voltage operational amplifier (140) is connected to the first node (K1) for receiving the supply voltage (V1), wherein the resistive voltage divider (R1, R2) is connected to the first resistor (R1) and the second resistor (R2) between the output node (K2) of the amplifier (110) and ground (GND), wherein the center tap (M) of the resistive voltage divider (R1, R2) and the center tap of the capacitive voltage divider (C1, C2) are connected via a feedback branch (141) to the inverting input of the high-voltage operational amplifier (140), wherein the non-inverting input of the high-voltage operational amplifier (140) is connected to an input node (K3) of the Control device (100) for receiving the control voltage (V3),wherein the first capacitor (C1) is connected in parallel to the first resistor (R1) between the output node (K2) of the amplifier (110) and the center tap (M), and the second capacitor (C2) is connected in parallel to the second resistor (R2) between the center tap (M) and ground (GND).

11. Control device according to one of claims 1 to 10, wherein the control device (100) is configured to control a plurality N of actuators (200), wherein the respective actuator (200) is configured to actuate an optical element (310) associated with the actuator (200).

12. Control device according to one of claims 1 to 4, wherein the amplifier (110) is designed as a class AB amplifier.

13. Control device (100) for controlling at least one actuator (200) for actuating an optical element (310) of an optical system (300), comprising: an amplifier (110) which is configured to receive a provided supply voltage (V1) at an input node (K1) and to provide a drive voltage (V2) for the actuator (200) at an output node (K2), wherein the amplifier (110) has a resistive voltage divider (RI, R2) for adjusting the gain of the amplifier (110) with a first resistor (RI) and a second resistor (R2) and a capacitive voltage divider (CI, C2) with a first capacitor (CI) and a second capacitor (C2), wherein the first capacitor (CI) is connected between the output node (K2) of the amplifier (110) and ground (GND) and the second capacitor (C2) is connected in parallel to the second resistor (R2) between the transistor (122) and ground (GND), wherein the amplifier (110) has a voltage-controlled current source (150) with an operational amplifier controllable by a control voltage (V3) (151) and a transistor (152),wherein the operational amplifier (151) is connected to a control terminal (G) of the transistor (152).

14. Control device according to claim 13, wherein the capacitance values ​​of the first capacitor (Cl) and the second capacitor (C2) of the capacitive voltage divider (Cl, C2) are matched to the resistance values ​​of the first resistor (Rl) and the second resistor (R2) of the resistive voltage divider (Rl, R2) such that the first capacitor (Cl) and the second capacitor (C2) of the capacitive voltage divider (Cl, C2) improve a power supply rejection ratio and an accuracy of the amplification.

15. The control device according to claim 13, wherein the first resistor (Rl) is connected between the input node (Kl) and the output node (K2) of the amplifier (110) and the second resistor (R2) is connected between the transistor (152) and ground (GND).

16. Control device according to claim 15, wherein the transistor (152) of the voltage-controlled current source (150) is a field-effect transistor whose gate terminal (G) is connected to the output of the operational amplifier (151), whose drain terminal (D) is connected to the output node (K2) of the amplifier (110) and whose source terminal (S) is connected to ground (GND) via the second resistor (R2) and is connected to the inverting input of the operational amplifier (151) via a feedback branch (153), wherein the non-inverting input of the operational amplifier (151) is connected to an input node (K3) of the control device (100) for receiving the control voltage (V3).

17. Optical system (300) with a number of actuatable optical elements (310), wherein each of the actuatable optical elements (310) of the number is assigned an actuator (200), wherein each actuator (200) is assigned a control device (100) for controlling the actuator (200) according to one of claims 1 to 16.

18. Lithography system (1) with an optical system (300) according to claim 17.

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