Signal processing device, signal processing method, and non-transitory recording medium

Abstract

A signal processing device according to one embodiment of the present invention comprises: a data set generation circuit capable of sequentially generating a plurality of first data sets by extracting a first predetermined number of data items while shifting the data items by a second predetermined number on the basis of first time-series data; a Fourier transform circuit capable of generating a plurality of second data sets by performing Fourier transform on the basis of each of the plurality of first data sets; a filter processing circuit capable of generating a plurality of third data sets by performing FIR filter processing using a filter coefficient data set on each of the plurality of second data sets; an inverse Fourier transform circuit capable of generating a plurality of fourth data sets by performing inverse Fourier transform on the basis of each of the plurality of third data sets; and a data coupling circuit capable of generating second time-series data by coupling the latest second predetermined number of data items in each of the plurality of fourth data sets.

Description

Signal processing device, signal processing method, and non-transitory recording medium

[0001] The present invention relates to a signal processing device that performs processing using an FIR filter, a signal processing method, and a non-transitory recording medium on which software that performs processing using an FIR filter is recorded.

[0002] Some signal processing devices handle audio signals. For example, Patent Document 1 discloses a technique for processing audio signals using a decimator and an interpolator filter.

[0003] International Publication No. 2019 / 089845

[0004] In signal processing devices that handle acoustic signals, it is desirable for processing to be performed in real time, and further improvements in real-time performance are expected.

[0005] It is desirable to provide a signal processing device, a signal processing method, and a non-transitory recording medium that can improve real-time performance.

[0006] A signal processing device according to an embodiment of the present invention includes a data set generation circuit, a Fourier transform circuit, a filter processing circuit, an inverse Fourier transform circuit, and a data combining circuit. The data set generation circuit is capable of sequentially generating a plurality of first data sets by extracting a first predetermined number of data items based on first time-series data while shifting the first predetermined number by a second predetermined number that is smaller than the first predetermined number. The Fourier transform circuit is capable of generating a plurality of second data sets corresponding to the first data sets by performing a Fourier transform on each of the first data sets. The filter processing circuit is capable of generating a plurality of third data sets corresponding to the second data sets by performing an FIR filter process on each of the second data sets using a filter coefficient data set. The inverse Fourier transform circuit is capable of generating a plurality of fourth data sets corresponding to the third data sets and each including the first predetermined number of data items by performing an inverse Fourier transform on each of the third data sets. The data combining circuit is capable of generating second time series data corresponding to the first time series data by combining a second predetermined number of the most recent data in each of the plurality of fourth data sets.

[0007] A signal processing method according to one embodiment of the present invention includes: sequentially generating a plurality of first data sets by extracting a first predetermined number of data items based on first time-series data while shifting the first predetermined number by a second predetermined number that is smaller than the first predetermined number; performing a Fourier transform on each of the plurality of first data sets to generate a plurality of second data sets corresponding to the plurality of first data sets, respectively; performing an FIR filter process on each of the plurality of second data sets using a filter coefficient data set to generate a plurality of third data sets corresponding to the plurality of second data sets, respectively; performing an inverse Fourier transform on each of the plurality of third data sets to generate a plurality of fourth data sets corresponding to the plurality of third data sets, each fourth data set including the first predetermined number of data items; and generating second time-series data corresponding to the first time-series data by combining the latest second predetermined number of data items in each of the plurality of fourth data sets.

[0008] A non-transitory recording medium according to an embodiment of the present invention has recorded thereon software that causes a processor to perform the following operations: sequentially generating a plurality of first data sets by extracting a first predetermined number of data based on first time series data while shifting the first predetermined number by a second predetermined number that is smaller than the first predetermined number; generating a plurality of second data sets corresponding to the plurality of first data sets by performing a Fourier transform on each of the plurality of first data sets; generating a plurality of third data sets corresponding to the plurality of second data sets by performing an FIR filter process on each of the plurality of second data sets using a filter coefficient dataset; generating a plurality of fourth data sets corresponding to the plurality of third data sets, each including the first predetermined number of data, by performing an inverse Fourier transform on each of the plurality of third data sets; and generating second time series data corresponding to the first time series data by combining the latest second predetermined number of data in each of the plurality of fourth data sets.

[0009] According to a signal processing device, a signal processing method, and a non-transitory recording medium according to an embodiment of the present invention, real-time performance can be improved.

[0010] FIG. 1 is a block diagram illustrating an example configuration of a signal processing device according to an embodiment of the present invention. FIG. 2 is an explanatory diagram illustrating an example operation of a data set generation unit illustrated in FIG. 1. FIG. 3 is an explanatory diagram illustrating an example configuration of a tap coefficient data set, which is the original data of the filter coefficient data set illustrated in FIG. 1. FIG. 4 is an explanatory diagram illustrating examples of RFFT processing, FIR filter processing, and IRFFT processing performed by the signal processing device illustrated in FIG. 1. FIG. 5 is an explanatory diagram illustrating an example operation of a data combination unit illustrated in FIG. 1. FIG. 6 is an explanatory diagram illustrating an example operation of the signal processing device illustrated in FIG. 1. FIG. 7 is a block diagram illustrating an example configuration of a signal processing device according to a modified example. FIG. 8 is a block diagram illustrating an example configuration of a signal processing device according to another modified example. FIG. 9 is an explanatory diagram illustrating an example operation of the signal processing device illustrated in FIG. 8. FIG. 10 is a block diagram illustrating an example configuration of a signal processing device according to an application example. FIG. 11 is an explanatory diagram illustrating an example operation of the data set generation unit illustrated in FIG. 10. FIG. 12 is an explanatory diagram illustrating an example configuration of a dataset generated by the calculation unit illustrated in FIG. 10.

[0011] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. The description will be made in the following order: 1. Embodiment 2. Example of application to an adaptive filter

[0012] 1. Embodiment [Configuration Example] Fig. 1 shows a configuration example of a signal processing device (signal processing device 1) according to an embodiment of the present invention. This signal processing device 1 is configured to perform acoustic processing, such as echo processing and equalization processing, on a signal generated by a microphone and output the processing result from a speaker. This signal processing device 1 includes a microphone 11, an analog-to-digital (AD) converter 12, a data set generator 13, a real-valued fast fourier transformation (RFFT) processor 14, a memory 15, a finite impulse response (FIR) filter processor 16, an inverse real-valued fast fourier transformation (IRFFT) processor 17, a data combiner 18, a digital-to-analog (DA) converter 19, and a speaker 20. The signal processing device 1 includes, for example, a processor and a memory, and is configured to perform processing by executing a program.

[0013] The microphone 11 is configured to convert sound into an analog signal, which is an electrical signal.

[0014] The AD conversion unit 12 is configured to generate a signal S12 by performing AD conversion based on the analog signal supplied from the microphone 11. The AD conversion unit 12 generates multi-bit data D by performing one AD conversion. The AD conversion unit 12 repeatedly performs AD conversion at a processing frequency f to sequentially generate multiple pieces of data D arranged in time series. The AD conversion unit 12 then outputs this series of data D as a signal S12.

[0015] The data set generating unit 13 is configured to generate a data set DS1, which is a unit of data to be processed in the signal processing device 1, based on a series of data D included in the signal S12.

[0016] 2 shows an example of the operation of the dataset generation unit 13. The signal S12 supplied to the dataset generation unit 13 includes a plurality of pieces of data D arranged in time series and sequentially supplied from the AD conversion unit 12. Every time 32 pieces of data D are supplied, the dataset generation unit 13 generates a dataset DS1 based on the latest 4096 pieces of data D including the 32 pieces of data D. The dataset DS1 is a dataset in the time domain. In other words, the 4096 pieces of data D included in the dataset DS1 are pieces of data D at different times.

[0017] Specifically, the dataset generator 13 generates dataset DS1 by extracting 4096 pieces of data D during the period from timing t1 to t4 from the plurality of pieces of data D included in signal S12. Next, the dataset generator 13 generates dataset DS1 by extracting 4096 pieces of data D during the period from timing t2 to t5 from the plurality of pieces of data D included in signal S12. Next, the dataset generator 13 generates dataset DS1 by extracting 4096 pieces of data D during the period from timing t3 to t6 from the plurality of pieces of data D included in signal S12.

[0018] For example, the signal S12 includes 32 pieces of data D in the period from timing t1 to t2. The same applies to the periods from timing t2 to t3, from timing t4 to t5, and from timing t5 to t6. The data set generator 13 extracts 4096 pieces of data D from the plurality of pieces of data D included in the signal S12, shifting the data D by 32 pieces, thereby sequentially generating a plurality of data sets DS1.

[0019] In this example, the data set DS1 includes 4096 pieces of data D, but is not limited to this and may include, for example, various numbers of data D that are powers of 2. Specifically, the data set DS1 may include, for example, 2048 pieces of data D or 8192 pieces of data D.

[0020] In addition, in this example, the plurality of data sets DS1 are sequentially generated by shifting the data D by 32 units, but this is not limiting, and for example, the data D can be shifted by various numbers. Specifically, the plurality of data sets DS1 may be sequentially generated by shifting the data D by 16 units, or the plurality of data sets DS1 may be sequentially generated by shifting the data D by 64 units.

[0021] The RFFT processing unit 14 ( FIG. 1 ) is configured to generate a data set DS2 by performing RFFT processing based on the data set DS1. The RFFT processing is a fast Fourier transform process that can be performed on real-number data. By performing RFFT processing, the signal processing device 1 can perform a Fourier transform with a smaller amount of calculation than FFT processing. The data set DS2 includes 2049 pieces of data D. The data set DS2 is a frequency domain data set. In other words, the 2049 pieces of data D included in the data set DS2 are data D at different frequencies.

[0022] The storage unit 15 is configured to store a filter coefficient data set DF used in the FIR filter processing unit 16. In this example, the storage unit 15 is a non-volatile storage unit. The filter coefficient data set DF includes 2049 pieces of data D. The filter coefficient data set DF is a data set in the frequency domain.

[0023] This filter coefficient data set DF is generated by performing RFFT processing based on the time-domain tap coefficient data set DT and is stored in advance in the storage unit 15. The tap coefficient data set DT corresponds to the tap coefficients of the FIR filter operating in the time domain. As shown in FIG. 3 , the tap coefficient data set DT is generated by adding 32 zeros (0) to the 4064 tap coefficients of the FIR filter operating in the time domain, which are indicated by the shaded areas.

[0024] That is, in this example, as shown in FIG. 2 , the dataset generation unit 13 sequentially generates multiple datasets DS1 by extracting 4,096 pieces of data D while shifting them by 32 pieces. That is, the newly generated dataset DS1 includes 4,064 pieces of data D included in the previous dataset DS1 and 32 new pieces of data D not included in the previous dataset DS1. Correspondingly, as shown in FIG. 3 , the tap coefficient dataset DT includes 4,064 tap coefficients of an FIR filter operating in the time domain, indicated by the shaded area, and 32 zeros (0). In this way, the tap coefficient dataset DT is expanded to a format having 4,096 pieces of data D by adding 32 zeros (0) to the 4,064 tap coefficients. The filter coefficient dataset DF is then generated by performing RFFT processing based on this tap coefficient dataset DT.

[0025] The FIR filter processing unit 16 is configured to generate a data set DS3 by performing FIR filtering on the data set DS2 using the filter coefficient data set DF. The data set DS3 includes 2049 pieces of data D. The data set DS3 is a frequency domain data set.

[0026] The IRFFT processing unit 17 is configured to generate a dataset DS4 by performing IRFFT processing based on the dataset DS3. The IRFFT processing is an inverse fast Fourier transform process that performs the inverse transformation of the RFFT processing that can be performed on real data. By performing the IRFFT processing, the signal processing device 1 can perform an inverse Fourier transform with a smaller amount of calculation than the IFFT processing. The dataset DS4 includes 4096 pieces of data D. The dataset DS4 is a time domain dataset.

[0027] FIG. 4 shows an example of IFFT processing, FIR filter processing, and IRFFT processing in the signal processing device 1.

[0028] 4, the RFFT processing unit 14 performs RFFT processing based on the data set DS1 having 4096 pieces of data D, thereby generating a frequency domain data set DS2 having 2049 pieces of data D. That is, in this example, the signal processing device 1 performs RFFT processing, and therefore the number of pieces of data D in the data set DS2 can be reduced by approximately half.

[0029] As shown in FIG. 4 , the FIR filter processing unit 16 performs FIR filtering on a data set DS2 having 2049 pieces of data D using a filter coefficient data set DF having 2049 pieces of data D to generate a data set DS3 having 2049 pieces of data D. Specifically, the FIR filter processing unit 16 generates the data set DS3 by multiplying two pieces of data D relating to the same frequency contained in the data set DS2 and the filter coefficient data set DF, based on the 2049 pieces of data D relating to multiple frequencies contained in the data set DS2 and the 2049 pieces of data D relating to multiple frequencies contained in the filter coefficient data set DF. For example, the FIR filter processing unit 16 generates the first frequency data D included in the data set DS3 by multiplying the first frequency data D included in the data set DS2 by the first frequency data D included in the filter coefficient data set DF. The FIR filter processing unit 16 generates the second frequency data D included in the data set DS3 by multiplying the second frequency data D included in the data set DS2 by the second frequency data D included in the filter coefficient data set DF. The same applies to the other frequencies. In this way, the FIR filter processing unit 16 can generate a data set DS3 including 2049 pieces of data D.

[0030] In this way, the FIR filter processing unit 16 performs processing in the frequency domain, and therefore performs filtering by multiplying two pieces of data D relating to the same frequency. That is, an FIR filter that operates in the time domain performs filtering by performing a convolution operation, but an FIR filter that operates in the frequency domain performs filtering by multiplying two pieces of data D relating to the same frequency.

[0031] 4 , the IRFFT processing unit 17 performs IRFFT processing on the data set DS3 having 2049 pieces of data D, thereby generating a time-domain data set DS4 having 4096 pieces of data D. In other words, because the signal processing device 1 performs RFFT processing and IRFFT processing, it is possible to restore the number of data D in the data set DS4 to 4096, which is the same number as the number of data D in the data set DS1.

[0032] The data combining unit 18 (FIG. 1) is configured to combine the data D based on the plurality of data sets DS4 supplied from the IRFFT processing unit 17, thereby generating a signal S18 including a series of data D.

[0033] FIG. 5 shows an example of the operation of the data combination unit 18. The data combination unit 18 is sequentially supplied with a plurality of data sets DS4 from the IRFFT processing unit 17. These plurality of data sets DS4 correspond to the plurality of data sets DS1 ( FIG. 2 ) sequentially generated by the data generation unit 13. Each time a data set DS4 is supplied, the data combination unit 18 extracts the most recent 32 pieces of data D from the data set DS4, which has 4096 pieces of data D, and discards the remaining 4064 pieces of data D. The data combination unit 18 then combines the extracted 32 pieces of data D with previously extracted data D. The data combination unit 18 outputs the series of data D generated in this manner as a signal S18.

[0034] The DA conversion unit 19 is configured to generate an analog signal by performing DA conversion based on the signal S18. The signal S18 includes a plurality of pieces of data D arranged in time series. The DA conversion unit 19 performs DA conversion based on the plurality of pieces of data D in time series order to generate an analog signal.

[0035] The speaker 20 is configured to convert the analog signal supplied from the DA converter 19 into sound.

[0036] Here, the dataset generation unit 13 corresponds to a specific example of a "dataset generation circuit" in an embodiment of the present disclosure. The RFFT processing unit 14 corresponds to a specific example of a "Fourier transform circuit" in an embodiment of the present disclosure. The FIR filter processing unit 16 corresponds to a specific example of a "filter processing circuit" in an embodiment of the present disclosure. The IRFFT processing unit 17 corresponds to a specific example of an "inverse Fourier transform circuit" in an embodiment of the present disclosure. The data combination unit 18 corresponds to a specific example of a "data combination circuit" in an embodiment of the present disclosure. The memory unit 15 corresponds to a specific example of a "memory circuit" in an embodiment of the present disclosure. The series of data D included in the signal S12 corresponds to a specific example of a "first time-series data" in an embodiment of the present disclosure. The dataset DS1 corresponds to a specific example of a "first dataset" in an embodiment of the present disclosure. The dataset DS2 corresponds to a specific example of a "second dataset" in an embodiment of the present disclosure. The dataset DS3 corresponds to a specific example of a "third dataset" in an embodiment of the present disclosure. The data set DS4 corresponds to a specific example of a "fourth data set" in an embodiment of the present disclosure. The filter coefficient data set DF corresponds to a specific example of a "filter coefficient data set" in an embodiment of the present disclosure. The series of data D included in the signal S18 corresponds to a specific example of a "second time-series data" in an embodiment of the present disclosure.

[0037] [Operation and Function] Next, the operation and function of the signal processing device 1 of this embodiment will be described.

[0038] (Overall Operation Overview) First, an overview of the overall operation of the signal processing device 1 will be described with reference to FIG. 1 . The microphone 11 converts sound into an analog signal, which is an electrical signal. The AD conversion unit 12 generates a signal S12 by performing AD conversion on the analog signal supplied from the microphone 11. The dataset generation unit 13 generates a dataset DS1, which is a unit of data to be processed in the signal processing device 1, based on a series of data D included in the signal S12. The RFFT processing unit 14 generates a dataset DS2 by performing RFFT processing on the dataset DS1. The storage unit 15 stores a filter coefficient dataset DF used in the FIR filter processing unit 16. The FIR filter processing unit 16 generates a dataset DS3 by performing FIR filter processing on the dataset DS2 using the filter coefficient dataset DF. The IRFFT processing unit 17 generates a dataset DS4 by performing IRFFT processing on the dataset DS3. The data combining unit 18 combines the data D based on the multiple data sets DS4 supplied from the IRFFT processing unit 17, thereby generating a signal S18 including a series of data D. The DA conversion unit 19 performs DA conversion based on the signal S18, thereby generating an analog signal. The speaker 20 converts the analog signal supplied from the DA conversion unit 19 into sound.

[0039] 2, 4, and 5, the operations of the data set generation unit 13, the RFFT processing unit 14, the FIR filter processing unit 16, the IRFFT processing unit 17, and the data combination unit 18 will be described in detail. A plurality of data D arranged in time series is sequentially supplied to the data set generation unit 13.

[0040] As shown in FIG. 2, the data set generating unit 13 generates a data set DS1 based on the latest 4096 pieces of data D every time 32 pieces of data D are supplied.

[0041] As shown in FIG. 4, the RFFT processing unit 14 performs RFFT processing based on the data set DS1 having 4096 pieces of data D, thereby generating a frequency domain data set DS2 having 2049 pieces of data D.

[0042] As shown in FIG. 4, the FIR filter processing unit 16 performs FIR filter processing on the data set DS2 having 2049 pieces of data D using the filter coefficient data set DF having 2049 pieces of data D, thereby generating a data set DS3 having 2049 pieces of data D.

[0043] As shown in FIG. 4, the IRFFT processing unit 17 performs IRFFT processing based on the data set DS3 having 2049 pieces of data D, thereby generating a time domain data set DS4 having 4096 pieces of data D.

[0044] As shown in FIG. 5, the data combining unit 18 combines the data D based on the plurality of data sets DS4 supplied from the IRFFT processing unit 17, thereby generating a signal S18 including a series of data D.

[0045] In this way, the signal processing device 1 uses the overlap-save method to generate a data set DS1 based on the latest 4096 pieces of data D including the 32 pieces of data D each time 32 pieces of data D are supplied, and performs processing based on this data set DS1. This allows the signal processing device 1 to shorten the delay time in processing. That is, for example, if processing were performed each time 4096 pieces of data D, which is the same number of pieces of data D as the number of pieces of data D in the tap coefficient data set DT, it would be necessary to wait until all of these pieces of data D were accumulated, which would take a long time. Since the signal processing device 1 can perform processing each time 32 pieces of data D, which is sufficiently smaller than the number of pieces of data D in the tap coefficient data set DT, are supplied, it is possible to shorten the delay time in processing.

[0046] Furthermore, the signal processing device 1 performs a Fourier transform using RFFT processing and an inverse Fourier transform using IRFFT processing. As a result, the signal processing device 1 can reduce the number of data D in the frequency domain by approximately half compared to, for example, a case in which a Fourier transform is performed using FFT processing and an inverse Fourier transform is performed using IFFT processing. That is, when FFT processing and IFFT processing are performed, the number of data D in the frequency domain is 4096, but in this embodiment, by using RFFT processing and IRFFT processing, the number of data D in the frequency domain can be reduced to 2049. As a result, the signal processing device 1 can reduce the amount of calculations.

[0047] Furthermore, the signal processing device 1 performs FIR processing in the frequency domain every time 32 pieces of data D, which is sufficiently smaller than the number of pieces of data D in the tap coefficient data set DT, are supplied. This allows the signal processing device 1 to reduce the amount of calculations compared to when FIR processing is performed in the time domain.

[0048] Next, a detailed description will be given of the calculation using the overlap-save method, which is performed each time 32 pieces of data D, which is sufficiently smaller than the number of pieces of data D in the tap coefficient data set DT, are supplied.

[0049] FIG. 6 shows an example of processing based on one data set DS1 generated by the data set generating unit 13.

[0050] As shown in Fig. 2, the dataset generation unit 13 generates a dataset DS1 based on the latest 4096 pieces of data D each time 32 pieces of data D are supplied. Therefore, this dataset DS1 includes 4064 pieces of data D included in the past dataset DS1 and 32 new pieces of data D not included in the past dataset DS1. In Fig. 6, these 32 new pieces of data D in dataset DS1 are indicated by shading. In other words, the 32 pieces of data D indicated by shading in dataset DS1 are essentially the data D to be processed. The RFFT processing unit 14 generates a dataset DS2 including 2049 pieces of data D by performing RFFT processing on such dataset DS1.

[0051] The filter coefficient data set DF is generated by performing a Fourier transform based on the time-domain tap coefficient data set DT and is stored in advance in the storage unit 15. As shown in FIG. 3, the tap coefficient data set DT includes 4064 tap coefficients of an FIR filter operating in the time domain and 32 zeros (0). In FIG. 6, the data D of these 4064 tap coefficients in the tap coefficient data set DT are indicated by shading. That is, the 4064 pieces of data D indicated by shading in the tap coefficient data set DT are essentially the data D to be processed. The filter coefficient data set DF is generated by performing RFFT processing based on such a tap coefficient data set DT. The filter coefficient data set DF includes 2049 pieces of data D.

[0052] 6 , the FIR filter processing unit 16 generates a data set DS3 by performing FIR filtering on a data set DS2 having 2049 pieces of data D using a filter coefficient data set DF having 2049 pieces of data D. Specifically, based on the 2049 pieces of data D relating to a plurality of frequencies included in the data set DS2 and the 2049 pieces of data D relating to a plurality of frequencies included in the filter coefficient data set DF, the FIR filter processing unit 16 generates the data set DS3 by multiplying two pieces of data D relating to the same frequency included in these two data sets.

[0053] The IRFFT processing unit 17 performs IRFFT processing based on the data set DS3 having 2049 pieces of data D, thereby generating a data set DS4 having 4096 pieces of data D.

[0054] The data combining unit 18 extracts the latest 32 pieces of data D from the data set DS4, which has 4096 pieces of data D, and discards the remaining 4064 pieces of data D. The data combining unit 18 then combines the extracted 32 pieces of data D with previously extracted data D. In FIG. 6, the latest 32 pieces of data D in the data set DS4 are indicated by shading. That is, the 32 pieces of data D indicated by shading in the data set DS4 are the actual processing results.

[0055] In this way, the signal processing device 1 uses the overlap-save method to generate a data set DS1 based on the latest 4096 pieces of data D including the 32 pieces of data D each time 32 pieces of data D are supplied, and performs processing based on this data set DS1. The signal processing device 1 then extracts the latest 32 pieces of data D from the data set DS4 having 4096 pieces of data D, and discards the remaining 4064 pieces of data D. In other words, the signal processing device 1 extracts only the portion where the calculation result of the linear convolution and the calculation result of the circular convolution are the same. This allows the processing result of the frequency-domain FIR filter performed in the signal processing device 1 to match the processing result of the time-domain FIR filter.

[0056] As described above, the signal processing device 1 includes a dataset generation circuit (dataset generation unit 13) that can sequentially generate a plurality of first datasets (dataset DS1) by extracting a first predetermined number (4096 in this example) of data D based on first time-series data (a series of data D included in the signal S12) while shifting the first predetermined number by a second predetermined number (32 in this example) that is smaller than the first predetermined number; a Fourier transform circuit (RFFT processing unit 14) that can generate a plurality of second datasets (dataset DS2) corresponding to the plurality of first datasets (dataset DS1) by performing a Fourier transform based on each of the plurality of first datasets (dataset DS1); and a Fourier transform circuit (RFFT processing unit 14) that can generate a plurality of second datasets (dataset DS2) corresponding to the plurality of first datasets (dataset DS2) by performing an FIR filter process on each of the plurality of second datasets (dataset DS2) using the filter coefficient dataset DF. The signal processing device 1 includes a filter processing circuit (FIR filter processing unit 16) capable of generating a plurality of third data sets (data set DS3) corresponding to the plurality of third data sets (data set DS2), an inverse Fourier transform circuit (IRFFT processing unit 17) capable of performing an inverse Fourier transform based on each of the plurality of third data sets (data set DS3) to generate a plurality of fourth data sets (data set DS4) corresponding to the plurality of third data sets (data set DS3) and each including a first predetermined number of data (4096 in this example), and a data combining circuit (data combining unit 18) capable of combining the latest second predetermined number (32 in this example) of data D in each of the plurality of fourth data sets (data set DS4) to generate second time series data (a series of data D included in the signal S19) corresponding to the first time series data. This allows the signal processing device 1 to perform processing every time, for example, 32 pieces of data D are supplied, thereby shortening the delay time in processing. As a result, the signal processing device 1 can improve real-time performance.

[0057] Furthermore, in the signal processing device 1, the Fourier transform circuit (RFFT processing unit 14) is capable of performing a Fourier transform by performing RFFT processing. Each of the multiple second data sets (data set DS2) includes a third predetermined number of data D (2049 in this example) that is smaller than the first predetermined number. Each of the multiple third data sets (data set DS3) includes the third predetermined number of data D. The inverse Fourier transform circuit (IRFFT processing unit 17) is capable of performing an inverse Fourier transform by performing IRFFT processing. As a result, in the signal processing device 1, the number of data D in the frequency domain can be reduced by approximately half compared to, for example, performing a Fourier transform using FFT processing and then performing an inverse Fourier transform using IFFT processing, thereby reducing the amount of calculation. As a result, the signal processing device 1 can reduce processing load and improve real-time performance.

[0058] The signal processing device 1 further includes a storage circuit (storage unit 15) that stores the filter coefficient data set DF. This eliminates the need for the signal processing device 1 to calculate the filter coefficient data set DF based on, for example, the tap coefficient data set DT, thereby reducing the amount of calculation.

[0059] [Effects] As described above, in this embodiment, the real-time capability is improved by including a dataset generation circuit capable of sequentially generating a plurality of first datasets by extracting a first predetermined number of data based on first time-series data while shifting the first predetermined number by a second predetermined number that is smaller than the first predetermined number; a Fourier transform circuit capable of generating a plurality of second datasets corresponding to the plurality of first datasets by performing a Fourier transform on each of the plurality of first datasets; a filter processing circuit capable of generating a plurality of third datasets corresponding to the plurality of second datasets by performing FIR filter processing on each of the plurality of second datasets using a filter coefficient dataset; an inverse Fourier transform circuit capable of generating a plurality of fourth datasets corresponding to the plurality of third datasets, each of which includes the first predetermined number of data, by performing an inverse Fourier transform on each of the plurality of third datasets; and a data combining circuit capable of generating second time-series data corresponding to the first time-series data by combining the latest second predetermined number of data in each of the plurality of fourth datasets.

[0060] In this embodiment, the Fourier transform circuit is capable of performing a Fourier transform by performing RFFT processing. Each of the plurality of second data sets includes a third predetermined number of data items that is smaller than the first predetermined number. Each of the plurality of third data sets includes a third predetermined number of data items D. The inverse Fourier transform circuit is capable of performing an inverse Fourier transform by performing IRFFT processing. This allows for improved real-time performance.

[0061] In this embodiment, a storage circuit for storing the filter coefficient data set is further provided, so that the amount of calculation can be reduced.

[0062] [Variation 1] In the above embodiment, the signal processing device 1 performs RFFT processing and IRFFT processing that can be performed on real number data, but this is not limited to this. Instead, for example, FFT processing and IFFT processing may be performed as in the signal processing device 1A shown in Fig. 7. This signal processing device 1A includes an FFT processing unit 14A and an IFFT processing unit 17A.

[0063] The FFT processing unit 14A is configured to generate a data set DS2 by performing FFT processing on the data set DS1. Specifically, the FFT processing unit 14A first performs FFT processing on the time-domain data set DS1 having 4096 pieces of data D to generate a frequency-domain data set having 4096 pieces of data D. The FFT processing unit 14A then generates a data set DS2 having 2049 pieces of data D by removing data D related to negative frequencies from the generated frequency-domain data set. In other words, because the data set DS1 is a real-valued data set, the data D related to positive frequencies and the data D related to negative frequencies are symmetrical to each other in the data set generated by the FFT processing. Therefore, the FFT processing unit 14A utilizes this symmetry of the Fourier transform to generate the data set DS2 by removing data D related to negative frequencies from the data set generated by the FFT processing.

[0064] The IFFT processing unit 17A is configured to generate a data set DS4 by performing IFFT processing on the data set DS3. Specifically, the IFFT processing unit 17A generates a frequency domain data set having 4096 pieces of data D by interpolating the data D using the symmetry of the Fourier transform based on the frequency domain data set DS3 having 2049 pieces of data D. Then, the IFFT processing unit 17A generates a data set DS4 including the 4096 pieces of data D by performing IFFT processing on the generated frequency domain data set.

[0065] [Modification 2] In the above embodiment, the FIR filter processing unit 16 performs FIR processing based on the data D of all bands, but this is not limited to this. Instead, for example, the FIR filter processing unit 16 may perform FIR processing based on the data D of only a portion of the bands. This modification will be described in detail below.

[0066] 8 shows an example of the configuration of a signal processing device 1B according to this modification. The signal processing device 1B includes a band setting unit 21B, a band processing unit 24B, a band processing unit 25B, and an interpolation processing unit 27B.

[0067] The band setting unit 21B is configured to set the processing band in the FIR filter processing unit 16 based on, for example, an instruction from a user. However, this is not limitative, and the processing band may be set in advance depending on the application.

[0068] The band processing unit 24B is configured to generate a data set DS2B by extracting a plurality of data D relating to the processing band from the 2049 pieces of data D included in the frequency domain data set DS2 based on instructions from the band setting unit 21B.

[0069] The band processing unit 25B is configured to generate a filter coefficient data set DFB by extracting a plurality of data D relating to the processing band from the 2049 pieces of data D included in the frequency domain filter coefficient data set DF based on instructions from the band setting unit 21B.

[0070] The FIR filter processing unit 16B is configured to generate a data set DS3B by performing FIR filtering on the data set DS2B using the filter coefficient data set DFB. The data set DS2B includes a plurality of data D related to the processing band, and the filter coefficient data set DFB includes a plurality of data D related to the processing band, so the data set DS3B also includes a plurality of data D related to the processing band.

[0071] The interpolation processing unit 27B is configured to generate a data set DS3 including 2049 pieces of data D by performing interpolation processing based on a data set DS3B including a plurality of data D related to the processing band.

[0072] 9 shows an example of processing in the signal processing device 1 B. In this example, the band setting unit 21 B sets the low frequency band of all bands as the processing band.

[0073] The band processing unit 24B generates a data set DS2B by extracting data D corresponding to a low frequency band from the frequency domain data set DS2. In this example, the band processing unit 24B generates the data set DS2B by extracting 43 pieces of data D on the low frequency side indicated by the portion W1 from the 2049 pieces of data D included in the data set DS2.

[0074] The band processing unit 25B generates the filter coefficient data set DFB by extracting data D corresponding to a low frequency band from the frequency domain filter coefficient data set DF. In this example, the band processing unit 25B generates the filter coefficient data set DFB by extracting 43 pieces of data D on the low frequency side indicated by a portion W2 from the 2049 pieces of data D included in the filter coefficient data set DF.

[0075] The interpolation processing unit 27B generates the data set DS3 by performing an interpolation process to interpolate the high-frequency side with zeros (0) based on the data set DS3B in the frequency domain. Specifically, in this example, the interpolation processing unit 27B arranges 43 pieces of data D included in the data set DS3B on the low-frequency side of the data set DS3, and arranges 2006 zeros (0) on the high-frequency side of the data set DS3.

[0076] Here, the band processing unit 24B corresponds to a specific example of a "first extraction circuit" in an embodiment of the present disclosure. The band processing unit 25B corresponds to a specific example of a "second extraction circuit" in an embodiment of the present disclosure. The complement processing unit 27B corresponds to a specific example of a "complement circuit" in an embodiment of the present disclosure.

[0077] As described above, the signal processing device 1B further includes a first extraction circuit (band processing section 24B) capable of correcting the plurality of second data sets (data set DS2) by extracting a plurality of data D arranged at predetermined data positions from the plurality of data D included in each of the plurality of second data sets (data set DS2) generated by the Fourier transform circuit (RFFT processing section 14); a second extraction circuit (band processing section 25B) capable of correcting the filter coefficient data set (filter coefficient data set DF) by extracting a plurality of data D arranged at predetermined data positions from the plurality of data D included in the filter coefficient data set DF; and an interpolation circuit (interpolation processing section 27B) capable of correcting the plurality of third data sets (data set DS3, DS3B) by interpolating each of the plurality of third data sets (data set DS3B) generated by the filter processing circuit (FIR filter processing section 16B) so that the number of data items in each of the plurality of third data sets (data set DS3B) becomes the same as the number of data items included in the plurality of second data sets (data set DS) generated by the Fourier transform circuit (RFFT processing section 14). As a result, the signal processing device 1B can set the processing band by selecting the data D to be used in the data set DS2 and the filter coefficient data set DF. As a result, the signal processing device 1B can improve real-time performance. That is, for example, in time-domain processing, if a low-frequency band is set as the processing band using a low-pass filter, delays will occur due to the convolution process of the low-pass filter. In this case, real-time performance may be impaired. On the other hand, the signal processing device 1B sets the processing band by selecting the data D to be used in the data set DS2 and the filter coefficient data set DF. As a result, the signal processing device 1B can perform processing without delay, thereby improving real-time performance.

[0078] Furthermore, by selecting the data D to be used from the data set DS2 and the filter coefficient data set DF in this way, the signal processing device 1B can perform calculations using only the data D related to the processing band, thereby reducing the amount of calculations in the signal processing device 1B.

[0079] [Other Modifications] Two or more of these modifications may be combined.

[0080] 2. Application Example to Adaptive Filter The technology according to the above embodiment can also be applied to an application using an adaptive filter. An application example to an adaptive filter will be described in detail below.

[0081] FIG. 10 shows an example configuration of a signal processing device 2 according to an application example. The signal processing device 2 is configured to perform AEC (Acoustic Echo Cancellation) processing. The signal processing device 2 can be applied to, for example, a speakerphone. A series of data D relating to the voice of a call partner is supplied to the signal processing device 2 as a signal Sin. The signal processing device 2 includes a DA conversion unit 31, a speaker 32, a microphone 33, an AD conversion unit 34, a data set generation unit 43, an RFFT processing unit 44, an FIR filter processing unit 46, an IRFFT processing unit 47, a data combination unit 48, a subtraction unit 51, a data set generation unit 52, an RFFT processing unit 53, a complex conjugate transformation unit 54, a multiplication unit 55, an IRFFT processing unit 56, an arithmetic unit 57, an RFFT processing unit 58, and a filter coefficient update unit 59.

[0082] The DA conversion unit 31 performs DA conversion based on the signal Sin to generate an analog signal. The speaker 32 converts the analog signal supplied from the DA conversion unit 31 into sound. A portion of the sound output from the speaker 32 is input to the microphone 33. The microphone 33 converts the sound into an analog signal, which is an electrical signal. The AD conversion unit 34 performs AD conversion based on the analog signal supplied from the microphone 33 to generate a signal S34.

[0083] The data set generation unit 43, RFFT processing unit 44, FIR filter processing unit 46, IRFFT processing unit 47, and data combination unit 48 correspond to the data set generation unit 13, RFFT processing unit 14, FIR filter processing unit 16, IRFFT processing unit 17, and data combination unit 18 in the above embodiment, respectively. The data combination unit 48 generates a signal S48 including a series of data D.

[0084] The subtraction unit 51 generates a signal S51 by subtracting the data D contained in the signal S48 from the data D contained in the signal S34. The data set generation unit 52 generates a data set DS11 based on the series of data D contained in the signal S51.

[0085] 11 shows an example of the operation of the data set generation unit 52. The data set generation unit 52 generates a data set DS11 each time 32 pieces of data D are supplied. The data set DS11 includes 4096 pieces of data D. The data set generation unit 52 generates the data set DS11 including 32 pieces of data D extracted from the series of data D included in the signal S51 and 4064 zeros (0).

[0086] The RFFT processing unit 53 performs RFFT processing on the data set DS11 to generate a data set DS12 including 2049 pieces of data D. The complex conjugate transform unit 54 performs complex conjugate transform on the data set DS2 to generate a data set DS13 including 2049 pieces of data D. The multiplication unit 55 performs multiplication processing on the data sets DS12 and DS13 to generate a data set DS14. Specifically, the multiplication unit 55 multiplies the 2049 pieces of data D related to multiple frequencies included in the data set DS12 and the 2049 pieces of data D related to multiple frequencies included in the data set DS13 by two pieces of data D related to the same frequencies included in these two data sets to generate a data set DS14 including 2049 pieces of data D. The IRFFT processing unit 56 performs IRFFT processing on the data set DS14 to generate a data set DS15 including 4096 pieces of data D. The calculation unit 57 performs calculation processing to calculate gradient constraints based on the data set DS15, thereby generating a data set DS16 including 4096 pieces of data D. As shown in FIG. 12, the data set DS16 includes 4064 pieces of data D indicating filter coefficients and 43 zeros (0). This corresponds to the data set DS11 including 4064 zeros (0) and 32 pieces of data D extracted from the series of data D included in the signal S51, as shown in FIG. 11. The RFFT processing unit 58 performs RFFT processing based on the data set DS17, thereby generating a data set DS17 including 2049 pieces of data D. The filter coefficient update unit 59 performs update processing on the filter coefficient data set DF including 2049 pieces of data D, based on the data set DS17.

[0087] The dataset generation unit 52, RFFT processing unit 53, multiplication unit 55, IRFFT processing unit 56, and calculation unit 57 correspond to the dataset generation unit 13, RFFT processing unit 14, FIR filter processing unit 16, IRFFT processing unit 17, and data combination unit 18, respectively, in the above embodiment.

[0088] In the signal processing device 2, a portion of the sound output from the speaker 32 is input to the microphone 33, so that the signal S34 includes data D relating to the voice of the other party. In the signal processing device 2, a negative feedback operation is performed so that the data D included in the signal S48 becomes the same as the data D included in this signal S34. In other words, the signal S51 generated by the subtraction unit 51 corresponds to the error signal. In the signal processing device 2, such a negative feedback operation is performed, so that the filter coefficient data set DF is adaptively set.

[0089] The present invention has been described above by giving embodiments, modifications, and application examples, but the present invention is not limited to these embodiments, and various modifications are possible.

[0090] For example, in the above embodiment, the number of data D included in each of the data sets DS1 and DS4 (4096 in this example), the number of data D included in each of the data sets DS2 and DS3 and the filter coefficient data set DF (2049 in this example), and the number of data D (block size) extracted from the signal S12 and placed in the data set DS1 (32 in this example) are merely examples and can be set as appropriate.

[0091] The effects described in this specification are merely examples, and the effects of the present disclosure are not limited to the effects described in this specification. Therefore, other effects may be obtained with respect to the present disclosure.

[0092] Furthermore, the present disclosure may take the following aspects.

[0093] (1) A signal processing device comprising: a dataset generation circuit capable of sequentially generating a plurality of first datasets by extracting a first predetermined number of data items based on first time-series data while shifting the first predetermined number by a second predetermined number that is smaller than the first predetermined number; a Fourier transform circuit capable of generating a plurality of second datasets corresponding to the plurality of first datasets by performing a Fourier transform on each of the plurality of first datasets; a filter processing circuit capable of generating a plurality of third datasets corresponding to the plurality of second datasets by performing an FIR filter process on each of the plurality of second datasets using a filter coefficient dataset; an inverse Fourier transform circuit capable of generating a plurality of fourth datasets corresponding to the plurality of third datasets, each of which includes the first predetermined number of data items, by performing an inverse Fourier transform on each of the plurality of third datasets; and a data combining circuit capable of generating second time-series data corresponding to the first time-series data by combining the latest second predetermined number of data items in each of the plurality of fourth datasets. (2) The signal processing device according to (1), wherein the Fourier transform circuit is capable of performing the Fourier transform by performing RFFT processing, each of the plurality of second data sets includes a third predetermined number of data that is smaller than the first predetermined number, each of the plurality of third data sets includes the third predetermined number of data, and the inverse Fourier transform circuit is capable of performing the inverse Fourier transform by performing IRFFT processing.(3) The signal processing device according to (1) or (2), further comprising: a first extraction circuit capable of correcting the plurality of second data sets generated by the Fourier transform circuit by extracting a plurality of data items provided at predetermined data positions from among the plurality of data items included in each of the plurality of second data sets; a second extraction circuit capable of correcting the filter coefficient data set by extracting a plurality of data items provided at the predetermined data positions from among the plurality of data items included in the filter coefficient data set; and an interpolation circuit capable of correcting the plurality of third data sets generated by the filter processing circuit by interpolating each of the plurality of third data sets so that each of the plurality of third data sets generates the same number of data items as the plurality of second data sets generated by the Fourier transform circuit. (4) The signal processing device according to any of (1) to (3), further comprising a memory circuit that stores the filter coefficient data set. (5) The signal processing device according to any of (1) to (4), further comprising a generation circuit that is capable of generating the filter coefficient data set. (6) A signal processing method comprising: sequentially generating a plurality of first data sets by extracting a first predetermined number of data based on first time series data while shifting the first predetermined number by a second predetermined number that is smaller than the first predetermined number; performing a Fourier transform on each of the plurality of first data sets to generate a plurality of second data sets corresponding to the plurality of first data sets, respectively; performing an FIR filter process on each of the plurality of second data sets using a filter coefficient data set to generate a plurality of third data sets corresponding to the plurality of second data sets, respectively; performing an inverse Fourier transform on each of the plurality of third data sets to generate a plurality of fourth data sets corresponding to the plurality of third data sets, each fourth data set including the first predetermined number of data; and generating second time series data corresponding to the first time series data by combining the latest second predetermined number of data in each of the plurality of fourth data sets.(7) A non-transitory recording medium having recorded thereon software that causes a processor to perform the following operations: sequentially generating a plurality of first data sets by extracting a first predetermined number of data based on first time-series data while shifting the first predetermined number by a second predetermined number that is smaller than the first predetermined number; generating a plurality of second data sets corresponding to the plurality of first data sets by performing a Fourier transform on each of the plurality of first data sets; generating a plurality of third data sets corresponding to the plurality of second data sets by performing an FIR filter process on each of the plurality of second data sets using a filter coefficient dataset; generating a plurality of fourth data sets corresponding to the plurality of third data sets and each including the first predetermined number of data by performing an inverse Fourier transform on each of the plurality of third data sets; and generating second time-series data corresponding to the first time-series data by combining the latest second predetermined number of data in each of the plurality of fourth data sets.

Claims

1. A signal processing device comprising: a dataset generation circuit capable of sequentially generating a plurality of first datasets based on first time series data by extracting a first predetermined number of data while shifting the first predetermined number by a second predetermined number that is smaller than the first predetermined number; a Fourier transform circuit capable of generating a plurality of second datasets corresponding to the plurality of first datasets by performing a Fourier transform on each of the plurality of first datasets; a filter processing circuit capable of generating a plurality of third datasets corresponding to the plurality of second datasets by performing FIR filter processing on each of the plurality of second datasets using a filter coefficient dataset; an inverse Fourier transform circuit capable of generating a plurality of fourth datasets corresponding to the plurality of third datasets, each fourth dataset including the first predetermined number of data, by performing an inverse Fourier transform on each of the plurality of third datasets; and a data combining circuit capable of generating second time series data corresponding to the first time series data by combining the latest second predetermined number of data from each of the plurality of fourth datasets.

2. The signal processing device according to claim 1, wherein the Fourier transform circuit is capable of performing the Fourier transform by performing RFFT processing, each of the plurality of second data sets includes a third predetermined number of data that is smaller than the first predetermined number, each of the plurality of third data sets includes the third predetermined number of data, and the inverse Fourier transform circuit is capable of performing the inverse Fourier transform by performing IRFFT processing.

3. The signal processing device according to claim 1, further comprising: a first extraction circuit capable of correcting the plurality of second data sets generated by the Fourier transform circuit by extracting a plurality of data items provided at predetermined data positions from among the plurality of data items included in each of the plurality of second data sets; a second extraction circuit capable of correcting the filter coefficient data set by extracting a plurality of data items provided at predetermined data positions from among the plurality of data items included in the filter coefficient data set; and an interpolation circuit capable of correcting the plurality of third data sets generated by the filter processing circuit by interpolating each of the plurality of third data sets so that each of the plurality of third data sets has the same number of data items as that included in each of the plurality of second data sets generated by the Fourier transform circuit.

4. The signal processing device according to claim 1, further comprising a storage circuit for storing said filter coefficient data set.

5. The signal processing device according to claim 1, further comprising a generation circuit capable of generating the filter coefficient data set.

6. A signal processing method comprising: sequentially generating a plurality of first data sets by extracting a first predetermined number of data based on first time series data while shifting the first predetermined number by a second predetermined number that is smaller than the first predetermined number; generating a plurality of second data sets corresponding to the plurality of first data sets by performing a Fourier transform on each of the plurality of first data sets; generating a plurality of third data sets corresponding to the plurality of second data sets by performing an FIR filter process on each of the plurality of second data sets using a filter coefficient dataset; generating a plurality of fourth data sets corresponding to the plurality of third data sets and each including the first predetermined number of data by performing an inverse Fourier transform on each of the plurality of third data sets; and generating second time series data corresponding to the first time series data by combining the latest second predetermined number of data in each of the plurality of fourth data sets.

7. A non-transitory recording medium having recorded thereon software that causes a processor to perform the following operations: sequentially generating a plurality of first data sets by extracting a first predetermined number of data based on first time-series data while shifting the first predetermined number by a second predetermined number that is smaller than the first predetermined number; generating a plurality of second data sets corresponding to the plurality of first data sets by performing a Fourier transform on each of the plurality of first data sets; generating a plurality of third data sets corresponding to the plurality of second data sets by performing an FIR filter process on each of the plurality of second data sets using a filter coefficient dataset; generating a plurality of fourth data sets corresponding to the plurality of third data sets and each including the first predetermined number of data by performing an inverse Fourier transform on each of the plurality of third data sets; and generating second time-series data corresponding to the first time-series data by combining the latest second predetermined number of data in each of the plurality of fourth data sets.

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