Display driving circuit and display driving method for display panel, and display apparatus

Abstract

A display driving circuit and display driving method for a display panel, and a display apparatus. In the display driving circuit (00), the duration in which a gating control signal transmitted by a display driver (03) to a gating circuit (02) is at a first level is less than the duration in which a source driving signal is transmitted to a pixel, and the time period in which the transmitted gating control signal is at the first level is within the time period in which the source driving signal is transmitted, that is, the display driver (03) at least can transmit the gating control signal of the first level to the gating circuit (2), so that the source driving signal is transmitted to the pixel while or before a gating unit (021) in the gating circuit (02) controls a respective shift register unit (011) and the connected pixel to be communicated with each other. Thus, a load in the display panel can be prevented from varying with the on-off of the source driving signal, thereby solving the problem of luminance difference at the boundary between a high-refresh-rate display zone and a low-refresh-rate display zone so as to ensure a better display effect of the display panel.

Description

Display panel display driving circuit and display driving method, display device Technical Field

[0001] This application relates to the field of display technology, and in particular to a display driving circuit and display driving method for a display panel, and a display device. Background Technology

[0002] With the development of display technology and users' pursuit of power efficiency, the display area of ​​the display panel is divided into multiple display zones, and different refresh rates can be used for different display zones.

[0003] However, due to factors such as the drive signal, there are brightness differences at the boundaries of two adjacent display zones with different refresh rates. For example, uneven bright white bars (mura) are prone to appear at the boundaries between high-frequency refresh display zones and low-frequency refresh display zones, resulting in poor display effect of the display panel.

[0004] Summary of the Invention

[0005] A display driving circuit, a display driving method, and a display device for a display panel are provided. The technical solution is as follows:

[0006] On one hand, a display driving circuit for a display panel is provided. The display panel includes a display area and a plurality of pixels located in the display area and arranged in an array. The display area includes at least two display partitions. The display driving circuit includes a gate driving circuit, a gating circuit, and a display driver. The gate driving circuit includes a plurality of cascaded shift register units. The gating circuit includes a plurality of gating units. The shift register units are connected to at least one row of pixels through corresponding gating units. The display driver is connected to the gating circuit and the plurality of pixels respectively.

[0007] The display driver is used to: receive refresh area information of a frame, and based on the refresh area information, transmit source drive signals to multiple pixels in the refresh display partition indicated by the refresh area information, and transmit gating control signals to the gating circuit.

[0008] The gating unit in the gating circuit is used to: control the corresponding shift register unit to be connected to at least one row of pixels in response to a gating control signal of the first level, and control the corresponding shift register unit to be disconnected from at least one row of pixels in response to a gating control signal of the second level.

[0009] The shift register unit in the gate driving circuit is used to: transmit a gate driving signal to the at least one row of pixels when it is turned on with the connected at least one row of pixels, so that the at least one row of pixels emits light based on the gate driving signal and the source driving signal;

[0010] Furthermore, the gating control signal and the source driving signal transmitted by the display driver satisfy the target conditions: the duration of the gating control signal at the first level is less than the transmission duration of the source driving signal, and the period of the gating control signal at the first level is within the transmission period of the source driving signal.

[0011] Optionally, in the target condition, the transition edge of the gating control signal from the second level to the first level coincides with the start transition edge of the source drive signal.

[0012] Optionally, in the target condition, the transition edge of the gating control signal from the second level to the first level is located after the start transition edge of the source drive signal.

[0013] Optionally, in the target condition, the transition edge of the gating control signal from the first level to the second level is located before the end transition edge of the source drive signal.

[0014] Optionally, the distance between the transition edge of the gating control signal from the first level to the second level and the end transition edge of the source driving signal is greater than or equal to the duration of the end transition edge of the source driving signal.

[0015] Optionally, the display driver is configured to: adjust another non-target signal among the transmitted gating control signal and the source driving signal based on a target signal among the transmitted gating control signal and the source driving signal, so that the transmitted gating control signal and the source driving signal satisfy the target condition.

[0016] Optionally, the display driver is configured to: determine the partition position based on the refresh area information, and determine the signal that matches the partition position among the gating control signal and the source drive signal as the target signal.

[0017] On the other hand, a display driving method for a display panel is provided, applied in a display driver included in the display driving circuit of the display panel. The display panel includes a display area and a plurality of pixels located in the display area and arranged in an array. The display area includes at least two display partitions. The display driving circuit further includes a gate driving circuit and a gating circuit. The gate driving circuit includes a plurality of cascaded shift register units. The gating circuit includes a plurality of gating units. The shift register units are connected to at least one row of pixels through corresponding gating units. The display driver is connected to the gating circuit and the plurality of pixels respectively. The method includes:

[0018] Receive refresh area information for one frame of video;

[0019] Based on the refresh area information, source drive signals are transmitted to multiple pixels in the screen refresh display partition indicated by the refresh area information.

[0020] Based on the refresh area information, a gating control signal is transmitted to the gating circuit;

[0021] Wherein, for the gating unit in the gating circuit, the gating control signal is a first level indicating that the gating unit controls the corresponding shift register unit to conduct with at least one row of connected pixels, so that the shift register unit transmits a gate driving signal to the at least one row of pixels, and the at least one row of pixels is used to emit light based on the gate driving signal and the source driving signal; the gating control signal is a second level indicating that the gating unit controls the corresponding shift register unit to disconnect from the at least one row of connected pixels.

[0022] Furthermore, the gating control signal and the source driving signal transmitted by the display driver satisfy the target conditions: the duration of the gating control signal at the first level is less than the transmission duration of the source driving signal, and the period of the gating control signal at the first level is within the transmission period of the source driving signal.

[0023] Optionally, in the target condition, the transition edge of the gating control signal from the second level to the first level coincides with the start transition edge of the source drive signal.

[0024] Optionally, in the target condition, the transition edge of the gating control signal from the second level to the first level is located after the start transition edge of the source drive signal.

[0025] Optionally, in the target condition, the transition edge of the gating control signal from the first level to the second level is located before the end transition edge of the source drive signal.

[0026] Optionally, the distance between the transition edge of the gating control signal from the first level to the second level and the end transition edge of the source driving signal is greater than or equal to the duration of the end transition edge of the source driving signal.

[0027] Optionally, the method further includes:

[0028] Based on one of the transmitted gating control signal and the source driving signal as a target signal, the other non-target signal of the gating control signal and the source driving signal is adjusted so that the transmitted gating control signal and the source driving signal satisfy the target condition.

[0029] Optionally, the method further includes:

[0030] The partition position is determined based on the refresh area information, and the signal that matches the partition position in the gating control signal and the source drive signal is determined as the target signal.

[0031] In another aspect, a display device is provided, the display device comprising: a display panel, and a display driving circuit as described in the preceding aspect;

[0032] The display driving circuit is connected to the display panel and is used to drive the display panel to display. Attached Figure Description

[0033] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0034] Figure 1 is a schematic diagram of a display panel and its display driving circuit provided in an embodiment of this application;

[0035] Figure 2 is a schematic diagram of the circuit structure of a pixel provided in an embodiment of this application;

[0036] Figure 3 is a schematic diagram of signal timing in a related art provided in an embodiment of this application;

[0037] Figure 4 is a schematic diagram of the signal timing provided by a display driver according to an embodiment of this application;

[0038] Figure 5 is a schematic diagram of the signal timing provided by another display driver according to an embodiment of this application;

[0039] Figure 6 is a schematic diagram of the signal timing provided by another display driver according to an embodiment of this application;

[0040] Figure 7 is a flowchart illustrating a display driving method for a display panel according to an embodiment of this application;

[0041] Figure 8 is a schematic diagram of the structure of a display device provided in an embodiment of this application. Detailed Implementation

[0042] To make the objectives, technical solutions, and advantages of this application clearer, the embodiments of this application will be described in further detail below with reference to the accompanying drawings.

[0043] It is understood that the transistors used in all embodiments of this application can be thin-film transistors, field-effect transistors, or other devices with similar characteristics. Based on their function in the circuit, the transistors used in the embodiments of this application are mainly switching transistors. Since the source and drain of the switching transistors used here are symmetrical, their source and drain are interchangeable. In the embodiments of this application, the source is referred to as the first electrode, and the drain as the second electrode. According to the configuration shown in the accompanying drawings, the middle terminal of the transistor is designated as the control electrode, also known as the gate; the signal input terminal is the source; and the signal output terminal is the drain. Furthermore, the switching transistors used in the embodiments of this application can include either P-type or N-type switching transistors. A P-type switching transistor conducts when the gate is low and is cut off when the gate is high; an N-type switching transistor conducts when the gate is high and is cut off when the gate is low. In addition, multiple signals in various embodiments of this application correspond to a first level and a second level. The first level and the second level only represent that the potential of the signal has two states; they do not represent that the first level or the second level has a specific value throughout the text.

[0044] For display panels, such as low-temperature poly-silicon oxide (LTPO) display panels, this application provides a display driving circuit that can solve the problem of brightness differences at the boundary of two adjacent display zones with different refresh rates, ensuring better display performance. It is understood that an LTPO display panel is a display panel fabricated using both low-temperature polycrystalline silicon (LTPS) and oxide materials, combining the advantages of both. Of course, the display panel provided in this application is not limited to LTPO display panels; it can also be applied to LTPS display panels. Here, "material" refers to the material of the active layer included in the pixel circuitry of the display panel.

[0045] As shown in Figure 1, the display panel 10 includes a display area AA and a plurality of pixels P1 arranged in an array within the display area AA. The display area AA includes at least two display partitions. For example, the display area AA shown in Figure 1 includes two display partitions, 1 and 2.

[0046] The display driving circuit 00 includes a gate driving circuit 01, a gating circuit 02, and a display driver 03. The gate driving circuit 01 includes a plurality of cascaded shift register units 011, and the gating circuit 02 includes a plurality of gating units 021. Each shift register unit 011 is connected to at least one row of pixels P1 through a corresponding gating unit 021. The display driver 03 is connected to both the gating circuit 02 and the plurality of pixels P1. For example, in some embodiments, referring to FIG1, each shift register unit 011 can be connected to at least one row of pixels P1 through a corresponding gating unit 021. That is, the plurality of gating units 021 can correspond one-to-one with the plurality of shift register units 011.

[0047] Optionally, the display panel may further include a peripheral area (not shown in the figure) surrounding at least part of the display area AA. Both the gate driving circuit 01 and the gating circuit 02 can be located in the peripheral area, meaning both can be disposed on the display panel 10, which facilitates a narrow bezel design. Correspondingly, the gate driving circuit 01 is also called a circuit using gate driver on array (GOA) technology, or a GOA circuit, and the shift register unit is also called a GOA unit. Of course, in some other embodiments, the gate driving circuit 01 and / or the gating circuit 02 can also be disposed independently of the display panel 10. The display driver 03 can also be called a driver integrated circuit (DIC).

[0048] Optionally, based on Figure 1, Figure 2 shows a schematic diagram of the circuit structure of pixel P1. As shown in Figure 2, the pixel circuit in pixel P1 provided in this embodiment can be an 8T1C circuit (i.e., including 8 transistors T1 to T8 and 1 capacitor C1).

[0049] In this transistor, the gate of transistor T1 can be connected to the reset terminal P-Reset, the first terminal of transistor T1 can be connected to the first initial terminal Vinit1, and the second terminal of transistor T1 can be connected to node N3. Transistor T1 can be turned on when the reset signal provided by the reset terminal P-Reset is at an active level, causing the first initial terminal Vinit1 to conduct with node N3, thereby allowing the first initial signal provided by Vinit1 to be transmitted to node N3, thus resetting node N3. Transistor T1 can be turned off when the reset signal provided by the reset terminal P-Reset is at an inactive level, causing the first initial terminal Vinit1 to disconnect from node N3.

[0050] The gate of transistor T2 can be connected to the gate signal terminal Gate_N, the first terminal of transistor T2 can be connected to node N3, and the second terminal of transistor T2 can be connected to node N1. Transistor T2 can be turned on when the gate drive signal provided by the gate signal terminal Gate_N is at an active level, thus connecting nodes N1 and N3. Transistor T2 can be turned off when the gate drive signal provided by the gate signal terminal Gate_N is at an inactive level, thus disconnecting nodes N1 and N3.

[0051] The gate of transistor T3 can be connected to node N1, the first terminal of transistor T3 can be connected to node N2, and the second terminal of transistor T1 can be connected to node N3. Transistor T3 can be used to transmit a light-emitting drive signal to node N3 based on the voltage levels of node N1 and node N2. Transistor T3 can also be called a driving transistor.

[0052] The gate of transistor T4 can be connected to the gate signal terminal Gate_P, the first terminal of transistor T4 can be connected to the data signal terminal Vdata, and the second terminal of transistor T4 can be connected to node N2. Transistor T4 can be turned on when the gate drive signal provided by the gate signal terminal Gate_P is at an active level, thus connecting the data signal terminal Vdata to node N2 and allowing the data signal provided by Vdata to be transmitted to node N2. With transistors T2 and T3 both on, the data signal transmitted to node N2 can be further written to node N1 via transistors T3 and T2. Transistor T4 can be turned off when the gate drive signal provided by the gate signal terminal Gate_P is at an inactive level, thus disconnecting the data signal terminal Vdata from node N2.

[0053] The gate of transistor T5 can be connected to the light-emitting control terminal EM, the first terminal of transistor T5 can be connected to the driving power supply terminal VDD, and the second terminal of transistor T5 can be connected to node N2. Transistor T5 can be turned on when the light-emitting control signal provided by the light-emitting control terminal EM is at an active level, thus connecting the driving power supply terminal VDD to node N2 and allowing the driving power signal provided by VDD to be transmitted to node N2. Transistor T5 can be turned off when the light-emitting control signal provided by the light-emitting control terminal EM is at an inactive level, thus disconnecting the driving power supply terminal VDD from node N2.

[0054] The gate of transistor T6 can be connected to the light-emitting control terminal EM, the first terminal of transistor T6 can be connected to node N3, and the second terminal of transistor T6 can be connected to the first terminal of light-emitting element L1. Transistor T6 can be turned on when the light-emitting control signal provided by the light-emitting control terminal EM is at an active level, causing node N3 to conduct with the first terminal of light-emitting element L1, thereby allowing the signal transmitted to node N3 (e.g., a light-emitting drive signal) to be transmitted to the first terminal of light-emitting element L1. Transistor T6 can be turned off when the light-emitting control signal provided by the light-emitting control terminal EM is at an inactive level, causing node N3 to disconnect from the first terminal of light-emitting element L1. Furthermore, the second terminal of light-emitting element L1 can also be connected to the pull-down power supply terminal VSS, allowing light-emitting element L1 to emit light under the voltage difference between the signal received at its first terminal and the pull-down power supply signal provided by the pull-down power supply terminal VSS connected to its second terminal.

[0055] Optionally, in the first and second electrodes of the light-emitting element L1, one electrode can be an anode and the other can be a cathode. For example, referring to Figure 2, the first electrode is shown as an anode and the second electrode as a cathode.

[0056] The gate of transistor T7 can be connected to the reset terminal H-Reset, the first terminal of transistor T7 can be connected to the second initial terminal Vinit2, and the second terminal of transistor T7 can be connected to the first terminal of light-emitting element L1. Transistor T7 can be turned on when the reset signal provided by the reset terminal H-Reset is at an active level, causing the second initial terminal Vinit2 to conduct with the first terminal of light-emitting element L1. This allows the second initial signal provided by Vinit2 to be transmitted to the first terminal of light-emitting element L1, thus resetting the first terminal of light-emitting element L1. Transistor T7 can be turned off when the reset signal provided by the reset terminal H-Reset is at an inactive level, causing the second initial terminal Vinit2 to disconnect from the first terminal of light-emitting element L1.

[0057] The gate of transistor T8 can be connected to the reset terminal H-Reset, the first terminal of transistor T8 can be connected to the third initial terminal Vinit3, and the second terminal of transistor T8 can be connected to node N2. Transistor T8 can be turned on when the reset signal provided by the reset terminal H-Reset is at an active level, causing the third initial terminal Vinit3 to conduct with node N2, thus allowing the third initial signal provided by Vinit3 to be transmitted to node N2, achieving a reset of node N2. Transistor T8 can be turned off when the reset signal provided by the reset terminal H-Reset is at an inactive level, causing the third initial terminal Vinit3 to disconnect from node N2. Due to the adjustment of the third initial terminal Vinit3, better frequency switching and flickering effects can be achieved.

[0058] Capacitor C1 can be connected between node N1 and the drive power supply terminal VDD. Capacitor C1 can be used to store the signal at node N1 based on the drive power signal provided by the drive power supply terminal VDD.

[0059] Furthermore, transistor T2, connected to the gate signal terminal Gate_N, can be an N-type transistor made of oxide material; transistor T4, connected to the gate signal terminal Gate_P, can be a P-type transistor made of low-temperature polysilicon (LTPS). Thus, the display panel can be called an LTPO panel. It is understood that the transistor material here refers to the material of the active layer included in the transistor. Also, for N-type transistors, the active level can be high relative to the inactive level; while for P-type transistors, the active level can be low relative to the inactive level. Of course, the pixel circuit is not limited to the 8T1C structure shown in Figure 2. For example, in some embodiments, the pixel circuit can also be a 7T1C structure.

[0060] Referring again to Figure 1, in this embodiment of the application, the display driver 03 is used to: receive refresh area information of a frame, and based on the refresh area information, transmit source drive signals S1 to multiple pixels P1 in the refresh display partition indicated by the refresh area information, and transmit gating control signals to the gating circuit 02, that is, gate enable (GE) signals.

[0061] Understandably, the display driver 03 can also be used to keep multiple pixels P1 in the display partition from transmitting source drive signals S1 to the screen indicating the refresh area information. Not transmitting source drive signals S1 means that the source drive signals are in a high-impedance state (Hiz). Furthermore, the source drive signal S1 can refer to the data signal described above. That is, the display driver 03 can be connected to the data signal terminal Vdata.

[0062] Optionally, the display driver 03 can also establish a connection with a host access point (AP) and receive refresh zone information transmitted by the AP. Here, the display driver 03 may receive a 2B command from the AP, which is a command defining the termination line. The display driver 03 can determine the screen refresh display zone and the screen hold display zone by recognizing the 2B command, and generate a first-level gating control signal GE for the screen refresh display zone and a second-level gating control signal GE for the screen hold display zone.

[0063] The gating unit 021 in the gating circuit 02 is used to: control the corresponding shift register unit 011 to be connected to at least one row of pixels P1 in response to the gating control signal GE at the first level; and control the corresponding shift register unit 011 to be disconnected from at least one row of pixels in response to the gating control signal at the second level. Accordingly, the first level can also be called the effective level of the active polarity state, and the second level can also be called the invalid level of the initial polarity state.

[0064] For example, the first level can be high relative to the second level, or the first level can be low relative to the second level. A high level can be represented by binary "1", and a low level can be represented by binary "0". This application embodiment uses the gating control signal GE with a high level (1) and a low level (0) as an example for illustration. Correspondingly, the transition edge from the first level (1) to the second level (0) is also called a rising edge, and the transition edge from the second level (0) to the first level (1) is also called a falling edge.

[0065] The shift register unit 011 in the gate driving circuit 01 is used to: transmit a gate driving signal G1 to at least one row of pixels P1 when the connection to at least one row of pixels P1 is turned on, so that at least one row of pixels P1 emits light based on the gate driving signal G1 and the source driving signal S1. Here, the gate driving signal G1 may include at least one of a gate driving signal Nout provided to the N-type transistor in pixel P1 and a gate driving signal Gout provided to the P-type transistor in pixel P1.

[0066] That is, in this embodiment, the display driver 03 can provide a first-level or second-level gating control signal GE to the gating unit 021 based on the refresh area information, so that the gating unit 021 controls the corresponding shift register unit 011 to be connected or disconnected from at least one row of pixels P1, that is, controls the shift register unit 011 to enter or not enter pixel P1, thereby controlling data refresh. Furthermore, for the screen refresh display zone, the display driver 03 can provide a first-level gating control signal GE, so that the gating unit 021 controls the corresponding shift register unit 011 to be connected to at least one row of pixels P1, thereby controlling the shift register unit 011 to enter pixel P1, lighting up pixel P1 to complete the refresh.

[0067] In some embodiments, the gating control signal GE and the source drive signal S1 transmitted by the display driver 03 are shown in FIG3. FIG3 also schematically shows the gate drive signals Nout and Gout transmitted by the gate drive circuit 01.

[0068] Referring to Figure 3, it can be seen that the rising edge of the gating control signal GE from the second level 0 to the first level 1 is aligned with the rising edge of the gate drive signal Nout. The time interval from when the gate drive signal Nout is pulled high to when the gate drive signal Gout is pulled low is a. The starting edge of the source drive signal S1 (e.g., the rising edge that starts transmission) is located a time after the rising edge of the gating control signal GE. That is, the display driver 03 starts transmitting the source drive signal S1 only after the time a of outputting the gating control signal GE at the first level 1. Furthermore, the gating control signal GE of the first level 1 is generally the same width as the source drive signal S1 (meaning the pulse width is equal). Therefore, referring to Figure 3, it can be seen that the end transition edge of the source drive signal S1 (e.g., the falling transition edge that stops transmission) is located after the duration b of the transition edge (i.e., the falling transition edge) of the gating control signal GE from the first level 1 to the second level 0. b is the difference between the width of the gating control signal GE at the first level 1 and the duration a. That is, the display driver 03 stops transmitting the source drive signal S1 only after the duration b of the control signal GE transitioning from the first level 1 to the second level 0.

[0069] Based on the signal timing shown in Figure 3, analysis reveals that when switching from high-frequency refresh to low-frequency refresh, the display driver 03, after the control gating signal GE changes from the second level 0 to the first level 1, causes the gating unit 021 to control the shift register unit 011 to conduct with pixel P1 for a period of time (e.g., duration a), before transmitting the source drive signal S1 to pixel P1. That is, during the duration a during which the shift register unit 011 and pixel P1 are conducted, the source drive signal S1 is not transmitted to pixel P1. Therefore, the load on the display panel changes under the influence of the switching of the source drive signal S1, resulting in a loading difference. This leads to a brighter mura phenomenon at the boundary between the high-frequency refresh display zone and the low-frequency refresh display zone, i.e., a bright white bar appears, and the width of the bright white bar is generally equal to the length of duration a.

[0070] Furthermore, when switching from low-frequency refresh to high-frequency refresh, as shown in Figure 3, when the display driver 03 stops transmitting the source drive signal S1, the source drive signal S1 decreases slowly in a steep slope rather than instantaneously, meaning that the source drive signal S1 exhibits a natural discharge cutoff phenomenon. Therefore, although the display driver 03 has controlled the gating control signal GE to jump from the first level 1 to the second level 0, causing the gating unit 021 to control the shift register unit 011 to disconnect from the pixel P1, the presence of the source drive signal S1 still causes a change in loading, i.e., a loading difference. This results in a darkened mura appearing at the boundary between the low-frequency refresh display zone and the high-frequency refresh display zone, i.e., a dark bar appears, and the width of the dark bar is generally equal to the length of the duration b.

[0071] Here, a or b is generally about 2 to 3 millimeters (mm), and a can be equal to b. Switching from high frequency to low frequency and then back to high frequency can correspond to a scenario where the display area AA includes three display zones.

[0072] In this embodiment of the application, as shown in FIG4, the gating control signal GE and the source drive signal S1 transmitted by the display driver 03 can satisfy the target condition:

[0073] The duration of the gating control signal GE at the first level 1 is less than the transmission duration of the source drive signal S1, and the period during which the gating control signal GE is at the first level 1 falls within the transmission period of the source drive signal S1. That is, the display driver 03 can transmit the source drive signal S1 simultaneously with or before the gating control signal GE transitions from the second level 0 to the first level 1, rather than transmitting the source drive signal S1 only after the gating control signal GE has already transitioned from the second level 0 to the first level 1.

[0074] Based on Figure 4, it can be ensured that when the display driver 03 provides a first-level gating control signal GE to the gating unit 021, causing the gating unit 021 to control the corresponding shift register unit 011 to be connected to at least one row of pixels P1, the source drive signal S1 has already been transmitted to at least one row of pixels P1, and will not have started transmitting the source drive signal S1 before it has started. In this way, the loading in the display panel can be prevented from changing due to the switching of the source drive signal S1, that is, loading difference can be avoided, and thus the white bar mura problem that appears at the boundary between the high-frequency refresh display zone and the low-frequency refresh display zone due to loading difference can be solved when switching from high-frequency refresh to low-frequency refresh.

[0075] Similarly, if the display driver 03 stops transmitting the source drive signal S1 after the control gating signal GE changes from the first level to the second level, that is, after the gating unit 021 controls the corresponding shift register unit 011 to disconnect from at least one row of pixels P1 for a certain period of time before stopping the supply of the source drive signal S1 to at least one row of pixels P1, it can also avoid the loading in the display panel changing due to the natural discharge cutoff phenomenon of the source drive signal S1, i.e., avoid loading differences. This can solve the problem of dark bars mura at the boundary between the low-frequency refresh display zone and the high-frequency refresh display zone caused by loading differences when switching from low-frequency refresh to high-frequency refresh. The certain period of time is at least equal to the time from when the display driver 03 stops transmitting the source drive signal S1 to when the source drive signal S1 completely ends (e.g., the falling edge duration of the source drive signal S1).

[0076] In summary, this application provides a display driving circuit for a display panel. In this display driving circuit, the duration of the gating control signal transmitted by the display driver to the gating circuit at a first level is less than the transmission duration of the source driving signal transmitted to the pixel, and the period during which the transmitted gating control signal is at the first level falls within the transmission period of the source driving signal. That is, the display driver can transmit the source driving signal to the pixel at least simultaneously with or before transmitting a first-level gating control signal to the gating circuit, causing the gating unit in the gating circuit to control the corresponding shift register unit to conduct with the connected pixel. This avoids changes in the load of the display panel due to the switching of the source driving signal, thereby solving the brightness difference problem at the boundary between high-frequency refresh display zones and low-frequency refresh display zones, ensuring better display performance of the display panel.

[0077] Optionally, in one embodiment, as shown in FIG4, in the target condition, the transition edge (i.e., rising edge) of the gating control signal GE from the second level 0 to the first level 1 can coincide with the starting transition edge (e.g., rising edge) of the source drive signal S1.

[0078] It is understood that, based on this embodiment, since the duration of the gating control signal GE at the first level 1 is less than the transmission duration of the source drive signal S1, it can be known that, as shown in Figure 4, the transition edge (i.e., the falling edge) of the gating control signal GE from the first level 1 to the second level 0 can be located before the end transition edge (e.g., the falling edge) of the source drive signal S1.

[0079] Alternatively, in another embodiment, as shown in FIG5, in the target condition, the rising edge (i.e., the transition edge of the gating control signal GE from the second level 0 to the first level 1) can be located after the starting edge (e.g., the rising edge) of the source drive signal S1. For example, referring to FIG5, the rising edge of the gating control signal GE can be located after the duration A of the starting edge of the source drive signal S1. Of course, the shorter the duration A, the better, so as to reduce the operating power consumption of the display driver 03. For example, A can be less than 12H, where H can refer to a unit of one row.

[0080] It is understood that, based on this embodiment, since the duration of the gating control signal GE at the first level 1 is less than the transmission duration of the source drive signal S1, and the period during which the gating control signal GE is at the first level 1 is within the transmission period of the source drive signal S1, it can be known that in one implementation, as shown in Figure 5, the transition edge (i.e., falling edge) of the gating control signal GE from the first level 1 to the second level 0 can be located before the end transition edge (e.g., falling edge) of the source drive signal S1. Alternatively, in another implementation, the transition edge (e.g., falling edge) of the gating control signal GE from the first level 1 to the second level 0 can coincide exactly with the end transition edge (e.g., falling edge) of the source drive signal S1. Figure 5 shows that the transition edge of the gating control signal GE from the first level 1 to the second level 0 is located before the end transition edge of the source drive signal S1.

[0081] Based on the embodiments shown in Figures 4 and 5, the display driver 03 can transmit the source drive signal S1 to pixel P1 not only before or simultaneously with the control signal GE changing from the second level 0 to the first level 1, causing the gating unit 021 to control the corresponding shift register unit 011 to be connected with at least one row of pixels P1, but also after a period of time following the control signal GE changing from the first level 1 to the second level 0, causing the gating unit 021 to control the corresponding shift register unit 011 to be disconnected from at least one row of pixels P1. Therefore, it can not only solve the white bar mura problem that appears at the boundary between the high-frequency refresh display partition and the low-frequency refresh display partition when switching from high-frequency refresh to low-frequency refresh, but also solve the dark bar mura problem that appears at the boundary between the low-frequency refresh display partition and the high-frequency refresh display partition when switching from low-frequency refresh to high-frequency refresh.

[0082] Optionally, as mentioned above, the distance between the transition edge of the gating control signal GE from the first level 1 to the second level 0 (i.e., the falling edge) and the end transition edge of the source drive signal S1 can be greater than or equal to the duration of the end transition edge of the source drive signal S1, that is, greater than or equal to the duration from when the display driver 03 stops transmitting the source drive signal S1 until the source drive signal S1 completely ends. This reliably avoids changes in the loading of the display panel due to the natural discharge cutoff of the source drive signal S1, thus avoiding loading differences and reliably solving the dark bar mura problem when switching from low-frequency refresh to high-frequency refresh, ensuring better display performance of the display panel.

[0083] Optionally, in this embodiment of the application, the display driver 03 can also be used to: adjust another non-target signal in the gating control signal GE and the source drive signal S1 based on a target signal in the transmitted gating control signal GE and the source drive signal S1, so that the transmitted gating control signal GE and the source drive signal S1 satisfy the target condition.

[0084] That is, one of the target signals, the gating control signal GE and the source drive signal S1, can be fixed, and the display driver 03 can flexibly adjust the other signal between the gating control signal GE and the source drive signal S1, thereby ensuring that the gating control signal GE and the source drive signal S1 meet the above conditions. In other words, as can be seen from Figures 5 and 6, in this embodiment, both the gating control signal GE and the source drive signal S1 are flexibly adjustable. The changes in "-" and "+" in the figures illustrate the flexible adjustment of the signals.

[0085] It is understandable that Figure 5 shows one timing sequence with the target signal as the gating control signal GE and the adjusted non-target signal as the source drive signal S1. That is, referring to Figure 5, the source drive signal S1 can be flexibly adjusted externally to the gating control signal GE. Figure 6 shows another timing sequence with the target signal as the source drive signal S1 and the adjusted non-target signal as the gating control signal GE. That is, referring to Figure 6, the gating control signal GE can be flexibly adjusted internally to the source drive signal S1.

[0086] For an embodiment of regulating the source drive signal S1:

[0087] In one embodiment, referring to FIG4, the display driver 03 can be used to: simultaneously control the gating control signal GE to change from the second level 0 to the first level 1, start transmitting the source drive signal S1, such that the start transition edge (e.g., rising transition edge) of the source drive signal S1 coincides with the transition edge (i.e., rising transition edge) of the gating control signal GE to change from the second level 0 to the first level 1, and correspondingly, the end transition edge (e.g., falling transition edge) of the source drive signal S1 can be located after the transition edge (i.e., falling transition edge) of the gating control signal GE to change from the first level 1 to the second level 0.

[0088] In another embodiment, referring to FIG5, the display driver 03 can be used to: begin transmitting the source drive signal S1 before a certain period of time before the control gating signal GE transitions from the second level 0 to the first level 1, such that the start transition edge (e.g., rising edge) of the source drive signal S1 is located before the transition edge (i.e., falling edge) of the control gating signal GE transitioning from the second level 0 to the first level 1. And the transmission of the source drive signal S1 can be stopped after a certain period of time after the control gating signal GE transitions from the first level 1 to the second level 0, such that the end transition edge (e.g., falling edge) of the source drive signal S1 is located after the transition edge (i.e., falling edge) of the control gating signal GE transitioning from the first level 1 to the second level 0.

[0089] Based on this, it can be understood that, for the embodiment of adjusting the source drive signal S1, it can be considered that the display driver 03 is configured to transmit the source drive signal S1 in advance and delay the end of transmitting the source drive signal S1. That is, as shown in Figure 5, the adjustment source drive signal S1 is shifted forward relative to the rising edge of the gating control signal GE, and the adjustment source drive signal S1 is shifted backward relative to the falling edge of the gating control signal GE.

[0090] For an example of adjusting the gating control signal GE:

[0091] In one embodiment, referring to FIG4, the display driver 03 can be used to: control the gating control signal GE to jump from the second level 0 to the first level 1 at the same time as the source drive signal S1 is started to be transmitted, such that the transition edge of the gating control signal GE from the second level 0 to the first level 1 (i.e., rising transition edge) coincides with the start transition edge (e.g., rising transition edge) of the source drive signal S1, and correspondingly, the transition edge of the gating control signal GE from the first level 1 to the second level 0 (i.e., falling transition edge) is located before the end transition edge (e.g., falling transition edge) of the source drive signal S1.

[0092] In another embodiment, referring to FIG6, the display driver 03 can be used to: after a certain period of time has elapsed since the start of transmission of the source drive signal S1, control the gating control signal GE to transition from a second level 0 to a first level 1, such that the transition edge (i.e., rising edge) of the gating control signal GE from the second level 0 to the first level 1 is located after the start transition edge (e.g., rising edge) of the source drive signal S1. Furthermore, the gating control signal GE can also be controlled to transition from the first level 1 to the second level 0 before the period of time has elapsed since the stop of transmission of the source drive signal S1, such that the transition edge (i.e., falling edge) of the gating control signal GE from the first level 1 to the second level 0 is located before the end transition edge (e.g., falling edge) of the source drive signal S1.

[0093] Based on this, it can be understood that, for the embodiment of adjusting the gating control signal GE, it can be considered that the gating control signal GE is set inside the source drive signal S1. That is, as shown in Figure 6, the gating control signal GE is shifted backward relative to the rising edge of the source drive signal S1, and the gating control signal GE is shifted forward relative to the falling edge of the source drive signal S1.

[0094] Optionally, in some embodiments, whether adjusting the source drive signal S1 or the gating control signal GE, the forward shift duration of the transition edge can be equal to the backward shift duration of the transition edge. Of course, this is merely illustrative. For example, in some other embodiments, the forward shift duration of the transition edge can be greater than or less than the backward shift duration of the transition edge.

[0095] It is also understandable that, as shown in Figure 5, taking the starting edge of the source drive signal S1 as a rising edge and the ending edge of the source drive signal S1 as a falling edge as an example, in the embodiment of adjusting the source drive signal S1, starting the transmission of the source drive signal S1 can also mean that the source drive signal S1 starts (start, S) switching (shift, S) to a high level (High, H), i.e., SSH; ending the transmission of the source drive signal S1 can also mean that the source drive signal S1 ends (end) switching to a high level, i.e., ESH. Similarly, as shown in Figure 6, taking the first level of the gating control signal GE as a high level 1 and the second level as a low level 0 as an example, in the embodiment of adjusting the gating control signal GE, controlling the gating control signal GE to switch from the second level 0 to the first level 1 can also mean controlling the gating control signal GE to switch to SSH; controlling the gating control signal GE to switch from the first level 1 to the second level 0 can also mean controlling the gating control signal GE to switch to ESH.

[0096] It is also understandable that, regardless of whether the source drive signal S1 or the gating control signal GE is adjusted, the transmission duration of the source drive signal S1 is greater than the duration of the gating control signal GE at the first level. Accordingly, compared with the gating control signal GE, the host can provide more data to the display driver 03 so that the display driver 03 can generate the required source drive signal.

[0097] For example, assuming, as shown in Figure 5, the transition edge of the gating control signal GE from the second level 0 to the first level 1 is equidistant from the start transition edge of the source drive signal S1 by a duration of A, and the transition edge of the gating control signal GE from the first level 1 to the second level 0 is equidistant from the end transition edge of the source drive signal S1 by a duration of B, then it can be understood that the host can provide A+B more data. In some embodiments, A and B can be equal. Alternatively, A can be greater than B. Or, A can be less than B.

[0098] Optionally, in this embodiment, the display driver 03 can be used to: determine the partition position based on refresh area information, and determine the signal in the gating control signal GE and the source drive signal S1 that matches the partition position as the target signal. That is, the display driver 03 can refer to one of the signals in the gating control signal GE and the source drive signal S1 that matches the partition position issued by the AP, and flexibly adjust another signal in the gating control signal GE and the source drive signal S1 that does not match the partition position issued by the AP.

[0099] It is understandable that "matching with partition location" can mean that after the display driver 03 determines the partition location based on the instructions transmitted from the host, it uses the signal determined by the partition location. For example, taking the strobe control signal GE as an example, "matching with partition location" means that after the display driver 03 determines the partition location, it will use the transmission control signal GE to refresh the partition based on that partition location, which is also called the two being bound together.

[0100] Optionally, referring to FIG6, it can also be seen that the display driver 03 described in this embodiment can also be used to generate a pulse width adjustable horizontal synchronization signal (Hysnc) to output a source drive signal S1 based on the horizontal synchronization signal Hysnc. Furthermore, in some embodiments, the display driver 03 can also be used to adjust a non-target signal, either a gating control signal GE or a source drive signal S1, with reference to the horizontal synchronization signal Hysnc. When the source drive signal S1 is adjusted with the gating control signal GE as the target signal, the adjustment accuracy for the source drive signal S1 can be the same as the adjustment accuracy for the horizontal synchronization signal Hysnc. However, when the gating control signal GE is adjusted with the source drive signal S1 as the target signal, the adjustment accuracy for the gating control signal GE can be less than the adjustment accuracy for the horizontal synchronization signal Hysnc.

[0101] Optionally, in some embodiments, when adjusting the gating control signal GE, firstly, the gating control signal GE can be coarsely adjusted according to the adjustment precision of the line synchronization signal Hysnc (e.g., 1H), and then finely adjusted a second time according to an adjustment precision less than that of the line synchronization signal Hysnc. During this fine adjustment, the gating control signal GE can be adjusted in units of 0.1 microseconds (μs). Of course, this is only an illustrative example.

[0102] It is understandable that, referring to Figure 6, taking the line synchronization signal Hysnc as an example, the adjustment precision of the signal can refer to the minimum precision of the adjustment signal moving to the left or right, that is, the length of "-" or "+".

[0103] In summary, this application provides a display driving circuit for a display panel. In this display driving circuit, the duration of the gating control signal transmitted by the display driver to the gating circuit at a first level is less than the transmission duration of the source driving signal transmitted to the pixel, and the period during which the transmitted gating control signal is at the first level falls within the transmission period of the source driving signal. That is, the display driver can transmit the source driving signal to the pixel at least simultaneously with or before transmitting a first-level gating control signal to the gating circuit, causing the gating unit in the gating circuit to control the corresponding shift register unit to conduct with the connected pixel. This avoids changes in the load of the display panel due to the switching of the source driving signal, thereby solving the brightness difference problem at the boundary between high-frequency refresh display zones and low-frequency refresh display zones, ensuring better display performance of the display panel.

[0104] This application embodiment also provides a display driving method for a display panel. This method is applied to the display driver 03 in the display driving circuit described above. Referring to FIG1, it can be seen that the display panel 10 may include a display area AA and a plurality of pixels P1 arranged in an array within the display area AA. The display area AA includes at least two display partitions. The display driving circuit 00 further includes a gate driving circuit 01 and a gating circuit 02. The gate driving circuit 01 includes a plurality of cascaded shift register units 011, and the gating circuit 02 includes a plurality of gating units 021. The shift register units 011 are connected to at least one row of pixels P1 through corresponding gating units 021. The display driver 03 is connected to the gating circuit 02 and the plurality of pixels P1 respectively. As shown in FIG7, the method includes:

[0105] Step 701: Receive refresh area information for one frame.

[0106] Optionally, the display driver 03 can receive refresh area information provided by the AP.

[0107] Step 702: Based on the refresh area information, transmit source drive signals to multiple pixels in the screen refresh display area indicated by the refresh area information.

[0108] The refresh area information can indicate the refresh display area that performs a screen refresh and the hold display area that does not perform a screen refresh. For the refresh display area, the display driver 03 can transmit the source drive signal S1 to it, and for the hold display area, the display driver 03 can stop transmitting the source drive signal S1 to it.

[0109] Step 703: Based on the refresh area information, transmit the gating control signal to the gating circuit.

[0110] Under the control of AP, display driver 03 can generate the gating control signal GE, and generate a first-level gating control signal GE for the screen refresh display zone, and a second-level gating control signal GE for the screen hold display zone.

[0111] For each gating unit 021 in the gating circuit 02, the gating control signal GE is a first level indicating that the gating unit 021 controls the corresponding shift register unit 011 to conduct with at least one row of pixels P1, so that the shift register unit 011 transmits the gate drive signal G1 to at least one row of pixels P1. At least one row of pixels P1 is used to emit light based on the gate drive signal G1 and the source drive signal S1. The gating control signal GE is a second level indicating that the gating unit controls the shift register unit 011 corresponding to 021 to disconnect from at least one row of pixels P1.

[0112] Furthermore, in this embodiment, the gating control signal GE and the source drive signal S1 transmitted by the display driver 03 can satisfy the following objective conditions: the duration of the gating control signal GE at the first level is less than the transmission duration of the source drive signal S1, and the period during which the gating control signal GE is at the first level is within the transmission period of the source drive signal S1. Thus, as described above, the brightness difference existing at the boundary of two adjacent display zones with different refresh rates can be resolved, ensuring better display performance of the LTPO display panel.

[0113] Optionally, in some embodiments, in the target condition, the transition edge of the gating control signal GE from the second level to the first level coincides with the start transition edge of the source drive signal S1. Accordingly, the transition edge of the gating control signal GE from the first level to the second level can be positioned before the end transition edge of the source drive signal S1.

[0114] Optionally, in other embodiments, in the target condition, the transition edge of the gating control signal GE from the second level to the first level can be located after the start transition edge of the source drive signal S1. Furthermore, the transition edge of the gating control signal GE from the first level to the second level can also be located before the end transition edge of the source drive signal S1.

[0115] Optionally, in some embodiments, the distance between the transition edge of the gating control signal GE from the first level 1 to the second level 0 (i.e., the falling transition edge) and the end transition edge of the source drive signal S1 can be greater than or equal to the duration of the end transition edge of the source drive signal S1.

[0116] Optionally, in some embodiments, the method may further include: adjusting another non-target signal among the transmitted gating control signal GE and source drive signal S1 based on a target signal, so that the transmitted gating control signal GE and source drive signal S1 satisfy the target condition. That is, the display driver 03 can flexibly adjust either the gating control signal GE or the source drive signal S1 to make the gating control signal GE and source drive signal S1 satisfy the above-mentioned target condition.

[0117] Optionally, in some embodiments, the method may further include: determining the partition position based on refresh area information, and identifying the signal that matches the partition position among the gating control signal and the source drive signal as the target signal. That is, the display driver 03 may adjust the other signal that does not match the partition position among the gating control signal GE and the source drive signal S1 based on one of the signals that matches the partition position.

[0118] It is understood that since the display driving method can have essentially the same implementation and technical effect as the display driving circuit described in the previous embodiments, for the sake of brevity, the implementation and technical effect of the display driving method will not be described again here.

[0119] This application also provides a display device. As shown in FIG8, the display device includes: a display panel 10, and a display driving circuit 00 as described above.

[0120] The display driving circuit 00 is connected to the display panel 10 and is used to drive the display panel 10 to display.

[0121] Optionally, the display device described in this application embodiment can be an LTPO display device based on organic light-emitting diodes (OLEDs). Furthermore, the display device can be any suitable display device, including but not limited to mobile phones, tablets, televisions, monitors, laptops, digital photo frames, navigators, and e-books, as well as any product or component with display functionality.

[0122] It is understood that the terminology used in the embodiments section of this application is for explaining the embodiments of this application only and is not intended to limit this application. Unless otherwise defined, the technical or scientific terms used in the embodiments of this application should have the ordinary meaning understood by one of ordinary skill in the art to which this application pertains.

[0123] For example, the use of words like "first," "second," "third," and similar terms does not indicate any order, quantity, or importance, but is merely used to distinguish different components. Similarly, words like "a" or "one" do not indicate a quantity limitation, but rather the presence of at least one. Words like "include" or "contain" mean that the element or object preceding "includes" covers the element or object listed after "includes" or "contains," and does not exclude other elements or objects. Words like "connected" or "linked" are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. "Up," "down," "left," and "right" are used only to indicate relative positional relationships; when the absolute position of the described object changes, the relative positional relationship may also change accordingly. "And / or" indicates that three relationships can exist; for example, A and / or B can represent: A alone, A and B simultaneously, and B alone. The character " / " generally indicates that the preceding and following objects have an "or" relationship.

[0124] The above description is merely an optional embodiment of this application and is not intended to limit this application. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A display driving circuit for a display panel, the display panel including a display area and a plurality of pixels located in the display area and arranged in an array, the display area including at least two display partitions, the display driving circuit including a gate driving circuit, a gating circuit and a display driver, the gate driving circuit including a plurality of cascaded shift register units, the gating circuit including a plurality of gating units, the shift register units being connected to at least one row of pixels through corresponding gating units, and the display driver being connected to the gating circuit and the plurality of pixels respectively; The display driver is used to: receive refresh area information of a frame, and based on the refresh area information, transmit source drive signals to multiple pixels in the refresh display partition indicated by the refresh area information, and transmit gating control signals to the gating circuit. The gating unit in the gating circuit is used to: control the corresponding shift register unit to be connected to at least one row of pixels in response to a gating control signal of the first level, and control the corresponding shift register unit to be disconnected from at least one row of pixels in response to a gating control signal of the second level. The shift register unit in the gate driving circuit is used to: transmit a gate driving signal to the at least one row of pixels when it is turned on with the connected at least one row of pixels, so that the at least one row of pixels emits light based on the gate driving signal and the source driving signal; Furthermore, the gating control signal and the source driving signal transmitted by the display driver satisfy the target conditions: the duration of the gating control signal at the first level is less than the transmission duration of the source driving signal, and the period of the gating control signal at the first level is within the transmission period of the source driving signal.

2. The display driving circuit according to claim 1, wherein, In the target condition, the transition edge of the gating control signal from the second level to the first level coincides with the start transition edge of the source drive signal.

3. The display driving circuit according to claim 1, wherein, In the target condition, the transition edge of the gating control signal from the second level to the first level is located after the starting transition edge of the source drive signal.

4. The display driving circuit according to claim 3, wherein, In the target condition, the transition edge of the gating control signal from the first level to the second level is located before the end transition edge of the source drive signal.

5. The display driving circuit according to claim 4, wherein, The distance between the transition edge of the gating control signal from the first level to the second level and the end transition edge of the source driving signal is greater than or equal to the duration of the end transition edge of the source driving signal.

6. The display driving circuit according to any one of claims 1 to 5, wherein, The display driver is used to: adjust another non-target signal of the gating control signal and the source drive signal based on a target signal of the transmitted gating control signal and the source drive signal, so that the transmitted gating control signal and the source drive signal satisfy the target condition.

7. The display driving circuit according to claim 6, wherein, The display driver is used to: determine the partition position based on the refresh area information, and determine the signal that matches the partition position among the gating control signal and the source drive signal as the target signal.

8. A display driving method for a display panel, applied in a display driver included in a display driving circuit of the display panel, the display panel including a display area and a plurality of pixels located in the display area and arranged in an array, the display area including at least two display partitions, the display driving circuit further including a gate driving circuit and a gating circuit, the gate driving circuit including a plurality of cascaded shift register units, the gating circuit including a plurality of gating units, the shift register units being connected to at least one row of pixels through corresponding gating units, and the display driver being connected to the gating circuit and the plurality of pixels respectively; the method includes: Receive refresh area information for one frame of video; Based on the refresh area information, source drive signals are transmitted to multiple pixels in the screen refresh display partition indicated by the refresh area information. Based on the refresh area information, a gating control signal is transmitted to the gating circuit; Specifically, for the gating unit in the gating circuit, the gating control signal is a first level indicating that the gating unit controls the corresponding shift register unit to be turned on with at least one row of pixels, so that the shift register unit transmits a gate drive signal to the at least one row of pixels. The element is used to emit light based on the gate driving signal and the source driving signal, and the gating control signal is a second level to indicate that the gating unit controls the corresponding shift register unit to disconnect from at least one row of connected pixels; Furthermore, the gating control signal and the source driving signal transmitted by the display driver satisfy the target conditions: the duration of the gating control signal at the first level is less than the transmission duration of the source driving signal, and the period of the gating control signal at the first level is within the transmission period of the source driving signal.

9. The method according to claim 8, wherein, In the target condition, the transition edge of the gating control signal from the second level to the first level coincides with the start transition edge of the source drive signal.

10. The method according to claim 8, wherein, In the target condition, the transition edge of the gating control signal from the second level to the first level is located after the starting transition edge of the source drive signal.

11. The method according to claim 10, wherein, In the target condition, the transition edge of the gating control signal from the first level to the second level is located before the end transition edge of the source drive signal.

12. The method according to claim 11, wherein, The distance between the transition edge of the gating control signal from the first level to the second level and the end transition edge of the source driving signal is greater than or equal to the duration of the end transition edge of the source driving signal.

13. The method according to any one of claims 8 to 12, wherein, The method further includes: Based on one of the transmitted gating control signal and the source driving signal as a target signal, the other non-target signal of the gating control signal and the source driving signal is adjusted so that the transmitted gating control signal and the source driving signal satisfy the target condition.

14. The method according to claim 13, wherein, The method further includes: The partition position is determined based on the refresh area information, and the signal that matches the partition position in the gating control signal and the source drive signal is determined as the target signal.

15. A display device, the display device comprising: The display panel, and the display driving circuit as described in any one of claims 1 to 7; The display driving circuit is connected to the display panel and is used to drive the display panel to display.

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