Plurality of application specific instruction processors for a medical device

Abstract

A medical device includes an application specific instruction processor (ASIP) comprising: a programmable state machine; a memory configured to store instructions for execution with the programmable state machine that when executed cause the programmable state machine to perform an operation of the medical device to generate first data that is to be stored or process second data that is received; and file manager circuitry configured to manage access of the instructions and variables of the instructions by the programmable state machine; and a microcontroller unit (MCU) that is separate and distinct from an application specific integrated circuit (ASIC) that includes the ASIP, wherein the MCU comprises one or more central processing units configured to execute an application to process the first data or generate the second data that is processed by the ASIP.

Description

PLURALITY OF APPLICATION SPECIFIC INSTRUCTION PROCESSORS FOR AMEDICAL DEVICE

[0001] This application claims the benefit of U.S. Provisional Application Serial No. 63 / 639,328, filed April 26, 2024, which is incorporated herein by reference in its entirety.TECHNICAL FIELD

[0002] The disclosure relates to implantable medical devices used for monitoring and delivering electrical stimulation therapy to a patient.BACKGROUND

[0003] Medical devices may be external or implanted and may be used to monitor patient signals such as cardiac activity, biological impedance, or neural responses, and to deliver electrical stimulation therapy to patients via various tissue sites to treat a variety of symptoms or conditions such as chronic pain, tremor, Parkinson’s disease, epilepsy, urinary or fecal incontinence, sexual dysfunction, obesity, or gastroparesis and other conditions. The medical devices include circuitry to sense signal and deliver electrical stimulation.SUMMARY

[0004] In general, the disclosure describes medical devices that provide for flexible and programmable hardware state machine execution of various operations, such as sensing and stimulation, in a manner that is lighter weight and faster as compared to implantation of such operations on a microcontroller unit (MCU). The medical devices may include an MCU that includes one or more central processing units (CPUs) configured to execute one or more applications for device level control. However, various lower-level processing may be offloaded to one or more application specific instruction processors (ASIPs), also called programmable state machines within an application specific integrated circuit (ASIC). An ASIP may be instantiated as a peripheral processor within a custom designed MCU or in a peripheral application specific integrated circuit (ASIC). Each ASIP may be separate and distinct from the MCU, and may include a programmable state machine (e.g., instruction processor or callable state machine), memory configured to store instructions executed by the programmable state machine, and file manager circuitry configured to manage access by the programmable state machine with the memory.

[0005] With the use of programmable state machines, as well as local memory file management, the example techniques allow for local data processing using high-level operation codes, rather than assembly level instruction storage. In some examples, the high-level operation codes may be custom instructions that are specifically designed for a particular operation. For instance, for an MCU to perform various operations requires assembly level instruction storage, as well as digital logic that can remain idle, drawing current and impacting device longevity. The example techniques utilize programmable state machines with specific operations (e.g., as defined by the custom instructions), allowing for efficient digital logic utilization. As operations performed by the MCU are offloaded to the ASIP, the power consumption and operational overhead of the MCU can be reduced, allowing for utilization of generic MCUs that further promotes device longevity.

[0006] In one example, the disclosure describes a medical device comprising: an application specific instruction processor (ASIP) comprising: a programmable state machine; a memory configured to store instructions for execution with the programmable state machine that when executed cause the programmable state machine to perform an operation of the medical device to generate first data that is to be stored or process second data that is received; and file manager circuitry configured to manage access of the instructions and variables of the instructions by the programmable state machine; and a microcontroller unit (MCU) that is separate and distinct from an application specific integrated circuit (ASIC) that includes the ASIP, wherein the MCU comprises one or more central processing units configured to execute an application to process the first data or generate the second data that is processed by the ASIP.

[0007] In one example, the disclosure describes a method of a medical device, the method comprising: accessing, from memory and with file manager circuitry of an application specific instruction processor (ASIP) of an integrated circuit (ASIC) of the medical device, instructions and variables of the instructions for execution by a programmable state machine of the ASIP; executing, with the programmable state machine of the ASIP, the instructions to perform an operation of the medical device to generate first data that is to be stored or process second data that is received; and executing, with one or more central processing units of a microcontroller unit (MCU) of the medical device that is separate and distinct from the ASIC, an application to process the first data or generate the second data that is processed by the ASIP.

[0008] The details of one or more examples of the disclosure are set forth in the accompanying drawings and the description below. Other features, objects, and advantages of the disclosure will be apparent from the description and drawings, and from the claims.BRIEF DESCRIPTION OF DRAWINGS

[0009] FIG. 1 is a conceptual diagram illustrating example system that includes an implantable medical device and an external computing device.

[0010] FIG. 2 is a conceptual diagram illustrating example system that includes an implantable medical device (IMD) configured to deliver electrical stimulation to a patient according to an example of the techniques of the disclosure.

[0011] FIG. 3 is a block diagram illustrating example components of the medical device of FIGS. 1 or 2.

[0012] FIG. 4 is a block diagram illustrating an example of a peripheral integrated circuit (IC) of a medical device.

[0013] FIG. 5 is a conceptual diagram illustrating an example memory storage system.

[0014] FIG. 6 is a flowchart illustrating one or more example methods of a medical device.DETAILED DESCRIPTION

[0015] The disclosure describes systems and techniques for medical devices that include programmable state machines in peripheral circuitry that perform operations, such as sensing and stimulation, that otherwise would have been performed by a microcontroller unit (MCU) or dedicated digital logic circuitry. A programmable state machine may be part of an application specific instruction processor (ASIP), such as the instruction processor. The programmable state machine may also be considered as a “callable state machine” as the programmable state machine includes state machine processing steps that are coordinated with use of instructions (e.g., opcodes and operands).

[0016] A MCU includes a one or more central processing units, digital logic circuitry, memory management circuitry, and memory. In some techniques, the digital logic circuitry of the MCU may be shared for performing various different operations. For instance, the peripheral digital logic circuitry attached to the MCU may be configured to implement a sensing algorithm on signals sensed by sensing circuitry. Additional peripheral digital logic circuitry attached to the MCU may be configured to implement a stimulation algorithm that causes stimulation circuitry to deliver electrical stimulation therapy. In various cases, the MCU is programmed by a particular entity to implement the unique sensing or stimulation algorithm, or any other unique algorithms that were designed by that entity.

[0017] Having a general purpose MCU attached to such digital logic to implement the various algorithms can result in a bulky system. For example, digital logic elements include synchronous elements and combinatorial elements. Synchronous elements provide the “stateretention” as the medical device implements a particular operation (e.g., uses its function). In many designs, a large majority of the synchronous elements are not used to their capacity. For example, most of the circuits are idle for a majority of the time. The relatively large number of these digital logic elements incur a cost of a large clock tree. A clock tree refers to the circuitry and transmission lines uses to deliver a clock signal to the digital logic elements. That is, clock trees bring the operational clocks to the synchronous elements and can be a major contributor to power consumption. In addition, the physical space on the IC die has to accommodate many individual circuit blocks, instantiated to perform their individual tasks.

[0018] For various types of medical devices, such as implantable medical devices without rechargeable batteries, power consumption can dramatically impact device longevity. Improving device longevity may be desirable to reduce explanting the current medical device and implanting a new medical device. Having idle digital logic that is drawing current, even if minimal, and having a large clock tree to support all of this digital logic all located within a digital ASIC can increase power consumption to a level that can limit how long the medical device can remain implanted.

[0019] Furthermore, as MCU designs and capabilities improve, replacing a current application specific MCU with an off-the-shelf or generic MCU becomes challenging. For instance, a new version of an MCU may still need to be updated with the digital logic that is configured to perform unique sensing or stimulation algorithms.

[0020] This disclosure describes example medical devices that include programmable state machines as part of an application specific instruction processor (ASIP) that may be formed on application specific integrated circuits (ASICs). The programmable state machines (e.g., instruction processor or callable state machine) may be configured to perform example operations of the medical device. For instance, the programmable state machines may be configured to perform a sensing algorithm (e.g., gathering, filtering, analyzing, etc.) and output data generated from the sensing algorithm for storage and access by the MCU. As another example, the programmable state machines may be configured to perform a stimulation algorithm (e.g., program selection, determine parameters for ramping up or ramping down stimulation, etc.) based on data received from the MCU.

[0021] Due to the programmable nature of the programmable state machines, the digital logic elements, such as logic elements to perform digital signal processing (DSP), may be programmed in a specific manner that reduces the number of idle digital logic elements. That is, where a set of digital logic elements are shared to perform multiple different operations, banks of digital logic elements may be idle based on the type of operation being performed. In one or more examples, because the digital logic elements that form the programmable state machines areprogrammed to perform specific operations (e.g., specific applications), the number of idle digital logic elements can be reduced.

[0022] The ASICs having the ASIPs that include the programmable state machines may be separate and distinct from the MCU. For example, the ASICs may include respective clock sources that generate local clock signals to drive the programmable state machines. Also, this way, the programmable state machines may be programmed to perform unique operations, and do not need to be shared with other components or perform other operations. Moreover, since the ASICs are separate and distinct from the MCU, replacement of the MCU with a newer version of the MCU is less task intensive since the unique algorithms are performed off of the MCU.

[0023] Having programmable state machines implement various operations (e.g., functions or algorithms) may also promote memory utilization. For instance, for MCU level execution of these operations, the instructions may be broken down lower-level assembly instructions to handle all possible conditional branches. With the example programmable state machines, the instructions stored in the memory local to the ASIC may be in high-level operational code. The programmable state machine may access that high-level operational code, such as with file manager circuitry that manages access of the programmable state machine and the memory. The programmable state machine may then perform the operations defined by the high-level operational code, including the subtasks associated with performing the operations. In this manner, the memory utilization of instruction storage may be reduced because the high-level operational code may require fewer storage bits as compared to storing the assembly level code.

[0024] As described, the programmable state machine may be part of an ASIP formed on the ASIC. The ASIC is a piece of silicon that is designed and fabricated. An ASIP is a style of processor design that allows for custom instructions. In one or more examples, all instructions that are executed by the programmable state machine are custom, which are specifically designed for the operation that is performed by the ASIP.

[0025] In some cases, the memory storage capabilities of the ASICs may be limited due to the size and capability limits of the ASIC. Therefore, by using programmable state machines, the limited memory of the ASIC may be utilized in an efficient manner that allows for the ASIC to perform operations that would otherwise be performed by the MCU in a less power efficient manner.

[0026] Furthermore, by offloading the various operations from the MCU to different ASIPs, the example techniques may promote parallel implementation and efficient bus utilization. For example, the different programmable state machines in the different ASIPs may each be able to operate in parallel and therefore process data in parallel. The MCU may still orchestrate whendata is received from or transmitted to the various ASIPs, but the operations of the ASIPs may occur in parallel and relatively independently.

[0027] In some cases, there may be a single communication pathway between the MCU and other circuitry. For instance, sensed signals traffic, telemetry traffic, stimulation control traffic, long-term data storage traffic, etc. are all multiplexed on a serial bus (e.g., serial peripheral interface (SPI) bus). If additional traffic is added to the serial bus, the firmware of the MCU may need to be updated to handle another use case of traffic collision management. With the techniques described in this disclosure, rather than the MCU needing to gather all of data (e.g., sense data from sense circuitry) to perform the sense operation (e.g., sense algorithm), the sense ASIP may be configured to perform the sense operation and store the result and / or output the result via the bus. Such techniques may reduce collision and allow for flexibility in modifying what data is used for the sensing operation since the data may not need to be outputted on the bus to the MCU, but instead processed locally within the ASIP.

[0028] Furthermore, an MCU includes one or more general purpose central processing units (CPUs) and other circuitry. A general purpose CPU is a relatively large circuit and the code images are also very large (e.g., the amount of memory need to store the instructions that are executed). This generally requires resources (e.g., space on the IC for the CPU and the memories, and high current draw) that may not be available in a design when determining how to manage the sub-system tasks. That is, with the use of programmable state machines configured to perform specific operations (e.g., sub-system tasks like deliver stimulation or perform sensing), it may be possible to achieve such results while keep the size of the IC relatively small and the current draw within a desired level.

[0029] Accordingly, in one or more examples described in this disclosure, a medical device may include an ASIP that includes a programmable state machine, a memory configured to store instructions for execution with the programmable state machine that when executed cause the programmable state machine to perform an operation of the medical device to generate first data that is to be stored or process second data that is received, and file manager circuitry configured to manage access of the instructions and variables of the instructions by the programmable state machine. The medical device may also include a MCU that is separate and distinct from the ASIC that includes the ASIP, and the MCU may include one or more central processing units configured to execute an application to process the first data or generate the second data that is processed by the ASIP.

[0030] FIG. 1 is a conceptual diagram illustrating example system that includes an implantable medical device and an external computing device. The example of system 100 inFIG. 1 includes an implantable medical device 106, external computing device 114, and one or more servers 118.

[0031] External computing device 114 may include one or more antennae, such as antenna 116. External computing device 114 may be used to program or adjust settings of IMD 106 and may also recharge an electrical energy storage device, such as a battery, of IMD 106. However, in various examples, IMD 106 may not include a rechargeable battery.

[0032] External computing device 114 may also communicate with servers 118. In other examples, an external computing device separate from external computing device 114 may communicate with IMD 106 to adjust therapy and / or sensing parameters, download recorded data, and so on, such as a smart phone, tablet or similar computing device. In some examples, external computing device 114 may communicate, and inductively deliver electrical energy to IMD 106 via an internal antenna 108. In other examples, external computing device 114 may include an external wand with one or more antennae 112 for communication and / or electrical energy delivery.

[0033] The example of FIG. 1 is a side view of a patient’s leg showing a leadless neurostimulation device 106 near the ankle adjacent to the tibial nerve 104. Device 106 can be implanted through the patient’s skin and cutaneous fat layer via a small incision 102. The example of FIG. 1 describes a neurostimulation implantable medical device for tibial nerve stimulation. In other examples, the techniques of this disclosure may apply to other medical devices, such as implantable neurostimulation system for use in spinal cord monitoring and stimulation therapy, pelvic nerve stimulation and deep brain stimulation, delivery of drugs with an implantable drug pump, as well as to other types of medical devices without limitation. That is, the example techniques may be applicable to a tibial nerve stimulator, sacral nerve stimulator, deep brain stimulator, spinal cord stimulator, drug pump, sleep apnea stimulator, cardiac pacemaker, and defibrillator.

[0034] Device 106 may be positioned adjacent to the region defined by flexor digitorum longus and soleus in which tibial nerve 104 is contained and implanted adjacent and proximal to a fascia layer. One or more electrodes of device 106 may face toward tibial nerve 104. The example of system 100 includes a leadless device. Though not shown in FIG. 1, device 106 may also connect to one or more leads comprising one or more electrodes (not shown in FIG. 1).

[0035] IMD 106 may be constructed of any polymer, metal, or composite material sufficient to house the components of IMD 106. In this example, IMD 106 may be constructed with a biocompatible housing, such as titanium or stainless steel, or a polymeric material such as silicone or polyurethane, and surgically implanted at a site in patient near the tibial nerve, in some examples. In other examples, IMD 106 may be implanted in other locations including thearm, knee, and other peripheral locations as well as near the pelvis, abdomen, or buttocks. The housing of IMD 106 may be configured to provide a hermetic seal for components, such as a rechargeable power source or a non-rechargeable power source. In addition, the housing of IMD 106 may be selected of a material that facilitates receiving energy to charge the rechargeable power source, in examples where a rechargeable power source is used.

[0036] During operation, IMD 106 transmits an electrical stimulation signal between one or more electrodes through the fascia layer. The electrical signal may be used to stimulate tibial nerve 104 which may be useful in the treatment of overactive bladder (OAB) symptoms of urinary urgency, urinary frequency and / or urge incontinence, fecal incontinence, sexual dysfunction, pain, or other symptoms.

[0037] In some examples, disease, age, and injury may impair physiological functions of a patient. In one example, bladder dysfunction, such as overactive bladder, urgency, or urinary incontinence, is a problem that may afflict people of all ages, genders, and races. Various muscles, nerves, organs, and conduits within the pelvic floor cooperate to collect, store and release urine. A variety of disorders may compromise urinary tract performance, and contribute to an overactive bladder, urgency, or urinary incontinence that interferes with normal physiological function. System 100 may help relieve some symptoms of some disorders.

[0038] The above are some example symptoms or disorders that may be addressed with IMD 106. In other examples, such as where IMD 106 is a deep brain stimulator or spinal cord stimulator, the IMD may be configured to deliver electrical stimulation to address other symptoms or disorders such as movement disorders with a deep brain stimulator or pain with a spinal cord stimulator. Another use of spinal cord stimulator is to provide therapy to regain function (reconnect neural pathways) after a spinal cord injury (SCI). In addition, locomotion commands (stimulation patterns) may be given to areas (spinal cord and dorsal root) below a spinal cord injury to invoke movement. Similarly, for cardiac conditions, the IMD may be configured to deliver a pacing signal or a defibrillation signal.

[0039] As described above, some of the example operations performed by IMD 106 include stimulation and sensing operations. In some techniques, IMD 106 includes sensing circuitry and stimulation circuitry. The sensing circuitry and stimulation circuitry are hardwired to perform limited functionality. In these techniques, a substantial portion of data processing and analysis is performed on a microcontroller unit (MCU) of IMD 106, such as by one or more central processing units (CPUs) executing firmware.

[0040] However, the MCU performing such operations may result in bulky MCUs with relatively large idle current drain, and relatively large number of idle digital logic, as well as MCUs that are more complicated to replace as newer versions of MCUs become available. Forexample, an MCU may include hardware blocks (e.g., digital logic blocks) to organize incoming data (e.g., such as sensed data) into files for storage and hardware (e.g., additional digital logic blocks) to process the data within the files. In some of these examples, memory (e.g., SRAM) may store firmware complied into assembly instructions that are executed on the CPUs of the MCU.

[0041] In accordance with one or more examples described in this disclosure, rather than digital logic on the MCU performing various operations, one or more application specific integrated circuit (ASIC), separate and distinct from the MCU, include application specific instruction processor (ASIP) that may be configured to perform the various operations. However, simply offloading operations of the MCU to other circuitry, like an ASIC, may not be feasible without extra configuration and coding changes. For example, the hardware blocks to perform the data gathering and data processing, as done in the MCU, can be relatively large and not re-usable within the MCU. Furthermore, the code space to perform the operations, such as process the data, and the resources (e.g., digital logic and memory) on circuitry other than MCU may not be readily available.

[0042] To offload processing from the MCU (e.g., to allow for more power efficient and easily upgradeable MCU), this disclosure describes one or more example techniques of utilizing an ASIP. As one example, the ASIP may include a programmable state machine (e.g., instruction processor or callable state machine) that includes a plurality of digital logic blocks that form one or more digital signal processing steps or arithmetic logic arrays. Based on the desired operation, in the ASIP, the various digital logic block can be coupled together to form a pipeline for processing or generating data. Because the ASIP is programmable, the digital logic blocks can be configured to perform specific implementation in an order and manner that is current efficient and efficiently utilizes digital logic.

[0043] In one or more examples, the ASIP may be coupled with existing digital logic within the MCU or ASIC to provide a method of real-time configuration / operational updates of that digital logic which may not be possible from the MCU as it has other system-level responsibilities and requirements. The high-level instructions available to the ASIP program may be created specifically for the instantiation (e.g., stimulation related commands when integrating within a stimulation ASIP, digital signal processing commands when integrating within a sense ASIP). The high-level commands execute sub-states within the ASIP; in this manner, the micro-code (the underlying processing steps to perform the high-level instruction) of low-level instructions is used and simplifies the instruction processing logic by not replicating commonly used processing steps. Multiple programs within the ASIP memory structure can be created. If the processing of one program causes a pause in execution (e.g., while waiting onsense data), the context (runtime state of a processor’s execution) of the stalled program can be written to memory and the context of another of the ASIP’s program be read from memory and written to the ASIP, thereby causing a runtime switch from a stalled program to a program that needs to be executed.

[0044] The ASIP may also include a memory configured to store instructions for execution with the custom instruction processor (e.g., the programmable state machine) that when executed cause the programmable state machine to perform an operation of IMD 106 to generate first data that is to be stored or process second data that is received. For example, assume that ASIP is within a sense IC for performing a sense operation. In this example, the instructions may cause the programmable state machine to receive signals from one or more electrodes coupled to IMD 106, process the signals to generate the first data (e.g., sensed data), and store the first data for access by the MCU. As another example, the ASIP may be within a stimulation IC for performing a stimulation operation. In this example, the instructions may cause the programmable state machine to receive the second data (e.g., from the MCU) indicative of a stimulation program to execute, and execute the stimulation program to cause one or more electrodes coupled to the medical device to deliver electrical stimulation therapy. In this example, the memory may be configured to store instructions of a plurality of stimulation programs. IMD 106 may include a plurality of ASIPs (e.g., in a sense IC and in a stimulation IC).

[0045] In some examples, the ASIP may also include file manager circuitry and / or a program manager unit. In some cases, the file manager circuitry and the program manager unit may be combined into common circuitry. The file manager circuitry (e.g., alone or along with the program manager unit may be configured to manage access of the instructions and variables of the ASIP program (the sequence and order of instructions to perform a task). As an example, the memory may be configured to store the instructions as a file. The file manager circuitry may be configured to access the file from the memory based on an FilelD (file identifier) and Fileindex (index into a filesystem), that indicates a starting memory location of a filesystem within the memory.

[0046] To maintain small operands and to efficiently access data, each instruction can specify a different memory map or view into the system. For instance, the program manager unit (e.g., separate or integrated with the file manager circuitry) may be configured to maintain different maps into the file, and each instruction may select a particular memory map. The program manager may then use the particular map to access variables, elements of a data file or configuration space of integrated peripherals.

[0047] In this way, the example techniques may promote efficient digital logic usages, which reduces power drain, and can increase the longevity of IMD 106, or at least reduce the number of times IMD 106 needs to be recharged. For instance, the digital logic of the MCU may be reduced, allowing for less idle digital logic that drains current. In another example, the MCU operation is no longer burdened with the peripheral control and can remain in its idle state for a greater amount of time, allowing for less MCU operation current. Moreover, as the operations are offloaded from the MCU, it may be possible to replace the MCU when newer versions of the MCU become available.

[0048] FIG. 2 is a conceptual diagram illustrating example system that includes an implantable medical device (IMD) configured to deliver electrical stimulation to a patient according to an example of the techniques of the disclosure. In the example of FIG. 2, system 200 may be similar to system 100 and includes an implantable medical device (IMD) 210 which may be similar to IMD 106. IMD 210 may be configured to deliver therapy to and / or sense physiological signals from target tissue. The target tissue may include or be near spinal cord 208 and / or pelvic nerves 216 (e.g., a pudendal nerve or sacral nerve), or any other nervous or muscle tissue that may be stimulated or from which physiological signals may be sensed of patient 202 through lead 214 (coupled to IMD 210 via connector 212). Lead 214 may carry a plurality of electrodes 218 at the distal end of lead 214. IMD 210 may provide neurostimulation to treat symptoms of patient 202, such as pain, fecal or urinary incontinence, erectile dysfunction, or other sexual dysfunction. IMD 210 may thus be configured to provide sacral nerve stimulation in one example.

[0049] System 200 may also include external device 204 and server 206. External device 204 may be similar to external computing device 114. Server 206 may be similar to server 118.

[0050] Similar to IMD 106, IMD 210 may include an ASIC that includes an ASIP which contains a programmable state machine, a memory configured to store instructions for execution with the programmable state machine that when executed cause the programmable state machine to perform an operation of IMD 210 to generate first data that is to be stored or process second data that is received. The ASIC may also include file manager circuitry configured to manage access of the instructions and variables of the instructions by the programmable state machine. IMD 210 may include a MCU that is separate and distinct from the ASIP. The MCU may include one or more central processing units configured to execute an application to process the first data and to generate the second data that is processed by the ASIP.

[0051] FIG. 3 is a block diagram illustrating example components of the medical device of FIGS. 1 or 2. Medical devices for delivery of stimulation to other locations or nerves than those described with respect to FIGS. 1 and 2 may include similar components.

[0052] Implantable medical device 300 is an example of IMD 106 or 210 described above in relation to FIGS. 1 and 2. In the example illustrated in FIG. 3, IMD 300 includes microcontroller unit (MCU) 302, sensing ASIP 304, stimulation ASIP 306, coil 310, recharge circuitry 312, power source 314, telemetry circuitry 316, temperature sensor 318, memory 320, and one or more sensors 322, such as an accelerometer. In other examples, IMD 300 may include a greater or a fewer number of components. For example, IMD 300 may not include temperature sensor 318 or sensors 322. Also, in some examples, where power source 314 is anon- rechargeable battery, recharge circuitry 312 and antenna 310 may not be present. In general, IMD 300 may comprise any suitable arrangement of hardware, alone or in combination with software and / or firmware, to perform the various techniques described herein attributed to IMD 300.

[0053] MCU 302 of IMD 300 may include one or more processors, such as one or more microprocessors, digital signal processors (DSPs) and may be embodied within application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), or any other equivalent integrated or discrete logic circuitry, as well as any combinations of such components. IMD 300 may include a memory 320, such as random access memory (RAM), read only memory (ROM), programmable read only memory (PROM), erasable programmable read only memory (EPROM), electronically erasable programmable read only memory (EEPROM), static RAM (SRAM), or flash memory. In some examples, memory 320 may include instructions that cause MCU 302 to perform the actions.

[0054] Sensing ASIP 304 may be configured to sense signals from electrodes 308A-308D. Stimulation ASIP 306 may deliver electrical stimulation via electrodes 308A-308D. Examples of the parameters used for stimulation include a voltage amplitude, a current amplitude, a pulse rate, a pulse width, a duty cycle, or the combination of electrodes 308A-308D that stimulation ASIP 306 may use to deliver the electrical stimulation signal as well as sense biological signals. In other examples, IMD 300 may have more or fewer electrodes than the four shown in the example of FIG. 3. In some examples one or more of electrodes 308A-308D may be part of or attached to a housing of IMD 300, e.g., a leadless electrode. In other examples, one or more of electrodes 308A-308D may be part of one or more leads implanted in or attached to a patient to sense biological signals and / or deliver electrical stimulation.

[0055] IMD 300 may also include components to receive power to recharge rechargeable power source 314 when rechargeable power source 314 has been at least partially depleted. However, power source 314 need not be a rechargeable power source in all examples, and recharge circuitry 312 may not be necessary in such examples.

[0056] As shown in FIG. 3, IMD 300 includes coil 310 and recharge circuitry 312 coupled to rechargeable power source 314. Recharge circuitry 312 may be configured to charge rechargeable power source 314 with the selected power level determined by either MCU 302 or an external charging device, such as external computing device 114 described above in relation to FIG. 1. Recharge circuitry 312 may include any of a variety of charging and / or control circuitry configured to process or convert current induced in coil 310 into charging current to charge power source 314.

[0057] Secondary coil 310 may include a coil of wire or other device capable of inductive coupling with a primary coil disposed external to the patient. Although secondary coil 310 is illustrated as a simple loop in the example of in FIG. 3, secondary coil 310 may include multiple turns of conductive wire. Secondary coil 310 may include a winding of wire configured such that an electrical current can be induced within secondary coil 310 from a magnetic field. The induced electrical current may then be used to recharge rechargeable power source 314, or communicate between an external computing device and IMD 300.

[0058] Recharge circuitry 312 may include one or more circuits that process, filter, convert and / or transform the electrical signal induced in the secondary coil to an electrical signal capable of recharging rechargeable power source 314. For example, in alternating current induction, recharge circuitry 312 may include a half-wave rectifier circuit and / or a full-wave rectifier circuit configured to convert alternating current from the induction to a direct current for rechargeable power source 314.

[0059] Rechargeable power source 314 may include one or more capacitors, batteries, and / or other energy storage devices. Rechargeable power source 314 may deliver operating power to the components of IMD 300. In some examples, rechargeable power source 314 may include a power generation circuit to produce the operating power. Rechargeable power source 314 may be configured to operate through many discharge and recharge cycles. Rechargeable power source 314 may also be configured to provide operational power to IMD 300 during the recharge process. In some examples, rechargeable power source 314 may be constructed with materials to reduce the amount of heat generated during charging. In other examples, IMD 300 may be constructed of materials and / or using structures that may help dissipate generated heat at rechargeable power source 314, recharge circuitry 312, and / or secondary coil 310 over a larger surface area of the housing of IMD 300.

[0060] Although rechargeable power source 314, recharge circuitry 318, and secondary coil 310 are shown as contained within the housing of IMD 300, in alternative implementations, at least one of these components may be disposed outside of the housing. For example, in some implementations, secondary coil 310 may be disposed outside of the housing of IMD 300 tofacilitate better coupling between secondary coil 310 and the primary coil of external charging device. As described, in other examples, power source 314 may be a primary power cell and IMD 300 may not include recharge circuitry 312 and recharge coil 310.

[0061] MCU 302 may also control the exchange of information with an external computing device using telemetry circuitry 316. Telemetry circuitry 316 may be configured for wireless communication using radio frequency protocols, such as BLUETOOTH, MICS or similar RF protocols, as well as using inductive communication protocols. Telemetry circuitry 316 may include one or more antennas configured to communicate with external charging device, for example. MCU 302 may transmit operational information and receive therapy programs or therapy parameter adjustments via telemetry circuitry 316. Also, in some examples, IMD 300 may communicate with other implanted devices, such as stimulators, control devices, or sensors, via telemetry circuitry 316. In addition, telemetry circuitry 316 may be configured to control the exchange of information related to sensed and / or determined temperature data, for example temperatures sensed by and / or determined from temperatures sensed using temperature sensor 318. In some examples, telemetry circuitry 316 may communicate using inductive communication, and in other examples, telemetry circuitry 316 may communicate using RF frequencies separate from the frequencies used for inductive charging.

[0062] In accordance with one or more examples described in this disclosure, sensing ASIP 304 and / or stimulation ASIP 306 may include a programmable state machine, a memory configured to store instructions for execution with the programmable state machine that when executed cause the programmable state machine to perform an operation of IMD 300 to generate first data that is to be stored for access by the MCU or process second data that is received, and file manager circuitry configured to manage access of the instructions and variables of the instructions by the programmable state machine. MCU 302, that is separate and distinct from sensing ASIP 304 and / or stimulation ASIP 306, may include one or more central processing units configured to execute an application to process the first data or generate the second data that is processed by the ASIC, which embodies the ASIP.

[0063] The memory may be static random-access memory (SRAM). Also, the instructions may be high-level operation codes excluding compiled assembly instructions.

[0064] As an example, the memory (e.g., SRAM) of sensing ASIP 304 may include instructions that cause the programmable state machine of sensing ASIP 304 to receive signals from one or more electrodes 308A-308D coupled to IMD 300, process the signals to generate the first data, and store the first data for access by MCU 302. That is, MCU 302 may include one or more central processing units configured to execute an application (e.g., firmware) to process the first data (e.g., determine if changes in therapy are needed based on the first data, output the firstdata to another device, etc.) For instance, the programmable state machine of sensing ASIP 304 may be programmed, based on the instructions in the memory, to organize the first data (e.g., sense data) into a local loop buffer, where the sense data may be based on signals received from electrodes 308A-308D such as evoked compound action potential (ECAP) signals, local field potential (LFP) signals, evoked resonant neural activity (ERNA) signals, or myoelectric (MYO) signals, as a few examples.

[0065] As another example, the programmable state machine of sensing ASIP 304 may be programmed, based on the instructions in memory, to perform multi-channel electrode data processing, such as playback of the first data through a filter chain (e.g., to perform filtering of the signals). As another example, the programmable state machine of sensing ASIP 304 may be programmed, based on the instructions in memory, to perform analysis of the signals. For instance, the programmable state machine of sensing ASIP 304 may be configured to perform LFP signal “power in band” calculations, such as power of a frequency band, analysis of which electrodes the received signal has the greater power in band for sensing signals or for determining the method of and to which electrodes to use for delivering stimulation.

[0066] The above are some examples of operations that sensing ASIP 304 can perform. Sensing ASIP 304 may perform one or more of the above examples, as well as other sensing algorithm techniques. The above examples should not be considered limiting.

[0067] In some examples, the memory (e.g., SRAM) of stimulation ASIP 306 may include instructions that cause the programmable state machine of stimulation ASIP 306 to receive the second data indicative of a stimulation program to execute. That is, one or more central processing units configured to execute an application (e.g., firmware) may generate the second data that is processed by stimulation ASIP 306, and the second data may be data indicative of a stimulation program to execute. In such examples, the memory (e.g., SRAM) may be configured to store instructions of a plurality of stimulation programs (e.g., such as in files in a filesystem that is managed by the file manager circuitry and / or program manager unit). Stimulation ASIP 306 may execute the stimulation program to cause one or more electrodes 308A-308D coupled to IMD 300 to deliver electrical stimulation therapy.

[0068] As an example, the second data from MCU 302 may include instructions to select a first program. The programmable state machine of stimulation ASIP 306 may execute the first program including providing ramping control (e.g., ramping up or ramping down of parameters of the first program). As another example, stimulation ASIP 306 may provide implementation of parameters for a custom and dynamic stimulation waveform profile. As yet another example, the programmable state machine of stimulation ASIP 306 may be programmed to assist with closed loop operation, such as where the programmable state machine of stimulation ASIP 306 maydetermine how to change a parameter of the stimulation therapy (e.g., amplitude, frequency, pulse width, electrode selection, etc.), and change the parameter accordingly.

[0069] As an example, stimulation ASIP 306 may interface to the stimulation control registers and update the stimulation pulse (amplitude, pulse width, electrode combination) on a pulse-by-pulse basis. Stimulation ASIP 306 may be employed to determine at runtime, what each stimulation pulse should look like. A stimulation pulse could be the aggregate of several input waveforms. A stimulation pulse could have a ramp profile (e.g., increasing or decreasing stimulation gradually) or a static amplitude with a frequency or amplitude modulation.

[0070] The above are some examples of operations that stimulation ASIP 306 can perform. Stimulation ASIP 306 may perform one or more of the above examples, as well as other techniques related to delivery of electrical stimulation. The above examples should not be considered limiting.

[0071] For instance, for both sensing ASIP 304 and stimulation ASIP 306, there may be instances where sensing ASIP 304 and / or stimulation ASIP 306 are to output to MCU 302. MCU 302 and sensing ASIP 304 and / or stimulation ASIP 306 may be coupled together using a bus (e.g., SPI bus). If MCU 302 were to perform all of the operations, and there was anew operation that MCU 302 is to support that requires additional data from sensing ASIP 304 and / or stimulation ASIP 306, the firmware of MCU 302 may need to be updated to manage the collision of the SPI bus and manage processing of the additional data. With sensing ASIP 304 and / or stimulation ASIP 306 performing respective operations, the firmware to manage collisions on the bus or MCU 302, more generally, may not need to be updated. Rather, sensing ASIP 304 and / or stimulation ASIP 306 may be programmed (e.g., with respective programmable state machine) to perform the example operations.

[0072] FIG. 4 is a block diagram illustrating an example of a peripheral integrated circuit (IC) of a medical device. That is, FIG. 4 illustrates ASIC 400, which may be a peripheral IC, and include an ASIP such as sensing ASIP 304 or stimulation ASIP 306, as examples.

[0073] As illustrated, ASIC 400 includes local oscillator 402, programmable state machine 404, program manager unit 406, file manager circuitry 408, and memory 410. Programmable state machine 404, program manager unit 406, and file manager circuitry 408 may be considered as forming an ASIP on ASIC 400. ASIC 400 may be separate and distinct from MCU 302. Local oscillator 402 may be considered as part of the ASIP in some cases, but may be considered as being external to the ASIP in other cases.

[0074] In some examples, program manager unit 406 and file manager circuitry 408 may be combined together, but are illustrated separately for ease. Memory 410 may be SRAM, but other example memory types are possible.

[0075] Programmable state machine 404 may be considered as an instruction processor or callable state machine (e.g., since the operations of programmable state machine 404 are coordinated with the use of instructions such as opcodes and operands). Programmable state machine 404 may include logic gates, flip-flops, multiplexers (MUXs), decoders, counters, and comparison circuits. Logic gates include AND, OR, NOT, NAND, NOR, and XOR gates used to implement the logic operations required for state transitions and condition evaluations. Flipflops may be memory elements used to store the current state of the state machine, such as D flip-flops, T flip-flops, JK flip-flops, or other types depending on the specific design requirements. MUXs are used to select among multiple inputs based on control signals, and are often used to choose the next state based on the current state and input conditions. Decoders are combinational circuits that convert binary information into a set of control signals, and may be used to decode the current state and determine the appropriate outputs or next state. Counters are used to sequence through a predefined set of states in a specific order. Comparator circuits are used to compare two binary numbers and determine their relationship (e.g., equality, greater than, less than), and are often used in condition evaluation within the state machine. Programmable state machine 404 may also include arithmetic logic units (ALUs). For instance, the ALUs may perform arithmetic operations on discrete data inputs (e.g., add, subtract, multiply, divide, shift, etc.).

[0076] To perform various operations for a medical device (e.g. IMD 106, 210, or 300), programmable state machine 404 may transition through states. The states may represent the different conditions or situations that ASIC 400 can be in, and may be defined by the algorithm (e.g., operation) that ASIC 400 is to perform. Each state typically represents a specific behavior or set of actions that programmable state machine 404 can perform. There may be an initial state (e.g., first state or reset state) of programmable state machine 404.

[0077] The transitions may define the conditions under which programmable state machine 404 moves from one state to another. The transitions can be triggered by events or conditions and specify what action or actions should be taken when the transition occurs.

[0078] Signals or triggers (e.g., from MCU 302, based on local events with the peripheral ASICs or based on instructions being executed) may cause programmable state machine 404 to transition from one state to another. Events could be external inputs, such as instructions from MCU 302 or sensor readings, or internal events triggered by the execution of instructions. Actions are the operations performed by programmable state machine 404 when transitioning between states. These actions could include updating variables, sending messages, or performing calculations. Outputs are the results or effects of these actions.

[0079] Programmable state machine 404 may also include registers to store temporary data or intermediate results during state transitions or computation, or to store information about the current state of programmable state machine 404. In some examples, the registers may be part of memory 410. Also, in some examples, program manager unit 406 and / or file manager circuitry 408 may provide access to the registers.

[0080] Program manager unit 406 may include different interfaces to programmable state machine 404 to perform specific operations. This allows programmable state machine 404 to perform basic accesses. For instance, program manager unit 406, through file manager circuitry 408, may access the program file from memory 410 to fetch the stream of instructions (e.g., opcode and operands are presented programmable state machine 404). Program manager unit 406 may allow access to variables of different sizes within different variable spaces, and allow access to registers of ASIC 400. In some examples, the variables in the registers may also be available to MCU 302 via the SPI bus.

[0081] Program manager unit 406 may include different access maps into the system (e.g., memory 410, registers of ASIC 400 or external peripherals connected through another SPI bus), and an instruction may select which map to use. For example, an operand may be an index into a memory map. Each instruction uses a specific map when accessing memory 410 or other resources. One example of a map is a variable map that provides access to variables within the registers, program specific initialized data in memory 410, program specific uninitialized data in memory 410, or global data in memory 410. Another example of a map is a system map that provides access to variables, file pointers (FileID:FileIndex pairs), system resources (ADC, SPI, etc.). Additional maps can be created and referenced by specific instructions.

[0082] File manager circuitry 408 may be configured to interpret the manner in which the files are stored in memory 410 for access by programmable state machine 404 (e.g., through program manager unit 406 or using some other technique). For instance, file manager circuitry 408 may use a FilelD (e.g., file identification) as an input and access the specific set of instructions, variables, or other program structures from memory 410. An example of a filesystem structure used to store and access data files, program files, instructions and variables is illustrated in FIG. 5.

[0083] In one or more examples, local oscillator 402 may be configured to provide the clock signal that causes programmable state machine 404 to transition between states. Local oscillator 402 may be an RC oscillator, and provide a clock signal of approximately 1 Mega Hertz (MHz). However, local oscillator 402 may be different type of oscillator, and the clock signal may be at a frequency greater than or less than 1 MHz.

[0084] As described above, in one or more examples, the instructions stored in memory 410 may include high-level operation codes excluding compiled assembly instructions. For example, rather than having assembly instructions that utilize multiple bits in memory, using high-level operation codes may reduce the size of instructions that need to be stored. That is, the high-level operation codes may represent a complied high-level operation. One example for why high-level operation codes are available is because the ASIP of ASIC 400 can be made for application specific functionality (e.g., operations of sensing ASIP 304 or stimulation ASIP 306).

[0085] As an example, program manager unit 406 may present the opcode (e.g., high-level operation codes) and operands to programmable state machine 404. Each instruction may reference files in memory 410 via individual maps. In some examples, an application specific ‘high level’ instruction can call generic ‘low level’ instructions. That is, grouping low level commands into a higher level function call may be a benefit of using example techniques described in this disclosure. A small ‘high level’ instruction can execute a chain of many ‘low level’ instructions to perform a complex task. A ‘high level’ instruction is analogous to a firmware function which is designed to perform a complex task.

[0086] For instance, examples of low level instructions include move, compare, branch, etc. An example of a high level instruction includes ‘send file x through filter y’. In this example, digital logic of programmable state machine 404 may be configured as “filter y.” As another example, the high level instruction may be Output file = input file A* input file B. The function in this example is multiply, but other functions such as add, filter, complex multiply, peak-to- peak detect, etc. are possible.

[0087] Accordingly, ASIC 400 with programmable state machine 404 can be programed to provide a specific operation (e.g., sensing ASIP 304 or stimulation ASIP 306). However, programmable state machine 404 provides flexibility in its function such that programmable state machine 404 may be designed to meet the needs of the medical device with pre-determined high- level functions that can run as efficiently as native hardware (e.g., fixed-function), but has the programmable flexibility.

[0088] In one or more examples, to configure programmable state machine 404 to perform a specific operation, program manager unit 406 may feed a program consisting of state machine execution steps into programmable state machine 404, which executes the index (e.g., initial) state and the subsequent states until the function is complete. In some examples, the “program” can consist of low level register control (Load FileXPointer with 0x5) or a high level function (copy the contents of FileX to FileY). In one or more examples, the state machine execution steps may all be custom, which are specifically designed for the operation in which it is used.

[0089] With such techniques, sensing ASIP 304 and stimulation ASIP 306, which are examples of ASIC 400, may provide multi-tasking methodology where sensed data processing and processing of instructions for stimulation occur in parallel. Each one of sensing ASIP 304 may maintain the state of the programmable state machine of sensing ASIP 304 and stimulation ASIP 304 may maintain the state of the programmable state machine of stimulation ASIP 304 when not in the foreground.

[0090] Program manager unit 406 may save the context of the process core of programmable state machine 404 to memory 410 for short or long term storage. For simplicity, the context of the process core is saved to a structure within the program file in the filesystem. As noted above, an example of the filesystem is illustrated in FIG. 5.

[0091] Programmable state machine 404 may start the processing of a program upon event or timers and while the program is executing, programmable state machine 404 can halt and wait for an event or timer. A program in execution on programmable state machine 404 can spawn hardware tasks on another group of sub-task cores. The subtask processing can continue indefinitely, when the processing function determines it can stop or when the sub-task has completed its function.

[0092] Using ASIC 400 for performing operations of a medical device, such as those of sensing ASIP 304 or stimulation ASIP 306, may provide various benefits. The following are some example benefits. However, the example techniques described in this disclosure should not be considered as requiring such benefits in all examples. Also, the example techniques should not be considered limited to these example benefits.

[0093] ASIC 400 may boot relatively quickly. Memory 410 may initialize programmable state machine 404 quickly. ASIC 400 may run independently. For instance, MCU 302 may still orchestrate when sensing ASIP 304 and stimulation ASIP 306 are to perform their respective operations, but the actual execution of the respective operations may occur independently from MCU 302.

[0094] ASIC 400 may provide for reduction in digital logic and provide low power operation. For example, programmable state machine 404 may handle multiple tasks previously handled by multiple dedicated logic blocks in MCU 302. Operation and configuration is placed within memory 410 (e.g., SRAM), which has low standby currents. Furthermore, programmable state machine 404 may be parameterized and control resources are sized for the instantiation. For instance, the program counter size dictates maximum program size. If an instantiation does not require a large program size, the program counter size can be reduced. This allows further memory efficiencies. For instance, if there is a limit to the number of instructions that needaccessing, then the number of bits needed for access can be limited (e.g., 3 bits instead of 8 bits), which can save on memory.

[0095] Since ASIC 400 includes local oscillator 402, the clock tree structure is reduced in size and optimized for low power, as compared to MCU 302 performing all operations. Also, programmable state machine 402 reduces operations that MCU 302 performs, which reduces current need to output data and receive data.

[0096] As described above, use of ASIC 400 may promote simple programming with high- level interpreted instructions. High-level instructions are built upon lower level instructions and can concatenate multiple high-level instructions for a reduced program image size (e.g., less storage needed in memory 410 to store the instructions).

[0097] In some examples, local oscillator 402 may be configured to provide processor clocks only when processing clocks are required, thereby dramatically reducing idle current drain. A task scheduler of ASIC 400 may provide the structure for the time-sliced multitasking system. There may be two task schedulers, a system task scheduler and an application task scheduler.

[0098] Events / timers invoke the system task scheduler, which is programmed to invoke a program at a particular bookmark location. Each entry within the system task scheduler is associated with a timer / system event. The system event to SystemTaskID can be fixed at instantiation (hard coded) or a configurable mapping can be employed to allow run-time changes.

[0099] The bookmark array is a structure within a program file that defines program counter locations within the program and is the method to define jump points or program entry locations. The bookmark can be static (set at program creation) or dynamic (set at program operation). A definition of entry locations is useful for a program to have a small local task within the program file to handle moving a data sample from a sensor to a data file loop recording buffer (e.g., an example operation of sensing ASIP 304), or, in response to a periodic timer, a stimulation pulse can be created (e.g., an example operation of stimulation ASIP 306).

[0100] The application task scheduler may allow the program execution to link in the next step in the sequence / algorithm. For instance, when the program has executed a ‘Filter file A’ instruction, the program can select what should be done at the completion of the filtering of File A. The program could jump to bookmark X or bookmark Y for continued processing within the resident program, or the program can invoke the application task scheduler to transition execution to another program. The task schedulers are referenced when the ASIP is idle. System tasks have priority over Application tasks.

[0101] In some examples, the task scheduler places the FilelD and the BookmarkID in a data structure found in a data file within the filesystem. The FilelD of each task scheduler is defined in the system config table at the base of RAM. Program manager unit 406 alone or with filemanager circuitry 408 may provide simple and native access to data files in memory 410. For instance, general purpose FilelD registers and general purpose Fileindex registers provide access to multiple files at multiple indices.

[0102] For therapy delivery, the example techniques may promote closed loop therapy. In closed loop therapy, sensed data is used to determine if changes in therapy are appropriate. In some examples, stimulation ASIP 306 may use a wide array of math functions and filters to continuously determine optimum therapy settings. An algorithm may execute in the background on stimulation ASIP 306 when stimulation is not being delivered.

[0103] ASIC 400 may be configured with additional protection using error correction code (ECC). For example, the circuitry of ASIC 400 may be generated using a tool that generates Verilog code, and the tool may be utilized to enable ECC protection on the various blocks and circuitry of ASIC 400. Accordingly, in some examples, ASIC 400 may provide robust protection against cosmic bombardment and local disruptors (power glitches, etc.).

[0104] FIG. 5 is a conceptual diagram illustrating an example memory storage system. FIG. 5 illustrates filesystem 500 which memory 410 may store. In filesystem 500, a file identifier (e.g., FilelD) presented to filesystem 500 (e.g., by program manager unit 406 or file manager circuitry 408) may define a start and length of a file. It may be relatively easy to manage data and / or programs when only a FilelD is required. It should be understood that the description of FIG. 5 is one example of a filesystem, and the techniques are not so limited. There may be various other ways to implement a filesystem.

[0105] In the example of FIG. 5, filesystem 500 includes a plurality of files, and each file may be accessible by a file identifier (FilelD). For example, file 1 (e.g., FilelD = 1) is a program that includes instructions that programmable state machine 404 may execute. In this example, memory 410 may be configured to store the instructions that programmable state machine 404 is to execute as a file (e.g., file 1). File manager circuitry 408 may be configured to access the file from memory 410 based on an index, defined by the file, that indicates a starting memory location and length in the memory 410. In some examples, program manager unit 406 may also determine the index, and provide the index to file manager circuitry 408.

[0106] In some examples, the first byte (or possibly the first two bytes) of the program code is a structure that specifies the program’s stack size, bookmark table size and possibly other information about the program’s execution or variable initialization. In some examples, file manager circuitry 408 may interrogate the appropriate structures of the filesystem 500 to determine the SRAM address. The memory map to the file manager has regions to access the elements of a file. For instance, with the use of a ‘side-band’ FilelD signal to the bus interface, there is a ‘stack’ region. To understand the address of the stack, the file manager circuitry 408may read the FileXInfo to determine the file start / file length / ivar&uvar variable lengths. This allows the location of the program to be determined.

[0107] The first byte of the program code may indicate the stack size from the top of the program file, which gives the address to the stack structure. Once the starting location of the stack if known, the address of the bus transaction may index into stack structure to determine the absolute address of the SRAM access. File manager circuitry 408 may have a cache to record these locations for quicker future accesses.

[0108] Each feature within the filesystem is addressable from the interface. This greatly simplifies the filesystem access and relieves the ASIP of calculating and maintaining indexes into the structures.

[0109] FIG. 6 is a flowchart illustrating one or more example methods of a medical device. File manager circuitry 408 of ASIC 400 of a medical device may be configured to access from memory 410 instructions and variables of the instructions for execution by a programmable state machine 404 of the ASIC 400 (600). The instructions may include high-level operation codes excluding compiled assembly instructions. Memory 410 may be SRAM, and may store the instructions as a file (e.g., in filesystem 500). To access, file manager circuitry 408 may access the file from the memory 410 based on an index, defined by the file, that indicates a starting memory location in the memory 410. In some examples, program manager unit 406 may provide the index to file manager circuitry 408. The medical device may be one of a tibial nerve stimulator, sacral nerve stimulator, deep brain stimulator, or spinal cord stimulator. The medical device may be an implantable medical device.

[0110] Programmable state machine 404 of ASIC 400 may execute the instructions to perform an operation of the medical device to generate first data that is to be stored or process second data that is received (602). For example, ASIC 400 may be sensing ASIP 304. In this example, executing the instructions may include executing the instructions to receive signals from one or more electrodes coupled to the medical device, process the signals to generate the first data, and store the first data for access by the MCU 302. As another example, ASIC 400 may be stimulation ASIP 306. In this example, executing the instructions may include executing the instructions to receive the second data indicative of a stimulation program to execute, wherein the memory is configured to store instructions of a plurality of stimulation programs, and execute the stimulation program to cause one or more electrodes coupled to the medical device to deliver electrical stimulation therapy.

[0111] MCU 302 may execute, with one or more central processing units of MCU 302 of the medical device that is separate and distinct from ASIC 400, an application to process the first data or generate the second data that is processed by ASIC 400 (604). For example, MCU 302may receive first data from memory 410 or other memory, and process the first data to determine any changes in operation (e.g., therapy adjustment) or configure the data so that the data can be sent to a server or external programming device. As another example, MCU 302 may output second data, such as parameter values, that stimulation ASIP 306 receives and dynamically creates a therapy program, and stimulation ASIP 306 may deliver electrical stimulation according to the therapy program.

[0112] The techniques of this disclosure may also be described in the following examples.

[0113] Example 1. A medical device comprising: an application specific instruction processor (ASIP) comprising: a programmable state machine; a memory configured to store instructions for execution with the programmable state machine that when executed cause the programmable state machine to perform an operation of the medical device to generate first data that is to be stored or process second data that is received; and file manager circuitry configured to manage access of the instructions and variables of the instructions by the programmable state machine; and a microcontroller unit (MCU) that is separate and distinct from an application specific integrated circuit (ASIC) that includes the ASIP, wherein the MCU comprises one or more central processing units configured to execute an application to process the first data or generate the second data that is processed by the ASIP.

[0114] Example 2. The medical device of example 1, wherein the instructions comprise high-level operation codes excluding compiled assembly instructions.

[0115] Example 3. The medical device of any of examples 1 and 2, wherein the memory comprises static random-access memory (SRAM).

[0116] Example 4. The medical device of any of examples 1-3, wherein the ASIC further comprises a local oscillator configured to output a local clock signal to the programmable state machine.

[0117] Example 5. The medical device of any of examples 1-4, wherein the memory is configured to store the instructions as a file, wherein the file manager circuitry is configured to access the file from the memory based on an index, defined by the file, that indicates a starting memory location in the memory.

[0118] Example 6. The medical device of any of examples 1-5, wherein the ASIP is a sense ASIP, wherein the instructions comprise instructions that cause the programmable state machine to: receive signals from one or more electrodes coupled to the medical device; process the signals to generate the first data; and store the first data for access by the MCU.

[0119] Example 7. The medical device of any of examples 1-5, wherein the ASIP is a stimulation ASIP, wherein the instructions comprises instructions that cause the programmable state machine to: receive the second data indicative of a stimulation program to execute, whereinthe memory is configured to store instructions of a plurality of stimulation programs; and execute the stimulation program to cause one or more electrodes coupled to the medical device to deliver electrical stimulation therapy.

[0120] Example 8. The medical device of any of examples 1-5, wherein the ASIP is a sense ASIP configured to receive signals from one or more electrodes coupled to the medical device and generate the first data, and wherein the medical device comprises a stimulation ASIP configured to receive the second data and cause one or more electrodes coupled to the medical device to deliver electrical stimulation therapy based on the second data.

[0121] Example 9. The medical device of any of examples 1-8, wherein the medical device is one of a tibial nerve stimulator, sacral nerve stimulator, deep brain stimulator, spinal cord stimulator, drug pump, sleep apnea stimulator, cardiac pacemaker, and defibrillator.

[0122] Example 10. The medical device of any of examples 1-9, wherein the medical device is an implantable medical device.

[0123] Example 11. A method of a medical device, the method comprising: accessing, from memory and with file manager circuitry of an application specific instruction processor (ASIP) of an integrated circuit (ASIC) of the medical device, instructions and variables of the instructions for execution by a programmable state machine of the ASIP; executing, with the programmable state machine of the ASIP, the instructions to perform an operation of the medical device to generate first data that is to be stored or process second data that is received; and executing, with one or more central processing units of a microcontroller unit (MCU) of the medical device that is separate and distinct from the ASIC, an application to process the first data or generate the second data that is processed by the ASIP.

[0124] Example 12. The method of example 11, wherein the instructions comprise high-level operation codes excluding compiled assembly instructions.

[0125] Example 13. The method of any of examples 11 and 12, wherein the memory comprises static random-access memory (SRAM).

[0126] Example 14. The method of any of examples 11-13, further comprising: outputting, with a local oscillator of the ASIC, a local clock signal to the programmable state machine.

[0127] Example 15. The method of any of examples 11-14, wherein the memory is configured to store the instructions as a file, wherein accessing comprises accessing the file from the memory based on an index, defined by the file, that indicates a starting memory location in the memory.

[0128] Example 16. The method of any of examples 11-15, wherein the ASIP is a sense ASIP, and wherein executing the instructions comprises executing the instructions to: receivesignals from one or more electrodes coupled to the medical device; process the signals to generate the first data; and store the first data for access by the MCU.

[0129] Example 17. The method of any of examples 11-15, wherein the ASIP is a stimulation ASIP, and wherein executing the instructions comprises executing the instructions to: receive the second data indicative of a stimulation program to execute, wherein the memory is configured to store instructions of a plurality of stimulation programs; and execute the stimulation program to cause one or more electrodes coupled to the medical device to deliver electrical stimulation therapy.

[0130] Example 18. The method of any of examples 11-15, wherein the ASIP is a sense ASIP configured to receive signals from one or more electrodes coupled to the medical device and generate the first data, the method further comprising: receiving, with a stimulation ASIP, the second data; and causing, with the stimulation ASIP, one or more electrodes coupled to the medical device to deliver electrical stimulation therapy based on the second data.

[0131] Example 19. The method of any of examples 11-18, wherein the medical device is one of a tibial nerve stimulator, sacral nerve stimulator, deep brain stimulator, spinal cord stimulator, drug pump, sleep apnea stimulator, cardiac pacemaker, and defibrillator.

[0132] Example 20. The method of any of examples 11-19, wherein the medical device is an implantable medical device.

[0133] In one or more examples, the functions described above may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions may be stored on or transmitted over, as one or more instructions or code, a computer- readable medium and executed by a hardware-based processing unit. Computer-readable media may include computer-readable storage media, which corresponds to a tangible medium such as data storage media, or communication media including any medium that facilitates transfer of a computer program from one place to another, e.g., according to a communication protocol. In this manner, computer-readable media generally may correspond to (1) tangible computer- readable storage media which is non-transitory or (2) a communication medium such as a signal or carrier wave. Data storage media may be any available media that can be accessed by one or more computers or one or more processors to retrieve instructions, code and / or data structures for implementation of the techniques described in this disclosure. A computer program product may include a computer-readable medium.

[0134] The term “non-transitory” may indicate that the storage medium is not embodied in a carrier wave or a propagated signal. In certain examples, a non-transitory storage medium may store data that can, over time, change (e.g., in RAM or cache). By way of example, and not limitation, such computer-readable storage media, may include random access memory (RAM),read only memory (ROM), programmable read only memory (PROM), erasable programmable read only memory (EPROM), electronically erasable programmable read only memory (EEPROM), flash memory, a hard disk, a compact disc ROM (CD-ROM), a floppy disk, a cassette, magnetic media, optical media, or other computer readable media. In some examples, an article of manufacture may include one or more computer-readable storage media.

[0135] Also, any connection is properly termed a computer-readable medium. For example, if instructions are transmitted from a website, server, or other remote source using a coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL), or wireless technologies such as infrared, radio, and microwave, then the coaxial cable, fiber optic cable, twisted pair, DSL, or wireless technologies such as infrared, radio, and microwave are included in the definition of medium. It should be understood, however, that computer-readable storage media and data storage media do not include connections, carrier waves, signals, or other transient media, but are instead directed to non-transient, tangible storage media. Combinations of the above should also be included within the scope of computer-readable media.

[0136] Instructions may be executed by one or more processors, such as one or more DSPs, general purpose microprocessors, ASICs, FPGAs, or other equivalent integrated or discrete logic circuitry. Accordingly, the term “processor” and “processing circuitry,” as used herein may refer to any of the foregoing structure or any other structure suitable for implementation of the techniques described herein. Also, the techniques could be fully implemented in one or more circuits or logic elements.

[0137] The techniques of this disclosure may be implemented in a wide variety of devices or apparatuses, including, an integrated circuit (IC) or a set of ICs (e.g., a chip set). Various components, modules, or units are described in this disclosure to emphasize functional aspects of devices configured to perform the disclosed techniques, but do not necessarily require realization by different hardware units. Rather, as described above, various units may be combined in a hardware unit or provided by a collection of interoperative hardware units, including one or more processors as described above, in conjunction with suitable software and / or firmware.

[0138] Various examples of the disclosure have been described. These and other examples are within the scope of the following claims.

Claims

WHAT IS CLAIMED IS:

1. A medical device comprising: an application specific instruction processor (ASIP) comprising: a programmable state machine; a memory configured to store instructions for execution with the programmable state machine that when executed cause the programmable state machine to perform an operation of the medical device to generate first data that is to be stored or process second data that is received; and file manager circuitry configured to manage access of the instructions and variables of the instructions by the programmable state machine; and a microcontroller unit (MCU) that is separate and distinct from an application specific integrated circuit (ASIC) that includes the ASIP, wherein the MCU comprises one or more central processing units configured to execute an application to process the first data or generate the second data that is processed by the ASIP.

2. The medical device of claim 1, wherein the instructions comprise high-level operation codes excluding compiled assembly instructions.

3. The medical device of any of claims 1 and 2, wherein the memory comprises static random-access memory (SRAM).

4. The medical device of any of claims 1-3, wherein the ASIC further comprises a local oscillator configured to output a local clock signal to the programmable state machine.

5. The medical device of any of claims 1-4, wherein the memory is configured to store the instructions as a file, wherein the file manager circuitry is configured to access the file from the memory based on an index, defined by the file, that indicates a starting memory location in the memory.

6. The medical device of any of claims 1-5, wherein the ASIP is a sense ASIP, wherein the instructions comprise instructions that cause the programmable state machine to: receive signals from one or more electrodes coupled to the medical device; process the signals to generate the first data; and store the first data for access by the MCU.

7. The medical device of any of claims 1-5, wherein the ASIP is a stimulation ASIP, wherein the instructions comprises instructions that cause the programmable state machine to: receive the second data indicative of a stimulation program to execute, wherein the memory is configured to store instructions of a plurality of stimulation programs; and execute the stimulation program to cause one or more electrodes coupled to the medical device to deliver electrical stimulation therapy.

8. The medical device of any of claims 1-5, wherein the ASIP is a sense ASIP configured to receive signals from one or more electrodes coupled to the medical device and generate the first data, and wherein the medical device comprises a stimulation ASIP configured to receive the second data and cause one or more electrodes coupled to the medical device to deliver electrical stimulation therapy based on the second data.

9. The medical device of any of claims 1-8, wherein the medical device is one of a tibial nerve stimulator, sacral nerve stimulator, deep brain stimulator, spinal cord stimulator, drug pump, sleep apnea stimulator, cardiac pacemaker, and defibrillator.

10. The medical device of any of claims 1-9, wherein the medical device is an implantable medical device.

11. A method of a medical device, the method comprising: accessing, from memory and with file manager circuitry of an application specific instruction processor (ASIP) of an integrated circuit (ASIC) of the medical device, instructions and variables of the instructions for execution by a programmable state machine of the ASIP; executing, with the programmable state machine of the ASIP, the instructions to perform an operation of the medical device to generate first data that is to be stored or process second data that is received; and executing, with one or more central processing units of a microcontroller unit (MCU) of the medical device that is separate and distinct from the ASIC, an application to process the first data or generate the second data that is processed by the ASIP.

12. The method of claim 11, wherein the instructions comprise high-level operation codes excluding compiled assembly instructions.

13. The method of any of claims 11 and 12, wherein the memory comprises static randomaccess memory (SRAM).

14. The method of any of claims 11-13, further comprising: outputting, with a local oscillator of the ASIC, a local clock signal to the programmable state machine.

15. The method of any of claims 11-14, wherein the memory is configured to store the instructions as a file, wherein accessing comprises accessing the file from the memory based on an index, defined by the file, that indicates a starting memory location in the memory.

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