PMUT apparatus and its fabrication method

Abstract

A piezoelectric micromachined ultrasound transducer (PMUT) comprises a sacrificial layer (106) and at least one cavity (120') within a stack (104) of layers. Each of the at least one cavity (120') is laterally limited by a barrier structure (116). The barrier structure (116) extends through the thickness of the sacrificial layer (106) that is within the stack (104) of layers. The barrier structure (116) is resistive to an etching agent of the sacrificial layer (106). The PMUT comprises at least one hole (124) and / or an opening (300) each being associated and connected with each of the at least one cavity (120'). Each of the at least one hole (124) extends through a first layer arrangement (108') of the stack (104) and connects with a cavity of the at least one cavity (120'), and the opening (300) extends through a second layer arrangement (110') of the stack (104) and connects with a cavity of the at least one cavity (120'). The at least one hole (124) is smaller than the cavity area (120) which the at least one hole (124) is associated with. The opening (300) is equal to or smaller than the cavity area (120) which the opening (300) is associated with.

Description

[0001]PMUT^apparatus^and^its^fabrication^method Field The invention relates to a piezoelectric micromachined ultrasonictransducer (PMUT) and its fabrication method. Background The most commonly used method for fabricating a conventional low- frequency piezoelectric micromachined ultrasonic transducer (PMUT) involves backside Deep Reactive Ion Etching (DRIE) to define the dimension of membrane.The backside DRIE is typically used for frequency less than 1 MHz. While the DRIEis effective, per^se, it introduces lateral dimensional variations caused by the lateraletching effect, leading to non-uniformity both within a wafer and between differentwafers. This kind of non-uniform size variation is a technical problem because thediameter of the PMUT is a key factor in determining its resonance frequency. Even a slight variation within the range of a few micrometers can cause a significant shift in the resonance frequency of the PMUT, for example. The operating frequency of PMUT plays a crucial role in determining its mechanical, electrical, and acoustic properties. Therefore, it is important to maintain consistent and predictable frequencies and performance across different PMUT devices especially for air- coupled applications. Additionally, the DRIE-based PMUT structures have another technicalfeature, which needs improvement. A minimum distance between two directlyadjacent PMUT membranes of a PMUT array may be desired smaller than what the fabrication method allows. This distance is necessary to prevent interference between two membranes and to maintain the structural integrity. This minimum distance constraint reduces the filling factor of PMUT membranes in an array andthis, in turn, may reduce the performance of a PMUT array. Brief^description The present invention seeks to provide an improvement in the PMUT and its fabrication. The invention is defined by the independent claims. Embodiments are defined in the dependent claims. If one or more of the embodiments is considered not to fall under the scope of the independent claims, such an embodiment is or such embodiments are still useful for understanding features of the invention. List^of^drawings Example embodiments of the present invention are described below, by way of example only, with reference to the accompanying drawings, in which Figures 1A to 1I illustrate examples of fabrication phases of a micro-electromechanical system apparatus; Figures 2A to 2G illustrate further examples of fabrication phases of amicro-electromechanical system apparatus; Figure 3 illustrates an example of a single unit of a micro- electromechanical system apparatus, the single unit having an open backside; Figure 4 illustrates an example of a photolithographic layer formed witha pattern of the trench pattern on the first layer arrangement; Figure 5 illustrates an example of a circular unit of a micro-electromechanical system apparatus; Figure 6 illustrates an example of a conical unit of a micro-electromechanical system apparatus; Figure 7 illustrates an example of a matrix of circular units of a micro-electromechanical system apparatus; Figure 8 illustrates an example of a matrix of conical units of a micro-electromechanical system apparatus; Figures 9 and 10 illustrate examples of locations of etch holes of a single unit of a micro-electromechanical system apparatus; Figures 11 and 12 illustrate examples of the profiles of the etch holes; and Figure 13 illustrates of an example of a flow chart of a fabrication method. Description^of^embodiments The following embodiments are only examples. Although the specification may refer to “an” embodiment in several locations, this does not necessarily mean that each such reference is to the same embodiment(s), or that the feature only applies to a single embodiment. The articles “a” and “an” give a general sense of entities, structures, components, compositions, operations, functions, connections or the like in this document. Note also that singular terms may include pluralities. Single features of different embodiments may also be combined to provide other embodiments. Furthermore, words "comprising" and "including" should be understood as not limiting the described embodiments to consist of only those features that have been mentioned and such embodiments may also contain features / structures that have not been specifically mentioned. All combinations of the embodiments are considered possible if their combination does not lead to structural or logical contradiction. Figs 1A to 1I show an example of a stack 104 of layers from side invarious phases of a fabricating process of a piezoelectric micromachined ultrasonictransducer (PMUT) apparatus. Apurpose of the fabrication method is to form one or more sacrificiallayers 106 and surround them by material layers (108, 110 and 116’). Thesurrounding layers (108, 110 and 116’) are resistive to etchant(s) used to etch theone or more sacrificial layers 106. Removal of the one or more sacrificial layers 106results in one or more cavities 120 within the material layers (108, 110 and 116’).In this document, the word resistive may also mean resistant. Note that because layer 108 is etchant resistive, layer 118 does not necessarily need to be etchant resistive. Correspondingly, when applying layer 116’ and because layer 116’ isetchant resistive, layer 118 does not necessarily need to be etchant resistive andlayer 110 is etchant resistive, while layer 114 does not necessarily need to be etchant resistive. Note that layers 108, 110 and 116’ may be made of SiO2, Si3N4 or Al2O3, for example. In the fabricating process silicon Si is used as a material for thesacrificial layer 106 and the material layers resistive to the etchant(s) of thesacrificial layer 106 are made of silicon dioxide SiO2. Silicon may mean singlecrystalline silicon, polysilicon or amorphous silicon. When silicon is used as a material of the sacrificial layer 106, aseparate wall arrangement 116’ may be formed by depositing silicon dioxide on the walls of the trench 100. Arefill layer 118 may then be, like the sacrificial layer 106, made ofpolycrystalline or amorphous silicon in order to allow planarizing. The wallarrangement 116’ comprises walls 116’’ between which the refill layer 118 isdeposited. Because the refill layer 118 is polished, it only remains in the trench100. The etchant resistive layer 110 is in contact with the sacrificial layer 106. Inthe case of a silicon on insulator substrate, the wall arrangement 116’ may be of silicon dioxide. After these process steps a chemical-mechanical planarization process (CMP) is carried out. The stack 104 of layers comprises substrate 114 between two layers110, 130, which are etchant resistive layers. The two layers 110, 130 act as theetchant resistive material. In fabrication phase of Fig. 1A, a sacrificial layer 106 isdeposited on the second etchant resistive layer 110. The layers 110, 114 and 130may form a bottom layer 110’ of the stack 104.As shown in an example of Fig. 1B, a trench 100 of a trench pattern102 is formed to the stack 104 of layers. The trench 100 can be considered a groove.The trench 100 can be formed by etching, for example. The trench 100 of the trenchpattern 102 extends in a direction of a normal N of a surface of the sacrificial layer106 through the sacrificial layer 106. The trench 100 forms the trench pattern 102to the sacrificial layer 106 in lateral directions i.e. the pattern can be observed fromabove of the stack 104. The trench pattern 102 can be seen in Figs.5 and 6 (see alsothe corresponding pattern in Fig.4 where pattern 102’ follows closely the trench pattern 102). The trench pattern 102 of the trench 100 may laterally confine a desired section of the sacrificial layer 106 and it may be of any shape such ascircular or conical, for example. The trench pattern 102 thus defines a boundarythat may enclose a cavity area 120 of a PMUT apparatus within the trench pattern102. In other words, the trench pattern 102 defines the boundary of the cavity area120 laterally or sidewise, while the top and bottom boundaries of the cavity area120 are defined by layers 108 and 110. A plurality of trench patterns 102 may thendefine boundaries that may enclose the plurality of cavity areas 120 that may be utilized for fabrication of an array of micro-electromechanical system components. It is a technical advantage that the trench 100 may be about micron in size / width or a sub-micron in size / width. That small size enables reducing dishing during chemical mechanical planarization (CMP), which results in improved planarity. In an embodiment, the trench pattern 102, however, does notnecessarily fully enclose a section of the sacrificial layer 106. In some cases, it maybe enough the trench pattern 102 only partly forms an outline of the cavity area 120. Fig. 1C illustrates an example of a barrier structure 116 of the trench100. The barrier structure 116 comprises the wall arrangement 116’ with one ortwo walls. The barrier structure 116 comprises a wall arrangement 116’ and a refill layer 118 within the trench 100 between walls 116’’ of the wall arrangement 116’.The barrier structure 116 or the two walls 116’’ that are resistive and / or immuneto an etching process that is directed material of the sacrificial layer 106 at least part of which is removed by the etching process of the fabrication process. The wallarrangement 116’ may be formed by modifying a surface structure of the sacrificiallayer 106 of the trench 100. Alternatively, the etchant resistive wall arrangement116’ may be added to the trench 100. The adding may be performed by deposition, for example.In an embodiment, the thermal process forms a first etchant resistivelayer 108 on the surface of the sacrificial layer 106. That may mean that thethermal process forms the first etchant resistive layer 108 of the surface of thesacrificial layer 106. Particularly, the thermal process forms an oxidized layer i.e.wall arrangement 116’ that is etchant resistive in the trench 100. The thermalprocessing for the oxidation needed in the barrier structure 116 and the etchantresistive layers 108, 110 may be performed such that polycrystalline silicon of thesacrificial layer 106 is kept at a certain temperature, for example about 900°C without limiting to this, and inside gas which contains oxygen (O2or H2O, for example) and potentially inert gas such as nitrogen without limiting to this. A person skilled in the art is familiar with the thermal process, per^se. Fig. 1C also illustrates an example of a refill in the trench 100. The refilllayer 118 may be deposited on the stack 104 of layers and it will cover the firstetchant resistive layer 108. The refill layer 118 may be of polysilicon or the like. In that manner, the trench 100 may be refilled. As shown in Fig.1D, the refill layer 118 that refills the trench 100 may be planarized. The planarization may be performed by a chemical mechanical polishing (CMP), for example, which the person skilled in the art is familiar with. The purpose of the planarization is to make the surface flat. The refill layer 118 may be etchant resistive. In this manner, the trench 100 filled with the etchant resistive materialwill become the barrier structure 116. After the CMP, the refill layer 118 remains only inside of the trench 100. The material inside the trench 100 can be thermally oxidized, or oxide layer(s) or other suitable layers may be deposited on it. Fig. 1D illustrates an example of deposition of a second electrode layer150 that is so called a bottom electrode. The second electrode layer 150 iselectrically conductive. In an embodiment, the second electrode layer 150 mayinclude mainly molybdenum, platinum and / or aluminum without limiting to these.The second electrode layer 150 may be patterned.Fig. 1E illustrates an example of the stack 104 of layers withpiezoelectric layer 152 on the second electrode layer 150. The piezoelectric layer 152 may be made of aluminum nitride (AIN), scandium-doped AIN, lead zirconatetitanate (PZT), or the like. The piezoelectric layer 152 may be patterned.Fig. 1F illustrates an example of deposition of a first electrode layer 154on the piezoelectric layer 152. The first electrode layer 154 may be called a topelectrode. The first electrode layer 154 may be patterned and it may cover only apart of piezoelectric layer 152. The first electrode layer 154 is electricallyconductive. The first electrode layer 154 may be of the same material as or differentfrom the second electrode layer 150. A person skilled in the art is familiar withelectrode materials, per^se, in this kind of applications. Fig. 1G illustrates an example of a protective layer 156 on the secondelectrode layer 154. The protective layer 156 protects and supports the other layers. The second protective layer 156 may be of the same material as or ofdifferent material from the first etchant resistive layer 108. There are twopossibilities for designing PMUTs: 1) In the first case, the protective layer 156 may be etchant resistive,while the first etchant resistive layer 108 functions as the structural layer. Thepurpose of the structural layer is to move the stress neutral plane away from the piezoelectric layer. 2) In the second case, the protective layer 156 may serve as both the protective and structural layer. Fig. 1H illustrates an example the stack 104 of layers with a hole 124 through first layered arrangement 108’ that may include the protective layer 156,the piezoelectric layer 152 and the first oxidized layer 108 up to the sacrificial layer106. The protective layer 156 may be oxidized layer resistive to the etch agent. Thehole 124 may be made by etching. Note that the inner surface of the hole 124comprises layers 108, 156 of etchant resistive material and piezoelectric layer 152that are resistive to etching. That is, the hole 124 is also well defined and accuratein dimensions. The protective layer 156 or any etchant resistive layer is chosen tobe resistive to etching performed during the final releasing step that is performedafter steps 1A to 1I or 2A to 2G. For example, if silicon is used as a sacrificial layer106, silicon dioxide may be used as an etchant resistive layer. Fig. 1I illustrates an example of etching of the sacrificial layer 106through the hole 124. The etch agent may include xenon difluride. Because thesacrificial layer 106 in the cavity area 120 is surrounded by etchant resistive layers108, 110 and wall arrangement 116’ of the barrier structure 116, a well definedcavity 120’ is formed in the cavity area 120. The sacrificial layer 106 means a layer on which one or more layers, such as the membrane 200, can be deposited / formed. The sacrificial layer 106 itself is on a supporting layer such as the second layer arrangement 110’. Figs 2A to 2G illustrate examples of phases of the method of fabricatinga unit of the PMUT with a single cavity. In general, the PMUT may comprise one ormore cavities that may be arranged as an array, for example. Figs 2A to 2G show astack 104 of layers from side. As shown in Fig. 2A, the trench 100 of the trenchpattern 102 is formed to the stack 104 of layers. The stack 104 of layers comprises the sacrificial layer 106 comprisingsacrificial material between the first layer arrangement 108’ and the second layerarrangement 110’. The first layer arrangement 108’ and the second layerarrangement 110’ may comprise the etchant resistive layers 108, 110 andpotentially other layers. The sacrificial layer 106 may then be amorphous silicon and / or polysilicon. A substrate 114 is included in the second layer arrangement 110’. The trench 100 can be considered a groove. The trench 100 of the trench pattern 102 extends in a direction of a normal N of a surface of the sacrificial layer106 through the sacrificial layer 106 that is inside the stack 104. The trench 100forms a pattern to the sacrificial layer 106 in lateral directions i.e. the pattern can observed from above of the stack 104. The trench pattern 102 of the trench 100 may laterally confine a desired section of the sacrificial layer 106 and it may be circular or conical, for example. The trench pattern 102 defines a boundary that may enclose a cavity area 120 of a micro-electromechanical system apparatuswithin the trench pattern 102 as already explained in association with Fig. 1B.Fig.2B shows how the barrier structure 116 of the trench 100 is formed.The barrier structure 116 comprises wall arrangement 116’ that is resistive and / or immune to an etching process that is directed material of the sacrificial layer 106 at least part of which is removed by the etching process of the manufacturingprocess. The wall arrangement 116’ may be formed by modifying a surfacestructure of the sacrificial layer 106 of the trench 100. Alternatively, an etchantresistive wall arrangement 116’ may be added to the trench 100. The adding maybe performed by deposition, for example, as already explained in association with Fig.1C. As shown in Fig.2C, a refill layer 118 of polysilicon or the like may bedeposited on the stack 104. In that manner, the trench 100 may be refilled asalready explained in association with Fig.1C. The filling of the trench 100 may be performed prior to the removal of the sacrificial material of the sacrificial layer 106 within the stack 104 through the at least one hole 124. As shown in Fig.2D, the refill layer 118 that refills the trench 100 maybe planarized. The planarization may be performed by a chemical mechanicalpolishing (CMP), for example, which the person skilled in the art is familiar with. In an embodiment, the planarization may be performed by an etch-backprocedure which refers to etching a certain depth in a controlled manner. However,the etch-back procedure may produce a shallow recess at the trench 100 depending upon the over-etch process. The CMP process is preferred for its characteristic negligible recess but may not always be required. Relating to Figs. 1B to 2G, a cross section of the trench 100, examples ofwhich are illustrated in Figs. 11 and 12, may be rectangular or conical in a viewfrom side. The rectangular cross section means the diameter of the trench is at least approximately constant as a function of depth of the trench 100. The conical cross section means the diameter of the trench 100 may vary linearly or non-linearly as function of the depth. In other words, the profile of the trench 100 may be etched as either a vertical trench such that the cross section is rectangular or a tapered trench such that the cross section varies as a function of the depth. The tapered trench may be more easily filled with polysilicon but does involve some geometric constraints (the trench width, taper, and polysilicon thickness are all inter-related). Next, an additional layer 122 that means the electrode layers 150, 154 and the protective layer 156 can be deposited on the stack 104 as shown in Fig.2E. The potential additional layer 122 can be patterned and at least one hole 124, each of which may be called a ventilation hole, is formed through a first layer arrangement 108’ that includes the additional layer 122 as shown in Fig.2F. Fig.2F shows only one hole 124 but the number of holes 124 is not limited to one. That means the at least one hole 124 fully penetrates the first layer arrangement 108’including the additional layer 122 and the first etchant resistive layer 108 up to thesacrificial layer 106. The hole 124 enables removal of material of the sacrificiallayer 106. A cross sectional area of a single hole 124 alone or a total cross sectional area of the holes 124 relating to a single cavity area 120 is smaller than the cavity area 120 which the one or more holes 124 are associated with (the cavity area 120 is illustrated in Fig.2G). Additionally or alternatively, an opening 300 through a second layer arrangement 110’ may be formed in a similar manner. The size of the opening 300 is equal to or smaller than the cavity area 120 which the opening 300 is associated with. That is explained in detail in association with Fig.3. Fig.2G illustrates the stack 104 that is etched through the at least one hole 124. Sacrificial material of the sacrificial layer 106 is removed from the at least one cavity area 120 through the at least one hole 124 by a process of etching for forming at least one cavity 120’ within the stack 104. The cavity 120’ is confined bythe barrier structure 116 because the barrier structure 116 is resistive or immuneto an etching process. That is, the etching does not affect the barrier structure 116or the wall arrangement 116’. As material of the sacrificial layer 106 is removed,the cavity area 120 becomes hollow i.e. the stack 104 of layers of the PMUT apparatus comprises the cavity 120’. The layer structure on the cavity 120’ is a membrane 200 that can be used as a sensing element of a sensor such as a transducer that may receive and / or transmit signals such as ultrasound, for example. In a similar manner, a plurality of cavities 120’ can be formed. Themembrane 200 corresponds to the cavity area 120 of the PMUT. The PMUT may beused in acoustics and ultrasonic applications. In an embodiment an example of which is illustrated in Fig. 3, an opening 300 may be formed through the second layer arrangement 110’ thatcomprises the second etchant resistive layer 110, the substrate 114 and the thirdetchant resistive layer 130 associated with each of the at least one cavity area 120, for example. The opening 300 may be considered an alternative to the hole 124. Itcan be considered that the opening 300 is on the backside of the stack while thehole 124 is on the frontside of the stack. The circumference of the opening 300 may be deposited by SiO2, Si3N4or Al2O3such the side walls 302 of the opening 300 are etch resistive. The sacrificial material of the sacrificial layer 106 belonging to the cavity area 120 may then be removed from within the stack through the opening 300 for forming the cavity 120’ in a similar manner and in a correspondingfabricating phase with that of the hole 124 illustrated in Figs 1A to 1I and Figs 2Ato 2G. These kinds of structures with the barrier structure 116 have a high qualityand low performance variation compared with the desired PMUT. With reference to Figs 1A to 1I and 2A to 2G and their common features,the method of fabricating a piezoelectric micromachined ultrasonic transducer(PMUT) apparatus can be performed as follows. A trench pattern 102 is formed tothe stack 104 of layers of the PMUT. The trench 100 of the trench pattern 102extends through the sacrificial layer 106 that is within the stack 104. The trenchpattern 102 defines the boundary to at least one cavity area 120 of the micro-electromechanical system apparatus. The barrier structure 116 is resistive to the etching process of materialof the sacrificial layer 106. The wall arrangement 116’ of the barrier structure 116may have one or two walls that are resistive to an etching process of material ofthe sacrificial layer 106. Material of the refill layer 118 may be between the walls. Relating to each of the cavity areas 120, the at least one hole 124 can be formed through a first layer arrangement 108’ that is formed on and in contact with the sacrificial layer 106. Additionally or alternatively, the opening 300 can beformed through a second layer arrangement 110’ of the stack 104. The second layerarrangement 110’ is in contact with the sacrificial layer 106 on a side of the sacrificial layer 106 opposite to that of the first layer arrangement 108’. The at least one hole 124 is smaller than the cavity area 120 which the at least one hole 124 isassociated with. The opening 300 is equal to or smaller than the cavity area 120which the opening 300 is associated with. The total cross-sectional area of holes 124 associated with a cavity 120’ is smaller than the area of the membrane 250. Material of the sacrificial layer 106 is removed from the at least one cavity area 120 through the at least one hole 124 or the opening 300 by a processof etching for forming at least one cavity 120’ within the stack 104. Each of the atleast one cavity 120’ is confined by one of the barrier structures 116.The stack 104 of layers 104 may comprise the sacrificial layer 106 thatis between a first layer arrangement 108’ and a second layer arrangement 110’.In an embodiment, a photolithographic layer 200 with a pattern 102’similar to the trench pattern 102’ may be deposited on the first layer arrangement108’. The trench pattern 102’ and the trench 100 may be formed to the sacrificiallayer 106 in a subtractive etching process. The photolithographic layer 200 has apattern 102’ similar to the trench pattern 102 and the form of the patterns 102, 102’ follow each other. In an embodiment, the trench 100 may be filled prior to the removal ofthe material of the sacrificial layer 106 within the stack 104 through the at leastone hole 124. In an embodiment, the trench 100 may be filled with the refill layer 118by chemical vapor deposition process. Planarization of the trench 100 filled withthe refill layer 118 may be performed by chemical mechanical polishing.In an embodiment, the wall arrangement 116’ of the barrier structure116 may be formed by a thermal oxidation process.In an embodiment, the etching agent of the etching process includesxenon difluoride etching. In an embodiment, the additional layers 122 may be formed to the stack104 of layers of the PMUT prior to the removal of the material of the sacrificial layer106. Figs 5 and 6 illustrate examples of the trench pattern 120. In an embodiment, the thickness T of the barrier structure 116 may be made be in arange 0.3 µm to about 2 µm. As a result, a minimum distance between two directlyadjacent cavity areas depends on the thickness of the barrier structure 116. The etching of the trench 100 and the sacrificial layer 106 can be made accurately,which is based on the etchant resistive barrier structure 116. That means themembranes 250 of directly adjacent operational units such as sensors or transducers may also be at a similar distance from each other. A device with a densely distributed units of the micro-electromechanical system apparatuses can thus be made as illustrated in Figs 7 and 8. In an embodiment as shown in Figs 5 and / or 6, a thickness T of thebarrier structure 116 may be made to be between about 0.3 µm to about 2 µm. Thenthat is at least about the same as the minimum distance between any two directlyadjacent membranes 250.In an embodiment as shown in Fig. 2E, a depth D of the cavity 120’ maybe to be in a range about 0.5 µm to about 25 µm.In an embodiment, the depth D of the barrier structure 116 may bebetween about 0.5 µm and about 25 µm.In an embodiment an example of which is illustrated in Fig. 3, anopening 300 may be formed through the second layer arrangement 110’ of each ofthe at least one cavity area 120. Then the material of the sacrificial layer 106belonging to each of the at least one cavity area 120 may be removed from withinthe stack 104. This opening 300 can be considered to be on the backside of the stack104. In an embodiment, the second layer arrangement 110’ may comprise athird etchant resistive layer 130.In an embodiment, the sacrificial layer 106 comprises a polysiliconlayer. In an embodiment, the sacrificial layer 106 is made of polysilicon.In an embodiment, the PMUT may be fabricated by the method stepsdescribed in association with Figs 1A to 1I, and / or Figs. 2A to 2G.Figs 7 and 8 show membranes 250 over the cavities 120’. The cavities120’ and membranes 250 can be defined precisely in the presented method. A full wafer can be released with no visible failures. Only two holes 124 have referencenumbering but all the membranes 250 have the holes in Figs 7 and 8.Figs 9 and 10 illustrate apparatus units of the micro-electromechanical system apparatus. Fig.9 illustrates an example where there are plurality of holes 124 (only a few marked) through the membrane 250 and the first layerarrangement 108’. Cross sections of the holes 124 may be of any shape. The crosssections of the holes 124 may be ellipses, circles, triangles, squares, rectangles, ormore generally regular or irregular polygons or non-polygons, for example.Examples of non-polygons are the shape of a crescent and a heart shape. Fig.9 also illustrates an example where there is a hole 124 in the middle of the conical unit. Fig.10 illustrates an example where the holes 124 are oblong and curved. The first layer arrangement 108’ comprises electrically conductive layers for electric operation of the micro-electromechanical system apparatus in a manner that a person skilled in the art is familiar with. Thus, each of the units of the micro- electromechanical system apparatus may be used as a transducer, a sensor or a component causing mechanical movement, for example. The layered structure presented in this document has the barrier structure 116 for each cavity 120’, the barrier structure 116 defining the dimensions of the membrane 250 and the cavity 120’ laterally. Note also that during the fabrication the trench pattern 100’ defines the shape of the barrier structure 116 because the walls 116’ of the trench 100 with the refill layer 118 between the walls 116’ form the barrier structure 116. There are a plurality of advantages of this approach over the prior art. Improved performance uniformitywithin devices, across wafer and from wafer to wafer, resulting in higher yield isone of them. Smaller spacing between the membranes 250 within an array, in turn, enhances the active area. The fabrication method minimizes variation between sensors and calibration can also be simplified. Regarding the PMUT, that leads to better transmit and receive performance and / or smaller array size. The PMUTs can be fabricated with frequencies from about 100 kHz to about 15 MHz. There is also a possibility to reliably fabricate PMUT with different specification (membrane dimensions) within a single wafer. This document thus demonstrates the barrier structure 116 thatconfines each cavity 120’. These barrier structures 116 and other enchant resistivelayers can withstand long over-etch times without leaking. It is possible that thefabricated the device structure such that there is only a narrow strip of remaining silicon of the barrier structures 116 between membranes 250 for making a tightlypacked membrane matrix. When the lateral dimension of the membrane can beaccurately fabricated, undesired variation of the operation can be minimized in the end product. Additionally, other dimensions become also accurate. This process eliminates topography, improves lithography and etch processes, and additionally eliminates stress-concentrations and related failures. The barrier structure 116 can be fabricated with a standard processes. The method can be applied to large and small wafer sizes and alternative fabrication sites. In conclusion, isolating barriers based on shallow trenches etched through polysilicon or SOI device layers, filled and planarized, confine the XeF2 release etch process. The result is a precisely defined cavity 120’ and membrane 250. The confining barrier structures 116 offer the following benefits to MEMS devices in general: 1) After the sacrificial material is consumed, the result is a free-standing membrane or structural element 250 over a lithographically defined cavity 120’. 2) The process with the barrier structures 116 allows the fabrication of multiple free-standing membrane sizes in a single wafer or even within a single chip. 3) The dimension of the membrane 250 is not dependent upon the quality of the DRIE release etch, which may therefore be accomplished by lower- performing recipe or etch tool. 4) The process with the barrier structures 116 allows to make very small and very large diameter membranes 250 simultaneously and on the same wafer. Releasing the largest membranes by backside DRIE becomes impractical due to membrane fractures, whereas the membranes 250 confined by the barrier structures 116 are not subjected to the difficult DRIE process after release. 5) The barrier structure 116 enables the fabrication of individual membrane array elements with very close (~2 µm) spacing. This is particularly relevant for the fabrication of dense arrays of devices. 6) Flexible interconnecting passageways between adjacent elements offers the possibility of engineered backside dimensions of the opening 300 for acoustic tuning. 7) With a sufficiently thick sacrificial layer 106 (for example, 10 µm of polysilicon) the cavity 120’ becomes deep enough to circumvent the need for a backside release etch. That means the opening 300 is not needed. This minimum thickness (or depth) is application specific, depending upon the device requirements. For example, film-bulk-micromachined resonators are not degradedby the squeeze-film damping and may thus use a thin release layer, whereas PMUTsrequire a thicker layer and deeper cavity 120’ to prevent squeeze-film damping without a backside release hole. A ready-made piezoelectric micromachined ultrasound transducer(PMUT) comprises a sacrificial layer 106 and at least one cavity 120’ within a stack104 of layers. Each of the at least one cavity 120’ is laterally limited by a barrierstructure 116. The barrier structure 116 extends through a whole thickness of thesacrificial layer 106 that is within the stack 104 of layers. The barrier structure 116is resistive to an etching agent of the sacrificial layer 106 used in a fabricationphase. The PMUT comprises at least one hole 124 and / or an opening 300 each being associated and connected with each of the at least one cavity 120’. Each ofthe at least one hole 124 extends through a first layer arrangement 108’ of the stack104 and connects with a cavity of the at least one cavity 120’. The opening 300extends through a second layer arrangement 110’ of the stack 104 and connectswith a cavity of the at least one cavity 120’. The at least one hole 124 is smaller thanthe cavity area 120 which the at least one hole 124 is associated with. The total cross-sectional area of holes 124 associated with a cavity 120’ is smaller than thearea of the membrane 200. The opening 300 is equal to or smaller than the cavityarea 120 which the opening 300 is associated with. A minimum distance between two directly adjacent PMUT membranes of a PMUT array is often desirable to be in the range of a few tens of micrometers and that is possible for the fabrication method presented in this document. Because the etching, which is directed to the sacrificial layer 106 for removing the sacrificial layer 106, does not affect the barrier structure 116, thewalls 116’ and the etchant resistive layers 108, 110 remain smooth and welldefined. Thus, material roughness and dimensional variation of the cavity 120’ is eliminated or it is minimal. Thus, variation of the volume of the cavity 120’ and in the effective radius of the membrane 250, the variation being insignificant or within required tolerance, do not technically affect the operational frequency or sensitivity of the micro-electromechanical system apparatus. In an implementation of an ultrasonic device, for example, the piezoelectric and electrode layers included in the first layer structure 108’, are constructed on the wafer frontside and then the device is released from the substrate that is a part of the second layer structure 110’ by etching away the backside of the wafer using the DRIE. These long etch processes can take over 1 hour per wafer. The effective radius of the membrane 250 and the cavity 120’ is determined by this long release etch process. Hence, the immunity of the barrier structure 116 to the etch process leads to improvement of the dimensions of the membrane 250, the cavity 120’ and the quality of the end product. In an embodiment examples of which are illustrated in Figs 5 and 6 , thethickness T of the barrier structure 116 may be made to between about 2 µm toabout 0.3 µm. As a result, a minimum distance between two directly adjacent cavityareas 120 may also be about equal to or less than 5 µm, or about equal to or larger than 2 µm because the etching of the trench 100 and the sacrificial layer 106 canbe made accurately, which is based on the etch resistive barrier structure 116. Thatmeans the membranes 250 of directly adjacent operational units such as sensors or transducers may also be at a similar distance from each other. A device with a densely distributed units of the micro-electromechanical system apparatuses canthus be made as illustrated in Figs 7 and 8.A lithographically defined radius of the membrane 250 may offer the potential for better control of membrane resonance. The barrier structure 116 is defined by depositing a polysilicon layer (thickness T of barrier structure 116 may be between about 0.3 µm to about 2 µm and depth D may be between about 0.5 µm to 25 µm, for example) on an oxide and then using conventional lithography and etching to form the trench 100 (< 1 µm, for example) through the sacrificial layer. The etched trench 100 may then be lined and filled primarily with insulators whichare resistive to etching agent attack (for example, SiO2, Si3N4, Al2O3). Next,conformal filling with polysilicon is also useful to ensure the absence of voids within the filled trench and furthermore allows easy planarization with a CMPprocess design to stop on the upper mask oxide layer 108. After CMP, an additionalinsulator deposition may be performed. The construction of the electrode and piezoelectric layers in the first layer arrangement 108’ and / or in the second layer arrangement 110’ may then carried out normally. After the deposition and patterning of the piezoelectric and electrode layers that are included in the first layer arrangement 108’ to form the transducer or a sensor element, for example, a final lithography and etch step is needed to reveal the buried polysilicon layer. This opening need only be a small hole 124 or pattern of vent-like holes 124 to allow the etching agent gas access to the polysilicon. During the etching agent, the gas will etch and remove the now buried polysilicon from the area surrounded laterally by the barrier structure 116 thus forming the cavity 120’. The membrane 250 above the cavity 120’, which forms the basis of the ultrasonic transducer or a pressure sensor, for example, is fully defined by the surrounding barrier structure 116. A high degree of flatness after barrier creation is achieved. The filling layer 118 deposited on the wafer after etching the trench 100 also covers the top surface of the wafer. When the conformal deposition of the void-free trench filler layer 118 (polysilicon, for example) is performed, the material of the barrierstructure 116 serves as both the lateral etch (XeF2) stopper, and also vertical etch (CMP) stopper beneath the polysilicon. The trenches 100 can be made narrow (< 1 µm) and the dishing of the trenches 100 is less than < 50 nm. That enables further lithographic steps to proceed unhindered by any significant topographic issues. Figure 13 is a flow chart of the fabrication method. In step 1200, atrench pattern 102’ is formed to a stack 104 of layers of the PMUT, the stack (104) comprising a sacrificial layer (106) between a first layer arrangement (108’) and a second layer arrangement (110’), the trench 100 of the trench pattern 102’ extending through a sacrificial layer 106, and the trench pattern 100 defining a boundary to at least one cavity area 120 of the PMUT. In step 1202, a barrier structure 116 is formed to the trench 100, the barrier structure (116) comprising a wall arrangement (116’) and a refill layer (118) within the trench (100) between walls (116’’) of the wall arrangement(116’), the barrier structure 116 being resistive to an etching process of materialof the sacrificial layer 106 and a thickness (T) of the barrier structure (116) beingin a range 0.3 µm to 2 µm. In step 1204, relating to each of the cavity areas 120, at least one hole 124 is formed through a first layer arrangement 108’, and / or an opening 300 is formed through a second layer arrangement 110’ of the stack 104. The first layerarrangement 108’ is in contact with the sacrificial layer 106, which is formed onand in contact with the sacrificial layer (106). In step 1206, material of the sacrificial layer 106 is removed from the at least one cavity area 120 through the at least one hole 124 or the opening 300 by a process of etching for forming at least one cavity 120’ within the stack 104, each of the at least one cavity 120’ being confined by one of the barrier structures 116. It will be obvious to a person skilled in the art that, as technology advances, the inventive concept can be implemented in various ways. The invention and its embodiments are not limited to the example embodiments described above but may vary within the scope of the claims.

Claims

What^is^claimed^is:

1. A method for manufacturing a piezoelectric micromachinedultrasonic transducer (PMUT) apparatus, c h a r a c t e r i z e d byforming (1200) a trench pattern (102’) to a stack (104) of layers of thePMUT, the stack (104) comprising a sacrificial layer (106) between a first layerarrangement (108’) and a second layer arrangement (110’), a trench (100) of thetrench pattern (102’), extending through the sacrificial layer (106), and the trench pattern (102’) defining a boundary to at least one cavity area (120) of the PMUT; forming (1202) a barrier structure (116) to the trench (100), the barrierstructure (116) comprising a wall arrangement (116’) and a refill layer (118) within the trench (100) between walls (116’’) of the wall arrangement (116’), thebarrier structure (116) being resistive to an etching process of material of thesacrificial layer (106) and a thickness (T) of the barrier structure (116) being in arange 0.3 µm to 2 µm; forming (1204), relating to each of the cavity areas (120), at least onehole (124) through the first layer arrangement (108’), which is formed on and incontact with the sacrificial layer (106) which is formed on and in contact with thesacrificial layer (106); and removing (1206) material of the sacrificial layer (106) from the at least one cavity area (120) through the at least one hole (124) or the opening (300) by a process of etching for forming at least one cavity (120’) within the stack (104), each of the at least one cavity (120’) being confined by one of the barrier structures (116).

2. The method of claim 1, c h a r a c t e r i z e d by forming aphotolithographic layer (200) with a pattern of the trench pattern (102’) on the first layer arrangement (108’), and forming the trench (100) in a subtractive etching process.

3. The method of claim 1, c h a r a c t e r i z e d by filling the trench(100) prior to the removal of the material of the sacrificial layer (106) within the stack (104) through the at least one hole (124).

4. The method of claim 1 or 3, c h a r a c t e r i z e d by filling the trench(100) by chemical vapor deposition process, and planarizing the filled trench (100) by chemical mechanical polishing.

5. The method of claim 1, c h a r a c t e r i z e d by forming each wallarrangement (116’) of the barrier structure (116) by a thermal oxidation process.

6. The method of claim 1, c h a r a c t e r i z e d in that an etching agentof the etching process includes xenon difluoride etching.

7. The method of claim 1, c h a r a c t e r i z e d by forming additionallayers (122) to the stack (104) of layers of the PMUT prior to the removal of thematerial of the sacrificial layer (106).

8. The method of claim 1, c h a r a c t e r i z e d by forming (1204) anopening (300) through a second layer arrangement (110’) of the stack (104), the at least one hole (124) being smaller than the cavity area (120) which the at least one hole (124) is associated with, and the opening (300) being equal to or smaller than the cavity area (120) which the opening (300) is associated with.

9. The method of claim 1, c h a r a c t e r i z e d by making a depth (D)of the cavity (120’) to be in a range 500 nm to 25 µm.

10. The method of claim 1, c h a r a c t e r i z e d by forming an opening(300) through the second layer arrangement (110’) of each of the at least one cavity area (120), and removing the material of the sacrificial layer (106) belonging toeach of the at least one cavity area (120) within the stack (104).

11. The method of claim 10, c h a r a c t e r i z e d in that the secondlayer arrangement (110’) comprises a substrate (114).

12. The method of claim 1, c h a r a c t e r i z e d in that the sacrificiallayer (106) and the refill layer (118) comprise a polysilicon or amorphous layers and the wall arrangement (116’) is of silicon dioxide.

13. A piezoelectric micromachined ultrasound transducer (PMUT),c h a r a c t e r i z e d in that the PMUT is fabricated by the method steps of claim1.

14. A piezoelectric micromachined ultrasound transducer (PMUT) ofclaim 13, c h a r a c t e r i z e d in that the PMUT is further fabricated by themethod steps of any claim 2 to 12.

15. A piezoelectric micromachined ultrasound transducer (PMUT) ofclaim 13, c h a r a c t e r i z e d in that the PMUT comprises a sacrificial layer (106)and at least one cavity (120’) within a stack (104) of layers; each of the at least one cavity (120’) is laterally limited by a barrierstructure (116); the barrier structure (116), which comprises a wall arrangement (116’)and a refill layer (118) within the trench (100) between walls (116’’) of the wallarrangement (116’), is configured to extend through a whole thickness of thesacrificial layer (106) that is within the stack (104) of layers, the barrier structure(116) being resistive to an etching agent of the sacrificial layer (106) used in afabrication phase, and a thickness (T) of the barrier structure (116) being in a range 0.3 µm to 2 µm; and the PMUT comprises at least one hole (124) and / or an opening (300)each being associated and connected with each of the at least one cavity (120’); each of the at least one hole (124) is configured to extend through a firstlayer arrangement (108’) of the stack (104) and connect with a cavity of the at leastone cavity (120’), and the opening (300) is configured to extend through a second layer arrangement (110’) of the stack (104) and connect with a cavity of the at least one cavity (120’), and the at least one hole (124) being smaller than the cavity area (120) which the at least one hole (124) is associated with, and the opening (300)being equal to or smaller than the cavity area (120) which the opening (300) is associated with.

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