Motor control device and electric power steering device

Abstract

Provided are a motor control device (1) and an electric power steering device (160), in which motor drive is not restricted and executed as it is when a drive circuit (12) is normal, and motor drive is appropriately restricted when the drive circuit (12) fails. The motor control device (1) comprises: a current control circuit (15) having a plurality of legs provided with switching elements (FET1, FET2) on the positive electrode side and switching elements (FET3, FET4) on the negative electrode side; the drive circuit (12) that outputs a drive signal for on / off-driving the switching elements (FET1, FET2, FET3, FET4); breakers (13, 14) that switches between transmission and cut-off of the drive signal; and an output signal control device (11) that provides a control signal to the drive circuit (12), sets the breakers (13, 14) on the path that energizes a motor (5) to a transmission state, and sets the breakers (13, 14) on the path that does not energize the motor (5) to a cut-off state.

Description

Motor control device and electric power steering device

[0001] The present disclosure relates to a motor control device and an electric power steering device.

[0002] Electric power steering devices have been manufactured in which a motor control device controls the drive of a motor to assist vehicle steering. These electric power steering devices are equipped with an interlock means for suppressing abnormal operation of the motor control device. The interlock means suppresses self-steering, which is when a turning operation is initiated against the driver's intention.

[0003] In an electric power steering system, steering torque is input and a motor control device controls a motor to assist steering force. Interlock means are disclosed that limit the direction and maximum current of the output current of the motor control device according to the steering force (see, for example, Patent Document 1).

[0004] Patent No. 3285490

[0005] In the technology disclosed in Patent Document 1, if the current limit value set by the interlock means is too high, there is a risk that abnormal operation of the motor control device will not be sufficiently limited. If the current limit value set by the interlock means is too low, the output of the electric power steering device will be excessively limited, preventing the device from performing satisfactorily. This will result in insufficient steering force and a deterioration in steering feel. Furthermore, if the current is limited by the interlock in the normal operating range, a hunting phenomenon will occur, in which the current limit is repeatedly released and then limited.

[0006] To find a compromise between these issues, a filter circuit is installed to process the input steering torque signal, and the circuit constants are tuned for each vehicle. Installing a filter circuit increases the size and price of the motor control device, and the cost increases due to the tuning work required.

[0007] The present disclosure proposes a motor control device and an electric power steering device that solve the above-mentioned problems. The objective is to provide a motor control device and an electric power steering device that, while eliminating the need for an additional filter circuit to process steering torque signals for interlock purposes and the need to tune circuit constants for each vehicle, allows motor drive to continue without restriction based on the control signal from the output signal control device when the drive circuit of the motor control device is normal, and appropriately restricts motor drive when the drive circuit fails.

[0008] The motor control device according to the present disclosure includes: a current control circuit having a plurality of legs each having a positive-side switching element connected to the positive electrode of a DC power supply, a negative-side switching element connected to the negative electrode of the DC power supply, and an external connection point connecting the positive-side switching element and the negative-side switching element in series and connected to a coil terminal of a motor; a drive circuit that outputs a drive signal for driving the switching elements on and off; a circuit breaker that is disposed between the switching elements and the drive circuit and switches between transmitting and blocking the drive signal; and an output signal control device that gives a control signal to the drive circuit for driving the switching elements on and off, and sets the circuit breaker between the switching elements and the drive circuit in a path that energizes the motor to a transmitting state and sets the circuit breaker between the switching elements and the drive circuit in a path that does not energize the motor to a blocking state.

[0009] The electric power steering device according to the present disclosure includes a motor and a motor control device.

[0010] According to the present disclosure, it is possible to realize a motor control device and an electric power steering device that, while eliminating the need to install an additional filter circuit for processing steering torque signals for interlock purposes and the need to tune circuit constants for each vehicle, allows motor drive to continue without restriction based on the control signal from the output signal control device when the drive circuit of the motor control device is normal, and appropriately restricts motor drive when the drive circuit fails. This makes it possible to obtain a motor control device that does not restrict motor control when the drive circuit is normal, can demonstrate sufficient performance, satisfies steering force, and provides an improved steering feel. This makes it possible to achieve a motor control device and electric power steering device that are smaller, lighter, and less expensive while still meeting required performance.

[0011] FIG. 1 is a first configuration diagram of a motor control device according to embodiment 1. FIG. 2 is a hardware configuration diagram of an output signal control device of the motor control device according to embodiment 1. FIG. 3 is a first flowchart showing the processing of the output signal control device according to embodiment 1. FIG. 4 is a second flowchart showing the processing of the output signal control device according to embodiment 1. FIG. 5 is a third flowchart showing the processing of the output signal control device according to embodiment 1. FIG. 6 is a time chart of output signals of the output signal control device according to embodiment 1. FIG. 7 is a time chart of output signals of the output signal control device according to embodiment 1 when a drive circuit failure occurs when the motor is not driven. FIG. 8 is a time chart of output signals of the output signal control device according to embodiment 1 when a drive circuit failure occurs when the motor is driven. FIG. 9 is a second configuration diagram of the motor control device according to embodiment 1. FIG. 10 is a configuration diagram of an electric power steering device according to embodiment 1. FIG. 11 is a time chart of output signals of the output signal control device according to embodiment 2 when motor drive starts. FIG. 12 is a first flowchart showing the processing of the output signal control device according to embodiment 2. FIG. 13 is a second flowchart showing the processing of the output signal control device according to embodiment 2. FIG. 14 is a third flowchart showing the processing of the output signal control device according to embodiment 2. FIG. 15 is a time chart of output signals of the output signal control device according to embodiment 3 when motor drive is stopped. 1 is a first flowchart showing the processing of an output signal control device according to embodiment 3. FIG. 2 is a third flowchart showing the processing of an output signal control device according to embodiment 3. FIG. 3 is a configuration diagram of a motor control device according to embodiment 4. FIG. 4 is a diagram showing a current path when the motor of the output signal control device according to embodiment 4 is driving. FIG. 5 is a logic diagram of an input signal to a drive monitoring unit when the motor of the output signal control device according to embodiment 4 is driving. FIG. 6 is a first flowchart showing the drive monitoring processing of the output signal control device according to embodiment 4. FIG. 7 is a second flowchart showing the drive monitoring processing of the output signal control device according to embodiment 4. FIG. 8 is a diagram showing a current path when motor drive of the output signal control device according to embodiment 5 is stopped. FIG. 9 is a logic diagram of an input signal to a drive monitoring unit when motor drive of the output signal control device according to embodiment 5 is stopped. FIG. 10 is a first flowchart showing the drive monitoring processing of the output signal control device according to embodiment 5.Fig. 10 is a configuration diagram of a motor control device according to embodiment 6. Fig. 11 is a logic diagram of an input signal to a drive monitoring unit when a motor is driven by the output signal control device according to embodiment 6. Fig. 12 is a second flowchart showing the drive monitoring process of the output signal control device according to embodiment 6.

[0012] Hereinafter, preferred embodiments of a motor control device and an electric power steering device according to the present disclosure will be described with reference to the drawings. In each drawing, the same or corresponding parts are designated by the same reference numerals, and duplicated explanations will be omitted.

[0013] 1. Embodiment 1 <Configuration of Motor Control Device> Figure 1 is a first configuration diagram of a motor control device 1 according to Embodiment 1. In Figure 1, motor control device 1 controls an electric power steering device 160 (electric power steering device 160 is shown in Figure 11). Signals are input to motor control device 1 from a torque sensor 2 that measures the steering force of the driver, a vehicle speed sensor 3 that measures the vehicle's traveling speed, and a steering angle sensor 4 that measures the steering angle of the steering wheel. Based on these input signals, motor control device 1 controls the output of a motor 5 that generates power for electric power steering device 160.

[0014] The motor 5 is driven rightward by passing a current from the motor positive terminal M+ to the motor negative terminal M-, and driven leftward by passing a current from the motor negative terminal M- to the motor positive terminal M+.

[0015] Motor control device 1 includes output signal control device 11, drive circuit 12, left-direction circuit breaker 13, right-direction circuit breaker 14, current control circuit 15, and current detector 16. Output signal control device 11 performs calculations based on signals input from outside motor control device 1 and signals generated internally, and outputs signals to control circuits built into motor control device 1.

[0016] The current control circuit 15 supplies current to the motor 5. The current control circuit 15 has positive-side switching elements FET1 and FET2 connected to the positive electrode of the DC power supply, and negative-side switching elements FET3 and FET4 connected to the negative electrode of the DC power supply. The positive-side switching element and the negative-side switching element are connected in series to form two pairs of legs. Output is then led from the connection point to the motor positive terminal M+ and motor negative terminal M-, which are the coil terminals of the motor.

[0017] The drive circuit 12 converts the control signals SD1 to SD4 output from the output signal control device 11 into drive signals D1 to D4 that drive the gates of the switching elements and outputs them. The leftward circuit breaker 13 and the rightward circuit breaker 14 are disposed between the switching elements of the current control circuit 15 and the drive circuit 12, and switch between transmission and interruption of the drive signals D3 and D4. The transmission and interruption of the leftward circuit breaker 13 and the rightward circuit breaker 14 is controlled by the output signal control device 11.

[0018] When the leftward cutoff signal INHL output from the output signal control device 11 is at H level, the leftward cutoff switch 13 is in a transmitting state, and the drive signal D3 of the drive circuit 12 is transmitted as is as the D3a output to the switching element FET3. When the leftward cutoff signal INHL is at L level, the leftward cutoff switch 13 is in a cutoff state, the drive signal D3 of the drive circuit 12 is cut off, and the D3a output is transmitted as the L level (off) to the switching element FET3.

[0019] When the rightward cutoff signal INHR output from the output signal control device 11 is at H level, the rightward cutoff switch 14 is in a transmitting state, and the drive signal D4 of the drive circuit 12 is transmitted as is as the D4a output to the switching element FET4. When the rightward cutoff signal INHR is at L level, the rightward cutoff switch 14 is in a cutoff state, the drive signal D4 of the drive circuit 12 is cut off, and the D4a output is transmitted as the L level (off) to the switching element FET4.

[0020] The current detector 16 is disposed between the negative terminal of the current control circuit 15 and the ground terminal (GND) and is capable of detecting the current flowing through the motor 5. The current detector 16 outputs the current flowing from the current control circuit 15 to the ground terminal while the motor 5 is energized as a detected current value SCU to the output signal control device 11.

[0021] <Output Signal Control Device> The output signal control device 11 includes a target current calculation unit 11 a, a drive processing unit 11 b, and a drive limiting unit 11 c. The target current calculation unit 11 a calculates a target current value TCU of the motor 5 based on a signal input from outside the motor control device 1.

[0022] The drive processing unit 11b receives the target current value TCU and the detected current value SCU output by the current detector 16. Then, it outputs control signals SD1 to SD4 to the drive circuit 12 so that these values ​​match.

[0023] The drive processing unit 11b calculates the drive direction of the motor 5 from the target current value TCU and outputs it as the motor drive direction DIR. Then, the drive processing unit 11b calculates the voltage to be applied to the motor 5 from the difference between the target current value TCU and the detected current value SCU, and calculates the duty of the PWM (Pulse Width Modulation) drive. The drive processing unit 11b outputs control signals SD1 to SD4 corresponding to the motor drive direction DIR as PWM signals.

[0024] The drive limiting unit 11c acquires the motor drive direction DIR from the drive processing unit 11b. When the motor drive direction is leftward, the drive limiting unit 11c sets the leftward direction cutoff signal INHL to a transmitted state (H level) and the rightward direction cutoff signal INHR to a cutoff state (L level). When the motor drive direction is rightward, the drive limiting unit 11c sets the leftward direction cutoff signal INHL to a cutoff state (L level) and the rightward direction cutoff signal INHR to a transmitted state (H level). This allows the circuit breakers between the switching elements of the path that energizes the motor 5 and the drive circuit 12 to be in a transmitted state, and the circuit breakers between the switching elements of the path that does not energize the motor 5 and the drive circuit 12 to be in a cutoff state.

[0025] <Current Control Circuit> The current control circuit 15 includes switching elements FET1 to FET4. The current control circuit 15 is also called an H-bridge circuit.

[0026] A leg is formed by connecting the positive side switching element FET2 and the negative side switching element FET3 in series. The motor positive terminal M+, which is the coil terminal of the motor 5, is connected to the connection point of the series connection of the leg. Another leg is formed by connecting the positive side switching element FET1 and the negative side switching element FET4 in series. The motor negative terminal M-, which is the coil terminal of the motor 5, is connected to the connection point of the other leg.

[0027] The switching elements FET1 to FET4 are each semiconductors. The switching elements FET1 to FET4 may each use a single or multiple MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) with a built-in parasitic diode between the source and drain, or SiC-MOSFETs using SiC (Silicon Carbide). Alternatively, the switching elements FET1 to FET4 may each be configured with an IGBT (Insulated Gate Bipolar Transistor) and a diode connected in anti-parallel between the emitter and collector of the IGBT. Hereinafter, the switching elements FET1 to FET4 may be simply referred to as FET1 to FET4.

[0028] <Hardware Configuration of Output Signal Control Device> Figure 2 is a hardware configuration diagram of the output signal control device 11 of the motor control device 1 according to the first embodiment. In this embodiment, the output signal control device 11 is a control device that controls the motor control device 1. Each function of the output signal control device 11 is realized by a processing circuit provided in the output signal control device 11. Specifically, the output signal control device 11 includes, as processing circuits, an arithmetic processing device 90 (computer) such as a CPU (Central Processing Unit), a storage device 91 that exchanges data with the arithmetic processing device 90, an input circuit 92 that inputs external signals to the arithmetic processing device 90, and an output circuit 93 that outputs signals from the arithmetic processing device 90 to the outside.

[0029] The arithmetic processing device 90 may be an application specific integrated circuit (ASIC), an integrated circuit (IC), a digital signal processor (DSP), a field programmable gate array (FPGA), various logic circuits, various signal processing circuits, etc. Furthermore, the arithmetic processing device 90 may be a plurality of the same or different types of devices, and each process may be shared and executed. While the arithmetic processing device 90 is described as a CPU in FIG. 2 , it is specifically assumed that the arithmetic processing device has a multi-core processor that enables dual core lockstep (DCLS).

[0030] The storage device 91 includes a RAM (Random Access Memory) configured to be able to read and write data from and to the arithmetic processing device 90, a ROM (Read Only Memory) configured to be able to read data from and to the arithmetic processing device 90, etc. The input circuit 92 is connected to various sensors and switches including the torque sensor 2, the vehicle speed sensor 3, the steering angle sensor 4, and the current detector 16, and includes interface circuits such as an AD converter and an input circuit that input output signals from these sensors and switches to the arithmetic processing device 90. The output circuit 93 is connected to electrical loads such as switching elements including the drive circuit 12, the left-direction circuit breaker 13, the right-direction circuit breaker 14, and actuators, and includes interface circuits such as a drive circuit and a communication circuit that converts and outputs output signals from the arithmetic processing device 90 to these electrical loads. The output signal control device 11 may also incorporate the function of the drive circuit 12.

[0031] Each function of the output signal control device 11 is realized by the arithmetic processing device 90 executing software (programs) stored in a storage device 91 such as a ROM, and cooperating with other hardware of the output signal control device 11 such as the storage device 91, an input circuit 92, and an output circuit 93. Note that setting data such as thresholds and judgment values ​​used by the output signal control device 11 is stored in the storage device 91 such as a ROM as part of the software (programs).

[0032] Each function installed inside the output signal control device 11 may be configured as a software module, or may be configured as a combination of software and hardware. Furthermore, the entire output signal control device 11 may be a component incorporated into a single package, or may be handled as a so-called one-chip microcomputer.

[0033] <Functional Safety> ISO26262, the functional safety standard for automobiles, specifies the Automotive Safety Integrity Level (ASIL) (ISO: International Organization for Standardization). Critical control parts of automobiles, including electric power steering devices, are required to meet ASIL D, and high safety of the control devices is required. The target failure rate required for ASIL D is 10 -8 / h is difficult to achieve with the failure rate of typical automotive microcontrollers. For this reason, arithmetic processing units with multiple core processors that enable dual core lockstep (DCLS) are used. Dual core lockstep synchronizes the clocks of the processor cores mounted on a single die, and each core performs the same processing. The processing results of each core are then compared using a comparison circuit, and processing is only carried out if the results are the same.

[0034] If the safety level is satisfied using this method, the possibility of a malfunction of the arithmetic processing unit can be eliminated, and the interlock function of the motor control device 1 can be realized. In this case, a measure against a malfunction of the drive circuit 12 can be realized by setting the circuit breaker between the drive circuit 12 and the switching element of the path that supplies current to the motor 5 to the transmitting state, and setting the circuit breaker between the drive circuit 12 and the switching element of the path that does not supply current to the motor 5 to the disconnected state.

[0035] Furthermore, even without using dual-core lockstep, it is possible to increase the safety level of the arithmetic processing unit. By providing error detection (ECC: Error-Correcting Code) in RAM, flash memory, etc., built-in self-test (BTST) for circuit self-diagnosis, and a safety mechanism used to monitor the operation of the microcontroller's processor core (such as a processor equipped with a fault correction unit (FCU)), it is possible to ensure a safety level up to ASIL C. These methods also eliminate the possibility of arithmetic processing unit failure and similarly realize the interlock function of the motor control device 1.

[0036] This solves the problem of conventional interlock means excessively restricting the output of the electric power steering device, preventing it from performing satisfactorily. It is possible to avoid insufficient steering force and deterioration of steering feel without restricting the behavior when the drive circuit 12 is healthy. It also eliminates the need for a filter circuit that processes the steering torque signal and the process of tuning the circuit constants for each vehicle, which were previously required. This makes it possible to reduce the size and cost of the motor control device and development costs by reducing the number of tuning steps. This contributes to the reduction of size, cost, and development costs of electric power steering devices.

[0037] <Processing of Output Signal Control Device> Fig. 3 is a first flowchart showing the processing of the output signal control device 11 according to the first embodiment, and describes the processing for setting the target current and the rotation direction. Fig. 4 is a second flowchart showing the processing of the output signal control device 11, and describes the processing for setting the output of the control signal. Fig. 5 is a third flowchart showing the processing of the output signal control device 11, and describes the processing for setting the shut-off signal. The processing of Fig. 4 is a continuation of the processing of Fig. 3. The processing of Fig. 5 is a continuation of the processing of Fig. 4.

[0038] The processes shown in Figures 3 to 5 are executed by the processing device of the output signal control device 11. The processes shown in Figures 3 to 5 may be executed at predetermined time intervals (for example, every 100 μs). Alternatively, the processes may be executed not at predetermined time intervals but at predetermined travel distances, or for each event such as each time a new sensor signal is received.

[0039] 3 starts, and in step S1, the target current calculation unit 11a of the output signal control device 11 reads input values ​​from each sensor and calculates the target current value TCU. The target current value TCU represents the amount of current as a positive value when driving the motor 5 in the rightward direction and as a negative value when driving the motor 5 in the leftward direction. The calculated target current value TCU is passed to the drive processing unit 11b.

[0040] In step S1b, the drive processing unit 11b determines the motor drive direction from the target current value TCU. If the target current value TCU is positive (determination is YES), the process proceeds to step S3. The motor drive direction DIR is then set to the right (1). The process then proceeds to step S6.

[0041] If the target current value TCU is not positive (determination is NO), the process proceeds to step S2. In step S2, it is determined whether the target current value TCU is negative. If the target current value TCU is negative (determination is YES), the process proceeds to step S4. Then, the motor drive direction DIR is set to the left (-1). Then, the process proceeds to step S6.

[0042] If the target current value TCU is not negative (NO in step S2), the process proceeds to step S5, where the motor drive direction DIR is set to non-drive (0), and the process proceeds to step S6.

[0043] In step S6, the detected current value SCU is subtracted from the absolute value of the target current value TCU to calculate the difference ERR, and the process then proceeds to step S7 in FIG.

[0044] <Setting of Output of Control Signal> In step S7 of FIG. 4, feedback control (e.g., PID control) is performed using the difference ERR, and the duty value of the PWM signal to be output in step S10 or step S11 (described later) as the control amount of the motor is calculated.

[0045] In steps S8 and S9, the FET to be driven is switched depending on the motor drive direction DIR, so if the motor drive direction DIR is rightward, the process proceeds to step S8a. If the motor drive direction DIR is leftward, the process proceeds to step S9a. If the motor is not driven, the process proceeds to step S12 in FIG. 5.

[0046] In step S8a, the motor drive direction DIR is rightward, and the control signals SD1 and SD3 are set to OFF. Then, in step S10, the control signals SD2 and SD4 are set to the calculated PWM outputs, respectively. Then, the process proceeds to step S21 in FIG. 5.

[0047] In step S9a, the motor drive direction DIR is leftward, and the control signals SD2 and SD4 are set to OFF. Then, in step S11, the control signals SD1 and SD3 are set to the calculated PWM outputs, respectively. Then, the process proceeds to step S21 in FIG. 5.

[0048] In step S12, all of the control signals SD1 to SD4 are set to OFF output, and then the process proceeds to step S21.

[0049] <Setting of the tripping signal> From step S21 in Fig. 5, the drive limiting unit 11c makes a decision and controls the leftward circuit breaker 13 and the rightward circuit breaker 14. In steps S21 and S22, in order to switch between transmission and energization of the circuit breakers depending on the motor drive direction DIR, if the motor drive direction DIR is rightward, the process proceeds to step S21a. If the motor drive direction DIR is leftward, the process proceeds to step S22a. If the motor is not driven, the process proceeds to step S25.

[0050] In step S21a, the motor drive direction DIR is rightward, and the rightward cutoff signal INHR is set to H level (transmitted). In step S23, the leftward cutoff signal INHL is set to L level (cutoff). Then, the process ends.

[0051] In step S22a, the motor drive direction DIR is leftward, and the leftward cutoff signal INHL is set to H level (transmitted). In step S24, the rightward cutoff signal INHR is set to L level (cutoff). Then, the process ends.

[0052] In step S25, the left direction cutoff signal INHL and the right direction cutoff signal INHR are both set to L level (cutoff), and the process then ends.

[0053] <Normal Operation Time Chart> Figure 6 is a time chart of the output signals of the output signal control device 11 according to the first embodiment. When the target current value TCU is greater than 0, it is determined that the motor should be driven to the right, and the motor drive direction DIR is set to right (1). The control signals SD2 and SD4 are PWM outputs, and the control signals SD1 and SD3 are OFF outputs. In addition, the leftward cutoff signal INHL is in the cutoff state (L level), and the rightward cutoff signal INHR is in the transmitted state (H level).

[0054] In Figure 6, when the target current value TCU is less than 0, it is determined that the motor should be driven leftward, and the motor drive direction DIR is set to leftward (-1). Control signals SD1 and SD3 are PWM outputs, and control signals SD2 and SD4 are OFF outputs. In addition, the leftward cutoff signal INHL is in a transmitted state (H level), and the rightward cutoff signal INHR is in a cutoff state (L level).

[0055] In Figure 6, when the target current value TCU is 0, it is determined that the motor is not driven, and the motor drive direction DIR is set to non-drive (0). Control signals SD1 to SD4 are set to OFF outputs. In addition, the left direction cutoff signal INHL and the right direction cutoff signal INHR are both set to the cutoff state (L level).

[0056] <Time chart when the drive circuit fails> Figure 7 is a time chart of the output signal control device 11 according to the first embodiment when the motor is not driven. It shows the output signal when the drive circuit 12 fails. In Figure 7, a failure occurs in the drive circuit 12 at timing T1 when the motor is not driven. It shows the operation when an output is generated from the drive circuit 12 to drive the motor 5 in the right direction.

[0057] Since the motor is not driven, all of the control signals SD1 to SD4 of the output signal control device 11 are OFF outputs. Also, the left direction cutoff signal INHL and the right direction cutoff signal INHR are both cut off (L level).

[0058] At timing T1, a failure occurs in the drive circuit 12, and PWM drive of the drive signals D2 and D4 begins. However, because the right-direction cutoff signal INHR is in the cutoff state (L level), the drive signal D4a that passes through the right-direction cutoff switch 14 is output as an OFF signal, and FET4 is turned OFF. Therefore, the current path to the motor 5 is cut off, and the motor 5 is not driven.

[0059] 8 is a time chart of the output signal control device 11 according to the first embodiment when driving a motor. The diagram shows the output signal when a failure occurs in the drive circuit 12. In FIG. 8, a failure occurs in the drive circuit 12 at timing T2 when the motor 5 is being driven leftward. The diagram also shows the operation when an erroneous output is generated from the drive circuit 12 to drive the motor 5 rightward.

[0060] When the motor 5 is driven leftward, the control signals SD1 and SD3 of the output signal control device 11 are PWM outputs, and the control signals SD2 and SD4 are OFF outputs. In addition, the leftward cutoff signal INHL is in a transmitted state (H level), and the rightward cutoff signal INHR is in a cutoff state (L level).

[0061] At timing T2, a failure occurs in the drive circuit 12, causing drive signals D1 and D3 to go OFF, and drive signals D2 and D4 to start PWM output. However, because the right-direction cutoff signal INHR is in the cutoff state (L level), the drive signal D4a that passes through the right-direction cutoff switch 14 goes OFF, turning FET4 OFF. Therefore, the current path to the motor 5 is cut off, and the motor 5 is not driven.

[0062] In the motor control device 1 configured as described above, if a failure occurs within the output signal control device 11, a self-diagnosis function, such as dual-core lockstep, of the arithmetic processing unit can transition to a safe state. Furthermore, even if the drive signal from the output signal control device 11 is not properly transmitted to the current control circuit 15 due to a failure in the drive circuit 12 or the like, the left-direction circuit breaker 13 and the right-direction circuit breaker 14 prohibit driving in a direction different from the drive signal from the output signal control device 11. This makes it possible to avoid behaviors such as self-steering.

[0063] <When a Circuit Breaker is Connected to a Positive-Side Switching Element> Figure 9 is a second configuration diagram of a motor control device according to embodiment 1. The only difference from the configuration diagram of Figure 1 is that the circuit breaker is provided between the drive circuit 12 and the positive-side switching element, rather than between the drive circuit 12 and the negative-side switching element. That is, a left-handed circuit breaker 13 is provided between the drive circuit 12 and the positive-side switching element FET1. A right-handed circuit breaker 14 is provided between the drive circuit 12 and the positive-side switching element FET2.

[0064] Even with this configuration, measures can be taken against failures in the drive circuit 12 by setting the circuit breaker between the switching element of the path that supplies current to the motor 5 and the drive circuit 12 in a transmission state, and setting the circuit breaker between the switching element of the path that does not supply current to the motor 5 and the drive circuit 12 in a cut-off state.

[0065] <When Circuit Breakers are Connected to Both Positive and Negative Switching Elements> Figure 10 is a third configuration diagram of the motor control device 1 according to embodiment 1. This configuration differs from the configuration diagram of Figure 1 in that circuit breakers are additionally provided between the drive circuit 12 and the positive switching elements, as well as between the drive circuit 12 and the positive switching elements. That is, circuit breakers are provided both between the positive switching elements and the drive circuit for each leg, and between the negative switching elements and the drive circuit for each leg. Accordingly, the entity that outputs the shutdown signal has been changed from the drive limiting unit 11c having two shutdown signal outputs to a drive limiting unit 11g having four shutdown signal outputs.

[0066] Specifically, a circuit breaker 1 (21) is provided between the drive circuit 12 and the positive-side switching element FET1, and a circuit breaker 2 (22) is provided between the drive circuit 12 and the positive-side switching element FET2. A circuit breaker 3 (23) is provided between the drive circuit 12 and the negative-side switching element FET3, and a circuit breaker 4 (24) is provided between the drive circuit 12 and the negative-side switching element FET4.

[0067] With this configuration, even if one of the circuit breakers fails and remains in a transmitting state, it is possible to prevent the motor from being driven in the wrong direction. This is because the other circuit breaker can be used to cut off the circuit breaker between the drive circuit 12 and the switching element of the path that does not conduct current to the motor 5. In other words, a dual circuit breaker system can be used for the DC motor 5.

[0068] Furthermore, by providing a circuit breaker for each positive and negative switching element of each leg, it is possible to implement measures against failures in the drive circuit 12 even when driving motors other than DC motors. For example, the present invention can be applied to AC driving of a three-phase brushless motor having U-phase, V-phase, and W-phase coils. In this case, the current control circuit constitutes a power conversion circuit (inverter) consisting of three arms in which the positive-phase switching element and the negative-phase switching element are connected in series and connected to the U-phase, V-phase, and W-phase coils, respectively.

[0069] In 120-degree conduction (rectangular wave drive), a 120-degree section out of 360 degrees in which each switching element is turned on is identified. The circuit breaker connected to the switching element in that section is set to a conducting state (H level). Then, the circuit breaker is set to a blocking state (L level) in the 240-degree section other than that section.

[0070] In this way, it is possible to specify the conduction state (H level) of the connected circuit breaker in the 120-degree section and the cut-off state (L level) in the 240-degree section for each of the six switching elements. This makes it possible to prevent the three-phase brushless motor from being driven incorrectly. Furthermore, by setting the circuit breaker between the drive circuit 12 and the switching elements of the path that does not conduct current to the motor to the cut-off state, it is possible to implement a countermeasure against failure of the drive circuit 12.

[0071] Furthermore, in the case of PWM drive (sine wave drive) of a three-phase brushless motor, by turning the circuit breaker on and off in synchronization with the on and off of each switching element, it is possible to transmit on signals to the switching elements only at the correct timing and to block on signals at other times, thereby realizing a countermeasure against failure of the drive circuit 12.

[0072] <Electric power steering device> Figure 11 is a configuration diagram of an electric power steering device 160 according to embodiment 1. An example in which the motor control device 1 and the motor 5 are applied to an electric power steering device 160 mounted on a vehicle will be described. Figure 11 is an overall configuration diagram of the electric power steering device 160, which is an example of a rack-type electric power steering device.

[0073] When the driver generates a steering torque in the steering mechanism of the vehicle using the steering wheel 161, the torque sensor 2 detects the steering torque and outputs it to the motor control device 1. In addition, the vehicle speed sensor 3 detects the traveling speed of the vehicle and outputs it to the motor control device 1. The motor control device 1 supplies current to the motor 5, which assists the steering torque, based on inputs from the torque sensor 2 and the vehicle speed sensor 3. Then, the motor 5 is driven to generate an assist torque, which is supplied to the steering mechanism of the front wheels 164 of the vehicle.

[0074] The torque sensor 2 and the vehicle speed sensor 3 are part of the sensors in FIG. 1 . The motor control device 1 may generate assist torque based on inputs other than the torque sensor 2 and the vehicle speed sensor 3. If a failure occurs in the drive circuit of the motor control device 1 applied to the electric power steering device 160, motor drive is appropriately limited. When the drive circuit 12 of the motor control device 1 is normal, motor drive is continued without being limited based on the control signal from the output signal control device 11. As a result, when the drive circuit 12 is normal, motor control is not limited, allowing for sufficient performance, satisfactory steering force, and an improved steering feel to be obtained. This makes it possible to achieve a reduction in size, weight, and cost of the motor control device 1 and the electric power steering device 160 while still satisfying the required performance.

[0075] 2. Second Embodiment Figure 12 is a time chart of the output signals at the start of motor drive of an output signal control device 11 according to a second embodiment. The configuration of the motor control device 1 according to the second embodiment is the same as that shown in Figure 1 of the first embodiment, and Figure 2 is also applicable. The motor control device 1 according to the second embodiment can be realized by modifying the software of the motor control device 1 according to the first embodiment.

[0076] <Time chart showing delay of drive signal relative to shutoff signal> In the first embodiment described above, the timing at which the leftward shutoff signal INHL is switched from the shutoff state (L level) to the transmission state (H level) and the timing at which the control signals SD1 and SD3 are switched from OFF output to PWM output are simultaneous. In contrast, in the second embodiment, the leftward shutoff signal INHL is switched first. After the first delay time TD1 has elapsed since the output of the leftward shutoff circuit breaker changed from the shutoff state (L level) to the transmission state (H level), the control signals SD1 and SD3 start PWM driving.

[0077] With motor control device 1 configured in this manner, when motor 5 starts to drive in the left direction, it is possible to prevent the start of PWM output by control signal SD3 from being limited by a delay in the change in left direction cutoff signal INHL or a delay in the operation of left direction cutoff switch 13. As a result, control signal SD3 is output without any limitations, preventing problems such as changes in steering feeling and the generation of abnormal noise.

[0078] The same can be done for driving in the right direction, and the timing for switching the right direction cutoff signal INHR from the cutoff state (L level) to the transmission state (H level) can be set to occur before the control signal SD4 switches from OFF output to PWM output.

[0079] The delay time in the second embodiment can be ensured by software, as shown in the flowcharts of FIGS. 13 to 15. However, this may also be achieved by hardware. For example, the control signals SD3 and SD4 output from the output signal control device 11 may be input to the drive circuit 12 via a delay circuit. Alternatively, the drive circuit 12 may be modified so that an output reflection trigger signal is input that determines, for each signal, the timing at which the input control signals SD1 to SD4 are reflected in the drive signals D1 to D4. In this case, the drive processing unit 11b may output the output reflection trigger signal for each signal.

[0080] <Processing of Output Signal Control Device> Fig. 13 is a first flowchart showing the processing of the output signal control device 11 according to the second embodiment, and describes the processing for setting the target current and the rotation direction. Fig. 14 is a second flowchart showing the processing of the output signal control device 11, and describes the processing for setting the output of the control signal. Fig. 15 is a third flowchart showing the processing of the output signal control device 11, and describes the processing for setting the shut-off signal. The processing of Fig. 14 is a continuation of the processing of Fig. 13. The processing of Fig. 15 is a continuation of the processing of Fig. 14.

[0081] The processes shown in Figures 13 to 15 are executed by the processing device of the output signal control device 11 according to embodiment 2. The processes shown in Figures 13 to 15 may be executed at predetermined time intervals (for example, every 100 μs). Alternatively, instead of at predetermined time intervals, they may be executed for each event, such as every time a predetermined mileage distance is traveled or every time a new sensor signal is received.

[0082] 13 according to the second embodiment differs from FIG. 3 according to the first embodiment in that steps S1c and S1d are inserted before step S3, steps S2a and S2b are inserted before step S4, and step S5a is inserted before step S6. The following mainly describes the changes.

[0083] In step S1b, the drive processing unit 11b determines the motor drive direction from the target current value TCU. If the target current value TCU is positive (determination is YES), the process proceeds to step S1c, which indicates that the current rotation direction is clockwise.

[0084] In step S1c, it is determined whether the previously calculated TCU is equal to or less than 0. If the previous TCU is not equal to or less than 0 (determination is NO), the process proceeds to step S3. Since both the previous and current rotations are clockwise, no delay time is set.

[0085] In step S1c, if the previous TCU is equal to or less than 0 (determination is YES), the process proceeds to step S1d. Since rightward rotation is to be started this time, the rightward ON timer TRon is set to the first delay time TD1. The process then proceeds to step S3.

[0086] In step S3, the motor drive direction DIR is set to the right (1), and the process proceeds to step S5a.

[0087] If the target current value TCU is not positive in step S1b (determination is NO), the process proceeds to step S2, which indicates that the rotation direction is not clockwise this time.

[0088] In step S2, it is determined whether the target current value TCU is negative. If the target current value TCU is negative (determination is YES), the process proceeds to step S2a, which indicates that the current rotation is in the left direction.

[0089] In step S2a, it is determined whether the previously calculated TCU is equal to or greater than 0. If the previous TCU is not equal to or greater than 0 (determination is NO), the process proceeds to step S4. Since both the previous and current rotations are leftward, no delay time is set.

[0090] In step S2a, if the previous TCU is equal to or greater than 0 (determination is YES), the process proceeds to step S2b. Since left rotation is to be started this time, the left-direction ON timer TLon is set to the first delay time TD1. The process then proceeds to step S4.

[0091] In step S4, the motor drive direction DIR is set to the left (-1), and the process proceeds to step S5a.

[0092] If the target current value TCU is not negative in step S2 (determination is NO), the process proceeds to step S5, where the motor drive direction DIR is set to non-drive (0), and the process then proceeds to step S5a.

[0093] In step S5a, the latest TCU is stored in the previous TCU, for use in the next process shown in Fig. 13. Then, the process proceeds to step S6.

[0094] 14 according to the second embodiment differs from FIG. 4 according to the first embodiment in that step S8b is inserted before step S10 and step S9b is inserted before step S11. The following mainly describes the changes.

[0095] In step S8a, the motor drive direction DIR is rightward, and the control signals SD1 and SD3 are output as OFF. Then, in step S8b, it is determined whether the rightward on timer TRon is 0. If the rightward on timer TRon is 0 (determination is YES), in step S10, the calculated PWM outputs are set for the control signals SD2 and SD4, respectively. Since the first delay time TD1 has elapsed, the switching elements are driven. Then, the process proceeds to step S21 in FIG. 15.

[0096] If the right direction on timer TRon is not 0 (NO in step S8b), it means that the first delay time TD1 has not elapsed. In this case, the control signals SD2 and SD4 are turned OFF in step S10a. Then, the process proceeds to step S21 in FIG. 15.

[0097] In step S9a, the motor drive direction DIR is leftward, and the control signals SD2 and SD4 are output as OFF. Then, in step S9b, it is determined whether the leftward on timer TLon is 0. If the leftward on timer TLon is 0 (determination is YES), in step S11, the calculated PWM outputs are set to the control signals SD1 and SD3, respectively. Since the first delay time TD1 has elapsed, the switching elements are driven. Then, the process proceeds to step S21 in FIG. 15.

[0098] If the left-direction on timer TLon is not 0 (NO in step S9b), this indicates that the first delay time TD1 has not elapsed. In this case, the control signals SD1 and SD3 are set to OFF in step S11a. Then, the process proceeds to step S21 in FIG. 15.

[0099] <Setting of Shutdown Signal> Fig. 15 according to the second embodiment differs from Fig. 5 according to the first embodiment in that step S25a is inserted before the end of the process. This change will be described.

[0100] In step S25a, before the process ends, the right-turn on timer TRon and the left-turn on timer TLon are decremented. If the flowcharts shown in Figures 13, 14, and 15 are executed every 100 μs, the timers are decremented every 100 μs. If the timer value is 0, it is clipped at 0 and is not decremented below that value.

[0101] In step S25a, the timer is decremented to count the first delay time TD1, which is set when the motor is to be newly started to drive in the rightward or leftward direction. After the first delay time TD1 has elapsed, the motor starts to drive. As a result, the breaking circuit changes to the transmission state first, and the driving of the switching element by the drive signal is delayed.

[0102] 16 is a time chart of the output signals of an output signal control device 11 according to a third embodiment when the motor drive is stopped. The configuration of the motor control device 1 according to the third embodiment is the same as that of the first embodiment shown in FIG. 1, and FIG. 2 is also applicable. The motor control device 1 according to the third embodiment can be realized by modifying the software of the motor control device according to the first or second embodiment.

[0103] <Time Chart of Delay of Shutdown Signal After Stop of Drive Signal> In the above-described first and second embodiments, the timing of switching the left direction shutdown signal INHL from the transmission state (H level) to the shutdown state (L level) and the timing of switching the control signals SD1 and SD3 from PWM output to OFF output are simultaneous. In contrast, in the third embodiment, the timing of switching the control signals SD1 and SD3 from PWM output to OFF output occurs first. After the second delay time TD2 has elapsed since the control signals SD1 and SD3 were switched from PWM drive to OFF output, the left direction shutdown signal INHL is switched from the transmission state (H level) to the shutdown state (L level).

[0104] With the motor control device 1 configured in this manner, when motor 5 is restarted to drive in the left direction immediately after being stopped, it is possible to prevent the start of PWM output by control signal SD3 from being limited by a delay in the change in left direction cutoff signal INHL or a delay in the operation of left direction cutoff switch 13. As a result, control signal SD3 is output without any limitations, preventing problems such as changes in steering feeling and the generation of abnormal noise.

[0105] The same can be done for driving in the right direction, and the timing of switching the control signals SD2 and SD4 from PWM output to OFF output can be set to occur before the right direction cutoff signal INHR switches from the transmission state (H level) to the cutoff state (L level).

[0106] The delay time in the third embodiment can be ensured by software as shown in the flowcharts of FIGS. 17, 14, and 18. However, this may also be achieved by hardware. For example, the change of the leftward blocking signal INHL and the rightward blocking signal INHR output from the drive limiting unit 11c from the transmission state (H level) to the blocking state (L level) may be input to the leftward blocking switch 13 and the rightward blocking switch 14 via a delay circuit. Alternatively, the drive limiting unit 11c may be modified to set a delay time only for the change of the leftward blocking signal INHL and the rightward blocking signal INHR from the transmission state (H level) to the blocking state (L level).

[0107] <Processing of Output Signal Control Device> Fig. 17 is a first flowchart showing the processing of the output signal control device 11 according to the third embodiment, and describes the processing for setting the target current and the rotation direction. Fig. 14 is a second flowchart showing the processing of the output signal control device 11, and describes the processing for setting the output of the control signal. This is a reuse of Fig. 14 used in the second embodiment, and the description will be omitted. Fig. 18 is a third flowchart showing the processing of the output signal control device 11, and describes the processing for setting the shutoff signal. The processing of Fig. 14 is a continuation of the processing of Fig. 17. The processing of Fig. 18 is a continuation of the processing of Fig. 14.

[0108] The processes shown in Figures 17, 14, and 18 are executed by the processing device of the output signal control device 11 according to embodiment 3. The processes shown in Figures 17, 14, and 18 may be executed at predetermined time intervals (for example, every 100 μs). Alternatively, they may be executed for each event, such as every time a predetermined distance is traveled or every time a new sensor signal is received, rather than at predetermined time intervals.

[0109] 17 according to the third embodiment differs from FIG. 13 according to the second embodiment in that step S1a is inserted before step S1, step S1e is provided instead of step S1d, step S2e is provided instead of step S2b, and steps S2c and S2d are inserted before step S5. The following mainly describes the changes.

[0110] 17 starts, and in step S1a, the target current value TCU calculated last time is stored in the previous target current value TCUold. The storage of the previous TCU value will be described with reference to FIG. 26 according to the fifth embodiment.

[0111] In step S1c, if the previous TCU is equal to or less than 0 (determination is YES), the process proceeds to step S1e. Since rightward rotation is to be started this time, the rightward ON timer TRon is set to a first delay time TD1, and the leftward OFF timer TLoff is set to a second delay time TD2. The process then proceeds to step S3.

[0112] The reason for setting the first delay time TD1 in the right-direction on timer TRon is to delay the start of PWM output to the control signals SD2 and SD4 after the right-direction cutoff signal INHR has been switched from the cutoff state (L level) to the transmit state (H level) when right-direction driving is newly started.The reason for setting the second delay time TD2 in the left-direction off timer TLoff is to delay the timing for switching the left-direction cutoff signal INHL from the transmit state (H level) to the cutoff state (L level) after the control signals SD1 and SD3 have started to be turned OFF when right-direction driving is newly started.

[0113] In step S2a, if the previous TCU is equal to or greater than 0 (determination is YES), the process proceeds to step S2b. Since left rotation is to be started this time, the left-turn-on timer TLon is set to a first delay time TD1, and the right-turn-off timer TRoff is set to a second delay time TD2. The process then proceeds to step S4.

[0114] The reason for setting the first delay time TD1 in the left-direction on timer TLon is to delay the start of PWM output of the control signals SD1 and SD3 after the left-direction cutoff signal INHR has been switched from the cutoff state (L level) to the transmit state (H level) when starting a new left-direction drive.The reason for setting the second delay time TD2 in the right-direction off timer TRoff is to delay the timing for switching the right-direction cutoff signal INHR from the transmit state (H level) to the cutoff state (L level) after starting to output the control signals SD2 and SD4 in OFF state when starting a new left-direction drive.

[0115] In step S2c, if the previous TCU is 0 (determination is YES), the process proceeds to step S5. Since the motor is not driven either last time or this time, there is no need to provide a particular inhibition time.

[0116] In step S2c, if the previous TCU is not 0 (determination is NO), the process proceeds to step S2d. Since non-driving is to be started this time, the off timer Toff is set to the second delay time TD2. The process then proceeds to step S5.

[0117] 18 according to the third embodiment differs from FIG. 15 according to the second embodiment in that step S21b is inserted before step S23, step S22b is inserted before step S24, step S22c is inserted before step S25, and step S25b is provided instead of step S25a. The following mainly describes the changes.

[0118] In the flowchart of Fig. 18, when the motor is being driven to the right, the right direction cutoff signal INHR is set to H level (transmitted state) in step S21a, and then the process proceeds to step S21b.

[0119] In step S21b, it is determined whether the leftward off timer TLoff is 0. If the leftward off timer TLoff is not 0 (determination is NO), the leftward cutoff signal INHL is not changed and the process proceeds to step S25b. This is the case when the second delay time has not elapsed since the timer was set.

[0120] If the leftward off timer TLoff is 0 in step S21b (determination is YES), the leftward cutoff signal INHL is set to L level (cutoff) in step S23. Then, the process proceeds to step S25b. If the leftward off timer TLoff is 0, this means that the second delay time has elapsed since the timer was set, and the leftward circuit breaker 13 may be cut off.

[0121] In the flowchart of Fig. 18, when the motor is being driven leftward, the leftward cutoff signal INHL is set to H level (transmitted state) in step S22a, and then the process proceeds to step S22b.

[0122] In step S22b, it is determined whether the right direction off timer TRoff is 0. If the right direction off timer TRoff is not 0 (determination is NO), the right direction cutoff signal INHR is not changed and the process proceeds to step S25b. This is the case when the second delay time has not elapsed since the timer was set.

[0123] If the rightward off timer TRoff is 0 in step S22b (determination is YES), the rightward cutoff signal INHR is set to L level (cutoff) in step S24. Then, the process proceeds to step S25b. If the rightward off timer TLoff is 0, this means that the second delay time has elapsed since the timer was set, and the rightward circuit breaker 14 may be cut off.

[0124] In the flowchart of Fig. 18, while the motor is not being driven, it is determined in step S22c whether the off timer Toff is 0. If the off timer Toff is not 0 (determination is NO), the left direction cut-off signal INHL and the right direction cut-off signal INHR are not changed and the process proceeds to step S25b. This is the case when the second delay time has not elapsed since the timer was set.

[0125] If the off timer Toff is 0 in step S22c (determination is YES), the leftward cutoff signal INHL and the rightward cutoff signal INHR are set to L level (cutoff) in step S25. Then, the process proceeds to step S25b. If the off timer Toff is 0, this means that the second delay time has elapsed since the timer was set, and the leftward circuit breaker 13 and the rightward circuit breaker 14 may be cut off.

[0126] In step S25b, in addition to the right-direction on timer TRon and the left-direction on timer TLon, the right-direction off timer TRoff, the left-direction off timer TLoff, and the off timer Toff are also decremented. When the flowcharts shown in Figures 17, 14, and 18 are executed every 100 μs, the timers are decremented every 100 μs. If the timer value is 0, it is clipped at 0 and is not decremented below that value.

[0127] In step S25b, the timer is decremented to count a second delay time TD2, which is set when the motor is newly started to drive rightward or leftward, or when the motor is newly turned off. After the delay time TD2 has elapsed, the cutoff circuit is changed to the cutoff state with a delay.

[0128] 4. Embodiment 4 Fig. 19 is a configuration diagram of a motor control device 1 according to embodiment 4. The configuration diagram of Fig. 19 according to embodiment 4 differs from the configuration diagrams of embodiments 1 to 3 in that an M+ voltage detector 17 and an M- voltage detector 18 are provided to monitor the motor terminal voltage, and a drive monitoring unit 11d is also provided accordingly. The hardware configuration diagram of the output signal control device 11 in Fig. 2 is also applicable to embodiment 4.

[0129] <Motor Terminal Voltage> The M+ voltage detector 17 outputs a motor positive terminal voltage signal SMP. When the voltage at the motor positive terminal M+ is high, the voltage detector 17 outputs an H-level signal as the voltage signal SMP, and when the voltage at the motor positive terminal M+ is low, the voltage detector 17 outputs an L-level signal as the voltage signal SMP.

[0130] The M- voltage detector 18 outputs a motor negative terminal voltage signal SMM. When the voltage at the motor negative terminal M- is high, an H level signal is output as the voltage signal SMM, and when the voltage at the motor negative terminal M- is low, an L level signal is output as the voltage signal SMM.

[0131] The drive monitoring unit 11d receives the control signals SD1 to SD4, the motor positive terminal voltage signal SMP, and the motor negative terminal voltage signal SMM, and checks the combination of these signals to determine whether the motor 5 is being driven according to the instructions of the output signal control device 11.

[0132] If an abnormality is detected, the target current calculation unit 11a outputs an error signal SERR indicating an abnormality. If the error signal SERR is abnormal, the target current calculation unit 11a sets the target current value TCU to 0 and stops driving the motor.

[0133] <Current path when output signal control device drives motor> Fig. 20 is a diagram showing current paths when the output signal control device 11 according to embodiment 4 drives the motor. Fig. 20 shows the operation when the current control circuit 15 drives the motor 5 in the right direction.

[0134] When the motor 5 is driven to the right, FET2 and FET4 are ON, and FET1 and FET3 are OFF. Current flows from the motor positive terminal M+ to the motor negative terminal M-. Because the voltage at the motor positive terminal M+ is high, the motor positive terminal voltage signal SMP outputs an H level, and because the voltage at the motor negative terminal M- is low, the motor negative terminal voltage signal SMM outputs an L level.

[0135] When the motor 5 is driven leftward, FET1 and FET3 are ON, and FET2 and FET4 are OFF. Current is supplied to the motor 5 in the opposite direction to when the motor 5 is driven rightward. Therefore, the motor positive terminal voltage signal SMP outputs an L level, and the motor negative terminal voltage signal SMM outputs an H level.

[0136] Fig. 21 is a logic diagram of input signals to the drive monitoring unit when the motor is driven by the output signal control device 11 according to embodiment 4. Fig. 21 shows the motor positive terminal voltage signal reference value SMP* and the motor negative terminal voltage signal reference value SMM* that are preset in the drive monitoring unit 11d.

[0137] This shows the motor drive direction DIR and the state of control signals SD1 to SD4 when the FET is turned on. The table also shows the reference values ​​for the motor positive terminal voltage signal SMP and the motor negative terminal voltage signal SMM under normal conditions. A match with this logic table indicates normal operation.

[0138] Fig. 22 is a first flowchart showing the drive monitoring process of the output signal control device 11 according to embodiment 4. Fig. 23 is a second flowchart showing the drive monitoring process of the output signal control device 11. Fig. 23 shows a continuation of Fig. 22. Figs. 22 and 23 are executed following the execution of the flowcharts of Figs. 3, 4, and 5 described in embodiment 1.

[0139] 22 and 23 are executed by the processing device of the output signal control device 11. The processes shown in Fig. 22 and 23 may be executed at predetermined time intervals (for example, every 50 μs). Alternatively, the processes may be executed not at predetermined time intervals but at predetermined travel distances, or for each event such as each time a new sensor signal is received.

[0140] 22 starts, and in step S30, the motor positive terminal voltage signal SMP and the motor negative terminal voltage signal SMM are read and a determination is made as to whether they are at an H level or an L level. Here, the outputs of the M+ voltage detector 17 and the M- voltage detector 18 are analog voltages, and the drive monitoring unit 11d may compare these outputs with a predetermined threshold voltage to determine whether they are at an H level or an L level. Alternatively, the detected voltages may be compared internally in the M+ voltage detector 17 and the M- voltage detector 18, and the outputs may be at an H level or an L level.

[0141] In step S31, the motor drive status is checked to determine whether condition A is satisfied. Condition A requires that the motor drive direction DIR is rightward, control signals SD1 and SD3 are OFF, and control signals SD2 and SD4 are ON. If condition A is met, it can be determined that the motor 5 is being driven rightward and the correct FET is being driven.

[0142] In step S31a, the process branches depending on whether condition A is satisfied. If condition A is satisfied (determination is YES), the process branches to step S32. If condition A is not satisfied (determination is NO), the process proceeds to step S33.

[0143] In step S32, it is determined that the motor 5 is being driven in the right direction and the FET is turned on, and the motor positive terminal voltage signal reference value SMP* is set to H level and the motor negative terminal voltage signal reference value SMM* is set to L level, and then the process proceeds to step S35.

[0144] In step S33, the motor drive status is checked to determine whether condition B is satisfied. Condition B is that the motor drive direction DIR is leftward, control signals SD1 and SD3 are ON, and control signals SD2 and SD4 are OFF. If condition B is satisfied, it can be determined that the motor 5 is being driven leftward and the correct FET is being driven.

[0145] In step S33a, the process branches depending on whether condition B is satisfied. If condition B is satisfied (determination is YES), the process branches to step S34. If condition B is not satisfied (determination is NO), the process ends.

[0146] In step S34, it is determined that the motor 5 is being driven leftward and the FET is turned on, and the motor positive terminal voltage signal reference value SMP* is set to L level and the motor negative terminal voltage signal reference value SMM* is set to H level, after which the process proceeds to step S35.

[0147] 23, the voltage state of the motor terminals is checked to determine whether condition C is satisfied. Condition C is whether the motor positive terminal voltage signal SMP has a value different from the motor positive terminal voltage signal reference value SMP*, or whether the motor negative terminal voltage signal SMM has a value different from the motor negative terminal voltage signal reference value SMM*.

[0148] In step S35a, the process branches depending on whether condition C is satisfied. If condition C is satisfied (determination is YES), the process proceeds to step S36. If condition C is not satisfied (determination is NO), the process ends.

[0149] In step S36, the error signal SERR is set to H level, and then the process ends.

[0150] The motor control device 1 configured in this manner can detect the occurrence of a drive state different from the drive defined by the control signals SD1 to SD4 of the output signal control device 11. Then, a fault diagnosis process can be performed to set the error signal SERR to an H level. In this case, the driver can be notified of the occurrence of a fault, thereby further improving safety.

[0151] In addition, the reliability of the fault detection can be further improved by adding a process that uses the results of multiple detections, or a process that does not detect faults when the motor 5 is rotating at high speed and generating back electromotive force.

[0152] 5. Fifth Embodiment Figure 24 is a diagram showing the current paths when the motor drive is stopped in an output signal control device 11 according to a fifth embodiment. In the motor control device 1 according to the fourth embodiment, the voltage at the motor positive terminal M+ and the voltage at the motor negative terminal M- are acquired when the FET is turned on, and a fault determination is performed. The motor control device 1 according to the fifth embodiment differs in that the voltage at the motor positive terminal M+ and the voltage at the motor negative terminal M- are acquired when the FET is turned off, and a fault determination is performed.

[0153] The motor control device of Fig. 19 according to embodiment 4 can also be applied to embodiment 5. The motor control device 1 according to embodiment 5 can be realized by simply changing the software. The hardware configuration diagram of Fig. 2 can also be applied to embodiment 5.

[0154] <Current path when motor drive by output signal control device is stopped> Figure 24 shows the current path when the FET is turned OFF while the current control circuit 15 is driving the motor 5 in the right direction. When the motor 5 is being driven in the right direction, current flows from the motor positive terminal M+ to the motor negative terminal M-. When the FET is turned OFF, this current flows from GND to the motor positive terminal M+ via the parasitic diode of FET 3.

[0155] Furthermore, current flows from the motor negative terminal M- to the positive side of the power supply via the parasitic diode of FET 1. Therefore, because the voltage at the motor positive terminal M+ is low, the motor positive terminal voltage signal SMP outputs an L level, and because the voltage at the motor negative terminal M- is high, the motor negative terminal voltage signal SMM outputs an H level.

[0156] When the motor 5 is driven leftward, current flows from the motor negative terminal M- to the motor positive terminal M+, and when the FET is turned off, this current flows from the motor positive terminal M+ to the positive power supply via the parasitic diode of FET 2. Also, current flows from GND to the motor negative terminal M- via the parasitic diode of FET 4. Therefore, because the voltage at the motor positive terminal M+ is high, the motor positive terminal voltage signal SMP outputs an H level, and because the voltage at the motor negative terminal M- is low, the motor negative terminal voltage signal SMM outputs an L level.

[0157] 25 is a logic diagram of input signals to the drive monitoring unit 11d when the motor is driven and stopped by the output signal control device 11 according to embodiment 5. The diagram shows the motor positive terminal voltage signal reference value SMP* and motor negative terminal voltage signal reference value SMM* in relation to the motor drive direction DIR, PWM drive timing, and the state of the control signals SD1 to SD4, all of which are preset in the drive monitoring unit 11d. Under these conditions, if the values ​​of the motor positive terminal voltage signal SMP and motor negative terminal voltage signal SMM are the same as those shown in FIG. 25, this indicates normal operation.

[0158] 26 is a first flowchart showing the drive monitoring process of the output signal control device 11 according to embodiment 5. A second flowchart showing the drive monitoring process of the output signal control device 11 according to embodiment 5 is the same as FIG. 23 according to embodiment 4.

[0159] 26 and 23 are executed by the processing device of the output signal control device 11. The processes shown in Fig. 26 and 23 may be executed at predetermined time intervals (for example, every 50 μs). Alternatively, the processes may be executed not at predetermined time intervals but at predetermined travel distances, or for each event such as each time a new sensor signal is received.

[0160] 26 starts, and in step S40, the motor positive terminal voltage signal SMP and the motor negative terminal voltage signal SMM are read and a determination is made as to whether they are at an H level or an L level. Here, the outputs of the M+ voltage detector 17 and the M- voltage detector 18 are analog voltages, and the drive monitoring unit 11d may compare these outputs with a predetermined threshold voltage to determine whether they are at an H level or an L level. Alternatively, the detected voltages may be compared internally in the M+ voltage detector 17 and the M- voltage detector 18, and the outputs may be at an H level or an L level.

[0161] In step S41, the driving status of the motor is checked to determine whether condition D is satisfied. Condition D requires that the motor driving direction DIR is rightward and that all control signals SD1 to SD4 are OFF. If condition D is satisfied, it can be determined that the regenerative current is flowing correctly when driving the motor 5 rightward.

[0162] In step S41a, the process branches depending on whether condition D is satisfied. If condition D is satisfied (determination is YES), the process branches to step S42. If condition D is not satisfied (determination is NO), the process proceeds to step S43.

[0163] In step S42, it is determined that the motor 5 is being driven in the right direction and the FET is turned off, and the motor positive terminal voltage signal reference value SMP* is set to L level and the motor negative terminal voltage signal reference value SMM* is set to H level, and then the process proceeds to step S35.

[0164] In step S43, the driving status of the motor is checked to determine whether condition E is satisfied. Condition E is that the motor driving direction DIR is leftward and all control signals SD1 to SD4 are OFF. If condition E is satisfied, it can be determined that the regenerative current is flowing correctly when driving the motor 5 leftward.

[0165] In step S43a, the process branches depending on whether condition E is satisfied. If condition E is satisfied (determination is YES), the process branches to step S44. If condition E is not satisfied (determination is NO), the process ends.

[0166] In step S44, it is determined that the motor 5 is being driven leftward and the FET is turned off, and the motor positive terminal voltage signal reference value SMP* is set to H level and the motor negative terminal voltage signal reference value SMM* is set to L level, and then the process proceeds to step S35.

[0167] 23, the voltage state of the motor terminals is checked to determine whether condition C is satisfied. Condition C is whether the motor positive terminal voltage signal SMP has a value different from the motor positive terminal voltage signal reference value SMP*, or whether the motor negative terminal voltage signal SMM has a value different from the motor negative terminal voltage signal reference value SMM*.

[0168] In step S35a, the process branches depending on whether condition C is satisfied. If condition C is satisfied (determination is YES), the process proceeds to step S36. If condition C is not satisfied (determination is NO), the process ends.

[0169] In step S36, the error signal SERR is set to H level, and then the process ends.

[0170] With the motor control device 1 configured in this manner, fault diagnosis processing can be performed using the motor positive terminal voltage signal SMP and motor negative terminal voltage signal SMM when the motor was previously driven but is not currently driven. If the signal does not match a predetermined logic, the error signal SERR can be set to an H level. In other words, the motor control device 1 can detect the occurrence of a driving state that differs from the driving state specified by the control signals SD1 to SD4 of the output signal control device 11. In this case, the driver can be notified of the occurrence of a fault, thereby further improving safety.

[0171] The reliability of the fault determination can be improved by adding a process that uses the results of multiple determinations, or a process that does not determine if the motor 5 is rotating at high speed and generating back electromotive force. In the example described with reference to the flowcharts of FIGS. 26 and 23, the motor terminal voltage is detected when the motor 5 was driven leftward or rightward last time and is not being driven this time, and compared with the correct logic. However, the last time the motor was driven may be compared and determined with the time when the motor was driven 10 ms ago or 100 ms ago. The motor terminal voltage when the motor is not being driven at present may also be detected and compared and determined with the time when the motor was driven any period of time ago.

[0172] 6. Sixth Embodiment Figure 27 is a configuration diagram of a motor control device 1 according to a sixth embodiment. The motor control device 1 according to the sixth embodiment differs from the motor control device 1 according to the fourth embodiment in that a duty value signal SDT is output from the drive processing unit 11e of the output signal control device 11 to the drive monitoring unit 11f. The duty value when the switching element is duty-driven by the PWM signal is received by the drive monitoring unit 11f as the duty value signal SDT, and can be used as a parameter for fault detection. The hardware configuration of the output signal control device 11 according to the sixth embodiment can be that shown in Figure 2.

[0173] The drive processing unit 11e receives the target current value TCU and the detected current value SCU output by the current detector 16 as inputs. The drive processing unit 11e calculates the drive direction of the motor 5 from the target current value TCU and outputs it as the motor drive direction DIR. The drive processing unit 11e calculates the voltage to be applied to the motor 5 from the difference between the target current value TCU and the detected current value SCU, and calculates the drive duty. The drive processing unit 11e outputs control signals SD1 to SD4 corresponding to the motor drive direction DIR as PWM signals, and outputs the drive duty value as a DUTY value signal SDT.

[0174] The drive monitoring unit 11f receives the control signals SD1 to SD4, the duty value signal SDT, the motor positive terminal voltage signal SMP, and the motor negative terminal voltage signal SMM. Based on the combination of these signals, the drive monitoring unit 11f checks whether the motor 5 is being driven in accordance with the instructions of the output signal control device 11. If an abnormality is detected, the drive monitoring unit 11f sets the error signal SERR to H level.

[0175] 28 is a logic diagram of input signals to the drive monitoring unit 11f when driving the motor in the output signal control device 1 according to embodiment 6. In embodiment 4, fault detection is performed continuously while the motor 5 is being driven. In embodiment 6, whether or not a fault is detected can be switched depending on the duty value of the PWM signal that drives the motor 5.

[0176] 28 defines the logic of the motor positive terminal voltage signal reference value SMP* and motor negative terminal voltage signal reference value SMM* for the motor drive direction DIR, the drive states of the control signals SD1 to SD4, and the duty value signal SDT. The logic diagram in FIG. 28 is preset in the drive monitoring unit 11f, and if it matches this logic, it is normal, and if it differs from this logic, it can be determined that there is an abnormality.

[0177] 28, a condition is set such that a fault is not determined when the duty value signal SDT is less than 60%. Note that the predetermined value of 60% may be changed depending on the requirements for fault diagnosis, the operating environment, etc.

[0178] Fig. 29 is a second flowchart showing the drive monitoring process of the output signal control device 11 according to embodiment 6. The first flowchart showing the drive monitoring process is the same as the flowchart of Fig. 22 according to embodiment 4. The process of Fig. 29 shows a continuation of the process of Fig. 22.

[0179] <Driving monitoring process> The processes shown in Figures 22 and 29 are executed by the processing device of the output signal control device 11. The processes shown in Figures 22 and 29 may be executed at predetermined time intervals (for example, every 50 μs). Alternatively, instead of at predetermined time intervals, the processes may be executed for each event, such as every predetermined travel distance or every time a new sensor signal is received.

[0180] The process of Fig. 22 has been explained in the fourth embodiment, so the explanation will be omitted here. In step S55 of Fig. 29, it is determined whether the duty indicated by the duty value signal SDT is 60% or more. If the duty is 60% or more (determination is YES), the process proceeds to step S35. If the duty is not 60% or more (determination is NO), the process ends without performing an abnormality determination.

[0181] In step S35, the voltage state of the motor terminals is checked to determine whether condition C is satisfied. Condition C is whether the motor positive terminal voltage signal SMP has a value different from the motor positive terminal voltage signal reference value SMP*, or whether the motor negative terminal voltage signal SMM has a value different from the motor negative terminal voltage signal reference value SMM*.

[0182] In step S35a, the process branches depending on whether condition C is satisfied. If condition C is satisfied (determination is YES), the process proceeds to step S36. If condition C is not satisfied (determination is NO), the process ends.

[0183] In step S36, the error signal SERR is set to H level, and then the process ends.

[0184] In the motor control device 1 configured in this manner, when the driving duty of the PWM driving of the switching elements is small, the motor terminal voltage is unstable. Therefore, in such a region, the occurrence of erroneous detection in the fault diagnosis can be prevented by avoiding abnormality determination.

[0185] Although various exemplary embodiments and examples are described in this disclosure, the various features, aspects, and functions described in one or more embodiments are not limited to the application of a particular embodiment, but may be applied to the embodiments alone or in various combinations. Therefore, countless modifications not illustrated are contemplated within the scope of the disclosed technology. For example, this includes cases where at least one component is modified, added, or omitted, and even cases where at least one component is extracted and combined with components of another embodiment.

[0186] 1 Motor control device, 5 Motor, 11 Output signal control device, 11a Target current calculation unit, 11b, 11e Drive processing unit, 11c, 11g Drive limiting unit, 11d, 11f Drive monitoring unit, 12 Drive circuit, 13 Left direction circuit breaker, 14 Right direction circuit breaker, 15 Current control circuit, 16 Current detector, 17 M+ voltage detector, 18 M- voltage detector, 90 Processing device, 21 Circuit breaker 1, 22 Circuit breaker 2, 23 Circuit breaker 3, 24 Circuit breaker 4, 160 Electric power steering device, FET1, FET2, FET3, FET4 Switching element

Claims

1. A motor control device comprising: a current control circuit having a plurality of legs each having a positive-side switching element connected to the positive electrode of a DC power supply, a negative-side switching element connected to the negative electrode of the DC power supply, and an external connection point connecting the positive-side switching element and the negative-side switching element in series and connected to a coil terminal of a motor; a drive circuit that outputs a drive signal for driving the switching elements on and off; a circuit breaker that is disposed between the switching elements and the drive circuit and switches between transmitting and blocking the drive signal; and an output signal control device that gives a control signal to the drive circuit for driving the switching elements on and off, and sets the circuit breaker between the switching elements and the drive circuit in a transmitting state on a path that energizes the motor and sets the circuit breaker between the switching elements and the drive circuit in a blocking state on a path that does not energize the motor.

2. The motor control device according to claim 1, wherein the output signal control device has a processing unit in which processor cores are multiplexed to mutually monitor their operations.

3. The motor control device according to claim 1 or 2, wherein the circuit breaker is provided between the negative-side switching element and the drive circuit for each leg.

4. The motor control device according to claim 1 or 2, wherein the circuit breaker is provided between the positive-side switching element and the drive circuit for each leg.

5. A motor control device as described in claim 1 or 2, wherein the circuit breaker is provided between the positive side switching element and the drive circuit for each leg, and between the negative side switching element and the drive circuit for each leg.

6. A motor control device according to any one of claims 1 to 5, wherein the output signal control device brings all of the circuit breakers into an open state when stopping the drive of the motor.

7. A motor control device as claimed in any one of claims 1 to 6, wherein the output signal control device places the circuit breaker between the switching element of the path that supplies current to the motor and the drive circuit in a transmitting state before the switching element to which the circuit breaker is connected is turned on.

8. A motor control device as described in any one of claims 1 to 7, wherein the output signal control device switches the circuit breaker between the switching element and the drive circuit in the path that supplies current to the motor to a cut-off state after the switching element to which the circuit breaker is connected is turned off.

9. A motor control device according to any one of claims 1 to 8, further comprising a voltage detector that detects voltage at each coil terminal of the motor, wherein the output signal control device determines whether the voltage of the voltage detector is higher or lower than a predetermined determination voltage when current is flowing through the motor, and detects a fault based on the on / off state of each switching element and the high or low state of the voltage at each voltage detector.

10. A motor control device according to any one of claims 1 to 9, further comprising a voltage detector that detects voltage at each coil terminal of the motor, wherein the output signal control device determines whether the voltage of the voltage detector is higher or lower than a predetermined determination voltage when all switching elements are turned off while the motor is rotating, and detects a fault based on the direction of rotation of the motor and the high or low state of the voltage at each voltage detector.

11. A motor control device as described in claim 9, wherein the output signal control device detects a fault when the motor is energized based on the on / off state of each switching element, the high / low state of the voltage of each voltage detector, and the drive duty of the switching elements that are on.

12. The motor control device according to claim 11, wherein the output signal control device performs fault detection when the drive duty of the on-state switching element is greater than a predetermined determination duty.

13. An electric power steering device comprising the motor and the motor control device according to any one of claims 1 to 12.

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