Method and system for digital real-time communications in thyristor-based power controllers

Abstract

Systems and methods are provided for controlling power to a load. In one form a system includes: a digital communication bus; a main controller communicatively coupled to the digital communication bus; and a plurality of thyristor-based drivers configured to control power to a respective load, each thyristor-based driver communicatively coupled to the digital communication bus, wherein each of the thyristor-based drivers is configured to communicate digital messages at least one of to and from the main controller via the digital communications bus, wherein the digital messages include sampling data or firing order data.

Description

METHOD AND SYSTEM FOR DIGITAL REAL-TIME COMMUNICATIONS INTHYRISTOR-BASED POWER CONTROLLERSCROSS-REFERENCE TO RELATED APPLICATION

[0001] This application claims priority to and the benefit of U.S. Patent Application No. 63 / 651 ,506, filed on May 24, 2024. The disclosure of the above application is incorporated herein by reference.FIELD

[0002] The present disclosure relates to power control, and more specifically to thyristor-based power control systems having a main controller and a plurality of thyristor-based drivers.BACKGROUND

[0003] The statements in this section merely provide background information related to the present disclosure and may not constitute prior art.

[0004] Referring to FIG. 1 , known thyristor-based power control systems 10 include a main controller 12 and a plurality of silicon controlled rectifier (SCR) drivers 14, which are connected to each other and the main controller 12 with conventional ribbon cables 16. The ribbon cables 16 carry analog signals from sensors (e.g., current sensors 17) of the SCR drivers 14 to the main controller 12, and also firing orders from the main controller 12 back to firing control devices 19 of the SCR drivers 14. The main controller 12 includes analog to digital (ADC) converters 21 . Each ADC converts the analog sensor signals received from the SCR drivers 14 to digital signal data in order to control the firing order / operation of each of the SCR drivers 14. The firing control is performed by, for example a pulse width modulator (PWM) 22.

[0005] With these known power control systems 10, the number of SCR drivers 14 are limited by the ADC channels available in the main controller 12. Further, the physical location of each of the SCR drivers 14 is limited based on the maximum length of the analog signal being provided through the ribbon cables 16. Additionally, data transmission is slow and sampling errors can occur with the architecture of this analog control system.

[0006] These challenges related to power control systems that transfer analog signals are addressed by the present disclosure.SUMMARY

[0007] This section provides a general summary of the disclosure and is not a comprehensive disclosure of its full scope or all of its features. In various forma, a control system includes: a digital communication bus; a main controller communicatively coupled to the digital communication bus; and a plurality of thyristorbased drivers configured to control power to a respective load, each thyristor-based driver communicatively coupled to the digital communication bus, wherein each of the thyristor-based drivers is configured to communicate digital messages at least one of to and from the main controller via the digital communications bus, wherein the digital messages include sampling data or firing order data.

[0008] In various forms, each of the thyristor-based drivers includes at least one analog to digital converter (ADC) that converts operational samples from analog data to digital data, wherein the sampling data includes the digital data.

[0009] In various forms, each of the thyristor-based drivers includes at least two analog to digital converters and wherein the thyristor-based driver is configured to filter digital data from at least one of the at least two analog to digital converters, wherein the sampling data includes the filtered digital data.

[0010] In various forms, each of the thyristor-based drivers includes at least two analog to digital converters and wherein the thyristor-based driver is configured to synchronize the digital data from the at least two analog to digital converters, wherein the sampling data includes the synchronized digital data.

[0011] In various forms, the main controller is configured to determine a firing order of the thyristor-based drivers based on the sampling data received from the plurality of thyristor-based drivers and generate the messages including the firing order data.

[0012] In various forms, at least one of the plurality of thyristor-based drivers is a silicon controlled rectifier (SCR).

[0013] In various forms, the system includes a three-phase power supply coupled to at least three of the plurality of thyristor-based drivers.

[0014] In various forms, the plurality of thyristor-based drivers is coupled to at least one heater.

[0015] In various forms, the plurality of thyristor-based drivers is coupled to at least one motor.

[0016] In various forms, the communication bus is a wired communications bus.

[0017] In various forms, the communication bus is a wireless communications bus.

[0018] In another form, a method of controlling power includes: sensing, by a thyristor-based driver, and generating an analog signal; converting, by the thyristor-based driver, the analog signal to digital operational data; communicating, by the thyristor-based driver, a message including the digital operational data to a main controller via a digital communication bus; in response to the communicating, receiving, from the main controller, a message including firing order data via the digital communication bus; and controlling, by the thyristor-based driver, power to at least one load based on the message including the firing order data.

[0019] In various forms, the method includes filtering the digital operational data, and wherein the communicating is based on the filtering.

[0020] In various forms, the method includes receiving second analog operational data; converting, by the thyristor-based driver, the second analog operational data to second digital operational data; and synchronizing the digital operational data and the second digital operational data, wherein the communicating is based on the synchronizing.

[0021] In various forms, the method includes determining the firing order of the thyristor-based drivers based on the digital operational data received from a plurality of thyristor-based drivers and generating the message including the firing order data based on the determined firing order.

[0022] In various forms, the method includes supplying, by a three-phase power supply, power to the at least one load and via at least three of the thyristorbased drivers.

[0023] In various forms, the at least one load is at least one of a heater or a motor.

[0024] In various forms, the communicating is by way of a wireless communication protocol.

[0025] In various forms, the communicating is by way of a wired communication protocol.

[0026] In various forms, the thyristor-based driver is a silicon controlled rectifier (SCR).

[0027] Further areas of applicability will become apparent from the description provided herein. It should be understood that the description and specific examples are intended for purposes of illustration only and are not intended to limit the scope of the present disclosure.DRAWINGS

[0028] In order that the disclosure may be well understood, there will now be described various forms thereof, given by way of example, reference being made to the accompanying drawings, in which:

[0029] FIG. 1 is a schematic view of a power control system according to the prior art;

[0030] FIG. 2 is a schematic view of a power control system having digital communications bus according to the teachings of the present disclosure; and

[0031] FIG. 3 is a flowchart illustrating a control method for controlling power via the digital communications bus according to the teachings of the present disclosure.

[0032] The drawings described herein are for illustration purposes only and are not intended to limit the scope of the present disclosure in any way.DETAILED DESCRIPTION

[0033] The following description is merely exemplary in nature and is not intended to limit the present disclosure, application, or uses. It should be understood that throughout the drawings, corresponding reference numerals indicate like or corresponding parts and features.

[0034] Referring to FIG. 2, a power control system according to the teachings of the present disclosure is illustrated and generally indicated by reference numeral 30. The power control system 30 is, in various forms, a multi-phase power control system that is coupled to a voltage supply 31 that provides multi-phase alternating current to a multi-phase load 32 (e.g., according to a star, a delta, or other coupling). As shown in the example of FIG. 2, the multi-phase power control system 30 can be a three-phase system that supplies alternating current to a three-phase load32 through power lines P1 , P2, and P3. As can be appreciated, any number of phases can be implemented in other forms according to the present disclosure.

[0035] In various forms, the power control system 30 includes a main controller 33 and a plurality of thyristor-based drivers 34. The thyristor-based drivers 34 can be any in number (i.e., 34', 34", ... 34n) and are configured to fire single or multiphase loads 32. In accordance with the example of FIG. 2, three thyristor-based drivers 34 are shown and will be described.

[0036] In various forms, the thyristor-based drivers 34 are silicon controlled rectifier (SCRs), but as can be appreciated, other types of thyristor-based drivers, such as by way of example, triodes for alternating current (TRIACs), Silicon- controlled switches (SCSs), and diodes for alternating current (DIACs) may be employed while remaining within the scope of the present disclosure. Further, the configuration of the load 32 corresponds to the number of thyristor-based drivers 34 and may include a motor, or a heater, by way of example, among other types of loads in a variety of industrial applications.

[0037] In various forms, the main controller 33 includes a communication port 36 configured to assemble messages and communicate the assembled messages over a communication bus 40 according to a wired or wireless communication protocol. In various forms, the communication bus 40 is configured as a digital communication bus with real-time capabilities (e.g., Ethernet TSN, EtherCat, etc.) that communicates the messages in real-time.

[0038] The communication bus 40 communicates the messages between the main controller 33 and the thyristor-based drivers 34. In various forms, as will be discussed in further detail below, the messages communicated from the main controller 33 to the thyristor-based drivers 34 are assembled to include firing order data and, optionally, other data. The firing order data includes data indicating a timing for gate firing within each of the thyristor-based drivers 34. In various forms, as will be discussed in further detail below, the messages received by the main controller33 are assembled to include operational samples data and, optionally, other data. The operational samples data includes samples of operational data including voltages, currents, etc. obtained from the thyristor-based drivers 34.

[0039] As further shown in FIG. 2, each of the thyristor-based drivers 34 is controlled to selectively control power to the load 32 via the respective power lines P1 , P2, and P3. Each thyristor-based driver 34 generally includes one or more sensors44, a firing control device 46, and a micro-controller 48. In various forms, the sensors 44 are configured to sense observable conditions (e.g., voltage, current, etc.) of the respective power lines P1 , P2, and P3 and, in response, generate samples of operational signals in analog form. In various forms, the firing control device 46 includes a gate that is selectively fired to control the power supplied to the loads 32 based on a signal received from the micro-controller 48.

[0040] In accordance with the present disclosure, the micro-controller 48 is communicatively coupled with the sensors 44, and the firing control device 46. For example, the micro-controller 48 is coupled to a power line via a sensor 44 at a point prior to the firing control device 46 to provide a Vline signal input. In another example, the micro-controller 48 is coupled to a power line via a sensor 44 at a point following the firing control device 46 to provide a Vload input. In still another example, the microcontroller 48 is coupled to a power line via a sensor 44 at a point following the firing control device 46 to provide a current input.

[0041] In various forms, the micro-controller 42 generally includes one or more analog to digital converters (ADC) 50, a pulse width modulator (PWM) 52, a processor 54, memory 56, and one or more communication ports 60. The ADCs 50 convert the operational samples from the sensor 44 (e.g., the current input, the Vline input, and the Vload input) from analog samples to digital samples. The PWM 52 generates a firing signal in the form of a pulse width modulated signal to the gate of signal firing device 46 based on the firing order data received from the main controller 33.

[0042] In various forms, the processor 54 can be any custom made or commercially available processor, a central processing unit (CPU), an auxiliary processor among several processors associated with the processor, a semiconductor based microprocessor (in the form of a microchip or chip set), a macro processor, any combination thereof, or generally any device for executing instructions. Although only one processor 54 is shown, any number of processors 54 can be included that communicate over any suitable communication medium or a combination of communication mediums and that cooperate to process the received signals and messages, perform logic, calculations, methods, processes and / or algorithms, and generate control signals to the PWM 52 or data for the communication port 60.

[0043] The memory 56 may include volatile and nonvolatile storage in read-only memory (ROM), random-access memory (RAM), and keep-alive memory(KAM), for example. KAM is a persistent or non-volatile memory that may be used to store various operating variables while the processor 54 is powered down. The memory 56 may be implemented using any of a number of known memory devices such as PROMs (programmable read-only memory), EPROMs (electrically PROM), EEPROMs (electrically erasable PROM), flash memory, or any other electric, magnetic, optical, or combination memory devices capable of storing data, some of which represent executable instructions, used by the processor 54. In various forms, the memory 116 stores instructions, that when executed by the processor 54, filter, accumulate, and synchronize the samples of operational data.

[0044] In various forms, the communication port 60 is configured to assemble and communicate the messages to and from the main controller 32 over the communication bus 40. In various forms, the communication port 60 communicates the messages including the samples of operational data from the micro-controller 48 to the main controller 32. In various forms, the communication port 60 receives the messages including the firing order data form the main controller 32 for use in controlling the fire control device 46.

[0045] With this arrangement, the thyristor-based drivers 48 are configured to provide operational samples data in real-time. More specifically, with the digital communication bus 40, sampling can be triggered at the same moment in time for each of the thyristor-based drivers 34, thereby reducing sampling errors (i.e., jitter) while providing sample data with a high cycle rate. Therefore, real-time calculations of inter-driver values (e.g., line-to-line voltages, currents, power (active, apparent), branch impedance, etc.) are provided. Further, with the real-time samples from the communication bus 40, firing orders from the main controller 22 to each of the thyristorbased drivers 34 are synchronized.

[0046] With this arrangement, a high number of thyristor-based drivers 34 can be implemented with a single main controller 32, with the total number of thyristor-based drivers 34 being limited only by the bandwidth of the digital communications bus 40. Further, the thyristor-based drivers 34 can be a farther distance away from the main controller 32, with the distance only being limited by the physical layer maximum length of the digital communications bus 40.

[0047] In various forms, the firing by the main controller 32 is synchronized to line-to-neutral voltage, such as that disclosed in U.S. Patent No. 10,461 ,537, which is commonly owned with the present application and the contentsof which are incorporated herein by reference in their entirety. More specifically, with a resistive load, line-to-neutral voltage is synchronized with current. Thus, instead of using a static phase shift to synchronize firing from line-to-line signal to line-to-neutral signal, the current signal is used to dynamically measure the phase shift and adjust firing synchronization accordingly.

[0048] In other forms, the firing orders are carried out without any electrical neutral reference, such as that disclosed in U.S. Patent No. 10,613,126, which is also commonly owned with the present application and the contents of which are incorporated herein by reference in their entirety. More specifically, a three-phase power control device is configured to synchronize firing thyristor or SCR sets in consecutive combinations of two of the three phases, to supply current to consecutive combinations of two of the three loads in a three-phase load configuration, to determine real branch impedance of each load from three combinations of two supplied loads, without need of any electrical neutral reference.

[0049] These and other firing schemes should be construed as falling within the scope of the present disclosure, as they can be implemented more efficiently with teachings of the power control system 30, namely, the digital real-time communications bus and the ADCs local to the thyristor-based drivers as set forth herein.

[0050] With reference now to FIG. 3, with continued reference to FIG. 2, a flowchart illustrates a process 100 that can be performed by the thyristor-based drivers 34 in accordance with the present disclosure. As can be appreciated in light of the disclosure, the order of operation within the process 100 is not limited to the sequential execution as illustrated in FIG. 3 but may be performed in one or more varying orders as applicable and in accordance with the present disclosure. In various embodiments, the process 100 can be scheduled to run based on one or more predetermined events, and / or can run continuously during operation of the power control system 30.

[0051] In one example, the process 100 may begin at 101 . Samples of operational signals are sensed by the sensor 44 of the Vline input at 102 to provide analog voltage data. The Vline analog operational signals are converted to digital operational data at 104.

[0052] Samples of operational signals are sensed by the sensor 44 of the current input at 106 to provide analog current data. The current analog operational signals are converted to digital operational data at 108.

[0053] Samples of operational signals are received from the sensor 44 of the Vload input at 110 to provide analog operation data. The Vload analog operational signals are converted to digital operational data at 112.

[0054] As the signals are being converted at 104, 108, and 112 or thereafter, the signals are evaluated for quality and a quality output is provided. The digital operational data from each of the sources is filtered based on the quality output and accumulated at 114. For example, samples having less than a threshold quality output are discarded while samples having greater than a threshold quality output are kept. Once N number (e.g., depending on the number of power systems) of quality samples have been accumulated, the digital operational data from each of the sources is synchronized at 116 for example based on time.

[0055] Thereafter, a message including the filtered and synchronized digital operational data is generated at 118. The message is communicated via the communication port 60 along the communication bus 40 according to a wired or wireless communication protocol.

[0056] If, in return, a message is not received or the received message does not include the firing order data at 122, the process 100 continues at 102, 106, 110 with receiving new operational signals. If, however, in response to the communicated messages the main controller 33 determines the firing order, a message is received at the communications port 60 according to a wired or wireless communication protocol and, it is determined whether the received message includes the firing order data at 122. When the received message includes the firing order data at 122, the firing control device 46 is controlled by the PWM 52 based on the firing control data at 124. Thereafter, the process 100 may end at 126 or, alternatively, continue at 102, 106, 110 with receiving new operational signals.

[0057] Unless otherwise expressly indicated herein, all numerical values indicating mechanical / thermal properties, compositional percentages, dimensions and / or tolerances, or other characteristics are to be understood as modified by the word “about” or "approximately" in describing the scope of the present disclosure. This modification is desired for various reasons including industrial practice, material, manufacturing, and assembly tolerances, and testing capability.

[0058] As used herein, the phrase at least one of A, B, and C should be construed to mean a logical (A OR B OR C), using a non-exclusive logical OR, and should not be construed to mean “at least one of A, at least one of B, and at least one of C.”

[0059] In this application, the term “controller” may be replaced with the term “circuit”. The term “controller” may refer to, be part of, or include: an Application Specific Integrated Circuit (ASIC); a digital, analog, or mixed analog / digital discrete circuit; a digital, analog, or mixed analog / digital integrated circuit; a combinational logic circuit; a field programmable gate array (FPGA); a processor circuit (shared, dedicated, or group) that executes code; a memory circuit (shared, dedicated, or group) that stores code executed by the processor circuit; other suitable hardware components that provide the described functionality; or a combination of some or all of the above, such as in a system-on-chip.

[0060] The term code may include software, firmware, and / or microcode, and may refer to programs, routines, functions, classes, data structures, and / or objects. The term memory circuit is a subset of the term computer-readable medium. The term computer-readable medium, as used herein, does not encompass transitory electrical or electromagnetic signals propagating through a medium (such as on a carrier wave); the term computer-readable medium may therefore be considered tangible and non-transitory.

[0061] The description of the disclosure is merely exemplary in nature and, thus, variations that do not depart from the substance of the disclosure are intended to be within the scope of the disclosure. Such variations are not to be regarded as a departure from the spirit and scope of the disclosure.

Claims

CLAIMSWhat is claimed is:1 . A control system comprising: a digital communication bus; a main controller communicatively coupled to the digital communication bus; and a plurality of thyristor-based drivers configured to control power to a respective load, each thyristor-based driver communicatively coupled to the digital communication bus, wherein each of the thyristor-based drivers is configured to communicate digital messages at least one of to and from the main controller via the digital communications bus, and wherein the digital messages include sampling data or firing order data.

2. The control system of claim 1 , wherein each of the thyristor-based drivers comprises at least one analog to digital converter (ADC) that converts operational samples from analog data to digital data, wherein the sampling data includes the digital data.

3. The control system of claim 2, wherein each of the thyristor-based drivers comprises at least two analog to digital converters and wherein each thyristorbased driver is configured to filter digital data from at least one of the at least two analog to digital converters, wherein the sampling data includes the filtered digital data.

4. The control system of claim 2, wherein each of the thyristor-based drivers comprises at least two analog to digital converters and wherein each thyristorbased driver is configured to synchronize the digital data from the at least two analog to digital converters, wherein the sampling data includes the synchronized digital data.

5. The control system of claim 1 , wherein the main controller is configured to determine a firing order of the thyristor-based drivers based on the sampling datareceived from the thyristor-based drivers and generate the messages including the firing order data.

6. The control system of claim 1 , wherein at least one of the plurality of thyristor-based drivers is a silicon controlled rectifier (SCR).

7. The control system of claim 1, further comprising a three-phase power supply coupled to at least three of the plurality of thyristor-based drivers.

8. The control system of claim 1, wherein the plurality of thyristor-based drivers is coupled to at least one heater.

9. The control system of claim 1, wherein the plurality of thyristor-based drivers is coupled to at least one motor.

10. The control system of claim 1 , wherein the communication bus is a wired communications bus.

11. The control system of claim 1 , wherein the communication bus is a wireless communications bus.

12. A method of controlling power, the method comprising: sensing, by a thyristor-based driver, and generating an analog signal; converting, by the thyristor-based driver, the analog signal to digital operational data; communicating, by the thyristor-based driver, a message including the digital operational data to a main controller via a digital communication bus; in response to the communicating, receiving, from the main controller, a message including firing order data via the digital communication bus; and controlling, by the thyristor-based driver, power to at least one load based on the message including the firing order data.

13. The method of claim 12, further comprising filtering the digital operational data, and wherein the communicating is based on the filtering.

14. The method of claim 12, further comprising: receiving second analog operational data; converting, by the thyristor-based driver, the second analog operational data to second digital operational data; and synchronizing the digital operational data and the second digital operational data, wherein the communicating is based on the synchronizing.

15. The method of claim 12, further comprising determining the firing order of the thyristor-based drivers based on the digital operational data received from the thyristor-based drivers and generating the message including the firing order data based on the determined firing order.

16. The method of claim 12, further comprising supplying, by a three-phase power supply, power to the at least one load and via at least three of the thyristorbased drivers.

17. The method of claim 12, wherein the at least one load is at least one of a heater or a motor.

18. The method of claim 12, wherein the communicating is by way of a wireless communication protocol.

19. The method of claim 12, wherein the communicating is by way of a wired communication protocol.

20. The method of claim 12, wherein the thyristor-based driver is a silicon controlled rectifier (SCR).

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