Power distribution device with solid state power controller

Abstract

According to some aspects of the present disclosure, a power distribution apparatus includes one or more input terminals, each input terminal being connectable to a respective power source; one or more output terminals, each output terminal being connectable to one or more power devices; and one or more electrical paths, each electrical path connecting a respective one of the one or more input terminals and a respective one of the one or more output terminals, and including one or more solid state fuses. According to another aspect of the present disclosure, an aircraft includes a power source; an electric propulsion system; and a power distribution device connected above for delivering electrical energy from the power source to the electric propulsion system.

Description

[0001] Cross-references to related applications

[0002] This application claims priority to Indian Provisional Application No. 202411081355, filed on October 25, 2024, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] This invention relates to the field of power distribution, and more specifically to power distribution devices having solid-state power controllers. Background Technology

[0004] The electric vertical takeoff and landing (eVTOL) vehicle market demands high-power-density electric propulsion and power distribution units (PDUs). Each eVTOL vehicle can contain multiple motors, voltage inverters, and converters, requiring power distribution and management systems. The power requirements of eVTOL motor loads are significantly higher than those of traditional electrical loads. The probability of transient failures is significantly higher at high voltages and currents exceeding 1000 volts compared to low voltage and low current (traditional aircraft systems). The complex power electronics present in the system can lead to power quality issues, and current variations can also cause various faults. Traditional PDUs typically consist of mechanical components such as buses, contactors, and wiring harnesses. These are bulky, difficult to maintain, and pose serious problems for complex, multi-input / output systems. Reliability is also relatively poor, and fuses may or may not trip at the precise point. This presents a very serious problem for eVTOL, as such requirements can be catastrophic in many situations. Wiring harnesses are another critical issue, as they need to be routed above buses and other high-voltage components. This means that wiring harnesses require very high levels of insulation. Furthermore, insulation degrades at high altitudes, and even further, the insulation material needs to function properly at high temperatures. It also needs to be fire-resistant. In summary, traditional PDUs and wiring harnesses are bulky and expensive.

[0005] Therefore, efforts are underway to develop power distribution systems for eVTOL that meet or exceed safety standards (such as mean time between failures (MTBF), failure frequency (e.g., one part per trillion or less) and have sufficiently low electromagnetic interference (EMI) and electromagnetic compatibility (EMC)), while improving the efficiency of eVTOL and reducing its complexity and cost. Summary of the Invention

[0006] In some embodiments disclosed herein, a power distribution device includes: one or more input terminals, each connectable to a corresponding power source; one or more output terminals, each connectable to one or more electrical devices; and one or more electrical paths, each path connecting a corresponding input terminal of the one or more input terminals and a corresponding output terminal of the one or more output terminals, and including one or more solid-state fuses. According to another aspect of this disclosure, an aircraft includes: a power source; an electric propulsion system; and the aforementioned power distribution device connected to deliver electrical energy from the power source to the electric propulsion system. The power distribution device or aircraft may further include a built-in test (BIT) circuit adapted to monitor the operating status of the one or more solid-state fuses and generate an output signal indicating the operating status; and a controller having inputs adapted to receive the output signals from the one or more BIT circuits and adapted to set the state of current flow in the conductive path based on the signals received from the one or more BIT circuits. In some embodiments, the solid-state fuses and BIT circuits may be redundant fuses and redundant BIT circuits, respectively. Attached Figure Description

[0007] Figure 1 The diagram schematically illustrates an power distribution system (EPDS) for an eVTOL vehicle employing solid-state fuses and associated safety and control systems (not shown) in some embodiments.

[0008] Figure 2 The illustration schematically shows what can be used in some embodiments. Figure 1 The solid-state fuse circuit of EPDS is shown.

[0009] Figure 3 The illustration schematically shows what can be used in some embodiments. Figure 1 The EPDS fuse system is shown.

[0010] Figure 4 The illustration schematically shows what can be used in some embodiments. Figure 3 The solid-state fuse assembly of the fuse system shown.

[0011] Figure 5 The illustration schematically shows what can be used in some embodiments. Figure 3 Another solid-state fuse component of the fuse system shown.

[0012] Figure 6 schematically illustrates some embodiments Figure 3 The implementation method of the fuse system is shown.

[0013] Figure 7A The schematic diagram illustrates some embodiments. Figure 3 The left half of another implementation of the fuse system shown.

[0014] Figure 7B yes Figure 7A A close-up view of the portion marked "7B" in the schematic diagram shown.

[0015] Figure 7C yes Figure 7A A close-up view of the portion marked "7C" in the schematic diagram shown.

[0016] Figure 7D yes Figure 7A A close-up view of the portion marked "7D" in the schematic diagram shown.

[0017] Figure 7E yes Figure 7D A close-up view of the portion marked "7E" in the schematic diagram shown.

[0018] Figure 8 A solid-state fuse assembly is schematically illustrated in some embodiments, along with a BIT circuit for monitoring the health of the fuse assembly and a controller for setting the load current.

[0019] Figure 9 A circuit for controlling the time curve for cutting off the current supplied to the load is illustrated schematically in some embodiments.

[0020] Figure 10 Example time curves for cutting off the current supplied to the load are shown in some embodiments.

[0021] Figure 11 The illustration schematically shows the use of in some embodiments Figure 7A The energized BIT (PBIT) circuit of the solid-state fuse assembly used in the fuse system shown.

[0022] Figure 12 The illustration schematically shows the use of in some embodiments Figure 7A The circuit shown is a forward-biased diode-based power-on bit (PBIT) circuit used in the fuse system.

[0023] Figure 13 The illustration schematically shows the use of in some embodiments Figure 7A The circuit shown is a reverse-biased diode-based power-on bit (PBIT) circuit used in the fuse system.

[0024] Figure 14 The illustration schematically shows the use of in some embodiments Figure 7A The circuit shown is a DC-DC relay, contactor, and secondary feeder fuse energized BIT (PBIT) circuit used in the fuse system.

[0025] Figure 15 The illustration schematically shows the use of in some embodiments Figure 7A The solid-state fuse assembly used in the fuse system shown has a continuous BIT (PBIT) circuit.

[0026] Figure 16 The illustration schematically shows the use of in some embodiments Figure 7A The continuous bit-in (PBIT) circuit of the DC-DC relay used in the fuse system shown.

[0027] Figure 17A and 17B The short-circuit (SC) detector for solid-state fuse assemblies and the current sensing comparator used in the SC detector are schematically illustrated in some embodiments.

[0028] Figure 18 A diode fault detection using a current sensor is illustrated in some embodiments. Detailed Implementation

[0029] The following disclosure provides several different embodiments or examples for implementing different features of the provided subject matter. To simplify this disclosure, specific examples of components and arrangements are described below. Of course, these examples are merely illustrative and not intended to be limiting. For example, in the following description, the formation of a first feature over or on a second feature may include embodiments where the first and second features are in direct contact, and may also include embodiments where an additional feature is formed between the first and second features such that the first and second features are not in direct contact. Furthermore, reference numerals and / or letters may be repeated in various examples. Such repetition is for brevity and clarity and does not, in itself, limit the relationship between the various embodiments and / or configurations discussed.

[0030] Figure 1An EPDS 100 according to some embodiments is shown. In this example, as shown, the EPDS system is connected to an aircraft system and is divided into two parts 110 and 150, one for the left half of the aircraft and the other for the right half. The EPDS 100 has four main battery inputs 111, 151, 113, and 153, one high-voltage (HV) ground power input 117, and two auxiliary battery inputs 115 and 155. The EPDS 100 also provides output power to sixteen power units 121 and 161 (e.g., which could be the motors of the aircraft rotor), two low-voltage (LV) DC-DC converter outputs 123 and 163 (e.g., which could be used to power various electronics including BIT circuitry and the controller for the EPDS itself). The EPDS 100 in this example also includes data communication ports, such as RS485 ports 127 and 167, a CAN interface 131 and 171, and discrete inputs and outputs 129 and 169. In some cases, maintenance inputs 133 and 173 are also provided.

[0031] In some embodiments, for example Figure 3 In the illustrated embodiment, EPDS 100 is functionally divided into two parts: LHEPDS1 and RH EPDS2. These two interfaces are almost identical to each other, with only minor differences. The main components of LH EPDS1 include (RH EPDS2 contains almost identical corresponding components): Contactors: Two solid-state switches T1 and T2 (in module M1) will be used to enable the HV ground power interface. One is for the positive HV line, and the other is for the negative HV line. They are normally closed; they will be enabled when an HV interlock insertion signal is received and other safety conditions are met. This is used for battery charging and is only located in EPDS1. Another contactor in EPDS2, with solid-state switches T5 and T6 (in module M3), is used to connect power from EPDS1 to EPDS2. This is used for battery charging and power routing in emergencies. For DC-DC distribution, relays with solid-state switches T3 and T4 (in module M2) will be used instead of contactors.

[0032] Busbars: Busbars will be used to provide high-power connections. There will be a network of buses from the battery input to the various EPU outputs and the DC-DC output.

[0033] Fuse: Solid-state fuses F1-F11 provide short-circuit protection. There is one fuse between each power unit (EPU) output, and another fuse between the battery and the main feeder for all functions. There are also fuses at the DC-DC converter outputs.

[0034] Diodes: Diodes D1-D4 are used for reverse voltage protection of the HV ground power charging interface. They also serve as a blocking device to prevent current from flowing from the main battery to the auxiliary battery. As shown in the diagram, each EPDU has two locations for diodes; the anodes are common and connected to the auxiliary battery, and the cathodes of each group of diodes are connected to the respective main battery.

[0035] Current sensors: Current sensors A1, A2... are used to measure current and transmit it through a communication interface.

[0036] Temperature sensors: Each EPD fuse has a temperature sensor TS, TS1, TS2, etc. In some examples, these sensors are resistive and can be combined to form a single resistor. Four EPD fuse sensors are combined together. Diode and heat sink assemblies also have dedicated temperature sensors.

[0037] Voltage sensors: Each EPDU has four voltage sensors V1, V2...

[0038] Insulation monitoring device: Insulation monitoring devices (not shown) are included in some examples. The monitor in the example is a Bender insulation monitoring device.

[0039] PDU Controller Electronics: Each EPDS may contain one or more PDU controller PCBs. In one example, the PDU controller, as the main controller device, is a Field Programmable Gate Array (FPGA). Other types of controllers may also be used. An Auxiliary Power Supply (APS) board powers the FPGA board. In some embodiments, the FPGA board and the APS board have analog circuitry for measuring different measurement signals.

[0040] Wiring harness: The PDU controller is connected to various sensors, connectors and other PDU controllers via a wiring harness.

[0041] EPDS ( Figure 3 The 300 also includes main battery power inputs 301, 303, 305, and 307; auxiliary battery power inputs 311 and 313; HV DC-DC outputs 321 and 323; and HV ground power interface 341.

[0042] Figure 2A solid-state fuse 200 is shown, comprising components 201 and 211, each including switching transistors 203 and 213, reverse-biased diodes 205 and 215, capacitors 207 and 217, and resistors 201 and 219, respectively. The switching transistors can be, for example, power metal-oxide-semiconductor field-effect transistors (MOSFETs), such as silicon carbide MOSFETs. The MOSFETs can be turned on or off by a current source 220, thereby turning current on or off when biased by a voltage 230. In this example, an inductor 241 is combined with other electronic components to prevent current and voltage spikes.

[0043] Figure 5 The formation of a solid-state fuse is shown (which could be, for example, Figure 3 An example of a solid-state component (fuse F4) is shown. This component comprises four pairs of MOSFETs, one or more parallel pairs 501, 503 connected in series with another one or more parallel pairs 505, 507. In this example, each pair of MOSFETs (501, etc.) is connected in series with a resistor (511, etc.) used as a current sensor. Current buffers 521, 523 are also included, as shown. Figure 4 A more detailed structure of component F4 is shown, illustrating the MOSFETs 401 and 402 connected in parallel in each pair.

[0044] Figure 6 shows Figure 3 A detailed circuit diagram of another embodiment of the fuse and switch connection is shown. In this example, each fuse F4-F11 and F15-F22 includes a group of three MOSFETs connected in parallel and connected in series.

[0045] Figure 7A An embodiment is shown, wherein in Figure 3 Each fuse, switch, and diode in the system type is connected to a corresponding PBIT and / or CBIT circuit for monitoring the operating status to meet the required safety parameters. Figure 7B , 7C 7D and 7E show Figure 7A A more detailed view of the corresponding parts is provided below. The individual monitoring and control circuits will be described in more detail below.

[0046] Figure 8A detailed circuit diagram of a fuse (e.g., F4) and associated monitoring and control devices is shown. The associated circuitry includes a PBIT circuit 801, a CBIT circuit 803, a temperature sensor 805, a voltage sensor 807, an isolation amplifier 809 for amplifying the current signal from the current sensor 511, a controller (in some examples, an FPGA) 811, an I / O expander 813, a fuse trip circuit 815, a short-circuit (SC) detector 817, an AND gate 819, an analog-to-digital converter (ADC) 821, and a communication port 823. In this example, the MOSFET gate is energized and thus the MOSFET conducts only when the current sensed by resistor 511 is sufficiently low and the controller 811 outputs a gate enable signal via I / O expander 813, causing the output of AND gate 819 to activate the MOSFET's gate driver. If the fuse current is too high, the trip circuit 815 outputs a trip status signal, which causes the AND gate output to turn off the MOSFET's gate driver. The processor 811 can also turn off the MOSFETs, for example, based on signals received by the controller 811 from the various sensors 801, 803, 805, 807.

[0047] The following description Figure 8 The various components within.

[0048] Figure 9Example 900 of trip circuit 815 is shown. The trip circuit includes a current sensor 901 (511), fast trip comparators and slow trip comparators 907, 917 (reference input provided by reference voltage divider 903), a latch IC 921 for latching faults (cleared only after power-on), and an AND gate 931 (819) that allows the FPGA 811 to override the trip blocks to trip or enable them during PBIT when everything is normal. Each trip block has a current trip level set as required, and the module trips when the current exceeds that level. For example, the circuit layout might require approximately 10 μs to detect an overcurrent condition and trip. To avoid false tripping, two levels are maintained: slow trip and fast trip. Slow trip has a lower current constant and a longer duration, while fast current trip has a higher current trip level and a faster duration. The time constant is set by RC circuits 905 and 915. During normal flight mode, the trip block is active when there is actual current flow. There are two tripping levels: slow and fast. When the current is in the slow tripping region, it is typically low, while when the current exceeds the high current threshold, it trips very quickly compared to a fuse. Arc-free fast tripping and programmable tripping (using the R and C values ​​in the circuit) are significant advantages of solid-state fuses. Especially when the battery / load inductance is very small and a short circuit exists, the current can reach very high values ​​if the fault is not cleared very quickly. All of this is done analogally, making it much faster and simpler than digital methods using microprocessors and ADC networks.

[0049] Figure 10 It shows the use of Figure 9 The example current versus time curves obtained from the circuit of the type shown are shown. The curves can be set by selecting the R and C values ​​for fast-trip and slow-trip circuits, but can also be accomplished using digital methods or a combination of analog and digital methods.

[0050] Figure 11 A PBIT circuit 1100 (801) for a fuse is shown. During PBIT, the main processor (DSP / uC / FPGA (811)) ensures there is no high voltage, then enables the fuse by opening the gate of a MOSFET in the fuse module (e.g., F4), and then enables the PBIT logic consisting of an isolated DC-DC power supply 1107 (which may also include a MOSFET 1105 to block reverse HV). This sends a current of known magnitude into the MOSFETs. If all MOSFETs are intact, the current returns and turns on an LED within the optocoupler 1103, indicating that PBIT has passed. Otherwise, a fault condition is indicated. This is repeated for all fuses.

[0051] The following diagram shows the output indication of the optocoupler.

[0052]

[0053] Figure 12 A PBIT circuit 1200 for forward biasing a diode (e.g., D1) is shown. To check the diode's health, the PBIT circuit is connected across the diode's anode and cathode pins. When HV is absent, it detects the diode's health in a manner similar to the PBIT used for fuses described above.

[0054] The following diagram shows the output indication of the optocoupler.

[0055]

[0056] In some embodiments, there are two different power supplies that are turned on based on whether the test is positive or negative PBIT. Figure 13 A PBIT circuit 1300 for a reverse-biased diode (e.g., D1) is shown. To check the diode's health, the PBIT circuit is connected across the diode's anode and cathode pins. When HV is absent, it detects the diode's health in a manner similar to the PBIT used for fuses described above.

[0057] The following diagram shows the output indication of the optocoupler.

[0058]

[0059] Figure 14 A PBIT circuit 1400 is shown for use with DC-DC relays, GPU and bus connection contactors, and secondary feeder fuses. An isolated LV 15V DC-DC power supply 1107 provides current through closed contacts. If the controller commands the MOSFET circuit to close, the optocoupler 1103 will be turned on; otherwise, it will be turned off. Even if the command is to turn on, if the optocoupler remains off, the main controller can detect an open circuit in the PBIT test. The same procedure is repeated for short-circuit tests, except in cases where the MOSFET circuit is not given an on command.

[0060] The following diagram shows the output indication of the optocoupler.

[0061]

[0062] Furthermore, in some embodiments, the same PBIT circuit is connected to the negative line for both the contactor and the DC-DC relay to check the health of the MOSFET. The secondary feeder fuse is connected only to the positive line.

[0063] Figure 15A CBIT circuit 1500 (803) for a fuse is shown. The controller 811 will repeatedly test the CBIT to identify any faults. The CBIT is performed to identify the health state of the MOSFET when the HV voltage is present. The following are the different types of CBITs used in the SSPC PDU. Two types of CBITs are used: CBIT 01 MOSFET cannot be turned on.

[0064] CBIT 01 is used for EPU fuses.

[0065] CBIT 01 is used for DC-DC relays.

[0066] CBIT 01 is used for GPU contactors.

[0067] CBIT 01 is used for secondary feeder fuses.

[0068] CBIT 02 MOSFET short circuit failure.

[0069] The CBIT 02 logic is the same for EPU fuses, contactors, DC-DC relays, and secondary feeder fuses.

[0070] In a CBIT used for fuses, each fuse has an optocoupler connected in parallel. When a fuse breaks, current flows through the optocoupler, and the main controller receives feedback that the fuse has blown. In the event of a short circuit in the MOSFET circuit, the main controller 811 expects the device to disconnect because there is no command; however, if the device does not disconnect, it is claimed as a short circuit. Two fuses connected in series share a common CBIT section to save components and space.

[0071] In the circuit above, when the two MOSFETs connected in series become open, the controller can only determine that a connection has not been established between the secondary feed and the EPU by detecting a low level. If one of the MOSFETs is turned on, the level will be high. A separate circuit will be explained later to determine the fault caused by a short circuit in the MOSFET itself.

[0072] The table below explains how to use MOSFET enable to determine whether a fuse is open or healthy.

[0073]

[0074] Feeder fuse CBIT: In addition, if it is a feeder fuse and an optocoupler, the software needs to measure the voltage difference between the two batteries and combine it with the enable to determine whether the fuse is open or short-circuited.

[0075] Figure 16The relay CBIT circuit 1600 for a housing relay is shown. One MOSFET is in the positive line and one MOSFET is in the negative line.

[0076] The indicated CBIT situation is as follows:

[0077] Figure 17 illustrates the CBIT MOSFET short-circuit detection circuit 1700. Since the SSPC PDU uses multiple MOSFETs, a common failure mode is short circuit. In the CBIT, short circuits are detected by sensing current and understanding the MOSFET's enable state. Each MOSFET is equipped with a current sensor 1701 and a comparator 1703. If the MOSFET remains on regardless of the ON command, a short circuit is determined. The comparator's output is fed to a controller such as an FPGA, which compares it with the MOSFET gate command and determines whether the MOSFET is short-circuited. This is particularly useful when a fuse is required to open but cannot due to a short circuit. In this case, the FPGA 811 uses a redundant channel in the negative link or a redundant channel in a series dual-channel configuration in the positive link to disconnect the link.

[0078] Figure 18 A diode fault detection CBIT circuit 1800 is shown. The controller 811 uses current sensors (e.g., A3 and A5) to monitor the health of two diodes when HV is present. The diodes in the PDU only conduct when the main battery voltage is lower than the auxiliary battery voltage. A3 will provide the current of a single diode, and A5 will provide the current of both diodes from the auxiliary battery.

[0079] The diagram below illustrates how the controller monitors and indicates the health status of the two diodes. Each diode branch in the SSPC PDU uses the same logic.

[0080]

[0081] While various embodiments and examples have been described herein, those skilled in the art will understand that many modifications can be made to them within the scope of this disclosure. Therefore, the scope of this disclosure is not intended to be limited in any way by the examples provided.

Claims

1. A power distribution device, comprising: One or more input terminals, each of which can be connected to a corresponding power supply; One or more output terminals, each of which can be connected to one or more electrical devices; as well as One or more electrical paths, each connecting a corresponding input terminal of the one or more input terminals and a corresponding output terminal of the one or more output terminals, and including one or more solid-state fuses.

2. The power distribution device according to claim 1, wherein, Each of the one or more solid-state fuses includes a plurality of switching transistors.

3. The power distribution device according to claim 2, wherein, Each of the plurality of switching transistors comprises a silicon carbide metal-oxide-semiconductor field-effect transistor.

4. The power distribution device according to claim 1, further comprising: One or more built-in test circuits are adapted to monitor the operating status of the one or more solid-state fuses and generate an output signal indicating the operating status. as well as A controller having an input adapted to receive an output signal from the one or more built-in test circuits, and adapted to set the state of current flow in the conductive path based on the signal received from the one or more built-in test circuits.

5. The power distribution device according to claim 4, wherein, Each of the one or more built-in test circuits includes a continuous built-in test circuit.

6. The power distribution device according to claim 5, wherein, Each of the one or more built-in test circuits includes a power-on built-in test circuit.

7. The power distribution device according to claim 1, wherein, At least one of the one or more electrical paths further includes a diode adapted to restrict the current flow in the electrical path to one direction along the conductive path.

8. The power distribution device according to claim 7, further comprising: A first built-in test circuit is adapted to monitor the operating status of the solid-state fuse and generate an output signal indicating the operating status. The second built-in test circuit is adapted to monitor the operating status of the diode and generate an output signal indicating the operating status of the diode. as well as A controller having inputs adapted to receive output signals from the first built-in test circuit and the second built-in test circuit, and adapted to set the state of current flow in the conductive path based on the signals received from the first built-in test circuit and the second built-in test circuit.

9. The power distribution device according to claim 1, wherein, The one or more solid-state fuses include multiple redundant solid-state fuses.

10. The power distribution device according to claim 4, wherein, The one or more built-in test circuits include multiple redundant built-in test circuits.

11. The power distribution device according to claim 4, wherein, The state of the current flow is set to change the current flow, and the controller is adapted to change the current flow according to a predetermined time curve.

12. An aircraft propulsion system, comprising: One or more power sources; One or more electric propulsion devices; as well as A power distribution device, comprising: One or more input terminals, each input terminal being able to be connected to a corresponding power source among the one or more power sources; One or more output terminals, each output terminal capable of being connected to the one or more electric propulsion devices; and One or more electrical paths, each connecting a corresponding input terminal of the one or more input terminals and a corresponding output terminal of the one or more output terminals, and including one or more solid-state fuses.

13. The aircraft propulsion system according to claim 12, wherein, Each of the one or more solid-state fuses includes a plurality of switching transistors.

14. The aircraft propulsion system according to claim 13, wherein, Each of the plurality of switching transistors comprises a silicon carbide metal-oxide-semiconductor field-effect transistor.

15. The aircraft propulsion system according to claim 12, further comprising: One or more built-in test circuits are adapted to monitor the operating status of the one or more solid-state fuses and generate an output signal indicating the operating status. as well as A controller having an input adapted to receive an output signal from the one or more built-in test circuits, and adapted to set the state of current flow in the conductive path based on the signal received from the one or more built-in test circuits.

16. The aircraft propulsion system according to claim 12, wherein, At least one of the one or more electrical paths further includes a diode adapted to restrict the current flow in the electrical path to one direction along the conductive path.

17. The aircraft propulsion system according to claim 16, further comprising: A first built-in test circuit is adapted to monitor the operating status of the solid-state fuse and generate an output signal indicating the operating status. The second built-in test circuit is adapted to monitor the operating status of the diode and generate an output signal indicating the operating status of the diode. as well as A controller having inputs adapted to receive output signals from the first built-in test circuit and the second built-in test circuit, and adapted to set the state of current flow in the conductive path based on the signals received from the first built-in test circuit and the second built-in test circuit.

18. The aircraft propulsion system according to claim 12, wherein, The one or more solid-state fuses include multiple redundant solid-state fuses.

19. The aircraft propulsion system according to claim 15, wherein, The one or more built-in test circuits include multiple redundant built-in test circuits.

20. The aircraft propulsion system according to claim 15, wherein, The state of the current flow is set to change the current flow, and the controller is adapted to change the current flow according to a predetermined time curve.

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