Display panel and display device

Abstract

The present invention relates to the technical field of display, and provides a display panel and a display device, for use in blocking or extending a transmission path of lateral leakage current between two adjacent sub-pixels, and ensuring the connection reliability of second electrodes of sub-pixels. In the display panel, sub-pixels in the i-th row include first sub-pixels and second sub-pixels alternately arranged in a first direction; sub-pixels in the (i+1)th row include second sub-pixels and third sub-pixels alternately arranged in the first direction; sub-pixels in the j-th column include first sub-pixels and second sub-pixels alternately arranged in a second direction; and sub-pixels in the (j+1)th column include second sub-pixels and third sub-pixels alternately arranged in the second direction. The display panel comprises at least one first group, the first group comprises multiple partition portions, the multiple partition portions are arranged in m rows and n columns along the first direction and the second direction, the partition portions partially surround the sub-pixels, and each partition portion comprises a notch. The orientations of the notches of at least two partition portions in the first group are different.

Description

Display panel and display device

[0001] This invention claims priority to Chinese Patent Application No. 202410692483.X, filed with the State Intellectual Property Office of China on May 30, 2024, entitled “Display Panel and Display Device”, the entire contents of which are incorporated herein by reference. Technical Field

[0002] This invention relates to the field of display technology, and more specifically to a display panel and a display device. Background Technology

[0003] Organic light-emitting diode (OLED) display panels are widely used in the field of display technology due to their many advantages, such as active light emission, high contrast, and no viewing angle limitation.

[0004] In OLED display panels, to enhance carrier migration and recombination efficiency, functional layers such as electron transport layers, electron injection layers, hole transport layers, and hole injection layers are typically placed between the electrodes and the light-emitting layer of the OLED device. However, since these functional layers usually cover the entire surface of the display panel, during display, in addition to the normal vertical migration of carriers from their respective cathodes and / or anodes to their corresponding light-emitting layers, carriers also migrate laterally between different OLED devices through these functional layers. This lateral leakage leads to crosstalk between different sub-pixels during display, for example, causing sub-pixels that should not emit light to do so, thus affecting the display effect.

[0005] Summary of the Invention

[0006] In view of this, the present invention provides a display panel and a display device to solve the problem of lateral leakage causing light-emitting devices to malfunction and emit light illegally in the prior art.

[0007] In a first aspect, embodiments of the present invention provide a display panel, comprising:

[0008] Substrate;

[0009] Multiple sub-pixels are arrayed along a first direction and a second direction. Each sub-pixel includes a first sub-pixel, a second sub-pixel, and a third sub-pixel. The sub-pixels in the i-th row include first sub-pixels and second sub-pixels arranged alternately along the first direction; the sub-pixels in the (i+1)-th row include second sub-pixels and third sub-pixels arranged alternately along the first direction; the sub-pixels in the j-th column include first sub-pixels and second sub-pixels arranged alternately along the second direction; and the sub-pixels in the (j+1)-th column include second sub-pixels and third sub-pixels arranged alternately along the second direction.

[0010] The second direction intersects with the first direction;

[0011] At least one first group, the first group comprising a plurality of partitions, the plurality of partitions being arranged in m rows and n columns along a first direction and a second direction, the partitions partially surrounding the sub-pixels, the partitions including notches; m and n are both integers greater than or equal to 2; in the first group, at least two partitions have notches with different orientations; the orientation of the notch of the partition refers to the direction in which the centroid of the orthographic projection of the sub-pixel corresponding to the partition on the plane of the substrate points to the center of the notch, wherein the center of the notch refers to the midpoint of the line connecting the two endpoints of the partition forming the notch.

[0012] Secondly, embodiments of the present invention provide a display device, including the display panel described above.

[0013] The display panel and display device provided in this invention, by providing a partial partition surrounding the sub-pixels, can block or extend the path of lateral leakage current transmission through the common layer between adjacent sub-pixels, suppressing the transmission of lateral leakage current and improving the display effect. Furthermore, by providing a notch in the partition, this invention can prevent the second electrode formed after the partition from being disconnected or thinned at the notch, allowing the second electrode to be formed into a continuous structure with greater thickness at the notch. This helps reduce the voltage drop of the signal transmitted by the second electrode during transmission and improves the voltage uniformity of the second electrode in the display area.

[0014] Furthermore, by making the orientations of the notches of at least two partitions in the first group different, the second electrode can be made to be continuous at the notch, while the distance between the notches corresponding to different sub-pixels can be set to be larger. This can extend the transmission path of the lateral leakage current between different sub-pixels, suppress or avoid the problem of sub-pixel stealth lighting, and improve the display effect of the display panel. Attached Figure Description

[0015] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0016] Figure 1 is a top view of a display panel provided in an embodiment of the present invention;

[0017] Figure 2 is an enlarged schematic diagram of a first group provided in an embodiment of the present invention;

[0018] Figure 3 is a cross-sectional schematic diagram of a display panel provided in an embodiment of the present invention;

[0019] Figure 4 is a cross-sectional schematic diagram of another display panel provided in an embodiment of the present invention;

[0020] Figure 5 is a cross-sectional schematic diagram of another display panel provided in an embodiment of the present invention;

[0021] Figure 6 is a cross-sectional schematic diagram of another display panel provided in an embodiment of the present invention;

[0022] Figure 7 is an enlarged schematic diagram of a sub-pixel and a partition provided in an embodiment of the present invention;

[0023] Figure 8 is an enlarged schematic diagram of another first group provided in an embodiment of the present invention;

[0024] Figure 9 is an enlarged schematic diagram of another first group provided in an embodiment of the present invention;

[0025] Figure 10 is an enlarged schematic diagram of another first group provided in an embodiment of the present invention;

[0026] Figure 11 is an enlarged schematic diagram of another first group provided in an embodiment of the present invention;

[0027] Figure 12 is an enlarged schematic diagram of another first group provided in an embodiment of the present invention;

[0028] Figure 13 is an enlarged schematic diagram of a first unit provided in an embodiment of the present invention;

[0029] Figure 14 is an enlarged schematic diagram of another first unit provided in an embodiment of the present invention;

[0030] Figure 15 is an enlarged schematic diagram of another first unit provided in an embodiment of the present invention;

[0031] Figure 16 is an enlarged schematic diagram of another first unit provided in an embodiment of the present invention;

[0032] Figure 17 is a top view of another display panel provided in an embodiment of the present invention;

[0033] Figure 18 is a cross-sectional schematic diagram of another display panel provided in an embodiment of the present invention;

[0034] Figure 19 is a schematic diagram of a display device provided in an embodiment of the present invention. Detailed Implementation

[0035] To better understand the technical solution of the present invention, the embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0036] It should be understood that the described embodiments are merely some, not all, of the embodiments of the present invention. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without inventive effort are within the scope of protection of the present invention.

[0037] The terminology used in the embodiments of this invention is for the purpose of describing particular embodiments only and is not intended to limit the invention. The singular forms “a,” “the,” and “the” as used in the embodiments of this invention and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise.

[0038] It should be understood that the term "and / or" used in this article is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. Additionally, the character " / " in this article generally indicates that the preceding and following related objects have an "or" relationship.

[0039] In view of this, embodiments of the present invention provide a display panel, as shown in FIG1, which is a top view schematic diagram of a display panel provided by an embodiment of the present invention. The display panel 100 includes a substrate 1 and a plurality of sub-pixels 2 arranged in an array along a first direction h1 and a second direction h2 on the same side of the substrate 1. For example, as shown in FIG1, the sub-pixels 2 include a first sub-pixel 21, a second sub-pixel 22, and a third sub-pixel 23, and the emitted light colors of the first sub-pixel 21, the second sub-pixel 22, and the third sub-pixel 23 are different from each other. For example, the first sub-pixel 21 includes a red sub-pixel, the second sub-pixel 22 includes a green sub-pixel, and the third sub-pixel 23 includes a blue sub-pixel. FIG1 uses different filling patterns to distinguish the first sub-pixel 21, the second sub-pixel 22, and the third sub-pixel 23.

[0040] As shown in Figure 1, the i-th row sub-pixel 201_i includes a first sub-pixel 21 and a second sub-pixel 22 alternating along the first direction h1; the (i+1)-th row sub-pixel 201_i+1 includes a second sub-pixel 22 and a third sub-pixel 23 alternating along the first direction h1; the j-th column sub-pixel 202_j includes a first sub-pixel 21 and a second sub-pixel 22 alternating along the second direction h2; the (j+1)-th column sub-pixel 202_j+1 includes a second sub-pixel 22 and a third sub-pixel 23 alternating along the second direction h2; the second direction h2 and the first direction h1 intersect; where i and j are both arbitrary positive integers.

[0041] As shown in Figures 1 and 2, Figure 2 is an enlarged schematic diagram of a first group provided in an embodiment of the present invention. The display panel 100 further includes at least one first group 3. The first group 3 includes a plurality of partition portions 4, which are arranged in m rows and n columns along a first direction h1 and a second direction h2, where m and n are both integers greater than or equal to 2. Figures 1 and 2 are illustrated with m = n = 4. The partition portions 4 partially surround the sub-pixels 2.

[0042] For example, as shown in FIG3, FIG3 is a cross-sectional schematic diagram of a display panel provided in an embodiment of the present invention. The sub-pixel 2 includes a first electrode 201, a light-emitting layer 203, a second electrode 202, and a common layer 204. The partition portion 4 is located on the side of the common layer 204 near the substrate 1. Optionally, the common layer 204 includes a first sub-common layer 2041 and a second sub-common layer 2042. The first sub-common layer 2041 is located between the first electrode 201 and the light-emitting layer 203, and the second sub-common layer 2042 is located between the second electrode 202 and the light-emitting layer 203. Optionally, the common layer 204 can be fabricated using a common mask.

[0043] Optionally, the display panel 100 includes a pixel definition layer 8, which includes an opening 80 that exposes at least a portion of the first electrode 201.

[0044] In this embodiment of the invention, the first electrodes 201 of different sub-pixels 2 are independent of each other, and the second electrodes 202 of multiple sub-pixels 2 are electrically connected to each other.

[0045] Optionally, the first electrode 201 includes an anode, and the second electrode 202 includes a cathode. The first sub-common layer 2041 includes a hole injection layer and / or a hole transport layer. The second sub-common layer 2042 includes an electron injection layer and / or an electron transport layer.

[0046] As shown in Figure 3, the partition portion 4 includes a protrusion 401 that protrudes towards the side away from the substrate 1. Optionally, the protrusion 401 includes a first side surface S11 and a first bottom surface S12 towards the side near the substrate 1. In this embodiment of the invention, the included angle between the first side surface S11 and the first bottom surface S12 towards the interior of the protrusion 401 can be an obtuse angle, that is, the area of ​​the side of the protrusion 401 away from the substrate 1 is larger than the area of ​​the side near the substrate 1. Based on this configuration, the common layer 204 formed after the protrusion 401 cannot be formed on the first side surface S11 and thus breaks at the protrusion 401. This can block the path of lateral leakage current transmission between two adjacent sub-pixels 2 through the common layer 204, thereby suppressing the transmission of lateral leakage current and improving the display effect.

[0047] In another optional embodiment, as shown in FIG4, which is a cross-sectional schematic diagram of another display panel provided by an embodiment of the present invention, the included angle between the first side surface S11 and the first bottom surface S12 toward the interior of the protrusion 401 can also be an acute angle, that is, the area of ​​the side of the protrusion 401 away from the substrate 1 is larger than the area of ​​the side closer to the substrate 1. Based on this arrangement, the common layer 204 formed after the protrusion 401 is formed on the first side surface S11. Based on the morphological characteristics of the protrusion 401, the path of lateral leakage current transmitted through the common layer 204 between two adjacent sub-pixels 2 can be extended, thereby suppressing the transmission of lateral leakage current and improving the display effect.

[0048] In another optional embodiment, as shown in FIG5, which is a cross-sectional schematic diagram of another display panel provided by an embodiment of the present invention, the partition portion 4 includes a recessed portion 402 recessed on one side facing the substrate 1. The recessed portion 402 includes a second side surface S21 and a second bottom surface S22 on the side close to the substrate 1. As shown in FIG5, the included angle between the second side surface S21 and the second bottom surface S22 is an obtuse angle. Based on this configuration, a common layer 204 formed after the recessed portion 402 is formed on the second side surface S21 of the recessed portion 402. Based on the morphological characteristics of the recessed portion 402, the path of lateral leakage current transmitted through the common layer 204 between two adjacent sub-pixels 2 can be extended, thereby suppressing the transmission of lateral leakage current and improving the display effect.

[0049] In another optional embodiment, as shown in FIG6, which is a cross-sectional schematic diagram of another display panel provided by an embodiment of the present invention, the included angle between the second side surface S21 and the second bottom surface S22 can also be an acute angle. Based on this configuration, the common layer 204 formed after the recess 402 cannot be formed on the second side surface S21 and is thus disconnected at the recess 402. This can block the path of lateral leakage current transmission between two adjacent sub-pixels 2 through the common layer 204, thereby suppressing the transmission of lateral leakage current and improving the display effect.

[0050] For example, as shown in Figures 5 and 6, in embodiments of the present invention, the recess 402 can be formed in the pixel definition layer 8. For example, the recess 402 and the opening 80 can be formed in the same process. Optionally, the recess 402 and the opening 80 can be fabricated using a half-grayscale mask.

[0051] For example, as shown in Figures 5 and 6, in this embodiment of the invention, the depth of the recessed portion 402 can be less than the thickness of the pixel definition layer 8, that is, the second bottom surface S22 of the recessed portion 402 is located inside the pixel definition layer 8. Alternatively, in this embodiment of the invention, the depth of the recessed portion 402 can be equal to the thickness of the pixel definition layer 8, that is, the recessed portion 402 penetrates through the pixel definition layer 8. In another optional embodiment, in this embodiment of the invention, the depth of the recessed portion 402 can be greater than the thickness of the pixel definition layer 8, that is, the recessed portion 402 penetrates through the pixel definition layer 8, and the recessed portion 402 continues to be recessed towards the side closer to the substrate 1, so that the second bottom surface S22 of the recessed portion 402 is located in other organic layers between the pixel definition layer 8 and the substrate 1. For example, a planarization layer may also be included between the pixel definition layer 8 and the substrate 1, and in this embodiment of the invention, the second bottom surface S22 of the recessed portion 402 is located inside the planarization layer.

[0052] In this embodiment of the invention, as shown in Figures 1 and 2, the partition 4 is a non-closed shape including a notch 40. The notch 40 prevents the second electrode 202, formed after the partition 4, from being interrupted or thinned at the notch 40. It allows the second electrode 202 to form a continuous structure with greater thickness at the notch 40, which helps reduce the voltage drop of the signal transmitted by the second electrode 202 during transmission and improves the voltage uniformity of the second electrode 202 within the display area.

[0053] In the first group 3 provided in the embodiments of the present invention, the orientations of the notches 40 of at least two partition portions 4 are different. As shown in FIG7, FIG7 is an enlarged schematic diagram of a sub-pixel and a partition portion provided in the embodiments of the present invention. The orientation of the notch 40 of the partition portion 4 refers to the direction from the centroid X1 of the orthographic projection of the sub-pixel 2 corresponding to the partition portion 4 onto the plane of the substrate 1 to the center X2 of the notch 40, i.e., the arrow X1X2. The center X2 of the notch 40 refers to the midpoint of the line connecting the two endpoints of the partition portion 4 forming the notch 40. As shown in FIG7, the partition portion 4 includes a first endpoint D1 and a second endpoint D2. The notch 40 is located between the first endpoint D1 and the second endpoint D2. The midpoint of the line connecting the first endpoint D1 and the second endpoint D2 is the center X2 of the notch 40. FIG7 shows that the orientation of the notch 40 of the partition portion 4 partially surrounding the third sub-pixel 23 is parallel to the second direction h2.

[0054] When the orthographic projection of sub-pixel 2 onto the plane of substrate 1 is a regular shape, the centroid X1 of the orthographic projection of sub-pixel 2 onto the plane of substrate 1 is the center of the orthographic projection of sub-pixel 2 onto the plane of substrate 1.

[0055] It is understood that the centroid of a subpixel mentioned in this application can be defined as the center point of mass distribution of the geometric shape of the subpixel's opening, i.e., the centroid. If the geometric shape of the subpixel's opening is a regular geometric shape, then the geometric center of the subpixel's opening coincides with its centroid. For example, if the shape of the subpixel's opening is a parallelogram, the intersection of the two diagonals of the parallelogram is both its geometric center and its centroid. If the geometric shape of the subpixel's opening is an asymmetrical irregular geometric shape, then its centroid can be determined through related technologies, but its geometric center is more difficult to determine. In this case, the relative positional relationship between the geometric center and the centroid of the subpixel's opening is difficult to determine. It should be noted that the regular graphics (regular geometric shapes) in this invention satisfy at least one of the following conditions: 1) centrally symmetric graphics; 2) axially symmetric graphics with two or more axes of symmetry. For example, ellipses, parallelograms (not rectangles and not rhombuses), circles, rounded rectangles, regular polygons, rectangles, rhombuses, etc., are all regular graphics. For a centrally symmetric figure, its central symmetry point is the center (centroid); for an axially symmetric figure with two or more axes of symmetry, the intersection of the two axes of symmetry is the center (centroid). Figures other than those classified as regular figures are called irregular figures.

[0056] In this embodiment of the invention, as exemplarily shown in Figures 1 and 2, the notches 40 of at least two partition portions 4 are in different orientations. Figure 2 uses a first arrow A1 to indicate the orientation of the notch 40 partially surrounding one of the first sub-pixels 21, which is parallel to the second direction h2. A second arrow A2 indicates the orientation of the notch 40 partially surrounding one of the third sub-pixels 23, which is parallel to the first direction h1. Based on this arrangement, while ensuring the continuity of the second electrode 202 at the notch 40, the distance between the notches 40 corresponding to different sub-pixels 2 can be set to be larger. This extends the transmission path of lateral leakage current between different sub-pixels 2, suppressing or avoiding the problem of sub-pixels 2 igniting, and improving the display effect of the display panel.

[0057] As can be seen, the display panel 100 provided in this embodiment of the invention, by providing a partition portion 4 surrounding the sub-pixels 2, can block or extend the path of lateral leakage current transmission through the common layer 204 between two adjacent sub-pixels 2, suppressing the transmission of lateral leakage current and improving the display effect. Furthermore, by providing a notch 40 in the partition portion 4, this embodiment of the invention can avoid the second electrode 202, formed after the partition portion 4, from being disconnected or thinned at the notch 40. This allows the second electrode 202 to be formed into a continuous structure with greater thickness at the notch 40, which helps reduce the voltage drop of the signal transmitted by the second electrode 202 during transmission and improves the voltage uniformity of the second electrode 202 in the display area.

[0058] Furthermore, by making the orientations of the notches 40 of at least two partition portions 4 in the first group 3 different, the second electrode 202 can be made to be continuous at the notches 40, while the distance between the notches 40 corresponding to different sub-pixels 2 can be set to be larger. This can extend the transmission path of the lateral leakage current between different sub-pixels 2, suppress or avoid the problem of the sub-pixels 2 being overexposed, and help improve the display effect of the display panel.

[0059] For example, m = n. For instance, m = 4, n = 4. As shown in Figures 1 and 2, the display panel 100 includes a virtual quadrilateral 5, which corresponds to a first group 3. Each of the four sides of the virtual quadrilateral 5 corresponds to four partitions 4 and four sub-pixels 2, with a one-to-one correspondence between the partitions 4 and the sub-pixels 2. For the four partitions 4 corresponding to one side of the virtual quadrilateral 5, two partitions 4 correspond to the vertices of the virtual quadrilateral 5, and the other two partitions 4 correspond to the non-vertices on the sides of the virtual quadrilateral 5.

[0060] As shown in Figure 2, the virtual quadrilateral 5 includes four vertices and four sides. The four vertices are labeled as vertex 501, vertex 502, vertex 503, and vertex 504. Vertex 501, vertex 502, vertex 503, and vertex 504 are arranged clockwise. The four sides are labeled as side 51, side 52, side 53, and side 54. Side 51, side 52, side 53, and side 54 are arranged clockwise.

[0061] As shown in Figure 2, the first side 51 and the third side 53 extend along the first direction h1, and the second side 52 and the fourth side 54 extend along the second direction h2. The first side 51 and the second side 52 intersect at the first vertex 501, the second side 52 and the third side 53 intersect at the second vertex 502, the third side 53 and the fourth side 54 intersect at the third vertex 503, and the fourth side 54 and the first side 51 intersect at the fourth vertex 504. Figure 2 uses the first vertex 501 of the virtual quadrilateral 5 as the first sub-pixel 21, the second vertex 502 as the second sub-pixel 22, the third vertex 503 as the third sub-pixel 23, and the fourth vertex 504 as another second sub-pixel 22 for illustration.

[0062] As shown in Figure 2, on the first side 51 of the virtual quadrilateral 5, the first sub-pixel 21 and the second sub-pixel 22 are arranged alternately. On the second side 52 of the virtual quadrilateral 5, the first sub-pixel 21 and the second sub-pixel 22 are arranged alternately. On the third side 53 of the virtual quadrilateral 5, the second sub-pixel 22 and the third sub-pixel 23 are arranged alternately. On the fourth side 54 of the virtual quadrilateral 5, the third sub-pixel 23 and the second sub-pixel 22 are arranged alternately.

[0063] For example, in the virtual quadrilateral 5, the notches 40 of the two partition portions 4 on at least one side, excluding the vertex, are in the same orientation. As shown in Figure 2, the notches 40 of the two partition portions 4 on each of the four sides of the virtual quadrilateral 5, excluding the vertex, are in the same orientation as an illustration. In this embodiment of the invention, by setting the orientation of the gaps 40 of the two partition portions 4 on one side of the virtual quadrilateral 5 (excluding the vertex) to be the same, when the display panel 100 is working, for two adjacent sub-pixels 2 located on the side of the virtual quadrilateral 5 (excluding the vertex), taking the partition portion 4 as a protrusion 401 that can separate the common layer 204 as shown in FIG. 3, or a recess 402 that can separate the common layer 204 as shown in FIG. 6, the lateral leakage current needs to start from the gap 40 corresponding to one of the sub-pixels 2, bypass the partition portion 4 of the other sub-pixel, and then flow from the gap 40 of the other sub-pixel 2 to the common layer of that sub-pixel 2. This can at least extend the lateral leakage current transmission path of the two adjacent sub-pixels 2 located on the side of the virtual quadrilateral 5 (excluding the vertex). FIG. 2 illustrates the transmission path of the lateral leakage current between the two gaps 40 with the same orientation with a dashed arrow.

[0064] Optionally, in this embodiment of the invention, in the virtual quadrilateral 5, among the two sides intersecting at the same vertex, at least one side has the same orientation of the gap 40 of the partition portion 4 as the gap 40 of the partition portion 4 at the vertex. Figure 2 illustrates this with the following orientations: the gap 40 of the partition portion 4 on the first side 51 is the same as the gap 40 of the partition portion 4 at the first vertex 501; the gap 40 of the partition portion 4 on the second side 52 is the same as the gap 40 of the partition portion 4 at the second vertex 502; the gap 40 of the partition portion 4 on the third side 53 is the same as the gap 40 of the partition portion 4 at the third vertex 503; and the gap 40 of the partition portion 4 on the fourth side 54 is the same as the gap 40 of the partition portion 4 at the fourth vertex 504. Based on this arrangement, the transmission path of lateral leakage current between the sub-pixel 2 located at the vertex of the virtual quadrilateral 5 and its adjacent sub-pixels 2 can be increased.

[0065] For example, in the virtual quadrilateral 5 provided in this embodiment of the invention, the notches 40 of the partition portions 4 on at least two opposite sides are in the same orientation. Figure 2 illustrates this by showing that the notches 40 of the partition portions 4 on the first side 51 and the third side 53 are in the same orientation, both of which are parallel to the first direction h1. The notches 40 of the partition portions 4 on the second side 52 and the fourth side 54 are in the same orientation, both of which are parallel to the second direction h2.

[0066] In another alternative embodiment, the present invention may also make the orientation of the notches 40 of the partition portions 4 on at least two opposite sides of the virtual quadrilateral 5 different.

[0067] Optionally, in embodiments of the present invention, the orientations of the gaps 40 on at least two opposite sides of the virtual quadrilateral 5 of the partition portion 4 can be reversed. As shown in Figure 8, which is an enlarged schematic diagram of another first group provided by an embodiment of the present invention, the orientations of the gaps 40 on the non-vertex positions of the partition portion 4 on the first side 51 and the third side 53 are reversed, as are the orientations of the gaps 40 on the non-vertex positions of the partition portion 4 on the second side 52 and the fourth side 54. Specifically, as shown in Figure 8, the orientation of the gaps 40 on the first side 51 at least at non-vertex positions is parallel to the first direction h1; the orientation of the gaps 40 on the third side 53 at least at non-vertex positions is parallel to the third direction h3; the orientation of the gaps 40 on the second side 52 at least at non-vertex positions is parallel to the fourth direction h4; and the orientation of the gaps 40 on the fourth side 54 at least at non-vertex positions is parallel to the second direction h2.

[0068] For example, as shown in Figure 9, which is an enlarged schematic diagram of another first group provided by an embodiment of the present invention, the notch 40 of the partition portion 4 in the first side 51 is parallel to the third direction h3, the notch 40 of the partition portion 4 in the third side 53 is parallel to the first direction h1, and the third direction h3 is opposite to the first direction h1; the notch 40 of the partition portion 4 in the second side 52 is parallel to the second direction h2, and the notch 40 of the partition portion 4 in the third side 53 is parallel to the fourth direction h4, and the fourth direction h4 is opposite to the second direction h2. This arrangement allows the notches 40 of the partition portions 4 on the four sides of the virtual quadrilateral 5 to be arranged clockwise, which, while extending the transmission path of the lateral leakage current between two adjacent sub-pixels 2, makes the orientation distribution of the notches 40 more regular, thus reducing design difficulty.

[0069] In another optional embodiment, the orientations of the gaps 40 in the partition portions 4 on two opposite sides of the virtual quadrilateral 5 are different, while the orientations of the gaps 40 in the partition portions 4 on the other two opposite sides are the same. As shown in FIG10, FIG10 is an enlarged schematic diagram of another first group provided by the embodiment of the present invention, wherein the orientations of the gaps 40 in the partition portions 4 on the first side 51 are opposite to the orientations of the gaps 40 in the partition portions 4 on the third side 53, the orientation of the gaps 40 in the partition portions 4 on the first side 51 is parallel to the first direction h1, the orientation of the gaps 40 in the partition portions 4 on the third side 53 is parallel to the third direction h3, the orientations of the gaps 40 in the partition portions 4 on the second side 52 and the orientations of the gaps 40 in the partition portions 4 on the fourth side 54 are the same, and the orientations of the gaps 40 in the partition portions 4 on the second side and the fourth side 54 are both parallel to the second direction h2 as an illustration.

[0070] In another optional embodiment, as shown in FIG11, FIG11 is an enlarged schematic diagram of another first group provided by the embodiment of the present invention, wherein the orientation of the notch 40 of the partition portion 4 in the first side 51 is opposite to the orientation of the notch 40 of the partition portion 4 in the third side 53, the orientation of the notch 40 of the partition portion 4 on the first side 51 is parallel to the third direction h3, the orientation of the notch 40 of the partition portion 4 on the third side 53 is parallel to the first direction h1, the orientation of the notch 40 of the partition portion 4 on the second side 52 is the same as the orientation of the notch 40 of the partition portion 4 on the fourth side 54, and the orientation of the notch 40 of the partition portion 4 on the second side and the orientation of the notch 40 of the partition portion 4 on the fourth side 54 are both parallel to the second direction h2 as an illustration.

[0071] In another optional embodiment, the present invention embodiment may also make the orientations of the gaps 40 of the partition portions 4 in the two sets of opposite sides of the virtual quadrilateral 5 different, as shown in FIG12. FIG12 is an enlarged schematic diagram of another first group provided by the present invention embodiment, wherein the orientation of the gaps 40 of the partition portions 4 in the first side 51 is opposite to the orientation of the gaps 40 of the partition portions 4 in the third side 53, the orientation of the gaps 40 of the partition portions 4 on the first side 51 is parallel to the third direction h3, the orientation of the gaps 40 of the partition portions 4 on the third side 53 is parallel to the first direction h1, the orientation of the gaps 40 of the partition portions 4 on the second side 52 is opposite to the orientation of the gaps 40 of the partition portions 4 on the fourth side 54, and the orientation of the gaps 40 of the partition portions 4 on the second side 52 is parallel to the fourth direction h4, and the orientation of the gaps 40 of the partition portions 4 on the fourth side 54 is parallel to the second direction h2 as an illustration.

[0072] In another alternative embodiment, in the virtual quadrilateral 5, the present invention embodiment may also arrange the notches 40 of the partition portions 4 in at least two adjacent sides in a clockwise or counterclockwise direction.

[0073] As shown in Figure 8, the orientation of the gaps 40 in the partitions 4 of any two adjacent sides of the virtual quadrilateral 5 is arranged counterclockwise as an illustration.

[0074] As shown in Figure 9, the orientation of the gaps 40 in the partitions 4 of any two adjacent sides of the virtual quadrilateral 5 is arranged clockwise as an illustration.

[0075] As shown in Figure 10, the notches 40 of the partitions 4 on the first side 51, the fourth side 54 and the third side 53 of the virtual quadrilateral 5 are arranged in a counterclockwise direction as an illustration.

[0076] As shown in Figure 11, the notches 40 of the partitions 4 on the first side 51, the second side 52, and the third side 53 of the virtual quadrilateral 5 are arranged clockwise as an illustration.

[0077] In one feasible manner, in the virtual quadrilateral 5, the orientations of the gaps 40 of the partition portions 4 in at least two adjacent sides intersect; the orientations of the gaps 40 of the partition portions 4 in two adjacent sides both point to the intersection of the two sides, or the orientations of the gaps 40 of the partition portions 4 in two adjacent sides both turn away from the intersection of the two sides.

[0078] Referring to Figure 10, the orientation of the gap 40 in the partition 4 of the second side 52 of the virtual quadrilateral 5 points to the second vertex 502, and the orientation of the gap 40 in the partition 4 of the third side 53 also points to the second vertex 502. The intersection of the second side 52 and the third side 53 is the second vertex 502.

[0079] Referring to Figure 11, the orientation of the gap 40 in the partition 4 of the first side 51 of the virtual quadrilateral 5 is away from the fourth vertex 504, and the orientation of the gap 40 in the partition 4 of the fourth side 54 is also away from the fourth vertex 504. The intersection of the first side 51 and the fourth side 54 is the fourth vertex 504. Similarly, the orientation of the gap 40 in the partition 4 of the third side 53 points to the third vertex 503, and the orientation of the gap 40 in the partition 4 of the fourth side 54 also points to the third vertex 503. The intersection of the third side 53 and the fourth side 54 is the third vertex 503.

[0080] Referring to Figure 12, the notches 40 of the partition portions 4 in the first side 51 and the second side 52 are both pointing towards the first vertex 501, the intersection of the two sides; the notches 4 of the partition portions 4 in the third side 53 and the fourth side 54 are both pointing towards the third vertex 503, the intersection of the two sides; the notches 40 of the partition portions 4 in the second side 52 and the third side 53 are both away from the second vertex 502, the intersection of the two sides; and the notches 40 of the partition portions 4 in the fourth side 54 and the first side 51 are both away from the fourth vertex 504, as an illustration.

[0081] For example, as shown in Figures 1 and 13, Figure 13 is an enlarged schematic diagram of a first unit provided in an embodiment of the present invention. The display panel 100 further includes at least one first unit 6. The first unit 6 includes four of the aforementioned first groups 3, which are arranged in an array along a first direction h1 and a second direction h2. Along the first direction h1, in two adjacent first groups 3, the fourth side 54 of one first group 3 is reused as the second side 52 of the other first group 3; along the second direction h2, in two adjacent first groups 3, the third side 53 of one first group 3 is reused as the first side 51 of the other first group 3. For ease of explanation, in Figure 13, the four first groups 3 are respectively labeled as a first subgroup 31, a second subgroup 32, a third subgroup 33, and a fourth subgroup 34. The first subgroup 31, the second subgroup 32, the third subgroup 33, and the fourth subgroup 34 are arranged clockwise. That is, the first subgroup 31 and the second subgroup 32 are arranged along the second direction h2, the fourth subgroup 34 and the third subgroup 33 are arranged along the second direction h2, the second subgroup 32 and the third subgroup 33 are arranged along the first direction h1, and the first subgroup 31 and the fourth subgroup 34 are arranged along the first direction h1. The first side of the first subgroup 31 is labeled as 51_31, the second side of the first subgroup 31 is labeled as 52_31, and so on.

[0082] In this embodiment of the invention, the fourth side 54_31 of the first subgroup 31 is reused as the second side 52_34 of the fourth subgroup 34, where "reuse" means that the fourth side 54_31 of the first subgroup 31 is also the second side 52_34 of the fourth subgroup 34. The third side 53_31 of the first subgroup 31 is reused as the first side 51_32 of the second subgroup 32; the fourth side 54_32 of the second subgroup 32 is reused as the second side 52_33 of the third subgroup 33; and the third side 53_34 of the fourth subgroup 34 is reused as the first side 51_33 of the third subgroup 33.

[0083] For example, as shown in FIG13, the first unit 6 includes a fifth side 61, a sixth side 62, a seventh side 63, and an eighth side 64. The fifth side 61 and the seventh side 63 extend along a first direction h1, and the sixth side 62 and the eighth side 64 extend along a second direction h2. The fifth side 61 includes the first side 51 of two adjacent first groups 3 in the first direction h1, the sixth side 62 includes the second side 52 of two adjacent first groups 3 in the second direction h2, the seventh side 63 includes the third side 53 of two other adjacent first groups 3 in the first direction h1, and the eighth side 64 includes the fourth side 54 of two other adjacent first groups 3 in the second direction h2. As shown in Figure 13, the fifth side 61 includes the first side 51_31 of the first subgroup 31 and the first side 51_34 of the fourth subgroup 34; the sixth side 62 includes the second side 52_31 of the first subgroup 31 and the second side 52_32 of the second subgroup 32; the seventh side 63 includes the third side 53_32 of the second subgroup 32 and the third side 53_33 of the third subgroup 33; and the eighth side 64 includes the fourth side 54_33 of the third subgroup 33 and the fourth side 54_34 of the fourth subgroup 34.

[0084] For example, as shown in FIG1, multiple first units 6 can be arrayed in a first direction h1 and a second direction h2 to cover the display area of ​​the display panel 100. Adjacent first units 6 in the first direction h1 share a common edge. Adjacent first units 6 in the second direction h2 also share a common edge. Specifically, as shown in FIG1, the eighth edge 64 of a first unit 6 is reused as the sixth edge 62 of another first unit 6 adjacent to the first unit 6 in the first direction h1, and the seventh edge 63 of a first unit 6 is reused as the fifth edge 61 of another first unit 6 adjacent to the first unit 6 in the second direction h2.

[0085] For example, as shown in FIG14, which is an enlarged schematic diagram of another first unit provided in an embodiment of the present invention, the present invention allows the orientation of the notches 40 of the partition portions 4 in the first side 51 and third side 53 of the four first groups 3 included in the first unit 6 to be parallel to the first direction h1; and the orientation of the notches 40 of the partition portions 4 in the second side 52 and fourth side 54 of the four first groups 3 to be parallel to the second direction h2. Based on this arrangement, the arrangement pattern of the notches 40 of the partition portions 4 in the four first groups 3 included in the first unit 6 can be made the same, thereby improving the pattern consistency at different positions and improving the display effect.

[0086] Alternatively, as shown in Figure 15, which is an enlarged schematic diagram of another first unit provided in an embodiment of the present invention, the arrangement pattern of the notches 40 of the partition portions 4 in the first subgroup 31 and the fourth subgroup 34 can be set to be the same, the arrangement pattern of the notches 40 of the partition portions 4 in the second subgroup 32 and the third subgroup 33 can be set to be the same, and the arrangement pattern of the notches 40 of the partition portions 4 in the first subgroup 31 and the second subgroup 32 can be set to be different. Specifically, in the first subgroup 31 and the fourth subgroup 34, the orientation of the notches 40 of the partition portions 4 in the first side 51 is parallel to the first direction h1, the orientation of the notches 40 of the partition portions 4 in the second side 52 and the fourth side 54 is parallel to the second direction h2, and the orientation of the notches 40 of the partition portions 4 in the third side 53 is parallel to the third direction h3. In the second subgroup 32 and the third subgroup 33, the orientation of the notch 40 of the partition 4 in the first side 51 is parallel to the third direction h3, the orientation of the notch 40 of the partition 4 in the second side 52 and the fourth side 54 is parallel to the second direction h2, and the orientation of the notch 40 of the partition 4 in the third side 53 is parallel to the first direction h1.

[0087] In another alternative embodiment, within the first unit 6, in two adjacent first groups 3 along either the first direction h1 or the second direction h2, the orientation of the notch 40 of the partition portion 4 in the first side 51 is parallel to either the first direction h1 or the third direction h3, and the orientation of the notch 40 of the partition portion 4 in the third side 53 is parallel to the other of the first direction h1 and the third direction h3, with the third direction h3 being opposite to the first direction h1. The orientation of the notch 40 of the partition portion 4 in the second side 52 and the fourth side 54 is parallel to either the second direction h2 or the fourth direction h4. Figure 15 illustrates the following: the notch 40 of the partition portion 4 in the first side 51 of the first subgroup 31 is parallel to the first direction h1; the notch 4 of the partition portion 4 in the first side 51 of the fourth subgroup 34, which is adjacent to the first subgroup 31 in the first direction h1, is also parallel to the first direction h1; the notch 40 of the partition portion 4 in the third side 53 of the first subgroup 31 is parallel to the third direction h3; the notch 40 of the partition portion 4 in the fourth subgroup 34, which is adjacent to the first subgroup 31 in the first direction h1, is also parallel to the third direction h3; and the notches 40 of the partition portions 4 in the second side 52 and the fourth side 54 are both parallel to the second direction h2.

[0088] In an embodiment of the present invention, for example, along the first direction h1 and / or the second direction h2, in two adjacent first groups 3, the notches 40 of the partition portions 4 of one first group 3 are arranged clockwise, and the notches 40 of the partition portions 4 of the other first group 3 are arranged counterclockwise.

[0089] For example, along the first direction h1 and the second direction h2, in both embodiments of the present invention, the orientation of the notches of the partition portions 4 in one of two adjacent first groups 3 is arranged clockwise, and the orientation of the notches 40 of the partition portions 4 in the other first group 3 is arranged counterclockwise. As shown in FIG13, the orientation of the notches 40 of the partition portions 4 in the first subgroup 31 is arranged clockwise, the orientation of the notches 40 of the partition portions 4 in the fourth subgroup 34 adjacent to the first subgroup 31 in the first direction h1 is arranged counterclockwise, the orientation of the notches 40 of the partition portions 4 in the second subgroup 32 adjacent to the first subgroup 31 in the second direction h2 is arranged counterclockwise, and the orientation of the notches 40 of the partition portions 4 in the third subgroup 33 adjacent to the fourth subgroup 34 in the second direction h2 is arranged clockwise.

[0090] Based on this arrangement, the orientation of the gaps 40 of the partition portions 4 on the fifth side 61 and the seventh side 63 of the first unit 6 can be the same, and the orientation of the gaps 40 of the partition portions 4 on the sixth side 62 and the eighth side 64 can be the same, so that multiple first units 6 can be repeatedly arranged to fill the display area of ​​the display panel 100 while sharing the same side.

[0091] It should be noted that the arrangement of the notches 40 of the partition portions 4 in each of the first groups 3 in a clockwise or counterclockwise direction means that the orientation of the notches 40 of the partition portions 4 at positions other than the vertices on each side of the virtual quadrilateral 5 corresponding to the first group 3 is clockwise. Since a vertex is shared by at least two sides intersecting at that vertex, the orientation of the notch 40 of the partition portion 4 at the vertex may be the same as the orientation of the notch 40 of the partition portion 4 on only one of the aforementioned at least two sides, and different from the orientation of the notches 40 of the partition portions 4 on the other sides. Taking the fourth subgroup 34 as an example, as shown in Figure 13, the arrangement of the notches 4 of the partition portions 4 in the fourth subgroup 34 in a counterclockwise direction means that the orientation of the notches 4 of the partition portions 4 at positions other than the vertices on each side of the virtual quadrilateral 5 corresponding to the fourth subgroup 34 is clockwise. As shown in Figure 13, the orientation of the gap 40 in the partition portion 4 (excluding the vertex) of the first side 51_34 intersecting with the fourth vertex 504_34 of the fourth subgroup 34 is parallel to the first direction h1. The orientation of the gap 40 in the partition portion 4 (excluding the vertex) of the fourth side 54_34 intersecting with the fourth vertex 504_34 is parallel to the second direction h2. The orientation of the gap 40 in the partition portion 4 at the fourth vertex 504_34 is parallel to the fourth direction h4. Referring to Figure 1, this fourth vertex 504_34 is reused as the third vertex 503_33 of the third subgroup 33 of another first unit 6 adjacent to the first unit 6 in the second direction h2. The orientation of the gap 40 in the partition portion 4 (excluding the vertex) of the fourth side 54 of the third subgroup 33 of another first unit 6 adjacent to the first unit 6 in the first direction h1 is also parallel to the fourth direction h4.

[0092] Alternatively, in this embodiment of the invention, the four first groups 3 in the first unit 6 may include a first subgroup 31, wherein the notches 40 of the partition portions 4 in the first subgroup 31 are arranged clockwise; along the first direction h1, in the first group 3 adjacent to the first subgroup 31, that is, the aforementioned fourth subgroup 34, the notches 40 of the partition portions 4 in the first side 51 and the second side 52 are all far away from the intersection of the first side 51 and the second side 52, and the notches 40 of the partition portions 4 in the third side 53 and the fourth side 54 are all far away from the third side 53 and the fourth side 54. The intersection of 4; along the second direction h2, in the first group 3 adjacent to the first subgroup 31, that is, in the aforementioned second subgroup 32, the gaps 40 of the partition parts 4 in the first side 51 and the second side 52 are all facing the intersection of the first side 51 and the second side 52, and the gaps 40 of the partition parts 4 in the third side 53 and the fourth side 54 are all facing the intersection of the third side 53 and the fourth side 54; in the other first group 3 of the four first groups 3 other than the above three, that is, in the aforementioned third subgroup 33, the orientation of the gaps 40 of the partition parts 4 is arranged counterclockwise.

[0093] As shown in Figure 16, which is an enlarged schematic diagram of another first unit provided in an embodiment of the present invention, the notches 40 of the partition portions 4 in the first subgroup 31 are arranged clockwise, the notches 40 of the partition portions 4 in the third subgroup 33 are arranged counterclockwise, the notches 40 of the partition portions 4 in the first side 51-32 of the second subgroup 32 are parallel to the first direction h1, the notches 40 of the partition portions 4 in the second side 52-32 are parallel to the second direction h2, and the notches 40 of the partition portions 4 in the third side 53-32 are parallel to the first direction h1. The position of the notch 40 in the partition 4 in the fourth side 54_32 is parallel to the third direction h3; the position of the notch 40 in the partition 4 in the first side 51_34 of the fourth subgroup 34 is parallel to the first direction h1, the position of the notch 40 in the partition 4 in the second side 52_34 is parallel to the fourth direction h4, the position of the notch 40 in the partition 4 in the third side 53_32 is parallel to the third direction h3, and the position of the notch 40 in the partition 4 in the fourth side 54_32 is parallel to the second direction h2 as an illustration.

[0094] As exemplarily shown in Figures 1, 2, 8, 9, 10, 11, 12, 13, 14, 15, and 16, the display panel 100 further includes a plurality of support portions 7; the orthographic projection of the support portion 7 onto the plane of the substrate 1 lies within the virtual quadrilateral 5 corresponding to the first group 3. Optionally, the support portion 7 can be used to support a mask used in the fabrication process of the display panel 100. Exemplarily, the orthographic projection of the support portion 7 onto the plane of the substrate 1 at least partially overlaps with the geometric center of the virtual quadrilateral 5. Optionally, the support portion 7 can be disposed in the same layer as the aforementioned protrusion 401.

[0095] As shown in Figures 8-12, the virtual quadrilateral 5 also includes four sub-pixels arranged in an array along the first direction h1 and the second direction h2, which are surrounded by the four sides of the virtual quadrilateral 5. These four sub-pixels are a third sub-pixel 23 and a second sub-pixel 22 arranged along the first direction h1, and a second sub-pixel 22 and a first sub-pixel 21 arranged along the first direction h1. The partition 4 includes a first partition 41, a second partition 42, and a third partition 43, which are surrounded by the four sides of the virtual quadrilateral 5. The first partition 41 partially surrounds the first sub-pixel 21 located inside the virtual quadrilateral 5, the second partition 42 partially surrounds the second sub-pixel 22 located inside the virtual quadrilateral 5, and the third partition 43 partially surrounds the third sub-pixel 23 located inside the virtual quadrilateral 5.

[0096] As shown in Figures 1, 2, 8, 9, 10, 11, 12, 13, 14, 15, and 16, the notch 40 of the first partition 41 and the notch 40 of the third partition 43 both face the support 7. The notch 40 of the second partition 42 faces away from the support 7; that is, there is no notch on the side of the second partition 42 closest to the support 7.

[0097] For example, the area of ​​the first sub-pixel 21 is larger than the area of ​​the third sub-pixel 23, and the area of ​​the second sub-pixel 22 is larger than the area of ​​the third sub-pixel 23. In this embodiment of the invention, by setting the notch 40 of the partition portion 4, which corresponds to the larger areas of the first sub-pixel 21 and the second sub-pixel 22, towards the support portion 7, the distance between the non-notch positions of the first partition portion 41 and the second partition portion 42 and the support portion 7 can be increased. This fully utilizes the space on the display panel 100, increasing pixel density, while reducing the difficulty of setting the support portion 7 located between the first sub-pixel 21 and the second sub-pixel 22. Furthermore, the support portion 7 also has a certain isolation effect on lateral leakage current; therefore, the setting of the notch 40 towards the support portion 7 will not cause crosstalk between sub-pixels 2 of different colors located on both sides of the notch 40.

[0098] On the other hand, based on the above configuration, the distance between the gap 40 corresponding to the first sub-pixel 21 and the second sub-pixel 22 and the gap 40 located on the side of the virtual quadrilateral 5 can be increased, thereby increasing the transmission path of the lateral leakage current between the first sub-pixel 21 and the other sub-pixel 2 located on the side of the virtual quadrilateral 5, so as to effectively avoid crosstalk between the first sub-pixel 21 and the other sub-pixel 2 located on the side of the virtual quadrilateral 5 due to the lateral leakage current; and increasing the transmission path of the lateral leakage current between the second sub-pixel 22 and the other sub-pixel 2 located on the side of the virtual quadrilateral 5, so as to effectively avoid crosstalk between the second sub-pixel 22 and the other sub-pixel 2 located on the side of the virtual quadrilateral 5 due to the lateral leakage current.

[0099] Furthermore, by making the notch 40 of the second partition portion 42 face away from the support portion 7, the transmission path of the lateral leakage current between the second sub-pixel 22 and the first sub-pixel 21, as well as the transmission path of the lateral leakage current between the second sub-pixel 22 and the third sub-pixel 23, can be increased to effectively avoid crosstalk between the second sub-pixel 22 and another adjacent sub-pixel due to the lateral leakage current.

[0100] For example, as shown in FIG17, FIG17 is a top view schematic diagram of another display panel 100 provided in an embodiment of the present invention. The display panel 100 further includes multiple scan lines 91 and multiple data lines 92. The scan lines 91 extend along a fifth direction h5, and the multiple scan lines 91 are arranged along a sixth direction h6. The data lines 92 extend along the sixth direction h6, and the multiple data lines 92 are arranged along the fifth direction h5. The fifth direction h5 and the sixth direction h6 intersect. Both the fifth direction h5 and the sixth direction h6 are parallel to the plane defined by the intersection of the first direction h1 and the second direction h2. Furthermore, the fifth direction h5 intersects with both the first direction h1 and the second direction h2, and the sixth direction h6 intersects with both the first direction h1 and the second direction h2. FIG17 illustrates the perpendicularity of the fifth direction h5 and the sixth direction h6. The scan lines 91 are electrically connected to a plurality of sub-pixels 2 arranged along the fifth direction h5, and the data lines 92 are electrically connected to a plurality of sub-pixels 2 arranged along the sixth direction h6. As shown in Figure 17, for two adjacent scan lines 91, one scan line 91 is electrically connected to a plurality of first sub-pixels 21 and a plurality of third sub-pixels 23 arranged alternately along the fifth direction h5, and the other scan line 91 is electrically connected to a plurality of second sub-pixels 22 arranged alternately along the fifth direction h5. Furthermore, the sub-pixels 2 connected to the two adjacent scan lines 91 are staggered in the sixth direction h6. For two adjacent data lines 92, one data line 92 is electrically connected to a plurality of first sub-pixels 21 and a plurality of third sub-pixels 23 arranged alternately along the sixth direction h6, and the other data line 92 is electrically connected to a plurality of second sub-pixels 22 arranged alternately along the sixth direction h6. Furthermore, the sub-pixels 2 connected to the two adjacent data lines 92 are staggered in the fifth direction h5. When the display panel 100 is operating, the data lines 92 provide data voltage, and the multiple scan lines 91 sequentially provide control signals to control the charging of the sub-pixels 2, so that the corresponding sub-pixels 2 are charged with the data voltage provided by the data lines 92 and illuminated at the required brightness.

[0101] Optionally, as shown in Figure 18, which is a cross-sectional schematic diagram of another display panel provided in an embodiment of the present invention, the light-emitting layer 203 includes a first light-emitting layer 2031 and a second light-emitting layer 2032. The second light-emitting layer 2032 is located on the side of the first light-emitting layer 2031 away from the substrate 1. The orthographic projection of the second light-emitting layer 2032 onto the plane of the substrate 1 at least partially overlaps with the orthographic projection of the first light-emitting layer 2031 onto the plane of the substrate 1. At least a portion of the first light-emitting layer 2031 and the second light-emitting layer 2032 are located within the opening 80. For example, both the first light-emitting layer 2031 and the second light-emitting layer 2032 can be fabricated using a fine metal mask (FMM). The first light-emitting layer 2031 is deposited within the opening 80 of the pixel definition layer 8 and can partially extend outside the opening 80. The first light-emitting layers 2031 of different sub-pixels 2 are independent of each other. The second light-emitting layers 2032 of different sub-pixels 2 are independent of each other.

[0102] For example, the first light-emitting layer 2031 and the second light-emitting layer 2032 may have the same color or different colors.

[0103] As shown in FIG18, sub-pixel 2 further includes a charge generation layer 205, which is located between the first light-emitting layer 2031 and the second light-emitting layer 2032. For example, as shown in FIG18, the charge generation layer 205 may be disconnected at the location of the partition portion 4. Alternatively, the charge generation layer 205 may be provided to protrude from the partition portion 4 toward the side away from the substrate 1 to increase the transmission path of lateral leakage current in the charge generation layer 205.

[0104] The display panel 100 provided in this embodiment of the invention improves the brightness of the sub-pixels 2 and reduces the power consumption of the display panel 100 by designing the sub-pixels 2 as a series structure including a first light-emitting layer 2031 and a second light-emitting layer 2032 stacked together, thereby increasing the lifespan of the display panel 100. Furthermore, by providing the aforementioned partition 4 in the display panel 100, this embodiment of the invention can suppress or isolate the lateral leakage current between two adjacent sub-pixels 2, overcoming crosstalk between adjacent sub-pixels 2 caused by the high conductivity of the charge generation layer 205, thus improving the display quality of the display panel 100.

[0105] This invention also provides a display device, as shown in FIG19. FIG19 is a schematic diagram of a display device provided in this invention, the display device including the display panel 100 described above. The specific structure of the display panel 100 has been described in detail in the above embodiments and will not be repeated here. Of course, the display device shown in FIG19 is merely illustrative, and the display device can be any electronic device with display function, such as a mobile phone, tablet computer, laptop computer, e-reader, or television.

[0106] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A display panel, characterized by, The display panel comprises: a substrate; a plurality of sub-pixels arranged in an array along a first direction and a second direction, the sub-pixels comprising first sub-pixels, second sub-pixels and third sub-pixels, an i-th row of the sub-pixels comprising the first sub-pixels and the second sub-pixels arranged alternately along the first direction, an (i+1)-th row of the sub-pixels comprising the second sub-pixels and the third sub-pixels arranged alternately along the first direction, a j-th column of the sub-pixels comprising the first sub-pixels and the second sub-pixels arranged alternately along the second direction, a (j+1)-th column of the sub-pixels comprising the second sub-pixels and the third sub-pixels arranged alternately along the second direction; the second direction and the first direction intersect; at least one first group, the first group comprising a plurality of partition portions, the plurality of partition portions being arranged in m rows and n columns along the first direction and the second direction, the partition portions partially surrounding the sub-pixels, the partition portions comprising notches, m and n each being an integer greater than or equal to 2, in the first group, the notches of at least two of the partition portions are in different orientations, the orientation of the notch of the partition portion refers to a direction in which a center of a projection of a gravity center of the sub-pixel corresponding to the partition portion on a plane in which the substrate is located points to a center of the notch, wherein the center of the notch refers to a midpoint of a line connecting two endpoints of the partition portion forming the notch.

2. The display panel of claim 1, wherein, m = n.

3. The display panel of claim 1, wherein, m = 4 and n = 4, the display panel comprises a virtual quadrilateral, the virtual quadrilateral corresponds to one of the first groups, and any side of the virtual quadrilateral corresponds to four of the partition portions.

4. The display panel of claim 3, wherein in the virtual quadrilateral, the orientations of the notches of the partition portions on at least two sides other than vertices are the same.

5. The display panel of claim 4, wherein in the virtual quadrilateral, the orientation of the notch of the partition portion on at least one of the two sides intersecting at the same vertex is the same as the orientation of the notch of the partition portion at the vertex.

6. The display panel of claim 4, wherein in the virtual quadrilateral, the orientations of the notches of the partition portions on at least two opposite sides are the same.

7. The display panel of claim 4, wherein in the virtual quadrilateral, the orientations of the notches of the partition portions on at least two opposite sides are different.

8. The display panel of claim 7, wherein in the virtual quadrilateral, the orientations of the notches of the partition portions on at least two opposite sides are opposite.

9. The display panel of claim 8, wherein the virtual quadrilateral comprises a first side and a third side extending along the first direction, and a second side and a fourth side extending along the second direction, the first side, the second side, the third side and the fourth side are arranged clockwise. The orientation of the gap of the partition in the first edge is parallel to a third direction, the orientation of the gap of the partition in the third edge is parallel to the first direction, and the third direction is opposite to the first direction. The orientation of the gap of the partition in the second edge is parallel to the second direction, the orientation of the gap of the partition in the third edge is parallel to a fourth direction, and the fourth direction is opposite to the second direction.

10. The display panel of claim 4, wherein, In the virtual quadrilateral, the orientations of the gaps of the partitions in opposite two edges are different, and the orientations of the gaps of the partitions in opposite other two edges are same.

11. The display panel of claim 4, wherein, In the virtual quadrilateral, the orientations of the gaps of the partitions in at least two adjacent edges are arranged in a clockwise direction or in a counterclockwise direction.

12. The display panel of claim 4, wherein, In the virtual quadrilateral, the orientations of the gaps of the partitions in at least two adjacent edges intersect; and The orientations of the gaps of the partitions in the two adjacent edges are both directed to the intersection of the two edges, or the orientations of the gaps of the partitions in the two adjacent edges are both away from the intersection of the two edges.

13. The display panel of claim 3, wherein, The virtual quadrilateral comprises a first edge and a third edge extending in the first direction, a second edge and a fourth edge extending in the second direction; the first edge, the second edge, the third edge and the fourth edge are arranged in a clockwise direction; The display panel further comprises at least one first unit, the first unit comprises four first groups, and the four first groups are arranged in an array in the first direction and the second direction; In the two adjacent first groups in the first direction, the fourth edge of one of the first groups is reused as the second edge of the other first group; and in the two adjacent first groups in the second direction, the third edge of one of the first groups is reused as the first edge of the other first group.

14. The display panel of claim 13, wherein, In the two adjacent first groups in the first direction and / or the second direction, the orientations of the gaps of the partitions in one of the first groups are arranged in a clockwise direction, and the orientations of the gaps of the partitions in the other first group are arranged in a counterclockwise direction.

15. The display panel of claim 13, wherein, The orientations of the gaps of the partitions in the first edge and the third edge of the four first groups are both parallel to the first direction; and the orientations of the gaps of the partitions in the second edge and the fourth edge of the four first groups are both parallel to the second direction.

16. The display panel of claim 13, wherein, ​ In the first unit, in two of the first groups adjacent along the first direction, the orientations of the notches of the partition portions in the first edge are parallel to one of the first direction and a third direction opposite to the first direction, the orientations of the notches of the partition portions in the third edge are parallel to the other of the first direction and the third direction; In the first unit, the orientations of the notches of the partition portions in the second edge and the fourth edge are parallel to the second direction or a fourth direction opposite to the second direction.

17. The display panel of claim 13, wherein, the four first groups in the first unit include a first sub-group, the orientations of the notches of the partition portions in the first sub-group are arranged in a clockwise manner; in the first groups adjacent to the first sub-group along the first direction, the notches of the partition portions in the first edge and the second edge are away from the intersection of the first edge and the second edge, the notches of the partition portions in the third edge and the fourth edge are away from the intersection of the third edge and the fourth edge; in the first groups adjacent to the first sub-group along the second direction, the notches of the partition portions in the first edge and the second edge are towards the intersection of the first edge and the second edge, the notches of the partition portions in the third edge and the fourth edge are towards the intersection of the third edge and the fourth edge; in another of the four first groups other than the above three, the orientations of the notches of the partition portions are arranged in an anticlockwise manner.

18. The display panel of claim 3, wherein, further comprising a plurality of support portions; the support portions are located in the corresponding virtual quadrilaterals of the first groups in a planar projection of the substrate; the partition portions include a first partition portion, a second partition portion and a third partition portion, the first partition portion partially surrounds the first sub-pixel adjacent to the support portion, the second partition portion partially surrounds the second sub-pixel adjacent to the support portion, and the third partition portion partially surrounds the third sub-pixel adjacent to the support portion; the notches of the first partition portion and the third partition portion are towards the support portion, and the notch of the second partition portion is away from the support portion.

19. The display panel of claim 1, wherein, the sub-pixel includes: a first electrode located on one side of the substrate; a first light-emitting layer located on a side of the first electrode away from the substrate; a charge generation layer located on a side of the first light-emitting layer away from the first electrode; a second light-emitting layer located on a side of the charge generation layer away from the first light-emitting layer; a second electrode located on a side of the second light-emitting layer away from the charge generation layer.

20. The display panel of claim 1, wherein, the partition portion includes a protruding portion protruding towards a side away from the substrate, an area of the protruding portion on a side away from the substrate is greater than an area on a side close to the substrate. ​ and / or, The partition portion includes a recessed portion recessed toward one side of the substrate.

21. A display device comprising: A display panel including any one of claims 1-20.

Images