Display device

Abstract

[Problem] To provide a display device capable of achieving both high definition and long life of luminance. [Solution] A display device according to an embodiment of the present disclosure comprises: a light-emitting element the luminance of which changes according to a current; and a first transistor for supplying a current to the light-emitting element. The first transistor includes a semiconductor layer, a first terminal formed on the surface of the semiconductor layer, a second terminal formed on the surface of the semiconductor layer and electrically connected to the light-emitting element, and a gate electrode provided between the first terminal and the second terminal via a gate insulating film. A first channel width on the first terminal side is different from a second channel width on the second terminal side.

Description

display device

[0001] The present disclosure relates to a display device.

[0002] 2. Description of the Related Art A known flat panel display device uses, as its pixels, light-emitting elements whose emission luminance varies depending on the value of a current. Current-driven light-emitting elements include, for example, light-emitting diodes (LEDs).

[0003] In flat panel display devices, a transistor that supplies current to a light-emitting element is provided in each pixel. As pixel resolution increases, the area required for securing a storage capacitance decreases, resulting in a decrease in capacitance. A decrease in storage capacitance increases the change in storage voltage via parasitic capacitance when the electrical characteristics of the light-emitting element change, resulting in a large change in light-emitting current. This can adversely affect the luminance lifespan. Furthermore, simply reducing the channel width of the transistor to reduce the parasitic capacitance can worsen variations due to the reduced transistor area. This can adversely affect image quality (uniformity).

[0004] Japanese Patent Application Laid-Open No. 2009-272577

[0005] The present disclosure provides a display device that can achieve both high definition and a long life of luminance.

[0006] A display device according to an embodiment of the present disclosure includes a light-emitting element whose luminance changes in response to a current, and a first transistor for supplying a current to the light-emitting element. The first transistor has a semiconductor layer, a first terminal formed on a surface of the semiconductor layer, a second terminal formed on the surface of the semiconductor layer and electrically connected to the light-emitting element, and a gate electrode provided between the first and second terminals via a gate insulating film. A first channel width on the first terminal side is different from a second channel width on the second terminal side.

[0007] The display device may further include a second transistor that outputs a pixel signal corresponding to the current to the gate electrode, a capacitor that holds the pixel signal as a voltage, and a third transistor that initializes the voltage of the light-emitting element.

[0008] The display device may further include a fourth transistor provided between the first terminal and a power supply line.

[0009] The display device may further include a fourth transistor provided between the second terminal and the light-emitting element.

[0010] A first notch may be provided on an edge of the semiconductor layer in the channel width direction.

[0011] A second cutout portion may be provided in the gate electrode along the first cutout portion.

[0012] The first cutout portion may be provided so as to be perpendicular to the channel width direction.

[0013] The first cutout portion may be provided on both sides of the end side.

[0014] The first cutout portion may be provided on one side of the end side.

[0015] The semiconductor layer between the first terminal and the second terminal may have a trapezoidal planar shape.

[0016] The first cutout portion may have a rounded shape.

[0017] The light emitting element and the first transistor may be provided in each of a plurality of sub-pixels, and the second channel width may differ for each of the plurality of sub-pixels.

[0018] The light-emitting element may be a light-emitting diode.

[0019] The first transistor may be a P-type MOSFET or an N-type MOSFET.

[0020] 1 is a block diagram showing an example of the configuration of a display device according to a first embodiment. FIG. 2 is a circuit diagram showing a first configuration example of a pixel. FIG. 3 is a plan view showing the structure of a transistor according to a first embodiment. FIG. 4 is a cross-sectional view taken along the cutting line X1-X1 shown in FIG. 3. FIG. 5 is a cross-sectional view taken along the cutting line X2-X2 shown in FIG. 3. FIG. 6 is a cross-sectional view taken along the cutting line X3-X3 shown in FIG. 3. FIG. 7 is a graph showing electrical characteristics before and after degradation of a light-emitting element. FIG. 8 is a flowchart showing an example of the operation of a transistor. FIG. 9 is a plan view showing the structure of a transistor according to a second embodiment. FIG. 10 is a plan view showing the structure of a transistor according to a third embodiment. FIG. 11 is a plan view showing the structure of a transistor according to a modification of the third embodiment. FIG. 12 is a plan view showing the structure of a transistor according to a fourth embodiment. FIG. 13 is a plan view showing the structure of a transistor according to a modification of the fourth embodiment. FIG. 14 is a plan view showing the structure of a transistor according to another modification of the fourth embodiment. FIG. 15 is a plan view showing the structure of a transistor according to a fifth embodiment. FIG. 16 is a plan view showing the structure of a transistor according to a modification of the fifth embodiment. FIG. 17 is a plan view showing the structure of a transistor according to a sixth embodiment. FIG. 18 is a plan view showing the structure of a transistor according to a seventh embodiment. FIG. 19 is a circuit diagram showing a second configuration example of a pixel. FIG. 20 is a circuit diagram showing a third configuration example of a pixel. FIG. 21 is a circuit diagram showing a fourth configuration example of a pixel. FIG. 22 is a circuit diagram showing a fifth configuration example of a pixel. FIG. 23 is a circuit diagram showing a sixth configuration example of a pixel. 1 shows an example of the appearance of a head-mounted display; FIG. 2 shows an example of the appearance of another head-mounted display; FIG. 3 is a front view showing an example of the appearance of a digital still camera; FIG. 4 is a rear view showing an example of the appearance of a digital still camera; FIG. 5 shows an example of the appearance of a television device; FIG. 6 shows an example of the appearance of a smartphone; FIG. 7 is a diagram showing an example of the interior of a vehicle to which the technology of the present disclosure is applied, as seen from the rear; FIG. 8 is a diagram showing an example of the interior of a vehicle to which the technology of the present disclosure is applied, as seen from the left rear.

[0021] Hereinafter, an embodiment of a display device according to the present disclosure will be described with reference to the drawings. The following description will focus on the main components of the display device. However, the display device described below may have components and functions that are not shown or described. The following description does not exclude components and functions that are not shown or described.

[0022] First Embodiment Fig. 1 is a block diagram showing an example of the configuration of a display device according to a first embodiment. The display device 10 shown in Fig. 1 is an active matrix display device. An active matrix display device is a display device that controls the current flowing through a light-emitting element by an active element, such as an insulated gate field effect transistor, provided in the same pixel as the light-emitting element. Typical examples of the insulated gate field effect transistor include a MOSFET or a TFT (Thin Film Transistor).

[0023] As shown in FIG. 1 , the display device 10 according to the first embodiment includes a pixel array unit 30, a write scanning unit 40, a drive scanning unit 50, a signal output unit 60, and a display panel 70. The pixel array unit 30 has a plurality of pixels 20 arranged two-dimensionally in a matrix. The circuit configuration of the pixels 20 will be described later. The write scanning unit 40, the drive scanning unit 50, and the signal output unit 60 are mounted on the same display panel 70 as the pixel array unit 30, and drive each pixel 20. Note that some or all of the write scanning unit 40, the drive scanning unit 50, and the signal output unit 60 may be provided outside the display panel 70.

[0024] In the pixel array section 30, scanning lines 31 (31) are arranged along the row direction (the direction in which pixels in a pixel row are arranged / horizontal direction) for the arrangement of the pixels 20 in m rows and n columns. １ ~31 ｍ ) and control line 32 (32 １ ~32 ｍ ) are wired for each pixel row. Furthermore, for the arrangement of the pixels 20 in m rows and n columns, signal lines 33 (33) are wired along the column direction (the direction in which the pixels in the pixel column are arranged / vertical direction). １ ~33 ｎ ) is wired for each pixel column.

[0025] Scan line 31 １ ~31 ｍ are connected to the output terminals of the corresponding rows of the write scanning unit 40. １ ~32 ｍ are connected to the output terminals of the corresponding rows of the drive scanning unit 50. １ ~33ｎ are connected to the output terminals of the corresponding columns of the signal output section 60, respectively.

[0026] The write scanning unit 40 is configured by a shift register circuit and the like. When writing a signal voltage of a video signal to each pixel 20 of the pixel array unit 30, the write scanning unit 40 writes a signal voltage of the video signal to each pixel 20 of the pixel array unit 30 by scanning the scan lines 31 (31 １ ~31 ｍ ) to the write scanning signal WS (WS １ ~WS ｍ ) are sequentially supplied to scan the pixels 20 of the pixel array unit 30 in order by row, that is, perform so-called line-sequential scanning.

[0027] The drive scanning section 50 is configured with a shift register circuit and the like, similar to the write scanning section 40. The drive scanning section 50 synchronizes with the line sequential scanning by the write scanning section 40, and drives the control lines 32 (32 １ ~32 ｍ ) to the light emission control signal DS (DS １ ~DS ｍ ) is supplied to control whether the pixel 20 emits light or not (light quenching).

[0028] The signal output unit 60 outputs a pixel signal according to luminance information supplied from a signal supply source (not shown).

[0029] The pixel signal alternatively output from the signal output unit 60 is transmitted to the signal line 33 (33 １ ~33 ｎ ) to each pixel 20 in units of pixel rows selected by scanning by the write scanning unit 40. That is, the signal output unit 60 employs a line-sequential writing drive form in which the signal voltage is written in units of rows (lines).

[0030] Fig. 2 is a circuit diagram showing a first configuration example of the pixel 20. The pixel 20 shown in Fig. 2 has capacitors C11 and C12, transistors Q11 to Q14, and a light-emitting element L. The transistors Q11 to Q14 are P-type MOSFETs. In this embodiment, the transistors Q11 to Q14 correspond to the first to fourth transistors, respectively.

[0031] The gate of transistor Q11 is connected to the drain of transistor Q12 and the other end of capacitor C12, the source is connected to the drain of transistor Q14, the other end of capacitor C11, and one end of capacitor C12, and the drain is connected to the anode of light-emitting element L and the source of transistor Q13.

[0032] The gate of the transistor Q12 is connected to the scanning line 31. The source is connected to the signal line 33. The drain is connected to the gate of the transistor Q11 and the capacitor C12.

[0033] The gate of the transistor Q13 is connected to the drive scanning unit 50 via a control line 35 (not shown in FIG. 1), the source is connected to the drain of the transistor Q11 and the anode of the light emitting element L, and the drain is connected to the power supply line VSS.

[0034] The gate of the transistor Q14 is connected to the control line 32, the source is connected to the power supply line VCCP, and the drain is connected to the source of the transistor Q11, the other end of the capacitor C11, and one end of the capacitor C12.

[0035] One end of the capacitor C11 is connected to the power supply line VCCP, and the other end is connected to the capacitor C12, the drain of the transistor Q14, and the source of the transistor Q11. One end of the capacitor C12 is connected to the other end of the capacitor C11, the drain of the transistor Q14, and the source of the transistor Q11, and the other end is connected to the drain of the transistor Q12 and the gate of the transistor Q11.

[0036] In pixel 20, when transistor Q12 is turned on, the voltage across capacitor C12 is set based on a pixel signal supplied from signal line 33. Transistor Q14 is turned on or off based on a signal on control line 32. During the on period of transistor Q14n, transistor Q11 supplies a current to light-emitting element L that corresponds to the voltage across capacitor C12.

[0037] The light-emitting element L emits light based on the current supplied from the transistor Q11. In this way, the pixel 20 emits light at a luminance corresponding to the pixel signal. The transistor Q13 turns on or off based on a control signal input through the control line 35. During the on-period of the transistor Q13, the voltage of the anode of the light-emitting element L is initialized by being set to the voltage of the power supply line VSS.

[0038] The light-emitting element L includes a light-emitting element used in a μLED display and an OLED (organic light-emitting diode) used in an organic EL (electroluminescence) display. The light-emitting element L may be not only an OLED, but also a light-emitting diode including at least an OLED and an inorganic LED. In the light-emitting element L, the transistors Q11 to Q14 may be transistors using low-temperature polysilicon (LTPS). At least one of the transistors Q12 and Q13 may be a transistor using an oxide semiconductor.

[0039] Fig. 3 is a plan view showing the structure of the transistor Q11 according to the first embodiment. Fig. 4A is a cross-sectional view taken along the line X1-X1 shown in Fig. 3. Fig. 4B is a cross-sectional view taken along the line X2-X2 shown in Fig. 3. Fig. 4C is a cross-sectional view taken along the line X3-X3 shown in Fig. 3.

[0040] The transistor Q11 includes a semiconductor layer 110, a first terminal 111, a second terminal 112, a gate electrode 113, a gate insulating film 114, and an element isolation film 115. The semiconductor layer 110 is composed of an n-type semiconductor. The first terminal 111 is a source formed on the surface of the semiconductor layer 110. The second terminal 112 is a drain formed on the surface of the semiconductor layer 110. The gate electrode 113 is disposed on the semiconductor layer 110 between the first terminal 111 and the second terminal 112. The gate insulating film 114 is provided between the first terminal 111 and the gate electrode 113 and between the second terminal 112 and the gate electrode 113. The element isolation film 115 is a shallow trench isolation (STI) provided in the semiconductor layer 110 around the first terminal 111 and the second terminal 112.

[0041] In the transistor Q11 configured as described above, when a voltage equal to or greater than the threshold voltage is applied to the gate electrode 113, a channel region 116 is formed in a portion of the semiconductor layer 110 that is covered with the gate electrode 113 and the gate insulating film 114. Conduction is established between the first terminal 111 and the second terminal 112 via the formed channel region 116. In this embodiment, the first channel width W1 on the first terminal side is narrower than the second channel width W2 on the second terminal 112 side.

[0042] FIG. 5 is a graph showing the electrical characteristics of the light-emitting element L before and after degradation. In FIG. 5, the horizontal axis represents the voltage V across the light-emitting element L, while the vertical axis represents the current flowing through the light-emitting element L. The I-V characteristics shown in FIG. 5 change from characteristic L1 to characteristic L2 due to deterioration of the light-emitting element L over time. Specifically, even if the same current is passed through the light-emitting element L before and after degradation, the voltage across the light-emitting element L after degradation is higher than the voltage across the light-emitting element L before degradation. Here, the operation of the transistor Q11 in response to changes in the electrical characteristics of the light-emitting element L will be described.

[0043] Fig. 6 is a flowchart showing an example of the operation of transistor Q11. In Fig. 6, WS indicates the voltage waveform of the write scan signal input to the gate of transistor Q12. AZ indicates the voltage waveform of the reset signal input to the gate of transistor Q13. S indicates the voltage waveform of the source (first terminal 111) of transistor Q11. G indicates the voltage waveform of the gate electrode 113 of transistor Q11. D indicates the voltage waveform of the drain (second terminal 112) of transistor Q11.

[0044] During the refresh period T1, the low-level write scanning signal WS turns on the transistor Q12. The low-level reset signal AZ turns on the transistor Q13. Furthermore, since the voltage of the gate electrode 113 becomes low, the transistor Q11 also becomes on. As a result, the voltage of the drain D connected to the light-emitting element L also becomes low.

[0045] During the light-emission period T2 following the refresh period T1, the write scanning signal WS changes from low to high, turning the transistor Q12 off. The reset signal AZ also changes from low to high, turning the transistor Q13 off. Furthermore, the voltage of the gate electrode 113 remains low, so the transistor Q11 remains on.

[0046] However, when the electrical characteristic of the light-emitting element L changes from characteristic L1 to characteristic L2 during the light-emitting period T2, the light-emitting control voltage between the gate electrode 113 and the source drops from voltage Vgs1 to voltage Vgs2 due to the parasitic capacitance between the gate electrode 113 and the drain and the parasitic capacitance between the gate electrode 113 and the source. Therefore, even if a control signal of the same voltage is input to the gate electrode 113 before and after degradation, the current supplied to the light-emitting element L decreases. As a result, the luminance life is shortened.

[0047] In contrast, in this embodiment, instead of a structure in which the channel width is made smaller overall, a narrowing structure is used in which the second channel width W2 on the drain side is narrower than the first channel width W1 on the source side, thereby achieving high definition. Furthermore, this narrowing structure reduces the parasitic capacitance between the gate electrode 113 and the drain, so that the difference between the voltages Vgs1 and Vgs2 is smaller than in the past, as shown in Figure 6. Therefore, the change in the supply current of the light-emitting element L before and after degradation is also smaller.

[0048] According to the present embodiment described above, luminance degradation is suppressed even if fluctuations over time occur in the electrical characteristics of the light-emitting element L. Therefore, it is possible to achieve both high definition and a long luminance life.

[0049] Furthermore, in this embodiment, even if the electrical characteristics of the light-emitting element L fluctuate due to temperature changes, the difference between the voltages Vgs1 and Vgs2 is small, so the change in the current supplied to the light-emitting element L is also small, thereby making it possible to suppress changes in the luminance of the light-emitting element L due to temperature changes.

[0050] Furthermore, in this embodiment, the difference between the voltages Vgs1 and Vgs2 is small, which can suppress changes in luminance due to IR-Drop of the cathode electrode of the light-emitting element L. This makes it possible to suppress in-plane shading within the pixel array unit 30, suppress additive color mixing, and suppress gamma changes dependent on the display ratio.

[0051] Furthermore, in this embodiment, when the electrical characteristics of the light emitting element L change due to a change in the structure and material, a change in current relative to the gray scale can be suppressed.

[0052] Second Embodiment A second embodiment of the present disclosure will now be described. In this embodiment, the structure of the transistor Q11 of the pixel 20 differs from that of the first embodiment.

[0053] 7 is a plan view showing the structure of a transistor Q11 according to the second embodiment. In FIG. 7, the same components as those in the first embodiment are denoted by the same reference numerals, and redundant description will be omitted.

[0054] 7 , in the transistor Q11 according to this embodiment, the gate electrode 113 has a gate width W3 at the end on the first terminal 111 (source) side and a gate width W4 at the end on the second terminal 112 (drain) side. The gate width W4 is narrower than the gate width W3. That is, in this embodiment, the width shape of the gate electrode 113 is determined so that the second channel width W2 is narrower than the first channel width W1.

[0055] In the transistor Q11 according to this embodiment configured as described above, the channel region 116 has a first channel width W1 on the first terminal 111 side and a second channel width W2 on the second terminal 112 side, which is narrower than the first channel width W1, as in the first embodiment. This reduces the parasitic capacitance between the gate electrode 113 and the drain, thereby reducing the light-emission control voltage difference. As a result, the change in the supply current of the light-emitting element L before and after degradation is also reduced. This makes it possible to achieve both high definition and a long lifespan of luminance.

[0056] In addition, in this embodiment, the second channel width W2 is narrower than the first channel width W1, which reduces the plane area of ​​the gate electrode 113 compared to the first embodiment. This allows the transistor Q11 to be further miniaturized.

[0057] Third Embodiment Hereinafter, a third embodiment of the present disclosure will be described. In this embodiment, the structure of the transistor Q11 of the pixel 20 is different from that of the first embodiment.

[0058] 8 is a plan view showing the structure of a transistor Q11 according to the third embodiment. In FIG. 8, the same components as those in the first embodiment are denoted by the same reference numerals, and redundant description will be omitted.

[0059] In the transistor Q11 according to this embodiment, as shown in FIG. 8 , the semiconductor layer 110 has a notch 120 (first notch) in plan view. The notch 120 is provided on both sides of the end edge of the semiconductor layer 110 in the channel width direction. The notch 120 is inclined from the first terminal 111 toward the second terminal 112 (see the arrow in FIG. 8 ) so that the semiconductor layer 110 has a tapered shape. That is, in this embodiment, the planar shape of the semiconductor layer 110 is determined so that the second channel width W2 is narrower than the first channel width W1.

[0060] In the transistor Q11 according to this embodiment configured as described above, the channel region 116 has a first channel width W1 on the first terminal 111 side and a second channel width W2 on the second terminal 112 side, which is narrower than the first channel width W1, as in the first embodiment. This reduces the parasitic capacitance between the gate electrode 113 and the drain, thereby reducing the light-emission control voltage difference. As a result, the change in the supply current of the light-emitting element L before and after degradation is also reduced. This makes it possible to achieve both high definition and a long lifespan of luminance.

[0061] Furthermore, in this embodiment, the plane area of ​​the semiconductor layer 110 is reduced compared to the first embodiment by forming the notch 120. This allows the transistor Q11 to be further miniaturized.

[0062] 9 is a plan view showing the structure of a transistor Q11 according to a modification of the third embodiment. In FIG. 9, the same components as those in the third embodiment are denoted by the same reference numerals, and redundant description will be omitted.

[0063] In the transistor Q11 according to this modification, as shown in FIG. 9 , the gate electrode 113 has a notch 130 (second notch) in plan view. The notch 130 is provided on both sides of the end sides of the gate electrode 113 in the channel width direction. The notch 130 is inclined from the first terminal 111 toward the second terminal 112 (see the arrow in FIG. 8 ) so that the gate electrode 113 has a tapered shape. That is, in this modification, the notch 130 is also formed in the gate electrode 113 along the notch 120 of the semiconductor layer 110.

[0064] In the transistor Q11 according to this modification configured as described above, the channel region 116 has a first channel width W1 on the first terminal 111 side and a second channel width W2 narrower than the first channel width W1 on the second terminal 112 side, as in the first embodiment. This makes it possible to achieve both high definition and a long lifespan of luminance.

[0065] Furthermore, in this modification, the planar area of ​​the gate electrode 113 is reduced compared to the third embodiment by forming the notch 130. This allows the transistor Q11 to be further miniaturized.

[0066] Fourth Embodiment A fourth embodiment of the present disclosure will now be described. In this embodiment, the structure of the transistor Q11 of the pixel 20 differs from that of the third embodiment.

[0067] 10 is a plan view showing the structure of a transistor Q11 according to the fourth embodiment. In FIG. 10, the same components as those in the third embodiment are denoted by the same reference numerals, and redundant description will be omitted.

[0068] 10 , in the transistor Q11 according to this embodiment, the semiconductor layer 110 has a notch 121 in plan view. The notch 121 is provided on one side of an edge of the semiconductor layer 110 in the channel width direction. The notch 121 is formed so as to be perpendicular to the edge portion extending along the channel width direction. In other words, the notch angle of the notch 121 is 90 degrees.

[0069] In the transistor Q11 according to this embodiment configured as described above, the channel region 116 has a first channel width W1 on the first terminal 111 side and a second channel width W2 on the second terminal 112 side, which is narrower than the first channel width W1, as in the third embodiment. This reduces the parasitic capacitance between the gate electrode 113 and the drain, thereby reducing the light-emission control voltage difference. As a result, the change in the supply current of the light-emitting element L before and after degradation is also reduced. This makes it possible to achieve both high definition and a long lifespan of luminance.

[0070] 11 is a plan view showing the structure of a transistor Q11 according to a modification of the fourth embodiment. In FIG. 11, the same components as those in the fourth embodiment are denoted by the same reference numerals, and redundant description will be omitted.

[0071] 11 , in the transistor Q11 according to this modification, the semiconductor layer 110 has a notch 120 in plan view. As in the third embodiment, this notch 120 is inclined so that the gate electrode 113 has a tapered shape (tapered shape) from the first terminal 111 toward the second terminal 112. However, in this modification, this notch 120 is provided on only one side of the end edge of the semiconductor layer 110 in the channel width direction.

[0072] In the transistor Q11 according to this modification configured as described above, the channel region 116 has a first channel width W1 on the first terminal 111 side and a second channel width W2 narrower than the first channel width W1 on the second terminal 112 side, as in the fourth embodiment. This makes it possible to achieve both high definition and a long lifespan of luminance.

[0073] 12 is a plan view showing the structure of a transistor Q11 according to another modification of the fourth embodiment. In FIG. 12, the same components as those in the fourth embodiment are denoted by the same reference numerals, and redundant description will be omitted.

[0074] 12 , in the transistor Q11 according to this modification, the gate electrode 113 has a notch 130 in plan view as shown in FIG. 9 . The notch 130 is provided on only one side of the edge of the gate electrode 113 in the channel width direction. The notch 130 is inclined to follow the shape of the notch 120 in the semiconductor layer 110.

[0075] In the transistor Q11 according to this modification configured as described above, the channel region 116 has a first channel width W1 on the first terminal 111 side and a second channel width W2 narrower than the first channel width W1 on the second terminal 112 side, as in the fourth embodiment. This makes it possible to achieve both high definition and a long lifespan of luminance.

[0076] Furthermore, in this modification, the planar area of ​​the gate electrode 113 is reduced compared to the fourth embodiment by forming the notch 130. This allows the transistor Q11 to be further miniaturized.

[0077] Fifth Embodiment Hereinafter, a fifth embodiment of the present disclosure will be described. In this embodiment, the structure of the transistor Q11 of the pixel 20 differs from that of the first embodiment.

[0078] 13 is a plan view showing the structure of a transistor Q11 according to the fifth embodiment. In FIG. 13, the same components as those in the first embodiment are denoted by the same reference numerals, and redundant description will be omitted.

[0079] 13, the semiconductor layer 110 of the transistor Q11 according to this embodiment has an isosceles trapezoidal planar shape. In this isosceles trapezoid, the side on the first terminal 111 side corresponds to the lower base, and the side on the second terminal 112 side corresponds to the upper base that is shorter than the lower base.

[0080] In the transistor Q11 according to this embodiment configured as described above, as in the first embodiment, the channel region 116 has a first channel width W1 on the first terminal 111 side and a second channel width W2 on the second terminal 112 side, which is narrower than the first channel width W1. This reduces the parasitic capacitance between the gate electrode 113 and the drain, thereby reducing the light-emission control voltage difference. As a result, the change in the supply current of the light-emitting element L before and after degradation is also reduced. This makes it possible to achieve both high definition and a long lifespan of luminance.

[0081] 14 is a plan view showing the structure of a transistor Q11 according to a modification of the fifth embodiment. In Fig. 14, the same components as those in the fifth embodiment described above are denoted by the same reference numerals, and redundant description will be omitted.

[0082] 14, in the transistor Q11 according to this modification, the planar shape of the semiconductor layer 110 is a trapezoid different from the isosceles trapezoid shown in Fig. 13. This trapezoid has a pair of opposing legs between a lower base on the first terminal 111 side and an upper base on the second terminal 112 side, one of which extends in a direction perpendicular to the channel width direction and the other of which extends in a direction intersecting the channel width direction.

[0083] In the transistor Q11 according to this modification configured as described above, the channel region 116 has a first channel width W1 on the first terminal 111 side and a second channel width W2 narrower than the first channel width W1 on the second terminal 112 side, as in the fifth embodiment. This makes it possible to achieve both high definition and a long lifespan of luminance.

[0084] Sixth Embodiment Hereinafter, a sixth embodiment of the present disclosure will be described. In this embodiment, the structure of the transistor Q11 of the pixel 20 is different from that of the first embodiment.

[0085] 15 is a plan view showing the structure of a transistor Q11 according to the sixth embodiment. In FIG. 15, the same components as those in the first embodiment are denoted by the same reference numerals, and redundant description will be omitted.

[0086] 15 , in the transistor Q11 according to this embodiment, the semiconductor layer 110 has a notch 122 in plan view. The notch 122 is provided on both sides of the end sides in the channel width direction of the semiconductor layer 110. The notch 122 has a rounded shape.

[0087] In the transistor Q11 according to this embodiment configured as described above, as in the first embodiment, the channel region 116 has a first channel width W1 on the first terminal 111 side and a second channel width W2 on the second terminal 112 side, which is narrower than the first channel width W1. This reduces the parasitic capacitance between the gate electrode 113 and the drain, thereby reducing the light-emission control voltage difference. As a result, the change in the supply current of the light-emitting element L before and after degradation is also reduced. This makes it possible to achieve both high definition and a long lifespan of luminance.

[0088] Furthermore, in this embodiment, the plane area of ​​the semiconductor layer 110 is reduced compared to the first embodiment by forming the notch 122. This allows the transistor Q11 to be further miniaturized.

[0089] Seventh Embodiment A seventh embodiment of the present disclosure will now be described. A display device according to this embodiment is capable of color display. Therefore, a unit pixel that forms a color image is composed of a plurality of sub-pixels. In this case, each of the sub-pixels corresponds to pixel 20 shown in FIG. 1 . In this embodiment, the unit pixel is composed of three sub-pixels: a sub-pixel that emits red light, a sub-pixel that emits green light, and a sub-pixel that emits blue light.

[0090] However, the unit pixel is not limited to a combination of sub-pixels of the three primary colors of RGB, and a single pixel can also be formed by adding sub-pixels of one or more colors to the three primary color sub-pixels. For example, a single pixel can be formed by adding a sub-pixel that emits white light to improve brightness, or by adding at least one sub-pixel that emits complementary color light to expand the color reproduction range.

[0091] The sub-pixels according to this embodiment have the same circuit configuration as the pixel 20 shown in FIG. 1. Therefore, each sub-pixel is provided with a transistor Q11 that supplies current to the light-emitting element L. However, in this embodiment, the structure of the transistor Q11 differs for each sub-pixel. Here, the structure of the transistor Q11 according to the seventh embodiment will be described with reference to FIG. 16 .

[0092] 16 is a plan view showing the structure of a transistor Q11 according to the seventh embodiment. In FIG. 16, the same components as those in the first embodiment are denoted by the same reference numerals, and redundant description will be omitted.

[0093] In this embodiment, each of the subpixels 201, 202, and 203 includes a transistor Q11. The first channel width W1 of each transistor Q11 is the same among the subpixels 201, 202, and 203. On the other hand, the second channel width W21 of the subpixel 201, the second channel width W22 of the subpixel 202, and the second channel width W23 of the subpixel 203 are different from one another. Specifically, the second channel width W21 is shorter than the second channel width W22, and the second channel width W23 is shorter in that order.

[0094] The dimension of the second channel width of each subpixel is set according to the deterioration characteristics of the light-emitting element L of that subpixel. In order to uniformly deteriorate the luminance of the light-emitting element L among subpixels 201, 202, and 203 and to uniform the whiteness before and after deterioration, the second channel width is set to a smaller dimension as the amount of change in voltage shown in FIG. 5 increases, for example.

[0095] In the transistor Q11 according to this embodiment, configured as described above, as in the other embodiments, the channel region 116 has a first channel width W1 on the first terminal 111 side and a second channel width W2 on the second terminal 112 side, which is narrower than the first channel width W1. This reduces the parasitic capacitance between the gate electrode 113 and the drain, thereby reducing the light-emission control voltage difference. As a result, the change in the supply current of the light-emitting element L before and after degradation is also reduced. This makes it possible to achieve both high definition and a long lifespan of luminance.

[0096] It should be noted that the circuit configuration of the pixel 20 or the sub-pixels 201, 202, and 203 in each of the above-described embodiments is not limited to the circuit diagram shown in Fig. 2. An example of the configuration of the pixel circuit will be described below.

[0097] Fig. 17 is a circuit diagram showing a second configuration example of a pixel. The pixel 20B shown in Fig. 3 has a capacitor C31, transistors Q21 to Q25, and a light-emitting element L. The transistors Q21 to Q25 are P-type MOSFETs.

[0098] The gate of the transistor Q22 is connected to the scanning line 31, the source is connected to the signal line 33, and the drain is connected to the gate of the transistor Q21, the drain of the transistor Q25, and the capacitor C31.

[0099] One end of the capacitor C31 is connected to the power supply line VCCP, and the other end is connected to the drain of the transistor Q22, the gate of the transistor Q21, and the drain of the transistor Q25.

[0100] The gate of transistor Q25 is connected to control line 35 １The gate of transistor Q24 is connected to control line 32, the source is connected to the drain of transistor Q21 and the source of transistor Q25, and the drain is connected to the source of transistor Q23 and the anode of light-emitting element L. The gate of transistor Q23 is connected to control line 35. ２ , its source is connected to the drain of the transistor Q24 and the anode of the light-emitting element L, and its drain is connected to the power supply line VSS.

[0101] With this configuration, in pixel 20B, when transistor Q22 is turned on, the voltage across capacitor C31 is set based on the pixel signal supplied from signal line 33. Transistor Q24 is turned on and off based on the signal on control line 32. During the period when transistor Q24 is in the on state, transistor Q21 passes a current corresponding to the voltage across capacitor C31 through light-emitting element L.

[0102] The light emitting element L emits light based on the current supplied from the transistor Q21. In this way, the pixel 20B emits light with a luminance corresponding to the pixel signal. The transistor Q25 is connected to the control line 35 １ While the transistor Q25 is in the ON state, the drain and gate of the transistor Q21 are connected to each other. The transistor Q23 is connected to the control line 35. ２ During the period when the transistor Q23 is in the ON state, the voltage of the anode of the light-emitting element L is initialized by being set to the voltage of the power supply line VSS.

[0103] The transistors Q21 to Q25 may be transistors using low temperature polysilicon (LTPS), and at least one of the transistors Q22, Q23, and Q25 may be a transistor using an oxide semiconductor.

[0104] In pixel 20B shown in FIG. 17 , transistor Q21 has a structure similar to that of transistor Q11 described in each of the above-described embodiments. Therefore, the channel region 116 of transistor Q21 has a first channel width W1 on the first terminal 111 side and a second channel width W2 on the second terminal 112 side, which is narrower than the first channel width W1. This reduces the parasitic capacitance between the gate electrode 113 and the drain, thereby reducing the light-emission control voltage difference. As a result, the change in supply current to light-emitting element L before and after degradation is also reduced. Therefore, even when the circuit configuration of pixel 20B is adopted, it is possible to achieve both high definition and a long luminance life.

[0105] 18 is a circuit diagram showing a third example of the pixel configuration. In the pixel 20C shown in FIG. 18, one end of the capacitor C48 is connected to the signal line 33 １ One end of the capacitor C49 is connected to the signal line 33, and the other end is connected to the power supply line VSS. １ and the other end is connected to signal line 33 ２ The transistor Q32 is a P-type MOSFET, and its gate is connected to the scan line 31. ２ and the source is connected to signal line 33 １ and the drain is connected to the signal line 33 ２ is connected to.

[0106] The pixel 20C has transistors Q31 to Q36, a capacitor C41, and a light-emitting element L. The transistors Q31 to Q36 are P-type MOSFETs. The gate of the transistor Q31 is connected to the drain of the transistor Q35 and the other end of the capacitor C41, the source is connected to the power supply line VCCP, and the drain is connected to the sources of the transistors Q34 and Q36. The gate of the transistor Q35 is connected to the scanning line 31 １ and the source is connected to signal line 33 ２ and its drain is connected to the gate of transistor Q31 and capacitor C41.

[0107] One end of the capacitor 41 is connected to the power supply line VCCP, and the other end is connected to the drain of the transistor Q35 and the gate of the transistor Q31.１ , its source is connected to the drain of transistor Q31 and the source of transistor Q34, and its drain is connected to signal line 33 ２ The gate of transistor Q34 is connected to control line 352, the source is connected to the drain of transistor Q31 and the source of transistor Q36, and the drain is connected to the source of transistor Q33 and the anode of light-emitting element L. The gate of transistor Q33 is connected to control line 352, the source is connected to the drain of transistor Q34 and the anode of light-emitting element L, and the drain is connected to power supply line VSS.

[0108] With this configuration, in the pixel 20C, the transistor Q35 is turned on, and the signal line 33 １ The voltage across the capacitor C41 is set based on the pixel signal supplied from the control line 35 via the capacitor C49. The transistor Q34 is turned on and off based on the signal on the control line 32. During the period when the transistor Q34 is in the on state, the transistor Q31 passes a current according to the voltage across the capacitor C41 through the light-emitting element L. The light-emitting element L emits light based on the current supplied from the transistor Q31. In this way, the pixel 20C emits light at a luminance according to the pixel signal. The transistor Q36 is connected to the control line 35. １ During the period when the transistor Q36 is in the ON state, the drain of the transistor Q31 and the signal line 33 ２ The transistor Q33 is connected to the control line 35 ２ During the period when the transistor Q33 is in the ON state, the voltage of the anode of the light-emitting element L is initialized by being set to the voltage of the power supply line VSS.

[0109] The transistors Q31 to Q36 may be transistors using low temperature polysilicon (LTPS), and at least one of the transistors Q32, Q33, and Q35 may be a transistor using an oxide semiconductor.

[0110] In pixel 20C shown in FIG. 18 , transistor Q31 has a structure similar to that of transistor Q11 described in each of the above-described embodiments. Therefore, the channel region 116 of transistor Q31 has a first channel width W1 on the first terminal 111 side and a second channel width W2 on the second terminal 112 side, which is narrower than the first channel width W1. This reduces the parasitic capacitance between the gate electrode 113 and the drain, thereby reducing the light-emission control voltage difference. As a result, the change in the supply current of light-emitting element L before and after degradation is also reduced. Therefore, even when the circuit configuration of pixel 20C is adopted, it is possible to achieve both high definition and a long luminance life.

[0111] FIG. 19 is a circuit diagram showing a fourth example of a pixel configuration. A pixel 20D shown in FIG. 19 includes transistors Q41 to Q49, a capacitor C51, and a light-emitting element L. The transistors Q41 to Q49 are P-type MOSFETs. The gate of transistor Q41 is connected to the source of transistor Q46, the drain of transistor Q48, and capacitor C51, the source is connected to the drains of transistors Q42 and Q45, and the drain is connected to the sources of transistors Q49 and Q44. The gate of transistor Q42 is connected to scan line 31, the source is connected to signal line 33, and the drain is connected to the drain of transistor Q45 and the source of transistor Q41. The gate of transistor Q45 is connected to control line 32, the source is connected to power supply line VCCP, and the drain is connected to the drain of transistor Q42 and the source of transistor Q41.

[0112] One end of the capacitor C51 is connected to the power supply line VCCP, and the other end is connected to the gate of the transistor Q41, the source of the transistor Q46, and the drain of the transistor Q48. The capacitor C51 may include two capacitors connected in parallel to each other.

[0113] The gate of transistor Q46 is connected to control line 35 １The gate of the transistor Q47 is connected to the control line 35. The source of the transistor Q47 is connected to the gate of the transistor Q41, the drain of the transistor Q48, and the other end of the capacitor C51, and the drain of the transistor Q47 is connected to the source of the transistor Q47. １ , its source is connected to the drain of transistor Q46, and its drain is connected to the power supply line VSS. The gate of transistor Q48 is connected to scan line 31, its drain is connected to the gate of transistor Q41, the source of transistor Q46, and the other end of capacitor C51, and its source is connected to the drain of transistor Q49. The gate of transistor Q49 is connected to scan line 31, its drain is connected to the source of transistor Q48, and its source is connected to the drain of transistor Q41 and the source of transistor Q44. The gate of transistor Q44 is connected to control line 32, its source is connected to the drain of transistor Q41 and the source of transistor Q49, and its drain is connected to the source of transistor Q43 and the anode of light-emitting element L. The gate of transistor Q43 is connected to control line 35. ２ , its source is connected to the drain of the transistor Q44 and the anode of the light-emitting element L, and its drain is connected to the power supply line VSS.

[0114] With this configuration, in pixel 20D, transistors Q41, Q42, Q48, and Q49 are turned on, and the voltage across capacitor C51 is set based on the pixel signal supplied from signal line 33. Transistors Q44 and Q45 are turned on and off based on the signal on control line 32. While transistors Q45 and Q44 are on, transistor Q41 passes a current corresponding to the voltage across capacitor C51 through light-emitting element L. Light-emitting element L emits light based on the current supplied from transistor Q41. In this way, pixel 20D emits light at a luminance corresponding to the pixel signal. Transistors Q46 and Q47 are turned on based on the signal on control line 35. １ While the transistors Q46 and Q47 are in the ON state, the voltage of the gate of the transistor Q41 is initialized by being set to the voltage of the power supply line VSS. ２During the period when the transistor Q43 is in the ON state, the voltage of the anode of the light-emitting element L is initialized by being set to the voltage of the power supply line VSS.

[0115] The transistors Q41 to Q49 may be transistors using low temperature polysilicon (LTPS), or at least one of the transistors Q41 to Q49 may be a transistor using an oxide semiconductor.

[0116] In pixel 20D shown in FIG. 19 , transistor Q41 has a structure similar to that of transistor Q11 described in each of the above-described embodiments. Therefore, the channel region 116 of transistor Q41 has a first channel width W1 on the first terminal 111 side and a second channel width W2 on the second terminal 112 side, which is narrower than the first channel width W1. This reduces the parasitic capacitance between the gate electrode 113 and the drain, thereby reducing the light-emission control voltage difference. As a result, the change in the supply current of light-emitting element L before and after degradation is also reduced. Therefore, even when the circuit configuration of pixel 20D is adopted, it is possible to achieve both high definition and a long luminance life.

[0117] 20 is a circuit diagram showing a fifth example of a pixel configuration. Pixel 20E shown in FIG. 20 includes transistors Q51 to Q56, a capacitor C71, and a light-emitting element L. Transistors Q51 to Q56 are N-type MOSFETs. The gate of transistor Q51 is connected to the source of transistor Q56 and one end of capacitor C71, the drain is connected to the source of transistor Q73 and the drain of transistor Q56, and the source is connected to the source of transistor Q52 and the drain of transistor Q54. The gate of transistor Q52 is connected to scan line 31, the drain is connected to signal line 33, and the source is connected to the source of transistor Q51 and the drain of transistor Q54.

[0118] One end of the capacitor C71 is connected to the gate of the transistor Q51 and the source of the transistor Q56, and the other end is connected to the drain of the transistor Q53, the source of the transistor Q54, and the anode of the light-emitting element L. The gate of the transistor Q55 is connected to the control line DLS1, the drain is connected to the power supply line VCCP, and the source is connected to the drain of the transistor Q51 and the drain of the transistor Q56. The gate of the transistor Q54 is connected to the control line DLS1. ２ , its drain is connected to the source of transistor Q52 and the source of transistor Q51, and its source is connected to the other end of capacitor C71, the drain of transistor Q53, and the anode of light-emitting element L. Transistor Q56 has its gate connected to control line 35, its drain connected to the source of transistor Q55 and the drain of transistor Q51, and its source connected to the gate of transistor Q51 and one end of capacitor C71. Transistor Q53 has its gate connected to control line 35, its drain connected to the other end of capacitor C71, the source of transistor Q54, and the anode of light-emitting element L, and its source connected to power supply line VSS.

[0119] With this configuration, in the pixel 20E, the transistors Q51, Q52, and Q56 are turned on, and the voltage across the capacitor C71 is set based on the pixel signal supplied from the signal line 33. The transistor Q55 is connected to the control line 32. １ The transistor Q54 is turned on and off based on the signal from the control line 32. ２ The transistor Q51 is turned on and off based on the signal of the control line 35. During the period when the transistors Q55 and Q54 are on, the transistor Q51 passes a current corresponding to the voltage across the capacitor C71 to the light-emitting element L. The light-emitting element L emits light based on the current supplied from the transistor Q51. In this way, the pixel 20E emits light at a luminance corresponding to the pixel signal. The transistor Q53 is turned on and off based on the signal of the control line 35. During the period when the transistor Q53 is on, the voltage of the anode of the light-emitting element L is initialized by being set to the voltage of the power supply line VSS.

[0120] The transistors Q51 to Q56 may be transistors using low temperature polysilicon (LTPS), and the transistor Q56 may be a transistor using an oxide semiconductor.

[0121] In pixel 20E shown in FIG. 20 , transistor Q51 has a structure similar to that of transistor Q11 described in each of the above-described embodiments. Therefore, the channel region 116 of transistor Q51 has a first channel width W1 on the first terminal 111 side and a second channel width W2 on the second terminal 112 side, which is narrower than the first channel width W1. This reduces the parasitic capacitance between the gate electrode 113 and the drain, thereby reducing the light-emission control voltage difference. As a result, the change in the supply current of light-emitting element L before and after degradation is also reduced. Therefore, even when the circuit configuration of pixel 20D is adopted, it is possible to achieve both high definition and a long luminance life.

[0122] Fig. 21 is a circuit diagram showing a sixth configuration example of a pixel. A pixel 20F shown in Fig. 20 has transistors Q61 to Q63, a capacitor C81, and a light-emitting element L. The transistors Q61 to Q63 are N-type MOSFETs.

[0123] The gate of the transistor Q61 is connected to the source of the transistor Q62 and one end of the capacitor C81, the drain is connected to the cathode of the light emitting element L and the source of the transistor Q63, and the source is connected to the other end of the capacitor C81. １ The gate of the transistor Q63 is connected to the control line 35, the drain of the transistor Q63 is connected to the signal line 33, and the source of the transistor Q63 is connected to the gate of the transistor Q61 and one end of the capacitor C81. ２ , its drain is connected to a wire Vini having an arbitrary initialization potential, and its source is connected to the cathode of the light-emitting element L and the drain of the transistor Q61.

[0124] With this configuration, in pixel 20F, when transistor Q62 is turned on, the voltage across capacitor C81 is set based on the pixel signal supplied from signal line 33. While transistor Q62 is on, transistor Q61 passes a current corresponding to the voltage across capacitor C81 through light-emitting element L. Light-emitting element L emits light based on the current supplied from transistor Q51. In this way, pixel 20F emits light at a luminance corresponding to the pixel signal. Transistor Q63 is connected to control line 35 ２ During the period when the transistor Q63 is in the ON state, the voltage of the cathode of the light emitting element L is initialized by being set to the voltage of the power supply line VSS.

[0125] The transistors Q61 to Q63 may be transistors using low temperature polysilicon (LTPS).

[0126] In pixel 20F shown in FIG. 21 , transistor Q61 has a structure similar to that of transistor Q11 described in each of the above-described embodiments. Therefore, the channel region 116 of transistor Q61 has a first channel width W1 on the first terminal 111 side and a second channel width W2 on the second terminal 112 side, which is narrower than the first channel width W1. This reduces the parasitic capacitance between the gate electrode 113 and the drain, thereby reducing the light-emission control voltage difference. As a result, the change in supply current to light-emitting element L before and after degradation is also reduced. Therefore, even when the circuit configuration of pixel 20D is adopted, it is possible to achieve both high definition and a long luminance life.

[0127] <Application Examples> Next, application examples of the display devices described in the above embodiment and modified examples will be described.

[0128] 22 shows an example of the appearance of a head-mounted display 1100. The head-mounted display 1100 has, for example, ear hooks 1120 for wearing on the user's head on both sides of a glasses-shaped display unit 1110. The techniques according to the above-described embodiments and the like can be applied to such a head-mounted display 1100.

[0129] (Application Example 2) FIG. 23 shows an example of the appearance of another head-mounted display 1200. The head-mounted display 1200 is a see-through head-mounted display having a main body 1210, an arm 1220, and a lens barrel 1230. This head-mounted display 1200 is attached to eyeglasses 1280. The main body 1210 has a control board and a display unit for controlling the operation of the head-mounted display 1200. The display unit emits image light of a display image. The arm 1220 connects the main body 1210 and the lens barrel 1230 and supports the lens barrel 1230. The lens barrel 1230 projects the image light supplied from the main body 1210 via the arm 1220 toward the user's eyes via lenses 12900 of the eyeglasses 1280. The techniques according to the above-described embodiments and the like can be applied to such a head-mounted display 1200.

[0130] The head-mounted display 1200 is a so-called light guide plate type head-mounted display, but is not limited to this and may be, for example, a so-called birdbath type head-mounted display. The birdbath type head-mounted display includes, for example, a beam splitter and a partially transparent mirror. The beam splitter outputs light encoded with image information toward the mirror, and the mirror reflects the light toward the user's eyes. Both the beam splitter and the partially transparent mirror are partially transparent. This allows light from the surrounding environment to reach the user's eyes.

[0131] (Application Example 3) Figures 24A and 24B show an example of the appearance of a digital still camera 1300, with Figure 24A showing a front view and Figure 24B showing a rear view. This digital still camera 1300 is an interchangeable lens single-lens reflex camera and has a camera main body 1310, a photographing lens unit 1320, a grip unit 1330, a monitor 1340, and an electronic viewfinder 1350. The photographing lens unit 1320 is an interchangeable lens unit and is provided near the center of the front of the camera main body 1310. The grip unit 1330 is provided on the left side of the front of the camera main body 1310, and is held by the photographer. The monitor 1340 is provided to the left of the center of the back of the camera main body 1310. The electronic viewfinder 1350 is provided above the monitor 14 on the rear surface of the camera body 1310. By looking through the electronic viewfinder 1350, the photographer can visually confirm the optical image of the subject guided by the photographing lens unit 1320 and determine the composition of the shot. The techniques according to the above-described embodiments can be applied to the electronic viewfinder 1350.

[0132] 25 shows an example of the appearance of a television device 1400. The television device 1400 has an image display screen unit 1410 including a front panel 1420 and a filter glass 1430. The techniques according to the above-described embodiments and the like can be applied to this image display screen unit 1410.

[0133] 26 shows an example of the appearance of a smartphone 1500. The smartphone 1500 has a display unit 1510 that displays various information and an operation unit 1520 that includes buttons and the like that accept operation inputs from a user. The techniques according to the above-described embodiments and the like can be applied to this display unit 1510.

[0134] (Application Example 6) Figures 27A and 27B show an example configuration of a vehicle to which the technology of the present disclosure is applied, where Figure 27A shows an example of the interior of the vehicle as seen from the rear of the vehicle, and Figure 27B shows an example of the interior of the vehicle as seen from the left rear of the vehicle.

[0135] The vehicle in Figures 27A and 27B has a center display 2010, a console display 2020, a head-up display 2030, a digital rearview mirror 2040, a steering wheel display 2050, and a rear entertainment display 2060.

[0136] The center display 2010 is disposed on the dashboard 2610 in a position facing the driver's seat 2620 and the passenger's seat 2630. FIG. 27A shows an example of a horizontally elongated center display 2010 extending from the driver's seat 2620 side to the passenger's seat 2630 side, but the screen size and location of the center display 2010 are not limited to this. The center display 2010 can display information detected by various sensors. As a specific example, the center display 2010 can display an image captured by an image sensor, a distance image to obstacles in front of or to the side of the vehicle measured by a ToF sensor, and the body temperature of an occupant detected by an infrared sensor. The center display 2010 can be used to display, for example, at least one of safety-related information, operation-related information, a life log, health-related information, authentication / identification-related information, and entertainment-related information.

[0137] The safety-related information includes information based on sensor detection results, such as detection of drowsiness, distraction, child mischief, whether a seatbelt is fastened, and whether a passenger is abandoned. The operation-related information includes gesture information related to passenger operations detected by sensors. The gestures may include operations of various vehicle equipment, such as air conditioning, navigation, audiovisual (AV) equipment, and lighting. The life log includes life logs of all passengers. For example, the life log includes a record of each passenger's behavior. By acquiring and storing the life log, it is possible to determine the condition of the passengers at the time of an accident. The health-related information includes the passenger's body temperature detected using a temperature sensor and information on the passenger's health condition estimated based on the detected body temperature. Alternatively, the passenger's health condition information may be estimated based on the passenger's face captured by an image sensor. Furthermore, the passenger's health condition information may be estimated based on the passenger's responses obtained through an automated voice conversation with the passenger. The authentication / identification-related information includes information on a keyless entry function that uses a sensor to perform facial authentication, a function that automatically adjusts the seat height and position by facial recognition, etc. The entertainment-related information includes information on AV device operations by occupants detected by the sensor, and information on content to be displayed that is appropriate for the occupants detected and recognized by the sensor.

[0138] Console display 2020 can be used to display, for example, life log information. Console display 2020 is disposed near shift lever 2650 on center console 2640 between driver's seat 2620 and passenger seat 2630. Console display 2020 can also display information detected by various sensors. Furthermore, console display 2020 may display an image of the vehicle's surroundings captured by an image sensor, or may display an image showing the distance to an obstacle around the vehicle.

[0139] The head-up display 2030 is virtually displayed behind the windshield 2660 in front of the driver's seat 2620. The head-up display 2030 can be used to display, for example, at least one of safety-related information, operation-related information, a life log, health-related information, authentication / identification-related information, and entertainment-related information. Because the head-up display 2030 is often virtually disposed in front of the driver's seat 2620, it is suitable for displaying information directly related to the operation of the vehicle, such as the vehicle speed, the remaining fuel, and the remaining battery charge.

[0140] The digital rearview mirror 2040 can not only display the rear of the vehicle, but also display the status of passengers in the rear seats, and can therefore be used to display life log information of passengers in the rear seats, for example.

[0141] Steering wheel display 2050 is disposed near the center of steering wheel 2670 of the vehicle. Steering wheel display 2050 can be used to display at least one of, for example, safety-related information, operation-related information, a life log, health-related information, authentication / identification-related information, and entertainment-related information. In particular, because steering wheel display 2050 is located near the driver's hands, it is suitable for displaying life log information such as the driver's body temperature, and for displaying information regarding the operation of AV devices, air conditioning equipment, etc.

[0142] The rear entertainment display 2060 is attached to the back side of the driver's seat 2620 and the passenger seat 2630 and is intended for viewing by rear seat passengers. The rear entertainment display 2060 can be used to display, for example, at least one of safety-related information, operation-related information, a life log, health-related information, authentication / identification-related information, and entertainment-related information. In particular, since the rear entertainment display 2060 is located in front of the rear seat passengers, information related to the rear seat passengers is displayed on the rear entertainment display 2060. The rear entertainment display 2060 may display, for example, information related to the operation of an AV device or an air conditioning system, or may display the results of measuring the body temperature of the rear seat passengers using a temperature sensor.

[0143] The technologies according to the above-described embodiments can be applied to the center display 2010, console display 2020, head-up display 2030, digital rearview mirror 2040, steering wheel display 2050, and rear entertainment display 2060.

[0144] Note that the above-described embodiments are examples for realizing the present technology, and the matters in the embodiments correspond to the matters specifying the invention in the claims. Similarly, the matters specifying the invention in the claims correspond to the matters in the embodiments of the present technology having the same names. However, the present technology is not limited to the embodiments, and can be realized by applying various modifications to the embodiments within the scope of the gist of the present technology.

[0145] The present technology can be configured as follows:

[0146] (1) A display device comprising: a light-emitting element whose luminance changes in response to a current; and a first transistor for supplying the current to the light-emitting element, wherein the first transistor has a semiconductor layer, a first terminal formed on a surface of the semiconductor layer, a second terminal formed on the surface of the semiconductor layer and electrically connected to the light-emitting element, and a gate electrode provided between the first terminal and the second terminal via a gate insulating film, wherein a first channel width on the side of the first terminal is different from a second channel width on the side of the second terminal.

[0147] (2) The display device according to (1), further including: a second transistor that outputs a pixel signal corresponding to the current to the gate electrode; a capacitor that holds the pixel signal as a voltage; and a third transistor that initializes the voltage of the light-emitting element.

[0148] (3) The display device according to (2), further including a fourth transistor provided between the first terminal and a power supply line.

[0149] (4) The display device according to (2), further including a fourth transistor provided between the second terminal and the light-emitting element.

[0150] (5) The display device according to any one of (1) to (4), wherein a first notch portion is provided on an edge of the semiconductor layer in the channel width direction.

[0151] (6) The display device according to (5), wherein a second cutout portion is provided in the gate electrode along the first cutout portion.

[0152] (7) The display device according to (5), wherein the first cutout portion is provided so as to be perpendicular to the channel width direction.

[0153] (8) The display device according to (5) or (6), wherein the first cutout portion is provided on both sides of the end side.

[0154] (9) The display device according to (5), wherein the first cutout portion is provided on one side of the end side.

[0155] (10) The display device according to any one of (1) to (4), wherein the planar shape of the semiconductor layer between the first terminal and the second terminal is trapezoidal.

[0156] (11) The display device according to (5), wherein the first cutout portion has a rounded shape.

[0157] (12) The display device according to any one of (1) to (4), wherein the light-emitting element and the first transistor are provided in each of a plurality of sub-pixels, and the second channel width differs for each of the plurality of sub-pixels.

[0158] (13) The display device according to any one of (1) to (12), wherein the light-emitting element is a light-emitting diode.

[0159] (14) The display device according to any one of (1) to (13), wherein the first transistor is a P-type MOSFET or an N-type MOSFET.

[0160] 1: Display device 110: Semiconductor layer 111: First terminal 112: Second terminal 113: Gate electrode 114: Gate insulating film 116: Channel region 120: First notch portion 130: Second notch portion 201-203: Sub-pixel L: Light-emitting element Q11-Q61: First transistor Q12-Q62: Second transistor Q13-Q63: Third transistor Q14-Q54: Fourth transistor C11-C81: Capacitor W1: First channel width W2: Second channel width

Claims

1. A display device comprising: a light-emitting element whose luminance changes in response to a current; and a first transistor for supplying the current to the light-emitting element, wherein the first transistor has a semiconductor layer, a first terminal formed on a surface of the semiconductor layer, a second terminal formed on the surface of the semiconductor layer and electrically connected to the light-emitting element, and a gate electrode provided between the first terminal and the second terminal via a gate insulating film, wherein a first channel width on the side of the first terminal is different from a second channel width on the side of the second terminal.

2. The display device according to claim 1, further comprising: a second transistor that outputs a pixel signal corresponding to the current to the gate electrode; a capacitor that holds the pixel signal as a voltage; and a third transistor that initializes the voltage of the light-emitting element.

3. The display device according to claim 2, further comprising a fourth transistor provided between the first terminal and a power supply line.

4. The display device according to claim 2, further comprising a fourth transistor provided between said second terminal and said light-emitting element.

5. The display device according to claim 1, wherein a first notch is provided on an edge of the semiconductor layer in the channel width direction.

6. The display device according to claim 5, wherein a second notch portion is provided in the gate electrode along the first notch portion.

7. The display device according to claim 5, wherein the first cutout portion is provided so as to be perpendicular to the channel width direction.

8. The display device according to claim 5, wherein the first cutout portion is provided on both sides of the end side.

9. The display device according to claim 5, wherein the first cutout portion is provided on one side of the edge.

10. The display device according to claim 1, wherein the planar shape of the semiconductor layer between the first terminal and the second terminal is trapezoidal.

11. The display device according to claim 5, wherein the first cutout portion has a rounded shape.

12. The display device according to claim 1, wherein the light emitting element and the first transistor are provided in each of a plurality of sub-pixels, and the second channel width differs for each of the plurality of sub-pixels.

13. The display device according to claim 1, wherein the light-emitting element is a light-emitting diode.

14. The display device according to claim 1, wherein the first transistor is a P-type MOSFET or an N-type MOSFET.

Images