Optical device manufacturing method

Abstract

The objective of the present invention is to provide an optical device substrate and an optical device manufacturing method capable of reducing occurrences of bonding strength reduction and electrode peeling without increasing the parasitic capacitance of electrodes.　A substrate 10 according to the present invention is a substrate in which a plurality of regions A are aligned, a circuit pattern (14, 17a) for an optical device and a main electrode 17 that is connected to the circuit pattern being formed in each region A, characterized in that an inspection electrode 18 connected to the main electrode 17 formed in one region (for example, A1) is formed in another region (for example, A2) adjacent to the one region. Here, the substrate 10 is characterized in that the inspection electrodes 18 are not connected to the circuit patterns (14, 17a) or the main electrodes 17 formed in other regions (for example, A2).

Description

Optical device manufacturing method

[0001] The present disclosure relates to a method for manufacturing optical devices such as EML (Electro-absorption Modulator Integrated Laser Diode) chips.

[0002] A conventional EML chip integrates an LD (Laser Diode) and an EA (Electro Absorption) modulator (see, for example, Patent Document 1). The surface of the EML chip is provided with electrodes for applying electrical signals to these elements. In typical applications, the EML chip is mounted on a wiring board called a subcarrier, and the electrodes on the surface of the EML chip are connected to the wiring board on the subcarrier by a technique called wire bonding.

[0003] JP 2018-14473 A

[0004] When conducting electrical testing of EML chips, a method called probing is used, in which sharp needle-like probes are pressed directly against the electrodes to connect them. This method allows the characteristics of each EML chip to be evaluated collectively on a bar-shaped substrate in which the EML chips are connected together before being cut into individual chips (chipping).

[0005] However, probing can cause unevenness on the electrode surface due to the probe needle, which can lead to reduced bonding strength and electrode peeling during wire bonding when mounting the EML chip on a subcarrier. Decreased bonding strength and electrode peeling can be avoided by separating the probing area, where the probe needle is pressed against the electrode surface, from the bonding area, where wire bonding is performed. However, the electrodes of EML chips (especially EA modulators) are made as small as possible to reduce parasitic capacitance in order to increase the operating speed of the elements. Therefore, it is difficult to separate the probing area and bonding area of ​​the EML chip electrodes, which poses the challenge of reducing reduced bonding strength and electrode peeling.

[0006] Therefore, in order to solve the above problems, the present invention aims to provide an optical device substrate and an optical device manufacturing method that can reduce the occurrence of a decrease in bonding strength and electrode peeling without increasing the parasitic capacitance of the electrode.

[0007] In order to achieve the above object, the substrate of the optical device according to the present invention does not use one electrode for both probing and bonding, but has two electrodes, one for probing and one for bonding, and is designed so that the electrode for probing is separated when the optical device is cut out from the substrate. Note that, hereinafter, the electrode for bonding is referred to as the "main electrode" and the electrode for probing is referred to as the "test electrode."

[0008] Specifically, the substrate of the optical device according to the present invention is a substrate having a plurality of aligned regions on which circuit patterns of optical devices and main electrodes connected to the circuit patterns are formed, and an inspection electrode connected to the main electrode formed in one of the regions is formed in another of the regions adjacent to the one of the regions, and the inspection electrode is not connected to the circuit patterns and main electrodes formed in the other of the regions.

[0009] A device manufacturing method according to the present invention includes a forming step of aligning a plurality of regions on a substrate, each region having a circuit pattern of an optical device and a main electrode connected to the circuit pattern, wherein in the forming step, an inspection electrode connected to the main electrode formed in one of the regions is formed in another of the regions adjacent to the one of the regions, and the inspection electrode is formed so as not to be connected to the circuit pattern and the main electrode formed in the other of the regions. After the forming step, a cutting step is performed to cut the substrate between the regions to cut out a plurality of optical devices.

[0010] Therefore, the optical device of the present invention is an optical device obtained by cutting the substrate between the regions, and is provided with the circuit pattern, the main electrode, and the inspection electrode that is not connected to the circuit pattern and the main electrode.

[0011] This structure prevents the bonding electrode from becoming uneven on the surface due to the probe needle, thereby preventing a decrease in bonding strength and electrode peeling. Furthermore, by separating the probing electrode during chipping, an increase in parasitic capacitance can be suppressed. Therefore, the present invention can provide an optical device substrate and an optical device manufacturing method that can reduce the occurrence of a decrease in bonding strength and electrode peeling without increasing the parasitic capacitance of the electrode.

[0012] The above inventions can be combined as much as possible.

[0013] The present invention can provide an optical device substrate and an optical device manufacturing method that can reduce the occurrence of a decrease in bonding strength and electrode peeling without increasing the parasitic capacitance of the electrodes.

[0014] While the present invention has been described with reference to exemplary embodiments, it is to be understood that the invention is not limited to the disclosed exemplary embodiments and is not to be construed as limiting the invention.

[0015] The following description of the preferred embodiments of the present invention will be given with reference to the accompanying drawings. The preferred embodiments described below are examples of the present invention, and the present invention is not limited to the preferred embodiments. In this specification and the drawings, components having the same reference numerals are intended to represent the same components.

[0016] 1A is a diagram illustrating a substrate 10 according to this embodiment. The substrate 10 is a substrate on which a plurality of regions A are arranged, each region having an optical device circuit pattern (14, 17a) and a main electrode 17 connected to the circuit pattern, and is characterized in that a testing electrode 18 connected to the main electrode 17 formed in one region (e.g., A1) is formed in another region (e.g., A2) adjacent to the one region.

[0017] Here, the substrate 10 is characterized in that the inspection electrode 18 is not connected to the circuit patterns (14, 17a) and the main electrode 17 formed in other areas (for example, A2).

[0018] In this embodiment, an example in which the optical device is an EML chip will be described. FIG. 2 is a cross-sectional view of the substrate 10 in FIG. 1A cut along line X-X' (EA modulator portion), illustrating the EML chip. This EML chip has a semi-insulating buried heterostructure (SI-BH). This EML chip comprises an n-type InP substrate layer 11, a core layer 14 including an absorption layer of a multi-quantum well (MQW), an overcladding layer 15 of p-type InP doped with Zn or the like, a semi-insulating layer 12 of InP doped with an additive (Fe or the like), an insulating film (SiO ２ The EML chip is made up of a substrate 11 and a contact electrode layer 16, a pad electrode layer 17a, a main electrode 17, an inspection electrode 18, and wiring 19. The EML chip can be manufactured by a semiconductor manufacturing method that repeats a thin film lamination process, a lithography process, and an etching process on the substrate 11.

[0019] The main electrode 17 is connected to the EA waveguide 21 via the pad electrode layer 17a and the contact electrode layer 16. In the state of the substrate 10, the main electrode 17 and the testing electrode 18 are connected by the wiring 19. That is, the testing electrode 18 is connected to the EA waveguide 21 via the wiring 19, the main electrode 17, the pad electrode layer 17a, and the contact electrode layer 16. The main electrode 17 is an electrode used for wire bonding. The EA waveguide 21 is configured with the core layer 14 as a waveguide core and the substrate layer 11, the InP semi-insulating layer 12, and the overclad layer 15 as cladding.

[0020] To operate as an optical device, the EA waveguide 21 and the main electrode 17 are placed in the same area (e.g., A1), while the testing electrode 18 is placed in the adjacent area (e.g., A2). The optical device in each area A is tested in this state. That is, when probing, the probe needle is pressed against the testing electrode 18, not the main electrode 17, to evaluate the characteristics of the optical device. The probe needle creates irregularities on the surface of the testing electrode 18, but no irregularities are created on the surface of the main electrode 17.

[0021] After evaluating the characteristics of the optical device, the substrate 10 is cut between the regions A to cut out the optical device 20. For example, the substrate 10 may be diced along the cutting line Z using a high-speed cutter, or if the substrate 10 is made of a single crystal, the substrate 10 may be cleaved along the cutting line Z. By cutting between the regions A, the wiring 19 connecting the main electrode 17 and the testing electrode 18 is also cut, and the main electrode 17 and the testing electrode 18 are separated.

[0022] That is, the optical device 20 is an optical device cut out by cutting the substrate 10 between the regions A, and comprises a circuit pattern (14, 17a), a main electrode 17, and an inspection electrode 18 (an inspection electrode of an adjacent optical device) that is not connected to these.

[0023] 3 is a diagram illustrating a device manufacturing method according to this embodiment. The device manufacturing method includes a forming step S01 for arranging a plurality of regions A on a substrate 10, each region A including circuit patterns (14, 17a) of optical devices 20 and main electrodes 17 connected thereto, wherein the forming step S01 includes forming, in another region (e.g., A2) adjacent to the first region, a testing electrode 18 connected to the main electrode 17 formed in the first region (e.g., A1), so as not to be connected to the circuit patterns (14, 17a) and main electrodes 17 in the other region (e.g., A2); The forming step S01 is followed by an evaluation step S02 for evaluating the characteristics of the circuit patterns in each region on the substrate 10 using the testing electrode 18; and a cutting step S03 for cutting the substrate 10 between the regions A to cut out a plurality of optical devices 20.

[0024] 10: Substrate 11: Substrate layer 12: Semi-insulating layer 13: Insulating film 14: Core layer 15: Overclad layer 16: Contact electrode layer 17: Main electrode 17a: Contact electrode layer 18: Inspection electrode 19: Wiring 20: Optical device 21: EA waveguide

Claims

1. A substrate on which a plurality of regions are arranged in which circuit patterns of optical devices and main electrodes connected to said circuit patterns are formed, characterized in that an inspection electrode connected to said main electrode formed in one of said regions is formed in another of said regions adjacent to said one of said regions.

2. The substrate according to claim 1, wherein the inspection electrodes are not connected to the circuit patterns and main electrodes formed in the other regions.

3. An optical device obtained by cutting the substrate according to claim 2 between the regions, the optical device comprising the circuit pattern, the main electrodes, and the inspection electrodes that are not connected to the circuit pattern and the main electrodes.

4. A device manufacturing method having a forming step of aligning a plurality of regions on a substrate in which circuit patterns of optical devices and main electrodes connected to the circuit patterns are formed, wherein in the forming step, inspection electrodes connected to the main electrodes formed in one of the regions are formed in another of the regions adjacent to the one of the regions, and the inspection electrodes are formed so as not to be connected to the circuit patterns and main electrodes formed in the other of the regions.

5. A device manufacturing method according to claim 4, wherein after said forming step, a cutting step is carried out in which said substrate is cut between said regions to cut out a plurality of optical devices.

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