Encapsulation device and method for manufacturing same

Abstract

The invention relates to an encapsulation device (1) comprising: - a substrate (2) having an attachment face intended to accommodate a semiconductor chip (4) and comprising a plurality of metal pads; - a semiconductor chip (4) attached to a first metal pad; - connection means (5) electrically connecting the semiconductor chip (4) attached to the first metal pad to a second metal pad; - a wall (6) attached to a third metal pad, the wall (6) surrounding the semiconductor chip (4) and the connection means (5) so as to form an enclosure around the semiconductor chip (4) and the connection means (5); - a polymer substance (7) arranged at least within the enclosure and at least partially covering the semiconductor chip (4) and the connection means (5), in which device the wall (6) is made of metal. The invention further relates to a method for manufacturing such an encapsulation device.

Description

[0001] DESCRIPTION

[0002] TITLE: Encapsulation device and its manufacturing process

[0003] technical field

[0004] The invention relates to the technical field of semiconductor chips, and more particularly to semiconductor chip encapsulation devices and manufacturing processes for encapsulation devices.

[0005] State of the art

[0006] Encapsulation is the process of covering an electronic chip or semiconductor chip with a protective material to shield it from physical and environmental damage while providing an interface for electrical connections. Encapsulating electronic chips is a key step in the manufacturing of an electronic component and influences both the component's reliability and its selling price.

[0007] With the rapid evolution of the semiconductor industry, the importance of encapsulation has continued to grow, becoming a crucial element in ensuring the proper functioning and reliability of electronic components in a variety of applications, ranging from consumer electronic devices to critical embedded systems.

[0008] Among the various encapsulation devices designed to house semiconductor components, particularly in consumer applications, the plastic package has emerged as a widely used solution. This type of package offers a combination of physical and environmental protection for electronic chips while remaining economical to mass-produce. Thanks to its ability to withstand shocks, humidity, and other adverse conditions, the plastic package ensures the reliability and longevity of electronic components, which is essential in sectors such as consumer electronics, where devices must be both affordable and robust.In addition, plastic casings offer design flexibility, allowing easy integration into a variety of electronic products, from smartphones to smart home devices, thus contributing to the widespread adoption of semiconductor technology in modern society.

[0009] Electronic components with plastic packages are manufactured on high-volume assembly lines, producing several thousand to several million parts per day for some lines, resulting in a very low unit cost. However, for the space sector, where applications use very few components and require chips with a specific design adapted to withstand space radiation, the range of electronic components available to the general public is inadequate. In the space sector, the on-demand manufacturing of small quantities of various types of components, requiring electronic chips capable of withstanding space radiation, is crucial. This is why unit encapsulation in ceramic packages is widely preferred to meet these specific requirements of the space market.The use of ceramic packages results in very high prices for electronic components compared to electronic components with plastic packages that are available to the general public.

[0010] However, the space sector is currently undergoing a transformation and there is a need for electronic components that can withstand space radiation, are reliable, can be easily fixed to an electronic board, are robust and resistant to high temperatures, especially when fixed to a printed circuit board, and have a relatively low selling price and manufacturing cost.

[0011] Summary of the invention

[0012] To address the issues presented above, the invention relates to an encapsulation device comprising:

[0013] - a substrate having a mounting face intended to receive a semiconductor chip and comprising a plurality of metallic areas,

[0014] - a semiconductor chip attached to a first metallic pad,

[0015] - connection means electrically linking the semiconductor chip attached to the first metallic pad to a second metallic pad,

[0016] - a wall fixed to a third metallic plate, said wall surrounding the semiconductor chip and the connection means so as to form an enclosure around the semiconductor chip and the connection means,

[0017] - a polymeric substance disposed at least within the enclosure and covering at least partially the semiconductor chip and the connection means, a device in which the wall comprises a metal.

[0018] The wall extends transversely across the substrate, creating an opening in the area facing the substrate. This forms a cavity designed to receive the polymeric substance. The wall is therefore hollow and equipped with an opening to allow the polymeric substance to be deposited when it is attached to the third metal plate. Specifically, the wall is defined by its height transversely to the substrate and its thickness along the substrate. Advantageously, the use of a wall incorporating metal ensures significant mechanical strength, thereby increasing the robustness and durability of the device.

[0019] The wall can be made of a metal.

[0020] Advantageously, the use of a wall made of metal ensures significant mechanical resistance, which increases the robustness and durability of the device.

[0021] The metal can be chosen from the group including copper, a copper alloy, silver, aluminum, or gold.

[0022] The means of connection may include a connecting wire, in particular an aluminum connecting wire.

[0023] Advantageously, aluminum wire connection offers several advantages, including good electrical conductivity, corrosion resistance, and the ability to be used in high-temperature environments.

[0024] The first metal plate, the second metal plate and the third metal plate may be different from each other and may not be electrically connected on the substrate fixing face.

[0025] The polymeric substance disposed at least within the enclosure can completely cover the semiconductor chip and the connection means.

[0026] The polymeric substance can be a resin.

[0027] The polymeric substance may comprise one or more polymers.

[0028] The invention may also have one or more of the following features taken alone or in combination.

[0029] Based on a characteristic, the metal is chosen from the group including copper, a copper alloy, silver, gold, steel, or aluminum.

[0030] Steel, copper, silver, gold, aluminum or copper alloy have the necessary mechanical strength to make the encapsulation device more robust and durable.

[0031] The wall can be made of a metal chosen from the group including copper, a copper alloy, silver, gold, steel, or aluminum.

[0032] According to one characteristic, the wall has a height relative to the mounting face that is greater than the height relative to the mounting face of an assembly consisting of the semiconductor chip and the connecting means, and the polymer substance fills the enclosure to a height less than or equal to the height of the wall. This ensures that the polymer substance fully covers the semiconductor chip and the connecting means in order to protect them from external disturbances.

[0033] The wall height can, for example, be 2.5 mm.

[0034] According to one feature, the semiconductor chip is fixed to the first metal area by a chip fastener, and the wall is fixed to the third metal area by a wall fastener, said chip fastener and said wall fastener being made from the same material or the same material(s).

[0035] The chip attachment and the wall attachment can be made using the same attachment manufacturing process, for example such as that described below.

[0036] Advantageously, this reduces the materials used in the manufacture of the encapsulation device, thus resulting in an economical encapsulation device.

[0037] According to one characteristic, said chip attachment and said wall attachment each comprise a composition selected from the following compositions: a sintering, and in particular a silver sintering, a brazing comprising a tin-lead alloy, a brazing comprising a tin-silver-copper alloy, a brazing comprising a gold-tin alloy, a brazing comprising pure tin.

[0038] Advantageously, silver sintering offers good thermal and electrical performance and allows for reliable and robust attachment of the wall and semiconductor chip to the substrate.

[0039] According to one characteristic, the encapsulation device includes a hermetic zone that covers the external lateral faces of the wall and substrate, and the face of the substrate opposite the fixing face.

[0040] The hermetic zone has a role in protecting the encapsulation device against elements external to the encapsulation device and any damage that may result from the manufacturing process of the encapsulation device.

[0041] The internal side faces of the wall are located on the side of the wall where the semiconductor chip is attached.

[0042] External lateral faces are those lateral faces of the wall located on the opposite side to the internal lateral faces.

[0043] According to one feature, the encapsulation device includes a sealed zone that covers both the mounting face and the semiconductor chip fixed to the mounting face. The sealed zone protects the semiconductor chip against moisture, for example. The invention further relates to a method for manufacturing the encapsulation device described above, comprising the following steps:

[0044] - supply of the substrate,

[0045] -attachment of the semiconductor chip to the first metal pad,

[0046] - electrical connection of the semiconductor chip fixed to the first metal plate to the second metal plate by the connecting means,

[0047] - fixing the metal wall to the third metal plate so that said wall surrounds the semiconductor chip and the connection means so as to form an enclosure around the semiconductor chip and the connection means,

[0048] - insertion of the polymeric substance into the enclosure so that the polymeric substance at least partially covers the semiconductor chip and the connection means.

[0049] According to one characteristic, the attachment of the semiconductor chip to the first metal area is done jointly with the attachment of the metal wall to the third metal area.

[0050] By "metallic wall" we mean the wall that includes a metal or that is made of a metal.

[0051] Advantageously, when the attachment of the semiconductor chip to the first metal plate is done jointly with the attachment of the metal wall to the third metal plate, the manufacturing process becomes faster and more economical.

[0052] By "jointly," we mean that the attachment of the semiconductor chip to the first metal plate and the attachment of the metal plate to the third metal plate occur together, simultaneously, in parallel. In other words, the plate attachment and the chip attachment are performed concurrently during the manufacturing process of the encapsulation device.

[0053] According to one characteristic, the attachment of the semiconductor chip to the first metal plate and the attachment of the metal wall to the third metal plate is done by brazing with a solder paste.

[0054] Solder paste can be a gold-tin (SnAu), pure tin (Sn) or tin-lead (SnPb) or tin-silver-copper (SnAgCu) paste.

[0055] Advantageously, brazing allows the semiconductor chip and wall to be fixed to the substrate in a robust, reliable and airtight manner.

[0056] According to one characteristic, the semiconductor chip is attached to the first metal plate and the metal wall to the third metal plate by sintering a silver paste. Advantageously, silver paste sintering allows the semiconductor chip and wall to be attached to the substrate in a robust, reliable, and airtight manner, and ensures higher temperature resistance.

[0057] The invention will be described with reference to the accompanying figures, which are provided for illustrative purposes only and are not drawn to scale. In the figures, the same numerical references designate the same elements.

[0058] Brief description of the figures

[0059] [Fig.1] Figure 1 is a cross-sectional side view of a substrate intended to receive a semiconductor chip.

[0060] [Fig.2] Figure 2 is a top view of a substrate mounting face onto which the semiconductor chip can be fixed.

[0061] [Fig.3] Figure 3 is a top view of the face opposite the fixing face of Figure 2.

[0062] [Fig.4a] Figure 4a is a side cross-sectional view of the substrate of Figure 1 on which fasteners have been deposited on the fixing face.

[0063] [Fig.4b] Figure 4b is a side view of the substrate of Figure 4a to which a wall and the semiconductor chip have been fixed on the fixing face.

[0064] [Fig.5a] Figure 5a is a side cross-sectional view of the substrate of Figure 1 in which the chip has been connected to a metal pad on the mounting face.

[0065] [Fig.5b] Figure 5b is a side view in section of the substrate of Figure 5a in which the chip and the means of connection with the polymeric substance have been covered.

[0066] [Fig.6] Figure 6 is a side view in cross-section of the substrate of Figures 4 and 5 which represents a hermetic zone and a sealed zone of the encapsulation device.

[0067] [Fig.7] Figure 7 is a top view of a substrate mounting face for 20 jointly manufactured components.

[0068] [Fig.8a] Figure 8a is a top view of an example of a simple wall.

[0069] [Fig.8b] Figure 8b is a top view of an example of wall 6 with four indentations for a sorting and placement equipment nozzle.

[0070] [Fig.9] Figure 9 is a top view of the fixing face of Figure 7 which shows cutting lines for 20 components manufactured together.

[0071] Detailed description

[0072] The invention relates primarily to an encapsulation device 1. The encapsulation device 1 comprises a substrate 2 like that of Figure 1, which has a mounting face 101 for receiving a semiconductor chip 4 and comprising a plurality of metallic areas p1, p2, p3. The substrate 2 may be made of ceramic. By substrate 2, we mean a printed circuit board substrate, also known as a PCB (Printed Circuit Board).

[0073] The substrate 2 may comprise a plurality of superimposed insulating layers and one or more metallic surfaces p1, p2, p3, p4, p5, pi formed on one or more of these insulating layers. The substrate 2 may comprise one or more internal metallic surfaces pi arranged within the substrate 2 between the mounting face 101 and the face 102 opposite the mounting face 101, as shown in Figure 1.

[0074] The ceramic substrate 2 can have a coefficient of thermal expansion or CTE that lies between that of printed circuits (~18 ppm / °C) and that of semiconductor chips (~3 ppm / °C). LTCC (Low Temperature Co-fired Ceramics) and HTCC (High Temperature Co-fired Ceramics) ceramics, typically having a CTE between 5 and 13 ppm / °C, may be particularly suitable for the invention.

[0075] The metal pads p1, p2, p3 are shown in Figures 1 and 2. These pads can be made of copper. Copper is a good electrical conductor, and the pads p1, p2, p3 thus provide electrical connection paths between different components mounted on the substrate 2. The first metal pad p1, the second metal pad p2, and the third metal pad p3 can be different from each other and may not be electrically connected to the mounting face 101 of the substrate 2. The metal pads p1, p2, p3, p4, p5, p1 can have a polygonal shape, and in particular a rectangular shape suitable for receiving an electronic component such as a microchip.

[0076] The encapsulation device 1 also includes a semiconductor chip 4 attached to a first metallic area p1. In the context of the invention, the terms "electronic chip" and "semiconductor chip" refer to the same component. The semiconductor chip 4 may, for example, be a diode.

[0077] The semiconductor chip 4 can be attached to the first metal plate p1 by a chip fastener 10, and the wall 6 can be attached to the third metal plate p3 by a wall fastener 11. "Attached" means that the semiconductor chip 4 is electrically connected to the first metal plate and is stationary relative to said first metal plate p1. The same applies to the wall 6 and the third metal plate p3.

[0078] The chip attachment 10 and the wall attachment 11 are shown in Figure 4a. The chip attachment 10 and the wall attachment 11 can take the form of a metallic layer deposited on the metallic surfaces p1, p2, p3 or attached to the metallic surfaces p1, p2, p3. The chip attachment 10 and the wall attachment 11 can be made from the same material(s).

[0079] Said chip attachment 10 and said wall attachment 11 each comprise a composition selected from the following compositions: a sinter, and in particular a silver (Ag) sinter, a brazing comprising a tin-lead (SnPb) alloy, a brazing comprising a tin-silver-copper (SnAgCu) alloy, a brazing comprising a gold-tin (SnAu) alloy, a brazing comprising pure tin (Sn).

[0080] Advantageously, manufacturing the chip attachment 10 and the wall attachment 11 from the same material reduces the materials used in manufacturing the encapsulation device 1, thus resulting in an economical encapsulation device 1.

[0081] Advantageously, silver sintering offers good thermal and electrical performance and allows reliable and robust attachment of the wall 6 and semiconductor chip 4 to the substrate 2.

[0082] The solder joints need to be remelted to perform their bonding function. Depending on the alloy used, the melting temperatures differ: for example, for SnPb, the melting temperature is approximately 185°C, and for SnAu the melting temperature is approximately 280°C.

[0083] Reflowing a solder joint can lead to problems such as gaps, where there is insufficient solder material to create a strong bond between the parts. Reflowing a solder joint can also cause unwanted flow, where the molten metal moves outside the intended area, potentially causing short circuits or other defects in the components.

[0084] Sintering does not require remelting the material, unlike soldering. This process uses metal powders, which are heated to create a strong bond without reaching the melting point of the materials involved. The process is similar to using glue, as the powder particles bond to each other under the effect of heat. However, to achieve a proper and durable bond, a temperature of approximately 250°C is necessary, allowing the particles to bond adequately while maintaining the shape and structure of the assembled components. Advantageously, the sintering process is pressureless, thus avoiding damage to the semiconductor chip.

[0085] The chip attachment 10 and the wall attachment 11 can be made of solder paste.

[0086] The semiconductor chip 4 can be placed on the first metal pad p1 using pick-and-place equipment. Solder paste can be deposited on the first metal pad p1 and then heated to its melting point to fix the semiconductor chip 4 to the first metal pad p1. For example, the melting point can be 280°C if the solder paste contains a gold-tin (SnAu) alloy. Alternatively, the melting point can be 185°C if the solder paste contains a lead-tin (SnPb) alloy.

[0087] Preferably, the solder paste should be a high-temperature solder, for example the solder paste may include SnAu, in order to avoid having to remelt said solder paste when mounting the encapsulation device 1 on a printed circuit board.

[0088] One possibility is that solder paste may contain lead.

[0089] Alternatively, a lead-free soldering paste can be used, for example SAC305 paste.

[0090] Alternatively or in addition, the chip attachment 10 and the wall attachment 11 can be made of a sintering paste.

[0091] The substrate 2 may include through-holes plated through the substrate, also called vias 20, which connect the internal metal plates pi to metal plates p1, p2, p3, p4, p5 on the surface of the substrate 2, as shown in Figure 1. The vias 20 in the substrate 2 allow an electrical connection between the mounting face 101, which is intended to receive the semiconductor chip 4, and the face 102 opposite the mounting face 101 for connection with components external to the encapsulation device 1. The vias 20 provide an electrical path for electrical signals so that said electrical signals can flow freely between the mounting face 101 and the opposite face 102. Figure 2 shows the mounting face 101, and Figure 3 shows the face 102 opposite the mounting face 101.

[0092] The vias 20 can provide a thermal connection between the mounting face 101 and the opposite face 102 in order to allow the cooling of the semiconductor chip 4. The vias 20 can therefore have both a thermal and an electrical effect by allowing electrical connections between the different faces of the encapsulation device 1.

[0093] The encapsulation device 1 further includes connection means 5 for electrically connecting the semiconductor chip 4, attached to the first metal plate p1, to a second metal plate p2. The connection via the connection means 5 provides electrical power to the semiconductor chip 4. The connection means 5 may be an aluminum connecting wire. Advantageously, the aluminum wire connection offers several advantages, including good electrical conductivity, corrosion resistance, and the ability to be used in high-temperature environments. The encapsulation device 1 further includes a wall 6 attached to a third metal plate p3. An example of the wall 6 attached to the substrate 2 is shown in Figure 4b.

[0094] The wall 6 may be made up of separate, unconnected elements. For example, the wall 6 may consist of four separate walls. Alternatively, the wall 6 may consist of a single element. The wall 6 may surround the semiconductor chip 4 and the connection means 5 so as to form an enclosure or cavity around the semiconductor chip 4 and the connection means 5. The enclosure or cavity must be configured to receive a polymeric substance such as a resin.

[0095] In the encapsulation device 1, the wall 6 comprises a metal.

[0096] Alternatively, the wall can be made of metal.

[0097] Advantageously, the use of a wall 6 which includes a metal ensures significant mechanical resistance, which increases the robustness and durability of the encapsulation device 1.

[0098] The metal can be chosen from the group including steel, copper, a copper alloy, aluminum, gold, or silver. Steel, copper, copper alloy, aluminum, gold, and silver have the necessary mechanical strength to make the encapsulation device 1 more robust and durable.

[0099] The metal can also be any other metal which has a CTE close to the CTE of the ceramic and which is suitable to be fixed to the metallic range p3 by means of the wall attachment material which can be the same as the semiconductor chip attachment material 4 which can for example be silver sintering.

[0100] The wall 6 can serve as a mold intended to receive a polymeric substance 7 such as resin in order to encapsulate the semiconductor chip 4.

[0101] The encapsulation of the semiconductor chip 4 can be likened to a "Dam and FUI" process known to those skilled in the art, except that the wall 6 is fixed to the substrate 2 by the semiconductor chip attachment material 4, for example by soldering or silver sintering.

[0102] Wall 6 can be connected via vias 20 to a connection pad (not shown in the figures) located on the opposite face 102 to the fixing face 101 for grounding of wall 6.

[0103] A polymeric substance 7, such as resin, is disposed at least within the enclosure and at least partially covers the semiconductor chip 4 and the connection means 5, as shown in Figure 5b. The polymeric substance 7, disposed at least within the enclosure, may completely cover the semiconductor chip 4 and the connection means 5 in order to protect them against external disturbances to the encapsulation device 1. The polymeric substance 7 may comprise one or more polymers.For example, a first polymer, for example considered flexible, i.e. with a low Young's modulus, for example having a Young's modulus of 50 MPa like silicone, compared to a second polymer, can be deposited on and around the semiconductor chip 4 and around the fixing means 5 to at least partially cover the assembly consisting of the semiconductor chip 4 and the fixing means 5, and allows to minimize mechanical stresses on the semiconductor chip 4, mechanical stresses which can be thermally generated by differences in expansion of the materials.The polymeric substance 7 may also include a second polymer, having a rigidity greater than that of the first polymer, and for example having a Young's modulus of 3000 MPa like epoxy, and deposited on the first polymer to strengthen the encapsulation device 1 against external aggressions to the encapsulation device 1 and to fill the cavity at least in part, and possibly completely, in other words to fill the cavity with polymeric substance 7 in such a way that the height of the polymeric substance 7 is less than or equal to the height of the wall 6 in order to avoid any overflow of the polymeric substance 7.

[0104] Depending on the materials and processes chosen, the encapsulation device 1 may include a hermetic zone 12 which covers the external lateral faces of the wall 6 and the substrate, and the face of the substrate opposite the fixing face 101 as shown in Figure 6. For example, if the wall 6 is glued to the substrate 2, the seal would not be satisfactory, whereas with brazing or silver sintering, the seal is improved.

[0105] The hermetic zone 12 has a role in protecting the encapsulation device 1 against elements external to the encapsulation device 1 and any damage that may result from the manufacturing process of the encapsulation device 1.

[0106] By internal lateral faces of wall 6, we mean the lateral faces of wall 6 located on the side where the semiconductor chip 4 is located.

[0107] External lateral faces are understood to be the lateral faces of wall 6 located on the opposite side to the internal lateral faces.

[0108] Depending on the materials and processes chosen, the encapsulation device 1 may include a sealed area 13, also shown in Figure 6, which covers both the mounting face 101 and the semiconductor chip 4 fixed to the mounting face 101.

[0109] The sealed area 13 protects the semiconductor chip 4 against moisture, for example.

[0110] Manufacturing method for the encapsulation device The invention relates secondly to a manufacturing method for the encapsulation device 1 as described above.

[0111] The manufacturing process begins with a step to supply substrate 2. During this step, the type of ceramic suitable for substrate 2 must be selected. LTCC-type ceramics, typically having a CTE between 8 and 13 ppm / °C, are particularly well-suited. The ceramic can be selected based on its thermal and mechanical properties, as well as the routing rules associated with it.

[0112] Following the selection of the ceramic, it is possible to design the internal and external routing of the substrate 2. By external routing, we mean the way in which the metal pads p1, p2, p3, p4, p5 are arranged on the fixing face 101 and the opposite face 102. By internal routing, we mean the definition of a number of conductive pads pi within the substrate 2 as well as the arrangement of the vias 20, their dimensions and their number within the substrate 2.

[0113] The definition of internal and external routing, the number of conductive layers, and the dimensions and number of vias aims to obtain a ceramic that will have the lowest possible electrical and thermal resistance.

[0114] To minimize the cost of the ceramic, a nickel-protected gold flash finish for the pi metal pads should be chosen; the gold flash typically has a thickness of approximately 0.1 µm. This pi metal pad finish eliminates the need for de-golding the pads intended for soldering while protecting the nickel from oxidation. An example of a three-layer ceramic substrate designed to receive a two-terminal power component, such as a diode, is shown in Figures 1, 4a, 4b, 5a, 5b, and 6.

[0115] Advantageously, the described process is particularly interesting because it can be implemented simultaneously for several encapsulation devices. In other words, the manufacturing process described allows for the production of several encapsulation devices at once, which helps to reduce manufacturing costs. In this case, substrate 2 will be composed of a repetition of the motifs of the unit encapsulation device as shown in Figure 7.

[0116] Once the substrate 2 is supplied, it is possible to dimension the third metal plate p3 intended to receive the wall 6 and said wall 6 by choosing the height and thickness of said wall 6. The thickness of the wall 6 can for example be between 0.8 mm and 1.2 mm and the height H of the wall 6 can be between 2.3 mm and 2.7 mm, it being understood that these values ​​are given as an example and that it is possible that the thickness of the wall 6 is less than 0.8mm and that the height H of the wall 6 is less than 2.3mm. As can be seen in Figure 6, the wall 6 has a height H relative to the mounting face 101 which is greater than the height relative to the mounting face 101 of an assembly consisting of the semiconductor chip 4 and the connecting means 5, and the polymeric substance 7 fills the enclosure up to a height less than or equal to the height H of the wall 6.In the example in Figure 6, the polymeric substance 7 completely covers the semiconductor chip 4 and the connection means 5.

[0117] The height H of the wall 6 must allow to contain polymeric substance 7 (such as resin) in order to partially or totally cover the semiconductor chip 4 and must prevent an overflow of the polymeric substance 7 during a step of insertion of the polymeric substance 7 into the enclosure formed by the wall 6 around the semiconductor chip 4.

[0118] To fix the wall 6 to the substrate 2, the third metal surface p3 must allow for good gripping by the sorting and placement equipment. Figure 8a shows a top view of an example of a simple wall 6, and Figure 8b shows a top view of an example of a wall 6 with four indentations 14 for a sorting and placement equipment nozzle.

[0119] Advantageously, the example in Figure 8a is simple to implement and inexpensive.

[0120] Advantageously, the example in figure 8b allows for good gripping of wall 6 by the sorting and placement equipment.

[0121] The design of wall 6 has a significant influence on the ease of implementation and low cost of the manufacturing process described. Therefore, a compromise must be found regarding the material used for wall 6, the technique for producing wall 6 (which can be chosen from machining, cutting, stamping, molding, etc.), and the surface treatment of wall 6. When wall 6 is designed according to defined criteria, it can be attached to the third metal plate p3, notably by applying solder paste using screen printing or any other suitable dispensing method and heating the assembly to a defined temperature. The heating temperature varies depending on the type of material used, for example, the type of solder or the type of sintering, and in particular whether it is silver sintering. For silver sintering, the heating temperature can range from 250°C to 300°C.

[0122] Alternatively, wall 6 can be attached to the third metal plate p3 by gluing. In all cases, the attachment of wall 6 and semiconductor chip 4 to substrate 2 is done simultaneously, i.e., jointly, during the same step.

[0123] The process also includes a step of attaching the semiconductor chip 4 to the first metal plate p1 and the wall 6 to the third metal plate p3. This is done by applying solder paste using screen printing or sintering paste using a dispensing method before attaching the semiconductor chip 4 and the wall 6. Several types of solder paste can be used, including a solder paste containing an SnPb alloy, an SnAgCu alloy, or pure tin. However, to ensure the high-temperature resistance of the encapsulation device 1, solder pastes with a sufficiently high melting point are required. For example, gold-tin solder paste with a melting point of approximately 280°C can be used.

[0124] The placement (or transfer) of the semiconductor chip 4 and the wall 6 onto the substrate 2 can be automated using sorting and placement equipment to ensure precise positioning of the semiconductor chip 4 and the wall 6, and also to reduce the manufacturing costs of the encapsulation device 1. After the semiconductor chip 4 and the wall 6 are transferred to the appropriate metal pads, the solder paste applied to the metal pads is melted. The resulting structure is shown in Figure 4b. It is preferable that the placement of the semiconductor chip 4 on the first metal pad p1 be carried out simultaneously with the placement of the metal wall 6 on the third metal pad p3.

[0125] Advantageously, when the attachment of the semiconductor chip 4 to the first metal area p1 is done jointly with the attachment of the metal wall 6 to the third metal area p3, the manufacturing process becomes faster and more economical.

[0126] By jointly, we mean that the attachment of the semiconductor chip 4 to the first metal area p1 and the attachment of the metal wall 6 to the third metal area p3 are done together, at the same time, in parallel with each other.

[0127] The attachment of the semiconductor chip 4 to the first metal area p1 and the attachment of the metal wall 6 to the third metal area p3 can be done by brazing with solder paste.

[0128] Advantageously, soldering with solder paste allows the semiconductor chip 4 and the wall 6 to be fixed to the substrate in a robust, reliable and airtight manner.

[0129] Alternatively, the attachment of the semiconductor chip 4 to the first metal area p1 and the attachment of the metal wall 6 to the third metal area p3 can be done by sintering, and in particular by sintering a silver paste.

[0130] Advantageously, silver paste sintering allows the semiconductor chip 4 and the wall 6 to be fixed to the substrate in a robust, reliable, airtight manner and ensures higher temperature resistance than soldering.

[0131] Next, an electrical connection step is performed between the semiconductor chip 4, fixed to the first metal plate p1, and the second metal plate p2, using the connection means 5. This connection step consists of electrically connecting the semiconductor chip 4 and the substrate 2 by means of wire bonding. The connection means 5 may include an aluminum wire. Advantageously, the aluminum wire connection offers several advantages, including good electrical conductivity, corrosion resistance, and the ability to be used in high-temperature environments.

[0132] After this step, we obtain the structure shown in figure 5a.

[0133] It should be noted that the attachment of the metallic wall 6 to the third metallic area p3 is done in such a way that said wall 6 surrounds the semiconductor chip 4 and the connection means 5 to form an enclosure around the semiconductor chip 4 and the connection means 5. The enclosure or cavity formed is intended to receive the polymeric substance 7.

[0134] The polymeric substance 7 is then inserted into the enclosure so that the polymeric substance 7 at least partially covers the semiconductor chip 4 and the connection means 5.

[0135] The encapsulation principle here consists of filling the cavity or enclosure delimited by the wall 6 with the polymeric substance 7 in order to protect the semiconductor chip 4 from external disturbances. The choice of polymers in the polymeric substance 7 may depend on the characteristics of the semiconductor chip 4 and the final application of the manufactured electronic component. For an electronic component intended for high-voltage applications, a polymeric substance with high dielectric resistivity must be used. For power applications, a polymeric substance with good thermal conductivity is preferable. Tests can be carried out to determine the polymeric substance suitable for the semiconductor chip 4. Resin is an example of a polymeric substance used in the manufacturing process described. Following the insertion step of the polymeric substance 7, the structure shown in Figure 5b is obtained.

[0136] In the case where several encapsulation devices are manufactured jointly using the same substrate 2, a cutting step can be performed on the group of encapsulation devices to obtain the individual encapsulation devices. Before performing the cutting step, the substrate 2 can be varnished to electrically insulate the metallic areas on its surface and to enhance the protection provided by the polymer substance 7. Several cutting methods can be used. For example, sawing can be used. To obtain better cutting accuracy and a better ceramic surface finish, pressurized water jet or laser cutting methods can be considered. The cutting lines 15 are shown in Figure 9 on an example of a substrate with 20 components.

[0137] The manufacturing process described is advantageous compared to another manufacturing process resulting in a plastic-encapsulated semiconductor chip because, in the manufacturing process described, the semiconductor chip 4 is much better protected from the external environment since the area outside the wall 6 can be considered totally hermetic, for example forming the hermetic zone 12 as shown in Figure 6.

[0138] Only the area inside wall 6, forming, for example, the sealed zone 13 as shown in Figure 6, cannot be considered airtight. However, the protection provided by the polymer substance and the possibility of varnishing can provide the level of sealing required for electronic applications, including in the space sector.

[0139] Therefore, this type of component can be called semi-hermetic or quasi-hermetic.

[0140] Another advantage of the manufacturing process described is that encapsulation devices made with this process are less expensive than hermetic ceramic components because several components can be manufactured in parallel on the same substrate.

[0141] Furthermore, the described manufacturing process eliminates the need for a hermetic sealing step present in the manufacturing processes of the previous technique, and its control contributes to reducing the cost price of the encapsulation device.

[0142] Furthermore, the use of a ceramic substrate for which the routing of internal metal pads and vias can be optimized makes it possible to obtain components with good thermal and electrical performance.

Claims

DEMANDS 1. Encapsulation device (1) comprising: - a substrate (2) having a mounting face (101) intended to receive a semiconductor chip (4) and comprising a plurality of metallic areas (p1, p2, p3), - a semiconductor chip (4) fixed to a first metallic area (p1), - connection means (5) electrically connecting the semiconductor chip (4) fixed to the first metal plate (p1) to a second metal plate (p2), - a wall (6) fixed to a third metallic plate (p3), said wall (6) surrounding the semiconductor chip (4) and the connection means (5) so as to form an enclosure around the semiconductor chip (4) and the connection means (5), - a polymeric substance (7) disposed at least within the enclosure and covering at least partially the semiconductor chip (4) and the connection means (5), a device in which the wall (6) comprises a metal.

2. Encapsulation device (1) according to claim 1 in which the metal is selected from the group comprising copper, a copper alloy, silver, gold, steel, or aluminum.

3. Encapsulation device (1) according to any one of claims 1 or 2 in which the wall (6) has a height (H) relative to the fixing face (101) which is greater than the height relative to the fixing face (101) of an assembly consisting of the semiconductor chip (4) and the connecting means (5), and the polymeric substance (7) fills the enclosure to a height less than or equal to the height (H) of the wall (6).

4. Encapsulation device (1) according to any one of the preceding claims, wherein the semiconductor chip (4) is fixed to the first metal area (p1) by a chip fastener (10), and the wall (6) is fixed to the third metal area (p3) by a wall fastener (11), said chip fastener (10) and said wall fastener (11) being made from the same material(s).

5. Encapsulation device (1) according to claim 4 in which said chip attachment (10) and said wall attachment (11) each comprise a composition selected from the following compositions: a sintering, and in particular a silver sintering, a brazing comprising a tin-lead alloy, a brazing comprising a tin-silver-copper alloy, a brazing comprising a gold-tin alloy, a brazing comprising pure tin.

6. Encapsulation device (1) according to any one of the preceding claims comprising a hermetic zone (12) which covers the external lateral faces of the wall (6) and of the substrate, and the face of the substrate opposite the fixing face (101).

7. Encapsulation device (1) according to any one of the preceding claims comprising a sealed zone (13) which covers both the mounting face (101) and the semiconductor chip (4) fixed to the mounting face (101).

8. A method for manufacturing the encapsulation device (1) according to any one of the preceding claims, comprising the following steps: - supply of substrate (2), -attachment of the semiconductor chip (4) to the first metal plate (p1), - electrical connection of the semiconductor chip (4) fixed to the first metal plate (p1) to the second metal plate (p2) by the connection means (5), - fixing the metallic wall (6) to the third metallic area (p3) so that said wall (6) surrounds the semiconductor chip (4) and the connection means (5) so as to form an enclosure around the semiconductor chip (4) and the connection means (5), - insertion of the polymeric substance (7) into the enclosure so that the polymeric substance (7) covers at least partially the semiconductor chip (4) and the connection means (5).

9. Method according to claim 8 wherein the attachment of the semiconductor chip (4) to the first metal area (p1) is done jointly with the attachment of the metal wall (6) to the third metal area (p3).

10. Method according to any one of claims 8 or 9 wherein the attachment of the semiconductor chip (4) to the first metal area (p1) and the attachment of the metal wall (6) to the third metal area (p3) is done by brazing a solder paste.

11. A method according to any one of claims 8 or 9 wherein the attachment of the semiconductor chip (4) to the first metal area (p1) and the attachment of the metal wall (6) to the third metal area (p3) is done by sintering a silver paste.

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