Back-contact battery and manufacturing method therefor, and photovoltaic module

Abstract

The present application relates to the technical field of photovoltaics, and discloses a back-contact battery and a manufacturing method therefor, and a photovoltaic module, for use in achieving a low hot spot risk of the back-contact battery, improving the operation reliability of the back-contact battery, and achieving high operation efficiency of the back-contact battery in a forward voltage area. The back-contact battery comprises a semiconductor substrate, a first doped semiconductor layer, a second doped semiconductor layer, and a transparent conductive layer. The second doped semiconductor layer comprises a reverse current leakage portion, wherein the reverse current leakage portion is electrically connected to the first doped semiconductor layer, and the transparent conductive layer extending from a second area covers the reverse current leakage portion.

Description

A back contact battery and its manufacturing method, and a photovoltaic module

[0001] This application claims the following Chinese patent applications filed with the Chinese Patent Office on June 18, 2024: application number 202410788218.1, entitled "A Back Contact Battery and its Manufacturing Method, Photovoltaic Module"; application number 202410918517.2, filed with the Chinese Patent Office on July 10, 2024, entitled "A Back Contact Battery and its Manufacturing Method, Photovoltaic Module"; and application number 202410780833.8, filed with the Chinese Patent Office on June 17, 2024, entitled "A Back Contact Battery and its Preparation Method, Photovoltaic Module". The priority of the following Chinese patent applications is hereby established: application number 202411231314.2, filed with the Chinese Patent Office on September 3, 2024, entitled "A Back Contact Battery and Its Manufacturing Method, and a Photovoltaic Module"; application number 202411388833.X, filed with the Chinese Patent Office on September 30, 2024, entitled "A Back Contact Battery and Its Manufacturing Method, and a Photovoltaic Module"; and application number 202520025111.1, filed with the Chinese Patent Office on January 6, 2025, entitled "A Back Contact Battery and a Photovoltaic Module". The entire contents of these applications are incorporated herein by reference. Technical Field

[0002] This application relates to the field of photovoltaic module technology, and in particular to a back contact battery and its manufacturing method, and a photovoltaic module. Background Technology

[0003] Back-contact solar cells are solar cells with no electrodes on the light-facing side, and both the positive and negative electrodes are located on the back-facing side of the cell. This reduces the shading of the cells by the electrodes, increases the short-circuit current, and improves the energy conversion efficiency of the cells.

[0004] In actual use, back-contact solar cells may be obstructed by objects such as bird droppings, leaves, and dust. This obstruction can cause the cells to overheat and develop hot spots. If the temperature of these hot spots exceeds a certain threshold, it can lead to problems such as photovoltaic module delamination, backsheet burning, and glass shattering, ultimately rendering the entire solar cell unusable. In severe cases, it can even pose a fire risk. Summary of the Invention

[0005] The purpose of this application is to provide a back contact battery and its manufacturing method, as well as a photovoltaic module.

[0006] To achieve the above objectives, in a first aspect, this application provides a back-contact battery. The back-contact battery includes: a semiconductor substrate, a first doped semiconductor layer, a second doped semiconductor layer, and a transparent conductive layer. The second doped semiconductor layer and the first doped semiconductor layer have opposite conductivity types. The semiconductor substrate includes opposing first and second surfaces. The first surface includes alternately spaced first and second regions, and a third region located between the first and second regions. Furthermore, the first, third, and second regions are arranged along a first direction. The first doped semiconductor layer is disposed in the first and third regions. The second doped semiconductor layer is disposed on the second region and extends to cover at least a portion of the first doped semiconductor layer in the third region. The transparent conductive layer covers the second and first doped semiconductor layers. The transparent conductive layer has insulating grooves to physically insulate the portion of the transparent conductive layer corresponding to the first region from the portion corresponding to the second region. Alternatively, the transparent conductive layer only covers the second doped semiconductor layer. The second doped semiconductor layer includes a reverse leakage portion, which is electrically connected to the first doped semiconductor layer, and the reverse leakage portion is covered with a transparent conductive layer extending from the second region.

[0007] Secondly, this application provides a photovoltaic module, which includes the back contact battery provided by the first aspect and its various implementations described above.

[0008] Thirdly, this application provides a method for manufacturing a back contact battery, the method comprising: First, providing a semiconductor substrate. The semiconductor substrate includes a first surface and a second surface opposite to each other. The first surface includes a first region and a second region, and a third region located between the first region and the second region. The first region, the third region, and the second region are arranged along a first direction. Next, forming a first doped semiconductor layer disposed in the first region and the third region. Next, forming a second doped semiconductor layer disposed on the second region and extending to cover the portion of the first doped semiconductor layer on the side opposite to the semiconductor substrate corresponding to the third region. The second doped semiconductor layer and the first doped semiconductor layer have opposite conductivity types. Next, forming a transparent conductive layer covering the second doped semiconductor layer and the first doped semiconductor layer. The transparent conductive layer has insulating trenches to separate the portion of the transparent conductive layer corresponding to the first region from the portion of the transparent conductive layer corresponding to the second region. Alternatively, the transparent conductive layer covers only the second doped semiconductor layer. The second doped semiconductor layer includes a reverse leakage portion, which is electrically connected to the first doped semiconductor layer, and the reverse leakage portion is covered with a transparent conductive layer extending from the second region. Attached Figure Description

[0009] The accompanying drawings, which are included to provide a further understanding of this application and form part of this application, illustrate exemplary embodiments and are used to explain this application, but do not constitute an undue limitation of this application. In the drawings:

[0010] Figures 1-4 are schematic diagrams of the first, second, third, and fourth longitudinal sections of the structure of the back contact battery provided in the embodiments of this application.

[0011] Figures 5-7 are first, second, and third top views of the structure of the back contact battery provided in the embodiments of this application, respectively, on one side of the first surface.

[0012] Figures 8-20 are schematic diagrams of the back contact battery provided in the embodiments of this application during the manufacturing process;

[0013] Figures 21-24 are the fifth, sixth, seventh, and eighth longitudinal sectional views of the structure of the back contact battery provided in the embodiments of this application.

[0014] Figures 25-30 are the fourth, fifth, sixth, seventh, eighth and ninth top views of the structure of the back contact battery provided in the embodiments of this application;

[0015] Figure 31 is a schematic diagram of the back contact battery provided in an embodiment of this application;

[0016] Figure 32 is a partial cross-sectional view of region C in Figure 31;

[0017] Figure 33 is a partial cross-sectional view of region D in Figure 31;

[0018] Figure 34 is a schematic diagram of another back contact battery provided in an embodiment of this application;

[0019] Figure 35 is a ninth longitudinal sectional view of the structure of the back contact battery provided in the embodiments of this application.

[0020] Reference numerals: 11 Semiconductor substrate, 12 First doped semiconductor layer, 13 Second doped semiconductor layer, 14 Transparent conductive layer, 15 First region, 16 Second region, 17 Third region, 18 Insulating trench, 19 First transparent conductive part, 20 Second transparent conductive part, 21 Continuous region, 22 Discontinuous region, 23 Third transparent conductive part, 24 Notch, 25 First electrode, 26 First interface passivation layer, 27 Second interface passivation layer, 28 Surface passivation layer, 29 Second electrode, 30 Insulating mask layer, 118 Reverse leakage portion, 119 Corner region, 210 First insulating layer, 108 First edge line, 109 Recess, 200 Protrusion, 3 Leakage channel, 4 Isolation part, 103 Anti-reflection layer, 134 Central region, 135 Edge region, 136 Reverse leakage region. Detailed Implementation

[0021] The embodiments of this application will now be described with reference to the accompanying drawings. However, it should be understood that these descriptions are exemplary only and are not intended to limit the scope of this application. Furthermore, descriptions of well-known structures and technologies are omitted in the following description to avoid unnecessarily obscuring the concepts of this application.

[0022] The accompanying drawings illustrate various structural schematics according to embodiments of this application. These drawings are not to scale, and some details have been enlarged for clarity, and some details may have been omitted. The shapes of the various regions and layers shown in the drawings, as well as their relative sizes and positional relationships, are merely exemplary and may deviate from reality due to manufacturing tolerances or technical limitations. Furthermore, those skilled in the art can design regions / layers with different shapes, sizes, and relative positions as needed.

[0023] In the context of this application, when a layer / element is referred to as being "on top of" another layer / element, the layer / element can be directly on top of the other layer / element, or there can be an intermediate layer / element between them. Furthermore, if a layer / element is "on top of" another layer / element in one orientation, then when the orientation is reversed, the layer / element can be "below" the other layer / element. To make the technical problems, technical solutions, and beneficial effects to be solved by this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of this application and are not intended to limit this application.

[0024] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this application, "multiple" means two or more, unless otherwise expressly specified. "Several" means one or more, unless otherwise expressly specified.

[0025] In a first aspect, embodiments of this application provide a back-contact battery. As shown in FIG1, the back-contact battery provided in this application includes: a semiconductor substrate 11, a first doped semiconductor layer 12, a second doped semiconductor layer 13, and a transparent conductive layer 14. The second doped semiconductor layer 13 and the first doped semiconductor layer 12 have opposite conductivity types. The semiconductor substrate 11 includes a first surface and a second surface opposite to each other. The first surface includes a first region 15, a second region 16, and a third region 17 located between the first region 15 and the second region 16. Furthermore, the first region 15, the third region 17, and the second region 16 are arranged along a first direction. The first doped semiconductor layer 12 is disposed in the first region 15 and the third region 17. The second doped semiconductor layer 13 is disposed on the second region 16 and extends to cover the first doped semiconductor layer 12 in the third region 17.

[0026] The aforementioned transparent conductive layer 14 covers the second doped semiconductor layer 13 and the first doped semiconductor layer 12. The transparent conductive layer 14 has insulating grooves 18 to physically insulate the portion of the transparent conductive layer 14 corresponding to the first region 15 from the portion of the transparent conductive layer 14 corresponding to the second region 16. Of course, it is understood that the transparent conductive layer may also only cover the second doped semiconductor layer; that is, no transparent conductive layer may be provided on the first doped semiconductor layer.

[0027] In practical applications, this application does not specifically limit the material and conductivity type of the semiconductor substrate. For example, the semiconductor substrate can be a silicon substrate. Alternatively, the semiconductor substrate can be any semiconductor material such as a germanium-silicon substrate, a germanium substrate, or a gallium arsenide substrate.

[0028] Secondly, the aforementioned semiconductor substrate includes a first surface and a second surface opposite to each other. The first surface of the semiconductor substrate corresponds to the back-light surface of the back contact battery, and the second surface of the semiconductor substrate corresponds to the light-facing surface of the back contact battery. The first surface includes a first region, a second region, and a third region. The distribution of the first, second, and third regions on the first surface can be determined based on the distribution of the first and second doped semiconductor layers formed on one side of the first surface. Specifically, since the first doped semiconductor layer of the back contact battery is disposed in the first and third regions, the distribution range of the first and third regions on the first surface can be determined according to the distribution requirements of the first doped semiconductor layer in the actual application scenario. Since a portion of the second doped semiconductor layer of the back contact battery is disposed on the second region of the first surface, the distribution range of the second region on the first surface can be determined according to the distribution requirements of the second doped semiconductor layer on the semiconductor substrate in the actual application scenario.

[0029] It is understandable that the first region corresponds to the first emitter region, and the second region corresponds to the second emitter region; one of the first region and the second region is a P region and the other is an N region, while the third region is the P-N overlapping region.

[0030] For example, the first and second regions can be distributed in alternating stripes or in alternating interdigitated shapes.

[0031] The arrangement direction (i.e., the first direction) of the first, third, and second regions can be determined based on their distribution on the first surface, and is not specifically limited here. For example, when the first and second regions are arranged in alternating stripes, the first direction is parallel to the arrangement direction of the two adjacent stripes. Another example: when the first and second regions are arranged in alternating interdigitated patterns, the first direction is parallel to the arrangement direction of the two adjacent U-shaped regions.

[0032] In terms of surface morphology, as shown in Figures 1 and 2, the first and second surfaces of the semiconductor substrate 11 can be planar. Alternatively, as shown in Figure 3, the second surface of the semiconductor substrate 11 can also be textured to improve the light-trapping effect of the second surface and increase the light utilization rate of the semiconductor substrate 11. Furthermore, the surface of the second region of the first surface can also be textured to increase the contact area between the second doped semiconductor layer 13 on the second region and the transparent conductive layer 14 on the second region, as well as to increase the contact area between the transparent conductive layer 14 on the second region and the corresponding electrode, thereby reducing transmission loss.

[0033] Regarding the first doped semiconductor layer, in terms of conductivity type, the embodiments of this application do not specifically limit the conductivity type of the first doped semiconductor layer, as long as the conductivity types of the first doped semiconductor layer and the second doped semiconductor layer are opposite. Specifically, the conductivity type of the first doped semiconductor layer can be N-type, in which case the conductivity type of the second doped semiconductor layer is P-type; or, the conductivity type of the first doped semiconductor layer can also be P-type, in which case the conductivity type of the second doped semiconductor layer is N-type.

[0034] In terms of formation location, as shown in Figure 1, the first doped semiconductor layer 12 can be disposed on the first region 15 and the third region 17 of the semiconductor substrate; or, as shown in Figure 2, the first doped semiconductor layer 12 can also be disposed within the first region 15 and the third region 17 of the semiconductor substrate. In this case, it can be formed by diffusion or ion implantation.

[0035] When the first doped semiconductor layer is disposed on the first and third regions of the semiconductor substrate, the material of the first doped semiconductor layer may include any semiconductor material such as silicon, germanium-silicon, germanium, or gallium arsenide. In terms of the arrangement of matter, the crystal phase of the first doped semiconductor layer may be amorphous, microcrystalline, nanocrystalline, single crystal, or polycrystalline.

[0036] In one specific embodiment, at least a portion of the third region 17 is a reverse leakage region. Furthermore, within the reverse leakage region, the portion of the transparent conductive layer 14 extending from the second region 16 into the third region 17 constitutes a first transparent conductive portion 19, which is electrically connected to the first doped semiconductor layer 12 via the second doped semiconductor layer 13. The width of the first transparent conductive portion 19 in the first direction is W1, and the width of the third region 17 in the first direction is W2, with the ratio of W1 to W2 being greater than or equal to 10% and less than or equal to 90%.

[0037] When the above technical solution is adopted, the first and second doped semiconductor layers can effectively shunt carriers when the back contact battery is in operation, which is beneficial for the formation of photocurrent. The transparent conductive layer covering the second and first doped semiconductor layers has high conductivity, which can promptly export the carriers collected by the first and second doped semiconductor layers, reducing the carrier recombination rate. As shown in Figure 1, the second doped semiconductor layer 13 is not only disposed on the second region 16, but also extends to cover the first doped semiconductor layer 12 in the third region 17. Furthermore, at least a portion of the third region 17 is a reverse leakage region. In this reverse leakage region, the portion of the transparent conductive layer 14 extending from the second region 16 into the third region 17 (i.e., the first transparent conductive portion 19) can be electrically connected to the first doped semiconductor layer 12, which has an opposite conductivity type, through the second doped semiconductor layer 13. At this time, the overlapping portion of the first doped semiconductor layer 12 and the second doped semiconductor layer 13 forms a built-in diode structure with a low reverse breakdown voltage. When the back contact battery is blocked, the leakage current (it should be emphasized that, for convenience and clarity, in the embodiments of this application) When discussing the transmission method of leakage current, it encompasses not only the transmission path but also the transmission direction. However, this does not mean that the transmission direction of leakage current can only be the single direction described. When the conductivity type of the first doped semiconductor layer and the second doped semiconductor layer changes, the transmission direction of leakage current can also be opposite to the direction described. That is, in this application embodiment, only the transmission path of leakage current is limited, not the transmission direction. The leakage current is discharged through the overlapping portion of the first doped semiconductor layer 12 and the second doped semiconductor layer 13, then through the first transparent conductive portion 19, and through the electrode in contact with it. It should be noted that in the reverse leakage region, the aforementioned first transparent conductive portion is electrically connected to the first doped semiconductor layer with the opposite conductivity type through the second doped semiconductor layer. This electrical connection method does not include electrical connection through the semiconductor substrate. Secondly, in the back contact battery provided in this application, the insulating groove provided in the transparent conductive layer can physically insulate the portion of the transparent conductive layer corresponding to the first region from the portion of the transparent conductive layer corresponding to the second region. This physical insulation means no contact, to prevent short circuit problems in the back contact battery.

[0038] Furthermore, in the back contact battery provided in this application embodiment, it is unnecessary to provide an insulating layer to separate the first doped semiconductor layer and the second doped semiconductor layer 13 at their overlapping portions. This simplifies the manufacturing process of the back contact battery while effectively utilizing the electrical connection between the two layers in the reverse leakage region to reduce the risk of hot spots. Moreover, along the first direction, the wider the first transparent conductive portion is located in the reverse leakage region, the smaller the transmission resistance of the leakage current within the first transparent conductive portion, resulting in a greater reduction in the reverse breakdown voltage, while the leakage loss of the back contact battery in the forward voltage region may be higher. Conversely, along the first direction, the smaller the width of the first transparent conductive portion is located in the reverse leakage region, the greater the transmission resistance of the leakage current within the first transparent conductive portion, resulting in a smaller reduction in the reverse breakdown voltage, while the leakage loss of the back contact battery in the forward voltage region may be lower. Based on this, in the application of the back contact battery provided in this application, only the width W1 of the first transparent conductive portion 19 in the first direction and the width W2 of the third region 17 in the first direction need to be adjusted to adjust the leakage loss and reverse breakdown voltage. This reduces the risk of hot spots in the back contact battery while ensuring high operating efficiency in the forward voltage region. Furthermore, in actual manufacturing, only minor adjustments to the selective etching pattern used when forming the transparent conductive layer 14 are needed; other manufacturing processes of the back contact battery do not need to be changed. This improves the compatibility of the back contact battery provided in this application with existing manufacturing processes and reduces the manufacturing difficulty of the back contact battery provided in this application.

[0039] Secondly, as shown in Figure 1, the first doped semiconductor layer 12 can be directly disposed on the first region 15 and the third region 17. Alternatively, as shown in Figure 3, the aforementioned back contact battery may further include a first interface passivation layer 26 located between the first doped semiconductor layer 12 and the semiconductor substrate 11. In this case, the passivated contact structure composed of the first interface passivation layer 26 and the first doped semiconductor layer 12 has excellent interface passivation effect and can achieve selective collection of charge carriers, reducing the carrier recombination rate in the first region 15 and the third region 17 of the first surface of the semiconductor substrate 11, and further improving the photoelectric conversion efficiency of the back contact battery. The material and thickness of the first interface passivation layer 26 can be set according to the material of the first doped semiconductor layer 12 and actual needs, and are not specifically limited here. For example, when the material of the first doped semiconductor layer is doped polycrystalline silicon, the first interface passivation layer is a tunneling passivation layer. For example, when the material of the first doped semiconductor layer includes at least one of doped amorphous silicon, doped microcrystalline silicon, and doped nanocrystalline silicon, the first interface passivation layer is an intrinsic amorphous silicon layer, an intrinsic microcrystalline silicon layer, an intrinsic nanocrystalline silicon layer, or a mixture of the above three.

[0040] For example, the thickness of the first doped semiconductor layer can be greater than or equal to 50 nm and less than or equal to 200 nm. For instance, the thickness of the first doped semiconductor layer can be 50 nm, 60 nm, 70 nm, 80 nm, 90 nm, 100 nm, 110 nm, 120 nm, 150 nm, 180 nm, or 200 nm. In this case, the thickness of the first doped semiconductor layer within the above range can prevent a lower field passivation effect due to a smaller layer thickness; it can also prevent a larger amount of consumables used in manufacturing the first doped semiconductor layer due to a larger layer thickness, thus helping to control the manufacturing cost of the back contact battery. Furthermore, the thickness of the first doped semiconductor layer affects the mating height between the side surfaces of the first and second doped semiconductor layers, which in turn affects the junction area of ​​the PN junction formed between the first and second doped semiconductor layers in the reverse leakage region. Based on this, when the thickness of the first doped semiconductor layer is within the above range, it can also prevent the leakage current of the first doped semiconductor layer and the second doped semiconductor layer from being too large due to the large docking height caused by the large thickness of the first doped semiconductor layer. It can also ensure that the leakage loss and reverse breakdown voltage of the back contact battery can be effectively controlled by adjusting the width W1 of the first transparent conductive part in the first direction and the width W2 of the third region in the first direction, so that the back contact battery has high working performance and working reliability.

[0041] For example, the doping concentration of the dopant in the first doped semiconductor layer can be greater than or equal to 1E19 cm⁻¹. -3 And less than or equal to 5E20cm -3 For example, the doping concentration of the dopant in the first doped semiconductor layer can be 1E19cm⁻¹. -3 2E19cm -3 4E19cm -3 6E19cm -3 8E19cm -3 1E20cm -3 3E20cm -3 Or 5E20cm -3In this case, the doping concentration of the dopant in the first doped semiconductor layer is within the aforementioned range. This prevents a low doping concentration of the dopant in the first doped semiconductor layer from causing a low field passivation effect on the semiconductor substrate, ensuring that the first and third regions of the back contact battery have relatively low carrier recombination rates under normal operating conditions. Simultaneously, it also helps to ensure good conductivity of the first doped semiconductor layer, ensuring that the portion of the first doped semiconductor layer in the reverse leakage region has relatively low transmission resistance when the back contact battery is shielded, further reducing the reverse breakdown voltage of the back contact battery. Furthermore, it also prevents a high doping concentration of the dopant in the first doped semiconductor layer from causing a high difficulty in doping the intrinsic semiconductor layer used to manufacture the first doped semiconductor layer, reducing process difficulty and improving the yield of the back contact battery.

[0042] Regarding the second doped semiconductor layer, in terms of materials, it can be any semiconductor material such as silicon, germanium-silicon, germanium, or gallium arsenide. In terms of the arrangement of matter, the crystal phase of the second doped semiconductor layer can be amorphous, microcrystalline, nanocrystalline, single-crystal, or polycrystalline. The specific value of the crystallinity of the second doped semiconductor layer can be determined based on the actual application scenario and is not specifically limited here.

[0043] For example, the crystallinity of the second doped semiconductor layer can be less than or equal to 60%. For instance, the crystallinity of the second doped semiconductor layer can be 0%, 5%, 10%, 20%, 30%, 40%, 50%, or 60%, etc. In this case, it is understood that the crystallinity of the second doped semiconductor layer affects its conductivity, thereby affecting the leakage loss of the back contact battery in the reverse leakage region and the reverse breakdown voltage of the back contact battery when it is blocked. Based on this, when the crystallinity of the second doped semiconductor layer is within the above range, the crystallinity of the second doped semiconductor layer has a large selectable range. At this time, in addition to adjusting the ratio range of W1 and W2 to control the leakage loss and reverse breakdown voltage of the back contact battery, precise control of the leakage loss and reverse breakdown voltage of the back contact battery can also be achieved by adjusting the crystallinity of the second doped semiconductor layer, ensuring that the back contact battery has high operating performance and reliability.

[0044] In terms of conductivity, the conductivity of the second doped semiconductor layer directly affects its own conductivity. The conductivity of the second doped semiconductor layer affects the leakage loss of the back contact battery in the reverse leakage region and the reverse breakdown voltage of the back contact battery when it is blocked. Therefore, the appropriate conductivity between the first electrode 25 and the second doped semiconductor layer 13 can be selected according to the requirements for leakage loss and reverse breakdown voltage in the actual application scenario.

[0045] For example, the conductivity of the second doped semiconductor layer is greater than or equal to 10E-5 S / cm and less than or equal to 1 S / cm. In this case, it can prevent the high conductivity of the second doped semiconductor layer from causing excessive forward leakage loss of the back contact battery; in addition, it can also prevent the low conductivity of the second doped semiconductor layer from causing excessive reverse breakdown voltage of the back contact battery, further facilitating a balance between the reverse breakdown voltage and operating efficiency of the back contact battery.

[0046] In practical applications, the conductivity characteristics of different parts of the second doped semiconductor layer can be the same or different.

[0047] Understandably, when the back contact battery is operating normally, the portion of the second doped semiconductor layer located in the second region needs to collect and drain carriers of the corresponding conductivity type generated within the semiconductor substrate to facilitate the formation of photocurrent. The portion of the second doped semiconductor layer corresponding to the first transparent conductive portion is electrically connected to the first doped semiconductor layer, which has the opposite conductivity type (to reduce the risk of hot spots in the back contact battery). Under normal operating conditions, there will be leakage current between the portion of the second doped semiconductor layer corresponding to the first transparent conductive portion and the first doped semiconductor layer. From the above, it can be seen that different regions of the second doped semiconductor layer have different functions. Furthermore, all other things being equal, the lower the crystallinity of the doped semiconductor layer, the smaller and / or fewer the grains in the doped semiconductor layer, even exhibiting the disorder of an amorphous semiconductor material. The smaller and / or fewer the grains in the doped semiconductor layer, the more interfaces exist between the grains, resulting in a higher resistance at the grain interfaces. It is evident that the degree of crystallization of the second doped semiconductor layer in different regions affects its conductivity. Therefore, the conductivity and degree of crystallization of different parts of the second doped semiconductor layer can be determined based on the role of the second doped semiconductor layer in different regions in the actual application scenario, as well as the requirements for the conversion efficiency and hot spot risk of the back contact battery.

[0048] For example, the degree of crystallization of at least a portion of the second doped semiconductor layer located in the second region may be greater than the degree of crystallization of the portion of the second doped semiconductor layer corresponding to the first transparent conductive portion.

[0049] It should be noted that, in the embodiments of this application, "greater degree of crystallization" can refer to a higher crystallinity, larger grain size, and / or a greater number of grains. For example, when the second doped semiconductor layer is a nanocrystalline silicon layer (which generally may still contain some amorphous silicon, which is unavoidable, and the content of amorphous silicon is relatively small, as is known in the art), at least a portion of the second doped semiconductor layer located in the second region has a greater degree of crystallization, and this portion has a greater crystallinity and grain size than the portion of the second doped semiconductor layer corresponding to the first transparent conductive portion. As another example, when the second doped semiconductor layer is an amorphous silicon layer (which may contain a small amount of nanocrystalline silicon, but the content of this nanocrystalline silicon is very small, for example, less than 5%, as is known in the art), at least a portion of the second doped semiconductor layer located in the second region will generate lattice-ordered grains, thus increasing its degree of crystallization. The portion of the second doped semiconductor layer corresponding to the first transparent conductive portion has a smaller degree of crystallization; in this case, the portion with a smaller degree of crystallization is still amorphous silicon material and has not been treated with lasers or other methods to generate grains. In this case, the conductivity of at least a portion of the second doped semiconductor layer in the second region will be higher, which helps to reduce the transmission loss of at least a portion of the second doped semiconductor layer in the second region and reduce the contact resistance between at least a portion of the second doped semiconductor layer in the second region and the transparent conductive layer. Meanwhile, the crystallinity of the portion of the second doped semiconductor layer corresponding to the first transparent conductive portion is lower, resulting in relatively lower conductivity. This helps to reduce the magnitude of the forward leakage current between the portion of the second doped semiconductor layer corresponding to the first transparent conductive portion and the first doped semiconductor layer, further improving the conversion efficiency of the back contact battery.

[0050] In terms of scope, the degree of crystallization of the second doped semiconductor layer can be relatively high only in a localized area of ​​the second region, or it can be high in all parts of the second region. The extent of the high-crystallization portion of the second doped semiconductor layer can be determined based on the method used in the actual manufacturing process to achieve different crystallization levels in different regions of the second doped semiconductor layer, as well as the actual manufacturing precision; no specific limitation is made here.

[0051] Secondly, the degree of crystallization of at least a portion of the second doped semiconductor layer located in the second region may be greater than the degree of crystallization of the portion of the second doped semiconductor layer corresponding to the first transparent conductive portion. Alternatively, the degree of crystallization of at least a portion of the second doped semiconductor layer located in the second region may be greater than the degree of crystallization of the portion of the second doped semiconductor layer located in the third region. Furthermore, the degree of crystallization of at least a portion of the second doped semiconductor layer located in the second region may be greater than not only the degree of crystallization of the portion of the second doped semiconductor layer corresponding to the first transparent conductive portion, but also greater than the degree of crystallization of the portion of the second doped semiconductor layer covering the sidewall located at the boundary between the third and second regions; in this case, it can be understood that, compared to the portion corresponding to the second region, the portion of the second doped semiconductor layer located on the sidewall at the boundary between the third and second regions is closer to the second region. Based on this, when the crystallization degree of the portion of the second doped semiconductor layer covering the sidewall at the junction of the third region and the second region is relatively small, it is beneficial to prevent the portion of the second doped semiconductor layer corresponding to the first transparent conductive portion from being affected during the actual manufacturing process when at least a portion of the second doped semiconductor layer corresponding to the second region is crystallized by means of laser processing, etc. This ensures that the portion of the second doped semiconductor layer corresponding to the first transparent conductive portion has a relatively small conductivity, effectively controlling the magnitude of the forward leakage current between the portion of the second doped semiconductor layer corresponding to the first transparent conductive portion and the first doped semiconductor layer.

[0052] Furthermore, it is understood that the greater the degree of crystallinity of at least a portion of the second doped semiconductor layer located in the second region, the greater the conductivity of that portion. Conversely, the smaller the degree of crystallinity of the portion of the second doped semiconductor layer corresponding to the first transparent conductive portion, the lower the conductivity of that portion. In this case, the conversion efficiency of the back contact battery is higher, but the reduction in hot spot risk is also affected. Therefore, the degree of crystallinity of at least a portion of the second doped semiconductor layer located in the second region can be determined based on the requirements for conversion efficiency and hot spot risk of the back contact battery in the actual application scenario. The difference between the degree of crystallinity of the portion of the second doped semiconductor layer corresponding to the first transparent conductive portion is not specifically limited here.

[0053] For example, the difference between the crystallinity of at least a portion of the second doped semiconductor layer located in the second region and the crystallinity of the portion of the second doped semiconductor layer corresponding to the first transparent conductive portion can be greater than or equal to 40% and less than or equal to 80%. For instance, the difference between the crystallinity of at least a portion of the second doped semiconductor layer located in the second region and the crystallinity of the portion of the second doped semiconductor layer corresponding to the first transparent conductive portion can be 40%, 42%, 45%, 50%, 55%, 60%, 65%, 70%, 75%, or 80%, etc. In this case, the difference being within the above range helps to prevent a small difference from resulting in a small degree of crystallinity in at least a portion of the second doped semiconductor layer located in the second region, leading to poor carrier collection efficiency in that portion, and / or a high degree of crystallinity in the portion of the second doped semiconductor layer corresponding to the first transparent conductive portion, leading to a large forward leakage current in that portion, thus ensuring high conversion efficiency of the back contact battery. In addition, it can also prevent the high risk of hot spots in the back contact battery due to the large difference causing the crystallization degree of the second doped semiconductor layer corresponding to the first transparent conductive part to be small, thus ensuring that the back contact battery has a high resistance to burn-out.

[0054] In practical applications, the aforementioned second doped semiconductor layer may also include a high-crystallinity region and a low-crystallinity region; the degree of crystallinity of the portion of the second doped semiconductor layer located in the low-crystallinity region is less than the degree of crystallinity of the portion located in the high-crystallinity region. Based on this, in the second doped semiconductor layer, at least the portion corresponding to the first transparent conductive portion is located in the low-crystallinity region, and at least a portion corresponding to the second region is located in the high-crystallinity region. The beneficial effect in this case is similar to the beneficial effect described above where the degree of crystallinity of at least a portion of the second doped semiconductor layer located in the second region is greater than the degree of crystallinity of the portion of the second doped semiconductor layer corresponding to the first transparent conductive portion, and will not be repeated here.

[0055] In terms of scope, the range of the high crystallinity region and the low crystallinity region in the second doped semiconductor layer can be determined based on the method used in the actual manufacturing process to make different regions of the second doped semiconductor layer have different crystallinity levels, as well as the actual manufacturing precision. No specific limitation is made here.

[0056] Specifically, the aforementioned low-crystallinity region can be located within the third region. In this case, the low-crystallinity region of the second doped semiconductor layer can correspond only to the portion of the second doped semiconductor layer corresponding to the first transparent conductive portion; or the low-crystallinity region can correspond to the entire third region. The high-crystallinity region of the second doped semiconductor layer can correspond only to the portion of the second doped semiconductor layer located within a localized area of ​​the second region; or the aforementioned high-crystallinity region can also correspond to the entire second region; or the aforementioned high-crystallinity region can correspond not only to at least the portion of itself located in the second region, but also to the portion of the second doped semiconductor layer located on the sidewall at the boundary between the second and third regions.

[0057] Alternatively, along the first direction, one edge of the aforementioned low-crystallinity region lies within the third region, and the other edge extends to a sidewall located at the boundary between the third and second regions. In this case, the high-crystallinity region of the second doped semiconductor layer can correspond to at least a local portion of the second doped semiconductor layer located within the second region.

[0058] Alternatively, along the first direction, one edge of the aforementioned low crystallinity region lies within the third region, while the other edge extends into the second region. In this case, the portion of the second doped semiconductor layer located in the high crystallinity region corresponds only to the portion of the second doped semiconductor layer located within a localized area of ​​the second region.

[0059] When the above technical solution is adopted, since at least a portion of the third region is a reverse leakage region, when the aforementioned low crystallinity region is located in the third region, it can be ensured that the conductivity of the portion of the second doped semiconductor layer located in the reverse leakage region is relatively small. This effectively controls the magnitude of the forward leakage current between the second doped semiconductor layer and the first doped semiconductor layer in the reverse leakage region, which is beneficial to improving the conversion efficiency of the back contact battery. Furthermore, when, along the first direction, one edge of the aforementioned low crystallinity region is located within the third region and the other edge extends to the sidewall at the junction of the third and second regions, or when, along the first direction, one edge of the aforementioned low crystallinity region is located within the third region and the other edge extends to the second region, it is beneficial to prevent the aforementioned operations from affecting the portion of the second doped semiconductor layer located in the third region while simultaneously ensuring that at least a portion of the second doped semiconductor layer corresponding to the second region is located within the high crystallinity region through laser processing or other methods. This ensures that the portion of the second doped semiconductor layer located in the third region has a low conductivity while reducing the requirements for processing precision. Furthermore, when the high crystallinity region corresponds to the entire second region, the portion of the second doped semiconductor layer corresponding to the entire second region exhibits relatively high conductivity, resulting in high carrier collection efficiency and improved operating efficiency of the back contact battery. Additionally, the division between the low and high crystallinity regions in the second doped semiconductor layer can be varied, which helps reduce manufacturing complexity and enhances the applicability of the back contact battery provided in this application embodiment to different application scenarios.

[0060] The difference in crystallinity between the low-crystallinity and high-crystallinity regions in the second doped semiconductor layer can be determined based on the requirements for conversion efficiency and hot spot risk of the back contact battery in the actual application scenario. Specifically, the difference between the crystallinity of at least a portion of the second doped semiconductor layer located in the second region and the crystallinity of the portion of the second doped semiconductor layer corresponding to the first transparent conductive portion can be referred to above, and will not be elaborated here.

[0061] In terms of doping, the embodiments of this application do not specifically limit the doping concentration of the dopant in the second doped semiconductor layer, as long as it can be applied to the back contact battery provided in the embodiments of this application.

[0062] For example, the doping concentration of the dopant in the second doped semiconductor layer can be greater than or equal to 1E19 cm⁻¹. -3 And less than or equal to 5E20cm -3 For example, the doping concentration of the dopant in the second doped semiconductor layer can be 1E19cm⁻¹. -3 2E19cm -3 4E19cm -3 6E19cm -3 8E19cm -3 1E20cm -3 3E20cm -3 Or 5E20cm -3 In this case, the doping concentration of the dopant in the second doped semiconductor layer is within the aforementioned range. This prevents a low doping concentration in the second doped semiconductor layer from causing a low field passivation effect on the semiconductor substrate, ensuring that the second region of the back contact battery has a relatively low carrier recombination rate under normal operating conditions. Simultaneously, it also facilitates good conductivity in the second doped semiconductor layer, ensuring a relatively low transmission resistance in the reverse leakage region when the back contact battery is shielded, further reducing the reverse breakdown voltage of the back contact battery. Furthermore, it prevents a high doping concentration in the second doped semiconductor layer from making the intrinsic semiconductor layer used to manufacture the second doped semiconductor layer more difficult to dope, thus improving the yield of the back contact battery.

[0063] Regarding the layer thickness, this application does not specifically limit the thickness of the second doped semiconductor layer. For example, the thickness of the second doped semiconductor layer can be greater than or equal to 5 nm and less than or equal to 50 nm. For instance, the thickness of the second doped semiconductor layer can be 5 nm, 10 nm, 15 nm, 20 nm, 30 nm, 40 nm, or 50 nm, etc. The application principle of the beneficial effects in this case is similar to the application principle of the beneficial effects of the first doped semiconductor layer having a thickness greater than or equal to 50 nm and less than or equal to 200 nm as described above, and will not be repeated here.

[0064] In terms of formation location, as shown in Figures 1 and 2, the second doped semiconductor layer 13 can be directly disposed on the first doped semiconductor layer 12 in the second region 16 and extending to cover the third region 17. Alternatively, as shown in Figure 3, the back contact battery may further include a second interface passivation layer 27, which is located between the second region 16 and the second doped semiconductor layer 13 on the first surface and extends between the second doped semiconductor layer and the first doped semiconductor layer. In this case, the passivated contact structure formed by the second interface passivation layer 27 and the portion of the second doped semiconductor layer 13 located on the second region 16 can achieve selective collection of charge carriers and reduce the carrier recombination rate in the second region 16 of the first surface of the semiconductor substrate 11. The material and thickness of the second interface passivation layer 27 can be set according to the material of the second doped semiconductor layer 13 and actual needs, and are not specifically limited here. For example, when the material of the second doped semiconductor layer is doped polycrystalline silicon, the second interface passivation layer is a tunneling passivation layer. For example, when the material of the second doped semiconductor layer includes doped amorphous silicon, doped microcrystalline silicon, and doped nanocrystalline silicon, the second interface passivation layer is an intrinsic amorphous silicon layer, an intrinsic microcrystalline silicon layer, an intrinsic nanocrystalline silicon layer, or a mixture of the above three.

[0065] As for the thickness of the second interface passivation layer, since the thickness of the second interface passivation layer will affect its own transmission resistance and passivation effect, and thus affect the forward leakage loss and reverse breakdown voltage of the back contact battery, the thickness of the second interface passivation layer can be determined according to the requirements of the forward leakage loss and reverse breakdown voltage of the back contact battery in the actual application scenario. No specific limit is made here.

[0066] For example, the thickness of the second interface passivation layer can be greater than or equal to 2 nm and less than or equal to 20 nm. For instance, the thickness of the second interface passivation layer can be 2 nm, 5 nm, 8 nm, 10 nm, 12 nm, 15 nm, 18 nm, or 20 nm, etc. In this case, based on this, the thickness of the second interface passivation layer within the above range helps to prevent a poor passivation effect on the second region due to a small thickness of the second interface passivation layer, ensuring a low carrier recombination rate on the surface of the second region. It also prevents a large thickness of the second interface passivation layer from causing a large transmission resistance, which would lead to low carrier collection efficiency of the second doped semiconductor layer under normal operation of the back contact battery, and a smaller reduction in reverse breakdown voltage when the back contact battery is blocked, further facilitating a balance between the reverse breakdown voltage and operating efficiency of the back contact battery.

[0067] Furthermore, the doping concentration of the dopant within the second doped semiconductor layer affects its conductivity. Specifically, within a certain range, the higher the doping concentration of the dopant within the second doped semiconductor layer, the higher its conductivity; conversely, the lower the doping concentration, the lower its conductivity. Regarding the aforementioned second interface passivation layer, as mentioned earlier, its thickness is related to its passivation effect and transmission resistance. When the thickness of the second interface passivation layer is small, the leakage current between the first and second doped semiconductor layers is larger in the reverse leakage region. Conversely, the greater the thickness of the second interface passivation layer, the lower the leakage loss in the forward voltage region of the back contact battery, but the greater the transmission resistance. Based on this, the thickness of the second interface passivation layer can be determined according to the range of dopant concentration within the second doped semiconductor layer in the actual application scenario.

[0068] For example, when the doping concentration of the dopant in the second doped semiconductor layer is greater than or equal to 1E19cm -3 And less than or equal to 5E19cm -3 In this case, the thickness of the second interface passivation layer can be greater than or equal to 5 nm and less than or equal to 15 nm. For example, when the doping concentration of the dopant in the second doped semiconductor layer is greater than or equal to 1E19 cm⁻¹ - 3 And less than or equal to 5E19cm -3 In this case, the thickness of the passivation layer at the second interface can be 5nm, 8nm, 10nm, 12nm, 14nm, or 15nm, etc.

[0069] Alternatively, when the doping concentration of the dopant in the second doped semiconductor layer is greater than 5E19cm -3 And less than or equal to 1E20cm -3 In this case, the thickness of the second interface passivation layer can be greater than or equal to 6 nm and less than or equal to 17 nm. For example, when the doping concentration of the dopant in the second doped semiconductor layer is greater than 5E19cm⁻¹ -3 And less than or equal to 1E20cm -3 In this case, the thickness of the passivation layer at the second interface can be 6nm, 8nm, 9nm, 10nm, 11nm, 12nm, 13nm, 14nm, 15nm, 16nm or 17nm, etc.

[0070] Alternatively, when the doping concentration of the dopant in the second doped semiconductor layer is greater than 1E20cm⁻¹ -3 And less than or equal to 5E20cm -3 In this case, the thickness of the second interface passivation layer can be greater than or equal to 7 nm and less than or equal to 20 nm. For example, when the doping concentration of the dopant in the second doped semiconductor layer is greater than 1E20cm⁻¹. -3And less than or equal to 5E20cm -3 In this case, the thickness of the passivation layer at the second interface can be 7nm, 10nm, 11nm, 12nm, 13nm, 14nm, 16nm, 18nm, or 20nm, etc.

[0071] It is worth noting that the back contact battery provided in this application embodiment has a second interface passivation layer with a corresponding thickness according to the different doping concentrations of the dopant in the second doped semiconductor layer, so as to achieve reasonable control of the working efficiency and reverse breakdown voltage of the back contact battery, and ensure that the back contact battery has high working performance and working reliability.

[0072] In addition, when the back contact battery includes a first interface passivation layer and a second interface passivation layer, the first interface passivation layer and the first doped semiconductor layer constitute a first passivation contact structure, and the second interface passivation layer and the second doped semiconductor layer constitute a second passivation contact structure.

[0073] The passivation contact types of the first passivation contact structure and the second passivation contact structure can be the same. For example, both the first passivation contact structure and the second passivation contact structure can be tunneling passivation contact structures or heterogeneous contact structures. Alternatively, the passivation contact types of the first passivation contact structure and the second passivation contact structure can be different. For example, one of the first passivation contact structure and the second passivation contact structure can be a tunneling passivation contact structure, and the other can be a heterogeneous contact structure. In this case, when the passivation contact types of the first passivation contact structure and the second passivation contact structure are different, the passivation contact types of the first passivation contact structure and the second passivation contact structure can be adjusted according to different actual application scenario requirements to improve the applicability of the back contact battery provided in this application embodiment under different application scenarios.

[0074] Secondly, the thermal stability of the first passivation contact structure can be greater than that of the second passivation contact structure. In this case, during the actual manufacturing process, after forming the first passivation contact structure in the first and third regions, and then forming the entire layer of the second passivation contact structure, a laser processing technique is typically used to pattern the entire layer of mask material, forming a mask layer for selective etching of the second passivation contact structure. To process all portions of the mask material corresponding to the first region, the heat from the laser radiation will be conducted to the first passivation contact structure. Because the laser has a high heat output, when the first passivation contact structure has high thermal stability, the impact of laser radiation heat on the first passivation contact structure can be reduced, or even eliminated altogether, thus improving the yield of the back contact battery. The portion of the second passivated contact structure corresponding to the first region needs to be removed, and the laser processing technology has high precision. Therefore, the portion of the second passivated contact structure corresponding to the third and second regions will not be affected by heat, or will be less affected by heat. In this case, the manufacturing process has lower requirements for the thermal stability of the second passivated contact structure, and the thermal stability of the second passivated contact structure can be set to be lower than that of the first passivated contact structure.

[0075] Of course, the first passivation contact structure and the second passivation contact structure can also have roughly the same thermal stability. Alternatively, in the actual manufacturing process, if laser processing is not used to pattern the mask material, but other low-temperature processes are used to selectively etch the mask material and the second passivation contact structure, then the first passivation contact structure can also have relatively low thermal stability.

[0076] As for the specific types of the first passivation contact structure and the second passivation contact structure, they can be determined according to actual needs, and no specific limitations are made here.

[0077] For example, the first passivation contact structure can be a tunneling passivation contact structure. In this case, since amorphous silicon materials easily form polycrystalline silicon or monocrystalline silicon at high temperatures, and the chemical properties of tunneling passivation materials and polycrystalline silicon are relatively stable at high temperatures, the tunneling passivation contact structure is less sensitive to high-temperature laser thermal damage compared to heterogeneous contact structures. This reduces the impact on the passivation effect during laser processing, further increasing the process window and reducing the process difficulty. Furthermore, in actual manufacturing, the manufacturing cost of heterogeneous contact structures is higher than that of tunneling passivation contact structures. Moreover, tunneling passivation contact structures can be implemented using various processes such as low-pressure chemical vapor deposition, plasma chemical vapor deposition, physical chemical vapor deposition, or plasma-enhanced atomic layer deposition, making them more compatible with back contact battery processes. Heterogeneous contact structures, on the other hand, require plate-type plasma chemical vapor deposition equipment that supports lower formation temperatures. Therefore, when the first passivation contact structure is a tunneling passivation contact structure, it helps to reduce manufacturing costs, lower the investment in plate-type plasma chemical vapor deposition equipment, and save production space.

[0078] For example, the second passivation contact structure can be a heterogeneous contact structure. In this case, the heterogeneous contact structure has a better passivation effect than the tunneling passivation contact structure. Therefore, when the second passivation contact structure is a heterogeneous contact structure, the carrier recombination rate at the interface between the semiconductor substrate and the second interface passivation layer can be further reduced, which is beneficial to improving the photoelectric conversion efficiency of the back contact cell. Specifically, the material of the intrinsic semiconductor passivation layer in the heterogeneous contact structure can include at least one of intrinsic amorphous silicon, intrinsic microcrystalline silicon, and intrinsic nanocrystalline silicon. The material of the doped semiconductor layer in the heterogeneous contact structure can include at least one of doped amorphous silicon, doped microcrystalline silicon, and doped nanocrystalline silicon.

[0079] It should be noted that the materials of passivation contact structures of different passivation contact types are different, and the conductivity characteristics of doped semiconductor materials of different conductivity types are different. Therefore, the conductivity type of the first passivation contact structure and the second passivation contact structure can be determined based on the passivation contact type of the first passivation contact structure and the second passivation contact structure.

[0080] Preferably, when the first passivation contact structure is a tunneling passivation contact structure and the second passivation contact structure is a heterogeneous contact structure, the conductivity type of the first passivation contact structure is N-type and the conductivity type of the second passivation contact structure is P-type. In this case, compared with P-type doped amorphous silicon or P-type doped microcrystalline silicon materials, P-type doped polycrystalline silicon materials have higher contact resistance with the electrode and poorer field passivation effect. Therefore, when the conductivity type of the tunneling passivation contact structure is set to N-type and the conductivity type of the heterogeneous contact structure is set to P-type, the field passivation effect of the first tunneling passivation contact structure can be further improved, while the contact resistance between the first tunneling passivation contact structure and the electrode can be reduced, which is beneficial to improving the electrical performance of the back contact battery.

[0081] Regarding the aforementioned transparent conductive layer, this application embodiment does not specifically limit the material and thickness of the transparent conductive layer. For example, the material of the transparent conductive layer may include at least one selected from fluorine-doped tin oxide, aluminum-doped zinc oxide, tin-doped indium oxide, tungsten-doped indium oxide, molybdenum-doped indium oxide, cerium-doped indium oxide, and indium hydroxide.

[0082] For example, the thickness of the transparent conductive layer can be greater than or equal to 10 nm and less than or equal to 100 nm.

[0083] As for the insulating groove within the transparent conductive layer, this groove is used to physically insulate the portion of the transparent conductive layer corresponding to the first region from the portion corresponding to the second region. Specifically, since the portion of the transparent conductive layer corresponding to the first region is ohmically connected to the second electrode, and the portion corresponding to the second region is ohmically connected to the first electrode, these two portions of the transparent conductive layer cannot be directly electrically connected; that is, they must be physically insulated, i.e., not in contact. Based on this, it can be understood that, to prevent short circuits, both ends of the insulating groove can be located within the third region, or one end along the first direction can be located outside the third region (of course, it is understood that this excludes the reverse leakage region, because in the reverse leakage region, the transparent conductive layer must extend from the second region into the third region).

[0084] Additionally, as shown in Figures 1 to 3, the insulating trench 18 may penetrate only the transparent conductive layer 14. Alternatively, as shown in Figure 4, when the second doped semiconductor layer 13 has a relatively low resistivity (e.g., the resistivity of the second doped semiconductor layer 13 is less than or equal to 0.01 Ω·cm, specifically, if the second doped semiconductor layer 13 is a doped polycrystalline silicon layer and / or a doped monocrystalline silicon layer), the insulating trench 18 needs to penetrate not only the transparent conductive layer 14 but also at least the second doped semiconductor layer 13 to prevent short circuits caused by the portion of the transparent conductive layer 14 corresponding to the first region 15 and the second region 16 being electrically connected through the second doped semiconductor layer 13 continuously disposed in the third region 17. If the second interface passivation layer is present, generally, the second interface passivation layer does not need to be disconnected at the insulating trench; however, in some processes, the second doped semiconductor layer 13 and the second interface passivation layer can be disconnected together in the same process step.

[0085] As for the width of the insulating groove along the first direction, its range not only affects the electrical insulation effect between the portions of the transparent conductive layer corresponding to the first and second regions, but also affects the width of the first transparent conductive portion jointly disposed on the third region along the first direction, thereby affecting the leakage loss and reverse breakdown voltage of the back contact battery. Therefore, it can be set according to actual needs, as long as the ratio of the width W1 of the first transparent conductive portion in the first direction to the width W2 of the third region in the first direction is greater than or equal to 10% and less than or equal to 90%.

[0086] Specifically, the ratio of the width W1 of the first transparent conductive portion in the first direction to the width W2 of the third region in the first direction can be any value greater than or equal to 10% and less than or equal to 90%. For example, the ratio of W1 to W2 can be 10%, 20%, 30%, 40%, 50%, 60%, 70%, 80%, or 90%, etc.

[0087] Secondly, the cross-sectional area of ​​the insulating trench can be the same in different regions along the thickness direction of the semiconductor substrate. Alternatively, the cross-sectional area of ​​the insulating trench can gradually decrease towards the semiconductor substrate. Specifically, when the cross-sectional area of ​​the insulating trench gradually decreases towards the semiconductor substrate, it can decrease linearly, parabolically, or in other ways. With this configuration, the cross-sectional area at the bottom of the insulating trench is smaller than the cross-sectional area at the opening of the insulating trench. In this case, the thickness of the transparent conductive layer near the end of the insulating trench gradually increases away from the insulating trench. Based on this, especially for the reverse leakage region, the leakage current flows from the edge of the transparent conductive layer to the corresponding electrode. The leakage current density at the edge of the transparent conductive layer is relatively low, while almost all the leakage current in the portion of the transparent conductive layer away from its edge passes through this area, resulting in a higher leakage current density in this portion. In the above case, when the thickness of the transparent conductive layer near the end of the insulating trench gradually increases away from the insulating trench, the larger thickness in the portion of the transparent conductive layer away from its edge is more conducive to leakage current transmission and helps to further reduce the risk of hot spots on the back contact battery.

[0088] Furthermore, in the transparent conductive layer, the thickness of each region along the first direction in which the orthographic projection on the first surface does not overlap with the orthographic projection of the insulating groove on the first surface can be the same. In this case, it is advantageous for each region along the first direction in the transparent conductive layer, away from its own edge, to have a larger thickness. This not only facilitates the transmission of leakage current when the back contact battery is blocked, but also facilitates the discharge of photocurrent generated by the back contact battery in the forward voltage region, further improving the working performance of the back contact battery and reducing the risk of hot spots.

[0089] Alternatively, in the transparent conductive layer, the thickness of each region along the first direction in which the orthographic projection on the first surface does not overlap with the orthographic projection of the insulating trench on the first surface can also be different. For example, when the conductivity of the first doped semiconductor layer and the second doped semiconductor layer is different, the thickness of the transparent conductive layer disposed on the one with poor conductivity between the first doped semiconductor layer and the second doped semiconductor layer can be greater than the thickness of itself disposed on the other.

[0090] Secondly, as shown in Figures 1 to 4, the portion of the transparent conductive layer 14 extending from the first region 15 into the third region 17 is defined as the second transparent conductive portion 20. It is understood that, due to the spacing effect of the insulating trench 18, leakage current will only pass through the first doped semiconductor layer 12 in the reverse leakage region and be conducted through the second doped semiconductor layer 13 to the first transparent conductive portion 19, which has a conductivity type opposite to that of the first doped semiconductor layer 12. Therefore, the presence of the second transparent conductive portion 20 has a low or even no effect on the reverse breakdown voltage. However, the first transparent conductive portion 19, the second transparent conductive portion 20, and the insulating trench 18 are all disposed in the third region 17. To separate the portions of the transparent conductive layer 14 corresponding to the first region 15 and the second region 16, the width of the insulating trench 18 in the first direction needs to be greater than or equal to the minimum spacing for leakage prevention. Based on this, the width of the second transparent conductive portion 20 along the first direction indirectly affects the leakage loss and reverse breakdown voltage of the back contact battery. Therefore, the width of the second transparent conductive portion 20 along the first direction can be set according to actual needs, and no specific limitation is made here.

[0091] For example, the width of the second transparent conductive portion in the first direction is W3, and the ratio of W3 to W2 can be less than or equal to 80%. For instance, the width of the second transparent conductive portion in the first direction is W3, and the ratio of W3 to W2 can be 0, 10%, 20%, 30%, 40%, 50%, 60%, 70%, or 80%, etc. In this case, the width of the second transparent conductive portion in the first direction is W3, and the ratio of W3 to W2 has a wide range of selectable values. By adjusting the width of the second transparent conductive portion in the first direction, the width of the first transparent conductive portion in the first direction can be indirectly adjusted, further facilitating a balance between the reverse breakdown voltage and operating efficiency corresponding to the back contact battery.

[0092] In practical applications, embodiments of this application can adjust the contact area between the first transparent conductive part and the second doped semiconductor layer by adjusting the ratio of the width W1 of the first transparent conductive part in the first direction to the width W2 of the third region in the first direction. This adjustment, in turn, controls the forward leakage loss and reverse breakdown voltage of the back contact battery. The size of the contact area between the first transparent conductive part and the second doped semiconductor layer is related not only to the width W1 of the first transparent conductive part in the first direction but also to the distribution of the reverse leakage region along the second direction.

[0093] Specifically, as shown in Figure 5, the aforementioned reverse leakage region can be continuously distributed along the second direction, and the second direction intersects with the first direction. In this case, the extension length of the first transparent conductive part 19 along the second direction is fixed, and the contact area between the first transparent conductive part 19 and the second doped semiconductor layer is related to W1. Secondly, the portion of the transparent conductive layer extending from the second region into the third region (i.e., the first transparent conductive part 19) can be continuously distributed along the second direction, making the pattern of selective etching (only the pattern corresponding to the groove opening of the insulating trench) of the transparent conductive material (used to manufacture the aforementioned transparent conductive layer) disposed on the entire first and second doped semiconductor layers simpler, which helps to reduce the difficulty of patterning the back contact battery. At the same time, when the reverse leakage region is continuously distributed along the second direction, the leakage path between the first and second doped semiconductor layers is more uniformly distributed, which helps to evenly distribute the heat generated when the back contact battery is shielded throughout the entire battery area, further improving the back contact battery's resistance to burn-out. It should be noted that the aforementioned second direction can be any direction parallel to the first surface and different from the first direction. Preferably, the second direction is orthogonal to the first direction.

[0094] Alternatively, as shown in Figure 6, the aforementioned reverse leakage regions can also be discontinuously distributed along the second direction, and the second direction intersects with the first direction. Furthermore, along the second direction, the first transparent conductive portion 19 has a continuous region 21 and a discontinuous region 22. That is, the continuous region of the first transparent conductive portion 19 is the reverse leakage region, and the discontinuous region is the region between two adjacent reverse leakage regions; in this case, another implementation method for the distribution of the first transparent conductive portion 19 along the second direction is provided. In this case, the contact area between the first transparent conductive portion 19 and the second doped semiconductor layer is not only related to W1, but also to the length of the continuous region 21 and the discontinuous region 22 of the first transparent conductive portion 19 along the second direction. Based on this, not only can the reverse breakdown voltage and forward leakage loss of the back contact battery be controlled by adjusting the width of the first transparent conductive portion 19 along the first direction, but also the reverse breakdown voltage and forward leakage loss of the back contact battery can be controlled by adjusting the length of the continuous region 21 and the discontinuous region 22 of the first transparent conductive portion 19 along the second direction, thereby improving the applicability of the back contact battery provided in this application embodiment in different application scenarios. It should be noted that the aforementioned second direction can be any direction parallel to the first surface and different from the first direction. Preferably, the second direction is orthogonal to the first direction.

[0095] Under the above conditions, the ratio of W1 and W2, which affect the contact area between the first transparent conductive part and the second doped semiconductor layer, as well as the distribution of the reverse leakage region along the second direction, can be comprehensively adjusted according to actual needs to achieve precise control of the forward leakage loss and reverse breakdown voltage of the back contact battery in actual application scenarios.

[0096] For example, when the reverse leakage region is continuously distributed along the second direction, the ratio of W1 to W2 can be greater than or equal to 10% and less than or equal to 70%. In this case, it is advantageous to prevent a small reduction in reverse breakdown voltage due to a small contact area between the first transparent conductive part and the second doped semiconductor layer caused by a small ratio of W1 to W2; in addition, it is also advantageous to prevent a large contact area between the first transparent conductive part and the second doped semiconductor layer caused by a large ratio of W1 to W2 caused by a large forward leakage loss, which further facilitates a balance between the reverse breakdown voltage and operating efficiency of the back contact battery.

[0097] For example, when the reverse leakage region is discontinuously distributed along the second direction, the ratio of the length of the discontinuous region to the length of the continuous region along the second direction can be less than or equal to 90%. For instance, the ratio can be 1%, 10%, 20%, 30%, 40%, 50%, 60%, 70%, 80%, or 90%, etc. In this case, when the back contact battery provided in this embodiment is installed in an environment with few obstructions such as bird droppings, leaves, or sand, the ratio of the length of the discontinuous region to the length of the continuous region can be set within a larger range to increase the proportion of the discontinuous region in the reverse leakage region. This helps to reduce the leakage loss of the back contact battery in the forward voltage region, ensuring that the back contact battery has high operating efficiency. When the back contact battery provided in this embodiment is installed in an environment with many obstructions such as bird droppings, leaves, or sand, the ratio of the length of the discontinuous section to the length of the continuous section can be set within a smaller range to increase the proportion of the continuous section in the reverse leakage area. This helps to reduce the reverse breakdown voltage of the back contact battery and ensures that the back contact battery has a lower risk of hot spots. Therefore, when the ratio of the length of the discontinuous section to the length of the continuous section along the second direction is less than or equal to 90%, the lengths of the discontinuous and continuous sections can be set according to different environmental requirements, improving the applicability of the back contact battery provided in this embodiment in different practical application scenarios.

[0098] For example, when the reverse leakage region is discontinuously distributed along the second direction, the ratio of W1 to W2 is greater than or equal to 20% and less than or equal to 90%. This setting can improve the applicability of the back contact battery provided in this application in different practical application scenarios. Specifically, the application principle of the beneficial effect in this case is similar to the application principle of the beneficial effect when the ratio of W1 to W2 is greater than or equal to 10% and less than or equal to 70% when the reverse leakage region is continuously distributed along the second direction, as described above, and will not be repeated here.

[0099] For example, when the reverse leakage region is discontinuously distributed along the second direction, the ratio of the width of the continuous region to the length of the continuous region is greater than or equal to 1:500 and less than or equal to 5:1. This setting can improve the applicability of the back contact battery provided in this application in different practical application scenarios. Specifically, the application principle of the beneficial effect in this case is similar to the application principle of the beneficial effect when the ratio of W1 to W2 is greater than or equal to 10% and less than or equal to 70% in the case of continuous distribution of the reverse leakage region along the second direction, as described above, and will not be repeated here.

[0100] Secondly, in practical applications, as shown in Figures 5 to 7, the portion of the transparent conductive layer disposed in the second region is defined as the third transparent conductive portion 23. Based on this, when the reverse leakage region is discontinuously distributed along the second direction, as shown in Figure 6, the third transparent conductive portion 23 can completely cover the portion of the second doped semiconductor layer corresponding to the second region. Alternatively, as shown in Figure 7, the portion of the third transparent conductive portion 23 corresponding to the discontinuity region 22 can also have a notch 24. In this case, the second doped semiconductor layer is not only disposed on the second region but also extends to cover the first doped semiconductor layer on the third region. At this time, the second doped semiconductor layer is not only located on the side of the first doped semiconductor layer on the third region away from the semiconductor substrate but also on the sidewall of the first doped semiconductor layer on the third region. Furthermore, the transparent conductive layer is located on the first and second doped semiconductor layers, allowing the transparent conductive layer to contact the second doped semiconductor layer disposed on the sidewall of the first doped semiconductor layer on the third region. In this case, when the portion of the transparent conductive layer in the second region (i.e., the third transparent conductive portion 23) has a notch 24 corresponding to the discontinuity region 22, it can be ensured that the third transparent conductive portion 23 will not be electrically connected to the second doped semiconductor layer in the discontinuity region 22. This ensures that the contact area between the second doped semiconductor layer and the transparent conductive layer in the reverse leakage region can be effectively adjusted by adjusting the length of the discontinuity region 22 and the continuous region 21 of the first transparent conductive portion 19 along the second direction, thereby achieving precise control of the reverse breakdown voltage and forward leakage loss of the back contact battery. Simultaneously, in actual application manufacturing, the first transparent conductive portion 19 needs to be selectively etched to achieve an intermittent distribution of the reverse leakage region along the second direction. Based on this, when the third transparent conductive part 23 adjacent to the first transparent conductive part 19 is provided with a notch 24 corresponding to the discontinuity region 22, it is not necessary to strictly control the etching accuracy in order to achieve the above selective etching by precisely stopping at the junction of the first transparent conductive part 19 and the third transparent conductive part 23 during the etching process, which helps to reduce the manufacturing difficulty of the back contact battery.

[0101] Specifically, when the first transparent conductive portion has multiple discontinuities along the second direction, the third transparent conductive portion may have a notch only in the portion corresponding to each individual discontinuity, or the third transparent conductive portion may have a notch in the portion corresponding to each discontinuity. Regarding the size of the notch, it is understood that in the transparent conductive layer, the portion located on the side of the second doped semiconductor layer facing away from the semiconductor substrate (i.e., the third transparent conductive portion) needs to guide the carriers collected in the portion corresponding to the second region of the second doped semiconductor layer to the corresponding electrode when the back contact battery is in operation, and can reduce the contact barrier between the second doped semiconductor layer and the corresponding electrode, thereby reducing carrier transport loss. Based on this, the width of the notch along the first direction can be determined according to the requirements for carrier transport loss, leakage current control, and the actual manufacturing process in the actual application scenario, and is not specifically limited here.

[0102] For example, the width of the notch in the first direction can be less than or equal to 100 μm. For instance, the width of the notch in the first direction can be 1 μm, 10 μm, 20 μm, 30 μm, 40 μm, 50 μm, 80 μm, or 100 μm, etc. In this case, when the notch is provided in the portion of the third transparent conductive part corresponding to the spacer region, the carriers collected in the portion of the second doped semiconductor layer corresponding to the notch need to pass through adjacent portions to be transported into the third transparent conductive part. In this case, the transport loss of the carriers collected in the portion of the second doped semiconductor layer corresponding to the notch is relatively high. In this case, when the width of the notch in the first direction is less than or equal to 100 μm, the range of the notch is relatively small, which helps to reduce the difficulty of selective etching while controlling the transport loss of the carriers collected in the second doped semiconductor layer within a certain range, ensuring that the back contact cell has a high photoelectric conversion efficiency.

[0103] In one example, as shown in Figures 1 to 4, the aforementioned back contact battery further includes a first electrode 25 disposed on the portion of the transparent conductive layer 14 corresponding to the second region 16, and a second electrode 29 disposed on the portion of the transparent conductive layer 14 corresponding to the first region 15, to respectively extract the charge carriers collected in the portions of the transparent conductive layer 14 corresponding to the first region 15 and the second region 16. The materials of the first electrode 25 and the second electrode 29 may include any conductive material such as silver, aluminum, copper, titanium, and nickel.

[0104] In one example, as shown in Figure 3, the aforementioned back contact battery further includes a surface passivation layer 28 disposed on one side of the second surface of the semiconductor substrate 11 to passivate the second surface of the semiconductor substrate 11 and reduce the carrier recombination rate on the second surface. The structure and material of the surface passivation layer 28 can be determined at least according to the requirements of the carrier recombination rate on the second surface in the actual application scenario and the actual manufacturing process, and are not specifically limited here.

[0105] For example, the surface passivation layer may include an intrinsic semiconductor passivation layer and a silicon nitride passivation layer sequentially stacked along the thickness direction of the semiconductor substrate on one side of the second surface. The material of the intrinsic semiconductor passivation layer includes amorphous silicon and / or microcrystalline silicon. In this case, the intrinsic semiconductor passivation layer included in the surface passivation layer can be formed simultaneously with the interface passivation layer included in the heterogeneous contact structure on one side of the first surface. The silicon nitride passivation layer included in the surface passivation layer can be formed simultaneously with the mask material for realizing the second passivation contact structure on one side of the first surface, without the need for additional operation steps to form the surface passivation layer, which is beneficial to improving the manufacturing efficiency of the back contact battery.

[0106] This application also provides the following seven specific embodiments and two comparative examples to illustrate the working performance of the back contact battery provided in this application:

[0107] Example 1

[0108] First, the silicon wafers are polished and cleaned. Specifically, the silicon wafers are immersed in a tank-type polishing and cleaning machine for polishing to remove the cutting damage layer. The polishing morphology of the first and second sides of the silicon wafer is controlled by adjusting the temperature, time, and solution concentration.

[0109] Next, the first deposition operation is performed. Specifically, a tunneling silicon oxide layer and an intrinsic polycrystalline silicon layer are deposited sequentially on one side of the first surface of the silicon wafer. Both the tunneling silicon oxide layer and the intrinsic polycrystalline silicon layer are achieved using a low-pressure chemical vapor deposition (LPCVD) furnace. Furthermore, the thickness of the tunneling silicon oxide layer is 1.4 nm, and the thickness of the intrinsic polycrystalline silicon layer is 120 nm.

[0110] Next, the phosphorus diffusion process is carried out. Specifically, intrinsic polysilicon is doped to form an N-type polysilicon layer through high-temperature diffusion, and a phosphosilicate glass layer is formed on the side of the N-type polysilicon layer facing away from the silicon wafer.

[0111] Next, the first wet etching operation is performed. Specifically, this step removes the aforementioned phosphosilicate glass layer using an HF solution. The HF solution concentration is 5%, and the etching time is 2 minutes.

[0112] Next, a second deposition operation is performed. A silicon nitride layer with a thickness of 80 nm and a refractive index of 2.0 is deposited on one side of the first surface of the silicon wafer using a plasma chemical vapor deposition (PCVD) system.

[0113] Next, the first laser etching operation is performed. Specifically, a laser etching process is used to remove the portion of the silicon nitride layer corresponding to the second region and the portion of the N-type doped polysilicon layer corresponding to the second region. The laser used can be a 532 picosecond laser.

[0114] Next, a second wet etching operation is performed. The purpose of this step is to create a pyramidal textured surface on the surface of the second region and the second face, while removing the silicon nitride layer deposited in the second deposition operation.

[0115] Next, a third deposition operation is performed. Specifically, a continuous intrinsic silicon layer and a P-type silicon layer are sequentially formed on one side of the first surface of the silicon wafer using chemical vapor deposition (CVD). The thickness of the intrinsic silicon layer is 8 nm, and the thickness of the P-type silicon layer is 15 nm, with a crystallinity of 5%. Simultaneously, in this step, an intrinsic silicon layer and an antireflection layer are deposited on the second surface of the silicon wafer. The antireflection layer is a 75 nm thick silicon nitride layer.

[0116] Next, a second laser etching operation and a third wet etching operation are performed. Specifically, a laser etching process is used to remove the portion of the intrinsic silicon layer corresponding to the first region and the portion of the P-type silicon layer corresponding to the first region. A 532 picosecond laser is used. Then, using a chain-like device, the second side of the semi-finished product is placed upwards and protected with a water film. The first side of the semi-finished product is then brought into contact with an HF solution to remove the oxide layer formed during the doping of the P-type silicon layer and the silicon nitride layer deposited around the first side during the third deposition operation.

[0117] Next, a transparent conductive layer is deposited on one side of the first surface. This transparent conductive layer is made of an indium tin oxide layer with a thickness of 50 nm.

[0118] Next, the transparent conductive layer connecting the N-region and P-region is isolated, while the intrinsic silicon layer and P-type silicon layer above the third region are also isolated to achieve complete structural insulation between the two polarity regions. Isolation is achieved using an etching paste. The etching pattern ensures that at least a portion of the transparent conductive layer overlaps across the P-region and the third region, and that the transparent conductive layers on the N-region and P-region are physically insulated. The structure of the transparent conductive layer overlapping across the P-region and the third region is uniformly distributed throughout the entire cell area, with a W1 to W2 ratio of 90%.

[0119] Next, a metallization process is performed. Specifically, metallic silver electrodes are fabricated above the two transparent conductive layers to enable carrier collection and interconnection of the electrodes throughout the battery.

[0120] Example 2

[0121] The back contact battery provided in Example 2 is the same as the back contact battery provided in Example 1, except that the ratio of W1 to W2 is 70%.

[0122] Example 3

[0123] The back contact battery provided in Example 3 is the same as the back contact battery provided in Example 1, except that the ratio of W1 to W2 is 50%.

[0124] Example 4

[0125] The back contact battery provided in Example 4 is the same as the back contact battery provided in Example 1, except that the ratio of W1 to W2 is 40%.

[0126] Example 5

[0127] The back contact battery provided in Example 5 is the same as the back contact battery provided in Example 1, except that the ratio of W1 to W2 is 10%.

[0128] Example 6

[0129] The back contact battery provided in Example 6 is the same as the back contact battery provided in Example 4, except that the crystallinity of the P-type silicon layer is 0.

[0130] Example 7

[0131] The back contact battery provided in Example 7 is the same as the back contact battery provided in Example 4, except that the crystallization rate of the P-type silicon layer is 10%.

[0132] Comparative Example 1

[0133] The back contact battery provided in Comparative Example 1 is the same as the back contact battery provided in Example 1, except that the ratio of W1 to W2 is 95%.

[0134] Comparative Example 2

[0135] The back contact battery provided in Comparative Example 2 is the same as the back contact battery provided in Example 1, except that the ratio of W1 to W2 is 5%.

[0136] Table 1 shows the test parameters for the back contact batteries provided in Examples 1 to 7, and Comparative Examples 1 and 2.

[0137] It should be noted that the data in Table 1 were obtained by selecting 10,000 back-contact batteries as samples from each of the back-contact battery product lines corresponding to Examples 1-7, and Comparative Examples 1 and 2. The efficiency data in the table was obtained by conducting efficiency tests on 10,000 samples from each example and calculating the average value. Specifically, back-contact batteries with an efficiency greater than 26% in each of the 10,000 samples were defined as efficiency grade A batteries, and the efficiency grade A rate was calculated by dividing the number of efficiency grade A batteries in each example by 10,000. Additionally, reverse breakdown voltage was randomly sampled and tested on 10% of the 10,000 samples from each example, and the average value was calculated to obtain the reverse breakdown voltage data in the table. Specifically, back-contact batteries with a reverse breakdown voltage less than 11V in each of the 10,000 samples were defined as hot spot reliability grade A batteries, and the hot spot reliability grade A rate was calculated by dividing the number of hot spot reliability grade A batteries in each example by 10,000.

[0138] Under the above conditions, it can be seen from the data in Table 1 that the larger the ratio of the width W1 of the first transparent conductive portion along the first direction to the width W2 of the third region along the first direction, the smaller the reverse breakdown voltage of the back contact battery. When the ratio of W1 to W2 is 95%, although the hot spot reliability A-level rate of the back contact battery is relatively high, the leakage loss in the forward voltage region is also relatively high. Therefore, the efficiency A-level rate of the back contact battery corresponding to Comparative Example 1 is very low and does not meet the operating requirements. Conversely, when the ratio of W1 to W2 is 5%, although the efficiency A-level rate of the back contact battery is relatively high, the leakage current in the reverse leakage region is relatively small. Therefore, the hot spot reliability A-level rate of the back contact battery corresponding to Comparative Example 2 is very low and does not meet the operating requirements.

[0139] Furthermore, as can be seen from the data in Table 1, the reverse breakdown voltage of the back contact battery decreases as the crystallinity of the second doped semiconductor layer increases. However, within a certain range, the efficiency and fill factor of the back contact battery increase with the increase of the crystallinity of the second doped semiconductor layer. When the crystallinity of the second doped semiconductor layer increases to a certain value, the efficiency and fill factor of the back contact battery decrease with the increase of the crystallinity of the second doped semiconductor layer.

[0140] Secondly, embodiments of this application provide a photovoltaic module, which includes the back contact battery provided in the first aspect and its various implementations described above.

[0141] The beneficial effects of the second aspect and its various implementations in the embodiments of this application can be found by referring to the analysis of the beneficial effects of the first aspect and its various implementations, and will not be repeated here.

[0142] Thirdly, embodiments of this application provide a method for manufacturing a back contact battery. The manufacturing process will be described below with reference to the cross-sectional views of the operation shown in Figures 8 to 20. Specifically, the method for manufacturing the back contact battery includes the following steps:

[0143] First, as shown in FIG8, a semiconductor substrate 11 is provided. The semiconductor substrate 11 includes a first surface and a second surface opposite to each other. The first surface includes a first region 15 and a second region 16, and a third region 17 located between the first region 15 and the second region 16. The first region 15, the third region 17 and the second region 16 are arranged along a first direction.

[0144] Specifically, information such as the material of the aforementioned semiconductor substrate, and the distribution of the first, second, and third regions on one side of the first surface, can be found in the preceding text and will not be repeated here.

[0145] Next, as shown in FIG11, a first doped semiconductor layer is formed on the first region 15 and the third region 17. The first doped semiconductor layer may be disposed on the first region 15 and the third region 17, or it may be disposed within the first region 15 and the third region 17.

[0146] For example, as shown in FIG9, a first doped semiconductor layer can be formed first, which is disposed entirely on or within the first surface. Next, as shown in FIG10, an insulating mask layer 30 is formed on the portion of the first doped semiconductor layer 12 corresponding to the first region 15 and the third region 17. Next, as shown in FIG11, under the protection of the insulating mask layer 30, the portion of the first doped semiconductor layer 12 corresponding to the second region 16 is removed. Then, as shown in FIG13, the insulating mask layer is removed.

[0147] In actual manufacturing processes, a first doped semiconductor layer can be formed entirely on or within the first surface using processes such as diffusion or dopant source coating. When a diffusion process is used and the material of the first doped semiconductor layer includes silicon, a doped silicon glass layer is formed on the side of the first doped semiconductor layer facing away from the semiconductor substrate after its formation. In this case, the remaining portion of the doped silicon glass layer on the first and third regions can be patterned to form an insulating mask layer. Alternatively, after removing the doped silicon glass layer, an insulating mask layer can be formed on the portion of the first doped semiconductor layer corresponding to the first and third regions using deposition and laser etching processes (the material of this insulating mask layer can be set according to actual needs and is not specifically limited here. For example, the material of the insulating mask layer may include silicon nitride to perform nitrogen passivation treatment on the side of the first doped semiconductor layer facing away from the semiconductor substrate). If the first doped semiconductor layer is formed entirely without the aforementioned doped silicon glass layer, an insulating mask layer can be directly formed on the portion of the first doped semiconductor layer corresponding to the first and third regions using deposition and laser etching processes.

[0148] Next, under the protection of the insulating mask layer, wet etching or other processes can be used to remove the portion of the first doped semiconductor layer corresponding to the second region. Then, the insulating mask layer is removed to ensure that in the reverse leakage region of the manufactured back contact battery, the first doped semiconductor layer and the second doped semiconductor layer can be electrically connected.

[0149] Alternatively, the formation of the first doped semiconductor layer disposed in the first and third regions may also include the steps of: forming a first doped semiconductor layer that is entirely disposed on or within the first surface; and selectively removing the portion of the first doped semiconductor layer corresponding to the second region using a laser etching process. The method for forming the entire first doped semiconductor layer can be referred to the preceding text. After forming the first doped semiconductor layer, the portion of the first doped semiconductor layer corresponding to the second region can be directly and selectively removed using a laser etching process under the masking effect of a corresponding mask. This saves on the mask deposition and removal processes, reduces the manufacturing cost of the back contact battery, and improves the manufacturing efficiency of the back contact battery.

[0150] It should be noted that when the first doped semiconductor layer is disposed on the first region and the third region, and the back contact battery also includes a first interface passivation layer, processes such as thermal oxidation or chemical vapor deposition can be used to first form a whole layer of the first interface passivation material on one side of the first surface. Then, before forming the whole layer of the first doped semiconductor layer, the first interface passivation material can be selectively etched to remove the portion of the first interface passivation material corresponding to the second region, thereby obtaining the first interface passivation layer; or, after forming the whole layer of the first doped semiconductor layer, selective etching of the first doped semiconductor layer and the first interface passivation material can be achieved under the masking effect of the same insulating mask layer.

[0151] For example, in the manufactured back-contact battery, if the second surface of the semiconductor substrate and the surface of the second region of the first surface are textured, as shown in FIG12, the second region 16 and the second surface can be textured under the protection of the insulating mask layer 30 before the insulating mask layer 30 is removed, so that the second region 16 and the second surface form a textured surface. The insulating mask layer is then removed after the texturing process.

[0152] Next, as shown in FIG16, a second doped semiconductor layer 13 is formed on the second region 16 and extends to cover the portion of the first doped semiconductor layer 12 on the side opposite to the semiconductor substrate 11 corresponding to the third region 17. The second doped semiconductor layer 13 has the opposite conductivity type to the first doped semiconductor layer 12.

[0153] For example, as shown in FIG14, a deposition process can be used to form a second doped semiconductor layer 13 integrally disposed on the second region 16 and the first doped semiconductor layer 12. Then, as shown in FIG15, an etching process such as deposition and laser etching is used to form a mask layer on the portion of the second doped semiconductor layer 13 corresponding to the second region 16 and the third region 17. Next, as shown in FIG16, under the masking effect of the mask layer, a process such as wet etching is used to remove the portion of the second doped semiconductor layer 13 corresponding to the first region 15. Finally, as shown in FIG17, the mask layer is removed.

[0154] Alternatively, the second doped semiconductor layer formed on the second region and extending to cover the portion of the first doped semiconductor layer on the side opposite to the semiconductor substrate corresponding to the third region may also include the steps of: forming a second doped semiconductor layer entirely disposed on the first doped semiconductor layer and the second region; and selectively removing the portion of the second doped semiconductor layer corresponding to the first region using a laser etching process. The method for forming the entire second doped semiconductor layer can be referred to the preceding text. After forming the second doped semiconductor layer, the portion of the second doped semiconductor layer corresponding to the first region can be directly and selectively removed using a laser etching process under the masking effect of a corresponding mask, thereby saving the mask deposition and removal processes, reducing the manufacturing cost of the back contact battery, and improving the manufacturing efficiency of the back contact battery.

[0155] It should be noted that when the manufactured back contact battery also includes a second interface passivation layer, a second interface passivation material can be formed on the second region and extending to cover the first doped semiconductor layer using processes such as chemical vapor deposition before forming the second doped semiconductor layer. Then, before forming the entire second doped semiconductor layer, the second interface passivation material can be selectively etched to remove the portion of the second interface passivation material corresponding to the first region, thereby obtaining the second interface passivation layer; alternatively, after forming the entire second doped semiconductor layer, selective etching of the second doped semiconductor layer and the second interface passivation material can be achieved under the masking effect of the same mask layer.

[0156] Next, as shown in Figures 18 and 19, a transparent conductive layer 14 is formed covering the second doped semiconductor layer and the first doped semiconductor layer 12. An insulating trench 18 is provided within the transparent conductive layer 14 to separate the portion of the transparent conductive layer 14 corresponding to the first region 15 and the portion of the transparent conductive layer 14 corresponding to the second region 16. At least a portion of the third region 17 is a reverse leakage region. In the reverse leakage region, the portion of the transparent conductive layer 14 extending from the second region 16 into the third region 17 is a first transparent conductive portion 19, which is electrically connected to the first doped semiconductor layer 12 through the second doped semiconductor layer 13. The width of the first transparent conductive portion 19 in the first direction is W1, and the width of the third region 17 in the first direction is W2. The ratio of W1 to W2 is greater than or equal to 10% and less than or equal to 90%.

[0157] For example, a transparent conductive material can be formed by using processes such as physical vapor deposition on the first and second doped semiconductor layers. Then, under the protection of a corresponding mask, an insulating trench can be formed in the transparent conductive layer using methods such as chemical etching paste or laser etching. The width of the insulating trench along the first direction, and the ratio of the width W1 of the first transparent conductive layer in the first direction to the width W2 of the third region in the first direction, can be referred to the previous text and will not be repeated here.

[0158] For example, after forming the transparent conductive layer, or while forming insulating grooves within the transparent conductive layer, the manufacturing method of the back contact battery may further include the step of: selectively etching at least the first transparent conductive portion to make the first transparent conductive portion discontinuously distributed along a second direction. The second direction intersects the first direction. The lengths of the continuous and discontinuous portions of the first transparent conductive portion along the second direction, the width of the continuous portion of the first transparent conductive portion along the second direction, and the specific orientation of the second direction can be referred to the preceding text and will not be repeated here.

[0159] Furthermore, the selective etching operation on at least the first transparent conductive portion can be performed simultaneously with the creation of insulating trenches within the transparent conductive layer. In this case, both the fabrication of the insulating trenches and the selective etching can be achieved using a single mask, which improves the manufacturing efficiency of the back contact battery. Of course, these two operations can also be performed separately. Secondly, when the manufactured back contact battery has a notch at the discontinuity area corresponding to the first transparent conductive portion, the etchant used in the selective etching operation also etches the portion of the third transparent conductive portion corresponding to the discontinuity area of ​​the first transparent conductive portion to a certain extent. The width of the etching along the first direction can be referred to the previous text and will not be repeated here.

[0160] As shown in Figure 20, a first electrode 25 can then be formed on the portion of the transparent conductive layer 14 corresponding to the second region 16, and a second electrode 29 can be formed on the portion of the transparent conductive layer 14 corresponding to the first region 15, using processes such as screen printing.

[0161] The beneficial effects of the third aspect and its various implementations in the embodiments of this application can be referred to the analysis of the beneficial effects of the first aspect and its various implementations, and will not be repeated here.

[0162] This application embodiment also provides a back-contact battery, which, unlike the previous embodiments, reduces the risk of hot spots by using corner sidewall leakage. Specifically, in addition to the basic structure described above, as shown in FIG21, the first surface of the semiconductor substrate 11 includes alternating first regions 15 and second regions 16. A first doped semiconductor layer 12 is disposed in the first region 15. The thickness of the first doped semiconductor layer 12 is greater than the thickness of the second doped semiconductor layer 13. The second doped semiconductor layer 13 is disposed in the second region 16 and extends to cover a portion of the first doped semiconductor layer 12. A transparent conductive layer 14 covers the first doped semiconductor layer 12 and the second doped semiconductor layer 13. The transparent conductive layer 14 has a through insulating groove 18 so that the portion of the transparent conductive layer 14 electrically connected to the first doped semiconductor layer 12 is physically insulated from the portion of the transparent conductive layer 14 corresponding to the second region 16. The second doped semiconductor layer 13 includes a reverse leakage portion 118, which is electrically connected to the first doped semiconductor layer 12, and the reverse leakage portion 118 is covered by the transparent conductive layer 14 extending from the second region 16. The first doped semiconductor layer 12 includes a corner region 119. The corner region 119 extends from the root of the sidewall of the first doped semiconductor layer 12 to the edge of the first doped semiconductor layer 12 near the sidewall. The reverse leakage portion 118 is located within the corresponding range of the corner region 119 of the first doped semiconductor layer 12. The beneficial effects of this embodiment are similar to those of the previous embodiments, and will not be repeated here.

[0163] Secondly, as shown in Figure 21, the second doped semiconductor layer 13 is not only disposed on the second region 16, but also extends to cover a portion of the first doped semiconductor layer 12. Furthermore, the second doped semiconductor layer 13 includes a reverse leakage portion 118 electrically connected to the first doped semiconductor layer 12, and this reverse leakage portion 118 is covered by a transparent conductive layer 14 extending from the second region 16. In this case, the reverse leakage portion 118 of the second doped semiconductor layer 13 and the portion of the first doped semiconductor layer 12 located in the corner region 119 can form a built-in diode with a low reverse breakdown voltage. When the back contact battery is blocked, the leakage current can pass through the portion of the first doped semiconductor layer 12 located in the corner region 119 and the reverse leakage portion 118 of the second doped semiconductor layer 13, then through the transparent conductive layer 14 extending from the second region 16 to the reverse leakage portion 118, and is discharged through the electrode that contacts the portion of the transparent conductive layer 14 corresponding to the second region 16, reducing the risk of hot spots on the back contact battery and improving its resistance to burn-out. It should be noted that the reverse leakage portion 118 is electrically connected to the first doped semiconductor layer 12, and this electrical connection does not include the electrical connection achieved through the semiconductor substrate 11. It is understood that the reverse leakage portion 118 of the second doped semiconductor layer 13 and the corner region 119 of the first doped semiconductor layer 12 can be electrically connected through a tunneling mechanism or a thin dielectric layer. Furthermore, in the back contact battery provided in this embodiment, the corner region 119 of the first doped semiconductor layer 12 extends from the root of the sidewall of the first doped semiconductor layer 12 to the edge of the first doped semiconductor layer 12 near the sidewall. Moreover, the reverse leakage portion 118 of the second doped semiconductor layer 13 is located within the corresponding range of the corner region 119 of the first doped semiconductor layer 12. In this case, in the aforementioned built-in diode, the size of the leakage contact area between the first doped semiconductor layer 12 and the second doped semiconductor layer 13 can be controlled by adjusting the thickness of the first doped semiconductor layer 12. The size of the aforementioned leakage contact area affects the magnitude of the forward leakage loss and reverse breakdown voltage of the back contact battery. Therefore, in practical applications, the forward leakage loss and reverse breakdown voltage of the back contact battery can be balanced and controlled by simply adjusting the thickness of the first doped semiconductor layer 12. This reduces the risk of hot spots and the difficulty of control of the back contact battery, while enabling the back contact battery to have high conversion efficiency and yield in the forward voltage region. Furthermore, in the actual manufacturing process of the back contact battery provided in this embodiment, the thickness of the second doped semiconductor layer 13 located in the corner region 119 is relatively thinner than that of the second doped semiconductor layer 13 located in other regions. This makes it easier to achieve reverse breakdown at the corner region 119, thereby facilitating the transmission of reverse leakage current.Meanwhile, the reverse leakage portion 118 is located within the area corresponding to the corner region 119. Compared with the rest of the first doped semiconductor layer 12, the corner region 119 has a smaller distance from the transparent conductive layer 14 located in the second region 16, which can shorten the transmission path of the reverse leakage current, reduce the transmission resistance, and is more conducive to the transmission of the reverse leakage current, thereby reducing the risk of hot spots on the back contact battery.

[0164] Furthermore, it is understandable that since the reverse leakage portion of the second doped semiconductor layer is located within the corresponding area of ​​the corner region of the first doped semiconductor layer, the width of the corner region along the direction from the edge to the center of the first region may affect the size of the leakage contact area between the first and second doped semiconductor layers, thereby affecting the forward leakage loss and reverse breakdown voltage of the back contact battery. Based on this, the width of the corner region along the direction from the edge to the center of the first region can be determined according to the actual application scenario's requirements for the conversion efficiency and hot spot risk of the back contact battery; no specific limitation is made here.

[0165] For example, the width of the corner region along the direction from the edge to the center of the first region can be less than 100 nm. For instance, the width of the corner region can be 5 nm, 10 nm, 20 nm, 30 nm, 40 nm, 50 nm, 60 nm, 70 nm, 80 nm, 90 nm, or 95 nm, etc. In this case, it can prevent a large forward leakage loss between the first and second doped semiconductor layers in normal operation of the back contact battery due to a large leakage contact area, ensuring that the back contact battery has high conversion efficiency. Furthermore, in the actual manufacturing process, the mask layer located on the first doped semiconductor layer can be etched sideways with an etchant, causing the corner region of the first doped semiconductor layer to protrude relative to the sidewall of the remaining portion of the mask layer, thereby contacting the second doped semiconductor layer. Based on this, when the width of the corner region is within the above range, it can prevent the side etching from becoming too difficult due to an excessively large corner region, thus reducing the difficulty of the manufacturing process. Secondly, it eliminates the need for expensive photolithography processes or multi-layer mask combinations to achieve wider corner areas, thus reducing the manufacturing cost of back contact batteries and improving manufacturing efficiency.

[0166] Furthermore, in practical applications, the reverse leakage portion of the second doped semiconductor layer can be located only on the sidewall of the corner region. In this case, when the reverse leakage portion is only located on the sidewall of the corner region, apart from the effective contact length between the first and second doped semiconductor layers along the length of the sidewall, the size of the leakage contact area between the first and second doped semiconductor layers is only related to the thickness of the first doped semiconductor layer. At this point, the forward leakage loss and reverse breakdown voltage of the back contact battery can be precisely controlled by simply adjusting the thickness of the first doped semiconductor layer, further reducing the difficulty of control and ensuring that the back contact battery has a low reverse breakdown voltage and high conversion efficiency. Specifically, in this case, the reverse leakage portion can contact all parts of the corner region sidewall along the thickness direction of the semiconductor substrate, or it can only contact a portion of the corner region sidewall along the thickness direction of the semiconductor substrate.

[0167] Alternatively, as shown in Figure 22, the aforementioned reverse leakage portion 118 can also cover the entire corner region 119. In this case, not only is there a leakage path between the reverse leakage portion 118 of the second doped semiconductor layer 13 and the sidewall of the corner region 119, but there is also a leakage path between the reverse leakage portion 118 of the second doped semiconductor layer 13 and the top of the corner region 119. This helps to increase the leakage contact area, ensuring that the back contact battery has a low risk of hot spots even in installation environments with many obstructions such as sand and dust. Furthermore, it eliminates the need for strict control of manufacturing precision to ensure that the reverse leakage portion 118 is only located on the sidewall of the corner region 119, thus reducing the difficulty of the manufacturing process. Specifically, in this case, the reverse leakage portion 118 can contact all portions of the sidewall of the corner region 119 along the thickness direction of the semiconductor substrate 11, or it can only contact a portion of the sidewall of the corner region 119 along the thickness direction of the semiconductor substrate 11. Secondly, the reverse leakage portion 118 can contact each part of the corner region 119 on the side away from the semiconductor substrate 11, or it can only contact a part of the corner region 119 on the side away from the semiconductor substrate 11.

[0168] In terms of the formation range, the reverse leakage portion can be continuously distributed along a direction perpendicular to the alternation of the first and second regions. (See Figure 22, where the first region 15 and the second region 16 are distributed alternately along the left-right direction in Figure 22, and the direction perpendicular to the alternation of the first region 15 and the second region 16 is perpendicular to the plane of the paper in Figure 22.) This increases the leakage contact area between the reverse leakage portion and the corner region, further reducing the risk of hot spots on the back contact battery. Simultaneously, it saves the length extension direction along the sidewall of the corner region, allowing for selective etching patterning of the reverse leakage portion, thus improving the manufacturing efficiency of the back contact battery.

[0169] Alternatively, the reverse leakage portion can also be discontinuously distributed along a direction perpendicular to the alternation of the first and second regions. In this case, the length ratio of the continuous and discontinuous regions in the reverse leakage portion can be determined based on the requirements for hot spot risk and conversion efficiency of the back contact battery in the actual application scenario, and is not specifically limited here.

[0170] As shown in FIG22, along the distribution direction of the first and second regions, the portion of the second doped semiconductor layer 13 extending from the second region 16 onto the first doped semiconductor layer 12 may be aligned only with the edge of the corner region 119 away from the second region 16. Alternatively, as shown in FIG23, along the direction from the edge to the center of the first region 15, the second doped semiconductor layer 13 further extends from above the corner region 119 to cover the remaining portion of the first doped semiconductor layer 12; and the back contact battery also includes a first insulating layer 210. The first insulating layer 210 is disposed between the remaining portion of the first doped semiconductor layer 12 and the second doped semiconductor layer 13. In this case, by ensuring that the reverse leakage portion 118 is located within the corresponding area of ​​the corner region 119 of the first doped semiconductor layer 12, a certain amount of leakage current is generated between the reverse leakage portion 118 and the corner region 119 when the back contact battery is blocked. This ensures that the back contact battery has a low risk of hot spots, while eliminating the need for high manufacturing precision to extend the second doped semiconductor layer 13 only to the edge of the corner region 119 away from the second region 16, thus reducing manufacturing difficulty. Furthermore, the first insulating layer 210 disposed between the remaining area of ​​the first doped semiconductor layer 12 and the second doped semiconductor layer 13 can effectively control the effective leakage contact area between the overlapping portions of the first doped semiconductor layer 12 and the second doped semiconductor layer 13 along the thickness direction of the semiconductor substrate 11, reducing forward leakage loss and further improving the conversion efficiency of the back contact battery. In addition, the first insulating layer 210 is disposed between the remaining area of ​​the first doped semiconductor layer 12 and the second doped semiconductor layer 13, in which case the sidewall of the first insulating layer 210 near the second region 16 is recessed inward relative to the sidewall of the corner region 119. Based on this, with the height difference between the surface of the second region 16 and the side of the first insulating layer 210 facing away from the semiconductor substrate 11 fixed, compared to the sidewalls of the first insulating layer 210 and the corner region 119 being flush, the sidewall of the first insulating layer 210 near the second region 16 is recessed inward relative to the sidewall of the corner region 119. This allows a step-like morphology with gradually increasing height to be formed between the surface of the second region 16 and the side of the first insulating layer 210 facing away from the semiconductor substrate 11, reducing the height variation between the two. This facilitates better coverage of the second doped semiconductor layer 13 at the junction of the second region 16 and the first region 15, improving the film quality of the second doped semiconductor layer 13 at the junction of the second region 16 and the first region 15. This makes it easier to control the production yield and also reduces the transmission resistance between the corner region 119 at the junction and the reverse leakage portion 118 with better film quality, further reducing the risk of hot spots.Furthermore, in the actual manufacturing process, the presence of the first insulating layer 210 can also serve as a mask layer for selectively etching at least part of the first doped semiconductor layer 12, which simplifies the process flow. Simultaneously, after selectively etching the first doped semiconductor layer 12, it is not necessary to completely remove the first insulating layer 210, reducing etching damage to the second region 16 of the semiconductor substrate 11 and improving yield. Moreover, if laser etching is used to etch the insulating trench 18 within the transparent conductive layer 14, the presence of the first insulating layer 210 can also reduce the impact of the high-temperature laser on the underlying first doped semiconductor layer 12 and semiconductor substrate 11.

[0171] The width of the second doped semiconductor layer extending from above the corner region to cover the remaining area of ​​the first doped semiconductor layer (i.e., the width of the first insulating layer) affects the area of ​​the first doped semiconductor layer exposed outside the second doped semiconductor layer, and thus affects the formation range of the second electrode electrically connected to the first doped semiconductor layer. Therefore, the width of the first insulating layer can be determined according to the requirements of the carrier collection capability of the second electrode in the actual application scenario, and no specific limitation is made here.

[0172] For example, in the portion where the first doped semiconductor layer and the second doped semiconductor layer overlap along the thickness direction of the semiconductor substrate, the ratio of the width of the first insulating layer to the width of the corner region along the direction from the edge to the center of the first region can be greater than or equal to 10 and less than or equal to 1000. In this case, as mentioned above, the width of the corner region may affect the size of the leakage contact area between the reverse leakage portion and the corner region. Based on this, when the width of the second doped semiconductor layer extending to the first region is fixed, the ratio of the width of the first insulating layer to the width of the corner region may affect the size of the aforementioned leakage contact area. Therefore, when the ratio of the width of the first insulating layer to the width of the corner region is within the aforementioned range, it is beneficial to prevent a large corner region due to a small ratio, which could lead to a large leakage contact area, thus ensuring that the back contact battery has a high conversion efficiency. In addition, it is also beneficial to prevent a small corner region due to a large ratio, which could lead to a small leakage contact area, thus ensuring that the back contact battery has a high resistance to burn-out.

[0173] The material and thickness of the first insulating layer can be determined according to the actual application scenario, as long as it can be applied to the back contact battery provided in the embodiments of this application. An exemplary first insulating layer may include a silicon nitride layer.

[0174] Alternatively, only a local portion of the second doped semiconductor layer extends from the second region onto a portion of the first doped semiconductor layer along the length of the corner region; or, the entire second doped semiconductor layer extends from the second region onto a portion of the first doped semiconductor layer along the length of the corner region. Specifically, the proportion of the portion extending from the second region onto a portion of the first doped semiconductor layer in each region along the length of the corner region can be determined based on the requirements for forward leakage loss and reverse breakdown voltage of the back contact battery in the actual application scenario, and is not specifically limited here.

[0175] This application also provides a back-contact battery. Unlike the previous embodiments, it reduces the risk of hot spots and improves the screen life by bending the edge lines. Specifically, in addition to the basic structure described above, as shown in Figures 24 to 26, a portion of the third region 17 is a reverse leakage region. In the reverse leakage region, a transparent conductive layer 14 extending from the second region 16 is provided, and the transparent conductive layer 14 is electrically connected to the first doped semiconductor layer 12 through the second doped semiconductor layer 13. The edge line of the transparent conductive layer 14 near the first region 15 is a first edge line 108. The first edge line 108 has a periodically repeating alternating convex and concave structure, and the transition lines between the convex and concave sections in the alternating convex and concave structure are not parallel to the first direction.

[0176] The first edge 108 of the transparent conductive layer 14 near the first region 15 has a periodically repeating alternating convex and concave structure. On the one hand, the concave portion 109 in the alternating convex and concave structure can be used to control the effective leakage contact area between the first doped semiconductor layer 12 and the second doped semiconductor layer 13. On the other hand, it is beneficial to ensure that the reverse leakage area of ​​the convex portion 200 of the transparent conductive layer 14 is evenly distributed in the third region 17 along the periodic repeating direction of the alternating convex and concave structure. This facilitates the even distribution of heat generated when the back contact battery is blocked throughout the battery area, preventing local heat accumulation that could lead to reliability problems and improving the back contact battery's resistance to burn-out. Secondly, the patterning process of the transparent conductive layer is generally carried out by screen printing and etching the paste. In the above-mentioned alternating convex and concave structure, the transition line between the convex and concave is not parallel to the first direction. At this time, the screen used to form the patterned transparent conductive layer 14 also does not have a contour line parallel to the first direction in its pattern outline. This improves the structural strength of the screen along the first direction and prevents damage to its morphology due to repeated use of the screen during mass production. This would affect the forming accuracy of the transparent conductive layer 14 near the first edge line 108, which is beneficial for achieving a higher yield of the back contact battery. It also helps to extend the service life of the screen and control the manufacturing cost of the back contact battery.

[0177] As for the specific morphology of the first edge line and the transition line of the transparent conductive layer, it can be determined according to the actual application scenario. As long as the first edge line has a periodically repeating convex-concave alternating structure, and the transition line between the convex and concave in the convex-concave alternating structure is not parallel to the first direction, it is acceptable.

[0178] For example, as shown in Figures 25 and 26, the transition line can be a curve or a slanted line. In this case, the transition line can be not only a curve with a bend, but also a straight or nearly straight slanted line, with various examples. The specific shape of the transition line can be set according to different needs, improving the applicability of the back contact battery provided in this application embodiment in different application scenarios. Furthermore, it can reduce the manufacturing difficulty of the back contact battery. The curve mentioned above can be an arc or a non-arc line with a bend. The angle and magnitude of the curve can be determined according to the requirements of hot spot risk and conversion efficiency of the back contact battery in the actual application scenario, as well as the requirements of the screen life of manufacturing the transparent conductive layer 14, and are not specifically limited here.

[0179] Regarding the aforementioned diagonal line, it is understandable that, assuming other factors such as the width of the reverse leakage region along the first direction are constant, when the transition line is diagonal, the angle between the diagonal line and the first direction will affect the size of the reverse leakage region. Furthermore, the size of this angle will also affect the strength of the screen printing plate along the first direction. Based on this, the specific requirements for hot spot risk and conversion efficiency of the back contact battery, as well as the lifespan requirements for manufacturing the transparent conductive layer, can be determined according to the actual application scenario; no specific limitations are made here.

[0180] For example, when the transition line is a diagonal line, the angle between the diagonal line and the first direction is greater than or equal to 5° and less than or equal to 85°. For instance, the angle between the diagonal line and the first direction can be 5°, 10°, 15°, 20°, 30°, 40°, 50°, 60°, 70°, 80°, or 85°. In this case, when the angle between the diagonal line and the first direction is within the above range, it is beneficial to control the effective leakage contact area of ​​the reverse leakage region within a reasonable range, which is beneficial to the balance adjustment between the back contact battery's burn-out resistance and conversion efficiency. Simultaneously, the angle between the diagonal line and the first direction being within the above range also allows the screen used to form the patterned transparent conductive layer to have a pattern outline corresponding to the first edge line that forms a similar triangular shape with high structural stability with its other parts, further strengthening the structural strength of the screen along the first direction and improving the screen's service life.

[0181] For example, as shown in Figures 27 to 30, the first edge line 108 can be a wavy line, a zigzag line, or a trapezoidal zigzag line. The application principle of the beneficial effect in this case can refer to the application principle of the beneficial effect of the transition line being a curve or a diagonal line as described above, and will not be repeated here. Among them, the curvature corresponding to the concave part 109 and the convex part 200 in the wavy line, the angle of each zigzag angle in the zigzag line, and the inclination angle and horizontal length of the inclined line in the trapezoidal zigzag line can be determined according to the proportion of the reverse leakage area in the third region 17 in the actual application scenario, and the screen life of manufacturing the transparent conductive layer 14, and are not specifically limited here.

[0182] Regarding the extension direction of the first sideline and the frequency of the convex and concave arrangement in the alternating convex-concave structure, it can be understood that since the dimensions of the convex and concave parts in the alternating convex-concave structure are constant, the number of convex and concave parts per unit length will affect the density of the convex parts, i.e., the density of the reverse leakage area in the third region. Based on this, the number of convex and concave parts per unit length in the alternating convex-concave structure can be determined according to the requirements of hot spot risk and conversion efficiency of the back contact battery in the actual application scenario; no specific limitation is made here.

[0183] For example, within a 1cm unit length along the length of the first edge, the number of protrusions and concaves in the alternating convex-concave structure is greater than or equal to 1 and less than or equal to 200. For instance, within a 1cm unit length along the length of the first edge, the number of protrusions and concaves in the alternating convex-concave structure can be 1, 10, 30, 50, 80, 100, 120, 150, 180, or 200, etc. In this case, it is understood that controlling the effective leakage contact area of ​​the reverse leakage region within a reasonable range can prevent the heat generated when the back contact battery is blocked due to an insufficient number of protrusions and concaves in the alternating structure, resulting in a small proportion of the reverse leakage region in the alternating area. This extends the lifespan of the screen and further improves the burn-out resistance of the back contact battery. In addition, it can prevent the risk of damage such as the etching paste squeezing the contour line corresponding to the first edge line in the screen due to the large number of protrusions and concavities in the alternating structure. This helps to reduce the risk of hot spots on the back contact battery and extend the service life of the screen.

[0184] It should be noted that in the actual manufacturing process, because the etching paste for etching the transparent conductive layer has a certain degree of fluidity, when manufacturing the transparent conductive layer using a screen, after placing the etching paste on the exposed area of ​​the screen and removing the screen, the edge of the etching paste may undergo morphological changes due to its fluidity. This results in a slight change in the morphology of the first edge line of the transparent conductive layer at the edge of the etching paste after etching. However, this slight change does not affect the macroscopic periodic morphology of the first edge line, which exhibits alternating convex and concave shapes. Secondly, the curves, oblique lines, zigzag lines, or trapezoidal broken lines mentioned above can be regular line types as shown in Figures 27 to 29; or, they can be irregular line types with approximate morphologies such as curves, oblique lines, zigzag lines, or trapezoidal broken lines, as shown in Figure 30.

[0185] This application also provides a back contact battery, which, unlike the previous embodiments, reduces the risk of hot spots by intermittent leakage. Specifically, in addition to the basic structure described above, as shown in Figures 31-34, the back contact battery includes: a leakage channel 3 and an isolation portion 4 disposed at intervals between a first doped semiconductor layer 12 and a second doped semiconductor layer 13; the first end of the leakage channel 3 is connected to the first doped semiconductor layer 12, and the second end of the leakage channel 3 is covered by the second doped semiconductor layer 13 and a transparent conductive layer 14; wherein, the first end of the isolation portion 4 is connected to the first doped semiconductor layer 12, and the second end of the isolation portion 4 is covered by the second doped semiconductor layer 13 and the transparent conductive layer 14, and the doping concentration of the leakage channel 3 is greater than the doping concentration of the isolation portion 4; or, the first end of the isolation portion 4 is connected to the first doped semiconductor layer 12, and the second end of the isolation portion 4 is connected to the second doped semiconductor layer 13, the material of the isolation portion 4 is an insulating material, or the material of the isolation portion 4 is a semiconductor material and the second end of the isolation portion 4 is not covered by the transparent conductive layer 14.

[0186] The specific structure of the aforementioned back contact battery will be described in detail below through specific embodiments.

[0187] This embodiment provides a back-contact battery, as shown in Figures 31-33. The back-contact battery includes a semiconductor substrate 11, a first interface passivation layer 26, a second interface passivation layer 27, a first doped semiconductor layer 12, a second doped semiconductor layer 13, a transparent conductive layer 14, a leakage channel 3, an isolation portion 4, a first electrode 25, a second electrode 29, a surface passivation layer 28, and an anti-reflection layer 103. The semiconductor substrate 11 has opposing first and second surfaces. The first doped semiconductor layer 12 and the second doped semiconductor layer 13 are both disposed on the first surface of the semiconductor substrate 11, and their conductivity types are opposite to collect and export electrons and holes respectively, facilitating the formation of photocurrent.

[0188] As shown in Figure 32, a transparent conductive layer 14 is disposed at least on the side of the second doped semiconductor layer 13 away from the semiconductor substrate 11. That is, a transparent conductive layer 14 is provided on the side of the second doped semiconductor layer 13 away from the semiconductor substrate 11. The transparent conductive layer 14 has high conductivity, which can promptly guide the collected charge carriers and reduce the carrier recombination rate. Furthermore, the transparent conductive layer 14 can be selectively disposed on the side of the first doped semiconductor layer 12 away from the semiconductor substrate 11, depending on the needs. For example, if the first doped semiconductor layer 12 is doped polycrystalline silicon, a transparent conductive layer 14 can be disposed on the side of the first doped semiconductor layer 12 away from the semiconductor substrate 11, or it can be omitted. If the first doped semiconductor layer 12 is doped amorphous silicon, doped microcrystalline silicon, or doped nanocrystalline silicon, a transparent conductive layer 14 can be disposed on the side of the first doped semiconductor layer 12 away from the semiconductor substrate 11.

[0189] As shown in Figures 31 and 34, the leakage channel 3 and the isolation portion 4 are located between the first doped semiconductor layer 12 and the second doped semiconductor layer 13, and are spaced apart. Specifically, a third region 17 is provided between the first doped semiconductor layer 12 and the second doped semiconductor layer 13, and the leakage channel 3 and the isolation portion 4 are spaced apart within the third region 17. It can be understood that the leakage channel 3 is a physical functional layer, not a virtual one. In the actual manufacturing process, the leakage channel 3 can be formed by doping the intrinsic semiconductor. Depending on the actual situation, two, three, or more leakage channels 3 can be provided. An isolation portion 4 is provided between adjacent leakage channels 3, and a leakage channel 3 is provided between adjacent isolation portions 4. The first end of the leakage channel 3 is connected to the first doped semiconductor layer 12, and the second end of the leakage channel 3 is covered by the second doped semiconductor layer 13 and the transparent conductive layer 14, so as to electrically connect the first doped semiconductor layer 12 and the second doped semiconductor layer 13 using the leakage channel 3.

[0190] In this first embodiment, as shown in FIG33, the first end of the isolation portion 4 is connected to the first doped semiconductor layer 12, and the second end of the isolation portion 4 is covered by the second doped semiconductor layer 13 and the transparent conductive layer 14. Since the two ends of the isolation portion 4 are connected to the first doped semiconductor layer 12 and the transparent conductive layer 14 respectively, if the current transmission capability of the isolation portion 4 is strong, the leakage current through the isolation portion 4 will be large, which will lead to a decrease in the working efficiency of the back contact battery. Therefore, when designing the back contact battery, the current transmission capability of the isolation portion 4 can be selected to be weak. When the material of the isolation portion 4 is a semiconductor material, the doping concentration of the leakage channel 3 can be greater than the doping concentration of the isolation portion 4. In this way, the current transmission capability of the leakage channel 3 is better than that of the isolation portion 4. At least a portion of the first doped semiconductor layer 12 and at least a portion of the second doped semiconductor layer 13 are electrically connected through the leakage channel 3 so that when the back contact battery is blocked, the current can be transmitted through the second electrode 29, the first doped semiconductor layer 12, the leakage channel 3, the second doped semiconductor layer 13, the transparent conductive layer 14, and the first electrode 25.

[0191] Meanwhile, at least a portion of the first doped semiconductor layer 12 and at least a portion of the second doped semiconductor layer 13 are separated by the isolation portion 4 to prevent a large leakage current between the first doped semiconductor layer 12 and the second doped semiconductor layer 13 when the back contact battery is working normally, which would result in a low working efficiency of the back contact battery and ensure that the photovoltaic module including the back contact battery provided in the embodiments of this application has a high photoelectric conversion efficiency in the forward voltage region.

[0192] For example, in the above scheme, the isolation part 4 is an intrinsic semiconductor layer or a lightly doped semiconductor layer (that is, the isolation part 4 is a doped semiconductor layer, and the doping concentration of the isolation part 4 is less than the doping concentration of the leakage channel 3). In short, as long as the current transmission capability of the isolation part 4 is weaker than that of the leakage channel 3, the working efficiency of the back contact battery can be guaranteed.

[0193] As shown in Figures 31 and 34, with the above technical solution, the first doped semiconductor layer 12 and the second doped semiconductor layer 13, which have opposite conductivity types, are distributed on the back side of the semiconductor substrate 11 to effectively shunt carriers when the back contact battery is in operation, which is beneficial for the formation of photocurrent. As shown in Figures 31 and 34, the back contact battery provided in this embodiment also includes a leakage channel 3 located between the first doped semiconductor layer 12 and the second doped semiconductor layer 13. Based on this, since each leakage channel 3 has conductive characteristics, when the first end of the leakage channel 3 is connected to the first doped semiconductor layer 12 and the second end of the leakage channel 3 is covered by the second doped semiconductor layer 13 and the transparent conductive layer 14, when the back contact battery is blocked and a certain reverse voltage is provided to the blocked back contact battery, the current can be transmitted through the first doped semiconductor layer 12, the leakage channel 3, the second doped semiconductor layer 13 and the transparent conductive layer 14, thus preventing the blocked battery cell from becoming a load that consumes the energy generated by other illuminated battery cells, thereby reducing the risk of hot spots.

[0194] This application embodiment also provides a back contact battery, which differs from the previous embodiments in the design of the leakage current distribution density in the edge region and the leakage current distribution density in the middle region. Specifically, in addition to the basic structure described above, as shown in FIG35, the first surface of the semiconductor substrate 11 includes a central region 134 and an edge region 135 disposed on the outer periphery of the central region 134. The width of the edge region 135 is less than or equal to 1 mm in the direction from the geometric center of the first surface to the edge. A first doped semiconductor layer 12 and a second doped semiconductor layer 13 are both disposed on the first surface of the semiconductor substrate 11, and the conductivity types of the first doped semiconductor layer 12 and the second doped semiconductor layer 13 are opposite. Only a portion of the first doped semiconductor layer 12 and only a portion of the second doped semiconductor layer 13 are electrically connected to form a reverse leakage region 136. The reverse leakage region 136 is at least disposed within the edge region 135, and the distribution density of the reverse leakage region 136 within the edge region 135 is greater than the distribution density of the reverse leakage region 136 within the central region 134.

[0195] It should be noted that the distribution density of reverse leakage areas can be expressed as: the area ratio of reverse leakage areas per unit area or unit length in the edge and central regions; or, the distribution density of reverse leakage areas can be expressed as: the number of reverse leakage areas per unit area or unit length in the edge and central regions.

[0196] When the above technical solution is adopted, under normal operating conditions of the back contact battery, recombination of oppositely charged carriers will occur between the first doped semiconductor layer 12 and the second doped semiconductor layer 13, which have opposite conductivity types, within the aforementioned reverse leakage region 136, resulting in leakage loss and affecting the battery's operating efficiency. Therefore, as shown in Figure 35, only a portion of the first doped semiconductor layer 12 and only a portion of the second doped semiconductor layer 13 are electrically connected to form the aforementioned reverse leakage region 136. Furthermore, there are portions between the first doped semiconductor layer 12 and the second doped semiconductor layer 13 where the reverse leakage region 136 is not formed. These portions can still be separated by physical barriers such as insulating trenches, or by non-conductive structures such as chemical films made of insulating materials or intrinsic semiconductor materials. This prevents the formation of the reverse leakage region 136 between all regions of the first doped semiconductor layer 12 and the second doped semiconductor layer 13, which would otherwise lead to significant leakage loss under normal operating conditions of the back contact battery, thus improving the battery's performance. Furthermore, in the actual manufacturing process of the back contact battery, compared with the central region 134 of the semiconductor substrate 11, the surface flatness of the semiconductor substrate 11 in the edge region 135 is poor, and it has characteristics such as poor passivation and many defects. Moreover, when the first doped semiconductor layer 12 and the second doped semiconductor layer 13 are formed on the first side, the formation quality and uniformity of the first doped semiconductor layer 12 and the second doped semiconductor layer 13 in the edge region 135 are not as good as their formation quality and uniformity in the central region 134 due to factors such as the different flow rates and flow velocities of the deposition gas and / or the doping gas in the central region 134 and the edge region 135. As a result, the recombination rate of the back contact battery in the edge region 135 is higher than that in the central region 134. Therefore, the edge region 135 is more suitable for setting the reverse leakage region 136. Based on this, in the back contact battery provided in this application embodiment, the reverse leakage region 136 is at least disposed within the edge region 135, and the distribution density of the reverse leakage region 136 within the edge region 135 is greater than the distribution density of the reverse leakage region 136 within the central region 134. In this case, the risk of hot spots in the back contact battery can be more effectively reduced by the reverse leakage region 136 disposed at least within the edge region 135. It also helps to reduce or even eliminate leakage losses caused by the presence of the reverse leakage region 136 within the central region 134. This ensures that the central region 134, with fewer defects and better formation quality and uniformity of the first doped semiconductor layer 12 and the second doped semiconductor layer 13, has higher photoelectric conversion efficiency (compared to the central region with a larger distribution density of reverse leakage regions), reducing the impact of the reverse leakage region 136 on the battery's operating efficiency, thereby improving the overall performance of the back contact battery.

[0197] The above description does not provide detailed explanations of the technical aspects of each layer's patterning, etching, etc. However, those skilled in the art should understand that various technical means can be used to form layers and regions of the desired shape. Furthermore, to form the same structure, those skilled in the art can also design methods that are not entirely identical to those described above. Additionally, although various embodiments have been described above, this does not mean that the measures in the various embodiments cannot be used advantageously in combination.

[0198] The embodiments of this application have been described above. However, these embodiments are merely illustrative and not intended to limit the scope of this application. The scope of this application is defined by the appended claims and their equivalents. Various substitutions and modifications can be made by those skilled in the art without departing from the scope of this application, and all such substitutions and modifications should fall within the scope of this application.

Claims

1. A back-contact battery, characterized in that, include: A semiconductor substrate, a first doped semiconductor layer, a second doped semiconductor layer, and a transparent conductive layer; the second doped semiconductor layer and the first doped semiconductor layer have opposite conductivity types; The semiconductor substrate includes a first surface and a second surface opposite to each other; the first surface includes a first region and a second region alternately spaced apart, and a third region located between the first region and the second region; the first region, the third region, and the second region are arranged along a first direction; The first doped semiconductor layer is disposed in the first region and the third region; The second doped semiconductor layer is disposed on the second region and extends to cover at least a portion of the first doped semiconductor layer in the third region; The transparent conductive layer covers the second doped semiconductor layer and the first doped semiconductor layer; The transparent conductive layer has an insulating groove to physically insulate the portion of the transparent conductive layer corresponding to the first region from the portion of the transparent conductive layer corresponding to the second region; or, the transparent conductive layer only covers the second doped semiconductor layer. The second doped semiconductor layer includes a reverse leakage portion, which is electrically connected to the first doped semiconductor layer, and the reverse leakage portion is covered by the transparent conductive layer extending from the second region.

2. The back contact battery according to claim 1, characterized in that, At least a portion of the third region is a reverse leakage region; In the reverse leakage region, the portion of the transparent conductive layer extending from the second region into the third region is a first transparent conductive portion, and the first transparent conductive portion is electrically connected to the first doped semiconductor layer through the second doped semiconductor layer. The width of the first transparent conductive portion in the first direction is W1, and the width of the third region in the first direction is W2. The ratio of W1 to W2 is greater than or equal to 10% and less than or equal to 90%.

3. The back contact battery according to claim 2, characterized in that, The portion of the transparent conductive layer extending from the first region into the third region is the second transparent conductive portion; the width of the second transparent conductive portion in the first direction is W3, and the ratio of W3 to W2 is less than or equal to 80%.

4. The back contact battery according to claim 2, characterized in that, The reverse leakage area is continuously distributed along the second direction, and the second direction intersects with the first direction; The ratio of W1 to W2 is greater than or equal to 10% and less than or equal to 70%.

5. The back contact battery according to claim 2, characterized in that, The reverse leakage region is discontinuously distributed along the second direction, and the second direction intersects with the first direction; along the second direction, the first transparent conductive part has a continuous region and a discontinuous region; Along the second direction, the ratio of the length of the discontinuous region to the length of the continuous region is less than or equal to 90%; and / or, The ratio of W1 to W2 is greater than or equal to 20% and less than or equal to 90%; and / or, The ratio of the width of the continuous region to the length of the continuous region is greater than or equal to 1:500 and less than or equal to 5:

1.

6. The back contact battery according to claim 5, characterized in that, The portion of the transparent conductive layer disposed in the second region is a third transparent conductive portion; the portion of the third transparent conductive portion corresponding to the discontinuity region has a notch. The width of the notch in the first direction is less than or equal to 100 μm.

7. The back contact battery according to claim 1, characterized in that, The thickness of the first doped semiconductor layer is greater than the thickness of the second doped semiconductor layer; The first doped semiconductor layer includes a corner region; The corner region extends from the root of the sidewall of the first doped semiconductor layer to the edge of the first doped semiconductor layer near the sidewall; The reverse leakage portion is located within the corresponding range of the corner region of the first doped semiconductor layer.

8. The back contact battery according to claim 7, characterized in that, The reverse leakage section is located only on the side wall of the corner area; Alternatively, the reverse leakage portion covers the entire corner area; Alternatively, along the direction from the edge of the first region to the center of the first region, the width of the corner region is less than 100 nm; Alternatively, along the direction from the edge of the first region to the center of the first region, the second doped semiconductor layer extends from above the corner region to cover the remaining portion of the first doped semiconductor layer; the back contact battery also includes a first insulating layer; the first insulating layer is disposed between the remaining portion of the first doped semiconductor layer and the second doped semiconductor layer.

9. The back contact battery according to claim 1, characterized in that, The edge of the transparent conductive layer extending from the second region on the side closest to the first region is the first edge. The first edge has a periodically repeating alternating convex and concave structure, and the transition line between the convex and concave parts in the alternating convex and concave structure is not parallel to the first direction.

10. The back contact battery according to claim 9, characterized in that, The transition line is a curve or a sloping line; Alternatively, the first edge line may be a wavy line, a sawtooth line, or a trapezoidal broken line; Alternatively, if the transition line is a diagonal line, the angle between the diagonal line and the first direction is greater than or equal to 5° and less than or equal to 85°. Alternatively, within a unit length of 1 cm along the length extension direction of the first edge line, the number of convex and concave structures in the alternating convex and concave structure is greater than or equal to 1 and less than or equal to 200.

11. The back contact battery according to claim 1, characterized in that, A leakage channel and an isolation portion are disposed at intervals between the first doped semiconductor layer and the second doped semiconductor layer; the first end of the leakage channel is connected to the first doped semiconductor layer, and the second end of the leakage channel is covered by the second doped semiconductor layer and the transparent conductive layer; Wherein, the first end of the isolation portion is connected to the first doped semiconductor layer, the second end of the isolation portion is covered by the second doped semiconductor layer and the transparent conductive layer, and the doping concentration of the leakage channel is greater than the doping concentration of the isolation portion; Alternatively, the first end of the isolation portion is connected to the first doped semiconductor layer, the second end of the isolation portion is connected to the second doped semiconductor layer, the material of the isolation portion is an insulating material, or the material of the isolation portion is a semiconductor material and the second end of the isolation portion is not covered by the transparent conductive layer.

12. The back contact battery according to claim 1, characterized in that, The first surface includes a central region and an edge region disposed on the outer periphery of the central region; the width of the edge region is less than or equal to 1 mm in the direction from the geometric center of the first surface to the edge. Only a portion of the first doped semiconductor layer and only a portion of the second doped semiconductor layer are electrically connected to form a reverse leakage region; The reverse leakage current region is at least located within the edge region, and the distribution density of the reverse leakage current region within the edge region is greater than the distribution density of the reverse leakage current region within the central region.

13. The back contact battery according to claim 1, characterized in that, The doping concentration of the dopant in the first doped semiconductor layer and / or the second doped semiconductor layer is greater than or equal to 1E19 cm⁻¹. -3 And less than or equal to 5E20cm -3 ; and / or, The thickness of the first doped semiconductor layer is greater than or equal to 50 nm and less than or equal to 200 nm; and / or, The crystallinity of the second doped semiconductor layer is less than or equal to 60%; and / or, The thickness of the second doped semiconductor layer is greater than or equal to 5 nm and less than or equal to 50 nm; and / or, The conductivity of the second doped semiconductor layer is greater than or equal to 10E-5 S / cm and less than or equal to 1 S / cm.

14. The back contact battery according to claim 1, characterized in that, The semiconductor substrate is a silicon substrate; and / or, When the first doped semiconductor layer is formed on the first region and the third region, the back contact battery further includes a first interface passivation layer located between the first doped semiconductor layer and the semiconductor substrate; and or, The back contact battery further includes a second interface passivation layer, which is located between the second region of the first surface and the second doped semiconductor layer, and extends between the second doped semiconductor layer and the first doped semiconductor layer.

15. The back contact battery according to claim 14, characterized in that, The thickness of the second interface passivation layer is greater than or equal to 2 nm and less than or equal to 20 nm; or, When the doping concentration of the dopant in the first doped semiconductor layer is greater than or equal to 1E19cm -3 And less than or equal to 5E19cm -3 When the thickness of the second interface passivation layer is greater than or equal to 5 nm and less than or equal to 15 nm; or, When the doping concentration of the dopant in the first doped semiconductor layer is greater than 5E19cm -3 And less than or equal to 1E20cm -3 When the thickness of the second interface passivation layer is greater than or equal to 6 nm and less than or equal to 17 nm; or, When the doping concentration of the dopant in the first doped semiconductor layer is greater than 1E20cm -3 And less than or equal to 5E20cm -3 At that time, the thickness of the second interface passivation layer is greater than or equal to 7nm and less than or equal to 20nm.

16. The back contact battery according to claim 14, characterized in that, In the case where the back contact battery includes the first interface passivation layer and the second interface passivation layer, the first interface passivation layer and the first doped semiconductor layer constitute a first passivation contact structure, and the second interface passivation layer and the second doped semiconductor layer constitute a second passivation contact structure; wherein... The passivation contact types of the first passivation contact structure and the second passivation contact structure are different; and / or, the thermal stability of the first passivation contact structure is greater than that of the second passivation contact structure; and / or, the first passivation contact structure is a tunneling passivation contact structure; and / or, the second passivation contact structure is a heterogeneous contact structure.

17. The back contact battery according to any one of claims 1 to 16, characterized in that, The back contact battery further includes a surface passivation layer disposed on one side of the second surface of the semiconductor substrate; the surface passivation layer includes an intrinsic semiconductor passivation layer and a silicon nitride passivation layer sequentially stacked on one side of the second surface along the thickness direction of the semiconductor substrate; the material of the intrinsic semiconductor passivation layer includes at least one of amorphous silicon, microcrystalline silicon and nanocrystalline silicon.

18. The back contact battery according to any one of claims 1 to 16, characterized in that, The cross-sectional area of ​​the insulating trench gradually decreases along the direction close to the semiconductor substrate; and / or, In the transparent conductive layer, the portions of the orthographic projection on the first surface that do not overlap with the orthographic projection of the insulating groove on the first surface have the same thickness along the first direction.

19. The back contact battery according to claim 1, characterized in that, The degree of crystallization of at least a portion of the second doped semiconductor layer located in the second region is greater than the degree of crystallization of the portion of the second doped semiconductor layer corresponding to the first transparent conductive portion; Alternatively, the degree of crystallization of at least a portion of the second doped semiconductor layer in the second region is greater than the degree of crystallization of the portion of the second doped semiconductor layer in the third region; Alternatively, the degree of crystallization of at least a portion of the second doped semiconductor layer located in the second region is greater than the degree of crystallization of the portion of the second doped semiconductor layer covering the sidewall; The sidewall is located at the boundary between the third region and the second region.

20. The back contact battery according to claim 1, characterized in that, The second doped semiconductor layer is divided into a high crystallinity region and a low crystallinity region; the degree of crystallinity of the portion of the second doped semiconductor layer located in the low crystallinity region is less than the degree of crystallinity of the portion of the second doped semiconductor layer located in the high crystallinity region. In the second doped semiconductor layer, at least a portion corresponding to the first transparent conductive portion is located in the low crystallinity region, and at least a portion corresponding to the second region is located in the high crystallinity region.

21. The back contact battery according to claim 20, characterized in that, The low crystallinity region is located within the third region; Alternatively, along the first direction, one edge of the low crystallinity region is located within the third region, and the other edge extends to the sidewall; the sidewall is located at the boundary between the third region and the second region; Alternatively, along the first direction, one edge of the low crystallinity region is located within the third region, and the other edge extends into the second region; Alternatively, the highly crystallized region corresponds to the entire second region.

22. A photovoltaic module, characterized in that, Including the back contact battery as described in any one of claims 1 to 21.

23. A method for manufacturing a back-contact battery, characterized in that, include: Provide a semiconductor substrate; The semiconductor substrate includes a first surface and a second surface opposite to each other; the first surface includes a first region and a second region, and a third region located between the first region and the second region; the first region, the third region and the second region are arranged along a first direction; A first doped semiconductor layer is formed in the first region and the third region; A second doped semiconductor layer is formed on the second region and extends to cover the portion of the first doped semiconductor layer on the side opposite to the semiconductor substrate that corresponds to the third region; the second doped semiconductor layer and the first doped semiconductor layer have opposite conductivity types; Form a transparent conductive layer; The transparent conductive layer covers the second doped semiconductor layer and the first doped semiconductor layer; The transparent conductive layer has insulating grooves to separate the portion of the transparent conductive layer corresponding to the first region and the portion of the transparent conductive layer corresponding to the second region; or, the transparent conductive layer only covers the second doped semiconductor layer. The second doped semiconductor layer includes a reverse leakage portion, which is electrically connected to the first doped semiconductor layer, and the reverse leakage portion is covered with the transparent conductive layer extending from the second region.

24. The method for manufacturing a back contact battery according to claim 23, characterized in that, The formation of the first doped semiconductor layer disposed in the first region and the third region includes: A first doped semiconductor layer is formed entirely on or within the first surface; An insulating mask layer is formed on the portion of the first doped semiconductor layer corresponding to the first region and the third region; Under the protection of the insulating mask layer, the portion of the first doped semiconductor layer corresponding to the second region is removed; Remove the insulating mask layer.

25. The method for manufacturing a back contact battery according to claim 23, characterized in that, The formation of the first doped semiconductor layer disposed in the first region and the third region includes: forming a first doped semiconductor layer disposed entirely on or within the first surface; and selectively removing a portion of the first doped semiconductor layer corresponding to the second region using a laser etching process; and / or... The formation of the second doped semiconductor layer disposed on the second region and extending to cover the portion of the first doped semiconductor layer on the side opposite to the semiconductor substrate corresponding to the third region includes: forming a second doped semiconductor layer entirely disposed on the first doped semiconductor layer and the second region; and selectively removing the portion of the second doped semiconductor layer corresponding to the first region using a laser etching process; and / or, The formation of the transparent conductive layer covering the second doped semiconductor layer and the first doped semiconductor layer includes: forming a transparent conductive layer that is entirely disposed on the first doped semiconductor layer and the second doped semiconductor layer; and using a laser etching process to form the insulating trench in the transparent conductive layer.

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