Voltage-controlled magnetic anisotropy device and spin-orbit torque magnetic device

The CIM solution using VCMA MeRAM with an on-chip electromagnet addresses inefficiencies in AI computation by enhancing power efficiency and reducing costs through vector-matrix multiplication.

WO2025264788A1 Publication Date: 2025-12-26WESTERN DIGITAL TECHNOLOGIES INC
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Patent Information

Application Number
PCT/US2025/034140
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-10-22
Filing Date
2025-06-18
Publication Date
2025-12-26

AI Technical Summary

Technical Problem

Conventional computing units struggle to meet the demands of large language models due to high power consumption and financial costs in artificial intelligence (AI) computation, and existing resistance-based technologies like ReRAM and STT-MRAM are inefficient for programmability and energy consumption.

Method used

A compute-in-memory (CIM) solution using voltage-controlled-magnetic-anisotropy (VCMA) MeRAM with an on-chip electromagnet for performing vector-matrix multiplication, eliminating the need for external magnetic fields and improving power efficiency.

Benefits of technology

The CIM solution enhances power efficiency and reduces costs for AI operations by utilizing VCMA MeRAM arrays for VMM calculations, addressing inefficiencies in existing technologies.

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Abstract

A device includes an array of magnetic unit cells located over a substrate, where each of the magnetic unit cells includes a magnetic tunnel junction, first nonmagnetic, electrically conductive lines electrically contacting respective row magnetic tunnel junctions, second nonmagnetic, electrically conductive lines contacting a respective column of magnetic tunnel junctions, and a soft magnetic material layer. A magnetoelectric device includes an array of magnetoelectric unit cells located over a substrate, and each of the cells includes a first electrode, a second electrode, and a magnetic tunnel junction located between the first electrode and the second electrode, word lines contacting a respective row of first electrodes of the array of magnetoelectric unit cells, bit lines contacting a respective column of second electrodes of the array of magnetoelectric unit cells, and an electromagnet located over the substrate and configured to apply a magnetic field to the array of magnetoelectric unit cells.
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