Thin-film cell and preparation method therefor, photovoltaic system, tandem cell, and apparatus

Abstract

The present application provides a thin-film cell and a preparation method therefor, a photovoltaic system, a tandem cell, and an apparatus. The thin-film cell comprises a substrate, a first electrode layer, a semiconductor layer, and a second electrode layer that are sequentially stacked. The thin-film cell further comprises a first scribe line group, a second scribe line group, and a third scribe line group. The semiconductor layer comprises a first semiconductor layer and a second semiconductor layer. The first electrode layer, the first semiconductor layer, and the second electrode layer form a plurality of sub-cells arranged in a second direction, and the plurality of sub-cells are structurally separated and connected in series by means of the scribe line groups. The first electrode layer, the second semiconductor layer, and the second electrode layer form a plurality of diodes arranged in the second direction, the plurality of diodes are structurally separated by means of the scribe line groups, and the scribe line groups further enable one diode to be connected in parallel to a plurality of sub-cells.

Description

Thin film battery and method of manufacturing the same, photovoltaic system, stacked battery and device

[0001] Cross Reference to Related Applications

[0002] The present disclosure is based on and claims priority to Chinese Patent Application No. 202410867584.6, filed on June 28, 2024, entitled “Thin film battery and method of manufacturing the same, photovoltaic system, power consuming device, power generating device”, the entire contents of which are incorporated herein by reference. TECHNICAL FIELD

[0003] The present disclosure relates to the technical field of battery, and in particular to a thin film battery and method of manufacturing the same, photovoltaic system, stacked battery and device. BACKGROUND

[0004] The thin film battery is a kind of high-efficiency, light and thin solar cell, which has the advantages of low cost, light weight and good flexibility. It can convert light energy into electrical energy and is suitable for various scenes such as buildings, cars and portable devices.

[0005] At present, the sub-cells in a single thin film battery (such as a thin film solar module) are in a full series structure, which leads to that when a single sub-cell is shaded, the hot spot effect will make it bear a reverse bias, and when it is completely shaded, the reverse voltage borne by the sub-cell can reach the sum of the voltages generated by the remaining sub-cells in the series circuit (e.g., more than 100V), thereby breaking down the shaded sub-cell and causing damage to the thin film battery. SUMMARY

[0006] The present disclosure provides a thin film battery and method of manufacturing the same, photovoltaic system, stacked battery and device, which can simultaneously manufacture sub-cells and bypass diodes in the process, thereby avoiding damage to the sub-cells caused by the hot spot effect.

[0007] A first aspect of the present disclosure provides a thin film battery, comprising:

[0008] a substrate;

[0009] a first electrode layer, the first electrode layer is located on one side of the substrate along a third direction, and the first electrode layer is cut by a first set of scribe grooves along the third direction;

[0010] a semiconductor layer, the semiconductor layer is located on a side of the first electrode layer away from the substrate along the third direction, and the semiconductor layer comprises a first semiconductor layer and a second semiconductor layer in sequence along a first direction; and the semiconductor layer is cut by a second set of scribe grooves along the third direction;

[0011] The second electrode layer is located on the side of the semiconductor layer away from the first electrode layer along the third direction, and the second electrode layer is cut by the third set of scribe lines along the third direction;

[0012] The first electrode layer, the first semiconductor layer, and the second electrode layer are used to form a plurality of sub-cells arranged along the second direction, and the plurality of sub-cells are structurally separated and connected in series by the set of scribe lines; the first electrode layer, the second semiconductor layer, and the second electrode layer are used to form a plurality of diodes arranged along the second direction, and the plurality of diodes are structurally separated by the set of scribe lines; for a region of the semiconductor layer corresponding to a diode, the region is electrically connected to a region of the first electrode layer corresponding to a sub-cell, and the region is also electrically connected to a region of the second electrode layer corresponding to a sub-cell, so that one diode and a plurality of sub-cells form a parallel relationship, and the first direction, the second direction, and the third direction intersect each other.

[0013] Thus, the semiconductor layer in the thin-film battery simultaneously includes the first semiconductor layer for forming sub-cells and the second semiconductor layer for forming diodes, thereby simultaneously forming a plurality of sub-cells connected in series and a plurality of diodes, and the parallel relationship between each diode and a plurality of sub-cells can also be achieved through the design of the first electrode layer and the second electrode layer, thereby providing a bypass diode for each or a plurality of sub-cells, and the bypass diode can lead out the reverse voltage generated by the hot spot effect, thereby avoiding the breakdown of the corresponding sub-cells.

[0014] In some embodiments, the first semiconductor layer at least includes a light-absorbing layer; the second semiconductor layer at least includes a first carrier polarity layer and a second carrier polarity layer stacked in sequence along the third direction on the side of the first electrode layer away from the substrate, and the first carrier polarity layer is close to the first electrode layer; the semiconductor types of the first carrier polarity layer and the second carrier polarity layer are different.

[0015] Thus, the thin-film battery can be a solar cell, thereby improving the service life and connection flexibility of the solar cell; the first carrier polarity layer and the second carrier polarity layer with different doping types are used to form the PN junction of the diode, thereby directly constructing a parallel bypass diode inside the perovskite solar module, which is low in cost and small in overall battery size.

[0016] In some embodiments, the thin-film battery satisfies any one of the following conditions:

[0017] (1) The first semiconductor layer includes a first transport layer and a light-absorbing layer stacked in sequence along the third direction, and the first transport layer is close to the first electrode layer; wherein, in the case that the first transport layer is an electron transport layer, the first carrier polarity layer is a p-type semiconductor and the second carrier polarity layer is an n-type semiconductor; in the case that the first transport layer is a hole transport layer, the first carrier polarity layer is an n-type semiconductor and the second carrier polarity layer is a p-type semiconductor;

[0018] Thus, the first transport layer and the second transport layer are beneficial to the extraction and transport of the electron-hole pairs generated by the light-absorbing layer, and the charge transport efficiency of the solar cell is improved; meanwhile, the doping sequence of the doped material layer is different for the normal or reverse type of the cell structure, so that the anode of each diode is connected to the current input end of the sub-cell, and the cathode of each diode is connected to the current output end of the sub-cell, without affecting the normal working state of the sub-cell and being able to lead out the reverse bias generated by the hot spot effect.

[0019] (2) The first semiconductor layer comprises the light-absorbing layer and the second transport layer which are sequentially stacked along the third direction, and the light-absorbing layer is close to the first electrode layer; wherein, in the case that the second transport layer is an electron transport layer, the first carrier polarity layer is an n-type semiconductor and the second carrier polarity layer is a p-type semiconductor; in the case that the second transport layer is a hole transport layer, the first carrier polarity layer is a p-type semiconductor and the second carrier polarity layer is an n-type semiconductor.

[0020] Thus, the second transport layer is beneficial to the extraction and transport of the electrons or holes generated by the light-absorbing layer, and the charge transport efficiency of the solar cell is improved; the doping sequence of the doped material layer is different for the different types of the second transport layer, so that the anode of each diode is connected to the current input end of the sub-cell or the sub-cell string connected in parallel thereto, and the cathode of each diode is connected to the current output end of the sub-cell or the sub-cell string connected in parallel thereto, without affecting the normal working state of the sub-cell and being able to lead out the reverse bias generated by the hot spot effect.

[0021] (3) The first semiconductor layer comprises the first transport layer, the light-absorbing layer and the second transport layer which are sequentially stacked along the third direction, and the first transport layer is close to the first electrode layer; wherein, in the case that the first transport layer is an electron transport layer and the second transport layer is a hole transport layer, the first carrier polarity layer is a p-type semiconductor and the second carrier polarity layer is an n-type semiconductor; in the case that the first transport layer is a hole transport layer and the second transport layer is an electron transport layer, the first carrier polarity layer is an n-type semiconductor and the second carrier polarity layer is a p-type semiconductor.

[0022] Thus, the first transport layer and the second transport layer are beneficial to the extraction and transport of the electron-hole pairs generated by the light-absorbing layer, and the charge transport efficiency of the solar cell is improved; meanwhile, the doping sequence of the doped material layer is different for the normal or reverse type of the cell structure, so that the anode of each diode is connected to the current input end of the sub-cell or the sub-cell string connected in parallel thereto, and the cathode of each diode is connected to the current output end of the sub-cell or the sub-cell string connected in parallel thereto, without affecting the normal working state of the sub-cell and being able to lead out the reverse bias generated by the hot spot effect.

[0023] In some embodiments, when the second transport layer is an electron transport layer, the first semiconductor layer further comprises a blocking layer between the second transport layer and the second electrode layer; the material of the blocking layer is the same as the material of the first carrier polarity layer in the second semiconductor layer.

[0024] In some embodiments, when the first transport layer is a hole transport layer and the second transport layer is an electron transport layer, the first semiconductor layer further comprises a blocking layer between the second transport layer and the second electrode layer; the material of the blocking layer is the same as the material of the first carrier polarity layer in the second semiconductor layer.

[0025] Thus, for the thin-film battery of the reverse structure, the material of the blocking layer is the same as the material of the first carrier polarity layer in the second semiconductor layer, so that the blocking layer and the first carrier polarity layer can be formed simultaneously in one step without additional preparation steps.

[0026] In some embodiments, the first set of scribe grooves comprises a plurality of first horizontal scribe grooves arranged along the second direction, the second set of scribe grooves comprises a plurality of second scribe grooves arranged along the second direction, and the third set of scribe grooves comprises a plurality of third horizontal scribe grooves arranged along the second direction; each of the first, second, and third horizontal scribe grooves extends along the first direction; each first horizontal scribe groove is flanked by a second scribe groove along the second direction, each second scribe groove is flanked by a third horizontal scribe groove away from the closest first horizontal scribe groove, and sequentially adjacent first, second, and third horizontal scribe grooves are used to separate and connect in series two adjacent sub-batteries.

[0027] Thus, by the first, second, and third horizontal scribe grooves, the separation and series connection of different sub-batteries, and the separation of different diodes can be achieved.

[0028] In some embodiments, the thin-film battery comprises a fourth scribe groove, at least part of the semiconductor layer is cut by the fourth scribe groove along the third direction; the fourth scribe groove extends along the second direction, and the first semiconductor layer and the second semiconductor layer are isolated by the fourth scribe groove.

[0029] Thus, by adding the fourth scribe groove, the diode region is more regular, and the sub-battery and the diode can be isolated to ensure that the circuit can work normally.

[0030] In some embodiments, when one diode and one sub-battery form a parallel relationship, the first, second, and third horizontal scribe grooves all extend from a first edge of the thin-film battery to a second edge of the thin-film battery, and the first edge and the second edge are opposite along the first direction.

[0031] Thus, the first and second scribe groove group patterns are simple, and one bypass diode is provided for each diode by adding the fourth scribe groove and the second semiconductor layer, so the process is simple and the cost is low.

[0032] In some embodiments, the first semiconductor layer is divided into two parts along the first direction, the second semiconductor layer is divided into two parts along the first direction, the number of the fourth scribe grooves is three, the first fourth scribe groove is used to isolate the first part of the first semiconductor layer and the first part of the second semiconductor layer, the second fourth scribe groove is used to isolate the second part of the second semiconductor layer and the second part of the first semiconductor layer, and the third fourth scribe groove is used to isolate the first part of the second semiconductor layer and the second part of the second semiconductor layer; the first scribe groove group further comprises a fifth scribe groove extending along the second direction, and the fifth scribe groove extends from the third edge of the thin-film battery to the fourth edge of the thin-film battery; along the first direction, the projection of the fifth scribe groove is located between the first fourth scribe groove and the second fourth scribe groove; the third scribe groove group further comprises a sixth scribe groove extending along the second direction, and the sixth scribe groove extends from the third edge of the thin-film battery to the fourth edge of the thin-film battery; along the second direction, the projection of the sixth scribe groove is located between the first fourth scribe groove and the second fourth scribe groove.

[0033] In some embodiments, in the case that one diode is in parallel connection with N sub-cells: the first scribe groove group further comprises a plurality of first vertical scribe grooves, and the third scribe groove group further comprises a plurality of third vertical scribe grooves, each of the first and third vertical scribe grooves extending along the second direction; for N+1 first horizontal scribe grooves corresponding to the N sub-cells, the first horizontal scribe grooves at the beginning and the end extend from the first edge to the second edge of the thin-film battery; the first horizontal scribe grooves in the middle part extend from the first edge, and the length of the first horizontal scribe grooves in the middle part is less than that of the first horizontal scribe grooves at the beginning and the end; the first vertical scribe groove extends from one end of the Nth first horizontal scribe groove close to the second edge to the first first horizontal scribe groove; for N+1 second scribe grooves corresponding to the N sub-cells, the second scribe grooves at the beginning and the end extend from the first edge to the second edge of the thin-film battery; the second scribe grooves in the middle part extend from the first edge to the fourth scribe groove; for N+1 third horizontal scribe grooves corresponding to the N sub-cells, the third horizontal scribe grooves at the beginning and the end extend from the first edge to the second edge of the thin-film battery; the third horizontal scribe grooves in the middle part extend from the first edge, and the length of the third horizontal scribe grooves in the middle part is less than that of the third horizontal scribe grooves at the beginning and the end; the third vertical scribe groove extends from one end of the second third horizontal scribe groove close to the second edge to the last third horizontal scribe groove; the distance between each of the first vertical scribe groove, the fourth scribe groove and the third vertical scribe groove and the second edge of the thin-film battery is the same; wherein N is a positive integer greater than or equal to 2.

[0034] Thus, by changing the patterns of the first, second and third scribe groove groups, the number of sub-cells in parallel (sub-cells in series) for each diode can also be adjusted, which can adapt to more working scenarios.

[0035] In some embodiments, the first, fourth and third vertical scribe grooves each have the same distance from the second edge of the thin-film battery.

[0036] In some embodiments, in the case where one diode and N sub-cells form a parallel relationship:

[0037] The first semiconductor layer is divided into two parts along the first direction, the second semiconductor layer is divided into 2 parts along the first direction, the number of fourth scribe grooves is 3, the first fourth scribe groove is used to isolate the first semiconductor layer of the first part and the second semiconductor layer of the first part, the second fourth scribe groove is used to isolate the second semiconductor layer of the second part and the first semiconductor layer of the second part, and the third fourth scribe groove is used to isolate the second semiconductor layer of the first part and the second semiconductor layer of the second part; the first scribe groove group further includes three fifth scribe grooves, the first and third fifth scribe grooves each extend along the fourth edge of the thin-film battery to the first horizontal scribe groove closest to the third edge of the thin-film battery; the second fifth scribe groove extends along the fourth edge of the thin-film battery to the closest to the third edge of the thin-film battery; the third scribe groove group further includes three sixth scribe grooves, the first and third sixth scribe grooves each extend along the third edge of the thin-film battery to the first horizontal scribe groove closest to the fourth edge of the thin-film battery; the second sixth scribe groove extends along the third edge of the thin-film battery to the closest to the fourth edge of the thin-film battery; the first, second and third fifth scribe grooves are aligned along the third direction; the first, second and third sixth scribe grooves are aligned along the third direction; the first, second and third fifth scribe grooves are aligned along the third direction.

[0038] In some embodiments, for a part of the first horizontal scribe groove, it extends from the first edge to the first fifth scribe groove, and for another part of the first horizontal scribe groove, it extends from the third fifth scribe groove to the second edge; for a part of the second scribe groove, it extends from the first edge to the first fourth scribe groove, and for another part of the second scribe groove, it extends from the third fourth scribe groove to the second edge; for a part of the third horizontal scribe groove, it extends from the first edge to the first sixth scribe groove, and for another part of the third horizontal scribe groove, it extends from the third sixth scribe groove to the second edge.

[0039] In some embodiments, the thin-film battery satisfies one or more of conditions (1)-(4): (1) the width of the first semiconductor layer along the first direction is greater than the width of the second semiconductor layer along the second direction; (2) the maximum operating current of the diode under forward bias is greater than or equal to the maximum power point current of the corresponding series of sub-cell strings passing through the diode under forward bias; (3) the thickness of the first carrier polarity layer along the third direction is 1-1000 nm; and (4) the thickness of the second carrier polarity layer along the third direction is 1-1000 nm.

[0040] In some embodiments, the thin-film battery satisfies one or more of conditions (1)-(2): (1) the width of the first semiconductor layer along the first direction is 0.1-50%, optionally 1-10%, and further optionally 1-3% of the width of the second semiconductor layer along the second direction; and (2) the maximum operating current of the diode under forward bias is greater than or equal to the short-circuit current of the corresponding series of sub-cell strings passing through the diode under forward bias.

[0041] In some embodiments, the thin-film battery satisfies one or more of conditions (1)-(7): (1) in the second direction, the distance between the first horizontal scribe groove and the nearest second scribe groove is 1-50 microns; in the second direction, the distance between the second scribe groove and the nearest third horizontal scribe groove is 1-50 microns; (2) the width of the second semiconductor layer along the first direction is 5-20 mm; (3) the light-absorbing layer in the semiconductor layer is at least allowed to be a perovskite layer; (4) the blocking layer material in the semiconductor layer is at least allowed to be tin oxide SnO2; (5) the n-type semiconductor is at least allowed to be SnO2, poly[di-benzo-thiadiazolo-benzothiadiazole] C8-BTBT, titanium oxide TiO2, or N,N'-bis[3-(dimethylamino)propyl]perylene-3,4,9,10-tetracarboxylic diimide PDIN; (5) the p-type semiconductor is at least allowed to be nickel oxide NiO x , molybdenum trioxide MoO3, poly[di(4-phenyl)(2,4,6-trimethylphenyl)amine PTAA, poly(3,4-ethylenedioxythiophene)-poly(styrenesulfonic acid) PEDOT:PSS, or 3-hexylthiophene polymer P3HT; and (6) the third scribe groove group also cuts the semiconductor layer.

[0042] In some embodiments, (1) the width of the fourth scribe groove along the first direction is greater than or equal to 0 mm.

[0043] In this way, the process difficulty of implementation can be reduced while reducing the dead area.

[0044] A second aspect of the present disclosure provides a method for manufacturing a thin-film battery, the method comprising:

[0045] providing a substrate;

[0046] forming a first electrode layer on one side of the substrate along the third direction, and processing the first electrode layer along the third direction to form a first scribe groove set;

[0047] forming a semiconductor layer on the side of the first electrode layer away from the substrate along the third direction, the semiconductor layer comprising a first semiconductor layer and a second semiconductor layer in sequence along the first direction; and processing the semiconductor layer along the third direction to form a second scribe groove set;

[0048] forming a second electrode layer on the side of the semiconductor layer away from the first electrode layer along the third direction, and processing the second electrode layer along the third direction to form a third scribe groove set;

[0049] The first electrode layer, the first semiconductor layer and the second electrode layer are used to form a plurality of sub-cells arranged along the second direction, and the plurality of sub-cells are structurally separated and connected in series by the scribe groove sets; the first electrode layer, the second semiconductor layer and the second electrode layer are used to form a plurality of diodes arranged along the second direction, and the plurality of diodes are structurally separated by the scribe groove sets; for a region in the semiconductor layer corresponding to a diode, it is electrically connected to a region in the first electrode layer corresponding to a sub-cell, and it is also electrically connected to a region in the second electrode layer corresponding to a sub-cell, so that one diode and several sub-cells form a parallel relationship, and the first direction, the second direction and the third direction intersect with each other.

[0050] Here, the processing means for generating the above scribe grooves at least includes one or more of the following: laser cutting, mask plate method, mechanical splicing.

[0051] Thus, the semiconductor layer in the thin-film battery simultaneously includes the first semiconductor layer for forming the sub-cells and the second semiconductor layer for forming the diodes, so as to simultaneously form a plurality of sub-cells connected in series and a plurality of diodes, and the parallel relationship between each diode and several sub-cells can also be realized through the design of the first electrode layer and the second electrode layer, so as to provide a bypass diode for each sub-cell, and the bypass diode can lead out the reverse voltage generated by the hot spot effect, so as to avoid the corresponding sub-cell being broken down.

[0052] In some embodiments, the first semiconductor layer at least includes a light-absorbing layer; the second semiconductor layer at least includes a first carrier polarity layer and a second carrier polarity layer stacked in sequence along the third direction on the side of the first electrode layer away from the substrate, and the first carrier polarity layer is close to the first electrode layer; the semiconductor types of the first carrier polarity layer and the second carrier polarity layer are different.

[0053] Therefore, the thin-film battery can be a solar cell, thereby improving the service life and connection flexibility of the solar cell; the first carrier polarity layer and the second carrier polarity layer with different doping types are used to form a PN junction of a diode, thereby directly constructing a parallel bypass diode inside the perovskite solar module, which is low in cost and small in overall battery size.

[0054] In some embodiments, the first scribe groove group includes a plurality of first horizontal scribe grooves arranged along the second direction, the second scribe groove group includes a plurality of second scribe grooves arranged along the second direction, and the third scribe groove group includes a plurality of third horizontal scribe grooves arranged along the second direction. Each of the first, second, and third horizontal scribe grooves extends along the first direction. Each first horizontal scribe groove is adjacent to a second scribe groove along one side of the second direction. Each second scribe groove is adjacent to a third horizontal scribe groove away from the closest first horizontal scribe groove. Successively adjacent first, second, and third horizontal scribe grooves are used to separate and connect two adjacent sub-cells in series. The thin-film battery includes a fourth scribe groove. At least part of the semiconductor layer is cut by the fourth scribe groove along the third direction. The fourth scribe groove extends along the second direction, and the first and second semiconductor layers are isolated by the fourth scribe groove.

[0055] Therefore, the first, second, and third horizontal scribe grooves can separate and connect different sub-cells in series. The fourth scribe groove can isolate the sub-cells and the diode, thereby making the circuit connection relationship clear.

[0056] In some embodiments, the fourth scribe groove extends from a third edge of the thin-film battery to a fourth edge of the thin-film battery. The third edge and the fourth edge are opposite along the second direction.

[0057] In some embodiments, the first semiconductor layer includes a first transport layer, a light-absorbing layer, and a second transport layer. The semiconductor layer is formed on the first electrode layer along the third direction, including:

[0058] forming a first carrier polarity layer and a second carrier polarity layer in the diode region in sequence; cutting the first transport layer, the light-absorbing layer, the second transport layer, the first carrier polarity layer and the second carrier polarity layer in the third direction to form a plurality of second scribe lines; wherein, in the case that the first transport layer is an electron transport layer and the second transport layer is a hole transport layer, the first carrier polarity layer is P-type doped and the second carrier polarity layer is N-type doped; in the case that the second transport layer is a hole transport layer and the second transport layer is an electron transport layer, the first carrier polarity layer is N-type doped and the second carrier polarity layer is P-type doped.

[0059] Thus, the first transport layer and the second transport layer are beneficial to the extraction and transmission of the electron-hole pairs generated by the light-absorbing layer, and the charge transmission efficiency of the solar cell is improved; meanwhile, for the normal or inverted cell structure, the doping sequence of the doped material layer is also different, so that the anode of each diode is connected with the current input end of the sub-cell, and the cathode of each diode is connected with the current output end of the sub-cell, without affecting the normal working state of the sub-cell and being able to lead out the reverse bias generated by the hot spot effect.

[0060] In some embodiments, the first semiconductor layer includes a hole transport layer, a light-absorbing layer, an electron transport layer and a blocking layer; the semiconductor layer is formed on the first electrode layer in the third direction, including:

[0061] forming a hole transport layer, a light-absorbing layer and an electron transport layer on the first electrode layer in sequence in the third direction; cutting the hole transport layer, the light-absorbing layer and the electron transport layer to form fourth scribe lines; removing the hole transport layer, the light-absorbing layer and the electron transport layer on one side of the fourth scribe lines in the first direction, and the removed region forms a diode region; forming a blocking layer on the electron transport layer and the diode region, and the part of the blocking layer in the diode region serves as a first carrier polarity layer; forming a second carrier polarity layer on the first carrier polarity layer; cutting the hole transport layer, the light-absorbing layer, the electron transport layer, the first carrier polarity layer and the second carrier polarity layer in the third direction to form a plurality of second scribe lines.

[0062] Thus, for the thin-film cell of the inverted structure, the blocking layer and the first carrier polarity layer can be formed at one time, without the need for additional forming steps.

[0063] In some embodiments, the first horizontal scribe groove, the second scribe groove, and the third horizontal scribe groove all extend from the first edge of the thin-film battery to the second edge of the thin-film battery, the first edge and the second edge being opposite along the first direction, in a case where one diode is formed in parallel with one sub-cell.

[0064] Thus, only by adding the fourth scribe groove and the second semiconductor layer, one bypass diode is provided for each diode, the process is simple, and the cost is low.

[0065] In some embodiments, the first semiconductor layer is divided into two parts along the first direction, and the second semiconductor layer is an entirety; the number of the fourth scribe grooves is two; the first fourth scribe groove is used to isolate the first semiconductor layer of the first part and the second semiconductor layer, and the second fourth scribe groove is used to isolate the first semiconductor layer of the second part and the second semiconductor layer; the first scribe groove group further comprises a fifth scribe groove extending along the second direction, and the fifth scribe groove extends from the third edge of the thin-film battery to the fourth edge of the thin-film battery; along the first direction, the projection of the fifth scribe groove is located between the first fourth scribe groove and the second fourth scribe groove; the third scribe groove group further comprises a sixth scribe groove extending along the second direction, and the sixth scribe groove extends from the third edge of the thin-film battery to the fourth edge of the thin-film battery; along the second direction, the projection of the sixth scribe groove is located between the first fourth scribe groove and the second fourth scribe groove.

[0066] In some embodiments, the first scribe groove group further comprises a plurality of first vertical scribe grooves, and the third scribe groove group further comprises a plurality of third vertical scribe grooves, each of the first vertical scribe grooves and the third vertical scribe grooves extending along the second direction; for N+1 first horizontal scribe grooves corresponding to N sub-cells, the first horizontal scribe grooves at the beginning and the end extend from the first edge to the second edge of the thin-film battery; the first horizontal scribe grooves in the middle part extend from the first edge, and the length of the first horizontal scribe grooves in the middle part is less than the length of the first horizontal scribe grooves at the beginning and the end; the first vertical scribe grooves extend from one end of the Nth first horizontal scribe groove close to the second edge to the first first horizontal scribe groove; for N+1 second scribe grooves corresponding to N sub-cells, the second scribe grooves at the beginning and the end extend from the first edge to the second edge of the thin-film battery; the second scribe grooves in the middle part extend from the first edge to the fourth scribe groove; for N+1 third horizontal scribe grooves corresponding to N sub-cells, the third horizontal scribe grooves at the beginning and the end extend from the first edge to the second edge of the thin-film battery; the third horizontal scribe grooves in the middle part extend from the first edge, and the length of the third horizontal scribe grooves in the middle part is less than the length of the third horizontal scribe grooves at the beginning and the end; the third vertical scribe grooves extend from one end of the second third horizontal scribe groove close to the second edge to the last third horizontal scribe groove; wherein N is a positive integer greater than or equal to 2.

[0067] Thus, by changing the structure of the first, second, and third scribe groove groups, the number of sub-cells in parallel (sub-cells in series) for each diode can also be adjusted, which can adapt to more working scenarios.

[0068] In some embodiments, the first, fourth, and third vertical scribe grooves each have the same distance from the second edge of the thin-film battery.

[0069] In some embodiments, in the case where one diode is in parallel with N sub-cells: the first semiconductor layer is divided into two parts along the first direction, the second semiconductor layer is divided into 2 parts along the first direction, the number of fourth scribe grooves is 3, the first fourth scribe groove is used to isolate the first semiconductor layer of the first part and the second semiconductor layer of the first part, the second fourth scribe groove is used to isolate the second semiconductor layer of the first part and the second semiconductor layer of the second part; the third fourth scribe groove is used to isolate the second semiconductor layer of the second part and the first semiconductor layer of the second part; the first scribe groove group further includes 3 fifth scribe grooves, the first and third fifth scribe grooves each extend to the first horizontal scribe groove closest to the third edge of the thin-film battery along the fourth edge of the thin-film battery; the second fifth scribe groove extends to the closest fourth edge of the thin-film battery along the fourth edge of the thin-film battery; the first, second, and third fifth scribe grooves are aligned along the third direction; the first, second, and third fourth scribe grooves are aligned along the third direction; the first, second, and third fifth scribe grooves are aligned along the third direction.

[0070] In some embodiments, for a part of the first horizontal scribe groove, it extends from the first edge to the first fifth scribe groove, and for another part of the first horizontal scribe groove, it extends from the third fifth scribe groove to the second edge; for a part of the second scribe groove, it extends from the first edge to the first fourth scribe groove, and for another part of the second scribe groove, it extends from the third fourth scribe groove to the second edge; for a part of the third horizontal scribe groove, it extends from the first edge to the first sixth scribe groove, and for another part of the third horizontal scribe groove, it extends from the third sixth scribe groove to the second edge.

[0071] In some embodiments, the method further satisfies one or more of conditions (1) to (7):

[0072] (1) In the second direction, the distance between the first horizontal scribe groove and the nearest second scribe groove is 1-50 microns; in the second direction, the distance between the second scribe groove and the nearest third horizontal scribe groove is 1-50 microns;

[0073] (2) The width of the second semiconductor layer along the first direction is 5-20 mm;

[0074] (3) The light-absorbing layer in the semiconductor layer is at least allowed to be a perovskite layer;

[0075] (4) The barrier layer material in the semiconductor layer is at least allowed to be SnO2;

[0076] (5) The doped material layer doped with N-type is at least allowed to be SnO2, C8-BTBT, TiO2, or PDIN, and the thickness of the doped material layer along the third direction is 1-1000 nm;

[0077] (6) The doped material layer doped with P-type is at least allowed to be NiO x , MoO3, PTAA, PEDOT:PSS, or P3HT, and the thickness of the doped material layer along the third direction is 1-1000 nm;

[0078] (7) The third scribe groove group also cuts the semiconductor layer.

[0079] The third aspect of the present disclosure provides a laminated battery, comprising the thin-film battery of the first aspect of the present disclosure and a photoelectric conversion layer, the first semiconductor layer at least comprising a light-absorbing layer, the photoelectric conversion layer being located on one side of the light-absorbing layer along the third direction; wherein the photoelectric conversion layer and the light-absorbing layer have different band gaps.

[0080] In some embodiments, the laminated battery comprises one or more of a mechanical laminated battery and a monolithic integrated laminated battery.

[0081] The fourth aspect of the present disclosure provides a photovoltaic system, comprising the thin-film battery of the first aspect of the present disclosure, or the laminated battery of the third aspect of the present disclosure.

[0082] The photovoltaic system of the present disclosure comprises the aforementioned thin-film battery, and thus has at least the same advantages as the thin-film battery or the laminated battery.

[0083] The fifth aspect of the present disclosure provides a power consuming device comprising the thin film battery of the first aspect of the present disclosure, or comprising the laminated battery of the third aspect of the present disclosure.

[0084] The power consuming device of the present disclosure comprises the aforementioned thin film battery, and thus has at least the same advantages as the thin film battery or the laminated battery.

[0085] The sixth aspect of the present disclosure provides a power generating device comprising the thin film battery of the first aspect of the present disclosure, or comprising the laminated battery of the third aspect of the present disclosure.

[0086] The power generating device of the present disclosure comprises the aforementioned thin film battery, and thus has at least the same advantages as the thin film battery or the laminated battery. BRIEF DESCRIPTION OF DRAWINGS

[0087] Fig. 1 is a schematic diagram of a manufacturing process of a thin film battery according to an embodiment of the present disclosure;

[0088] Fig. 2 is a schematic diagram of a cross section of a thin film battery according to an embodiment of the present disclosure;

[0089] Fig. 3A is a schematic diagram of a cross section of a thin film battery according to an embodiment of the present disclosure;

[0090] Fig. 3B is a schematic diagram of an electrical connection structure of a thin film battery according to an embodiment of the present disclosure;

[0091] Fig. 4A is a schematic diagram of a cross section of a thin film battery according to an embodiment of the present disclosure;

[0092] Fig. 4B is a schematic diagram of an electrical connection structure of a thin film battery according to an embodiment of the present disclosure;

[0093] Fig. 5A is a schematic diagram of a cross section of a thin film battery according to an embodiment of the present disclosure;

[0094] Fig. 5B is a schematic diagram of an electrical connection structure of a thin film battery according to an embodiment of the present disclosure;

[0095] Fig. 6A is a schematic diagram of a cross section of a thin film battery according to an embodiment of the present disclosure;

[0096] Fig. 6B is a schematic diagram of an electrical connection structure of a thin film battery according to an embodiment of the present disclosure;

[0097] Fig. 7 is a schematic diagram of a perspective structure of a thin film battery according to an embodiment of the present disclosure;

[0098] Fig. 8 is a schematic diagram of a cross section of a thin film battery according to an embodiment of the present disclosure;

[0099] Fig. 9 is a schematic diagram of a manufacturing process of a thin film battery according to an embodiment of the present disclosure;

[0100] Fig. 10 is a process diagram of a method for manufacturing a thin-film battery according to an embodiment of the present disclosure;

[0101] Fig. 11 is a structural diagram of a photovoltaic system according to an embodiment of the present disclosure;

[0102] Fig. 12 is a structural diagram of an electrical device according to an embodiment of the present disclosure;

[0103] Fig. 13 is a structural diagram of a power generation device according to an embodiment of the present disclosure;

[0104] The reference numerals are explained as follows: 11 - substrate; 12 - bottom electrode layer; 13 - doped material layer; 131 - first transport material layer; 132 - light functional layer; 133 - second transport material layer; 14 - top electrode layer; 20 - thin-film battery; 21 - first electrode layer; 22 - semiconductor layer; 22a - first semiconductor layer; 22b - second semiconductor layer; 221 - first transport layer; 222 - light absorbing layer; 223 - second transport layer; 224 - barrier layer; 225 - first carrier polarity layer; 226 - second carrier polarity layer; 23 - second electrode layer; P1a - first horizontal scribe groove; P1b - first vertical scribe groove; P2 - second scribe groove; P1.5 - fourth scribe groove; P3a - third horizontal scribe groove; P3b - third vertical scribe groove; P5 - fifth scribe groove; P6 - sixth scribe groove; 60 - photovoltaic system; 70 - electrical device; 80 - power generation device. DETAILED DESCRIPTION

[0105] Hereinafter, specific embodiments of the thin-film battery and the method for manufacturing the same, the photovoltaic system, the stacked battery, and the device according to the present disclosure are described in detail with appropriate reference to the accompanying drawings. However, there are cases where unnecessary detailed descriptions are omitted. For example, there are cases where detailed descriptions of matters that are well known, repeated descriptions of substantially the same structures are omitted. This is to avoid the following description from becoming unnecessarily lengthy and to facilitate understanding by those skilled in the art. Furthermore, the accompanying drawings and the following description are provided so that those skilled in the art can fully understand the present disclosure, and are not intended to limit the subject matter recited in the claims.

[0106] The ranges disclosed herein are defined by their lower and upper endpoints, and given that a range is defined by selecting a lower endpoint and an upper endpoint, the selected lower and upper endpoints define the boundaries of the particular range. Ranges defined in this manner can be inclusive or exclusive of the endpoints, and can be arbitrarily combined, i.e., any lower endpoint can be combined with any upper endpoint to form a range. For example, if ranges of 60-120 and 80-110 are listed, it is understood that ranges of 60-110 and 80-120 are also contemplated. Furthermore, if minimum range values of 1 and 2 are listed, and if maximum range values of 3, 4, and 5 are listed, then the following ranges are all contemplated: 1-3, 1-4, 1-5, 2-3, 2-4, and 2-5. In the present disclosure, unless otherwise stated, a numerical range "a-b" indicates a shorthand way of describing all of the individual real combinations of values that are within the range of a to b, where a and b are both real numbers. For example, the numerical range "0-5" indicates that all of the real numbers between 0 and 5 have been listed herein, and "0-5" is merely a shorthand way of describing these numerical combinations. In addition, when a parameter is stated to be an integer ≥ 2, it is equivalent to disclose that the parameter is, for example, an integer 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, etc.

[0107] Unless otherwise specified, all embodiments and optional embodiments of the present disclosure can be combined with each other to form new technical solutions.

[0108] Unless otherwise specified, all technical features and optional technical features of the present disclosure can be combined with each other to form new technical solutions.

[0109] Unless otherwise specified, all steps of the present disclosure can be performed in sequence or randomly, and preferably in sequence. For example, a method comprising steps (a) and (b) indicates that the method can comprise steps (a) and (b) in sequence, or steps (b) and (a) in sequence. For example, it is mentioned that the method can further comprise step (c), which indicates that step (c) can be added to the method in any order, for example, the method can comprise steps (a), (b) and (c), or steps (a), (c) and (b), or steps (c), (a) and (b), etc.

[0110] Unless otherwise specified, the terms used in the present disclosure have the commonly understood meanings understood by those skilled in the art.

[0111] Unless otherwise specified, the values of the parameters mentioned in the present disclosure can be measured by various test methods commonly used in the art, for example, can be measured according to the test methods given in the present disclosure.

[0112] The doped material layer of a thin film solar module (thin film cell) can absorb photons and be excited into electron-hole pairs, which are then selectively extracted by an interface layer and conducted through an electrode layer, and the carriers form a complete loop through an external load. A conventional thin film solar module (thin film cell) generally adopts a laser scribing method to form a plurality of parallel first scribe grooves P1, P2, P3, and the individual sub-cells on the module are connected in series. Please refer to FIG. 1, which shows the series connection of a conventional thin film solar module. As shown in FIG. 1, the typical formation process of a thin film cell is as follows:

[0113] (1) First, a substrate 11 (e.g., glass) having a bottom electrode layer 12 (e.g., transparent conductive oxide) deposited thereon is provided, and a plurality of parallel first scribe grooves P1 are formed by a laser scribing process, and the first scribe grooves P1 cut through the bottom electrode layer 12;

[0114] (2) Next, a doped material layer 13 is deposited, and the doped material layer 13 includes at least a light-absorbing layer 132 (e.g., a perovskite layer). Alternatively, as shown in FIG. 1, the doped material layer 13 includes, from bottom to top, a first transport material layer 131, a light-absorbing layer 132, and a second transport material layer 133; for a normal cell structure, the first transport material layer 131 can be an electron transport material layer, and the second transport material layer 133 can be a hole transport material layer; for an inverted cell structure, the first transport material layer 131 can be a hole transport material layer, and the second transport material layer 133 can be an electron transport material layer. Alternatively, the doped material layer 13 can further include a blocking layer, which is located below the first transport material layer 131 for a normal cell structure, or above the second transport material layer 133 for an inverted cell structure.

[0115] (3) Next, a second scribe groove P2 is formed on the right side (or left side) of each first scribe groove P1 by a laser scribing process, and the second scribe groove P2 cuts through the doped material layer 13;

[0116] (4) Then, a top electrode layer 14 is deposited;

[0117] (5) Finally, a third scribe groove P3 is formed on the right side (or left side) of each second scribe groove P2 by a laser scribing process, and the third scribe groove P3 cuts through the top electrode layer 14, thereby forming a thin film cell 10.

[0118] In brief, the first scribe groove P1, the second scribe groove P2 and the third scribe groove P3 are arranged in sequence. The first scribe groove P1 separates the bottom electrode layer 12 (in an example, the electrode layer is used as the bottom electrode) of each sub-cell, and then the doped material layer 13 is deposited. The second scribe groove P2 cuts the doped material layer 13 to the bottom electrode along the edge of the first scribe groove P1, so that when the top electrode layer 14 (in an example, the electrode layer is used as the top electrode) is deposited, the top electrode can be contacted to the bottom electrode to form a series structure. The third scribe groove P3 cuts the top electrode layer 14 and the doped material layer 13 along the edge of the second scribe groove P2 to prevent short circuit between adjacent two sub-cells, so that the sub-cells in the entire thin-film battery assembly present a full series structure. In this full series structure, a single sub-cell does not have a separate terminal, so that the diode cannot be connected in parallel. In this way, when a single sub-cell is shaded or damaged, the hot spot effect will cause it to withstand a reverse bias, and when it is completely shaded, the reverse voltage that the sub-cell withstands can reach the sum of the voltages generated by the remaining sub-cells in the series circuit (more than 100V), thereby breaking the shaded sub-cell. The hot spot effect specifically refers to: when one or a group of sub-cells in the thin-film battery is shaded or damaged, the maximum photo-generated current (the short-circuit current of the piece of battery) it can generate is less than the working current I MPP The remaining batteries consume increased current to maintain the current of the series circuit. At this time, the battery operating point enters the second quadrant, the voltage is in a reverse bias state, power is consumed, and overheating is caused.

[0119] To solve this problem, although the positive and negative terminals of the sub-cells in the thin-film battery can be additionally led out and connected in parallel with the planar silicon diode, this way has the following disadvantages: (1) the planar silicon diode is too thick, which increases the overall volume of the thin-film battery, and the installation is difficult and the structure is complex; (2) the positive and negative terminals of many sub-cells need to be separately led out, which is complex and difficult to connect, and the cost is also relatively high.

[0120] In an embodiment of the present disclosure, please refer to FIG. 2, which shows a schematic diagram of a thin-film battery 20 provided by an embodiment of the present disclosure. As shown in FIG. 2, the thin-film battery 20 comprises:

[0121] a substrate;

[0122] a first electrode layer 21, the first electrode layer 21 is located on one side of the substrate along a third direction, and the first electrode layer 21 is cut by a first scribe groove group along the third direction. Please refer to (a) in FIG. 2, which shows a top view schematic diagram of the first electrode layer. As shown in (a) in FIG. 2, in addition to the overall outer frame, the internal solid lines are the first scribe groove P1, collectively referred to as the first scribe groove group.

[0123] The semiconductor layer 22 is located on the side of the first electrode layer 21 away from the substrate along the third direction, and is at least partially cut by the second scribe groove group along the third direction; wherein the semiconductor layer 22 includes the electrically isolated first semiconductor layer 22a and the second semiconductor layer 22b in sequence along the first direction. Please refer to (b) in FIG. 2, which shows a top view of the semiconductor layer 22. As shown in (b) in FIG. 2, except for the overall outer frame, the internal solid lines are all the second scribe groove P2, collectively referred to as the second scribe groove group.

[0124] The second electrode layer 23 is located on the side of the semiconductor layer 22 away from the first electrode layer 21 along the third direction, and is cut by the third scribe groove group along the third direction. Please refer to (c) in FIG. 2, which shows a top view of the second electrode layer 23. As shown in (c) in FIG. 2, except for the overall outer frame, the internal solid lines are all the third scribe groove P3, collectively referred to as the third scribe groove group.

[0125] In particular, (a), (b), and (c) in FIG. 2 are stacked in sequence along the third direction, and the drawings are only for the convenience of showing them being disassembled.

[0126] It should be noted that the first electrode layer 21, the first semiconductor layer 22a, and the second electrode layer 23 are used to form a plurality of sub-cells arranged along the second direction, such as sub-cells 1-16 in FIG. 2, and the plurality of sub-cells are structurally separated and connected in series by the first scribe groove group / second scribe groove group / third scribe groove group; the first electrode layer 21, the second semiconductor layer 22b, and the second electrode layer 23 are used to form a plurality of diodes arranged along the second direction, such as diodes Q1-Q16 in FIG. 2, and the plurality of diodes are structurally separated by the first scribe groove group / second scribe groove group / third scribe groove group.

[0127] The first scribe groove group / second scribe groove group / third scribe groove group also makes that for the region in the semiconductor layer 22 corresponding to a diode, it is electrically connected with the region in the first electrode layer 21 corresponding to a sub-cell, and it is also electrically connected with the region in the second electrode layer 22 corresponding to a sub-cell. In this way, one diode forms a parallel relationship with several sub-cells, and the first direction, the second direction, and the third direction intersect each other.

[0128] Briefly, the first semiconductor layer 22a includes at least a light absorbing layer (the light absorbing layer can be a perovskite), so that the sub-cell formed by the first electrode layer 21, the first semiconductor layer 22a and the second electrode layer 23 can absorb photons and be excited to generate electron-hole pairs, and then the carriers are selectively extracted by the interface layer and then led out through the electrode layer, and the carriers form a complete loop through an external load. The second semiconductor layer 22b is used to form a PN junction and includes at least two layers of materials of different carrier transport types, so that the first electrode layer 21, the second semiconductor layer 22b and the second electrode layer 23 are used to form a diode. At the same time, the second electrode layer 12 of one diode and one sub-cell (in an example, the electrode layer is used as a top electrode) is electrically connected, and the first electrode layer 11 of one diode and one sub-cell (in an example, the electrode layer is used as a bottom electrode) is electrically connected, so that the diode and the corresponding one or more sub-cells form a parallel relationship.

[0129] In an example, please refer to FIG. 2 and FIG. 4, and FIG. 4 is a schematic diagram of the circuit connection structure of FIG. 2. As shown in FIG. 2 and FIG. 4, each diode forms a parallel relationship with one sub-cell; in another example, please refer to FIG. 6A and FIG. 6B, and FIG. 6B is a schematic diagram of the circuit connection structure of FIG. 6A. As shown in FIG. 6A and FIG. 6B, each diode forms a parallel relationship with N (FIG. 6A and FIG. 6B take N = 4 as an example) sub-cells connected in series, and each diode forms a parallel relationship with N sub-cells, where N ≥ 2; in yet another example, different diodes have different numbers of sub-cells connected in parallel.

[0130] It is also necessary to point out that, please refer to FIG. 4 and FIG. 6B, the negative electrode of each diode is connected to the current output end of the sub-cell connected in parallel, and the positive electrode of each diode is connected to the current input end of the sub-cell connected in parallel. In this way, in the normal working state of the thin-film battery 20, the diode is not conductive, and the output current and output voltage are generated after the sub-cells are connected in series; after a certain sub-cell is shaded or damaged, the diode connected in parallel with the sub-cell is turned on due to the existence of the reverse bias, so as to bypass the generated reverse bias, and the shaded or damaged sub-cell will not be damaged.

[0131] In this way, on the one hand, in the process of preparing the thin-film battery 20, the first semiconductor layer 22a and the second semiconductor layer 22b are formed by depositing different materials to form the sub-cells and the diodes, and the structure separation and the electrical connection of the diodes / sub-cells are realized by the scribe groove, so that each diode is connected in parallel with several sub-cells, and the positive and negative terminals of the silicon diodes are not needed to be led out after the sub-cells are prepared, the method is simple and low in cost, and the volume of the thin-film battery 20 is relatively small. On the other hand, the sub-cells are connected in parallel with the corresponding bypass diodes, when some sub-cells are shaded or damaged, the reverse bias (may be more than 100V) generated by the hot spot effect will flow out through the parallel bypass diodes, and the sub-cells will not be broken down, and the current output of the thin-film battery will not be affected.

[0132] It can be understood that several "something" means one or more of the something; for example, several sub-cells can mean one or more sub-cells.

[0133] In some embodiments, the first electrode layer 21 can be, but is not limited to, one of the following materials: indium tin oxide (ITO), lanthanide metal-doped indium oxide, fluorine-doped tin oxide (FTO), antimony-doped tin oxide, boron-doped zinc oxide (BZO), aluminum zinc oxide (AZO), indium zinc oxide (IZO), gallium zinc oxide (GZO), indium tungsten oxide (IWO).

[0134] The second electrode layer 23 can be, but is not limited to, one of the following materials: Au, Ag, Cu, Al, Ni, Cr, Bi, Pt, Mg, Mo, W, and alloys thereof, graphite, graphene, carbon nanotubes, indium tin oxide (ITO), lanthanide metal-doped indium oxide, fluorine-doped tin oxide (FTO), antimony-doped tin oxide, boron-doped zinc oxide (BZO), aluminum zinc oxide (AZO), indium zinc oxide (IZO), gallium zinc oxide (GZO), indium tungsten oxide (IWO).

[0135] In some embodiments, referring to (a) in FIG. 7, the first semiconductor layer 22a at least includes a light-absorbing layer 222. The second semiconductor layer 22b at least includes a first carrier polarity layer 225 and a second carrier polarity layer 226 stacked in the third direction on the side of the first electrode layer 21 away from the substrate; the first carrier polarity layer 225 and the second carrier polarity layer 226 correspond to materials of different carrier transport types, thereby forming a PN junction.

[0136] In the present disclosure, carriers are divided into electrons and holes, and carrier polarity refers to the type of particles that mainly participate in conduction in a semiconductor, which can be divided into n-type semiconductors and p-type semiconductors. An n-type semiconductor refers to a non-intrinsic semiconductor that contains a greater concentration of electrons than holes. Thus, in an n-type semiconductor, electrons are the majority carriers and holes are the minority carriers, and thus they are electron transport materials. Accordingly, the term "n-type semiconductor" as used herein refers to one or more electron transport (i.e., n-type) materials. The n-type semiconductor material can be a single electron transport compound or elemental material, or a mixture of two or more electron transport compounds or elemental materials. The electron transport compound or elemental material can be undoped or doped with one or more dopant elements. A p-type semiconductor refers to a non-intrinsic semiconductor that contains a greater concentration of holes than electrons. In a p-type semiconductor, holes are the majority carriers and electrons are the minority carriers, and thus they are hole transport materials. Accordingly, the term "p-type semiconductor" as used herein refers to one or more hole transport (i.e., p-type) materials. Similarly, the term "p-type layer" refers to a layer of hole transport (i.e., p-type) material. The p-type semiconductor material can be a single hole transport compound or elemental material, or a mixture of two or more hole transport compounds or elemental materials. The hole transport compound or elemental material can be undoped or doped with one or more dopant elements.

[0137] The term "layer" refers to any structure that is substantially in the form of a layer (e.g., substantially extends in two perpendicular directions, but its extension in a third perpendicular direction is limited). A layer can have a thickness that varies over the extent of the layer. Typically, a layer has a substantially constant thickness. As used herein, the "thickness" of a layer refers to the average thickness of the layer. It is noted that the thin film battery 20 can be a thin film battery 20 of any material, such as a perovskite photovoltaic cell (both the formamidinium and the spiro-OMeTAD versions), an amorphous silicon photovoltaic cell, or a cadmium telluride photovoltaic cell, etc., i.e., the light absorbing layer 222 is at least allowed to be a perovskite material, such as a perovskite-type metal halide, which has a chemical formula including ABX3 or A2CDX6. A represents a monovalent inorganic cation, an organic cation, or an organic-inorganic hybrid cation, B represents a divalent inorganic cation, an organic cation, or an organic-inorganic hybrid cation, C represents a monovalent inorganic cation, an organic cation, or an organic-inorganic hybrid cation, D represents a trivalent inorganic cation, an organic cation, or an organic-inorganic hybrid cation, and X represents a monovalent inorganic anion, an organic anion, or an organic-inorganic hybrid anion. A represents a monovalent inorganic cation, which optionally includes lithium ions (Li + ), sodium ions (Na + ), potassium ions (K + ), rubidium ions (Rb + ), and cesium ions (Cs +One or more of the following: A represents an organic cation, which includes (NR1R2R3R4). + (R1R2N=CR3R4) + (R1R2N-C(R5)=NR3R4) + Or (R1R2N-C(NR5R6)=NR3R4) + One or more of the following, wherein R1, R2, R3, R4, R5, and R6 are each independently selected from H, substituted or unsubstituted C1 to C20 alkyl groups, or substituted or unsubstituted aryl groups; optionally, A includes at least one of methylamine cation, dimethylamine cation, ethylamine cation, propylamine cation, butylamine cation, pentamine cation, hexamine cation, formamidinium cation, and imidazole cation; more preferably, A includes an organic amine ion and Cs. + One or more of the following. B includes divalent cations, and optionally, B includes divalent cations of one or more of the following elements: lead, tin, zinc, titanium, antimony, bismuth, nickel, iron, cobalt, silver, copper, gallium, germanium, magnesium, calcium, indium, aluminum, manganese, chromium, molybdenum, and europium. C represents monovalent inorganic cations, and optionally, C includes Cs. + Silver ions (Ag) + ), K + and ruthenium ions (Ru + One or more of the following. D represents a trivalent metal cation; optionally, D includes bismuth ions (Bi). 3+ ), trivalent nickel ions (Ni 3+ ), trivalent iron ions (Fe 3+ ), trivalent antimony ions (Sb 3+ ), trivalent indium ions (In 3+ One or more of ), more preferably, D includes In 3+ Bi 3+ Sb 3+ One or more of the following. X represents a halide ion or a halide-like ion; optionally, X includes a fluoride ion (F). - ), chloride ions (Cl) - ), bromide ions (Br) - ), iodide ions (I) - ), thiocyanate ion (SCN) - ), formate ions (HCOO) - (CH3COO) - ), trifluoroacetate ion (CF3COO) - ), methanesulfonate ions (CH3SO3) - ), trifluoromethanesulfonate ion (CF3SO3) - ), cyanide ions (CN) - X includes one or more of the following, more preferably, X includes Cl -one or more of H, F, Cl, Br, I, and CN. - one or more of H, F, Cl, Br, I, and CN. - one or more of H, F, Cl, Br, I, and CN.

[0138] In some embodiments, please refer to (a) in FIG. 7, the first semiconductor layer 22a includes a first transport layer 221, a light absorption layer 222, and a second transport layer 223 stacked in the third direction from bottom to top (from the direction close to the substrate to the direction away from the substrate), the first transport layer 221 is close to the first electrode layer 21, and the second transport layer 223 is away from the first electrode layer 21. Here, the first transport layer 221 is one of a hole transport layer or an electron transport layer, and the second transport layer 223 is the other of the hole transport layer or the electron transport layer. The electron transport layer can transport electrons and block holes, the hole transport layer can transport holes and block electrons, and the electron transport layer and the hole transport layer can improve the transport rate of electrons / holes.

[0139] For example, in the case of a formal perovskite solar cell, the first transport layer 221 is an electron transport layer and the second transport layer 223 is a hole transport layer, in which case the first carrier polarity layer 225 is a p-type semiconductor and the second carrier polarity layer 226 is an n-type semiconductor. In this way, the p-type semiconductor and the n-type semiconductor form a PN junction, i.e., a diode, the positive electrode of the diode is connected to the current output / input end of the sub-cell or sub-cell string connected in parallel thereto, the negative electrode of each diode is connected to the current input / output end of the sub-cell or sub-cell string connected in parallel thereto, and in the normal working state of the battery, the diode is not conductive and does not affect the normal working state of the sub-cell; when shading or hot spot effect occurs in the sub-cell or sub-cell string connected in parallel to the diode, the diode will be conductive due to the existence of reverse bias, thereby providing a bypass path for the current and avoiding local overheating, ensuring stable operation of the thin-film battery.

[0140] For example, in the case of a formal perovskite solar cell, the first transport layer 221 is an electron transport layer and the second transport layer 223 is a hole transport layer, in which case the first carrier polarity layer 225 is a p-type semiconductor and the second carrier polarity layer 226 is an n-type semiconductor. In this way, the p-type semiconductor and the n-type semiconductor form a PN junction, i.e., a diode, the positive electrode of the diode is connected to the current output / input end of the sub-cell or sub-cell string connected in parallel thereto, the negative electrode of each diode is connected to the current input / output end of the sub-cell or sub-cell string connected in parallel thereto, and in the normal working state of the battery, the diode is not conductive and does not affect the normal working state of the sub-cell; when shading or hot spot effect occurs in the sub-cell or sub-cell string connected in parallel to the diode, the diode will be conductive due to the existence of reverse bias, thereby providing a bypass path for the current and avoiding local overheating, ensuring stable operation of the thin-film battery.

[0141] In some embodiments, the first semiconductor layer 22a of the thin film battery 20 includes a first transport layer 221 and a light absorbing layer 222 stacked in the third direction from bottom to top (from the direction close to the substrate to the direction away from the substrate), and the first transport layer 221 is close to the first electrode layer 21. Here, the first transport layer 221 is one of a hole transport layer or an electron transport layer. In the case where the first transport layer 221 is an electron transport layer, the first carrier polarity layer 225 is a p-type semiconductor and the second carrier polarity layer 226 is an n-type semiconductor; in the case where the first transport layer 221 is a hole transport layer, the first carrier polarity layer 225 is an n-type semiconductor and the second carrier polarity layer 226 is a p-type semiconductor.

[0142] In some embodiments, the first semiconductor layer 22a of the thin film battery 20 includes a first transport layer 221 and a light absorbing layer 222 stacked in the third direction from bottom to top (from the direction close to the substrate to the direction away from the substrate), and the first transport layer 221 is close to the first electrode layer 21. Here, the first transport layer 221 is one of a hole transport layer or an electron transport layer. In the case where the first transport layer 221 is an electron transport layer, the first carrier polarity layer 225 is a p-type semiconductor and the second carrier polarity layer 226 is an n-type semiconductor; in the case where the first transport layer 221 is a hole transport layer, the first carrier polarity layer 225 is an n-type semiconductor and the second carrier polarity layer 226 is a p-type semiconductor.

[0143] In some embodiments, the thin film battery 20 can further include a blocking layer 224 disposed on the side of the electron transport layer away from the light absorbing layer 222, for blocking the transport of holes. In another embodiment, the thin film battery 20 can further include a passivation layer for passivating material defects in the light absorbing layer 222, etc. The specific selection of materials for each layer can be referred to the subsequent description. Of course, the thin film battery 20 can further form a stacked battery, such as a perovskite-perovskite stacked battery.

[0144] In some embodiments, referring to (c) in FIG. 7, in the case where the first transport layer 221 is a hole transport layer and the second transport layer 223 is an electron transport layer, the first semiconductor layer 22a further includes a blocking layer 224 between the second transport layer 223 and the second electrode layer 23, and the material of the blocking layer 224 can be the same as that of the first carrier polarity layer 225 in the second semiconductor layer. In this embodiment, the blocking layer 224 can be extended to the area where the second semiconductor layer 22b is located. In this way, for a transverse battery structure, the blocking layer 224 can be deposited on the entire plane of the thin film battery 20, and the first carrier polarity layer 225 is obtained synchronously, and the steps are simple.

[0145] Of course, for the trans-battery structure, the components of the blocking layer 224 and the first carrier polarity layer 225 can be different, i.e., the blocking layer 224 and the first carrier polarity layer 225 are each formed separately.

[0146] In some embodiments, the components of the hole transport layer can be, but are not limited to, one or more of the following: 2,2',7,7'-tetra(N,N-p-methoxyanilino)-9,9'-spirobifluorene, methoxytriphenylamine-fluoromethylformamide, poly[bis(4-phenyl)(2,4,6-trimethylphenyl)amine], poly(3,4-ethylenedioxythiophene):polystyrene sulfonic acid, poly 3-hexylthiophene, triptycene-core triphenylamine, 3,4-ethylenedioxythiophene-methoxytriphenylamine, N-(4-anilino)carbazole-spirobifluorene, polythiophene, phosphonic monomer and its polymer, carbazyl monomer and its polymer, sulfonic monomer and its polymer, triphenylamine monomer and its polymer, aromatic monomer and its polymer, metal oxide, CuI, cuprous iodide, and cuprous thiocyanate, wherein the metal element in the metal oxide can include one or more of Ni, Mo, W, and Cu, such as nickel oxide (NiO x ) and metal-doped nickel oxide (lithium-doped nickel oxide, magnesium-doped nickel oxide, copper-doped nickel oxide, tin-doped nickel oxide, zinc-doped nickel oxide, strontium-doped nickel oxide, cobalt-doped nickel oxide, etc.), copper oxide, oxide WO3. Further, the thickness of the hole transport layer includes 1 nm to 100 nm, which can be 1 nm, 10 nm, 30 nm, 50 nm, 60 nm, 70 nm, 100 nm, or a numerical range formed by two of the above values.

[0147] In some embodiments, the components of the electron transport layer can be, but are not limited to, one or more of the following: imide compounds, quinone compounds, fullerenes and their derivatives, metal oxides, semiconductor material oxides, titanates and their derivatives, and materials obtained by doping or passivation thereof. Illustratively, the imide compounds include at least one of phthalimide, succinimide, N-bromosuccinimide, glutarimide, or maleimide. Illustratively, the quinone compounds include at least one of benzoquinone, naphthoquinone, phenanthraquinone, or anthraquinone. Illustratively, the fullerenes and their derivatives include fullerene C 60 , fullerene C 70 , PCBM ([6,6]-phenyl-C 61 butyric acid methyl ester), [6,6]-phenyl C 71 butyric acid methyl ester (PC 71at least one of Mg, Cd, Zn, In, Pb, W, Sb, Bi, Hg, Ti, Ag, Mn, Fe, V, Sn, Zr, Sr, Ga, and Cr, and optionally, the metal oxide includes at least one of tin oxide (Sn02) and zinc oxide (ZnO). Illustratively, the semiconductor material oxide includes silicon oxide. Illustratively, the titanate includes at least one of strontium titanate and calcium titanate. Further, the thickness of the electron transport layer can be optionally selected to be in a range of 5 nm to 100 nm, and can be 5 nm, 10 nm, 30 nm, 50 nm, 60 nm, 70 nm, 80 nm, 100 nm, or a range defined by any two of the aforementioned values.

[0148] In some embodiments, the composition of the blocking layer 224 can be, but is not limited to, one or more of the following: 2,9-dimethyl-4,7-diphenyl-1,10-phenanthroline BCP, tin dioxide Sn02.

[0149] In some embodiments, the p-type semiconductor refers to an extrinsic semiconductor that contains a greater hole concentration than electron concentration, and the suitable p-type material can be selected from a polymer or a molecular hole transport agent. Suitable p-type semiconductors include molecular hole transport agents, polymeric hole transport agents, and copolymeric hole transport agents. The p-type semiconductor can be, for example, a molecular hole transport material, a polymer or a copolymer containing one or more of the following moieties: thiophenyl, phenylene, dithiazolyl, benzothiazolyl, diketopyrrolopyrrol, ethoxydithiophenyl, amino, triphenylamino, carbazolyl, ethylenedioxythiophenyl, dioxothiophenyl, or fluorenyl. In one embodiment, the semiconductor can include 2,2',7,7'-tetrakis(N,N-p-methoxyphenylamine)-9,9'-spirobifluorene, P3HT (poly(3-hexylthiophene)), PCPDTBT (poly[2,1,3-benzothiadiazole-4,7-diyl[4,4-bis(2-ethylhexyl)-4H-cyclopenta[2,1-b:3,4]-b']dithiophene-2,6-diyl]), poly(N-vinylcarbazole, poly[bis(4-phenyl)(2,4,6-trimethylphenyl)amine], poly(3,4-ethylenedioxythiophene): polystyrene sulfonic acid, 9,10-bis(phenylethynyl)anthracene, 5,12-bis(phenylethynyl)perylene, and the like. The p-type semiconductor also includes a p-type semiconductor formed by doping a trivalent impurity element (such as boron, aluminum, gallium, indium, etc.) into a semiconductor, and further includes one or more of the following materials: nickel oxide NiO x , molybdenum trioxide Mo03, cuprous iodide Cul, cuprous thiocyanate CuSCN, and the like.

[0150] In some embodiments, the composition of the p-type semiconductor can be, but is not limited to, one or more of the following: nickel oxide NiO xMoO3, poly[bis(4-phenyl)(2,4,6-trimethylphenyl)amine (PTAA, poly(3,4- ethylenedioxythiophene)-poly(styrenesulfonic acid) (PEDOT:PSS), or 3-hexylthiophene polymer (P3HT). The thickness of the p-type semiconductor corresponding carrier polarity layer is generally 1 nm (nanometer) to 1000 nm.

[0151] In some embodiments, n-type semiconductor refers to a non-intrinsic semiconductor having a greater electron concentration than hole concentration, including n-type semiconductors formed by doping a pentavalent impurity element (such as phosphorus, arsenic, antimony, etc.) into a semiconductor, such as n-type III-V semiconductors (e.g., gallium arsenide, indium phosphide, indium arsenide, etc.), n-type II-VI semiconductors (e.g., cadmium selenide, zinc sulfide, cadmium telluride, etc.), n-type I-VII semiconductors (e.g., cuprous chloride, etc.), n-type IV-VI semiconductors (e.g., lead selenide, lead telluride, tin sulfide, etc.), n-type V-VI semiconductors (e.g., bismuth telluride, bismuth sulfide, antimony telluride, etc.), and n-type II-V semiconductors (e.g., cadmium arsenide, zinc phosphide, zinc arsenide), etc. Also included are n-type semiconductors formed by an increase in the electron concentration of the conduction band due to defects, such as, for example, the presence of oxygen vacancy defects causing the material to exhibit n-type semiconductor properties, such as titanium dioxide, zinc oxide, tin oxide, etc.

[0152] In particular, the n-type semiconductor is selected from metal oxides, metal sulfides, metal selenides, and metal tellurides. In particular, the n-type semiconductor can include an inorganic material selected from oxides of titanium, tin, zinc, niobium, tantalum, tungsten, indium, gallium, neodymium, palladium, cadmium, or a mixture of oxides of two or more of the foregoing; sulfides of cadmium, tin, copper, zinc, or a mixture of sulfides of two or more of the foregoing metals; selenides of cadmium, zinc, indium, gallium, or a mixture of selenides of two or more of the foregoing metals; or tellurides of cadmium, zinc, cadmium, or tin, or a mixture of tellurides of two or more of the foregoing metals.

[0153] Further, the n-type semiconductor can also include one or more of the following: an imide compound, a quinone compound, a fullerene and a derivative thereof, a titanate, etc. For example, the imide compound can include at least one of phthalimide, succinimide, N-bromosuccinimide, glutarimide, or maleimide. For example, the quinone compound can include at least one of benzoquinone, naphthoquinone, phenanthraquinone, or anthraquinone. For example, the fullerene and the derivative thereof can include at least one of fullerene C 60 , fullerene C 70 , PCBM ([6,6]-phenyl-C 61 butyric acid methyl ester), [6,6]-phenyl-C 71 butyric acid methyl ester (PC 71 BM), and for example, the titanate can include at least one of strontium titanate, calcium titanate.

[0154] In some embodiments, the n-type semiconductor can be, but is not limited to, one or more of the following: SnO2, poly[di-benzo-thiadiazole-benzothiadiazole] C8-BTBT, titanium oxide TiO2, or N,N'-bis[3-(dimethylamino)propyl]perylene-3,4,9,10-tetracarboxylic diimide PDIN, fullerene and its derivatives, etc. The thickness of the corresponding carrier polarity layer of the n-type semiconductor is generally 1 nm to 1000 nm.

[0155] In some embodiments, referring to FIG. 2, the first scribe groove group includes a plurality of first horizontal scribe grooves P1a arranged along the second direction, the second scribe groove group includes a plurality of second scribe grooves P2 arranged along the second direction, and the third scribe groove group includes a plurality of third horizontal scribe grooves P3a arranged along the second direction. The first horizontal scribe grooves P1a, the second scribe grooves P2, and the third horizontal scribe grooves P3a all extend along the first direction. Each first horizontal scribe groove P1a has a second scribe groove P2 on one side (above or below) along the second direction, and each second scribe groove P2 has a third horizontal scribe groove P3a (above or below) away from the side closest to the first horizontal scribe groove P1a.

[0156] That is, the isolation and connection of the bottom electrode, the semiconductor layer, and the top electrode between every two sub-cells are achieved by the first horizontal scribe groove P1a, the second scribe groove P2, and the third horizontal scribe groove P3a in turn. The area between the first horizontal scribe groove P1a, the second scribe groove P2, and the third horizontal scribe groove P3a in turn is also called a dead zone. Meanwhile, referring to FIG. 7, the second electrode layer 23 material or other conductive material that can connect the second electrode layer 23 and the first electrode layer 21 is deposited in the second scribe groove P2 to achieve the electrical connection between the bottom electrode of a sub-cell and the top electrode of the adjacent next sub-cell, so that the multiple sub-cells in the same group of sub-cells are in series connection. In this way, the series connection between the sub-cells can be directly achieved by depositing the second electrode layer 23, which is simple and reduces the preparation process.

[0157] For example, in the second direction, the distance between the first horizontal scribe groove P1a and the closest second scribe groove P2 is 1 micrometer (μm) to 200 μm, which can be optionally 1 μm to 100 μm, further optionally 1 μm to 50 μm. The distance between the second scribe groove P2 and the closest third horizontal scribe groove P3a is 1 μm to 200 μm, which can be optionally 1 μm to 100 μm, further optionally 1 μm to 50 μm, and still further optionally 15 μm to 50 μm.

[0158] In some embodiments, the first horizontal scribe groove P1a can have a width in the second direction of between 5 μm and 50 μm, such as, but not limited to, 5 μm, 10 μm, 15 μm, 20 μm, 30 μm, 40 μm, 50 μm, or the like, and can optionally be between 10 μm and 20 μm. The second scribe groove P2 can have a width in the second direction of between 30 μm and 120 μm, and can optionally be between 40 μm and 100 μm. The third horizontal scribe groove P3a can have a width in the second direction of between 10 μm and 50 μm, and can optionally be between 10 μm and 30 μm.

[0159] As shown in FIG. 2, the thin-film battery 20 further includes a fourth scribe groove P1.5, at least a portion of the semiconductor layer 22 being cut by the fourth scribe groove P1.5 in the third direction. The fourth scribe groove P1.5 extends in the second direction, and the first semiconductor layer 22a and the second semiconductor layer 22b are isolated by the fourth scribe groove P1.5; the fourth scribe groove P1.5 extends from the third edge of the thin-film battery 20 to the fourth edge of the thin-film battery, the third edge and the fourth edge being opposite in the second direction.

[0160] It can be understood that the fourth scribe groove P1.5 isolates the first semiconductor layer 22a of the sub-battery or the sub-battery string from the second semiconductor layer 22b of the diode connected in parallel therewith, but the corresponding first electrode layer and second electrode layer of the two are connected respectively.

[0161] In some embodiments, the fourth scribe groove P1.5 can have a width in the first direction of greater than or equal to 0 mm. Further, in the case where the fourth scribe groove P1.5 has a width in the first direction of 0 mm, the diode directly contacts the sub-battery or the sub-battery string connected in parallel therewith. In the case where the fourth scribe groove P1.5 has a width in the first direction of greater than 0 mm, there is a gap between the diode and the sub-battery or the sub-battery string connected in parallel therewith, and the gap needs to be filled with a non-conductive material to prevent the first electrode layer and the second electrode layer from shorting. Optionally, the fourth scribe groove P1.5 can have a width in the first direction of between 0 μm and 100 μm. It can be understood that the non-conductive material herein can be an insulating material or a semiconductor material, and the like, to achieve the purpose of preventing the first electrode layer and the second electrode layer from shorting. Optionally, the insulating material can be, for example, epoxy, melamine formaldehyde resin, polycarbonate polymethyl methacrylate, polyimide, polyethylene terephthalate, polyethylene, polytetrafluoroethylene, phenol plastic, silicon boron, metal oxide, inorganic solid of ionic structure, and the like. In other embodiments, the semiconductor material can be, for example, tin oxide, nickel oxide, and the like. The present disclosure is not limited herein.

[0162] Here, the above-mentioned scribe groove can be realized by laser cutting, mask plate method, mechanical splicing and the like. Taking laser cutting as an example, the first scribe groove group, the second scribe groove group, the third scribe groove group and the fourth scribe groove group need to be respectively generated by 4 laser etching processes.

[0163] In one case, each component of the first semiconductor layer 22a and the second semiconductor layer 22b is completely independent, for example, the formal perovskite mentioned above, the fourth scribe groove group P1.5 cuts off the entire first semiconductor layer 22a along the third direction; in another case, the barrier layer of the first semiconductor layer 22a and the first doped layer of the second semiconductor layer 22b can be the same material and be generated by one-time deposition, at this time the fourth scribe groove group P1.5 only cuts off the first transport layer 221, the light absorption layer 222 and the second transport layer 223 in the first semiconductor layer 22a, that is, the part below the barrier layer.

[0164] In one embodiment, please refer to FIG. 2, the first semiconductor layer 22a is a whole, the second semiconductor layer 22b is a whole, the second semiconductor layer 22b is located on one side of the first semiconductor layer 22a along the first direction, the number of the fourth scribe groove P1.5 is 1, at this time the area from the fourth scribe groove P1.5 to the first edge of the thin film battery 20 forms the first semiconductor layer 22a, and the area from the fourth scribe groove P1.5 to the second edge of the thin film battery 20 forms the second semiconductor layer 22b. The first edge and the second edge are opposite along the first direction.

[0165] In this way, the first semiconductor layer 22a and the second semiconductor layer 22b are respectively deposited on the left and right sides of the fourth scribe groove P1.5, thereby respectively forming sub-cells and diodes, and the fourth scribe groove P1.5 also realizes the isolation of the sub-cells and the diodes. Generally, the width of the first semiconductor layer 22a along the first direction is greater than the width of the second semiconductor layer 22b along the second direction.

[0166] In some embodiments, the width of the second semiconductor layer 22b along the first direction is 0.1% to 50% of the width of the first semiconductor layer 22a along the first direction, for example, 0.1%, 1%, 3%, 5%, 10%, 20%, 25%, 27%, 30%, 35%, 40%, 50% or a numerical range composed of any two of the above values, optionally 1% to 10%, further optionally 1% to 3%. The greater the proportion of the first semiconductor layer 22a, the greater the effective power generation area of the thin film battery, which helps to improve the power generation power.

[0167] It can be understood that the maximum working current of the diode under forward bias is greater than or equal to the maximum power point current of the corresponding series of sub-cells passed by the diode under forward bias, to ensure the current carrying capacity of the diode under forward bias. Further optionally, the maximum working current of the diode under forward bias is greater than or equal to the short-circuit current of the corresponding series of sub-cells passed by the diode under forward bias. In some embodiments, only one set of series of sub-cells is contained in the thin-film battery, and the maximum working current of the diode under forward bias is greater than or equal to the maximum power point current of the thin-film battery, to ensure the current carrying capacity of the diode under forward bias. Further optionally, the maximum working current of the diode under forward bias is greater than or equal to the short-circuit current of the sub-cells.

[0168] It can be understood that the maximum working current of the diode under forward bias refers to the maximum current value that the diode can safely and stably work under forward bias condition.

[0169] It can be understood that the characteristics of the corresponding diode can be adjusted by adjusting the material selection, thickness, shape of PN junction and projection area of the n-type semiconductor and p-type semiconductor of the second semiconductor layer 22b on the substrate along the third direction. For example, the number of carriers can be increased by increasing the doping concentration of the p-type or n-type semiconductor, thereby increasing the maximum working current of the diode under forward bias; or the carrier concentration of the p-type or n-type semiconductor can be optimized to improve the electric field distribution and reduce carrier recombination, thereby increasing the maximum working current of the diode under forward bias; or the area of the PN junction can be increased to provide more paths for transmitting current, thereby increasing the maximum working current of the diode to a certain extent, etc.

[0170] In some embodiments, the width of the first semiconductor layer 22a along the first direction is 1 cm to 240 cm, for example 1 cm, 2 cm, 10 cm, 30 cm, 40 cm, 60 cm, 100 cm, 160 cm, 200 cm, 240 cm, and optionally 100 cm to 200 cm. The size is not limited here and can be selected and designed according to actual scene requirements.

[0171] For example, the distance between the fourth scribe groove P1.5 and the second edge (i.e. the width of the second semiconductor layer 22b along the first direction) is 1 mm to 100 mm, and optionally 5 mm to 20 mm.

[0172] In another embodiment, referring to FIG. 3A, the first semiconductor layer 22a is divided into two parts along the first direction, and the second semiconductor layer 22b is a whole, one side of the second semiconductor layer 22b along the first direction is the first part (1) of the first semiconductor layer 22a, and the other side of the second semiconductor layer 22b along the first direction is the second part (2) of the first semiconductor layer 22a. The first semiconductor layer 22a is divided into two parts along the first direction, but the first electrode layer 21 and the second electrode layer 23 are not isolated in the first direction, so the part (for example, 2 sub-cells 1) located in the adjacent two second scribe grooves P2 can still be regarded as one sub-cell, and the corresponding circuit connection schematic diagram is still as shown in FIG. 3B.

[0173] In some embodiments, the thin-film battery further comprises a fourth scribe groove P1.5, wherein the number of the fourth scribe groove P1.5 is 2, which are numbered as P1.5_1 and P1.5_2. The fourth scribe groove P1.5_1 is used to isolate the first part (1) of the first semiconductor layer 22a and the second semiconductor layer 22b, and the fourth scribe groove P1.5_2 is used to isolate the second part (2) of the first semiconductor layer 22a and the second semiconductor layer 22b.

[0174] In some other embodiments, the number of the fourth scribe groove P1.5 can also be only 1, which is used to isolate the first part (1) of the first semiconductor layer 22a and the second semiconductor layer 22b, or which is used to isolate the second part (2) of the first semiconductor layer 22a and the second semiconductor layer 22b.

[0175] In some embodiments, each first horizontal scribe groove P1a cuts the first electrode layer 21, and in the case that the semiconductor layer 22 comprises a first transport layer 221, a light-absorbing layer 222 and a second transport layer 223 which are sequentially stacked, each first horizontal scribe groove P1a optionally cuts the first electrode layer 21 or cuts the first electrode layer 21 and the first transport layer 221.

[0176] In some embodiments, each second scribe groove P2 cuts the semiconductor layer 22, and in the case that the semiconductor layer 22 comprises a first transport layer 221, a light-absorbing layer 222 and a second transport layer 223 which are sequentially stacked, each second scribe groove P2 cuts the second transport layer 223, the light-absorbing layer 222 and the first transport layer 221.

[0177] In some embodiments, each third horizontal scribe groove P3a cuts the second electrode layer 23. Alternatively, in some other embodiments, each third horizontal scribe groove P3a cuts the second electrode layer 23 and cuts part or all of the semiconductor layer 22, thereby reducing the process difficulty.

[0178] Each scribe groove described above can be obtained by a laser scribing process, or can be prepared by a mask plate method.

[0179] In some embodiments, referring to FIG. 2 or FIG. 3A, in the case where a diode is formed in parallel with a sub-cell, the first horizontal scribe groove P1a, the second scribe groove P2, and the third horizontal scribe groove P3a all extend from the first edge of the thin-film battery 20 to the second edge of the thin-film battery 20, and the first edge and the second edge are opposite along the first direction.

[0180] In this way, as shown in (b) of FIG. 2, on the left side of the fourth scribe groove P1.5 (the region between the fourth scribe groove P1.5 and the first edge), a sub-cell, such as sub-cell 1, sub-cell 2, …, sub-cell 16, is formed between one group of P1a, P2, P3a and another group of P1a, P2, P3a; on the right side of the fourth scribe groove P1.5 (the region between the fourth scribe groove P1.5 and the second edge), a diode, such as diode Q1, diode Q2, …, diode Q16, is formed between one group of P1a, P2, P3a and another group of P1a, P2, P3a. Meanwhile, as shown in (a) and (c) of FIG. 2, neither the first electrode layer 21 nor the second electrode layer 23 has a vertical scribe groove extending along the second direction, so that the bottom electrode above each P1a is a whole, and the top electrode above each P3a is a whole, that is, the bottom electrodes of sub-cell 1 and diode Q1 are electrically connected together, the bottom electrodes of sub-cell 2 and diode Q2 are electrically connected together, and the specific circuit connection diagram is shown in FIG. 4. FIG. 3 is understood correspondingly, in which the two sub-cells in the same row (such as two sub-cells 1) constitute a whole sub-cell 1, and the circuit connection diagram thereof can also be referred to FIG. 3B.

[0181] In other embodiments, referring to FIG. 4A, the first semiconductor layer 22a is divided into two parts along the first direction, and the second semiconductor layer 22b is also divided into two parts along the first direction. The number of the fourth scribe grooves P1.5 is 3, the first fourth scribe groove P1.5_1 is used to isolate the first part (1) of the first semiconductor layer 22a and the second part (2) of the first semiconductor layer 22a, the second fourth scribe groove P1.5_2 is used to isolate the second part (2) of the first semiconductor layer 22a and the second part (2) of the second semiconductor layer 22b, and the third fourth scribe groove P1.5_3 is used to isolate the first part (1) of the second semiconductor layer 22b and the second part (2) of the second semiconductor layer 22b.

[0182] The first scribe groove group further includes a fifth scribe groove P5 extending along the second direction, and the fifth scribe groove P5 extends from the third edge of the thin-film battery 20 to the fourth edge of the thin-film battery 20, and the projection of the fifth scribe groove P5 in the first direction is located between the first fourth scribe groove P1.5a_1 and the second fourth scribe groove P1.5a_2, so that the first electrode layer 21 is also isolated in the first direction.

[0183] The third scribe groove group further includes a sixth scribe groove P6 extending along the second direction, and the sixth scribe groove P6 extends from the third edge of the thin-film battery to the fourth edge of the thin-film battery; along the first direction, the projection of the sixth scribe groove P6 is located between the first fourth scribe groove P1.5a_1 and the second fourth scribe groove P1.5a_2, so as to isolate the second electrode layer 23 in the first direction as well, and the structure at the isolation position can be air insulation or filled with insulation material for isolation to prevent short circuit.

[0184] Thus, the first electrode layer 21 simultaneously connects at least part of the first part (1) of the first semiconductor layer 22a and the first part (1) of the second semiconductor layer 22b, and the second electrode layer 23 simultaneously connects at least part of the first part (1) of the first semiconductor layer 22a and the first part (1) of the second semiconductor layer 22b, thereby realizing the parallel connection of the diode corresponding to the first part (1) of the first semiconductor layer 22a and the first part (1) of the second semiconductor layer 22b; the first electrode layer 21 simultaneously connects at least part of the second part (2) of the first semiconductor layer 22a and the second part (2) of the second semiconductor layer 22b, and the second electrode layer 23 simultaneously connects at least part of the second part (2) of the first semiconductor layer 22a and the second part (2) of the second semiconductor layer 22b, thereby realizing the parallel connection of the diode corresponding to the second part (2) of the first semiconductor layer 22a and the second part (2) of the second semiconductor layer 22b, and the part (for example, the sub-cell 1 and the sub-cell 1') located in the adjacent two second scribe grooves P2 becomes two sub-cells not directly connected in the two parallel circuits, and the corresponding circuit connection schematic diagram is shown in FIG. 4B.

[0185] In particular, the cross section of the scribe groove in the drawing is presented in the form of a line, but in the actual process, it is embodied as a groove, and the groove is filled with air or other insulation material to realize isolation.

[0186] In other embodiments, please refer to FIG. 5A, the first semiconductor layer 22a is divided into a first part (1) and a second part (2) as above, and the second semiconductor layer 22b is divided into a first second semiconductor layer 22b (1) and a second second semiconductor layer 22b (2) as above.

[0187] The first scribe groove group further includes three fifth scribe grooves P5, the first fifth scribe groove P5_1 and the third fifth scribe groove P5_3 both extend along the fourth edge of the thin-film battery 20 to the first horizontal scribe groove P1a closest to the third edge of the thin-film battery 20; the second fifth scribe groove P5_2 extends along the fourth edge of the thin-film battery 20 to the closest third edge of the thin-film battery 20, for cutting the first electrode layer 21 to separate the first part (1) of the second semiconductor layer 22b and the second part (2) of the second semiconductor layer 22b;

[0188] The third scribe groove group further includes three sixth scribe grooves P6, the first sixth scribe groove P6_1 and the third sixth scribe groove P6_3 each extend along the third edge of the thin-film battery 20 to the first horizontal scribe groove P1a closest to the fourth edge of the thin-film battery 20; the second sixth scribe groove P6_2 extends along the third edge of the thin-film battery 20 to the fourth edge closest to the second half-conductor layer 22b for scribing the second electrode layer 23 to separate the first part (1) of the second half-conductor layer 22b and the second part (2) of the second half-conductor layer 22b.

[0189] In some embodiments, the first fifth scribe groove P5_1, the first fourth scribe groove P1.5_1 and the first sixth scribe groove P6_1 are aligned along the third direction; the second fifth scribe groove P5_2, the third fourth scribe groove P1.5_3 and the second sixth scribe groove P6_2 are aligned along the third direction; the third fifth scribe groove P5_3, the second fourth scribe groove P1.5_2 and the third sixth scribe groove P6_3 are aligned along the third direction.

[0190] Meanwhile, for a part of the first horizontal scribe groove P1a, it extends from the first edge to the first fifth scribe groove P5_1, for another part of the first horizontal scribe groove P1a, it extends from the third fifth scribe groove P5_3 to the second edge; for a part of the second scribe groove P2, it extends from the first edge to the first fourth scribe groove P1.5_1, for another part of the second scribe groove P2, it extends from the second fourth scribe groove P1.5_2 to the second edge; for a part of the third horizontal scribe groove P3(a), it extends from the first edge to the first sixth scribe groove P6_1, for another part of the third horizontal scribe groove P3(a), it extends from the third sixth scribe groove P6_3 to the second edge.

[0191] In this way, the second half-conductor layer 22b is divided into two parts, one part forms a parallel structure with the first part (1) of the first half-conductor layer 22a, and the other part forms a parallel structure with the second part (2) of the first half-conductor layer 22a, and the specific circuit connection is as shown in FIG. 5B.

[0192] The following will be described in detail mainly based on the embodiment of FIG. 2, and the corresponding embodiment of FIG. 3 is understood correspondingly.

[0193] In some embodiments, please refer to FIG. 6A, in the case that one diode and N sub-cells (FIG. 6A takes N=4 as an example) form a parallel relationship: the first scribe groove group further includes a plurality of first vertical scribe grooves P1b, and the third scribe groove group further includes a plurality of third vertical scribe grooves P3b, each first vertical scribe groove P1b and third vertical scribe groove P3b extends along the second direction.

[0194] As an example of the sub-cells 5 to 8, referring to (a) of FIG. 6A, for the N+l first horizontal scribe grooves P1a_1 to P1a_5 corresponding to the N sub-cells, the first horizontal scribe grooves P1a_1 and P1a_5 at the ends extend from the first edge to the second edge of the thin film battery; the first horizontal scribe grooves P1a_2 to P1a_4 in the middle part extend from the first edge, and the lengths of the first horizontal scribe grooves P1a_2 to P1a_4 in the middle part are smaller than the lengths of the first horizontal scribe grooves P1a_1 and P1a_5 at the ends; the first vertical scribe groove P1b extends from the end of the Nth first horizontal scribe groove P1a_4 close to the second edge to the 1st first horizontal scribe groove P1a_1, and the first vertical scribe groove P1b does not contact the N+lth first horizontal scribe groove P1a_5. In this way, for the first electrode layer 21, the part of the first vertical scribe groove P1b close to the second edge is only electrically connected to the bottom electrode of the sub-cell 8, and is electrically isolated from the bottom electrodes of the sub-cells 5 to 7.

[0195] Referring to (b) of FIG. 6A, for the N+l second scribe grooves P2_1 to P2_5 corresponding to the N sub-cells, the second scribe grooves P2_1 and P2_5 at the ends extend from the first edge to the second edge of the thin film battery; the second scribe grooves P2_2 to P2_4 in the middle part extend from the first edge to the fourth scribe groove P1.5.

[0196] Referring to (c) of FIG. 6A, for the N+l third horizontal scribe grooves P3a P3a_1 to P3a_5 corresponding to the N sub-cells, the third horizontal scribe grooves P3a_1 and P3a_5 at the ends extend from the first edge to the second edge of the thin film battery 20; the third horizontal scribe grooves P3a_2 to P3a_4 in the middle part extend from the first edge, and the lengths of the third horizontal scribe grooves P3a_2 to P3a_4 in the middle part are smaller than the lengths of the third horizontal scribe grooves P3a_1 and P3a_5 at the ends; the third vertical scribe groove P3b extends from the end of the 2nd third horizontal scribe groove P3a_2 close to the second edge to the last third horizontal scribe groove P3a_5, and the third vertical scribe groove P3b does not contact the 1st third horizontal scribe groove P3a_1. In this way, for the second electrode layer, the part of the third vertical scribe groove P3b close to the second edge is only electrically connected to the top electrode of the sub-cell 5, and is electrically isolated from the bottom electrodes of the sub-cells 6 to 8.

[0197] In addition, for FIG. 6A, the N sub-cells corresponding to the same diode are regarded as a group of sub-cells, and then the adjacent two groups of sub-cells share the same first horizontal scribe groove, the first second scribe groove, and the first third horizontal scribe groove. That is, P1a_5 marked in FIG. 6A can also be regarded as P1a_1 of the next group of sub-cells.

[0198] Meanwhile, the sub-cells 5-8 are connected in series, the bottom electrode of the diode Q2 is electrically connected with the bottom electrode of the sub-cell 8, and the top electrode of the diode Q2 is electrically connected with the top electrode of the sub-cell 5, so that the diode Q2 is connected in parallel with the whole formed by the series-connected sub-cells 5-8. Please refer to FIG. 6B, every 4 series-connected sub-cells form a group connected in parallel with one diode.

[0199] In some other embodiments, part or all of the first N second scribe grooves P2_1-P2_3 can also be selected to extend from the first edge to the second edge, which means that every 4 series-connected sub-cells form a group connected in parallel with multiple diodes.

[0200] It should be further noted that the first vertical scribe groove P1b, the fourth scribe groove P1.5 and the third vertical scribe groove P3b each have the same distance from the second edge of the thin-film battery.

[0201] In some embodiments, please refer to (d) in FIG. 8, the thin-film battery 20 further comprises a first edge cleaning area and a second edge cleaning area, and the semiconductor layer 22 in the first edge cleaning area and the second edge cleaning area is removed; in the first direction, the first edge cleaning area and the second edge cleaning area each extend from the first edge to the second edge; in the second direction, the first edge cleaning area extends from the third edge to the nearest sub-cell 1, and the second edge cleaning area extends from the fourth edge to the nearest sub-cell 16. In this way, by cleaning the edge areas on the upper and lower edges of the thin-film battery 20, the packaging and the positive and negative electrode leads can be facilitated.

[0202] In some embodiments, the thin-film battery 20 further comprises a periphery edge cleaning area, and the edge cleaning area is used to lay a butyl rubber strip or other sealing glue for packaging, so as to improve the sealing performance of the thin-film battery assembly. In this embodiment, the edge of the thin-film battery refers to the edge other than the edge cleaning area.

[0203] The following provides a manufacturing process diagram of a thin-film battery 20 in a reverse structure in combination with FIG. 8. The specific description is as follows:

[0204] As shown in (a) in FIG. 8, a transparent first electrode layer 21 is formed on a substrate, a plurality of first horizontal scribe grooves P1a are generated on the first electrode layer 21 according to a certain width by using a laser P1, and the first electrode layer 21 is divided into a plurality of substrate units; a layer of NiO x As a hole transport layer (i.e., the first transport layer 221), since the NiO x is transparent, the underlying first horizontal scribe grooves P1a can still be seen; in some embodiments, the first horizontal scribe grooves P1a can be filled with an insulating material to achieve isolation of the first electrode layer 21 between different sub-cells.

[0205] As shown in (b) of FIG. 8, a perovskite material (PVK, taking perovskite thin film battery as an example) is deposited on the whole plane generated by means of slit coating, doctor blade coating, inkjet printing or magnetron sputtering to generate the light-absorbing layer 222, and fullerene C60 is evaporated by an evaporation process to generate the electron transport layer 223. 60 As the electron transport layer (i.e., the second transport layer 223), the hole transport layer, the light-absorbing layer 222 and the electron transport layer are then cut to generate the fourth scribe groove P1.5, and the hole transport layer, the light-absorbing layer 222 and the electron transport layer in the right diode area of the fourth scribe groove P1.5 are cleaned to expose the bottom electrode in the diode area (cleaned area); the width of the diode area along the first direction is about 5-20 mm.

[0206] As shown in (c) of FIG. 8, SnO2 is deposited on the whole plane generated by an atomic layer deposition (ALD) process, the SnO2 in the non-diode area acts as the barrier layer 224 of the first semiconductor layer, and the SnO2 in the diode area acts as the first carrier polarity layer 225 of the second semiconductor layer; at the same time, NiO x is generated in the diode area by a sputtering process to generate the second carrier polarity layer 226, at which time the N-doped first carrier polarity layer SnO2 and the P-doped second carrier polarity layer NiO x form a PN junction in the diode;

[0207] As shown in (d) of FIG. 8, a plurality of second scribe grooves P2 are generated above each first horizontal scribe groove P1a by means of a laser P2; the laser P2 cuts through the barrier layer SnO2, the electron transport layer C 60 , the perovskite layer PVK and the hole transport layer NiO x ; the semiconductor layers are cleaned on the upper and lower edges until the bottom electrode is exposed to form a first edge cleaning area and a second edge cleaning area, facilitating packaging and wiring,

[0208] As shown in (e) of FIG. 8, a top electrode material (such as copper) is plated on the whole plane generated to generate the second electrode layer 23, and a plurality of third horizontal scribe grooves P3a are generated above each second scribe groove P2 by means of a laser P3, the third horizontal scribe grooves P3a cut through the second electrode layer 23; then the positive and negative electrodes are led out by means of bus bars and connected to the junction box. In some embodiments, the third horizontal scribe grooves P3a can be filled with an insulating material to achieve isolation of the second electrode layer 23 between different sub-cells, thereby preventing short circuiting.

[0209] In addition, the number of sub-cells in parallel for each diode can be adjusted by adjusting the specific patterns of the first scribe groove group, the second scribe groove group and the third scribe groove group.

[0210] In summary, the sub-cells in the current thin-film battery are all in full series structure and are not separately led out, so that the diodes cannot be connected in parallel. When one of the sub-cells is shaded, the shaded sub-cell is subjected to high reverse bias and is easily damaged. The embodiment of the present disclosure provides a thin-film battery 20. On the one hand, in the step of process manufacturing, a layer of doped material with different doping types is deposited to form a parallel PN junction in the interior of the sub-cell, thereby forming a bypass diode. Thus, the bypass diode can be provided for the sub-cell at the process level, and the reverse breakdown phenomenon of the sub-cell caused by the reverse bias of the hot spot effect can be eliminated. On the other hand, the number of sub-cells connected in parallel for each diode can be adjusted according to the actual application scenario, and the form is flexible and can be adapted to various application scenarios. Further, in an embodiment, for the thin-film battery 20 in the anti-structure, the barrier layer material in the sub-cell can be used as the N-type doped doped material layer in the diode at the same time, so that the barrier layer and the first carrier polarity layer can be formed at the same time by one deposition in the process, without the need to increase additional operation steps, and the steps are simple and low in cost.

[0211] In another embodiment of the present disclosure, please refer to FIG. 9, which shows a flowchart of a preparation method of a thin-film battery 20 provided by the embodiment of the present disclosure. As shown in FIG. 9, the method comprises:

[0212] S41: providing a substrate.

[0213] Here, the substrate can be transparent glass.

[0214] S42: forming a first electrode layer on one side of the substrate along a third direction, and processing the first electrode layer along the third direction to form a first scribe groove group.

[0215] S43: forming a semiconductor layer on the side of the first electrode layer away from the substrate along the third direction, the semiconductor layer comprising a first semiconductor layer and a second semiconductor layer in sequence along a first direction; and processing the semiconductor layer along the third direction to form a second scribe groove group.

[0216] S44: forming a second electrode layer on the side of the semiconductor layer away from the first electrode layer along the third direction, and processing the second electrode layer along the third direction to form a third scribe groove group.

[0217] Here, the first direction, the second direction and the third direction intersect with each other.

[0218] It should be noted that the cross-section of the first electrode layer 21, the semiconductor layer 22 (including the first semiconductor layer 22a and the second semiconductor layer 22b), and the second electrode layer 23 can refer to FIG. 2 or FIG. 6A. Specifically, the first electrode layer 21, the first semiconductor layer 22a, and the second electrode layer 23 are used to form a plurality of sub-cells arranged along the second direction, and the plurality of sub-cells are structurally separated and connected in series by the scribe groove group; the first electrode layer 21, the second semiconductor layer 22b, and the second electrode layer 23 are used to form a plurality of diodes arranged along the second direction, and the plurality of diodes are structurally separated by the scribe groove group. For the region of the semiconductor layer 22 corresponding to a diode, it is electrically connected to the region of the first electrode layer 21 corresponding to a sub-cell, and it is also electrically connected to the region of the second electrode layer 22 corresponding to a sub-cell, so that one diode and several sub-cells form a parallel relationship. Further, the scribe groove group can be formed by laser cutting, which has higher controllability and can effectively reduce the dead area. The scribe groove group can also be formed by a mask plate method or other physical / chemical methods, which are not limited here.

[0219] In some embodiments, referring to FIG. 2, the first scribe groove group includes a plurality of first horizontal scribe grooves P1a arranged along the second direction, the second scribe groove group includes a plurality of second scribe grooves P2 arranged along the second direction, and the third scribe groove group includes a plurality of third horizontal scribe grooves P3a arranged along the second direction. Each of the first horizontal scribe grooves P1a, the second scribe grooves P2, and the third horizontal scribe grooves P3a extends along the first direction. Each of the first horizontal scribe grooves P1a has a second scribe groove P2 on one side along the second direction. Each of the second scribe grooves P2 has a third horizontal scribe groove P3a on a side away from the closest first horizontal scribe groove P1a. Adjacent first horizontal scribe grooves P1a, second scribe grooves P2, and third horizontal scribe grooves P3a are used to achieve structural separation and series connection of adjacent two sub-cells. The second scribe groove group further includes a fourth scribe groove P1.5 extending from the third edge of the thin-film battery to the fourth edge of the thin-film battery, and the third edge and the fourth edge are opposite along the second direction. The region of the fourth scribe groove P1.5 to the first edge of the thin-film battery 20 forms the first semiconductor layer 22a, and the region of the fourth scribe groove P1.5 to the second edge of the thin-film battery 20 forms the second semiconductor layer 22b. The first edge and the second edge are opposite along the first direction.

[0220] In some embodiments, referring to FIG. 7(a), the first semiconductor layer 22a at least includes a light-absorbing layer 222; the second semiconductor layer 22b at least includes a first carrier polarity layer 225 and a second carrier polarity layer 226; the first carrier polarity layer 225 and the second carrier polarity layer 226 correspond to different types of particles that mainly participate in conduction, one of which is an n-type semiconductor, and the other is a p-type semiconductor.

[0221] In some embodiments, referring to (b) in FIG. 7, the first semiconductor layer 22a includes, in order from bottom to top along the third direction, the first transport layer 221, the light-absorbing layer 222, and the second transport layer 223. In the case where the first transport layer 221 is an electron transport layer and the second transport layer 223 is a hole transport layer, the first carrier polarity layer 225 is a p-type semiconductor and the second carrier polarity layer 226 is an n-type semiconductor; in the case where the second transport layer 223 is a hole transport layer and the second transport layer 223 is an electron transport layer, the first carrier polarity layer 225 is an n-type semiconductor and the second carrier polarity layer 226 is a p-type semiconductor.

[0222] In some embodiments, the step S43 specifically includes:

[0223] forming, in order, the first transport layer 221, the light-absorbing layer 222, and the second transport layer 223 on the first electrode layer 21 and the first scribe groove group along the third direction;

[0224] cutting the first transport layer 221, the light-absorbing layer 222, and the second transport layer 223 to form the fourth scribe groove P1.5;

[0225] removing the first transport layer 221, the light-absorbing layer 222, and the second transport layer 223 on one side of the fourth scribe groove P1.5 along the first direction, and the removed region forms a diode region (see FIG. 8);

[0226] forming, in order, the first carrier polarity layer 225 and the second carrier polarity layer 226 in the diode region;

[0227] cutting the first transport layer 221, the light-absorbing layer 222, the second transport layer 223, the first carrier polarity layer 225, and the second carrier polarity layer 226 along the third direction to form a plurality of second scribe grooves P2.

[0228] In yet some embodiments, referring to (c) in FIG. 7, in the case where the first transport layer 221 is a hole transport layer and the second transport layer 223 is an electron transport layer, the first semiconductor layer 22a further includes a barrier layer 224 between the second transport layer 223 and the second electrode layer 23, and the barrier layer 224 extends to the region where the second semiconductor layer 22b is located, and the barrier layer 224 also serves as the first carrier polarity layer 225 in the second semiconductor layer 22b.

[0229] Correspondingly, the step S43 specifically includes:

[0230] forming, in order, the hole transport layer (i.e., the first transport layer 221), the light-absorbing layer 222, and the electron transport layer (i.e., the second transport layer 223) on the first electrode layer 21 and the first scribe groove group along the third direction;

[0231] The hole transport layer, the light absorbing layer 222 and the electron transport layer are cut to form a fourth scribe groove P1.5;

[0232] The hole transport layer, the light absorbing layer 222 and the electron transport layer are removed on one side of the fourth scribe groove P1.5 along the first direction, and the removed region forms a diode region;

[0233] A blocking layer is formed on the electron transport layer and the diode region, and the part of the blocking layer 224 in the diode region serves as a first carrier polarity layer 225;

[0234] A second carrier polarity layer 226 is formed on the first carrier polarity layer 225;

[0235] The first transport layer 221, the light absorbing layer 222, the second transport layer 223, the first carrier polarity layer 225 and the second carrier polarity layer 226 are cut along the third direction to form a plurality of second scribe grooves P2 and fourth scribe grooves P1.5;

[0236] Therefore, for the embodiment shown in FIG. 2, one edge of the diode region coincides with the first edge of the thin-film battery 20, and the fourth scribe groove P1.5 serves as the other edge of the diode region.

[0237] It can be understood that the forming method of each layer can be adaptively selected according to the type of the material, including but not limited to physical vapor deposition, chemical vapor deposition, liquid phase method (such as coating, spin coating, spraying, etc.), etc., which is not limited here.

[0238] In some embodiments, referring to FIG. 2, in the case where one diode and one sub-cell form a parallel relationship, the first horizontal scribe groove P1a and the third horizontal scribe groove P3a both extend from the third edge of the thin-film battery to the fourth edge of the thin-film battery, and the fourth edge is opposite to the third edge along the first direction.

[0239] In some embodiments, as shown in FIG. 4A, in the case where one diode is in parallel connection with one sub-cell, the first semiconductor layer is divided into two parts along the first direction, and the second semiconductor layer is a whole; the number of fourth scribe lines is two; the first fourth scribe line is used to isolate the first part of the first semiconductor layer and the second semiconductor layer, and the second fourth scribe line is used to isolate the second part of the first semiconductor layer and the second semiconductor layer; the first scribe line group further comprises a fifth scribe line extending along the second direction, and the fifth scribe line extends from the third edge of the thin-film battery to the fourth edge of the thin-film battery; along the first direction, the projection of the fifth scribe line is between the first fourth scribe line and the second fourth scribe line; the third scribe line group further comprises a sixth scribe line extending along the second direction, and the sixth scribe line extends from the third edge of the thin-film battery to the fourth edge of the thin-film battery; along the second direction, the projection of the sixth scribe line is between the first fourth scribe line and the second fourth scribe line.

[0240] In some embodiments, as shown in FIG. 5A, in the case where one diode is in parallel connection with N sub-cells: the first semiconductor layer is divided into two parts along the first direction, and the second semiconductor layer is divided into two parts along the first direction; the number of fourth scribe lines is three; the first fourth scribe line is used to isolate the first part of the first semiconductor layer and the first part of the second semiconductor layer, the second fourth scribe line is used to isolate the first part of the second semiconductor layer and the second part of the second semiconductor layer; and the third fourth scribe line is used to isolate the second part of the second semiconductor layer and the second part of the first semiconductor layer; the first scribe line group further comprises three fifth scribe lines; the first fifth scribe line and the third fifth scribe line both extend along the fourth edge of the thin-film battery to the first horizontal scribe line closest to the third edge of the thin-film battery; and the second fifth scribe line extends along the fourth edge of the thin-film battery to the first horizontal scribe line closest to the third edge of the thin-film battery; the third scribe line group further comprises three sixth scribe lines; the first sixth scribe line and the third sixth scribe line both extend along the third edge of the thin-film battery to the first horizontal scribe line closest to the fourth edge of the thin-film battery; and the second sixth scribe line extends along the third edge of the thin-film battery to the first horizontal scribe line closest to the fourth edge of the thin-film battery; the first fifth scribe line, the first fourth scribe line, and the first sixth scribe line are aligned along the third direction; the second fifth scribe line, the second fourth scribe line, and the second sixth scribe line are aligned along the third direction; and the third fifth scribe line, the third fourth scribe line, and the third sixth scribe line are aligned along the third direction.

[0241] and, for one part of the first horizontal scribe groove, extending from the first edge to the 1st fifth scribe groove, and for another part of the first horizontal scribe groove, extending from the 3rd fifth scribe groove to the second edge; for one part of the second scribe groove, extending from the first edge to the 1st fourth scribe groove, and for another part of the second scribe groove, extending from the 3rd fourth scribe groove to the second edge; for one part of the third horizontal scribe groove, extending from the first edge to the 1st sixth scribe groove, and for another part of the third horizontal scribe groove, extending from the 3rd sixth scribe groove to the second edge.

[0242] In some embodiments, referring to FIG. 6A, in the case of one diode and N sub-cells forming a parallel relationship: the first scribe groove group further comprises a plurality of first vertical scribe grooves P1b, and the third scribe groove group further comprises a plurality of third vertical scribe grooves P3b, each of the first vertical scribe grooves P1b and the third vertical scribe grooves P3b extends along the second direction; for N+1 first horizontal scribe grooves corresponding to N sub-cells, the first horizontal scribe grooves at the head and tail extend from the first edge to the second edge of the thin-film battery; the first horizontal scribe grooves in the middle part extend from the first edge, and the length of the first horizontal scribe grooves in the middle part is less than the length of the first horizontal scribe grooves at the head and tail; the first vertical scribe groove P1b extends from one end of the Nth first horizontal scribe groove close to the second edge to the first first horizontal scribe groove; for N+1 second scribe grooves corresponding to N sub-cells, the second scribe grooves at the head and tail extend from the first edge to the second edge of the thin-film battery 20; the second scribe grooves in the middle part extend from the first edge to the fourth scribe groove; for N+1 third horizontal scribe grooves corresponding to N sub-cells, the third horizontal scribe grooves at the head and tail extend from the first edge to the second edge of the thin-film battery; the third horizontal scribe grooves in the middle part extend from the first edge, and the length of the third horizontal scribe grooves in the middle part is less than the length of the third horizontal scribe grooves at the head and tail; the third vertical scribe groove extends from one end of the 2nd third horizontal scribe groove close to the second edge to the last third horizontal scribe groove; the distance between the first vertical scribe groove, the fourth scribe groove and the third vertical scribe groove and the second edge of the thin-film battery is the same; the distance between the first vertical scribe groove, the fourth scribe groove and the third vertical scribe groove and the second edge of the thin-film battery 20 is the same.

[0243] For the specific application scenario of "the thin-film battery 20 adopts an inverse structure, and the barrier layer simultaneously serves as the first carrier polarity layer, and one diode and one sub-cell form a parallel relationship", the following provides a specific deposition process of the thin-film battery 20, so as to better understand the present application.

[0244] As shown in (a) of FIG. 10: a transparent first electrode layer 21 is formed on a substrate.

[0245] As shown in (b) of FIG. 10: a plurality of first horizontal scribe grooves P1a are produced by laser P1 according to a certain width, so as to divide the first electrode layer 21 into a plurality of substrate units.

[0246] As shown in (c) of FIG. 10, a layer of NiO is deposited on the first electrode layer 21 and the first scribe groove group by slit coating, doctor blade coating, inkjet printing or magnetron sputtering. x A hole transport layer (i.e. the first transport layer 221) is obtained, and since the NiO is transparent, the first horizontal scribe grooves P1a below can still be seen. x

[0247] As shown in (d) of FIG. 10, a layer of PVK is deposited on the entire plane produced by slit coating, doctor blade coating, inkjet printing or magnetron sputtering to produce an optical absorption layer 222.

[0248] As shown in (e) of FIG. 10, fullerene C is evaporated by an evaporation process to produce an electron transport layer (i.e. the second transport layer 223). 60

[0249] As shown in (f) of FIG. 10, the hole transport layer, the optical absorption layer 222 and the electron transport layer are cut by laser P1.5 to produce fourth scribe grooves P1.5, and then the hole transport layer NiO, the optical absorption layer PVK and the electron transport layer C on the right side of the fourth scribe grooves P1.5 are cleaned. x 60 A diode region is produced, i.e. the diode region exposes the bottom electrode.

[0250] As shown in (g) of FIG. 10, SnO2 is deposited on the entire plane produced by an atomic layer deposition (ALD) process, the SnO2 of the non-diode region as a barrier layer 224 of the first semiconductor layer, and the SnO2 of the diode region as a first carrier polarity layer 225 of the second semiconductor layer; at the same time, NiO is produced by a sputtering process in the diode region to produce a second carrier polarity layer 226, at which time the n-type semiconductor SnO2 and the n-type semiconductor NiO form a PN junction in the diode. x x

[0251] As shown in (h) of FIG. 10, a plurality of second scribe grooves P2 are produced above each first horizontal scribe groove P1a by laser P2; the barrier layer SnO2, the electron transport layer C, the perovskite layer PVK, the hole transport layer NiO and the like of the sub-cell region are cut by laser P2, and the n-type semiconductor SnO2 and the n-type semiconductor NiO of the diode region are also cut. 60 x x ​​​​​​​​

[0252] As shown in (i) of FIG. 10, the semiconductor layer is cleaned on the upper and lower edges until the bottom electrode is exposed, forming a first edge cleaning area and a second edge cleaning area, facilitating packaging and wire lead-out.

[0253] As shown in (g) of FIG. 10, copper plating is performed on the generated overall plane containing the sub-cells to generate a second electrode layer 23.

[0254] As shown in (k) of FIG. 10, a plurality of third horizontal scribe grooves P3a are generated above each second scribe groove P2 by laser P3, the third horizontal scribe grooves P3a cutting the second electrode layer 23; then the positive and negative electrodes are led out by bus bars and connected at the junction box.

[0255] Optionally, the edge cleaning process shown in (i) of FIG. 10 can be performed after the thin-film battery is prepared, which is not limited here.

[0256] The specific components in FIG. 10 are only examples and do not constitute specific limitations.

[0257] In summary, the sub-cells in the current thin-film battery are all in full series structure, which causes the sub-cells to be unable to be individually led out, which will cause the module to withstand an infinite reverse bias when partially shaded, and the module is extremely easy to damage and fail. The present disclosure provides a preparation method of a thin-film battery 20. On the one hand, in the step of process preparation, a layer of doped material with different doping types is deposited to form a parallel PN junction in the interior of the sub-cell, thereby forming a bypass diode; thus, the bypass diode can be provided for the sub-cell at the process level, and the reverse breakdown phenomenon of the sub-cell caused by the hot spot effect can be eliminated; on the other hand, the number of sub-cells in parallel with each diode can be adjusted according to the actual application scenario, and the form is flexible and can adapt to various application scenarios. In an embodiment, for a thin-film battery 20 in an anti-structure, the barrier layer material in the sub-cell can be used as an n-type semiconductor in the diode at the same time, so that the barrier layer and the first carrier polarity layer can be formed at the same time by one deposition in the process, without the need to increase additional operation steps, which is simple and low in cost.

[0258] In still another embodiment of the present disclosure, a laminated battery is provided, which comprises the above-mentioned thin-film battery 20 and a photoelectric conversion layer, the first semiconductor layer in the thin-film battery 20 at least comprising a light-absorbing layer, the photoelectric conversion layer being located on one side of the light-absorbing layer along a third direction; wherein the band gap of the photoelectric conversion layer is different from that of the light-absorbing layer. In this way, the light-absorbing layer and the photoelectric conversion layer with different band gaps are arranged, so that the laminated battery can effectively absorb light of different wavelengths, widening the spectral range of light absorption of the laminated battery and improving the photoelectric conversion efficiency of the laminated battery.

[0259] The term "bandgap" generally refers to the energy difference (in electron volts) between the top of the valence band and the bottom of the conduction band of a material.

[0260] In a stacked cell, the top cell / light absorbing region in the stack has the highest bandgap, counted in the direction of light incidence, while the bandgaps of the lower cells / light absorbing regions decrease towards the bottom of the device. This arrangement maximizes the extraction of photon energy, since the top cell / photoreceptive region absorbs the highest energy photons, while allowing the transmission of less energetic photons. Then, each subsequent cell / photoreceptive region extracts energy from the photons closest to its bandgap, thereby minimizing thermalization losses.

[0261] In some embodiments, the stacked cell is a mechanical stacked cell, which refers to the battery parts stacked along the third direction are connected in parallel and do not require current matching, and are isolated by a transparent insulating material, and the carriers between them are not directly conductive, and each battery part in the mechanical stacked cell has a separate positive and negative electrode to lead out current, which can flexibly realize the adjustment of current. The number of battery parts stacked in the mechanical stacked cell is not less than 2, which can be 2, 3, 4, 5, etc. The number of battery parts stacked in the mechanical stacked cell is taken as 2 in the following examples.

[0262] In some embodiments, the thin film cell constitutes the first battery part of the mechanical stacked cell, and the cell containing the photoelectric conversion layer constitutes the second battery part of the mechanical stacked cell, and the two are physically isolated by an insulating layer. Specifically, the second battery part at least includes a third electrode layer, a photoelectric conversion layer and a fourth electrode layer stacked in sequence along the third direction, and the third electrode layer and the fourth electrode layer are used to lead out the electrons or holes generated by the photoelectric conversion layer. The first battery part and the second battery part are isolated in the circuit by the insulating layer, and each of the two battery parts has two electrode layers, a total of four electrode layers, and the circuits of the two battery parts are independent of each other.

[0263] In some embodiments, the material of the photoelectric conversion layer can be one or more of perovskite material, crystalline silicon, polycrystalline silicon, amorphous silicon, cadmium telluride, copper zinc tin sulfide, copper zinc tin selenide, copper zinc tin selenide sulfide, copper indium gallium selenide, copper indium gallium diselenide or copper indium selenide, etc. The above-mentioned photoelectric conversion layer material can absorb photons and be excited by photons to generate electron-hole pairs, which can then be transmitted to an external circuit after extraction. It can be understood that the perovskite material here has the same type as the above-mentioned perovskite material, but the specific components are different to obtain a photoelectric conversion layer with different bandgaps, which is used for the light absorbing layer to absorb light of different wavelengths, to widen the absorption spectrum range of the stacked cell and to improve the photoelectric conversion efficiency of the stacked cell.

[0264] In some embodiments, the band gap of the photoelectric conversion layer is greater than the band gap of the light absorbing layer. For example, the band gap of the light absorbing layer is 1.2 eV to 1.5 eV, and the band gap of the photoelectric conversion layer is 1.55 eV to 2.2 eV. The band gaps of the light absorbing layer and the photoelectric conversion layer are configured to effectively absorb short wavelength and long wavelength light, respectively, to improve the photoelectric conversion efficiency of the stacked cell. For example, the photoelectric conversion layer includes a wide band gap perovskite material, such as APbI y Br 3-y , where A is defined as above, 1≤y<3, and the light absorbing layer includes a narrow band gap perovskite material, such as ASn x Pb 1-x X3, where A and X are defined as above, 0.5≤x≤1. Thus, a perovskite-perovskite mechanical stacked cell is obtained.

[0265] In other embodiments, the band gap of the photoelectric conversion layer is less than the band gap of the light absorbing layer. For example, the band gap of the photoelectric conversion layer is 1.2 eV to 1.5 eV, and the band gap of the light absorbing layer is 1.55 eV to 2.2 eV. The band gaps of the light absorbing layer and the photoelectric conversion layer are configured to effectively absorb long wavelength and short wavelength light, respectively, to improve the photoelectric conversion efficiency of the stacked cell. For example, the light absorbing layer includes a wide band gap perovskite material, such as APbI y Br 3-y , where A is defined as above, 1≤y<3, and the photoelectric conversion layer includes a narrow band gap perovskite material, such as ASn x Pb 1-x X3, where A and X are defined as above, 0.5≤x≤1. Thus, a perovskite-perovskite mechanical stacked cell is obtained. In another example, the light absorbing layer includes a wide band gap perovskite material, and the photoelectric conversion layer includes a crystalline silicon material. Thus, a perovskite-crystalline silicon mechanical stacked cell is obtained. Without limitation, the materials of the photoelectric conversion layer and the light absorbing layer can also be other materials, such as organic photovoltaic materials, copper indium gallium selenide materials, etc.

[0266] Further, in the case where the second cell part including the light absorbing layer is a thin film type cell, the thin film type cell can also adopt the structure of the thin film cell 20 to form a PN junction (diode) to alleviate the problem of hot spots or shading, etc. The specific structure is not described here again.

[0267] Specifically, the mechanical stacked battery comprises a substrate, a first electrode layer, an optional first transport layer, a light absorption layer, an optional second transport layer, a second electrode layer, an insulation layer, a third electrode layer, an optional third transport layer, a photoelectric conversion layer, an optional fourth transport layer, and a fourth electrode layer stacked in sequence, wherein the first transport layer and the second transport layer have different carrier transport properties and are selected from one of an electron transport layer and a hole transport layer, and the third transport layer and the fourth transport layer have different carrier transport properties and are selected from one of an electron transport layer and a hole transport layer.

[0268] Further, since the second electrode layer and the third electrode layer are located in the middle of the mechanical stacked battery, in order to further increase the light energy utilization rate of the mechanical stacked battery and enable the remaining light after absorption by a battery part to enter the next battery part, the third electrode and the fourth electrode can be made of light-transmissive electrode materials, such as one or more of indium tin oxide (ITO), lanthanide metal-doped indium oxide, fluorine-doped tin oxide (FTO), antimony-doped tin oxide, boron-doped zinc oxide (BZO), aluminum-doped zinc oxide (AZO), indium-doped zinc oxide (IZO), gallium-doped zinc oxide (GZO), indium tungsten oxide (IWO), etc. In some embodiments, the material of the insulation layer includes but is not limited to glass or an insulating adhesive. Further, the glass is transparent glass; further, the insulating adhesive is transparent adhesive.

[0269] In some other embodiments, the stacked battery is a monolithic integrated stacked battery, which means that the battery parts stacked in the third direction are connected in series between a pair of electrode layers, and the two battery parts are connected through a composite layer or a tunneling junction to achieve current matching between adjacent battery parts. The monolithic integrated stacked battery is relatively smaller in size compared with the mechanical stacked battery. The number of stacked battery parts of the monolithic integrated stacked battery is not less than 2, and can be 2, 3, 4, 5, etc. Hereinafter, the number of stacked battery parts of the monolithic integrated stacked battery is taken as 2 for illustration.

[0270] In some embodiments, the monolithic integrated stacked battery includes a substrate, a first electrode layer, a light absorption layer, a recombination layer / tunneling layer, a photoelectric conversion layer, and a second electrode layer stacked along a third direction. The recombination layer is configured to recombine and annihilate the holes generated from the light absorption layer and the electrons generated from the photoelectric conversion layer, or the electrons generated from the light absorption layer and the holes generated from the photoelectric conversion layer, which are transmitted toward the recombination layer, to form a low ohmic tunnel recombination between a first battery part containing the light absorption layer and a second battery part containing the photoelectric conversion layer, reduce charge accumulation, and thus achieve electrical or optical connection between the battery parts, so that the carriers can be transmitted and recombined between the battery parts, thereby improving the efficiency of the entire monolithic integrated stacked battery. The tunneling layer is located between the two battery parts of the stacked battery and is mainly configured to achieve effective transmission of the electrons and holes. The tunneling layer enables the electrons and holes to be transmitted from the bottom battery to the top battery through the tunneling effect, thereby reducing the energy loss caused by electron thermal relaxation and improving the photoelectric conversion efficiency of the battery. In this structure, the recombination layer / tunneling layer and the photoelectric conversion layer are similar to the light absorption layer and are cut along the third direction by the second set of scribe grooves. Specifically, the first electrode layer is cut along the third direction by the first set of scribe grooves, the light absorption layer, the recombination layer / tunneling layer, and the photoelectric conversion layer are cut along the third direction by the second set of scribe grooves, and the second electrode layer is cut along the third direction by the third set of scribe grooves. In this way, the first electrode layer, the light absorption layer, the recombination layer / tunneling layer, the photoelectric conversion layer, and the second electrode layer are used to form a plurality of stacked sub-batteries arranged along the second direction, and the plurality of stacked sub-batteries are structurally separated and connected in series by the first set of scribe grooves / the second set of scribe grooves / the third set of scribe grooves. The first electrode layer, the second semiconductor layer, and the second electrode layer are used to form a plurality of diodes arranged along the second direction, and the plurality of diodes are structurally separated by the first set of scribe grooves / the second set of scribe grooves / the third set of scribe grooves. In addition, the first set of scribe grooves / the second set of scribe grooves / the third set of scribe grooves also form a parallel relationship between one diode and a plurality of stacked sub-batteries. In this way, when a certain stacked sub-battery is shaded or damaged, the diode connected in parallel with the stacked sub-battery is turned on due to the existence of the reverse bias, thereby bypassing the generated reverse bias and not damaging the shaded or damaged stacked sub-battery.

[0271] In some embodiments, the band gap of the photoelectric conversion layer is smaller than the band gap of the light absorption layer. For example, the band gap of the photoelectric conversion layer is 1.2 eV to 1.5 eV, and the band gap of the light absorption layer is 1.55 eV to 2.2 eV.

[0272] In some embodiments, the monolithic integrated stacked cell includes a substrate, a first electrode layer, a photoelectric conversion layer, a composite layer / tunneling layer, a light absorption layer, and a second electrode layer stacked along a third direction. The composite layer / tunneling layer has the same function as described above. In this structure, the composite layer / tunneling layer, the photoelectric conversion layer, and the light absorption layer are cut along the third direction by a second set of scribe lines. Specifically, the first electrode layer is cut along the third direction by a first set of scribe lines, the photoelectric conversion layer, the composite layer / tunneling layer, and the light absorption layer are cut along the third direction by the second set of scribe lines, and the second electrode layer is cut along the third direction by a third set of scribe lines. In this way, the first electrode layer, the photoelectric conversion layer, the composite layer / tunneling layer, the light absorption layer, and the second electrode layer are used to form a plurality of stacked sub-cells arranged along a second direction, and the plurality of stacked sub-cells are structurally separated and connected in series by the first set of scribe lines / the second set of scribe lines / the third set of scribe lines. The first electrode layer, the second semiconductor layer, and the second electrode layer are used to form a plurality of diodes arranged along the second direction, and the plurality of diodes are structurally separated by the first set of scribe lines / the second set of scribe lines / the third set of scribe lines, and the first set of scribe lines / the second set of scribe lines / the third set of scribe lines also form a parallel relationship between one diode and a plurality of stacked sub-cells. In this way, when a certain stacked sub-cell is shaded or damaged, the diode connected in parallel with the stacked sub-cell is turned on due to the existence of the reverse bias, thereby bypassing the generated reverse bias and not damaging the shaded or damaged stacked sub-cell. In some embodiments, the monolithic integrated stacked cell includes a substrate, a first electrode layer, an optional first transport layer, a light absorption layer, an optional second transport layer, a composite layer / tunneling layer, an optional third transport layer, a photoelectric conversion layer, an optional fourth transport layer, and a second electrode layer stacked along a third direction. The first transport layer and the second transport layer have different carrier transport properties and are selected from one of an electron transport layer and a hole transport layer, respectively. The third transport layer and the fourth transport layer have different carrier transport properties and are selected from one of an electron transport layer and a hole transport layer, respectively. The third transport layer and the first transport layer have the same carrier transport properties.

[0273] In some embodiments, the band gap of the photoelectric conversion layer is greater than the band gap of the light absorption layer. For example, the band gap of the light absorption layer is 1.2 eV to 1.5 eV, and the band gap of the photoelectric conversion layer is 1.55 eV to 2.2 eV.

[0274] In some embodiments, the photoelectric conversion layer includes, but is not limited to, the following photoelectric conversion materials: perovskite material, cadmium telluride, copper zinc tin sulfide, copper zinc tin selenide, copper zinc tin selenide sulfide, copper indium gallium selenide, copper indium gallium diselenide, or copper indium selenide. The above-mentioned materials can absorb different wavelengths of light from the light-absorbing layer, so as to broaden the spectral range of light absorption of the multi-junction solar cell and improve the photoelectric conversion efficiency of the multi-junction solar cell. In the present disclosure, the perovskite material here has the same type as the perovskite material defined in the light-absorbing layer above, but the specific components are different to obtain a photoelectric conversion layer with a different band gap, so as to absorb different wavelengths of light from the light-absorbing layer, broaden the spectral range of light absorption of the monolithically integrated stacked cell, and improve the photoelectric conversion efficiency of the cell. In some embodiments, the monolithically integrated stacked cell includes a substrate, a first electrode layer, an optional third transport layer, a photoelectric conversion layer, an optional fourth transport layer, a composite layer / tunneling layer, an optional first transport layer, a light-absorbing layer, an optional second transport layer, and a second electrode layer, wherein the first transport layer and the second transport layer have different carrier transport properties and are respectively selected from one of an electron transport layer and a hole transport layer, the third transport layer and the fourth transport layer have different carrier transport properties and are respectively selected from one of an electron transport layer and a hole transport layer, and the third transport layer and the first transport layer have consistent carrier transport properties.

[0275] In the present disclosure, the definitions and material selection of the corresponding hole transport layer or electron transport layer are as described above, and will not be repeated here.

[0276] For example, the components of the composite layer include one or more of metal materials, transparent conductive oxides, and carbon materials. Further, the components of the transparent conductive oxide layer include, but are not limited to, one or more of FTO (fluorine-doped tin oxide), ITO (indium tin oxide), AZO (aluminum-doped zinc oxide), BZO (boron-doped zinc oxide), IZO (indium zinc oxide), IGZO (indium gallium zinc oxide), and ATO (antimony tin oxide). Further, the metal materials include, but are not limited to, one or more of gold, copper, silver, platinum, aluminum, iron, and the like. Further, the carbon materials include one or more of graphite, graphene, carbon nanotubes.

[0277] In some embodiments, the thickness of the composite layer is 0.1 nm to 200 nm, for example, 0.1 nm, 0.8 nm, 1 nm, 2 nm, 10 nm, 30 nm, 50 nm, 90 nm, 100 nm, 130 nm, 150 nm, 160 nm, 200 nm, or a range formed by any two of the above-mentioned values as end values.

[0278] In some embodiments, the components of the tunneling layer include, but are not limited to, PEDOT, transparent metal oxides, and the like.

[0279] It can be understood that other functional layers such as passivation layers, barrier layers, etc. can also be introduced in the stacked battery according to requirements, which are not limited here.

[0280] In yet another embodiment of the present disclosure, please refer to FIG. 11, which shows a schematic diagram of a photovoltaic system 60 provided by the embodiments of the present disclosure. As shown in FIG. 11, the photovoltaic system 60 at least includes the aforementioned thin film battery 20, and the photovoltaic system 60 is used to convert light energy into electrical energy.

[0281] In yet another embodiment of the present disclosure, please refer to FIG. 12, which shows a schematic diagram of an electrical device 70 provided by the embodiments of the present disclosure. As shown in FIG. 12, the electrical device 70 at least includes the aforementioned thin film battery 20, and the thin film battery 20 can be used as a power supply of the electrical device or as an energy storage unit of the electrical device 70. The electrical device can include mobile devices (such as mobile phones, notebook computers, etc.), electric vehicles (such as pure electric vehicles, hybrid electric vehicles, plug-in hybrid electric vehicles, electric bicycles, electric scooters, electric golf carts, electric trucks, etc.), electric trains, ships and satellites, energy storage systems, etc., but is not limited thereto.

[0282] In yet another embodiment of the present disclosure, please refer to FIG. 13, which shows a schematic diagram of a power generation device 80 provided by the embodiments of the present disclosure. As shown in FIG. 13, the power generation device 80 at least includes the aforementioned thin film battery 20, and the thin film battery 20 can be used as the core of the power generation device 80 for outputting electrical energy. The power generation device can be a photovoltaic power generation device, a solar device, etc.

[0283] It should be noted that the present disclosure is not limited to the above-mentioned embodiments. The above-mentioned embodiments are only examples, and embodiments having the same technical essence and playing the same role and effect within the technical solution range of the present disclosure are all included in the technical solution range of the present disclosure. In addition, within the scope of the main idea of the present disclosure, various modifications that can be thought of by those skilled in the art, other ways constructed by combining part of the components of the embodiments are also included in the scope of the present disclosure.

Claims

1. A thin-film battery, the thin-film battery comprising: Substrate; A first electrode layer is located on one side of the substrate along a third direction, and the first electrode layer is etched along a third direction by a first scribing groove group. A semiconductor layer, the semiconductor layer being located on the side of the first electrode layer away from the substrate along a third direction, the semiconductor layer comprising a first semiconductor layer and a second semiconductor layer sequentially along a first direction; and the semiconductor layer being etched by a second set of scribing grooves along a third direction; The second electrode layer is located on the side of the semiconductor layer away from the first electrode layer along a third direction, and the second electrode layer is etched by a third scribing groove group along a third direction. The first electrode layer, the first semiconductor layer, and the second electrode layer are used to form a plurality of sub-cells arranged along a second direction. The plurality of sub-cells are structurally separated and connected in series by the scribing groove group. The first electrode layer, the second semiconductor layer, and the second electrode layer are used to form a plurality of diodes arranged along the second direction. The plurality of diodes are structurally separated by the scribing groove group. For a region in the semiconductor layer corresponding to a diode, it is electrically connected to a region in the first electrode layer corresponding to a sub-cell, and it is also electrically connected to a region in the second electrode layer corresponding to a sub-cell, so that a diode is connected in parallel with a plurality of sub-cells. The first direction, the second direction, and the third direction intersect each other.

2. The thin-film battery according to claim 1, wherein, The first semiconductor layer includes at least a light-absorbing layer; The second semiconductor layer includes at least a first carrier polar layer and a second carrier polar layer stacked sequentially along a third direction on the side of the first electrode layer away from the substrate, and the first carrier polar layer is close to the first electrode layer; the first carrier polar layer and the second carrier polar layer are of different semiconductor types.

3. The thin-film battery according to claim 2, wherein, The thin-film battery satisfies any one of the following conditions: (1) The first semiconductor layer includes a first transport layer and the light-absorbing layer stacked sequentially along a third direction, wherein the first transport layer is close to the first electrode layer; Wherein, when the first transport layer is an electron transport layer, the first carrier polarity layer is a p-type semiconductor and the second carrier polarity layer is an n-type semiconductor; when the first transport layer is a hole transport layer, the first carrier polarity layer is an n-type semiconductor and the second carrier polarity layer is a p-type semiconductor. (2) The first semiconductor layer includes the light-absorbing layer and the second transport layer stacked sequentially along a third direction, the light-absorbing layer being close to the first electrode layer; wherein, when the second transport layer is an electron transport layer, the first carrier polarity layer is an n-type semiconductor and the second carrier polarity layer is a p-type semiconductor; when the second transport layer is a hole transport layer, the first carrier polarity layer is a p-type semiconductor and the second carrier polarity layer is an n-type semiconductor; (3) The first semiconductor layer includes a first transport layer, the light-absorbing layer and the second transport layer stacked sequentially along a third direction, with the first transport layer close to the first electrode layer; Wherein, when the first transport layer is an electron transport layer and the second transport layer is a hole transport layer, the first carrier polarity layer is a p-type semiconductor and the second carrier polarity layer is an n-type semiconductor; when the first transport layer is a hole transport layer and the second transport layer is an electron transport layer, the first carrier polarity layer is an n-type semiconductor and the second carrier polarity layer is a p-type semiconductor.

4. The thin-film battery according to claim 3, wherein, When the second transport layer is an electronic transport layer The first semiconductor layer further includes a barrier layer located between the second transport layer and the second electrode layer; the material of the barrier layer is the same as the material of the first carrier polar layer in the second semiconductor layer.

5. The thin-film battery according to claim 3, wherein, When the first transport layer is a hole transport layer and the second transport layer is an electron transport layer. The first semiconductor layer further includes a barrier layer located between the second transport layer and the second electrode layer; the material of the barrier layer is the same as the material of the first carrier polar layer in the second semiconductor layer.

6. The thin-film battery according to any one of claims 3-5, wherein, The first scribing groove group includes a plurality of first horizontal scribing grooves arranged along a second direction, the second scribing groove group includes a plurality of second scribing grooves arranged along a second direction, and the third scribing groove group includes a plurality of third horizontal scribing grooves arranged along a second direction. Each of the first horizontal scribing grooves, the second scribing grooves, and the third horizontal scribing grooves extends along a first direction. Each of the first horizontal scribing grooves has a second scribing groove on one side along the second direction, and each of the second scribing grooves has a third horizontal scribing groove on the side away from the nearest first horizontal scribing groove. The sequentially adjacent first horizontal scribing grooves, second scribing grooves, and third horizontal scribing grooves are used to achieve structural separation and series connection of two adjacent sub-cells.

7. The thin-film battery according to claim 6, wherein, The thin-film battery includes a fourth scribe groove, and at least a portion of the semiconductor layer is scribed by the fourth scribe groove along a third direction; The fourth scribe line extends along the second direction, and the first semiconductor layer and the second semiconductor layer are isolated via the fourth scribe line; the fourth scribe line extends from the third edge of the thin-film battery to the fourth edge of the thin-film battery, and the third edge and the fourth edge are opposite each other along the second direction.

8. The thin-film battery according to claim 7, wherein, In the case where one of the diodes and one of the sub-cells are connected in parallel, The first horizontal scribed groove, the second scribed groove, and the third horizontal scribed groove all extend from the first edge of the thin-film battery to the second edge of the thin-film battery, and the first edge and the second edge are opposite to each other along a first direction.

9. The thin-film battery according to claim 8, wherein, The first semiconductor layer is divided into two parts along a first direction, and the second semiconductor layer is divided into two parts along the first direction. The number of fourth scribers is three. The first fourth scriber is used to isolate the first semiconductor layer in the first part and the second semiconductor layer in the first part. The second fourth scriber is used to isolate the second semiconductor layer in the second part and the first semiconductor layer in the second part. The third fourth scriber is used to isolate the second semiconductor layer in the first part and the second semiconductor layer in the second part. The first scribing groove group further includes a fifth scribing groove extending along a second direction, and the fifth scribing groove extends from the third edge of the thin film battery to the fourth edge of the thin film battery; along the first direction, the projection of the fifth scribing groove is located between the first fourth scribing groove and the second fourth scribing groove. The third scribed groove group also includes a sixth scribed groove extending along the second direction, and the sixth scribed groove extends from the third edge of the thin-film battery to the fourth edge of the thin-film battery; along the second direction, the projection of the sixth scribed groove is located between the first fourth scribed groove and the second fourth scribed groove.

10. The thin-film battery according to claim 7, wherein, In the case where one diode is connected in parallel with N sub-cells: The first scribing groove group also includes a plurality of first vertical scribing grooves, and the third scribing groove group also includes a plurality of third vertical scribing grooves, each of the first vertical scribing grooves and the third vertical scribing grooves extending along the second direction. For N+1 first horizontal scribing grooves corresponding to N sub-cells, the first horizontal scribing grooves at the beginning and end extend from the first edge to the second edge of the thin-film battery; the first horizontal scribing grooves in the middle part extend from the first edge, and the length of the first horizontal scribing grooves in the middle part is less than the length of the first horizontal scribing grooves at the beginning and end. The first vertical scribing groove extends from the end of the Nth first horizontal scribing groove near the second edge to the first first horizontal scribing groove; For N+1 second scribe lines corresponding to N sub-cells, the first and last second scribe lines extend from the first edge to the second edge of the thin-film cell; the second scribe lines in the middle extend from the first edge to the fourth scribe line. For N+1 third horizontal scribing grooves corresponding to N sub-cells, the first and last third horizontal scribing grooves extend from the first edge to the second edge of the thin-film battery; the third horizontal scribing grooves in the middle part extend from the first edge, and the length of the third horizontal scribing grooves in the middle part is less than the length of the third horizontal scribing grooves at the first and last parts. The third vertical scribing groove extends from one end of the second third horizontal scribing groove near the second edge to the last third horizontal scribing groove; Where N is a positive integer greater than or equal to 2.

11. The thin-film battery according to claim 10, wherein, The first vertical scribe line groove, the fourth scribe line groove, and the third vertical scribe line groove are each equidistant from the second edge of the thin-film battery.

12. The thin-film battery according to claim 7, wherein, In the case where one diode is connected in parallel with N sub-cells: The first semiconductor layer is divided into two parts along the first direction, and the second semiconductor layer is divided into two parts along the first direction. The number of fourth scribe lines is 3. The first fourth scribe line is used to isolate the first semiconductor layer in the first part and the second semiconductor layer in the first part. The second fourth scribe line is used to isolate the second semiconductor layer in the second part and the first semiconductor layer in the second part. The third fourth scribe line is used to isolate the second semiconductor layer in the first part and the second semiconductor layer in the second part. The first scribe line groove group also includes three fifth scribe lines. The first and third fifth scribe lines extend along the fourth edge of the thin film battery to the first horizontal scribe line groove closest to the third edge of the thin film battery. The second fifth scribe line groove extends along the fourth edge of the thin film battery to the third edge closest to the thin film battery. The third scribe line groove group also includes three sixth scribe lines. The first and third sixth scribe lines extend along the third edge of the thin film battery to the first horizontal scribe line groove closest to the fourth edge of the thin film battery. The second sixth scribe line groove extends along the third edge of the thin film battery to the fourth edge closest to the thin film battery. The first fifth scribe groove, the first fourth scribe groove, and the first sixth scribe groove are aligned along a third direction; the second fifth scribe groove, the second fourth scribe groove, and the second sixth scribe groove are aligned along a third direction; the third fifth scribe groove, the third fourth scribe groove, and the third sixth scribe groove are aligned along a third direction.

13. The thin-film battery according to claim 12, wherein, For one portion of the first horizontal scribing groove, it extends from the first edge to the first said fifth scribing groove; for another portion of the first horizontal scribing groove, it extends from the third said fifth scribing groove to the second edge. For one portion of the second scribe groove, it extends from the first edge to the first fourth scribe groove; for another portion of the second scribe groove, it extends from the third fourth scribe groove to the second edge. For one portion of the third horizontal scribe groove, it extends from the first edge to the first sixth scribe groove; for another portion of the third horizontal scribe groove, it extends from the third sixth scribe groove to the second edge.

14. The thin-film battery according to any one of claims 2-5, wherein, The thin-film battery satisfies one or more of the conditions (1) to (4): (1) The width of the first semiconductor layer along the first direction is greater than the width of the second semiconductor layer along the second direction; (2) The maximum operating current of the diode under forward bias is greater than or equal to the maximum power point current of the corresponding series sub-cell string passing through the diode under forward bias; (3) The thickness of the first carrier polar layer along the third direction is 1 nm to 1000 nm; (4) The thickness of the second carrier polar layer along the third direction is 1 nm to 1000 nm.

15. The thin-film battery according to any one of claims 1-14, wherein, The thin-film battery satisfies one or more of the conditions (1) to (2): (1) The width of the first semiconductor layer along the first direction is 0.1% to 50% of the width of the second semiconductor layer along the second direction, preferably 1% to 10%, and further preferably 1% to 3%; (2) The maximum operating current of the diode under forward bias is greater than or equal to the short-circuit current of the corresponding series sub-cell string passing through the diode under forward bias.

16. The thin-film battery according to any one of claims 6-13, wherein, The thin-film battery satisfies one or more of the conditions (1) to (7): (1) In the second direction, the distance between the first horizontal scribing groove and the nearest second scribing groove is 1 to 50 micrometers; in the second direction, the distance between the second scribing groove and the nearest third horizontal scribing groove is 1 to 50 micrometers. (2) The width of the second semiconductor layer along the first direction is 5mm-20mm; (3) The light-absorbing layer in the semiconductor layer is allowed to be at least a perovskite layer; (4) The barrier layer material in the semiconductor layer is at least allowed to be tin oxide (SnO2); (5) The n-type semiconductor is permitted to be at least SnO2, poly[dibenzothiadiazole]C8-BTBT, titanium dioxide TiO2 or N,N'-bis[3-(dimethylamino)propyl]perylene-3,4,9,10-tetracarboxylic acid diimide PDIN; (5) The p-type semiconductor is at least allowed to be nickel oxide (NiO). x Molybdenum trioxide (MoO3), poly(bis(4-phenyl)(2,4,6-trimethylphenyl)amine) PTAA, poly(3,4-ethylenedioxythiophene)-poly(styrene sulfonic acid) PEDOT:PSS or 3-hexylthiophene polymer P3HT; (6) The third scribing groove group also scribes the semiconductor layer.

17. The thin-film battery according to any one of claims 7-13, wherein, (1) The width of the fourth scribe groove along the first direction is greater than or equal to 0 mm.

18. A method for preparing a thin-film battery, the method comprising: Provide substrate; A first electrode layer is formed on one side of the substrate along a third direction, and the first electrode layer is processed along the third direction to form a first scribing groove group; A semiconductor layer is formed on the side of the first electrode layer away from the substrate along a third direction, and the semiconductor layer includes a first semiconductor layer and a second semiconductor layer in sequence along a first direction; the semiconductor layer is processed along a third direction to form a second scribing groove group; A second electrode layer is formed on the side of the semiconductor layer away from the first electrode layer along a third direction, and the second electrode layer is processed along a third direction to form a third scribing groove group; The first electrode layer, the first semiconductor layer, and the second electrode layer are used to form a plurality of sub-cells arranged along a second direction. The plurality of sub-cells are structurally separated and connected in series by the scribing groove group. The first electrode layer, the second semiconductor layer, and the second electrode layer are used to form a plurality of diodes arranged along the second direction. The plurality of diodes are structurally separated by the scribing groove group. For a region in the semiconductor layer corresponding to a diode, it is electrically connected to a region in the first electrode layer corresponding to a sub-cell, and it is also electrically connected to a region in the second electrode layer corresponding to a sub-cell, so that the scribing groove group also enables a diode to form a parallel relationship with a plurality of sub-cells. The first direction, the second direction, and the third direction intersect each other.

19. The preparation method according to claim 18, wherein, The first semiconductor layer includes at least a light-absorbing layer; the second semiconductor layer includes at least a first carrier polar layer and a second carrier polar layer stacked sequentially along a third direction on the side of the first electrode layer away from the substrate, and the first carrier polar layer is close to the first electrode layer; the first carrier polar layer and the second carrier polar layer are of different semiconductor types.

20. The preparation method according to claim 19, wherein, The first scribing groove group includes a plurality of first horizontal scribing grooves arranged along a second direction; the second scribing groove group includes a plurality of second scribing grooves arranged along a second direction; and the third scribing groove group includes a plurality of third horizontal scribing grooves arranged along a second direction. Each of the first horizontal scribing grooves, the second scribing groove, and the third horizontal scribing groove extends along a first direction. Each of the first horizontal scribing grooves has a second scribing groove on one side along the second direction, and each of the second scribing grooves has a third horizontal scribing groove on the side away from the nearest first horizontal scribing groove. The sequentially adjacent first horizontal scribing grooves, second scribing grooves, and third horizontal scribing grooves are used to achieve structural separation and series connection of two adjacent sub-cells. The thin-film battery includes a fourth scribe groove, and at least a portion of the semiconductor layer is scribed by the fourth scribe groove along a third direction; The fourth scribe line extends along the second direction, and the first semiconductor layer and the second semiconductor layer are isolated via the fourth scribe line; the fourth scribe line extends from the third edge of the thin-film battery to the fourth edge of the thin-film battery, and the third edge and the fourth edge are opposite each other along the second direction.

21. The preparation method according to claim 20, wherein, The first semiconductor layer includes a first transport layer, the light-absorbing layer, and a second transport layer; The step of forming a semiconductor layer in the first electrode layer along a third direction includes: The first transmission layer, the light-absorbing layer, and the second transmission layer are sequentially formed on the first electrode layer along a third direction; The first transmission layer, the light-absorbing layer, and the second transmission layer are cut to form the fourth scribe line groove; The first transmission layer, the light-absorbing layer, and the second transmission layer are removed from one side of the fourth scribe groove along the first direction, and the area after removal forms a diode region; The first carrier polarity layer and the second carrier polarity layer are sequentially formed in the diode region; Multiple second scribe lines are formed by cutting the first transmission layer, the light-absorbing layer, the second transmission layer, the first carrier polar layer, and the second carrier polar layer along a third direction; Wherein, when the first transport layer is an electron transport layer and the second transport layer is a hole transport layer, the first carrier polar layer is P-type doped and the second carrier polar layer is N-type doped; when the second transport layer is a hole transport layer and the second transport layer is an electron transport layer, the first carrier polar layer is N-type doped and the second carrier polar layer is P-type doped.

22. The preparation method according to claim 20 or 21, wherein, The first semiconductor layer includes a hole transport layer, the light-absorbing layer, an electron transport layer, and a blocking layer; The step of forming a semiconductor layer in the first electrode layer along a third direction includes: The hole transport layer, the light-absorbing layer, and the electron transport layer are sequentially formed on the first electrode layer along a third direction; The hole transport layer, the light-absorbing layer, and the electron transport layer are cut to form the fourth scribe line groove; The hole transport layer, the light-absorbing layer, and the electron transport layer are removed from one side of the fourth scribe groove along the first direction, and the area after removal forms a diode region; A barrier layer is formed on the electron transport layer and the diode region, and the portion of the barrier layer located in the diode region serves as the first carrier polar layer; A second carrier polar layer is formed on the first carrier polar layer; Multiple second scribe lines are formed by cutting the hole transport layer, the light absorption layer, the electron transport layer, the first carrier polar layer and the second carrier polar layer along a third direction.

23. The preparation method according to claim 21 or 22, wherein, In the case where one of the diodes and one of the sub-cells are connected in parallel, The first horizontal scribed groove, the second scribed groove, and the third horizontal scribed groove all extend from the first edge of the thin-film battery to the second edge of the thin-film battery, with the first edge and the second edge facing each other along a first direction.

24. The preparation method according to claim 20, wherein, The first semiconductor layer is divided into two parts along the first direction, while the second semiconductor layer is a single unit. There are two fourth scribe lines; the first fourth scribe line is used to isolate the first semiconductor layer and the second semiconductor layer in the first part, and the second fourth scribe line is used to isolate the first semiconductor layer and the second semiconductor layer in the second part. The first scribing groove group further includes a fifth scribing groove extending along a second direction, and the fifth scribing groove extends from the third edge of the thin film battery to the fourth edge of the thin film battery; along the first direction, the projection of the fifth scribing groove is located between the first fourth scribing groove and the second fourth scribing groove. The third scribed groove group also includes a sixth scribed groove extending along the second direction, and the sixth scribed groove extends from the third edge of the thin-film battery to the fourth edge of the thin-film battery; along the second direction, the projection of the sixth scribed groove is located between the first fourth scribed groove and the second fourth scribed groove.

25. The preparation method according to claim 20, wherein, The first scribing groove group also includes a plurality of first vertical scribing grooves, and the third scribing groove group also includes a plurality of third vertical scribing grooves, each of the first vertical scribing grooves and the third vertical scribing grooves extending along the second direction. For N+1 first horizontal scribing grooves corresponding to N sub-cells, the first horizontal scribing grooves at the beginning and end extend from the first edge to the second edge of the thin-film battery; the first horizontal scribing grooves in the middle part extend from the first edge, and the length of the first horizontal scribing grooves in the middle part is less than the length of the first horizontal scribing grooves at the beginning and end. The first vertical scribing groove extends from the end of the Nth first horizontal scribing groove near the second edge to the first first horizontal scribing groove; For N+1 second scribe lines corresponding to N sub-cells, the first and last second scribe lines extend from the first edge to the second edge of the thin-film cell; the second scribe lines in the middle extend from the first edge to the fourth scribe line. For N+1 third horizontal scribing grooves corresponding to N sub-cells, the first and last third horizontal scribing grooves extend from the first edge to the second edge of the thin-film battery; the third horizontal scribing grooves in the middle part extend from the first edge, and the length of the third horizontal scribing grooves in the middle part is less than the length of the third horizontal scribing grooves at the first and last parts. The third vertical scribing groove extends from one end of the second third horizontal scribing groove near the second edge to the last third horizontal scribing groove; Where N is a positive integer greater than or equal to 2; the first vertical scribe groove, the fourth scribe groove and the third vertical scribe groove are each equidistant from the second edge of the thin-film battery.

26. The preparation method according to claim 20, wherein, In the case where one diode is connected in parallel with N sub-cells: The first semiconductor layer is divided into two parts along a first direction, and the second semiconductor layer is divided into two parts along the first direction. The number of fourth scribers is three. The first fourth scriber is used to isolate the first semiconductor layer in the first part and the second semiconductor layer in the first part. The second fourth scriber is used to isolate the second semiconductor layer in the first part and the second semiconductor layer in the second part. The third fourth scriber is used to isolate the second semiconductor layer in the second part and the first semiconductor layer in the second part. The first scribe line groove group also includes three fifth scribe lines. The first and third fifth scribe lines extend along the fourth edge of the thin film battery to the first horizontal scribe line groove closest to the third edge of the thin film battery. The second fifth scribe line groove extends along the fourth edge of the thin film battery to the third edge closest to the thin film battery. The third scribe line groove group also includes three sixth scribe lines. The first and third sixth scribe lines extend along the third edge of the thin film battery to the first horizontal scribe line groove closest to the fourth edge of the thin film battery. The second sixth scribe line groove extends along the third edge of the thin film battery to the fourth edge closest to the thin film battery. The first fifth scribe groove, the first fourth scribe groove, and the first sixth scribe groove are aligned along a third direction; the second fifth scribe groove, the second fourth scribe groove, and the second sixth scribe groove are aligned along a third direction; the third fifth scribe groove, the third fourth scribe groove, and the third sixth scribe groove are aligned along a third direction.

27. The preparation method according to claim 26, wherein, For one portion of the first horizontal scribing groove, it extends from the first edge to the first said fifth scribing groove; for another portion of the first horizontal scribing groove, it extends from the third said fifth scribing groove to the second edge. For one portion of the second scribe groove, it extends from the first edge to the first fourth scribe groove; for another portion of the second scribe groove, it extends from the third fourth scribe groove to the second edge. For one portion of the third horizontal scribe groove, it extends from the first edge to the first sixth scribe groove; for another portion of the third horizontal scribe groove, it extends from the third sixth scribe groove to the second edge.

28. The preparation method according to any one of claims 20-27, wherein, The method also satisfies one or more of the conditions (1) to (7): (1) In the second direction, the distance between the first horizontal scribing groove and the nearest second scribing groove is 1 to 50 micrometers; in the second direction, the distance between the second scribing groove and the nearest third horizontal scribing groove is 1 to 50 micrometers. (2) The width of the second semiconductor layer along the first direction is 5mm-20mm; (3) The light-absorbing layer in the semiconductor layer is allowed to be at least a perovskite layer; (4) The barrier layer material in the semiconductor layer is at least allowed to be tin oxide (SnO2); (5) The doped material layer of the N-type doping is allowed to be at least SnO2, poly[dibenzothiadiazole]C8-BTBT, titanium dioxide TiO2 or N,N'-bis[3-(dimethylamino)propyl]perylene-3,4,9,10-tetracarboxylic acid diimide PDIN, and the thickness of the doped material layer along the third direction is 1-1000 nm; (6) The doped material layer of the P-type doped material is at least allowed to be nickel oxide (NiO). x The doped material layer has a thickness of 1-1000 nm along the third direction, consisting of molybdenum trioxide (MoO3), poly(bis(4-phenyl)(2,4,6-trimethylphenyl)amine PTAA, poly(3,4-ethylenedioxythiophene)-poly(styrenesulfonic acid)PEDOT:PSS, or 3-hexylthiophene polymer P3HT. (7) The third scribing groove group also scribes the semiconductor layer.

29. A stacked battery, comprising a thin-film battery according to any one of claims 1-17 and a photoelectric conversion layer, wherein the first semiconductor layer includes at least a light-absorbing layer, and the photoelectric conversion layer is located on one side of the light-absorbing layer along a third direction; wherein, The photoelectric conversion layer has a different band gap than the light-absorbing layer.

30. The stacked battery according to claim 29, wherein, The stacked battery includes one or more of mechanically stacked batteries and monolithically integrated stacked batteries.

31. A photovoltaic system comprising a thin-film battery as described in any one of claims 1-17, or comprising a tandem battery as described in claim 29 or 30.

32. An electrical device comprising a thin-film battery as described in any one of claims 1-17, or comprising a stacked battery as described in claim 29 or 30.

33. A power generation device comprising a thin-film battery as described in any one of claims 1-17, or comprising a stacked battery as described in claim 29 or 30.

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