Cell string, cell module, and photovoltaic system

Abstract

The present disclosure is applicable to the technical field of solar cells, and provides a cell string, a cell module, and a photovoltaic system. The cell string comprises several ribbons and several sliced cells, wherein each ribbon connects two adjacent sliced cells, and the sliced cells are formed by cutting an entire solar cell. Each of the sliced cells comprises two first sides and two second sides, wherein the length of the first sides is greater than the length of the second sides, and the two first sides respectively correspond to a first edge region and a second edge region; and the electrical resistivity of at least one of a silicon substrate in the first edge region and a silicon substrate in the second edge region is greater than or equal to 30 Ω·cm. In the cell string provided by the embodiments of the present disclosure, due to the electrical resistivity of the silicon substrate in the edge region corresponding to at least one longer edge of each sliced cell forming the cell string being greater than or equal to 30 Ω·cm, the edge recombination of the sliced cells can be reduced, and the power generation efficiency of a cell module formed by the cell string can be improved.

Description

A battery string, battery module, photovoltaic system

[0001] Cross-references to related applications

[0002] This disclosure claims priority to Chinese patent application No. 202410946864.6, filed on July 15, 2024, with the China National Intellectual Property Administration, entitled “A Battery String, Battery Module, Photovoltaic System”, the entire contents of which are incorporated herein by reference. Technical Field

[0003] This disclosure relates to the field of solar cell technology, and more particularly to a battery string, battery module, and photovoltaic system. Background Technology

[0004] Solar cells convert sunlight into electrical energy. Typically, a single solar cell is cut into slices, and multiple slices are then connected into strings using solder ribbons. However, edge recombination in the slices results in lower photoelectric conversion efficiency, leading to lower power generation efficiency in the resulting solar cell strings. Therefore, improving the power generation efficiency of solar cell modules formed by solar cell strings has become a pressing issue. Summary of the Invention

[0005] This disclosure provides a battery string, a battery module, and a photovoltaic system, aiming to solve the technical problem of how to improve the power generation efficiency of battery modules formed by battery strings in the prior art.

[0006] This disclosure is implemented as follows: the battery string of this disclosure includes a plurality of solder strips and a plurality of sliced ​​cells. The solder strips connect two adjacent sliced ​​cells. The sliced ​​cells are formed by cutting a whole solar cell. The sliced ​​cells include two first sides and two second sides. The length of the first side is greater than the length of the second side. The two first sides correspond to the first edge region and the second edge region, respectively.

[0007] The resistivity of at least one of the silicon substrates in the first edge region and the second edge region is greater than or equal to 30 Ω·cm.

[0008] This disclosure also provides a battery assembly including any of the battery strings described above.

[0009] This disclosure also provides a photovoltaic system including the aforementioned battery module.

[0010] In the battery strings, battery modules, and photovoltaic systems of this disclosure, since the resistivity of the silicon substrate in the edge region corresponding to at least one long side of the sliced ​​cells forming the battery string is greater than or equal to 30 Ω·cm, edge recombination of the sliced ​​cells can be reduced, thereby improving the power generation efficiency of the battery modules formed by the battery strings.

[0011] Additional aspects and advantages of this disclosure will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of this disclosure. Attached Figure Description

[0012] Figure 1 is a schematic diagram of the structure of a battery string provided in an embodiment of the present disclosure;

[0013] Figure 2 is a schematic diagram of the structure of a battery string provided in an embodiment of the present disclosure;

[0014] Explanation of key component symbols: Battery string 1000, sliced ​​battery 100, first side 11, first edge region 111, second edge region 112, second side 12, middle region 13. Detailed Implementation

[0015] To make the objectives, technical solutions, and advantages of this disclosure clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. Examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this disclosure, and should not be construed as limiting this disclosure. Furthermore, it should be understood that the specific embodiments described herein are merely for explaining this disclosure and are not intended to limit this disclosure.

[0016] In the description of this disclosure, it should be understood that the terms "upper", "lower", "back", "front", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this disclosure and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this disclosure.

[0017] In this disclosure, unless otherwise expressly specified and limited, "above" or "below" the second feature can include direct contact between the first and second features, or contact between the first and second features through another feature between them. Furthermore, "above," "over," and "on top" of the second feature includes the first feature directly above or diagonally above the second feature, or simply indicates that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature includes the first feature directly below or diagonally below the second feature, or simply indicates that the first feature is at a lower horizontal level than the second feature.

[0018] The following disclosure provides numerous different embodiments or examples for implementing various structures of this disclosure. To simplify the disclosure, specific examples of components and arrangements are described below. These are merely examples and are not intended to limit the scope of this disclosure. Furthermore, reference numerals and / or letters may be repeated in different examples; such repetition is for simplification and clarity and does not in itself indicate a relationship between the various embodiments and / or arrangements discussed. In addition, various specific examples of processes and materials are provided in this disclosure, but those skilled in the art will recognize the application of other processes and / or the use of other materials.

[0019] In this disclosure, since the resistivity of the silicon substrate in the edge region corresponding to at least one long side of the sliced ​​cell forming the battery string is greater than or equal to 30 Ω·cm, edge recombination of the sliced ​​cell can be reduced, thereby improving the power generation efficiency of the battery module formed by the battery string.

[0020] Example 1

[0021] The battery string 1000 of this embodiment includes a plurality of solder strips and a plurality of sliced ​​cells 100. The solder strips connect two adjacent sliced ​​cells 100. The sliced ​​cells 100 are formed by cutting a whole solar cell. The sliced ​​cells 100 include two first sides 11 and two second sides 12. The length of the first side 11 is greater than the length of the second side 12. The two first sides 11 correspond to a first edge region 111 and a second edge region 112, respectively. The first edge region 111 is a part of the sliced ​​cell 100 that has the first side 11, and the second edge region 112 is a part of the sliced ​​cell 100 that has the second side 12.

[0022] The resistivity of at least one of the silicon substrates in the first edge region 111 and the second edge region 112 is greater than or equal to 30 Ω·cm, that is: the resistivity of the silicon substrate in the first edge region 111 is greater than or equal to 30 Ω·cm, or the resistivity of the silicon substrate in the second edge region 112 is greater than or equal to 30 Ω·cm, or the resistivity of both the silicon substrate in the first edge region 111 and the silicon substrate in the second edge region 112 is greater than or equal to 30 Ω·cm.

[0023] In the battery string 1000 of this disclosure, since the resistivity of the silicon substrate in the edge region corresponding to at least one long side of the sliced ​​cell 100 forming the battery string 1000 is greater than or equal to 30 Ω·cm, the edge recombination of the sliced ​​cell 100 can be reduced, thereby improving the power generation efficiency of the battery module formed by the battery string 1000.

[0024] Specifically, the number of solder strips can be 1, 2, 3, 4, or other quantities. To more clearly illustrate the structure of the sliced ​​cell 100, the solder strips are not shown in the accompanying drawings.

[0025] Specifically, the sliced ​​cell 100 can be formed by dividing a whole solar cell into two, three, four, or other proportions. The specific division ratio of the whole solar cell into the sliced ​​cell 100 is not limited here. This article uses a half-cell as an example for explanation and illustration.

[0026] Specifically, when the sliced ​​cell 100 is formed by cutting a whole solar cell into two, four, or other even-numbered parts, the cutting line passes through the center point of the whole solar cell and is parallel to the edge of the whole solar cell. When the sliced ​​cell 100 is formed by cutting a whole solar cell into three, five, or other odd-numbered parts, the cutting line is axially symmetrical, and the axis of symmetry passes through the center point of the whole solar cell and is parallel to the edge of the whole solar cell.

[0027] Specifically, the number of sliced ​​batteries 100 in the battery string 1000 can be 1, 2, 3, 4, or other numbers. In the example of Figure 1, the number of sliced ​​batteries 100 is 3. In the example of Figure 2, the number of sliced ​​batteries 100 is 5. These are just examples and do not represent a limitation on the number of sliced ​​batteries 100 in the battery string 1000.

[0028] Specifically, the entire solar cell can be a bifacial contact cell, an IBC cell, an HJT cell, a PERC cell, a TopCon cell, etc. The sliced ​​cell 100 can also be a bifacial contact cell, an IBC cell, an HJT cell, a PERC cell, a TopCon cell, etc. No specific limitations are imposed here.

[0029] It is understandable that a complete solar cell is typically square. The four corners of a square solar cell can include chamfers, rounded corners, right angles, or other types of corners. Therefore, the sliced ​​cell 100 cut from a complete solar cell is rectangular. In a rectangular sliced ​​cell 100, the lengths of adjacent sides must be different.

[0030] Specifically, the sliced ​​battery 100 includes two first sides 11 and two second sides 12. The two first sides 11 are opposite each other, and the two second sides 12 are opposite each other, and the first sides 11 and the second sides 12 are adjacent. The length of the first side 11 is greater than the length of the second side 12, so the first side 11 is the longer side of the rectangular sliced ​​battery 100, and the second side 12 is the shorter side of the rectangular sliced ​​battery 100. The two first sides 11 correspond to the first edge region 111 and the second edge region 112, respectively, so the first edge region 111 and the second edge region 112 are both edge regions corresponding to the longer side.

[0031] Specifically, the resistivity of the silicon substrate in the first edge region 111 is greater than or equal to 30 Ω·cm. For example, it is 30 Ω·cm, 32 Ω·cm, 35 Ω·cm, 38 Ω·cm, 50 Ω·cm, 80 Ω·cm, or 100 Ω·cm. The specific value of the resistivity of the silicon substrate in the first edge region 111 is not limited here.

[0032] Specifically, the resistivity of the silicon substrate in the second edge region 112 is greater than or equal to 30 Ω·cm. For example, it is 30 Ω·cm, 32 Ω·cm, 35 Ω·cm, 38 Ω·cm, 50 Ω·cm, 80 Ω·cm, or 100 Ω·cm. The specific value of the resistivity of the silicon substrate in the second edge region 112 is not limited here.

[0033] Specifically, the resistivity of the silicon substrate in the first edge region 111 can be the same as or different from the resistivity of the silicon substrate in the second edge region 112.

[0034] In this embodiment, the resistivity of the silicon substrate in the first edge region 111 is greater than or equal to 30 Ω·cm, and the resistivity of the silicon substrate in the second edge region 112 is greater than or equal to 30 Ω·cm. This further reduces edge recombination of the sliced ​​cell 100 and further improves the power generation efficiency of the battery module formed by the cell string 1000.

[0035] It is understood that in other embodiments, the resistivity of the silicon substrate in the first edge region 111 may be greater than or equal to 30 Ω·cm, and the resistivity of the silicon substrate in the second edge region 112 may be less than 30 Ω·cm; or the resistivity of the silicon substrate in the first edge region 111 may be less than 30 Ω·cm, and the resistivity of the silicon substrate in the second edge region 112 may be greater than or equal to 30 Ω·cm.

[0036] It is understood that as long as the resistivity of the silicon substrate in either the first edge region 111 or the second edge region 112 is greater than or equal to 30 Ω·cm, edge recombination of the sliced ​​cell 100 can be reduced, thereby improving the power generation efficiency of the cell module formed by the cell string 1000. If the resistivity of the silicon substrate in both the first edge region 111 and the second edge region 112 is greater than or equal to 30 Ω·cm, the effect of reducing edge recombination and improving the power generation efficiency of the module can be even better.

[0037] Specifically, the sliced ​​cell 100 includes a silicon substrate. In this disclosure, the silicon substrate is a monocrystalline silicon substrate. It is understood that in other embodiments, the silicon substrate may also be a polycrystalline silicon substrate, and this is not a limitation herein.

[0038] Please note that the term "resistivity" in this article refers to the average resistivity of the silicon substrate in that region.

[0039] In this embodiment, the silicon substrate is square, and all four corners of the silicon substrate are chamfered. It is understood that in other embodiments, the silicon substrate may be rectangular, circular, elliptical, triangular, or other shapes; the corners of the silicon substrate may be rounded, sharp, or other shapes; and the shapes of multiple corners of the silicon substrate may be the same or different.

[0040] Specifically, the first edge region 111 and the second edge region 112 refer to spatial regions extending from one of the two first edges 11 to the other of the two first edges 11, respectively. Viewed from the thickness direction of the silicon substrate, the first edge region 111 extends inward from the first edge 11, as shown in Figures 1 and 2. That is to say, the first edge region 111 is not merely formed on the surface of the silicon substrate; the first edge region 111 is a spatial region with thickness.

[0041] Specifically, the thickness of the silicon substrate can be 30μm-300μm. For example, 30μm, 40μm, 50μm, 60μm, 70μm, 80μm, 90μm, 100μm, 150μm, 200μm, 250μm, and 300μm. This avoids the situation where the silicon substrate thickness is too small, resulting in too low a concentration of photogenerated carriers, and also avoids the situation where the silicon substrate thickness is too large, resulting in too high a cost for the battery.

[0042] Specifically, the silicon substrate of the entire first edge region 111 can be N-type or P-type. Alternatively, a portion of the first edge region 111 may be N-type, while another portion may be P-type.

[0043] Similarly, the silicon substrate of the entire second edge region 112 can be N-type or P-type. Alternatively, a portion of the second edge region 112 may be N-type, while another portion may be P-type.

[0044] Specifically, "N-type conductivity" means that the region exhibits N-type conductivity. This does not imply a restriction on the type of dopant element in the region. Further, in some embodiments, the region may not include P-type dopant elements but may include N-type dopant elements, thus exhibiting N-type conductivity. In other embodiments, the region may include both P-type and N-type dopant elements, with the concentration of N-type dopant elements being greater than the concentration of P-type dopant elements, thus exhibiting N-type conductivity.

[0045] Specifically, a region exhibiting a P-type conductivity type means that the region displays a P-type conductivity. This does not imply a restriction on the type of dopant element in the region. Further, in some embodiments, the region may not include N-type dopant elements but may include P-type dopant elements, thus exhibiting a P-type conductivity type. In other embodiments, the region may include both P-type and N-type dopant elements, with the concentration of P-type dopant elements being greater than the concentration of N-type dopant elements, thus exhibiting a P-type conductivity type.

[0046] In some embodiments, the N-type dopant includes at least one element selected from Group 5 and Group 6 elements. Specifically, the Group 5 elements include nitrogen, phosphorus, arsenic, antimony, and bismuth. Specifically, the Group 6 elements include oxygen, sulfur, selenium, tellurium, and polonium. That is to say, the N-type dopant includes at least one of nitrogen, phosphorus, arsenic, antimony, bismuth, oxygen, sulfur, selenium, tellurium, and polonium. This provides a variety of N-type dopant elements, making them more flexible and adaptable to more practical production scenarios.

[0047] In some embodiments, the P-type dopant includes at least one element from Group 3. Specifically, Group 3 elements include boron, aluminum, gallium, indium, and thallium. That is, the P-type dopant includes at least one of boron, aluminum, gallium, indium, and thallium. This provides a variety of P-type dopant elements, making them more flexible and adaptable to more practical production scenarios.

[0048] In some embodiments, the acceptor impurity concentration in the first edge region 111 is less than the acceptor impurity concentration in the second edge region 112.

[0049] This can further reduce recombination caused by copper contamination, which is beneficial to improving the photoelectric conversion efficiency of the silicon substrate-based sliced ​​cell 100.

[0050] Specifically, acceptor impurities refer to P-type doped elements. Donor impurities refer to N-type doped elements.

[0051] It is understandable that since the acceptor impurity concentration in the first edge region 111 is less than that in the second edge region 112, the number of P-type doping elements, such as group III elements, can be reduced in the first edge region 111, thereby reducing the recombination pairs formed by group III elements and oxygen in the first edge region 111 and the recombination caused by the doping elements themselves, thus improving the conversion efficiency.

[0052] It is understandable that the second edge region 112 exhibits an N-type shape because the acceptor impurity concentration in the second edge region 112 is less than the donor impurity concentration in the second edge region 112.

[0053] In some embodiments, the donor impurity concentration in the first edge region 111 is less than the donor impurity concentration in the second edge region 112, and the donor impurity concentration in the first edge region 111 is less than the acceptor impurity concentration in the first edge region 111.

[0054] In this way, the conductivity type of the first edge region 111 of the silicon substrate is P-type, and the conductivity type of the second edge region 112 is N-type.

[0055] In some embodiments, the sliced ​​battery 100 is a half-cell battery, and the ratio of the acceptor impurity concentration in the second edge region 112 to the acceptor impurity concentration in the first edge region 111 is 1.01-10. For example, it is 1.01, 1.02, 1.05, 1.1, 1.5, 1.8, 2, 3, 5, 8, 9, or 10.

[0056] This ensures that the ratio of the acceptor impurity concentration in the second edge region 112 to the acceptor impurity concentration in the first edge region 111 is within a suitable range, greater than 1. This avoids the situation where the ratio is too small, resulting in a flatter crystallization interface, slower pulling speed, and lower yield. It also avoids the situation where the ratio is too large, resulting in a crystallization interface that is more concave towards the melt, greater thermal stress, and a tendency to break the wire and form polycrystalline structures.

[0057] In some embodiments, the sliced ​​battery 100 is a half-cell battery, and the acceptor impurity concentration in the first edge region 111 is less than or equal to 10. 15 atoms / cm 3 For example, 1×10 15 atoms / cm 3 0.8×10 15 atoms / cm 3 0.5×10 15 atoms / cm 3 0.1×10 15 atoms / cm 3 wait.

[0058] In this way, the acceptor impurity concentration in the first edge region 111 is within a suitable range, which can avoid excessive recombination pairs with oxygen caused by excessive acceptor impurity concentration in the first edge region 111, as well as excessive recombination caused by the dopant element itself, which is beneficial to improving conversion efficiency.

[0059] Specifically, the silicon substrate has two surfaces in the thickness direction, designated as a first surface and a second surface. The first surface can be the light-facing surface, and the second surface the back-light surface; alternatively, the first surface can be the back-light surface, and the second surface the light-facing surface. No limitation is imposed here.

[0060] Specifically, the sliced ​​solar cell 100 may include a first doped layer. The first doped layer is disposed on a first surface of the silicon substrate. Specifically, "the first doped layer is disposed on a first surface of the silicon substrate" can mean that the first doped layer is formed by diffusion on the first surface; or it can mean that the first doped layer is formed by deposition on the first surface. The specific form in which the first doped layer is disposed on the first surface of the silicon substrate is not limited here.

[0061] In some embodiments, the first doped layer is of N-type conductivity, forming a high-low junction with the N-type region and a PN junction with the P-type region.

[0062] In some embodiments, the first doped layer is of P-type conductivity, forming a PN junction with a region of N-type conductivity and a high-low junction with a region of P-type conductivity.

[0063] Specifically, the sliced ​​cell 100 may further include a first passivation antireflection layer and a first electrode. The first passivation antireflection layer is stacked on a first doped layer. The first electrode passes through the first passivation antireflection layer and is connected to the first doped layer. The first passivation antireflection layer includes at least one of an aluminum oxide layer, a silicon nitride layer, a silicon oxide layer, and a silicon oxynitride layer. The first electrode includes at least one of a copper electrode, an aluminum electrode, and a silver electrode.

[0064] Specifically, the sliced ​​cell 100 may further include a second passivation antireflection layer and a second electrode. The second passivation antireflection layer is disposed on the second side of the silicon substrate. The second electrode passes through the second passivation antireflection layer and is connected to the silicon substrate. The second passivation antireflection layer includes at least one of an aluminum oxide layer, a silicon nitride layer, a silicon oxide layer, and a silicon oxynitride layer. The second electrode includes at least one of a copper electrode, an aluminum electrode, and a silver electrode.

[0065] In some embodiments, the first doped layer is a diffused doped layer.

[0066] Thus, a diffusion process can be used to incorporate impurities into the silicon substrate, thereby forming a first doped layer on the silicon substrate. This makes it easy to achieve a high concentration of the first doped layer, resulting in a deep junction between the first doped layer and the silicon substrate with minimal surface damage.

[0067] It is understood that in other embodiments, the first doped layer may also be an ion-implanted doped layer. This allows for better control over the number of doped atoms and the doping depth, and also results in less lateral diffusion and a lower required temperature.

[0068] In some embodiments, the first doped layer is a doped polycrystalline silicon layer or a doped amorphous silicon layer, and a first passivation layer is provided between the first doped layer and the silicon substrate. The first passivation layer is an intrinsic amorphous silicon layer or a silicon oxide layer.

[0069] Thus, the first passivation layer and the first doped layer stacked on the silicon substrate form a passivation contact structure, providing a passivation effect for the sliced ​​cell 100. The first passivation layer allows majority carriers to tunnel into the first doped layer while blocking minority carrier recombination, thereby enabling the lateral transport of majority carriers in the first doped layer and their collection by the metal electrodes of the sliced ​​cell 100. This reduces recombination in the metal contact region and helps improve the open-circuit voltage and short-circuit current of the sliced ​​cell 100.

[0070] In one example, the first doped layer is a doped polycrystalline silicon layer, and an intrinsic amorphous silicon layer is provided between the first doped layer and the silicon substrate; in another example, the first doped layer is a doped polycrystalline silicon layer, and a silicon oxide layer is provided between the first doped layer and the silicon substrate; in yet another example, the first doped layer is a doped amorphous silicon layer, and an intrinsic amorphous silicon layer is provided between the first doped layer and the silicon substrate; in yet another example, the first doped layer is a doped amorphous silicon layer, and a silicon oxide layer is provided between the first doped layer and the silicon substrate.

[0071] It is understandable that the first passivation layer has a porous structure. The first doped layer penetrates the first passivation layer and forms a high-low junction or PN junction with the silicon substrate. The PN junction and high-low junction formed by the first doped layer and the single-crystal silicon substrate are both heterojunctions.

[0072] In some embodiments, the first doped layer is a doped polycrystalline silicon layer, and a first passivation layer is provided between the first doped layer and the silicon substrate. The first passivation layer is an intrinsic amorphous silicon layer or a silicon oxide layer. An inner diffusion layer is formed on the silicon substrate, and a high-low junction is formed between the inner diffusion layer and the doped polycrystalline silicon. The inner diffusion layer and the silicon substrate form a high-low junction or a PN junction.

[0073] This provides better passivation for the sliced ​​battery 100, further reducing recombination in the metal contact area, which is beneficial for further improving the open-circuit voltage and short-circuit current of the sliced ​​battery 100.

[0074] It is understandable that, since the inner diffusion layer is formed by the diffusion of a doped polysilicon layer through the first passivation layer to the silicon substrate, the inner diffusion layer and the doped polysilicon layer have the same conductivity type. Therefore, a high-low junction is formed between the inner diffusion layer and the doped polysilicon layer. When the conductivity type of the inner diffusion layer is N-type, a high-low junction is formed between the inner diffusion layer and the N-type region of the silicon substrate, and a PN junction is formed between the inner diffusion layer and the P-type region of the silicon substrate; when the conductivity type of the inner diffusion layer is P-type, a PN junction is formed between the inner diffusion layer and the N-type region of the silicon substrate, and a high-low junction is formed between the inner diffusion layer and the P-type region of the silicon substrate.

[0075] In some embodiments, the sliced ​​cell 100 includes a second doped layer disposed on a second surface of a silicon substrate; if the conductivity type of the first doped layer is N-type, the conductivity type of the second doped layer is P-type; or, if the conductivity type of the first doped layer is P-type, the conductivity type of the second doped layer is N-type.

[0076] Thus, doped layers are formed on both the first and second sides of the silicon substrate, thereby forming a PN junction or a high-low junction, so that both sides of the sliced ​​cell 100 in the thickness direction can receive light to generate electricity, which is beneficial to improving the photoelectric conversion efficiency of the sliced ​​cell 100.

[0077] Please note that the explanation and description of the second doped layer can be found in the explanation and description of the first doped layer, and will not be repeated here to avoid redundancy.

[0078] In some embodiments, a passivation layer is formed on the cut surface of the sliced ​​battery 100.

[0079] In this way, the recombination at the cross-section can be reduced, the photoelectric conversion efficiency can be improved, and thus the power generation efficiency of the module formed by 1000 battery strings can be improved.

[0080] Specifically, the passivation layer includes at least one of aluminum oxide, silicon nitride, silicon oxynitride, and silicon oxide.

[0081] Example 2

[0082] In some embodiments, the first edge region 111 is further away from the center of the entire solar cell than the second edge region 112, and the resistivity of the silicon substrate of the first edge region 111 is greater than or equal to the resistivity of the silicon substrate of the second edge region 112.

[0083] In this way, the doping concentration of the first edge region 111 can be reduced, thereby reducing the recombination pairs formed by the dopant element and oxygen in the first edge region 111, as well as the recombination caused by the dopant element itself, and improving the conversion efficiency.

[0084] Example 3

[0085] In some embodiments, the resistivity of the silicon substrate in the first edge region 111 is greater than 100 Ω·cm. For example, it is 100 Ω·cm, 120 Ω·cm, 150 Ω·cm, 200 Ω·cm, 400 Ω·cm, 500 Ω·cm, 502 Ω·cm, 550 Ω·cm, 600 Ω·cm, 700 Ω·cm, 800 Ω·cm, 900 Ω·cm, etc.

[0086] Thus, the resistivity of the first edge region 111 is high, resulting in fewer dopants in the first edge region 111. This reduces the doping concentration and decreases recombination pairs formed between the dopants and oxygen, as well as recombination caused by the dopants themselves. This avoids excessively high doping concentrations and severe recombination caused by excessively low resistivity of the silicon substrate in the first edge region 111.

[0087] Example 4

[0088] In some embodiments, the ratio of the resistivity of the silicon substrate in the first edge region 111 to the resistivity of the silicon substrate in the second edge region 112 is greater than or equal to 1.2. For example, it is 1.2, 1.5, 1.8, 2, 3, 4, 7, 8, etc.

[0089] This results in a resistivity of the first edge region 111 being much greater than that of the second edge region 112, which helps reduce recombination and improve conversion efficiency. It can be understood that the significantly higher resistivity of the first edge region 111 compared to the second edge region 112 means that the doping concentration in the first edge region 111 is lower than that in the second edge region 112. Therefore, the number of dopants in the first edge region 111 can be reduced, thereby reducing recombination pairs formed between the dopants and oxygen, as well as recombination caused by the dopants themselves, thus improving conversion efficiency.

[0090] Example 5

[0091] In some embodiments, the sliced ​​cell 100 includes a middle region 13 located between a first edge region 111 and a second edge region 112. The resistivity of the silicon substrate in the middle region 13 is less than or equal to the resistivity of the silicon substrate in the first edge region 111 and greater than or equal to the resistivity of the silicon substrate in the second edge region 112.

[0092] This results in the resistivity of the silicon substrate of the sliced ​​cell 100 gradually decreasing from the edge to the center of the entire solar cell, which helps to reduce recombination and improve conversion efficiency.

[0093] Example 6

[0094] In some embodiments, the resistivity of the intermediate region 13 is greater than or equal to 50 Ω·cm. For example, it is 50 Ω·cm, 51 Ω·cm, 55 Ω·cm, 60 Ω·cm, 80 Ω·cm, 100 Ω·cm, or 200 Ω·cm.

[0095] This ensures that the resistivity of the intermediate region 13 is within a suitable range, further enhancing the surrounding field passivation effect in the sliced ​​cell 100, which is beneficial for further improving carrier transport. It avoids the poor field passivation effect caused by excessively low resistivity.

[0096] Example 7

[0097] In some embodiments, the length of the first edge region 111 is the length of the first side 11, and the width of the first edge region 111 is 1 / 10 to 1 / 3 of the length of the second side 12. For example, it is 0.1, 0.12, 0.15, 0.18, 0.2, 0.22, 0.25, 0.28, 0.3, or 0.33.

[0098] In this way, the width of the first edge region 111 is within a suitable range, thereby ensuring that the relative area of ​​the first edge region 111 and the sliced ​​cell 100 is within a suitable range. This avoids the situation where the width of the first edge region 111 is too small, resulting in an excessively small relative area and a poor effect in reducing edge recombination. It also avoids the situation where the width of the first edge region 111 is too large, resulting in an excessively large relative area, excessively high overall resistivity of the silicon substrate of the sliced ​​cell 100, and poor conductivity.

[0099] Example 8

[0100] In some embodiments, the length of the second edge region 112 is the length of the first side 11, and the width of the second edge region 112 is 1 / 10 to 1 / 3 of the length of the second side 12. For example, it is 0.1, 0.12, 0.15, 0.18, 0.2, 0.22, 0.25, 0.28, 0.3, or 0.33.

[0101] In this way, the width of the second edge region 112 is within a suitable range, thereby ensuring that the relative area of ​​the second edge region 112 and the sliced ​​cell 100 is within a suitable range. This avoids the situation where the width of the second edge region 112 is too small, resulting in an excessively small relative area and poor edge recombination reduction. It also avoids the situation where the width of the second edge region 112 is too large, resulting in an excessively large relative area, excessively high overall resistivity of the silicon substrate of the sliced ​​cell 100, and poor conductivity.

[0102] Specifically, the widths of the first edge region 111 and the second edge region 112 can be the same or different.

[0103] Example 9

[0104] In some embodiments, the battery string 1000 includes a plurality of battery packs, each battery pack including a first chamfered battery, a non-chamfered battery and a second chamfered battery arranged in sequence; the resistivity of the silicon substrate of the first chamfered battery is greater than the resistivity of the silicon substrate of the non-chamfered battery; the resistivity of the silicon substrate of the second chamfered battery is greater than the resistivity of the silicon substrate of the non-chamfered battery.

[0105] Thus, since the average resistivity of the silicon substrate of the first and second chamfered cells is greater than that of the silicon substrate of the non-chamfered cell, carrier recombination can be reduced, thereby increasing the power generation current of the first and second chamfered cells and making the current matching effect between the chamfered and non-chamfered cells better.

[0106] It's understandable that the current of the first and second chamfered cells, typically located at the edges of a solar cell, is lower than that of the non-chamfered cells located in the middle. When connecting 1000 chamfered, non-chamfered, and second chamfered cells in series, current matching is necessary. By increasing the current output of the chamfered cells to achieve this matching, the current output of the 1000-cell series can be increased, resulting in a higher power generation efficiency for the resulting solar module.

[0107] Specifically, the number of non-beveled batteries can be 1, 2, 3, or other quantities. No limitation is made here.

[0108] It is understandable that, since the four corners of a whole solar cell are usually chamfered, the order of the sliced ​​cells 100 is usually not adjusted when making a cell string of 1000. Therefore, the first chamfered cell, the non-chamfered cell, and the second chamfered cell are cut from the same whole solar cell.

[0109] Please note that the term "resistivity" in this article refers to the average resistivity of the silicon substrate in that region. That is, the average resistivity of the silicon substrate in the first chamfered cell is greater than that in the non-chamfered cell; the average resistivity of the silicon substrate in the second chamfered cell is greater than that in the non-chamfered cell.

[0110] Specifically, average resistivity refers to the average value of the resistivity measured at random points along the same direction at regular intervals on the silicon substrate of the sliced ​​cell 100.

[0111] Furthermore, the direction along which the point is taken can be any direction. Preferably, the direction along which the point is taken is parallel to the first side 11.

[0112] Furthermore, the spacing between adjacent test points is 2mm-10mm. For example, 2mm, 3mm, 4mm, 5mm, 6mm, 7mm, 8mm, 9mm, and 10mm. This ensures that the spacing between adjacent test points is within a suitable range, avoiding situations where the difference is too small and the data is meaningless, or where the difference is too large and the calculated average value is insufficient to accurately represent the average resistivity.

[0113] Furthermore, the number of test points is 5-20. For example, 5, 8, 10, 12, 15, 18, or 20. This ensures that the number of test points is within an appropriate range, avoiding the situation where the average value obtained is insufficient to accurately represent the average resistivity due to too small a number, and also avoiding the situation where the amount of testing and calculation is too large and the efficiency is low due to too large a number.

[0114] In this embodiment, the spacing between adjacent test points is 5mm, and the number of test points is 10.

[0115] Example 10

[0116] The battery assembly of this disclosure includes a battery string 1000 of any one of embodiments one through nine.

[0117] In the battery module of this disclosure, since the resistivity of the silicon substrate in the edge region corresponding to at least one long side of the sliced ​​cell 100 forming the battery string 1000 is greater than or equal to 30 Ω·cm, the edge recombination of the sliced ​​cell 100 can be reduced, thereby improving the power generation efficiency of the battery module formed by the battery string 1000.

[0118] In this embodiment, the battery module may further include a metal frame, a backsheet, photovoltaic glass, and an encapsulating film. The encapsulating film can be filled between the front and back of the solar cell, the photovoltaic glass, and adjacent cells. As a filler, it can be a transparent colloid with good light transmittance and aging resistance. For example, the encapsulating film can be an EVA film or a POE film, and the specific choice can be made according to the actual situation, without limitation.

[0119] Photovoltaic glass can be applied to the encapsulating film on the front of solar cells. This photovoltaic glass can be ultra-clear glass, possessing high light transmittance, high transparency, and superior physical, mechanical, and optical properties. For example, ultra-clear glass can achieve a light transmittance of over 92%, protecting the solar cells while minimizing impact on their efficiency. Simultaneously, the encapsulating film bonds the photovoltaic glass and the solar cells together, providing sealing, insulation, and waterproofing / moisture protection for the solar cells.

[0120] The backsheet can be attached to the encapsulating film on the back of the solar cell. The backsheet protects and supports the solar cell, providing reliable insulation, water resistance, and aging resistance. Multiple backsheet options are available, typically including tempered glass, acrylic glass, and aluminum alloy TPT composite encapsulating film, etc., depending on the specific circumstances and not limited here. The backsheet, solar cell, encapsulating film, and photovoltaic glass can be mounted on a metal frame. The metal frame serves as the main external support structure for the entire battery module, providing stable support and installation. For example, the battery module can be installed at the desired location using the metal frame.

[0121] Example 11

[0122] The photovoltaic system of this disclosure includes the battery module of Embodiment 10.

[0123] In the photovoltaic system of this disclosure, since the resistivity of the silicon substrate in the edge region corresponding to at least one long side of the sliced ​​cell 100 forming the cell string 1000 is greater than or equal to 30 Ω·cm, the edge recombination of the sliced ​​cell 100 can be reduced, thereby improving the power generation efficiency of the cell module formed by the cell string 1000.

[0124] In this embodiment, the photovoltaic system can be applied in photovoltaic power plants, such as ground-mounted power plants, rooftop power plants, and floating power plants. It can also be applied to equipment or devices that utilize solar energy to generate electricity, such as user solar power supplies, solar streetlights, solar cars, and solar buildings. Of course, it is understood that the application scenarios of the photovoltaic system are not limited to these; that is, the photovoltaic system can be applied in all fields that require solar energy to generate electricity. Taking a photovoltaic power generation system network as an example, the photovoltaic system may include a photovoltaic array, a combiner box, and an inverter. The photovoltaic array may be an array combination of multiple battery modules; for example, multiple battery modules can form multiple photovoltaic arrays. The photovoltaic array is connected to the combiner box, which can collect the current generated by the photovoltaic array. The collected current flows through the inverter and is converted into AC power required by the mains power grid before being connected to the mains power grid to achieve solar power supply.

[0125] The following comparison uses a battery module formed by battery strings 1000 based on related technologies as a comparative example, comparing it with a battery module formed by battery strings 1000-1000 of the present disclosure. In one comparative example, the battery module in the related technology has a photoelectric conversion efficiency of 24.2%. In one example of the present disclosure, the battery module formed by battery strings 1000 of the present disclosure has a photoelectric conversion efficiency of 24.5%. Clearly, the battery module formed by battery strings 1000 of the present disclosure has a higher photoelectric conversion efficiency and a higher power generation efficiency.

[0126] In the description of this specification, references to terms such as "some embodiments," "illustrative embodiments," "examples," "specific examples," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with an embodiment or example is included in at least one embodiment or example of this disclosure. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0127] Furthermore, the above are merely preferred embodiments of this disclosure and are not intended to limit this disclosure. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this disclosure should be included within the scope of protection of this disclosure.

Claims

1. A battery string comprising a plurality of solder strips and a plurality of cut cells, the solder strips connecting two adjacent cut cells, the cut cells being formed by cutting a whole solar cell; the cut cell comprising two first edges and two second edges, the length of the first edges being greater than the length of the second edges, the first edges corresponding to a first edge region and a second edge region respectively; the resistivity of at least one of the silicon substrate of the first edge region and the silicon substrate of the second edge region being greater than or equal to 30Ω·cm. 2.The battery string of claim 1, the first edge region being farther from the center of the whole solar cell than the second edge region, the resistivity of the silicon substrate of the first edge region being greater than the resistivity of the silicon substrate of the second edge region. 3.The battery string of claim 2, the resistivity of the silicon substrate of the first edge region being greater than 100Ω·cm. 4.The battery string of claim 2, the ratio of the resistivity of the silicon substrate of the first edge region to the resistivity of the silicon substrate of the second edge region being greater than or equal to 1.

2. 5.The battery string of claim 2, the cut cell comprising a middle region between the first edge region and the second edge region, the resistivity of the silicon substrate of the middle region being less than or equal to the resistivity of the silicon substrate of the first edge region and greater than or equal to the resistivity of the silicon substrate of the second edge region. 6.The battery string of claim 5, the resistivity of the middle region being greater than 50Ω·cm. 7.The battery string of claim 1, the length of the first edge region being the length of the first edge, and the width of the first edge region being 1 / 10-1 / 3 of the length of the second edge. 8.The battery string of claim 1, the length of the second edge region being the length of the first edge, and the width of the second edge region being 1 / 10-1 / 3 of the length of the second edge. 9.The battery string of claim 1, the battery string comprising a plurality of cell groups, the cell groups comprising a first chamfered cell, a non-chamfered cell and a second chamfered cell arranged in sequence; the resistivity of the silicon substrate of the first chamfered cell being greater than the resistivity of the silicon substrate of the non-chamfered cell; the resistivity of the silicon substrate of the second chamfered cell being greater than the resistivity of the silicon substrate of the non-chamfered cell. 10.A battery assembly comprising the battery string of any one of claims 1-9. 11.A photovoltaic system comprising the battery assembly of claim 10.

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