Display device
By employing a display device with differently angled light-emitting elements and electrodes, the efficiency of light-emitting elements is enhanced, addressing the inefficiencies in existing display technologies.
Patent Information
- Application Number
- PCT/KR2025/009608
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2024-07-18
- Filing Date
- 2025-07-04
- Publication Date
- 2026-01-22
AI Technical Summary
Existing display devices face challenges in improving the efficiency of light-emitting elements.
The display device incorporates a design where the first and second light-emitting elements have different sidewall angles, with one sidewall being inclined and the other vertical, and includes a third electrode and light-emitting element with varying angles, optimizing the overlap and arrangement of electrodes and light-emitting elements to enhance efficiency.
This configuration improves the efficiency of light-emitting elements by optimizing their overlap and arrangement, leading to enhanced performance and utilization of display area.
Smart Images

Figure KR2025009608_22012026_PF_FP_ABST
Abstract
Description
display device
[0001] Embodiments of the present invention relate to a display device.
[0002] As the information society develops, demand for display devices capable of displaying images is increasing in various forms. To meet this demand, various types of display devices, including light-emitting displays, are being developed. Light-emitting displays contain pixels containing light-emitting elements.
[0003] The problem to be solved by the present invention is to provide a display device capable of improving the efficiency of light-emitting elements.
[0004] The tasks of the present invention are not limited to the technical tasks mentioned above, and other technical tasks not mentioned will be clearly understood by those skilled in the art from the description below.
[0005] A display device according to one embodiment includes a lower substrate, a first electrode disposed on the lower substrate, a first light-emitting element disposed on the first electrode and including a first sidewall and a first lower surface, a second electrode disposed on the first light-emitting element, and a second light-emitting element disposed on the second electrode and including a second sidewall and a second lower surface, wherein a first angle formed by the first sidewall and the first lower surface may be different from a second angle formed by the second sidewall and the second lower surface.
[0006] In one embodiment, the first electrode, the first light-emitting element, the second electrode, and the second light-emitting element may overlap each other when viewed in a plane.
[0007] In one embodiment, one of the first and second sidewalls may include a sloped sidewall having a taper angle, and the other of the first and second sidewalls may include a vertical sidewall.
[0008] In one embodiment, among the first and second angles, an angle formed by one of the first and second side walls and one of the first and second lower surfaces may be less than 85° or greater than 95°, and among the first and second angles, an angle formed by the other of the first and second side walls and the other of the first and second lower surfaces may fall within a range of 85° to 95°.
[0009] In one embodiment, the first light-emitting element may emit red light, the second light-emitting element may emit blue light or green light, the first sidewall may include the inclined sidewall, and the second sidewall may include the vertical sidewall.
[0010] In one embodiment, the first light-emitting element and the second light-emitting element may include respective light-emitting layers containing indium in different contents, the indium content of the light-emitting layer of the first light-emitting element being higher than the indium content of the light-emitting layer of the second light-emitting element, the first sidewall may include the inclined sidewall, and the second sidewall may include the vertical sidewall.
[0011] In one embodiment, when viewed on a plane, the light emitting element including one of the first and second sidewalls among the first and second light emitting elements may be larger than the light emitting element including the other of the first and second sidewalls among the first and second light emitting elements.
[0012] In one embodiment, the display device further includes a third electrode disposed between the first light-emitting element and the second electrode; and a third light-emitting element disposed on the third electrode and disposed between the first light-emitting element and the second light-emitting element, wherein the third light-emitting element may include a third sidewall having a third angle that is the same as the first angle or the second angle.
[0013] In one embodiment, the display device further includes a third electrode disposed between the first light-emitting element and the second electrode; and a third light-emitting element disposed on the third electrode and disposed between the first light-emitting element and the second light-emitting element, wherein the first angle, the second angle, and the third angle formed by the third lower surface and the third sidewall of the third light-emitting element may be different from each other.
[0014] In one embodiment, the third angle may have a value between the first angle and the second angle.
[0015] A display device according to one embodiment includes a lower substrate; and a plurality of light-emitting elements disposed on the lower substrate and overlapping each other when viewed in a plan view, wherein the plurality of light-emitting elements include a first light-emitting element including a first side wall and a first lower surface; and a second light-emitting element including a second side wall and a second lower surface, wherein a first angle formed by the first side wall and the first lower surface may be different from a second angle formed by the second side wall and the second lower surface.
[0016] In one embodiment, the first sidewall may include an inclined sidewall inclined at a first angle ranging from less than 85° to greater than 95° with respect to the first lower surface, and the second sidewall may include a vertical sidewall having a second angle ranging from 85° to 95° with respect to the second lower surface.
[0017] In one embodiment, the display device may further include a plurality of electrodes disposed below each of the plurality of light-emitting elements and overlapping each other when viewed in a plane.
[0018] In one embodiment, the display device may further include a plurality of pixel electrodes disposed between the lower substrate and the plurality of electrodes and individually connected to the plurality of electrodes; connection electrodes disposed above each of the plurality of light-emitting elements; and a common electrode electrically connected to the connection electrodes.
[0019] In one embodiment, the first light-emitting element and the second light-emitting element can emit light of different colors.
[0020] An electronic device according to one embodiment includes a display device, the display device including: a lower substrate; a first electrode disposed on the lower substrate; a first light-emitting element disposed on the first electrode and including a first sidewall and a first lower surface; a second electrode disposed on the first light-emitting element; and a second light-emitting element disposed on the second electrode and including a second sidewall and a second lower surface, wherein a first angle formed by the first sidewall and the first lower surface may be different from a second angle formed by the second sidewall and the second lower surface.
[0021] In one embodiment, the first electrode, the first light-emitting element, the second electrode, and the second light-emitting element may overlap each other when viewed in a plane.
[0022] In one embodiment, one of the first and second sidewalls may include a sloped sidewall having a taper angle, and the other of the first and second sidewalls may include a vertical sidewall.
[0023] In one embodiment, among the first and second angles, an angle formed by one of the first and second side walls and one of the first and second lower surfaces may be less than 85° or greater than 95°, and among the first and second angles, an angle formed by the other of the first and second side walls and the other of the first and second lower surfaces may fall within a range of 85° to 95°.
[0024] In one embodiment, the first light-emitting element may emit red light, the second light-emitting element may emit blue light or green light, the first sidewall may include the inclined sidewall, and the second sidewall may include the vertical sidewall.
[0025] Specific details of other embodiments are included in the detailed description and drawings.
[0026] According to the display device according to the embodiments, the efficiency of light-emitting elements can be improved or optimized.
[0027] The effects according to the embodiments are not limited to those exemplified above, and more diverse effects are included in this specification.
[0028] Figure 1 is a perspective view showing a display device according to one embodiment.
[0029] FIG. 2 is a plan view showing a display area of a display device according to one embodiment.
[0030] FIG. 3 is a plan view showing a display area of a display device according to one embodiment.
[0031] Fig. 4 is a cross-sectional view showing a display device according to one embodiment.
[0032] Fig. 5 is a cross-sectional view showing a display device according to one embodiment.
[0033] Fig. 6 is a cross-sectional view showing a display device according to one embodiment.
[0034] Fig. 7 is a cross-sectional view showing a display device according to one embodiment.
[0035] Fig. 8 is a cross-sectional view showing a display device according to one embodiment.
[0036] Fig. 9 is a cross-sectional view showing a display device according to one embodiment.
[0037] Fig. 10 is a cross-sectional view showing a display device according to one embodiment.
[0038] Fig. 11 is a cross-sectional view showing a display device according to one embodiment.
[0039] FIGS. 12 to 16 are cross-sectional views showing a method of manufacturing a display device including light-emitting elements according to one embodiment.
[0040] FIG. 17 is a drawing showing an electronic device including a display device according to one embodiment, for example, a smart watch.
[0041] FIGS. 18 and 19 are drawings showing an electronic device including a display device according to one embodiment, for example, a head-mounted display device.
[0042] FIG. 20 is a drawing showing an electronic device including a display device according to one embodiment, for example, a head-mounted display device.
[0043] FIG. 21 is a drawing showing an electronic device including display devices according to one embodiment, for example, an automobile instrument panel and center fascia.
[0044] FIG. 22 is a drawing showing an electronic device including a display device according to one embodiment, for example, a transparent display device.
[0045] The advantages and features of the present invention, and the methods for achieving them, will become clearer with reference to the embodiments described in detail below together with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, but may be implemented in various different forms. These embodiments are provided solely to ensure that the disclosure of the present invention is complete and to fully inform those skilled in the art of the scope of the invention, and the present invention is defined solely by the scope of the claims.
[0046] When elements or layers are referred to as being "on" another element or layer, this includes both cases where the other element or layer is directly on top of the other element or layer or intervening therebetween. Like reference numerals refer to like elements throughout the specification. The shapes, sizes, ratios, angles, numbers, etc. disclosed in the drawings for explaining the embodiments are illustrative and therefore the present invention is not limited to the matters illustrated.
[0047] The individual features of the various embodiments of the present invention can be partially or fully combined or combined with one another, enabling various technically feasible interconnections and operations. Each embodiment may be implemented independently of the others, or may be implemented together in a related manner.
[0048] Specific embodiments are described below with reference to the attached drawings.
[0049] Figure 1 is a perspective view showing a display device according to one embodiment.
[0050] Referring to FIG. 1, the display device (10) is a device that displays a moving image or a still image, and can be used as a display screen of various products. For example, the display device (10) can be included in various electronic devices such as a mobile phone, a smart phone, a tablet personal computer (PC), a smart watch, a watch phone, a mobile communication terminal, an electronic notebook, an electronic book, a portable multimedia player (PMP), a navigation system, an Ultra Mobile PC (UMPC), etc., as well as a television, a laptop, a monitor, a billboard, an Internet of Things (IOT), etc., and used as a display screen of the electronic devices. In addition, the display device (10) can be applied to a virtual reality (VR) device or an augmented reality (AR) device, etc.
[0051] In one embodiment, the display device (10) may be a light-emitting display device including light-emitting elements. For example, the display device (10) may be a light-emitting display device such as an organic light-emitting display device including an organic light-emitting diode, a quantum dot light-emitting display device including a quantum dot light-emitting layer, an inorganic light-emitting display device including an inorganic semiconductor, or an ultra-small light-emitting display device including an ultra-small light-emitting diode such as a micro or nano light-emitting diode (micro LED or nano LED).
[0052] Hereinafter, embodiments will be disclosed in which the display device (10) is a light-emitting display device including a micro or nano light-emitting diode. However, the type or size of the light-emitting element according to the embodiments is not limited thereto.
[0053] The display device (10) may include a display panel (DPN) including a display area (DA) and a non-display area (NDA). In one embodiment, the display panel (DPN) may have a rectangular planar shape, but is not limited thereto. For example, the display panel (DPN) may have a polygonal, circular, oval, or irregular planar shape other than a rectangular shape. In Fig. 1, a first direction (DR1), a second direction (DR2), and a third direction (DR3) are indicated. In one embodiment, the first direction (DR1), the second direction (DR2), and the third direction (DR3) may be a horizontal direction, a vertical direction, and a thickness direction of the display panel (DPN), respectively.
[0054] The display area (DA) is an area where pixels (PX) are arranged, and may be an area where an image is displayed by the pixels (PX). For example, pixels (PX) and wires (or a portion of the wires) connected to the pixels (PX) may be arranged in the display area (DA). In describing the embodiments, the term "connection" may include the meaning of electrical connection and / or physical connection. In Fig. 1, an embodiment in which the plane shape of the display area (DA) is a rectangle is illustrated, but the shape of the display area (DA) is not limited thereto.
[0055] Pixels (PX) may have a planar shape such as a rectangle or a rhombus, but are not limited thereto. For example, pixels (PX) may have a planar shape of another polygonal shape (e.g., a hexagonal shape or a rhombus shape), a circle, an ellipse, or any other shape.
[0056] In one embodiment, each of the pixels (PX) of the display device (10) may include a plurality of light-emitting elements that emit light of different colors. For example, each pixel (PX) may include a first light-emitting element that emits light of a first color, a second light-emitting element that emits light of a second color, and a third light-emitting element that emits light of a third color. In one embodiment, the light of the first color, the light of the second color, and the light of the third color may be red light, blue light, and green light, respectively, but are not limited thereto. The number, type, and / or arrangement structure of the light-emitting elements arranged in each pixel (PX) may vary depending on embodiments.
[0057] In one embodiment, each pixel (PX) may include a plurality of pixel circuits individually connected to a plurality of light-emitting elements. Accordingly, each of the light-emitting elements may be driven independently and / or separately. For example, each pixel (PX) may include a first pixel circuit electrically connected to a first light-emitting element, a second pixel circuit electrically connected to a second light-emitting element, and a third pixel circuit electrically connected to a third light-emitting element. Accordingly, the light emission of the first light-emitting element, the second light-emitting element, and the third light-emitting element may be individually and / or independently controlled.
[0058] A non-display area (NDA) may be an area where an image is not displayed. The NDA may be positioned around the display area (DA). For example, the NDA may be positioned at the edge of the display panel (DPN) and surround the display area (DA).
[0059] The non-display area (NDA) may include a pad area (PDA) and a peripheral area (PHA). In the non-display area (NDA), wires (or a portion of the wires) connected to the pixels (PX) and pads (PD) may be arranged. In one embodiment, the non-display area (NDA) may further include a common voltage supply area arranged around the display area (DA), for example, between the display area (DA) and the pad area (PDA).
[0060] The pads (PD) may be arranged in the pad area (PDA). The pads (PD) may be connected to an external circuit board. For example, the pads (PD) may be electrically connected to circuit pads on the circuit board through conductive connecting members such as wires. In addition, the pads (PD) may be electrically connected to the pixels (PX). For example, the pads (PD) may include signal pads and power pads that are electrically connected to pixel circuits and light-emitting elements of the pixels (PX). In one embodiment, the pixels (PX) and the pads (PD) may be electrically connected to each other through wires and / or circuit elements formed on a semiconductor circuit board of the display panel (DPN). Driving signals and driving voltages for driving the pixels (PX) may be supplied from the external circuit board to the display device (10) (or the display panel (DPN)) through the pads (PD).
[0061] The peripheral area (PHA) may be the area remaining within the non-display area (NDA) excluding the pad area (PDA). The peripheral area (PHA) may surround the display area (DA). The wiring connecting the pixels (PX) and pads (PD) may pass through the peripheral area (PHA).
[0062] Fig. 2 is a plan view showing a display area of a display device according to one embodiment. For example, Fig. 2 schematically shows a portion of the display area (DA) illustrated in Fig. 1.
[0063] Referring to FIGS. 1 and 2, a plurality of pixels (PX), including a first pixel (PX1) and a second pixel (PX2), may be arranged in the display area (DA). The pixels (PX) may be arranged in a matrix form, a stripe form, or a pentile form. TM ) can be arranged in the display area (DA) in the form of a shape or other form.
[0064] The first pixel (PX1) and the second pixel (PX2) may refer to any two pixels (PX). For example, in FIG. 2, two pixels (PX) adjacent to each other in the first direction (DR1) are respectively named the first pixel (PX1) and the second pixel (PX2). The pixels (PX) of the display area (DA) may have substantially the same or similar structures, and may be independently and / or individually driven by driving signals supplied to each pixel (PX).
[0065] In one embodiment, the pixels (PX) may have a planar shape such as a rectangle or a rhombus, but is not limited thereto. For example, the pixels (PX) may have a planar shape of another polygonal shape (e.g., a hexagonal shape or a rhombus shape), a circle, an ellipse, or any other shape.
[0066] Each pixel (PX) may include a plurality of light-emitting elements (LE). For example, each pixel (PX) may include a first light-emitting element (LE1), a second light-emitting element (LE2), and a third light-emitting element (LE3) that overlap each other when viewed on a plane.
[0067] FIG. 2 illustrates the approximate positions and shapes of the first light-emitting element (LE1), the second light-emitting element (LE2), and the third light-emitting element (LE3), but the embodiments are not limited to the illustrated shapes. For example, in FIG. 2, the first light-emitting element (LE1), the second light-emitting element (LE2), and the third light-emitting element (LE3) are illustrated as having the same size and completely overlapping each other, but the embodiments are not limited thereto. For example, when viewed in a plan view, at least one of the first light-emitting element (LE1), the second light-emitting element (LE2), and the third light-emitting element (LE3) may have different sizes from the other one.
[0068] The first light-emitting element (LE1), the second light-emitting element (LE2), and the third light-emitting element (LE3) can emit light of different colors. For example, the first light-emitting element (LE1) can be a red light-emitting element that emits light of a first color, for example, red light. The second light-emitting element (LE2) can be a blue light-emitting element that emits light of a second color, for example, blue light. The third light-emitting element (LE3) can be a green light-emitting element that emits light of a third color, for example, green light. However, the embodiments are not limited thereto. For example, the number or type of the light-emitting elements (LE) arranged in each pixel (PX) can be variously changed.
[0069] The light emitting elements (LE) may have a circular shape, a rectangular shape, a polygonal shape other than a rectangular shape, or a planar shape other than a rectangular shape. For example, although FIG. 2 illustrates an embodiment in which the light emitting elements (LE) have a circular planar shape, the shape of the light emitting elements (LE) may be varied in various ways.
[0070] In one embodiment, the light emitting elements (LE) may be micro light emitting diodes (micro LEDs) having a small size in the micrometer (μm) range. For example, each of the light emitting elements (LE) may be a micro LED having a length (e.g., horizontal length or diameter) in a first direction (DR1), a length (e.g., vertical length or diameter) in a second direction (DR2), and a length (e.g., thickness or height) in a third direction (DR3) of several micrometers to several hundred micrometers, respectively. In one embodiment, the length of each of the light emitting elements (LE) in the first direction (DR1), the length in the second direction (DR2), and the length in the third direction (DR3) may each be 100 μm or less. However, embodiments are not limited thereto, and the sizes of the light emitting elements (LE) may vary.
[0071] Each pixel (PX) may further include a plurality of electrodes (BDE) electrically connected to a plurality of light-emitting elements (LE). For example, each pixel (PX) may include a plurality of electrodes (BDE) individually connected to a plurality of light-emitting elements (LE), and a plurality of pixel electrodes (ET) individually connected to the plurality of electrodes (BDE).
[0072] In one embodiment, the electrodes (BDE) may be, but are not limited to, single-layer or multi-layer bonding electrodes comprising a conductive material suitable for bonding. For example, the type, structure, or material of the electrodes (BDE) may vary depending on the embodiments.
[0073] In one embodiment, each pixel (PX) may include a first electrode (BDE1), a second electrode (BDE2), and a third electrode (BDE3) that overlap each other when viewed in a plan view. The electrodes (BDE) may overlap the light-emitting elements (LE). For example, the first electrode (BDE1), the second electrode (BDE2), and the third electrode (BDE3) of the first pixel (PX1) may overlap the first light-emitting element (LE1), the second light-emitting element (LE2), and the third light-emitting element (LE3) of the first pixel (PX1) when viewed in a plan view. In one embodiment, the electrodes (BDE) may have a larger size than the light-emitting elements (LE) when viewed in a plan view, and may be disposed in an area including an area where the light-emitting elements (LE) are disposed and a periphery thereof. The electrodes (BDE) may have the same shape as the light-emitting elements (LE) or a different shape from the light-emitting elements (LE). In FIG. 2, an embodiment is illustrated in which the light-emitting elements (LE) have a circular planar shape and the electrodes (BDE) have a square planar shape, but the shapes of each of the light-emitting elements (LE) and the electrodes (BDE) may be changed in various ways depending on the embodiment.
[0074] In one embodiment, the first electrode (BDE1), the second electrode (BDE2), and the third electrode (BDE3) may be formed of the same material and / or structure, but embodiments are not limited thereto. For example, at least two of the first electrode (BDE1), the second electrode (BDE2), and the third electrode (BDE3) may be formed of different materials and / or structures.
[0075] In one embodiment, the electrodes (BDE) may have substantially or substantially the same shape and / or size as each other and may overlap each other in the area where the light emitting elements (LE) are arranged. For example, the electrodes (BDE) may have substantially the same shape and / or size except for the portions connected to the respective pixel electrodes (ET) and may overlap each other when viewed in a plan view.
[0076] For example, the first electrode (BDE1) has a generally rectangular planar shape and may protrude to overlap with the first pixel electrode (ET1) in an area where the first pixel electrode (ET1) is disposed. In an area where the first pixel electrode (ET1) and the first electrode (BDE1) overlap, the first pixel electrode (ET1) and the first electrode (BDE1) may be electrically connected to each other. The second electrode (BDE2) has a generally rectangular planar shape and may protrude to overlap with the second pixel electrode (ET2) in an area where the second pixel electrode (ET2) is disposed. In an area where the second pixel electrode (ET2) and the second electrode (BDE2) overlap, the second pixel electrode (ET2) and the second electrode (BDE2) may be electrically connected to each other. The third electrode (BDE3) has a generally rectangular planar shape and may protrude to overlap with the third pixel electrode (ET3) in an area where the third pixel electrode (ET3) is disposed. In an area where the third pixel electrode (ET3) and the third electrode (BDE3) overlap, the third pixel electrode (ET3) and the third electrode (BDE3) can be electrically connected to each other.
[0077] The pixel electrodes (ET) may overlap each of the electrodes (BDE), and may not overlap each other when viewed in a plan view. For example, the first pixel electrode (ET1) may overlap a portion of the first electrode (BDE1). The second pixel electrode (ET2) may overlap a portion of the second electrode (BDE2). The third pixel electrode (ET3) may overlap a portion of the third electrode (BDE3). In one embodiment, the pixel electrodes (ET) may not overlap the light-emitting elements (LE). For example, the pixel electrodes (ET) may be disposed around an area where the light-emitting elements (LE) are disposed, and may not overlap the light-emitting elements (LE) when viewed in a plan view. However, the embodiments are not limited thereto. The shape, position, or arrangement order of the pixel electrodes (ET) disposed in each pixel (PX) may vary depending on the embodiments.
[0078] The pixel electrodes (ET) may be electrically connected to the light-emitting elements (LE) via the electrodes (BDE). For example, a first pixel electrode (ET1) may be electrically connected to a first light-emitting element (LE1) via the first electrode (BDE1). A second pixel electrode (ET2) may be electrically connected to a second light-emitting element (LE2) via the second electrode (BDE2). A third pixel electrode (ET3) may be electrically connected to a third light-emitting element (LE3) via the third electrode (BDE3).
[0079] The pixel electrodes (ET) can be electrically connected to pixel circuits (e.g., pixel circuits (PXC) of FIGS. 4 and 5) of a lower substrate disposed below a light-emitting element layer including light-emitting elements (LE). For example, the pixel electrodes (ET) can electrically connect the light-emitting elements (LE) to each pixel circuit (PXC).
[0080] A common electrode (CE) (or common voltage line) may be further disposed in the display area (DA). In one embodiment, the common electrode (CE) may include openings corresponding to the pixels (PX) and may be disposed between the pixels (PX). For example, the common electrode (CE) may have a mesh-shaped planar shape surrounding the pixels (PX). However, the embodiments are not limited thereto. For example, the shape or position of the common electrode (CE) may vary depending on the embodiments.
[0081] In one embodiment, the common electrode (CE) may be electrically connected to the light emitting elements (LE) via connection electrodes (e.g., connection electrodes CNE of FIGS. 4 and 5) that contact and / or are connected to the light emitting elements (LE). However, the embodiments are not limited thereto. For example, the arrangement structure or connection structure of the common electrode (CE) and the light emitting elements (LE) may be variously changed according to the embodiments.
[0082] Fig. 3 is a plan view showing a display area of a display device according to one embodiment. For example, Fig. 3 schematically shows a portion of the display area (DA) illustrated in Fig. 1, and shows a display area (DA) according to an embodiment different from the embodiment of Fig. 2.
[0083] Referring to FIG. 3, pixel electrodes (ET) may be arranged in an area where light-emitting elements (LE) are arranged. In addition, pixel electrodes (ET) may overlap at least one electrode (BDE) and / or at least one light-emitting element (LE).
[0084] In one embodiment, at least one of the electrodes (BDE) (for example, other electrodes (BDE) except for the electrode (BDE) disposed at the top) may be opened in an area where another pixel electrode (ET) is disposed so as to be insulated from another pixel electrode (ET) other than the pixel electrode (ET) electrically connected to the electrode (BDE). For example, the first electrode (BDE1) may be opened so as to include an opening having a larger size than the second pixel electrode (ET2) in an area where the second pixel electrode (ET2) is disposed. The second electrode (BDE2) may not be opened in an area where the second pixel electrode (ET2) is disposed, and may be electrically connected to the second pixel electrode (ET2).
[0085] Similarly, at least one of the light emitting elements (LE) (for example, other light emitting elements (LE) except for the light emitting element (LE) disposed at the top) may be opened in an area where the other pixel electrode (ET) is disposed so as to be insulated from other pixel electrodes (ET) other than the pixel electrode (ET) electrically connected to the light emitting element (LE). For example, the first light emitting element (LE1) may be opened so as to include an opening having a size larger than that of the second pixel electrode (ET2) in an area where the second pixel electrode (ET2) is disposed. The second light emitting element (LE2) may not be opened in an area where the second pixel electrode (ET2) is disposed, and may be electrically connected to the second pixel electrode (ET2) through the second electrode (BDE2).
[0086] In the above-described manner, the pixel electrodes (ET) are arranged in the area where the light-emitting elements (LE) are arranged, so that they are properly connected to each electrode (BDE) and each light-emitting element (LE), while preventing short-circuit defects between the pixel electrodes (ET) and other electrodes (BDE) and / or light-emitting elements (LE). By appropriately overlapping the pixel electrodes (ET), the electrodes (BDE) and the light-emitting elements (LE), the pixel area where each pixel (PX) is arranged can be utilized more efficiently. For example, electrodes (BDE) and / or light-emitting elements (LE) of a larger size (e.g., a larger area) can be arranged in each pixel area.
[0087] In one embodiment, the light-emitting elements (LE) and the electrodes (BDE) may have corresponding planar shapes. For example, the light-emitting elements (LE) and the electrodes (BDE) may have the same planar shape (for example, a circular planar shape). However, the embodiments are not limited thereto. For example, as in the embodiment of FIG. 2, the light-emitting elements (LE) and the electrodes (BDE) may have different planar shapes.
[0088] In one embodiment, the light emitting elements (LE) and the electrodes (BDE) may have different sizes when viewed in a plan view. For example, the electrodes (BDE) may have a larger size than the light emitting elements (LE) when viewed in a plan view. However, embodiments are not limited thereto. For example, the light emitting elements (LE) and the electrodes (BDE) may have the same size when viewed in a plan view. For example, the light emitting elements (LE) and the electrodes (BDE) may be formed to have substantially the same planar shape and / or size by etching the light emitting elements (LE) and the electrodes (BDE) substantially simultaneously or sequentially by a single mask process using the same mask.
[0089] Fig. 4 is a cross-sectional view showing a display device according to one embodiment. Fig. 5 is a cross-sectional view showing a display device according to one embodiment. For example, Fig. 4 shows an embodiment of a cross-section of a portion of a display area (DA) corresponding to the line X1-X1' of Fig. 2, and Fig. 5 shows an embodiment of a cross-section of a portion of a display area (DA) corresponding to the line X2-X2' of Fig. 2.
[0090] Referring to FIGS. 4 and 5 in conjunction with FIGS. 1 and 2, the display device (10) may include a lower substrate (BPL) (or a thin film transistor substrate) and a light emitting element layer (LEL) disposed on the lower substrate (BPL). FIGS. 4 and 5 show a display device (10) having a LEDoS (Light Emitting Diode on Silicon) structure in which light emitting diodes (LEs) are disposed on a lower substrate (BPL) formed by a semiconductor process using a silicon wafer (for example, a backplane substrate formed of a semiconductor circuit board). However, the embodiments are not limited thereto. For example, the lower substrate (BPL) may be a backplane substrate of a different type or structure. In addition, the embodiments may be applied to display devices of a different type and / or structure, or to devices of a different type and / or structure, such as lighting devices.
[0091] In one embodiment, the display device (10) may further include additional components. For example, the display device (10) may further include at least one of a color filter layer, a protective layer, and an optical structure (for example, a micro lens overlapping the light emitting elements (LE) of each pixel (PX)) disposed on the light emitting element layer (LEL).
[0092] The lower substrate (BPL) may include a base substrate (SB), pixel circuits (PXC) of pixels (PX), and pads (PD) of FIG. 1. In one embodiment, the lower substrate (BPL) may further include contact terminals (CT) and an insulating layer (INS) disposed on the pixel circuits (PXC).
[0093] The lower substrate (BPL) may further include wirings electrically connected to the pixels (PX) and the pads (PD). For example, the lower substrate (BPL) may include scan lines, data lines, and power wirings electrically connected to the pixels (PX) (e.g., a pixel power wiring for transmitting a first pixel voltage to the pixels (PX), and a common voltage wiring (PL) for transmitting a second pixel voltage (e.g., a common voltage) to the pixels (PX). In one embodiment, one of the first pixel voltage and the second pixel voltage may be a high-potential pixel voltage (e.g., an anode voltage), and the other of the first pixel voltage and the second pixel voltage may be a low-potential pixel voltage (e.g., a cathode voltage). The pixel circuits (PXC), the contact terminals (CT), the wirings, and the pads (PD) may be arranged or formed on the base substrate (SB).
[0094] In one embodiment, the lower substrate (BPL) may be formed by a semiconductor process using a silicon wafer. For example, the base substrate (SB) may be a silicon wafer. In one embodiment, the base substrate (SB) may be made of single-crystal silicon.
[0095] Pixel circuits (PXC) may be arranged on the lower substrate (BPL) corresponding to respective pixel areas in which each pixel (PX) is arranged. In one embodiment, each pixel circuit (PXC) may include a complementary metal-oxide semiconductor (CMOS) circuit formed using a semiconductor process. For example, each pixel circuit (PXC) may include at least one transistor and at least one capacitor formed using a semiconductor process.
[0096] In one embodiment, each pixel (PX) may include a plurality of pixel circuits (PXC) electrically connected to light-emitting elements (LE) of the pixel (PX). For example, each pixel (PX) may include a first pixel circuit (PXC1) electrically connected to a first light-emitting element (LE1), a second pixel circuit (PXC2) electrically connected to a second light-emitting element (LE2), and a third pixel circuit (PXC3) electrically connected to a third light-emitting element (LE3). The first pixel circuit (PXC1), the second pixel circuit (PXC2), and the third pixel circuit (PXC3) may control driving currents flowing through the first light-emitting element (LE1), the second light-emitting element (LE2), and the third light-emitting element (LE3) in response to respective driving signals input from the outside.
[0097] FIGS. 4 and 5 illustrate schematic shapes and positions of pixel circuits (PXC) included in the first pixel (PX1) and the second pixel (PX2) and contact terminals (CT) electrically connected to the pixel circuits (PXC) as examples of elements disposed inside the lower substrate (BPL). In addition, FIGS. 4 and 5 illustrate schematic shapes and positions of common voltage lines (PL) electrically connected to the light-emitting elements (LE) of the pixels (PX) through the common electrode (CE) as examples of wires disposed inside the lower substrate (BPL). The common voltage lines (PL) may be formed as a single layer or multiple layers and may overlap at least a portion of the common electrode (CE). Although FIGS. 4 and 5 illustrate that the common voltage lines (PL) have a shape similar to the contact terminals (CT), the embodiments are not limited thereto. The shape, position (or depth), cross-sectional structure, etc. of the common voltage lines (PL) may vary depending on the embodiments. A first pixel voltage can be supplied to the light-emitting elements (LE) by pixel circuits (PXC), contact terminals (CT) and pixel electrodes (ET), and a second pixel voltage can be supplied to the light-emitting elements (LE) by a common voltage line (PL).
[0098] In addition, although FIGS. 4 and 5 illustrate only one insulating layer (INS) disposed on the pixel circuits (PXC) and surrounding the contact terminals (CT), the embodiments are not limited thereto. For example, a plurality of insulating layers and a plurality of conductive layers may be disposed on the base substrate (SB) on which the pixel circuits (PXC) are formed.
[0099] Contact terminals (CT) (or a portion of pixel circuits (PXC)) and common voltage wiring (PL) may be exposed on the upper surface of the lower substrate (BPL). The contact terminals (CT) may contact and / or be electrically connected to each pixel electrode (ET) at the exposed portion. The common voltage wiring (PL) may contact and / or be electrically connected to the common electrode (CE) at the exposed portion.
[0100] The contact terminals (CT) can electrically connect the pixel circuits (PXC) to the respective pixel electrodes (ET). For example, the contact terminal (CT) electrically connected to the first pixel circuit (PXC1) of the first pixel (PX1) can be electrically connected to the first pixel electrode (ET1) of the first pixel (PX1), the contact terminal (CT) electrically connected to the second pixel circuit (PXC2) of the first pixel (PX1) can be electrically connected to the second pixel electrode (ET2) of the first pixel (PX1), and the contact terminal (CT) electrically connected to the third pixel circuit (PXC3) of the first pixel (PX1) can be electrically connected to the third pixel electrode (ET3) of the first pixel (PX1). The contact terminals (CT) can receive the first pixel voltage from the respective pixel circuits (PXC).
[0101] In one embodiment, the contact terminals (CT) can be electrically connected to each of the light emitting elements (LE) via each of the pixel electrodes (ET) and each of the electrodes (BDE). For example, a contact terminal (CT) electrically connected to a first pixel circuit (PXC1) of a first pixel (PX1) may be electrically connected to a first light-emitting element (LE1) of the first pixel (PX1) via a first pixel electrode (ET1) and a first electrode (BDE1) of the first pixel (PX1), a contact terminal (CT) electrically connected to a second pixel circuit (PXC2) of the first pixel (PX1) may be electrically connected to a second light-emitting element (LE2) of the first pixel (PX1) via a second pixel electrode (ET2) and a second electrode (BDE2) of the first pixel (PX1), and a contact terminal (CT) electrically connected to a third pixel circuit (PXC3) of the first pixel (PX1) may be electrically connected to a third light-emitting element (LE3) of the first pixel (PX1) via a third pixel electrode (ET3) and a third electrode (BDE3) of the first pixel (PX1).
[0102] Although the contact terminals (CT) and the pixel circuits (PXC) are illustrated as separate configurations in FIGS. 4 and 5 , the embodiments are not limited thereto. For example, the contact terminals (CT) may be a part of each pixel circuit (PXC). As an example, the contact terminals (CT) may be electrodes (or wires) that protrude and are exposed from the upper surface of each pixel circuit (PXC).
[0103] The contact terminals (CT) and the common voltage wire (PL) may include a conductive material. For example, the contact terminals (CT) and the common voltage wire (PL) may include, but are not limited to, copper (Cu), titanium (Ti), silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), lead (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), or mixtures thereof.
[0104] The light emitting element layer (LEL) may include light emitting elements (LE) and electrodes and / or wires electrically connected to the light emitting elements (LE). In addition, the light emitting element layer (LEL) may further include insulating layers arranged around the light emitting elements (LE).
[0105] In one embodiment, the light emitting elements (LE) may include a plurality of light emitting elements (LE) that are sequentially arranged or stacked on the lower substrate (BPL) in each pixel area where each pixel (PX) is arranged. For example, the light emitting elements (LE) may include a first light emitting element (LE1), a second light emitting element (LE2), and a third light emitting element (LE3) that are arranged in different layers on the lower substrate (BPL) in each pixel area and overlap each other when viewed in a plan view. In each pixel area, light of a first color, light of a second color, or light of a third color may be emitted alone, or light in which at least two of light of the first color, light of the second color, and light of the third color are mixed may be emitted.
[0106] In one embodiment, the first light-emitting elements (LE1) of the pixels (PX) may be arranged in the same layer and formed simultaneously in the same process. The first light-emitting elements (LE1) of the pixels (PX) may be the same type of light-emitting elements (e.g., red micro light-emitting diodes) and may include the same material. The second light-emitting elements (LE2) of the pixels (PX) may be arranged in the same layer and formed simultaneously in the same process. The second light-emitting elements (LE2) of the pixels (PX) may be the same type of light-emitting elements (e.g., blue micro light-emitting diodes) and may include the same material. The third light-emitting elements (LE3) of the pixels (PX) may be arranged in the same layer and formed simultaneously in the same process. The third light-emitting elements (LE3) of the pixels (PX) may be the same type of light-emitting elements (e.g., green micro light-emitting diodes) and may include the same material.
[0107] The first light-emitting elements (LE1) may be arranged on the first electrodes (BDE1). The second light-emitting elements (LE2) may be arranged on the second electrodes (BDE2). The third light-emitting elements (LE3) may be arranged on the third electrodes (BDE3).
[0108] In FIGS. 4 and 5, an embodiment is disclosed in which the first light-emitting element (LE1), the third light-emitting element (LE3), and the second light-emitting element (LE2) are sequentially arranged or stacked along the third direction (DR3), but the embodiments are not limited thereto. For example, in another embodiment, the positions of the first light-emitting element (LE1) and the second light-emitting element (LE2) may be reversed. In addition, the stacking order of the light-emitting elements (LE) arranged in each pixel (PX) may vary depending on the embodiments. In addition, the arrangement positions or stacking order of the electrodes (BDE) and connection electrodes (CNE) connected to each light-emitting element (LE) may also vary depending on the arrangement positions or stacking order of the light-emitting elements (LE).
[0109] Each of the light emitting elements (LE) may include a first semiconductor layer (SEM1), a light emitting layer (EML) (also referred to as an “active layer”), and a second semiconductor layer (SEM2) sequentially disposed on each electrode (BDE). In one embodiment, each of the light emitting elements (LE) may further include at least one of a first contact electrode (CTE1) disposed on one surface (e.g., a lower surface) of the first semiconductor layer (SEM1) and a second contact electrode (CTE2) disposed on one surface (e.g., a upper surface) of the second semiconductor layer (SEM2). In the embodiments of FIGS. 4 and 5, the first contact electrode (CTE1) and the second contact electrode (CTE2) are described as being included in the light emitting element (LE), but the embodiments are not limited thereto. For example, the first contact electrode (CTE1) and the second contact electrode (CTE2) may be considered as separate elements from the light emitting element (LE), and may be selectively arranged on at least one surface of the light emitting element (LE).
[0110] The first contact electrode (CTE1) may be disposed on each electrode (BDE). For example, the first contact electrode (CTE1) included in the first light-emitting element (LE1) of the first pixel (PX1) may be disposed on the first electrode (BDE1) of the first pixel (PX1). Similarly, the first contact electrode (CTE1) included in the second light-emitting element (LE2) of each pixel (PX) may be disposed on the second electrode (BDE2) of the corresponding pixel (PX), and the first contact electrode (CTE1) included in the third light-emitting element (LE3) of each pixel (PX) may be disposed on the third electrode (BDE3) of the corresponding pixel (PX). The first contact electrode (CTE1) may protect the first semiconductor layer (SEM1) and smoothly connect the light-emitting element (LE) to the electrode (BDE).
[0111] In one embodiment, the first contact electrode (CTE1) may be disposed over the entire surface of one side of the first semiconductor layer (SEM1). For example, the first contact electrode (CTE1) may be disposed over the entire surface of the lower surface of the first semiconductor layer (SEM1). Accordingly, the first semiconductor layer (SEM1) may be stably protected. However, the embodiments are not limited thereto, and the first contact electrode (CTE1) may be disposed over only a portion of the first semiconductor layer (SEM1).
[0112] The first contact electrode (CTE1) may include a metal, a metal oxide, or other conductive material. In one embodiment, the first contact electrode (CTE1) may include, but is not limited to, a transparent conductive material (e.g., a transparent conductive oxide such as ITO (Indium Tin Oxide) or IZO (Indium Zinc Oxide), or other transparent conductive material).
[0113] The first semiconductor layer (SEM1) may be disposed on the first contact electrode (CTE1). The first semiconductor layer (SEM1) may include either a p-type semiconductor layer or an n-type semiconductor layer. In describing the embodiments of FIGS. 4 and 5, an embodiment in which the first semiconductor layer (SEM1) includes an n-type semiconductor layer and the display device (10) has a common anode structure is described as an example, but the embodiments are not limited thereto. For example, the first semiconductor layer (SEM1) may include a p-type semiconductor layer and the display device (10) may be formed with a common cathode structure.
[0114] The first semiconductor layer (SEM1) includes a semiconductor material such as GaN, InGaN, InAlGaN, AlGaN, or AlN, and may be an n-type semiconductor layer doped with a first conductivity type dopant (or n-type dopant) such as germanium (Ge), selenium (Se), tellurium (Te), or tin (Sn). For example, the first semiconductor layer (SEM1) may include a GaN semiconductor material doped with a first conductivity type dopant (for example, n-GaN). However, the material constituting the first semiconductor layer (SEM1) is not limited thereto, and the first semiconductor layer (SEM1) may be composed of various other materials.
[0115] The light-emitting layer (EML) can be disposed between the first semiconductor layer (SEM1) and the second semiconductor layer (SEM2). The light-emitting layer (EML) can emit light by recombination of electron-hole pairs generated in response to an electric signal applied through the first semiconductor layer (SEM1) and the second semiconductor layer (SEM2).
[0116] The light-emitting layer (EML) may include any one of a single well structure, a multi-well structure, a single quantum well structure, a multi-quantum well (MQW) structure, a quantum dot structure, and a quantum wire structure, but the embodiments are not limited thereto. The light-emitting layer (EML) may include AlGaN, InGaN, or GaN, and various other materials may also form the light-emitting layer (EML).
[0117] The light-emitting layers (EML) of the light-emitting elements (LD) arranged in different layers may be configured to emit light of different wavelength bands. For example, each of the first light-emitting element (LE1), the second light-emitting element (LE2), and the third light-emitting element (LE3) may include an light-emitting layer (EML) that emits light of different wavelength bands.
[0118] In one embodiment, the light emitting layer (EML) of the first light emitting element (LE1) can emit light in a wavelength band corresponding to light of a first color (e.g., light in a red wavelength band), the light emitting layer (EML) of the second light emitting element (LE2) can emit light in a wavelength band corresponding to light of a second color (e.g., light in a blue wavelength band), and the light emitting layer (EML) of the third light emitting element can emit light in a wavelength band corresponding to light of a third color (e.g., light in a green wavelength band).
[0119] In one embodiment, the light-emitting layer (EML) may have a multi-quantum well structure including, but not limited to, a quantum well layer including InGaN and a barrier layer including GaN, AlGaN, or GaAlN. In one embodiment, when the light-emitting layer (EML) includes InGaN, the color or wavelength of light emitted from the light-emitting layer (EML) can be controlled by controlling the content of indium (In).
[0120] The light-emitting layer (EML) can emit light in the visible light wavelength range, for example, light in the wavelength range of about 400 nm to 900 nm. For example, the light-emitting layer (EML) of the first light-emitting element (LE1) can emit red light having a peak wavelength in the range of about 610 nm to 650 nm, the light-emitting layer (EML) of the second light-emitting element (LE2) can emit blue light having a peak wavelength in the range of about 440 nm to 480 nm, and the light-emitting layer (EML) of the third light-emitting element (LE3) can emit green light having a peak wavelength in the range of about 510 nm to 550 nm. The light-emitting layer (EML) of each of the light-emitting elements (LE) may emit light of a color or a wavelength range other than the colors or wavelength ranges exemplified above.
[0121] The second semiconductor layer (SEM2) may be disposed on the light-emitting layer (EML). The second semiconductor layer (SEM2) may include the other of a p-type semiconductor layer and an n-type semiconductor layer. In describing the embodiments of FIGS. 4 and 5, an embodiment in which the second semiconductor layer (SEM2) includes a p-type semiconductor layer is described as an example, but the embodiments are not limited thereto. For example, the first semiconductor layer (SEM1) may include a p-type semiconductor layer, and the second semiconductor layer (SEM2) may include an n-type semiconductor layer.
[0122] The second semiconductor layer (SEM2) includes a semiconductor material such as GaN, InGaN, InAlGaN, AlGaN, or AlN, and may be a p-type semiconductor layer doped with a second conductivity type dopant (or p-type dopant) such as magnesium (Mg), zinc (Zn), calcium (Ca), strontium (Sr), barium (Ba), or the like. For example, the second semiconductor layer (SEM2) may include a GaN semiconductor material doped with a second conductivity type dopant (for example, p-GaN). However, the material constituting the second semiconductor layer (SEM2) is not limited thereto, and the second semiconductor layer (SEM2) may be composed of various other materials.
[0123] In one embodiment, the first semiconductor layer (SEM1), the light-emitting layer (EML) and the second semiconductor layer (SEM2) of each of the light-emitting elements (LE) may be formed from a semiconductor epitaxial stack or epi-layer formed by epitaxial growth on a semiconductor substrate.
[0124] The second contact electrode (CTE2) may be disposed on the second semiconductor layer (SEM2). The second contact electrode (CTE2) protects the second semiconductor layer (SEM2) and can smoothly connect the light emitting element (LE) to the common electrode (CE).
[0125] In one embodiment, the second contact electrode (CTE2) may be disposed over the entire surface of one side of the second semiconductor layer (SEM2). For example, the second contact electrode (CTE2) may be disposed over the entire surface of the upper surface of the second semiconductor layer (SEM2). Accordingly, the second semiconductor layer (SEM2) may be stably protected. However, the embodiments are not limited thereto, and the second contact electrode (CTE2) may be disposed over only a portion of the second semiconductor layer (SEM2).
[0126] The second contact electrode (CTE2) may include a metal, a metal oxide, or other conductive material. In one embodiment, the second contact electrode (CTE2) may include, but is not limited to, a transparent conductive material (for example, a transparent conductive oxide such as ITO (Indium Tin Oxide) or IZO (Indium Zinc Oxide), or other transparent conductive material). Accordingly, light generated from the light-emitting element (LE) may transmit through the second contact electrode (CTE2) and be emitted to the upper portion of the light-emitting element (LE).
[0127] In embodiments, the light emitting elements (LE) may have shapes or structures that are differentiated and / or optimized according to their respective characteristics. For example, at least two of the light emitting elements (LE) among the first light emitting element (LE1), the second light emitting element (LE2), and the third light emitting element (LE3) may include respective sidewalls (or side surfaces) having different angles with respect to their respective lower surfaces (e.g., the lower surfaces of the first semiconductor layer (SEM1) or the first contact electrode (CTE1)), the lower substrate (BPL), and / or the respective electrodes (BDE). For example, an angle (θ1) (also referred to as a “first angle”) formed by a lower surface (also referred to as a “first lower surface”) and a side wall (also referred to as a “first side wall”) of the first light-emitting element (LE1) may be different from an angle (θ2) (also referred to as a “second angle”) formed by a lower surface (also referred to as a “second lower surface”) and a side wall (also referred to as a “second side wall”) of the second light-emitting element (LE2). The angle (θ3) (also referred to as the “third angle”) formed by the lower surface (also referred to as the “third lower surface”) and the side wall (also referred to as the “third side wall”) of the third light-emitting element (LE3) may be substantially the same as the angle (θ1) formed by the lower surface and the side wall of the first light-emitting element (LE1) or the angle (θ2) formed by the lower surface and the side wall of the second light-emitting element (LE2), or may be different from the angle (θ1) formed by the lower surface and the side wall of the first light-emitting element (LE1) and the angle (θ2) formed by the lower surface and the side wall of the second light-emitting element (LE2).
[0128] In one embodiment, at least one of the first light-emitting element (LE1), the second light-emitting element (LE2), and the third light-emitting element (LE3) may include an inclined sidewall having a tapered angle. In addition, at least one of the first light-emitting element (LE1), the second light-emitting element (LE2), and the third light-emitting element (LE3) may include a vertical sidewall. Accordingly, at least two of the light-emitting elements (LE) of the first light-emitting element (LE1), the second light-emitting element (LE2), and the third light-emitting element (LE3) may have different shapes (for example, different cross-sectional shapes).
[0129] In one embodiment, among the first light-emitting element (LE1), the second light-emitting element (LE2), and the third light-emitting element (LE3), the light-emitting element (LE) that is relatively insensitive to surface defects may include inclined sidewalls. Additionally, among the first light-emitting element (LE1), the second light-emitting element (LE2), and the third light-emitting element (LE3), the light-emitting element (LE) that is relatively sensitive to surface defects may include vertical sidewalls.
[0130] In one embodiment, the first light-emitting element (LE1), the second light-emitting element (LE2), and the third light-emitting element (LE3) emit light of different wavelength bands, and the content of indium (In) included in the light-emitting layers (EML) of the first light-emitting element (LE1), the second light-emitting element (LE2), and the third light-emitting element (LE3) (for example, the indium (In) content of a quantum well layer including InGaN) may be different from each other. For example, the light-emitting layer (EML) of the light-emitting element (LE) that emits light of a longer wavelength may include a higher content of indium (In) than the light-emitting layer (EML) of the light-emitting element (LE) that emits light of a shorter wavelength. For example, the light-emitting layer (EML) of the first light-emitting element (LE1) that emits red light (also referred to as the “first light-emitting layer”) may include indium (In) in a higher content than the light-emitting layer (EML) of the second light-emitting element (LE2) that emits blue light (also referred to as the “second light-emitting layer”) and the light-emitting layer (EML) of the third light-emitting element (LE3) that emits green light (also referred to as the “third light-emitting layer”). The light-emitting layer (EML) of the second light-emitting element (LE2) that emits light with the shortest wavelength among the first light-emitting element (LE1), the second light-emitting element (LE2), and the third light-emitting element (LE3) may include indium (In) in a lower content than the light-emitting layer (EML) of the first light-emitting element (LE1) and the light-emitting layer (EML) of the third light-emitting element (LE3).
[0131] In one embodiment, among the first light-emitting element (LE1), the second light-emitting element (LE2), and the third light-emitting element (LE3), the light-emitting element (LE) that emits light of the longest wavelength band and / or has the highest indium (In) content in the light-emitting layer (EML) may include an inclined sidewall (for example, a sidewall formed of an inclined surface). In describing the embodiments, the term "an inclined sidewall" may mean a sidewall that is inclined at a taper angle with respect to the lower surface (or upper surface) of each light-emitting element (LE). For example, the fact that the light-emitting element (LE) includes an inclined sidewall may mean that the sidewall of the light-emitting element (LE) is inclined at an angle of approximately ±5° or more with respect to a direction perpendicular to the lower surface (or upper surface) of the light-emitting element (LE) (for example, the third direction (DR3)). For example, the taper angle formed by the lower surface and the sidewall of the light emitting element (LE) including the inclined sidewall may fall within a range of less than 85° or greater than 95°. In addition, in describing the embodiments, the shape of the sidewall of the light emitting element (LE) may be mainly based on the shape of the sidewall of the first semiconductor layer (SEM1), the light emitting layer (EML), and the second semiconductor layer (SEM2).
[0132] For example, among the first light-emitting element (LE1), the second light-emitting element (LE2), and the third light-emitting element (LE3), the first light-emitting element (LE1) that emits longer wavelength light (e.g., red light) and has the highest indium (In) content in the light-emitting layer (EML) may include inclined sidewalls. For example, the first light-emitting element (LE1) (or the semiconductor layers of the first light-emitting element (LE1), including the first semiconductor layer (SEM1), the light-emitting layer (EML), and the second semiconductor layer (SEM2)) may have a cross-sectional shape that is approximately trapezoidal. When the first light-emitting element (LE1) includes inclined sidewalls, the angle (θ1) formed by the sidewalls of the first semiconductor layer (SEM1), the light-emitting layer (EML), and the second semiconductor layer (SEM2) of the first light-emitting element (LE1) and the lower surface (or the first electrode (BDE1), and / or the lower substrate (BPL)) of the first light-emitting element (LE1) may be in a range of less than 85° or greater than 95°. Each of the first contact electrode (CTE1) and the second contact electrode (CTE2) of the first light-emitting element (LE1) may include inclined sidewalls like the first semiconductor layer (SEM1), the light-emitting layer (EML), and the second semiconductor layer (SEM2), or may include vertical sidewalls that are substantially perpendicular to the lower surface of the first light-emitting element (LE1). For example, each of the first contact electrode (CTE1) and the second contact electrode (CTE2) of the first light-emitting element (LE1) may or may not have a taper angle, and their shapes are not particularly limited.
[0133] In one embodiment, among the first light-emitting element (LE1), the second light-emitting element (LE2), and the third light-emitting element (LE3), the light-emitting element (LE) that emits light with the shortest wavelength band or has the lowest indium (In) content of the light-emitting layer (EML) may include vertical sidewalls. In describing the embodiments, the term "vertical sidewall" may refer to a sidewall that has an angle within a predetermined range, for example, an angle within approximately ±5°, with respect to a direction perpendicular to the lower surface (or upper surface) of each light-emitting element (LE) (for example, the third direction (DR3)) and is substantially perpendicular to the lower surface or upper surface of the light-emitting element (LE). For example, when the light-emitting element (LE) includes a vertical sidewall, it may mean that the sidewall of the light-emitting element (LE) is substantially perpendicular to the lower surface (or upper surface) of the light-emitting element (LE). For example, the angle between the lower surface of the light emitting element (LE) and the side wall, including the vertical side wall, may be in the range of approximately 85° to 95°.
[0134] For example, among the first light-emitting element (LE1), the second light-emitting element (LE2), and the third light-emitting element (LE3), the second light-emitting element (LE2) that emits light of a shorter wavelength (e.g., blue light) and has the lowest indium (In) content in the light-emitting layer (EML) may include vertical side walls. For example, the second light-emitting element (LE2) may have a cross-sectional shape of approximately rectangular or square, and an angle (θ2) formed between the side walls of the first semiconductor layer (SEM1), the light-emitting layer (EML), and the second semiconductor layer (SEM2) of the second light-emitting element (LE2) and the lower surface (or the second electrode (BDE2) and / or the lower substrate (BPL)) of the second light-emitting element (LE2) may fall within a range of 85° to 95°. For example, the angle formed between the side walls and the lower surface of the second light-emitting element (LE2) may be approximately 90°. Each of the first contact electrode (CTE1) and the second contact electrode (CTE2) of the second light-emitting element (LE2) may include vertical side walls, such as the first semiconductor layer (SEM1), the light-emitting layer (EML), and the second semiconductor layer (SEM2), or may include inclined side walls having a taper angle with respect to the lower surface of the second light-emitting element (LE2). For example, the shape of each of the first contact electrode (CTE1) and the second contact electrode (CTE2) of the second light-emitting element (LE2) is not particularly limited.
[0135] Compared to the first light-emitting element (LE1) and the second light-emitting element (LE2), the third light-emitting element (LE3) that emits light of an intermediate wavelength (e.g., green light) may include an inclined sidewall or a vertical sidewall. For example, the third light-emitting element (LE3) may have a cross-sectional shape of approximately a rectangle or a square, and an angle (θ3) formed by the sidewalls of the first semiconductor layer (SEM1), the light-emitting layer (EML), and the second semiconductor layer (SEM2) of the third light-emitting element (LE3) and the lower surface (or the third electrode (BDE3) and / or the lower substrate (BPL)) of the third light-emitting element (LE3) may fall within a range of 85° to 95°. Each of the first contact electrode (CTE1) and the second contact electrode (CTE2) of the third light-emitting element (LE3) may include a vertical sidewall or a inclined sidewall.
[0136] In one embodiment, a light emitting element (LE) including vertical sidewalls can be formed by first etching semiconductor layers (e.g., semiconductor thin film layers or epi layers) formed (epitaxially grown) on a semiconductor substrate, or disposed on a bottom substrate (BPL), to have inclined sidewalls, and then forming the LE into a shape including vertical sidewalls through an additional process, such as a wet treatment. Through the wet treatment process, the surface of the LE (e.g., the side exposed to plasma in the etching process) can be refined and surface defects can be reduced. Accordingly, in the case of the LE including vertical sidewalls, non-luminous recombination of electrons and holes due to surface defects can be reduced, and the efficiency (e.g., luminous efficiency) of the LE can be increased.
[0137] In one embodiment, a light emitting device (LE) including slanted sidewalls can be manufactured or formed in a form including slanted sidewalls by etching semiconductor layers for forming a first semiconductor layer (SEM1), a light emitting layer (EML), and a second semiconductor layer (SEM2), and can be manufactured or formed without going through an additional process such as the above-described wet treatment. Accordingly, in the case of a light emitting device (LE) including slanted sidewalls, volume loss of the light emitting layer (EML), etc. that may occur during an additional process can be reduced or prevented, and can be formed in a relatively large size. For example, a light emitting device (LE) including slanted sidewalls can be formed in a larger size than a light emitting device (LE) including vertical sidewalls when viewed in a plan view. As the area of the light emitting layer (EML) is increased or secured, the light efficiency of the light emitting device (LE) can be increased. For example, when viewed on a plane, the size of the first light-emitting element (LE1) may be larger than the size of the second light-emitting element (LE2) and / or the size of the third light-emitting element (LE3). However, the embodiments are not limited thereto, and the planar shape or relative size of each of the light-emitting elements (LE) may be varied in various ways depending on the embodiments.
[0138] In one embodiment, a light emitting element (LE) including sloped sidewalls may be a light emitting element (LE) having a relatively high indium (In) content in an emitting layer (EML). When the indium (In) content of the emitting layer (EML) is high, the rate at which carriers move to the surface may decrease due to indium localization occurring inside the emitting layer (EML). Accordingly, the influence of surface defects on the emitting element (LE) may be reduced. For example, in the case of a emitting element (LE) including an emitting layer (EML) having a high indium (In) content, the decrease in efficiency of the emitting element (LE) due to surface defects may be minimal even without an additional process such as a wet treatment. In addition, by omitting or minimizing the additional process, volume loss of the emitting layer (EML), etc., may be prevented or reduced, thereby increasing the efficiency (e.g., luminous efficiency) of the emitting element (LE).
[0139] As described above, in the embodiments, at least two types of light emitting elements (LE) (e.g., a first light emitting element (LE1) and a second light emitting element (LE2)) that emit light of different colors can be formed with different structures and / or shapes depending on the wavelength band of light emitted from each light emitting element (LE) and / or the indium (In) content of the light emitting layer (EML). For example, depending on the type of the light emitting elements (LE), a process such as a wet treatment process can be selectively performed to form the light emitting elements (LE) into different shapes. Alternatively, the surface characteristics or shapes of the light emitting elements (LE) can be controlled by controlling the degree to which the wet treatment process is performed (e.g., the process time or intensity). Accordingly, the luminous efficiency of the light emitting elements (LE) can be improved or optimized according to the characteristics of each of the light emitting elements (LE), and the luminous efficiency of the light emitting elements (LE) and the pixels (PX) including the light emitting elements (LE) can be increased.
[0140] For example, a first light-emitting element (LE1) that may be relatively insensitive to surface defects may be manufactured or formed to include inclined sidewalls without undergoing an additional process such as a wet treatment, thereby preventing or minimizing a reduction in the size of the light-emitting layer (EML) of the first light-emitting element (LE1). In addition, a second light-emitting element (LE2) that may be relatively sensitive to surface defects may be manufactured or formed to include vertical sidewalls by undergoing an additional process such as a wet treatment to smooth out a damaged surface, thereby reducing or minimizing surface defects of the second light-emitting element (LE2).
[0141] In addition, the first light-emitting elements (LE1), the second light-emitting elements (LE2), and the third light-emitting elements (LE3) may be arranged in different layers within the light-emitting element layer (LEL), and may be individually etched or formed. In one embodiment, the first light-emitting elements (LE1), the second light-emitting elements (LE2), and the third light-emitting elements (LE3) may be manufactured or formed in a form including inclined sidewalls or vertical sidewalls by etching the semiconductor layers formed by epitaxial growth on the respective semiconductor substrates (for example, epilayers sequentially formed to form the first semiconductor layer (SEM1), the light-emitting layer (EML), and the second semiconductor layer (SEM2) of the first light-emitting elements (LE1), the second light-emitting elements (LE2), and the third light-emitting elements (LE3) respectively) after arranging or bonding them on the lower substrate (BPL). In another embodiment, at least one of the first light-emitting elements (LE1), the second light-emitting elements (LE2) and the third light-emitting elements (LE3) may be etched on the respective semiconductor substrates to include inclined sidewalls or vertical sidewalls and then placed or bonded on the lower substrate (BPL).
[0142] In one embodiment, the cross-sectional shape of the light emitting elements (LE) or the stacking order of the first semiconductor layer (SEM1), the light emitting layer (EML), and the second semiconductor layer (SEM2) may be changed depending on the arrangement order of the semiconductor layers for forming the light emitting elements (LE), the order of performing the etching process and the bonding process, etc. For example, when the semiconductor layers are etched while the semiconductor layer (e.g., an n-type semiconductor layer) for forming the first semiconductor layer (SEM1) is arranged lower than the semiconductor layer (e.g., a p-type semiconductor layer) for forming the second semiconductor layer (SEM2), the first semiconductor layer (SEM1) may have a shape in which the area is larger than the area of the second semiconductor layer (SEM2). Conversely, when the semiconductor layers are etched while the semiconductor layer for forming the second semiconductor layer (SEM2) is arranged lower than the semiconductor layer for forming the first semiconductor layer (SEM1), the area of the second semiconductor layer (SEM2) may have a shape larger than the area of the first semiconductor layer (SEM1). For example, the first light-emitting element (LE1) formed to include inclined sidewalls without going through a wet processing process or by shortening the time of the wet processing process may have a cross-sectional shape of a tapered shape or an inverse taper shape. By controlling the arrangement direction or cross-sectional shape of the light-emitting element (LE) including the inclined sidewalls, the light-emitting characteristics, such as the light-gathering direction, can be appropriately controlled or changed.
[0143] In one embodiment, the electrodes of the light emitting element layer (LEL) may include pixel electrodes (ET) and connection electrodes (CNE) electrically connected to opposite ends of the light emitting elements (LE), electrodes (BDE) electrically connected between the light emitting elements (LE) and the pixel electrodes (ET), and a common electrode (CE) electrically connected to one end of the light emitting elements (LE) via the connection electrodes (CNE). Although FIGS. 4 and 5 illustrate an embodiment in which the common electrode (CE) is connected to the light emitting elements (LE) via the connection electrodes (CNE), the embodiments are not limited thereto. For example, the common electrode (CE) may be in direct contact with or connected to the light emitting elements (LE), or the common electrode (CE) and the connection electrodes (CNE) may be integrated into one electrode. In addition, although FIGS. 4 and 5 illustrate a display device (10) having a structure in which electrodes (BDE) are arranged on a lower insulating layer (BIL) covering a lower substrate (BPL) and light-emitting elements (LE) are coupled to the lower substrate (BPL) by the electrodes (BDE), the structure of the display device (10) according to the embodiments is not limited thereto. For example, the light-emitting elements (LE) may be appropriately arranged on the lower substrate (BPL) by utilizing other connecting electrodes or wires without using a bonding method.
[0144] In one embodiment, the insulating layers of the light emitting element layer (LEL) may include a lower insulating layer (BIL), a first insulating layer (IL1), a first interlayer insulating layer (INL1), a second insulating layer (IL2), a third insulating layer (IL3), and an upper insulating layer (UIL), which are sequentially arranged on a lower substrate (BPL). Each of the insulating layers of the light emitting element layer (LEL) may be formed of a single layer or multiple layers including at least one insulating material. In one embodiment, each of the insulating layers of the light emitting element layer (LEL) may be formed of an inorganic insulating material (for example, silicon oxide (SiO)). x ), silicon nitride (SiN x ), silicon oxynitride (SiO x Ny ), silicon dioxide (SiO x C y ), aluminum oxide (Al x O y ), aluminum nitride (AlN) x ), zirconium oxide (ZrO x ), hafnium oxide (HfO x ), titanium oxide (TiOx), or other inorganic insulating materials.
[0145] The pixel electrodes (ET) and the common electrode (CE) may be disposed on the lower substrate (BPL). The pixel electrodes (ET) and the common electrode (CE) may include a conductive material. For example, the pixel electrodes (ET) and the common electrode (CE) may include at least one of gold (Au), copper (Cu), tin (Sn), titanium (Ti), aluminum (Al), silver (Ag), or other metals.
[0146] Pixel electrodes (ET) are arranged between the lower substrate (BPL) and the electrodes (BDE), so as to connect the lower substrate (BPL) and the electrodes (BDE). For example, the pixel electrodes (ET) can be electrically connected between a contact terminal (CT) of each pixel circuit (PXC) and an electrode (BDE) corresponding to each pixel circuit (PXC).
[0147] The pixel electrodes (ET) may be electrically connected to the contact terminals (CT) of the lower substrate (BPL) by penetrating at least one of the insulating layers of the light emitting element layer (LEL). For example, the first pixel electrode (ET1) of the first pixel (PX1) may be electrically connected to the contact terminal (CT) connected to the first pixel circuit (PXC1) of the first pixel (PX1) by penetrating the lower insulating layer (BIL). In addition, the first pixel electrode (ET1) of the first pixel (PX1) may be electrically connected to the first electrode (BDE1) of the first pixel (PX1) disposed on the lower insulating layer (BIL), and may be electrically connected to the first light emitting element (LE1) of the first pixel (PX1) through the first electrode (BDE1). The second pixel electrode (ET2) of the first pixel (PX1) may be electrically connected to a contact terminal (CT) connected to a second pixel circuit (PXC2) of the first pixel (PX1) through the lower insulating layer (BIL), the first insulating layer (IL1), the first interlayer insulating layer (INL1), the second insulating layer (IL2), and the second interlayer insulating layer (INL2). In addition, the second pixel electrode (ET2) of the first pixel (PX1) may be electrically connected to a second electrode (BDE2) of the first pixel (PX1) disposed on the second interlayer insulating layer (INL2), and may be electrically connected to a second light-emitting element (LE2) of the first pixel (PX1) through the second electrode (BDE2). The third pixel electrode (ET3) of the first pixel (PX1) may be electrically connected to a contact terminal (CT) connected to a third pixel circuit (PXC3) of the first pixel (PX1) through the lower insulating layer (BIL), the first insulating layer (IL1), and the first interlayer insulating layer (INL1). In addition, the third pixel electrode (ET3) of the first pixel (PX1) may be electrically connected to a third electrode (BDE3) of the first pixel (PX1) disposed on the first interlayer insulating layer (INL1), and may be electrically connected to a third light-emitting element (LE3) of the first pixel (PX1) through the third electrode (BDE3).In the same manner, pixel electrodes (ET) of other pixels (PX), including the second pixel (PX2), can be electrically connected between contact terminals (CT) of each pixel circuit (PXC) and each light-emitting element (LE).
[0148] A common electrode (CE) can be electrically connected between a common voltage line (PL) of a lower substrate (BPL) and connection electrodes (CNE) by penetrating at least one of the insulating layers of a light emitting element layer (LEL). For example, the common electrode (CE) can penetrate a lower insulating layer (BIL), a first insulating layer (IL1), a first interlayer insulating layer (INL1), a second insulating layer (IL2), a second interlayer insulating layer (INL2), and a third insulating layer (IL3).
[0149] The electrodes (BDE) may be disposed under the light emitting elements (LE). The electrodes (BDE) may be electrically connected to the first contact electrodes (CTE1) (or the first semiconductor layers (SEM1)) of each of the light emitting elements (LE). In one embodiment, the electrodes (BDE) may include first electrodes (BDE1), third electrodes (BDE3), and second electrodes (BDE2) that are sequentially disposed or stacked on the lower substrate (BPL) along the third direction (DR3). For example, the first electrodes (BDE1) of the pixels (PX) may be disposed separately from each other on the lower insulating layer (BIL), the second electrodes (BDE2) of the pixels (PX) may be disposed separately from each other on the second interlayer insulating layer (INL2), and the third electrodes (BDE3) of the pixels (PX) may be disposed separately from each other on the first interlayer insulating layer (INL1). The arrangement order or stacking order of the first electrodes (BDE1), third electrodes (BDE3), and second electrodes (BDE2) may vary depending on the embodiments.
[0150] The electrodes (BDE) may include a conductive material for stably arranging the light-emitting elements (LE) on the lower substrate (BPL). In one embodiment, when the light-emitting elements (LE) are arranged on the lower substrate (BPL) by a bonding process, the electrodes (BDE) may include a conductive material suitable for the bonding process, for example, a eutectic metal or a transparent conductive material that can be subjected to a bonding process. However, the embodiments are not limited thereto, and the light-emitting elements (LE) may be arranged on the lower substrate (BPL) by another process. In this case, the type of conductive material used to form the electrodes (BDE) is not particularly limited. Hereinafter, as an embodiment related to the electrodes (BDE), an embodiment in which the electrodes (BDE) include a conductive material that can be subjected to a bonding process will be described.
[0151] In one embodiment, the electrodes (BDE) disposed at the lowermost portion among the electrodes (BDE) may include a bonding metal layer including at least one metal suitable for a bonding process and a capping layer disposed on at least one surface of the bonding metal layer. For example, each of the first electrodes (BDE1) may be formed as a multilayer in which a first capping layer including titanium (Ti) or another barrier material (e.g., a diffusion-preventing material), a bonding metal layer including a gold (Au)-tin (Sn) alloy or another bonding metal, and a second capping layer including titanium (Ti) or another barrier material are sequentially laminated, but is not limited thereto. In one embodiment, each of the first electrodes (BDE1) may further include a reflective layer including a metal having a high reflectivity, such as aluminum (Al), but is not limited thereto.
[0152] In one embodiment, the electrodes (BDE) disposed on at least one light-emitting element (LE) may include a transparent conductive material capable of a bonding process. For example, the second electrodes (BDE2) and the third electrodes (BDE3) may include a transparent conductive oxide such as ITO (Indium Tin Oxide) or ZnO (Zinc Oxide), or other transparent conductive material. Accordingly, light emitted from the first light-emitting elements (LE1) may transmit through the second electrodes (BDE2) and the third electrodes (BDE3).
[0153] The connecting electrodes (CNE) may be arranged on top of the light emitting elements (LE). Although FIGS. 4 and 5 illustrate embodiments in which the connecting electrodes (CNE) are arranged over the entire surface of each light emitting element (LE), the embodiments are not limited thereto. For example, the connecting electrodes (CNE) may be locally arranged over only a portion of each light emitting element (LE).
[0154] The connection electrodes (CNE) may include first connection electrodes (CNE1), second connection electrodes (CNE2), and third connection electrodes (CNE3). The first connection electrodes (CNE1) may be disposed on the first light-emitting elements (LE1) and the first insulating layer (IL1). The first connection electrodes (CNE1) may electrically connect the first light-emitting elements (LE1) to the common electrode (CE). The second connection electrodes (CNE2) may be disposed on the second light-emitting elements (LE2) and the third insulating layer (IL3). The second connection electrodes (CNE2) may electrically connect the second light-emitting elements (LE2) to the common electrode (CE). The third connection electrodes (CNE3) may be disposed on the third light-emitting elements (LE3) and the second insulating layer (IL2). The third connecting electrodes (CNE3) can electrically connect the third light-emitting elements (LE3) to the common electrode (CE).
[0155] The connecting electrodes (CNE) may include a metal, a metal oxide, or other conductive material. In one embodiment, the connecting electrodes (CNE) may include, but are not limited to, a transparent conductive material (e.g., a transparent conductive oxide such as Indium Tin Oxide (ITO) or Indium Zinc Oxide (IZO), or other transparent conductive material).
[0156] A lower insulating layer (BIL) may be disposed on a lower substrate (BPL). The lower insulating layer (BIL) may include openings (e.g., contact holes or via holes) that expose contact terminals (CT) and common voltage lines (PL) of the lower substrate (BPL). At least a portion of the pixel electrodes (ET) and the common electrode (CE) may be disposed within the openings. For example, the lower insulating layer (BIL) may surround at least a portion of the pixel electrodes (ET) and the common electrode (CE).
[0157] A first insulating layer (IL1) may be disposed on a lower insulating layer (BIL). The first insulating layer (IL1) may surround the first electrodes (BDE1) and the first light-emitting elements (LE1). The first insulating layer (IL1) may surround at least a portion of the pixel electrodes (ET) (for example, the second pixel electrodes (ET2) and the third pixel electrodes (ET3)) and the common electrode (CE).
[0158] A first interlayer insulating layer (INL1) may be disposed on the first insulating layer (IL1). The first interlayer insulating layer (INL1) may cover the first connection electrodes (CNE1). The first interlayer insulating layer (INL1) may surround at least a portion of the pixel electrodes (ET) and the common electrode (CE).
[0159] The second insulating layer (IL2) may be disposed on the first interlayer insulating layer (INL1). The second insulating layer (IL2) may surround the third electrodes (BDE3) and the third light-emitting elements (LE3). The second insulating layer (IL2) may surround at least a portion of the pixel electrodes (ET) (for example, the second pixel electrodes (ET2)) and the common electrode (CE).
[0160] A second interlayer insulating layer (INL2) may be disposed on the second insulating layer (IL2). The second interlayer insulating layer (INL2) may cover the third connection electrodes (CNE3). The second interlayer insulating layer (INL2) may surround at least a portion of the pixel electrodes (ET) and the common electrode (CE).
[0161] The third insulating layer (IL3) may be disposed on the second interlayer insulating layer (INL2). The third insulating layer (IL3) may surround the second electrodes (BDE2) and the second light-emitting elements (LE2). The third insulating layer (IL3) may surround at least a portion of the common electrode (CE).
[0162] The upper insulating layer (UIL) may be disposed on the third insulating layer (IL3). The upper insulating layer (UIL) is an insulating layer disposed on the uppermost portion of the light emitting element layer (LEL) and may cover the light emitting elements (LE), electrodes, and / or wires disposed on the light emitting element layer (LEL). For example, the upper insulating layer (UIL) may cover the second connection electrodes (CNE2) and the common electrode (CE).
[0163] Fig. 6 is a cross-sectional view showing a display device according to one embodiment. For example, Fig. 6 shows one embodiment of a cross-section of a portion of a display area (DA) corresponding to line X3-X3' of Fig. 3.
[0164] In describing the embodiments below, redundant descriptions of configurations substantially identical or similar to at least one embodiment described above will be omitted. For example, in describing the embodiments of FIGS. 3 and 6, detailed descriptions of configurations substantially identical or similar to the embodiments of FIGS. 2, 4, and 5 will be omitted.
[0165] Referring to FIGS. 3 and 6, in each pixel PX, the second pixel electrode ET2 may be connected to the second electrode BDE2 by penetrating the first light-emitting element LE1 and the third light-emitting element LE3. For example, each of the first light-emitting element LE1 and the third light-emitting element LE3 may include an opening that is wider than the area of the second pixel electrode ET2 at a location where the second pixel electrode ET2 is disposed. Similarly, the first electrode BDE1, the first connection electrode CNE1, the third electrode BDE3, and the third connection electrode CNE3 may be opened wider than the area of the second pixel electrode ET2 at a location where the second pixel electrode ET2 is disposed. The second pixel electrode ET2 may be disposed within the opening and may be surrounded by an insulating layer (for example, a portion of the second interlayer insulating layer INL2). Accordingly, electrical stability (e.g., insulation) between the first light-emitting element (LE1) and the third light-emitting element (LE3) and the second pixel electrode (ET2) can be secured.
[0166] In the same manner, in each pixel (PX), the third pixel electrode (ET3) may be connected to the third electrode (BDE3) by penetrating the first light-emitting element (LE1). For example, the first light-emitting element (LE1) may include an opening that is wider than the area of the third pixel electrode (ET3) at a location where the third pixel electrode (ET3) is disposed. Similarly, the first electrode (BDE1) and the first connection electrode (CNE1) may be opened wider than the area of the third pixel electrode (ET3) at a location where the third pixel electrode (ET3) is disposed. The third pixel electrode (ET3) may be disposed within the opening and may be surrounded by an insulating layer (for example, a portion of the first interlayer insulating layer (INL1)). Accordingly, electrical stability (for example, insulation) between the first light-emitting element (LE1) and the third pixel electrode (ET3) may be secured.
[0167] Fig. 7 is a cross-sectional view showing a display device according to one embodiment. Fig. 8 is a cross-sectional view showing a display device according to one embodiment. For example, Figs. 7 and 8 show examples of cross-sections of a portion of a display area (DA) corresponding to the line X1-X1' of Fig. 2. Figs. 7 and 8 show examples of different embodiments from the embodiments of Figs. 4 and 5 with respect to the third light-emitting element (LE3).
[0168] Referring to FIGS. 7 and 8, the third light-emitting element (LE3) may include inclined sidewalls. For example, the third light-emitting element (LE3) may have a cross-sectional shape of approximately a trapezoid. When the third light-emitting element (LE3) includes inclined sidewalls, an angle (θ3) formed by the sidewalls of the first semiconductor layer (SEM1), the light-emitting layer (EML), and the second semiconductor layer (SEM2) of the third light-emitting element (LE3) and the lower surface (or the third electrode (BDE3) and / or the lower substrate (BPL)) of the third light-emitting element (LE3) may fall within a range of less than 85° or greater than 95°. Each of the first contact electrode (CTE1) and the second contact electrode (CTE2) of the third light-emitting element (LE3) may include an inclined side wall, such as the first semiconductor layer (SEM1), the light-emitting layer (EML), and the second semiconductor layer (SEM2), or may include a vertical side wall that is substantially perpendicular to the lower surface of the third light-emitting element (LE3).
[0169] In one embodiment, as illustrated in FIG. 7, the sidewall of the first light-emitting element (LE1) and the sidewall of the third light-emitting element (LE3) may have substantially the same slope. For example, the sidewall of the first light-emitting element (LE1) and the sidewall of the third light-emitting element (LE3) may be inclined surfaces corresponding to an angle of 60°.
[0170] In another embodiment, as illustrated in FIG. 8, the sidewall of the first light-emitting element (LE1) and the sidewall of the third light-emitting element (LE3) may have different slopes. For example, the angle (θ3) that the sidewall of the third light-emitting element (LE3) forms with the lower surface of the third light-emitting element (LE3) may have a value between the angle (θ1) that the sidewall of the first light-emitting element (LE1) forms with the lower surface of the first light-emitting element (LE1) and the angle (θ2) that the sidewall of the second light-emitting element (LE2) forms with the lower surface of the second light-emitting element (LE2). For example, the sidewall of the first light-emitting element (LE1) and the sidewall of the third light-emitting element (LE3) may be inclined at angles of 60° and 75°, respectively, and the sidewall of the second light-emitting element (LE2) may be perpendicular to the lower surface. In addition, the slope of the side wall of the first light-emitting element (LE1) and the side wall of the third light-emitting element (LE3) may be varied according to embodiments.
[0171] In one embodiment, the third light-emitting element (LE3) may be manufactured to include a sidewall having a greater slope than the sidewall of the first light-emitting element (LE1) through a process such as a wet treatment process. In addition, the third light-emitting element (LE3) may be manufactured to include a sidewall having a smaller slope than the sidewall of the second light-emitting element (LE2) through a wet treatment process that is performed for a shorter time than the wet treatment process time of the second light-emitting element (LE2). Accordingly, the third light-emitting element (LE3) may have reduced or alleviated surface defects than the first light-emitting element (LE1) and may have a larger area than the second light-emitting element (LE2). However, the method for differentiating the shapes or sidewall slopes of the first light-emitting element (LE1), the second light-emitting element (LE2), and the third light-emitting element (LE3) is not limited thereto. Additionally, the relative sizes (e.g., areas) of the first light-emitting element (LE1), the second light-emitting element (LE2), and the third light-emitting element (LE3) are not determined solely by the shape of the side walls, and may vary depending on the embodiments.
[0172] Fig. 9 is a cross-sectional view showing a display device according to one embodiment. Fig. 10 is a cross-sectional view showing a display device according to one embodiment. Fig. 11 is a cross-sectional view showing a display device according to one embodiment. For example, Figs. 9, 10, and 11 show examples of cross-sections of a portion of a display area (DA) corresponding to the line X1-X1' of Fig. 2. Figs. 9, 10, and 11 show examples that are different from the embodiments of Figs. 4, 7, and 8, respectively, in terms of the arrangement direction or cross-sectional shape of light-emitting elements (LE).
[0173] Referring to FIGS. 9, 10, and 11, the light emitting elements (LE) including inclined sidewalls may have a cross-sectional shape of a reverse taper. For example, the first light emitting elements (LE1) and / or the third light emitting elements (LE3) may be bonded or placed on the lower substrate (BPL) such that the first contact electrode (CTE1) (or the first semiconductor layer (SEM1)) is connected to each electrode (BDE) after being etched to include inclined sidewalls before being bonded on the lower substrate (BPL).
[0174] In one embodiment, the first semiconductor layer (SEM1) of each of the light-emitting elements (LE) may be a p-type semiconductor layer and may be electrically connected to the first pixel electrode (ET1), the second pixel electrode (ET2), or the third pixel electrode (ET3). In addition, the second semiconductor layer (SEM2) of each of the light-emitting elements (LE) may be an n-type semiconductor layer and may be electrically connected to the common electrode (CE). In this case, the display device (10) may be formed with a common cathode structure.
[0175] In another embodiment, the first semiconductor layer (SEM1) of each of the light emitting elements (LE) may be an n-type semiconductor layer and may be electrically connected to the first pixel electrode (ET1), the second pixel electrode (ET2), or the third pixel electrode (ET3). In addition, the second semiconductor layer (SEM2) of each of the light emitting elements (LE) may be a p-type semiconductor layer and may be electrically connected to the common electrode (CE). In this case, the display device (10) may be formed with a common anode structure.
[0176] FIGS. 12 to 16 are cross-sectional views showing a method of manufacturing a display device including light-emitting elements according to one embodiment. For example, FIGS. 12 to 16 show steps of forming light-emitting elements (LE) including inclined side walls or vertical side walls among the manufacturing steps of a display device (10) including light-emitting elements (LE) according to one embodiment.
[0177] Referring to FIG. 12, an epi layer (EPIL) can be formed or placed on a base substrate (BL). In one embodiment, a conductive layer (CDL) for forming a contact electrode (CTE) (e.g., a first contact electrode (CTE1) or a second contact electrode (CTE2)) can be further formed on the epi layer (EPIL).
[0178] The base substrate (BL) may be a semiconductor substrate for forming an epitaxial layer (EPIL), or a lower substrate (BPL) to which the epitaxial layer (EPIL) is bonded or transferred. For example, the epitaxial layer (EPIL) may be etched on a semiconductor substrate on which the epitaxial layer (EPIL) is grown, or the epitaxial layer (EPIL) may be etched after being placed on the lower substrate (BPL) by a bonding process (e.g., a wafer-to-wafer bonding process).
[0179] In one embodiment, when the base substrate (BL) is a semiconductor substrate for forming an epi layer (EPIL), the base substrate (BL) may be a growth substrate suitable for epitaxial growth. For example, the base substrate (BL) may include a material such as GaAs, silicon (Si), sapphire, SiC, GaN, or ZnO. As an example, the base substrate (BL) may be a silicon or sapphire substrate. As long as the epitaxial growth of the epi layer (EPIL) for manufacturing the light emitting elements (LE) can be smoothly performed, the type or material of the base substrate (BL) is not particularly limited.
[0180] In another embodiment, when the base substrate (BL) is the lower substrate (BPL) of the display device (10) (or a substrate including a plurality of cell regions for forming a plurality of display devices (10) at the same time), at least one insulating layer, pixel electrodes (ET) and / or a common electrode (CE) to be connected to the light emitting elements (LE), electrodes (BDE) arranged under the light emitting elements (LE) (or a bonding layer for forming the electrodes (BDE)), and / or first contact electrodes (CTE1) of the light emitting elements (LE) (or a conductive layer for forming the first contact electrodes (CTE1), etc. may be arranged between the lower substrate (BPL) and the epi layer (EPIL).
[0181] The epilayer (EPIL) may include semiconductor layers for forming first semiconductor layers (SEM1), light-emitting layers (EML) and second semiconductor layers (SEM2) of the first light-emitting elements (LE1), second light-emitting elements (LE2) or third light-emitting elements (LE3). For example, the epilayer (EPIL) may be formed as a multilayer including a first epilayer, a second epilayer and a third epilayer for forming the first semiconductor layers (SEM1), light-emitting layers (EML) and second semiconductor layers (SEM2) of the first light-emitting elements (LE1), second light-emitting elements (LE2) or third light-emitting elements (LE3).
[0182] The conductive layer (CDL) may include a conductive material for forming first contact electrodes (CTE1) or second contact electrodes (CTE2) of the first light-emitting elements (LE1), second light-emitting elements (LE2), or third light-emitting elements (LE3). Depending on the arrangement direction of the light-emitting elements (LE) arranged on the light-emitting element layer (LEL), the contact electrodes (for example, the contact electrodes (CTE) of FIG. 14) formed from the conductive layer (CDL) may be first contact electrodes (CTE1) arranged on each electrode (BDE) or second contact electrodes (CTE2) connected to each connection electrode (CNE).
[0183] Referring to FIGS. 13 to 15, a mask (MK) is disposed on a conductive layer (CDL), and by etching the epi layer (EPIL) and the conductive layer (CDL), semiconductor layers (SEM) and contact electrodes (CTE) of the first light-emitting elements (LE1), the second light-emitting elements (LE2), or the third light-emitting elements (LE3) can be formed. The mask (MK) may have a size and shape corresponding to the size and shape of the light-emitting elements (LE) to be formed. In one embodiment, the mask (MK) may include, but is not limited to, a hard mask (HM) and a photoresist pattern (PR). In one embodiment, the epi layer (EPIL) and the conductive layer (CDL) can be etched by a dry etching process using the mask (MK). The mask (MK) can be removed after the etching of the epi layer (EPIL) and the conductive layer (CDL) is completed.
[0184] In one embodiment, light emitting elements (LE) including slanted sidewalls, such as the first light emitting elements (LE1), may be manufactured or formed in an etched form using a mask (MK). In one embodiment, light emitting elements (LE) including vertical sidewalls, such as the second light emitting elements (LE2), may be manufactured or formed through an additional process.
[0185] Referring to FIG. 16, light emitting elements (LE) including vertical sidewalls can be manufactured or formed into a form including substantially vertical sidewalls through an additional process such as a wet treatment. Accordingly, the surface (e.g., the side) of the light emitting elements (LE) damaged by exposure to plasma during an etching process of an epilayer (EPIL) can be repaired, and surface defects of the light emitting elements (LE) can be reduced.
[0186] In one embodiment, when the light emitting elements (LE) are etched on a semiconductor substrate on which an epi layer (EPIL) is formed, the light emitting elements (LE) may be placed (e.g., bonded) on a lower substrate (BPL), and a pixel process for connecting the light emitting elements (LE) to pixel electrodes (ET) and a common electrode (CE) may be performed. In another embodiment, when the light emitting elements (LE) are etched on the lower substrate (BPL), a subsequent pixel process for forming electrodes connected to the light emitting elements (LE) (e.g., connection electrodes (CNE) and / or the common electrode (CE)) or an insulating layer covering the light emitting elements (LE) may be performed. Accordingly, the display device (10) according to the embodiments described above may be manufactured.
[0187] When the first light-emitting elements (LE1), the second light-emitting elements (LE2), and the third light-emitting elements (LE3) are arranged in different layers on the lower substrate (BPL), the respective pixel processes (e.g., a bonding process and / or an etching process) for forming the first light-emitting elements (LE1), the second light-emitting elements (LE2), and the third light-emitting elements (LE3) may be performed sequentially or continuously. For example, after the pixel process for arranging or forming the first light-emitting elements (LE1) on the lower substrate (BPL) is performed, the pixel process for arranging or forming the third light-emitting elements (LE3) on the first light-emitting elements (LE1) may be performed. In addition, after the third light-emitting elements (LE3) are arranged or formed on the first light-emitting elements (LE1), the pixel process for arranging or forming the second light-emitting elements (LE2) on the third light-emitting elements (LE3) may be performed sequentially or continuously.
[0188] As described above, according to the display device (10) and the manufacturing method thereof according to the embodiments, the light emitting elements (LE) that are arranged in different layers in the light emitting element layer (LEL) and emit light of different colors may have differentiated shapes or structures. For example, among the first light emitting element (LE1), the second light emitting element (LE2), and the third light emitting element (LE3), the first light emitting element (LE1), which is relatively insensitive to surface defects, may be formed in a shape that includes inclined sidewalls, thereby preventing or reducing area or volume loss of the light emitting layer (EML). In addition, among the first light emitting element (LE1), the second light emitting element (LE2), and the third light emitting element (LE3), the second light emitting element (LE2), which is relatively sensitive to surface defects, may undergo an additional process such as a wet treatment to reduce surface defects, thereby forming a shape that includes vertical sidewalls. The third light emitting element (LE3) may include inclined sidewalls or vertical sidewalls.
[0189] According to embodiments, the shape or structure of the light-emitting elements (LE) can be differentiated according to the characteristics of the light-emitting elements (LE). As a result, the efficiency of the light-emitting elements (LE) can be improved or optimized, and the light efficiency of the light-emitting elements (LE) and the pixels (PX) including the light-emitting elements (LE) can be improved.
[0190] FIG. 17 is a drawing showing an electronic device including a display device according to one embodiment, for example, a smart watch.
[0191] Referring to FIG. 17, a display device (10_1) according to one embodiment can be applied to an electronic device such as a smart watch (1000_1), which is one of smart devices.
[0192] FIGS. 18 and 19 are drawings showing an electronic device including a display device according to one embodiment, for example, a head-mounted display device.
[0193] Referring to FIGS. 18 and 19, an electronic device according to one embodiment, for example, a head-mounted display device (1000_2), may be a virtual reality device. The head-mounted display device (1000_2) includes a first display device (10_2), a second display device (10_3), a display device storage unit (1100), a storage unit cover (1200), a first eyepiece lens (1210), a second eyepiece lens (1220), a head-mounted band (1300), a middle frame (1400), a first optical member (1510), a second optical member (1520), and a control circuit board (1600).
[0194] The first display device (10_2) provides an image to the user's left eye, and the second display device (10_3) provides an image to the user's right eye.
[0195] The first optical member (1510) may be positioned between the first display device (10_2) and the first eyepiece lens (1210). The second optical member (1520) may be positioned between the second display device (10_3) and the second eyepiece lens (1220). Each of the first optical member (1510) and the second optical member (1520) may include at least one convex lens.
[0196] The middle frame (1400) is disposed between the first display device (10_2) and the control circuit board (1600), and may be disposed between the second display device (10_3) and the control circuit board (1600). The middle frame (1400) serves to support and fix the first display device (10_2), the second display device (10_3), and the control circuit board (1600).
[0197] The control circuit board (1600) may be placed between the middle frame (1400) and the display device housing (1100). The control circuit board (1600) may be connected to the first display device (10_2) and the second display device (10_3) via connectors. The control circuit board (1600) may convert an image source input from the outside into video data and transmit the video data to the first display device (10_2) and the second display device (10_3) via the connectors.
[0198] The control circuit board (1600) can transmit video data corresponding to a left-eye image optimized for the user's left eye to the first display device (10_2) and video data corresponding to a right-eye image optimized for the user's right eye to the second display device (10_3). Alternatively, the control circuit board (1600) can transmit the same video data to the first display device (10_2) and the second display device (10_3).
[0199] The display device storage unit (1100) serves to store the first display device (10_2), the second display device (10_3), the middle frame (1400), the first optical member (1510), the second optical member (1520), and the control circuit board (1600). The storage unit cover (1200) is arranged to cover an open surface of the display device storage unit (1100). The storage unit cover (1200) may include a first eyepiece (1210) for the user's left eye and a second eyepiece (1220) for the user's right eye. In FIGS. 18 and 19 , the first eyepiece (1210) and the second eyepiece (1220) are separately arranged, but the embodiment of the present specification is not limited thereto. The first eyepiece (1210) and the second eyepiece (1220) may be combined into one.
[0200] The first eyepiece (1210) can be aligned with the first display device (10_2) and the first optical member (1510), and the second eyepiece (1220) can be aligned with the second display device (10_3) and the second optical member (1520). Accordingly, the user can view the image of the first display device (10_2) enlarged into a virtual image by the first optical member (1510) through the first eyepiece (1210), and can view the image of the second display device (10_3) enlarged into a virtual image by the second optical member (1520) through the second eyepiece (1220).
[0201] The head-mounted band (1300) serves to secure the display device storage unit (1100) to the user's head so that the first eyepiece (1210) and the second eyepiece (1220) of the storage unit cover (1200) can be positioned respectively for the user's left and right eyes. If the display device storage unit (1100) is implemented in a lightweight and compact form, the head-mounted display device (1000_2) may be provided with a glasses frame as shown in FIG. 20 instead of the head-mounted band (1300).
[0202] In addition, the head-mounted display device (1000_2) may further include a battery for supplying power, an external memory slot for storing external memory, and an external connection port and wireless communication module for receiving a video source. The external connection port may be a USB (universe serial bus) terminal, a display port, or an HDMI (high-definition multimedia interface) terminal, and the wireless communication module may be a 5G communication module, a 4G communication module, a Wi-Fi module, or a Bluetooth module.
[0203] FIG. 20 is a drawing showing an electronic device including a display device according to one embodiment, for example, a head-mounted display device.
[0204] Referring to FIG. 20, an electronic device according to one embodiment, for example, a head-mounted display device (1000_3), may be a device in the form of glasses. The head-mounted display device (1000_3) according to one embodiment may include a display device (10_4), a left-eye lens (10a), a right-eye lens (10b), a support frame (20), eyeglass frame legs (30a, 30b), a reflective member (40), and a display device storage unit (50).
[0205] In FIG. 20, the head-mounted display device (1000_3) is expected to be a glasses-type display device including glasses frame legs (30a, 30b), but the embodiments are not limited thereto. For example, the head-mounted display device (1000_3) can be applied in various forms to other electronic devices.
[0206] The display device housing (50) may include a display device (10_4) and a reflective member (40) (or an optical path conversion member). An image displayed on the display device (10_4) may be reflected by the reflective member (40) and provided to the user's right eye through the right eye lens (10b). As a result, the user may view an augmented reality image in which a virtual image displayed on the display device (10_4) through the right eye and a real image seen through the right eye lens (10b) are combined. In one embodiment, the display device housing (50) may further include an optical member disposed between the display device (10_4) and the reflective member (40). An image displayed on the display device (10_4) may be magnified by the optical member, and an optical path may be converted by the reflective member (40) and provided to the user's right eye through the right eye lens (10b).
[0207] In FIG. 20, the display device housing (50) is exemplified as being arranged at the right end of the support frame (20), but the embodiment of the present specification is not limited thereto. For example, the display device housing (50) may be arranged at the left end of the support frame (20), in which case the image displayed on the display device (10_4) may be reflected by the reflective member (40) and provided to the user's left eye through the left eye lens (10a). As a result, the user can view the image displayed on the display device (10_4) through the left eye. Alternatively, the display device housing (50) may be arranged at both the left end and the right end of the support frame (20), in which case the user can view the image displayed on the display device (10_4) through both the left eye and the right eye.
[0208] FIG. 21 is a diagram showing an electronic device including display devices according to one embodiment, for example, an automobile instrument panel and center fascia. FIG. 21 shows an automobile as an example of an electronic device to which display devices (10_a, 10_b, 10_c, 10_d, 10_e) according to one embodiment are applied.
[0209] Referring to FIG. 21, display devices (10_a, 10_b, 10_c) according to one embodiment may be applied to a dashboard of a vehicle, a center fascia of a vehicle, or a CID (Center Information Display) placed on a dashboard of a vehicle. In addition, display devices (10_d, 10_e) according to one embodiment may be applied to a room mirror display that replaces a side mirror of a vehicle.
[0210] FIG. 22 is a drawing showing an electronic device including a display device according to one embodiment, for example, a transparent display device.
[0211] Referring to FIG. 22, a display device (10_5) according to one embodiment can be applied to an electronic device such as a transparent display device. The transparent display device can display an image (IM) and transmit light at the same time. Therefore, a user positioned at the front of the transparent display device can not only view the image (IM) displayed on the display device (10_5), but also view an object (RS) or a background positioned at the back of the transparent display device. When the display device (10_5) is applied to a transparent display device, the substrate of the display device (10_5) can include a light-transmitting portion that can transmit light or can be formed of a material that can transmit light.
[0212] Although embodiments of the present invention have been described with reference to the attached drawings, those skilled in the art will appreciate that the present invention can be implemented in other specific forms without altering the technical spirit or essential characteristics of the present invention. Therefore, the embodiments described above should be understood to be illustrative in all respects and not restrictive.
Claims
1. Lower substrate; A first electrode disposed on the lower substrate; A first light-emitting element disposed on the first electrode and including a first side wall and a first lower surface; a second electrode disposed on the first light-emitting element; and A second light-emitting element is disposed on the second electrode and includes a second side wall and a second lower surface, A display device, wherein a first angle formed by the first side wall and the first lower surface is different from a second angle formed by the second side wall and the second lower surface.
2. In paragraph 1, A display device wherein the first electrode, the first light-emitting element, the second electrode, and the second light-emitting element overlap each other when viewed on a plane.
3. In paragraph 1, One of the first and second side walls comprises an inclined side wall having a taper angle, A display device, wherein the remaining one of the first and second side walls comprises a vertical side wall.
4. In paragraph 3, Among the first and second angles, the angle formed by one of the first and second side walls and one of the first and second lower surfaces is less than 85° or greater than 95°, A display device, wherein, among the first and second angles, an angle formed by the remaining one of the first and second side walls and the remaining one of the first and second lower surfaces is in a range of 85° to 95°.
5. In paragraph 3, The above first light-emitting element emits red light, The second light-emitting element emits blue light or green light, The first side wall includes the inclined side wall, A display device, wherein the second side wall comprises the vertical side wall.
6. In paragraph 3, The first light-emitting element and the second light-emitting element each include light-emitting layers containing indium in different contents, The indium content of the light-emitting layer of the first light-emitting element is higher than the indium content of the light-emitting layer of the second light-emitting element, The first side wall includes the inclined side wall, A display device, wherein the second side wall comprises the vertical side wall.
7. In paragraph 3, A display device, wherein, when viewed on a plane, a light emitting element among the first and second light emitting elements, which includes one of the first and second side walls, is larger than a light emitting element among the first and second light emitting elements, which includes the other one of the first and second side walls.
8. In paragraph 1, a third electrode disposed between the first light-emitting element and the second electrode; and Further comprising a third light-emitting element disposed on the third electrode and disposed between the first light-emitting element and the second light-emitting element, A display device, wherein the third light-emitting element includes a third side wall having a third angle that is the same as the first angle or the second angle.
9. In paragraph 1, a third electrode disposed between the first light-emitting element and the second electrode; and Further comprising a third light-emitting element disposed on the third electrode and disposed between the first light-emitting element and the second light-emitting element, A display device wherein the first angle, the second angle, and the third angle formed by the third lower surface and the third side wall of the third light-emitting element are different from each other.
10. In paragraph 9, A display device wherein the third angle has a value between the first angle and the second angle.
11. Lower substrate; and It is arranged on the lower substrate and includes a plurality of light-emitting elements that overlap each other when viewed on a plane, The above plurality of light emitting elements are, A first light-emitting element including a first side wall and a first lower surface; and A second light-emitting element including a second side wall and a second lower surface, A display device, wherein a first angle formed by the first side wall and the first lower surface is different from a second angle formed by the second side wall and the second lower surface.
12. In paragraph 11, The first side wall comprises an inclined side wall inclined at a first angle of less than 85° or greater than 95° with respect to the first lower surface, A display device, wherein the second side wall comprises a vertical side wall having the second angle in the range of 85° to 95° with respect to the second lower surface.
13. In paragraph 11, A display device further comprising a plurality of electrodes arranged below each of the plurality of light-emitting elements and overlapping each other when viewed on a plane.
14. In paragraph 13, A plurality of pixel electrodes disposed between the lower substrate and the plurality of electrodes and individually connected to the plurality of electrodes; connecting electrodes arranged on top of each of the plurality of light-emitting elements; and A display device further comprising a common electrode electrically connected to the above connecting electrodes.
15. In paragraph 11, A display device wherein the first light-emitting element and the second light-emitting element emit light of different colors.
16. Including a display device, said display device including: lower substrate; A first electrode disposed on the lower substrate; A first light-emitting element disposed on the first electrode and including a first side wall and a first lower surface; a second electrode disposed on the first light-emitting element; and A second light-emitting element is disposed on the second electrode and includes a second side wall and a second lower surface, An electronic device wherein a first angle formed by the first side wall and the first lower surface is different from a second angle formed by the second side wall and the second lower surface.
17. In paragraph 16, An electronic device wherein the first electrode, the first light-emitting element, the second electrode, and the second light-emitting element overlap each other when viewed on a plane.
18. In paragraph 16, One of the first and second side walls comprises an inclined side wall having a taper angle, An electronic device, wherein the remaining one of the first and second side walls comprises a vertical side wall.
19. In paragraph 18, Among the first and second angles, the angle formed by one of the first and second side walls and one of the first and second lower surfaces is less than 85° or greater than 95°, An electronic device, wherein, among the first and second angles, an angle formed by the remaining one of the first and second side walls and the remaining one of the first and second lower surfaces is in a range of 85° to 95°.
20. In paragraph 18, The above first light-emitting element emits red light, The second light-emitting element emits blue light or green light, The first side wall includes the inclined side wall, An electronic device wherein the second side wall comprises the vertical side wall.
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