Semiconductor device

Abstract

A technology disclosed in the description of the present application is for suppressing the extent of a possible explosion. A semiconductor device related to the technology disclosed in the description of the present application comprises: a semiconductor chip housed in a case; and a silicone gel filled in the case. The silicone gel has, at a position corresponding to the semiconductor chip in plan view, at least one recess portion recessed from an upper surface of the silicone gel, and at least one side surface of the recess portion is provided at a position corresponding to an end portion of the semiconductor chip in plan view.

Description

Semiconductor Devices

[0001] The technology disclosed in this specification relates to semiconductor technology.

[0002] 2. Description of the Related Art Conventional semiconductor devices include, for example, a semiconductor chip that is wired by wire bonding or the like and housed in a case, and the inside of the case is sealed with silicone gel or the like (see, for example, Patent Document 1).

[0003] Japanese Patent Application Laid-Open No. 2003-282750

[0004] During operation of a semiconductor device, high heat may be generated due to a short circuit, etc. In particular, when the semiconductor chip inside the case is sealed with silicone gel, the heat generated inside may vaporize the silicone gel, resulting in an explosion.

[0005] The technology disclosed in the present specification has been made in consideration of the problems described above, and is a technology for suppressing the degree of explosion that may occur.

[0006] A semiconductor device that is a first aspect of the technology disclosed in the present specification comprises a semiconductor chip housed in a case and a silicone gel filled in the case, the silicone gel having at least one recess recessed from the top surface of the silicone gel at a position corresponding to the semiconductor chip in a planar view, and at least one side surface of the recess is provided at a position corresponding to an end of the semiconductor chip in a planar view.

[0007] According to at least the first aspect of the technology disclosed in the present specification, it is possible to reduce the amount of silicone gel that vaporizes due to heat generated by the semiconductor chip, thereby suppressing the degree of explosion that may occur due to an increase in the internal pressure of the silicone gel.

[0008] Furthermore, objects, features, aspects, and advantages associated with the technology disclosed herein will become more apparent from the detailed description and accompanying drawings set forth below.

[0009] FIG. 1 is a cross-sectional view showing an example of the configuration of a semiconductor device; FIG. 2 is a cross-sectional view showing an example of the configuration of a semiconductor device according to an embodiment; FIG. 3 is a plan view showing an example of the configuration of a semiconductor device according to an embodiment; FIG. 4 is a cross-sectional view showing a modified example of the configuration of a semiconductor device according to an embodiment; FIG. 5 is a cross-sectional view showing a modified example of the configuration of a semiconductor device according to an embodiment; FIG. 6 is a cross-sectional view showing a modified example of the configuration of a semiconductor device according to an embodiment; FIG. 7 is a cross-sectional view showing an example of the configuration of a semiconductor device according to an embodiment;

[0010] Hereinafter, embodiments will be described with reference to the accompanying drawings. In the following embodiments, detailed features are shown for the purpose of explaining the technology, but these are merely examples and are not necessarily essential features for enabling the embodiments to be implemented.

[0011] The drawings are schematic, and for the sake of convenience, components may be omitted or simplified as appropriate. The relative sizes and positions of components shown in different drawings are not necessarily accurately depicted and may be changed as appropriate. Hatching may also be used in drawings such as plan views that are not cross-sectional views to facilitate understanding of the embodiments.

[0012] In the following description, the same components are denoted by the same reference numerals, and their names and functions are also the same. Therefore, detailed descriptions of them may be omitted to avoid duplication.

[0013] Furthermore, in the description given in this specification, when a certain component is described as "comprising," "including," or "having," unless otherwise specified, this is not an exclusive expression that excludes the presence of other components.

[0014] Furthermore, in the description of this specification, even if ordinal numbers such as "first" or "second" are used, these terms are used for convenience to make it easier to understand the contents of the embodiments, and the contents of the embodiments are not limited to the order that may result from these ordinal numbers.

[0015] Furthermore, in the description provided in this specification, terms that indicate specific positions or directions, such as "top," "bottom," "left," "right," "side," "bottom," "front," or "back," may be used, but these terms are used for convenience to facilitate understanding of the contents of the embodiments and have no relation to the positions or directions when the embodiments are actually implemented.

[0016] Furthermore, in the description of the present specification, when "the upper surface of ..." or "the lower surface of ..." is used, it is intended to include not only the upper surface or lower surface of the target component itself, but also a state in which another component is formed on the upper surface or lower surface of the target component. For example, when it is described as "B provided on the upper surface of A," it does not preclude the interposition of another component "C" between A and B.

[0017] First Embodiment A semiconductor device according to the present embodiment will be described below. For convenience of explanation, first, the configuration of a semiconductor device known to the inventor will be described.

[0018] <Configuration of Semiconductor Device> FIG. 1 is a cross-sectional view showing an example of the configuration of a semiconductor device. As shown in FIG. 1 , the semiconductor device 10 includes a base plate 12, a case 14 attached to the upper surface of the base plate 12, an insulating substrate 16 arranged on the upper surface of the base plate 12 and surrounded by the case 14 in a plan view, an electrode pattern 16 a formed on the upper surface of the insulating substrate 16, an electrode pattern 16 b formed on the lower surface of the insulating substrate 16, a bonding material 18 such as solder that bonds the lower surface of the electrode pattern 16 b to the upper surface of the base plate 12, a semiconductor chip 22 arranged on the upper surface of the electrode pattern 16 a (collector) via a bonding material 20 such as solder, metal wiring 24 that connects the electrode on the upper surface of the semiconductor chip 22 to the electrode pattern 16 a (emitter) (spaced apart from the electrode on the lower surface of the semiconductor chip 22), a metal electrode 26 connected to the electrode pattern 16 a (emitter, gate) and extending outward from the upper end of the case 14, and a silicone gel 28 that fills the inside of the case 14 and at least partially covers the semiconductor chip 22. Moreover, above the silicone gel 28 filled in the case 14, a case cover 14a is disposed, which is opened when the silicone gel 28 is injected.

[0019] The semiconductor chip 22 generally has electrodes on its upper and lower surfaces. For example, in the case of an insulated gate bipolar transistor (IGBT), the electrode on the upper surface (upper electrode) is the emitter electrode, and the electrode on the lower surface (lower electrode) is the collector electrode.

[0020] The upper surface electrodes of the semiconductor chip 22 are electrically connected to the electrode pattern 16a on the upper surface of the insulating substrate 16 by metal wiring 24. The metal wiring 24 may be, for example, a wire wiring or ribbon wiring whose main material is aluminum or copper.

[0021] If a short circuit occurs due to a malfunction of the semiconductor device 10 or an error in the control of the semiconductor device 10, a large short-circuit current flows through the semiconductor device 10.

[0022] The semiconductor chip 22 in the semiconductor device 10 generates heat due to the short-circuit current, and this heat propagates to the silicone gel 28 adjacent to the semiconductor chip 22. This causes the silicone gel 28 to vaporize due to the instantaneous temperature rise at the time of the short circuit, and the rapid volume expansion caused by the vaporization increases the internal pressure of the silicone gel 28, which may cause a major explosion.

[0023] Therefore, in order to suppress the degree of explosion, the amount and height of the silicone gel 28 located near the semiconductor chip 22, which is a heat generating element, are important.

[0024] In this embodiment, a structure is shown in which the amount of silicone gel 28 filled in the vicinity of the semiconductor chip 22 is reduced.

[0025] Fig. 2 is a cross-sectional view showing an example of the configuration of a semiconductor device according to this embodiment. Fig. 3 is a plan view showing an example of the configuration of a semiconductor device according to this embodiment. As shown in Figs. 2 and 3, semiconductor device 100 includes base plate 12, case 14, insulating substrate 16, electrode pattern 16a, electrode pattern 16b, bonding material 18, semiconductor chip 22, metal wiring 24, metal electrodes 26, and silicone gel 28a filled inside case 14 so as to cover at least a portion of semiconductor chip 22. In addition, case cover 14a, which is opened when silicone gel 28a is injected, is disposed above silicone gel 28a filled in case 14.

[0026] 2, the filling height X2 of the silicone gel 28a near the semiconductor chip 22 (the area overlapping with the semiconductor chip 22 and its surroundings in a plan view) is lower than the filling height X1 of other areas (the area away from the semiconductor chip 22 in a plan view). The lower filling height forms a recess 128 recessed from the top surface of the silicone gel 28a. The side of the recess 128 is provided at a position corresponding to the edge of the semiconductor chip 22 in a plan view (the area overlapping with the semiconductor chip 22 and its surroundings in a plan view).

[0027] This structure reduces the amount of silicone gel 28a that evaporates due to the heat generated by the semiconductor chip 22. It also forms a path for the internal pressure of the silicone gel 28a to escape to the outside, thereby suppressing the degree of explosion that may occur due to an increase in the internal pressure of the silicone gel 28.

[0028] The above-described structure (specifically, the recess 128 where the filling height of the silicone gel 28a is reduced) is effectively formed in a location where the silicone gel 28a evaporates, in other words, a location where the temperature rise is large. In the example of Figures 2 and 3, it is formed in the vicinity of the position where the semiconductor chip 22 is disposed.

[0029] <Regarding First Modification> Figure 4 is a plan view showing a modification of the configuration of a semiconductor device according to the present embodiment. As shown in the example of Figure 4, in a semiconductor device 100b, a recess 130 in the silicone gel 28b is formed at a position sandwiched between multiple semiconductor chips 22 in a plan view. This is a location where heat generated from the multiple semiconductor chips 22 interferes with the silicone gel 28, and where the internal pressure of the silicone gel 28 may increase, potentially causing an explosion, so it is desirable to form the recess 130. The recess 130 may be formed around the semiconductor chip 22 in a plan view.

[0030] 5 is a cross-sectional view showing a modified example of the configuration of a semiconductor device according to the present embodiment. As shown in the example of FIG. 5, in a semiconductor device 100c, a plurality of recesses 132 in the silicone gel 28c are formed in the vicinity of the semiconductor chip 22 (in a range overlapping with the semiconductor chip 22 in a plan view and its surroundings). At least one of the plurality of recesses 132 may be formed in a position sandwiched between a plurality of semiconductor chips 22.

[0031] 6 is a cross-sectional view showing a modification of the configuration of the semiconductor device according to the present embodiment. As shown in the example of FIG. 6, in a semiconductor device 100d, a plurality of recesses 134 in the silicone gel 28d are formed in the vicinity of the semiconductor chip 22 (in a range overlapping with the semiconductor chip 22 in a plan view and its surroundings). At least one of the plurality of recesses 134 may be formed in a position sandwiched between a plurality of semiconductor chips 22.

[0032] The shape of the bottom surface of the recess 134 is curved, unlike the planar shape of the bottom surface of the recess 132 shown in FIG.

[0033] Although Fig. 6 shows a case where a plurality of recesses 134 are formed, recess 134 may be a single recess like recess 128 in Fig. 2. In other words, the bottom surface of recess 128 in Fig. 2 may have a curved shape.

[0034] 7 is a cross-sectional view showing a modification of the configuration of the semiconductor device according to the present embodiment. As shown in the example of FIG. 7, in a semiconductor device 100e, a plurality of recesses 136 in the silicone gel 28e are formed in the vicinity of the semiconductor chip 22 (in a range overlapping with the semiconductor chip 22 in a plan view and its surroundings). At least one of the plurality of recesses 136 may be formed in a position sandwiched between a plurality of semiconductor chips 22.

[0035] The shape of the bottom surface of the recess 136 differs from the planar shape of the bottom surface of the recess 132 shown in FIG. 5, and has a shape in which the width becomes narrower as the depth increases.

[0036] 7 shows a case where a plurality of recesses 136 are formed, recess 136 may be a single recess like recess 128 in Fig. 2. In other words, the bottom surface of recess 128 in Fig. 2 may have a shape in which the width becomes narrower as the depth increases.

[0037] Second Embodiment A semiconductor device according to this embodiment will be described. In the following description, components similar to those described in the above embodiments will be denoted by the same reference numerals, and detailed descriptions thereof will be omitted as appropriate.

[0038] <Configuration of the Semiconductor Device> Fig. 8 is a cross-sectional view showing an example of the configuration of a semiconductor device according to the present embodiment. As shown in Fig. 8, the semiconductor device 100f includes a base plate 12, a case 14, an insulating substrate 16, an electrode pattern 16a, an electrode pattern 16b, a bonding material 18, a semiconductor chip 22 disposed on the upper surface of the electrode pattern 16a (collector) via a bonding material 20 such as solder, metal wiring 24, a metal electrode 26, and a silicone gel 28f filled inside the case 14 and covering the semiconductor chip 22. In addition, a case cover 14a is disposed above the silicone gel 28f filled in the case 14, and is opened when the silicone gel 28f is poured.

[0039] 8, the fill height X2 of the silicone gel 28f near the semiconductor chip 22 (the area overlapping the semiconductor chip 22 in a plan view and its surroundings) is lower than the fill height X1 of other areas (the area spaced apart from the semiconductor chip 22 in a plan view). The lower fill height results in a recess 138 being formed on the upper surface of the silicone gel 28f. Here, the fill height X2 (i.e., the bottom surface of the recess 138) is lower than the height X3 of the highest portion of the metal wiring 24. In other words, the upper end of the metal wiring 24 is exposed from the silicone gel 28f. The fill height X2 (i.e., the bottom surface of the recess 138) need only be equal to or less than the height X3.

[0040] With this structure, the amount of silicone gel 28f placed above the semiconductor chip 22 is reduced, which reduces the degree of explosion that may occur due to heat generated by the semiconductor chip 22 and also reduces the impact on surrounding equipment.

[0041] Third Embodiment A semiconductor device according to this embodiment will be described. In the following description, components similar to those described in the above embodiments will be denoted by the same reference numerals, and detailed descriptions thereof will be omitted as appropriate.

[0042] <Regarding the Configuration of the Semiconductor Device> Fig. 9 is a cross-sectional view showing an example of the configuration of a semiconductor device according to the present embodiment. As shown in Fig. 9, a semiconductor device 100g includes an insulating substrate 16, an electrode pattern 16a, a semiconductor chip 22 disposed on the upper surface of the electrode pattern 16a (collector) via a bonding material 20 such as solder, metal wiring 24 connected to the electrodes on the upper surface of the semiconductor chip 22 by connection portions 24a, and a silicone gel 28g filling and covering the semiconductor chip 22. Note that the semiconductor device 100g shown in Fig. 9 has a configuration in which, for example, only the silicone gel 28f of the semiconductor device 100f shown in Fig. 8 has been replaced with the silicone gel 28g, and Fig. 9 shows an enlarged view of only a portion of the configuration shown in Fig. 8.

[0043] 9, the silicone gel 28g has a fill height X2 near the semiconductor chip 22 (the area overlapping the semiconductor chip 22 and its surroundings in a plan view) that is lower than the fill height X1 in other areas (the area spaced apart from the semiconductor chip 22 in a plan view). The lower fill height results in a recess 140 being formed on the upper surface of the silicone gel 28g. Here, the fill height X2 is lower than the height X3 of the highest portion of the metal wiring 24. In other words, the upper end of the metal wiring 24 is exposed from the silicone gel 28g.

[0044] Furthermore, the distance T1 between the bottom surface of the recess 140 and the upper surface of the semiconductor chip 22 is 5 mm or less.

[0045] This structure reduces the amount of silicone gel 28g placed above the semiconductor chip 22, thereby reducing the severity of an explosion that may occur due to heat generated by the semiconductor chip 22 and also reducing the impact on peripheral equipment. In order to reduce the severity of an explosion of the semiconductor device 100g, it is preferable that the amount of silicone gel 28g be as small as possible.

[0046] <Regarding First Modification> Fig. 10 is a plan view showing a modification of the configuration of a semiconductor device according to the present embodiment. As shown in Fig. 10, a semiconductor device 100h includes an insulating substrate 16, an electrode pattern 16a, a semiconductor chip 22, metal wiring 24 connected to electrodes on the top surface of the semiconductor chip 22 via connection portions 24a, and a silicone gel 28h that covers and fills the semiconductor chip 22. Note that the semiconductor device 100h shown in Fig. 10 has a configuration in which, for example, only the silicone gel 28f of the semiconductor device 100f shown in Fig. 8 has been replaced with the silicone gel 28h, and Fig. 10 shows an enlarged view of only a portion of the configuration shown in Fig. 8.

[0047] 10 does not fill a portion of the top surface of the semiconductor chip 22, specifically, a portion excluding the edge of the top surface, but fills an area surrounding the portion of the top surface of the semiconductor chip 22 in a plan view. Because the portion of the top surface of the semiconductor chip 22 is not filled with silicone gel 28h, a recess 142 (also referred to as an opening) is formed in the silicone gel 28h. The recess 142 is formed to cover only the edge of the semiconductor chip 22, specifically, the bottom surface of the recess 142 is formed only at the edge of the top surface of the semiconductor chip 22, so that the metal wiring 24 and the connection portion 24a (bonding portion) are exposed from the silicone gel 28h.

[0048] With this structure, the silicone gel 28h placed above the semiconductor chip 22 is only on the edge of the semiconductor chip 22, which reduces the degree of explosion that may occur due to heat generation from the semiconductor chip 22 and also reduces the impact on surrounding equipment.

[0049] Fourth Embodiment A semiconductor device according to this embodiment will be described. In the following description, components similar to those described in the above embodiments will be denoted by the same reference numerals, and detailed descriptions thereof will be omitted as appropriate.

[0050] <About the Configuration of the Semiconductor Device> The semiconductor chip 22 mounted on the above-mentioned semiconductor device is preferably made of a wide bandgap semiconductor material such as silicon carbide (SiC) or gallium nitride (GaN). However, because wide bandgap semiconductors have a high heat resistance temperature, the tolerance range for instantaneous temperature rise at which the semiconductor device is destroyed is large. This increases the temperature of the silicone gel adjacent to the semiconductor chip 22 made of a wide bandgap semiconductor material, increasing the amount of silicone gel that vaporizes, and therefore increasing the severity of the explosion compared to when the semiconductor chip is made of silicon (Si).

[0051] In this respect, according to the present embodiment, a greater effect can be achieved in a semiconductor device that incorporates a semiconductor chip 22 made of a wide band gap semiconductor material.

[0052] <Regarding the Effects Produced by the Multiple Embodiments Described Above> Next, examples of the effects produced by the multiple embodiments described above will be described. Note that in the following description, the effects will be described based on the specific configurations exemplified in the multiple embodiments described above, but these may be replaced with other specific configurations exemplified in the present specification to the extent that similar effects are produced. In other words, for convenience, only one of the associated specific configurations may be described as a representative below, but the representatively described specific configuration may be replaced with another associated specific configuration.

[0053] Furthermore, the replacement may be made across multiple embodiments, i.e., configurations illustrated in different embodiments may be combined to produce the same effect.

[0054] According to the embodiment described above, the semiconductor device includes a semiconductor chip 22 housed in a case 14, and a silicone gel 28a (or silicone gel 28b, 28c, 28d, 28e, 28f, 28g, or 28h) filled in the case 14. The silicone gel has at least one recess 128 (or recess 130, 132, 134, 136, 138, 140, or 142) recessed from the top surface of the silicone gel at a position corresponding to the semiconductor chip 22 in a plan view. At least one side surface of the recess is provided at a position corresponding to an end of the semiconductor chip 22 in a plan view.

[0055] This configuration reduces the amount of silicone gel 28a that evaporates due to the heat generated by the semiconductor chip 22. It also creates a path for the internal pressure of the silicone gel 28a to escape to the outside, thereby suppressing the degree of explosion that may occur due to an increase in the internal pressure of the silicone gel 28a.

[0056] Furthermore, even if other configurations shown as examples in this specification are appropriately added to the above configuration, that is, even if other configurations in this specification that were not mentioned as the above configuration are appropriately added, the same effect can be achieved.

[0057] Furthermore, according to the embodiment described above, the height of the bottom surface of recess 138 (or recess 140, recess 142) is equal to or lower than the height of metal wiring 24 connected to the upper surface of semiconductor chip 22. With this configuration, the amount of silicone gel 28f placed above semiconductor chip 22 is reduced, which reduces the degree of explosion that may occur due to heat generation from semiconductor chip 22 and also reduces the impact on peripheral equipment.

[0058] Furthermore, according to the embodiment described above, the distance T1 between the bottom surface of the recess 140 and the top surface of the semiconductor chip 22 is 5 mm or less. With this configuration, the amount of silicone gel 28g placed above the semiconductor chip 22 is reduced, which reduces the degree of explosion that may occur due to heat generation from the semiconductor chip 22 and also reduces the impact on peripheral equipment.

[0059] Furthermore, according to the embodiment described above, the bottom surface of the recess 142 covers a portion of the top surface of the semiconductor chip 22 so as to expose the connection portions 24a of the metal wiring 24 connected to the top surface of the semiconductor chip 22. With this configuration, the silicone gel 28h disposed above the semiconductor chip 22 is limited to only the ends of the semiconductor chip 22, thereby reducing the severity of an explosion that may occur due to heat generated by the semiconductor chip 22 and minimizing the impact on surrounding equipment. To ensure moisture resistance of the wire bonding surface and wire connection reliability, it is necessary to cover the connection portions (bonding portions) with silicone gel, for example, to a thickness of 100 μm or more. However, if the necessary insulation performance of the semiconductor chip 22 is ensured by covering only the ends of the semiconductor chip 22 with silicone gel 28h, it is not necessary to cover the connection portions (bonding portions) with silicone gel.

[0060] Furthermore, according to the embodiment described above, a plurality of semiconductor chips 22 are provided. The recess 130 is provided at a position sandwiched between the semiconductor chips 22 in a plan view. With this configuration, by forming the recess 130 at a location where heat generated from the plurality of semiconductor chips 22 interferes with one another, it is possible to effectively suppress an increase in the internal pressure of the silicone gel 28.

[0061] Furthermore, according to the embodiment described above, the silicone gel 28c (or the silicone gel 28d or 28e) has a plurality of recesses 132 (or the recesses 134 or 136). This configuration increases the degree of freedom in forming the recesses.

[0062] Furthermore, according to the embodiment described above, the semiconductor chip 22 is made of a wide bandgap semiconductor. With this configuration, a semiconductor device equipped with the semiconductor chip 22 made of a wide bandgap semiconductor material can exhibit the effect of suppressing the degree of explosion to a greater extent.

[0063] <Regarding Modifications of the Multiple Embodiments Described Above> In the multiple embodiments described above, the material, composition, dimensions, shape, relative positional relationship, or implementation conditions of each component may also be described, but these are merely examples in all aspects and are not limiting.

[0064] Therefore, countless modifications and equivalents not shown as examples are contemplated within the scope of the technology disclosed in the present specification, including, for example, modifying, adding, or omitting at least one component, and further, extracting at least one component from at least one embodiment and combining it with a component from another embodiment.

[0065] Furthermore, in at least one embodiment described above, when a material name or the like is stated without being specifically specified, unless a contradiction arises, it is assumed that the material in question includes other additives, such as alloys.

[0066] Furthermore, unless a contradiction arises, when it is stated in the above-described embodiments that "one" component is provided, "one or more" of that component may be provided.

[0067] Furthermore, each component in the embodiments described above is a conceptual unit, and the scope of the technology disclosed in this specification includes cases where one component is made up of multiple structures, cases where one component corresponds to a part of a structure, and even cases where multiple components are provided in one structure.

[0068] Furthermore, each of the components in the embodiments described above includes structures having other structures or shapes as long as they perform the same function.

[0069] Furthermore, the descriptions in this specification are incorporated by reference for all purposes related to the present technology, and none of them are admitted to be prior art.

[0070] REFERENCE SIGNS LIST 10 semiconductor device, 12 base plate, 14 case, 14a case cover, 16 insulating substrate, 16a electrode pattern, 16b electrode pattern, 18 bonding material, 20 bonding material, 22 semiconductor chip, 24 metal wiring, 24a connection portion, 26 metal electrode, 28 silicone gel, 28a silicone gel, 28b silicone gel, 28c silicone gel, 28d silicone gel, 28e silicone gel, 28f silicone gel, 28g silicone gel, 28h silicone gel, 100 semiconductor device, 100b semiconductor device, 100c semiconductor device, 100d semiconductor device, 100e semiconductor device, 100f semiconductor device, 100g semiconductor device, 100h semiconductor device, 128 recess, 130 recess, 132 recess, 134 recess, 136 recess, 138 recess, 140 recess, 142 Recess, T1 distance, X1 fill height, X2 fill height, X3 height.

Claims

1. A semiconductor device comprising: a semiconductor chip housed in a case; and a silicone gel filled in the case, wherein the silicone gel has at least one recess recessed from the upper surface of the silicone gel at a position corresponding to the semiconductor chip in a planar view; and at least one side surface of the recess is provided at a position corresponding to an end of the semiconductor chip in a planar view.

2. A semiconductor device according to claim 1, wherein the height of the bottom surface of the recess is equal to or lower than the height of the metal wiring connected to the upper surface of the semiconductor chip.

3. A semiconductor device according to claim 1 or 2, wherein the distance between the bottom surface of the recess and the top surface of the semiconductor chip is 5 mm or less.

4. A semiconductor device according to any one of claims 1 to 3, wherein the bottom surface of the recess covers a part of the top surface of the semiconductor chip so as to expose a connection portion of the metal wiring connected to the top surface of the semiconductor chip with the top surface of the semiconductor chip.

5. A semiconductor device according to any one of claims 1 to 4, comprising a plurality of the semiconductor chips, and the recess is provided at a position sandwiched between the semiconductor chips in a plan view.

6. A semiconductor device according to any one of claims 1 to 5, wherein the silicone gel has a plurality of recesses.

7. A semiconductor device according to any one of claims 1 to 6, wherein the semiconductor chip is made of a wide bandgap semiconductor.

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