Preparation method of high-temperature co-anode high-power schottky diode

Abstract

This invention relates to a method for fabricating high-temperature common-anode high-power Schottky diodes, comprising the following steps: S1, fabricating a Schottky diode chip using the MPS+cut-off ring process; S2, sintering the chip, molybdenum sheet, and inner leads into an assembly in a eutectic furnace using a matching mold; S3, mounting an ALN ​​insulating substrate inside a metal casing; S4, mounting the chip assembly on the ALN substrate and connecting the lead posts; S5, fixing the ceramic cover plate to the casing and lead posts; S6, performing silicone gel encapsulation and curing. This invention is rationally designed, compact in structure, and easy to use.

Description

Technical Field

[0001] This invention relates to a method for fabricating high-temperature common-anode high-power Schottky diodes. Background Technology

[0002] Background: Power electronics technology is a crucial component of electronic information technology and an indispensable technology for achieving informatization, intelligentization, and energy efficiency in all sectors of the world economy. In modern high-tech fields, various equipment is developing towards higher current, higher frequency, and greater integration. The power supply sector, in particular, which supports this high-end equipment, is moving towards greater integration.

[0003] In power electronics, semiconductor diodes are the most basic unit. In the power supply field used in aircraft, it is necessary to isolate the battery from the power supply. Therefore, a high-temperature common-anode high-power Schottky diode module with an operating junction temperature of 175°C, a reverse operating voltage greater than 150V, and an operating frequency greater than 8000Hz is required to achieve isolation.

[0004] Background: Currently, the common design practice is to use plastic casings. Schottky diode chips present technical challenges such as high leakage current at high temperatures, large voltage drop, and poor resistance to temperature shock. Because these modules on the market currently use plastic casings, and due to limitations in Schottky diode chip design and manufacturing technology, the leakage current reaches 75mA under high temperature conditions of 125℃ / 150V, and the forward voltage of a single diode reaches only 0.85V under conditions of 300A / 25℃. This completely fails to meet the system requirements.

[0005] The main reasons are as follows:

[0006] The structure and manufacturing process of Schottky diode chips inherently limit their high-temperature and forward voltage characteristics. Therefore, the structure and manufacturing process of Schottky diode chips need to be readjusted to meet the requirements for high-temperature leakage current and forward voltage.

[0007] Limitations of thermal design. Because existing products generally use a plastic-encapsulated shell with a copper plate, thermal conductivity is poor, resulting in high shell temperatures and low reliability for the modules at high temperatures.

[0008] The original module had poor resistance to temperature shock due to issues with the selection of module base plate materials and insulating dielectric materials, resulting in a high failure rate.

[0009] The shortcomings of ordinary Schottky diode chips include: ① High reverse leakage current: The Schottky barrier is inherently relatively "low." When subjected to high reverse voltage, electrons can easily pass through the barrier through thermal emission or quantum tunneling, resulting in a large reverse leakage current. This not only causes standby power consumption but also leads to a sharp increase in temperature and poor thermal stability. ② Soft breakdown characteristics: When the reverse voltage is too high, the Schottky diode does not have a sharp breakdown point but gradually enters the breakdown state, which is not conducive to self-protection under overvoltage conditions.

[0010] The original product had a side-U structure at the bottom of the inner lead, with the upper bolt post fixed to the product by knurling and contact with the surrounding epoxy resin. This structure has low temperature cycling resistance. Under high temperature conditions, the epoxy resin softens, and when external force is applied, the vertical and horizontal forces will act on the Schottky diode chip, causing micro-cracks in the chip, thus reducing the reliability of the module product.

[0011] In addition, the original product used a plastic-encapsulated shell with a copper plate structure, which had poor thermal conductivity, resulting in high module shell temperature and poor reliability at high temperatures; the module base plate material and insulating medium material were not properly selected, resulting in insufficient resistance to temperature shock and a high failure rate.

[0012] In addition, the main problems with the original products are: the use of oxygen-free copper base plates makes them prone to deformation and has poor resistance to temperature cycling from -55 to 125℃; the use of plastic encapsulation in the shell results in poor sealing, making the internal chips susceptible to moisture and affecting reliability; and the use of AL2O3 ceramic copper-clad laminate for the insulation board has poor thermal conductivity, making it difficult to conduct heat.

[0013] Furthermore, the original product used a plastic potting structure, with the three lead posts secured by black potting compound. Over time, this compound softened and cracked. During installation, external torque could easily act on the internal chip components, causing micro-cracks and further impacting reliability. Summary of the Invention

[0014] In general, the technical problem to be solved by this invention is to provide a method for fabricating a high-temperature common-anode high-power Schottky diode.

[0015] To solve the above problems, the technical solution adopted by the present invention is as follows:

[0016] A method for fabricating a high-power Schottky diode module includes the following steps:

[0017] S1, Schottky diode chip fabricated using MPS+ cutoff ring process;

[0018] S2, using a matching mold, sinters the chip, molybdenum sheet and internal leads into a component in a eutectic furnace;

[0019] S3, Install the ALN insulating substrate inside the metal casing;

[0020] S4, mount the chip assembly on the ALN substrate and connect the lead posts;

[0021] S5, fix the ceramic cover plate to the housing and lead post;

[0022] S6 is used for silicone gel potting and curing.

[0023] As a further improvement to the above technical solution:

[0024] In step S2, the matching mold is a graphite mold; the temperature curve used for eutectic furnace sintering is: 340℃±5℃ in the reflow zone for 150 seconds, and 270℃±5℃ in the heat preservation zone for 200 seconds.

[0025] In step S1, the MPS+stop ring process includes the following steps;

[0026] First, the Schottky diode chip is wafered; then, field oxidation is performed; next, the P+ ring is photolithographically etched and etched; then, the P+ ring is implanted and pushed together; after that, the cutoff ring is photolithographically etched and etched; then, the cutoff ring is implanted and pushed together; next, the lead hole is photolithographically etched and etched; next, a potential barrier is formed; next, the front metal electrode is formed; next, the Schottky diode chip is thinned and the back side is processed; then, the back metal electrode is formed; finally, testing and dicing are performed.

[0027] Wafer loading (epitaxial wafer): A single-crystal silicon epitaxial wafer (usually N-type doped, 100~300μm thick) is mounted into a wafer carrier. A low-resistivity epitaxial layer (resistivity <5 Ω·cm) is used to provide a highly conductive N-type drift region for the subsequent MPS structure.

[0028] Field oxidation: A SiO2 insulating layer is generated on the silicon wafer surface through thermal oxidation to cover inactive areas. The oxide layer thickness is optimized to 800nm ​​to ensure subsequent photolithography accuracy and avoid sidewall damage during trench etching.

[0029] P+ ring photolithography and etching; Photolithography: Define the P+ ring region with photoresist; Etching: Use dry etching to etch trenches out of SiO2 and silicon in the P+ ring region to enhance the electric field pinch-off capability and suppress reverse leakage current.

[0030] P+ ring implantation and push-in: Boron-doped atoms are implanted into the P+ ring region using ion implantation; high-temperature annealing allows the boron atoms to diffuse into the silicon wafer, forming a PN junction with controllable depth. This increases the Schottky barrier height of the PN junction depletion region between the P+ ring and the N-type epitaxial layer under reverse bias, preventing excessively deep doping from causing an increase in forward voltage drop.

[0031] Cut-off ring photolithography and etching: Define the cut-off ring region outside the P+ ring; etch to form a cut-off ring trench, forming an additional electric field confinement ring at the edge of the Schottky junction; making the reverse electric field more concentrated and reducing leakage current by 50%.

[0032] Cut-off ring injection and push-off: Similar to the P+ ring process, the depletion region is expanded under reverse bias, which significantly suppresses leakage current and ensures strong electric field clamping.

[0033] Lead hole photolithography and etching: Define metal lead contact holes on the chip surface; provide low-resistance contact points for the front metal electrode (anode); prevent short circuits.

[0034] Barrier formation: Depositing metal on the silicon surface to form a Schottky barrier reduces the interface state density and reduces leakage current.

[0035] Front metal electrode formation: deposited aluminum as the anode electrode, photolithography etching to form the electrode pattern, reducing the forward voltage drop; matching the current distribution of the MPS structure.

[0036] Thinning and back-side processing: Mechanical grinding / chemical etching reduces the silicon wafer thickness to 100±5μm; forming a low-resistance back electrode, thinning improves heat dissipation efficiency, and meets the 300A high current requirement.

[0037] Backside metal electrode formation: Metal is deposited on the thinned backside to form an ohmic contact, which suppresses failure caused by metal diffusion at high temperatures.

[0038] In step S5, low-temperature silicone sealant is used for fixing;

[0039] Cured in a 130℃ oven for 3 hours.

[0040] During testing, it operates at a junction temperature of 175℃, a reverse voltage of over 150V, and a frequency of over 8000Hz.

[0041] High-power Schottky diode modules, including

[0042] The metal casing has a base plate made of Mo90Cu10 material and a perimeter casing made of Kovar metal.

[0043] The ceramic cap is on the metal housing. The outer periphery of the ceramic cap contacts the metal housing, and the center has a chamfered square hole that contacts the lead post.

[0044] The lead post uses a quadrilateral base and an inner lead with an annular groove set on the base;

[0045] ALN insulating substrate, with matching metal casing;

[0046] The Schottky diode chip, mounted on an ALN ​​insulating substrate, has an MPS+ cutoff ring structure.

[0047] The MPS+ cutoff ring structure has a depletion region established by the PN junction formed by the P-type island when reverse biased, and the inner leads are filled with low-temperature glass glue in the annular trench.

[0048] The metal casing uses a Kovar shell;

[0049] The ceramic cap uses a cover plate;

[0050] The lead post adopts a base lead post;

[0051] The internal leads are based on the base internal leads;

[0052] The ALN insulating substrate uses ALN ceramic insulating board.

[0053] MPS Schottky diode, including a surface layer;

[0054] Below the surface layer are intermediate functional areas and a substrate area.

[0055] The surface layer includes an anode metal electrode layer and a silicon dioxide layer arranged sequentially.

[0056] An oxide layer is disposed beneath the anode metal electrode layer;

[0057] Intermediate functions include N-epipolar layers;

[0058] A P-type island and a P+ cutoff ring are disposed above the N-epitaxy layer.

[0059] The substrate region includes an N+ substrate and a back metallization layer arranged sequentially.

[0060] A high-power Schottky diode module is fabricated based on the preparation method described in claim 1.

[0061] Schottky diode chip fabrication technology is preferred.

[0062] Chip Structure Design: This invention employs an MPS+cut-off ring structure, where the small trench in the MPS structure is reduced from 15μm to 10μm. Under forward bias, at low current, the structure primarily conducts through the Schottky junction region, maintaining a low on-state voltage drop. At high current, holes injected from the P-type island modulate the conductivity of the N-type drift region, reducing resistance. Under reverse bias, the depletion region formed by the PN junction raises the effective barrier height below the Schottky junction, significantly suppressing reverse leakage current.

[0063] The electrical performance parameters of this invention are excellent;

[0064] Preferably, the inner lead of the present invention adopts four "S"-shaped structures, and the core structure adopts a composite design of quadrilateral base and annular groove. The quadrilateral structure provides a clear "planar positioning reference", and the four sides form a rigid fit with the ceramic cover plate; the annular groove allows the low-temperature glass glue to form a "mortise and tenon" type fit after curing, providing a mechanical blocking effect.

[0065] Its processing technology is as follows: Material preparation → First process S-shaped oxygen-free copper sheets → Form copper sheets → Process lead posts → Dimension inspection → Electroplating of lead posts → Add steel sleeves to lead posts → Assembly → Sintering in hydrogen furnace → Reshaping → Appearance inspection → Packaging and warehousing.

[0066] Preferably, the common anode high-temperature Schottky diode module assembly of the present invention is used.

[0067] Material selection: Base: Mo90Cu10 base plate, 1.3mm thick Kovar metal for the shell; Ceramic cover: 99.6% high-frequency black ceramic; Insulating substrate: ALN ceramic substrate, thermal conductivity 230W / m·K; Soldering material: Pb92.5Sn5Ag2.5 solder pad (melting point 296℃) for chip soldering; Assembly uses 220℃ low-temperature solder paste.

[0068] Assembly process flow: Step 1: Prepare materials, including the housing, ALN substrate, ceramic cover plate, chip, molybdenum sheet, solder pad, lead post, internal lead, solder paste, and graphite mold; Step 2: Apply tin plating to the housing and ALN substrate using 220℃ low-temperature solder paste; Step 3: Sinter the chip, molybdenum sheet, and internal lead together in a eutectic furnace using a graphite mold; Step 4: Sinter according to a specific temperature profile (reflow zone: 340℃±5℃, 150s); Step 5: Complete module assembly on the hot soldering station; Step 6: Apply silicone gel and encapsulate with ceramic cap; Step 7: Product screening, testing and warehousing; Key process parameters: Chip lead assembly sintering temperature profile: Reflow zone 340℃±5℃ for 150 seconds, insulation zone 270℃±5℃ for 200 seconds; Ceramic cap encapsulation: 130℃ oven curing for 3 hours; Silicone gel curing: room temperature curing for 30 minutes, 60℃ oven curing for 1 hour.

[0069] This invention, combined with a low-temperature glass glue filling and curing process, forms a dual reinforcement system of "structural locking + material bonding"; innovative ceramic cap technology: using 99.6% high-frequency black ceramic as the insulator; the outer periphery of the ceramic cap is in close contact with the metal shell; three chamfered square holes in the center contact the three lead posts of the module respectively; curing and fixing are achieved using low-temperature glass glue; innovative shell structure technology: the base plate uses Mo90Cu10, with a thermal expansion coefficient of (7.5×10⁻⁻⁴)... 6(℃) is close to that of silicon single crystal; the surrounding shell is made of Kovar metal, which is precision machined and then sintered together with silver copper solder and molybdenum copper base plate; common anode high temperature Schottky diode module assembly technology: the insulating material between the chip and the shell is changed from AL2O3 substrate to ALN substrate; four-station internal leads are adopted, and parallel technology is used to meet the high current requirements.

[0070] The electrical performance of this invention is significantly improved: the leakage current IR is less than 15mA under high temperature (150℃ / 150V) conditions (compared to more than 30mA in the prior art); the reverse repetitive leakage current is less than 2μA under normal temperature (25℃ / 150V) conditions (compared to more than 100μA in the prior art); and the forward voltage is less than 0.85V under 300A / 25℃ conditions (compared to more than 0.95V in the prior art).

[0071] Significantly improved thermal stability: This invention uses a molybdenum copper substrate, whose coefficient of thermal expansion is close to that of silicon chips, reducing thermal stress; the thermal conductivity of the ALN substrate reaches 230 W / m·K, which is 7 times that of the AL2O3 substrate, greatly improving heat dissipation performance;

[0072] Enhanced mechanical strength and reliability: The semi-sealed metal structure has strong resistance to temperature shock and can withstand temperature cycles from -55℃ to 180℃; the "quadrilateral substrate + annular groove" internal lead design improves tensile strength and stability, withstands 20g vibration impact, and significantly improves reliability; Increased operating frequency: The module operates at a frequency greater than 8000Hz, meeting the requirements of high-frequency applications. Attached Figure Description

[0073] Figure 1 This is a schematic diagram of the structure of Embodiment 1 of the present invention.

[0074] Figure 2 This is a schematic diagram of the structure of Embodiment 2 of the present invention.

[0075] Figure 3 This is a schematic diagram of the overall structure of the module of the present invention;

[0076] Figure 4 is a schematic diagram of the molybdenum-copper base plate structure;

[0077] Figure 5 is a schematic diagram of the insulation body structure;

[0078] Figure 6 is a schematic diagram of the cover plate structure;

[0079] Figure 7 This is a schematic diagram of the overall structure of the buffer frame;

[0080] Figure 8 is a schematic diagram of the core assembly structure;

[0081] Figure 9 This is a schematic diagram of the molybdenum-copper base plate structure;

[0082] Figure 10This is a schematic diagram of the input terminal A structure;

[0083] The layers are as follows: 1. Surface layer; 2. Intermediate function; 3. Substrate region; 4. Anode metal electrode layer; 5. Conductive layer; 6. Nickel metal layer; 7. Adhesion layer; 8. Silicon dioxide layer; 9. Oxide layer; 10. N+ extension region; 11. P+ cutoff ring; 12. P-type island; 13. N- epitaxial layer; 14. N+ substrate; 15. Backside metallization layer; 16. Ti cathode metal layer; 17. Ni cathode metal layer; 18. Ag cathode metal layer; 20. Molybdenum-copper substrate; 21. Kovar electrode. 21. Shell; 22. Cover plate; 23. Base lead post; 24. Base inner lead; 25. ALN ceramic insulation board; 26. Core assembly; 27. Copper-plated area; 28. Redundant blank area; 29. ​​Solder mask layer; 30. Insulating body; 31. Boss; 32. Buffer frame; 33. Frame; 34. Nickel-plated flat cover; 35. Sealing area; 36. Center screw hole; 37. Base component; 38. Sealing surface; 39. Bent copper sheet; 40. Bending section; 41. Slanted pull section; 42. Flat bottom; 43. Input terminal A; 44. Output terminal B; 45. Diode unit. Detailed Implementation

[0084] like Figure 1-10 The MPS Schottky diode of this embodiment includes a surface layer 1;

[0085] Below the surface layer 1 are intermediate functional area 2 and substrate area 3 in sequence;

[0086] Surface layer 1 includes an anode metal electrode layer 4 and a silicon dioxide layer 8 disposed sequentially;

[0087] The anode metal (Ti / Ni / Ag) serves as the current collection point and external connection, injecting current into the Schottky junction and PN junction, and is the current entry point for the entire device.

[0088] SiO2 provides surface passivation and insulation protection, covering all areas, stabilizing the surface potential, suppressing leakage current, and protecting the internal structure.

[0089] An oxide layer 9 is provided below the anode metal electrode layer 4;

[0090] The intermediate function 2 includes the N-epitaxy layer 13; it withstands high voltage, forms a junction, and conducts current. It is the carrier of the Schottky junction and the PN junction, and is the core that withstands voltage and conducts current.

[0091] like Figure 2 A P-type island 12 and a P+ stop ring 11 are disposed above the N-epitaxy layer 13.

[0092] Substrate region 3 includes an N+ substrate 14 and a back metallization layer 15 disposed sequentially;

[0093] The N+ substrate 14, with its mechanical support and low-resistance conductivity, supports the entire structure and provides a low-resistance path for current to the cathode.

[0094] The anode metal electrode layer 4 includes a conductive layer 5, a nickel metal layer 6, and an adhesion layer 7, which run from the top to the bottom.

[0095] The back metallization layer 15 forms an ohmic contact and soldering interface, efficiently conducting current from the chip to external circuits and fixing the chip.

[0096] Conductive layer 5 is an anode Ag layer;

[0097] Nickel metal layer 6 is the anode Ag layer;

[0098] Adhesion layer 7 is an anode Ni layer or a NiV layer;

[0099] Adhesion layer 7 is an anode Ti layer.

[0100] The back metallization layer 15 includes a Ti cathode metal layer 16, a Ni cathode metal layer 17, and an Ag cathode metal layer 18 disposed sequentially.

[0101] An N+ extension region 10 is provided outside the P+ cutoff ring 11. The doping concentration of the N+ region is between that of the N+ substrate and the N- epitaxial layer. As an extension of the P+ cutoff ring, the depletion layer under high voltage can be smoothly extended laterally, optimizing the electric field distribution and preventing the electric field from concentrating at the edge of the terminal region, thereby increasing the breakdown voltage of the chip to close to the theoretical maximum value.

[0102] like Figure 2 The present invention has an MPS+ cutoff ring.

[0103] The main purpose of adding a cutoff ring is to allow the oxide layer outside the depletion layer to act as a channel cutoff, which can effectively block the leakage current generated by the leakage channel. Its MPS function realizes / terminal protection, dynamically forms the depletion layer, optimizes the electric field, reduces leakage current, and improves withstand voltage.

[0104] The working principle of the MPS+ cutoff ring chip structure of the present invention:

[0105] When under positive bias:

[0106] At low currents, the current flows primarily through the Schottky junction region.

[0107] Because the forward voltage of a Schottky junction (approximately 0.3-0.4V) is lower than that of a PN junction (approximately 0.7V), it retains the advantage of low forward voltage drop of a Schottky diode.

[0108] At high current densities, minority carriers (holes) injected into the P-type island will affect the N-type drift region.

[0109] Conductivity modulation reduces its resistance, thereby further optimizing the high voltage drop.

[0110] Under reverse bias:

[0111] When a reverse voltage is applied, the PN junction formed by the P-type island and the N-type drift region will deplete and establish a new junction.

[0112] Start a depletion zone.

[0113] This depletion region acts as a "barrier" or "barrier," significantly raising the effective barrier height below the Schottky junction.

[0114] With the potential barrier raised, electrons find it more difficult to pass through, thus greatly suppressing reverse leakage current. This allows MPS diodes to maintain very low leakage current even at high temperatures and high reverse voltages, exhibiting excellent thermal stability.

[0115] Meanwhile, due to the presence of the PN junction, the MPS+ cutoff ring exhibits hard breakdown characteristics closer to those of a PN junction diode, thus improving the robustness of the device.

[0116] In the MPS+ cutoff ring structure, the small trenches were reduced from 15µm to 10µm. This smaller spacing reduces the area of ​​the active region, which is directly positively correlated with VF (Voltage Flow Rate). This resulted in a slightly larger VF in the final product compared to previous attempts. However, the smaller spacing also makes it easier to pinch off the reverse electric field generated during reverse bias, significantly reducing leakage current at room temperature.

[0117] like Figure 1-6 The improved high-power Schottky diode of this embodiment includes a molybdenum copper base plate 20. The present invention aims to solve the problems of high leakage current at high temperatures, high forward voltage, poor resistance to temperature shock, poor thermal conductivity, and low structural reliability of existing Schottky diode modules, and achieves the technical specifications of TjM≧175℃, reverse working voltage greater than 150V, leakage current IR less than 15mA under high temperature 150℃ / 150V conditions, forward voltage less than 0.85V under forward current 300A / 25℃ conditions, and operating frequency greater than 8000Hz.

[0118] This invention employs a metal semi-sealed packaging technology, which overcomes the shortcomings of the original module while offering advantages such as convenient operation, robust structure, strong resistance to high and low temperature impacts, and high resistance to mechanical vibration and impact.

[0119] A Kovar shell 21 is provided on the molybdenum-copper base plate 20;

[0120] A cover plate 22 is provided on the Kovar outer shell 21;

[0121] A base lead post 23 and a base lead 24 are provided in the inner cavity of the Kovar housing 21;

[0122] The inner lead wires 24 of the base are located on the side of the lead wire post 23 of the base;

[0123] ALN ceramic insulating plates 25 are distributed on the molybdenum copper base plate 20;

[0124] Core assembly 26 is distributed on ALN ​​ceramic insulating plate 25;

[0125] The core assembly 26 has base internal leads 24 distributed on it;

[0126] The base lead post 23 is set on the ALN ceramic insulating plate 25;

[0127] The base inner lead 24 includes a base body 37 and a bent copper sheet 39 disposed at the lower end of the base body 37;

[0128] The copper sheet 39 is a bending setting.

[0129] ALN ceramic insulation board 25 includes insulation body 30;

[0130] A copper-clad area 27 is covered on the insulating body 30;

[0131] A redundant blank area 28 is provided around the copper-clad area 27;

[0132] A solder mask layer 29 is distributed on the copper-clad area 27.

[0133] A boss portion 31 is provided on the molybdenum copper base plate 20; a groove is provided between the boss portions 31;

[0134] Kovar shell 21 is on boss 31.

[0135] Kovar casing 21 includes a buffer frame 32 disposed on a molybdenum copper base plate 20 and a frame 33 disposed on the buffer frame 32;

[0136] A nickel-plated flat cover 34 is provided at the top of the border 33;

[0137] A sealing area 35 is provided at the inner stop of the upper end of the frame 33.

[0138] The cover plate 22 has several square holes; the cover plate 22 is a ceramic cover plate.

[0139] A step is provided at the lower end of the base lead post 23, which is set on the insulating body 30; a center screw hole 36 of a blind hole is provided in the base lead post 23.

[0140] A screw hole is provided at the center of the seat body 37;

[0141] An annular groove is provided on the outer side of the seat body 37;

[0142] A sealing surface 38 is provided at the upper part of the outer periphery of the seat body 37 for receiving the cover plate 22.

[0143] There are four bent copper sheets, each numbered 39.

[0144] The upper end of the bent copper sheet 39 is connected to a corresponding foot at the lower end of the outer periphery of the base 37; the bent copper sheet 39 has a bent section 40; the bent section 40 extends to have a diagonal pull portion 41.

[0145] The lower end of the cable tie 41 has a horizontally inward-facing flat bottom 42.

[0146] As a specific application example, such as Figure 1-5 An improved high-power Schottky diode includes a molybdenum copper base plate 20, a Kovar housing 21, a cover plate 22, a base lead post 23, an inner lead 24, an ALN ​​ceramic insulating plate 25, and a core assembly 26.

[0147] The molybdenum-copper base plate 20 is made of Mo90Cu10 material, with an expansion coefficient of 7.5×10-6 / ℃ and a hardness of 226.7HB, serving as the bottom support structure of the module;

[0148] The Kovar shell 21 includes a frame 33 and a buffer frame 32. The frame 33 is made of Kovar metal by precision machining, and the buffer frame 32 is made of TU1. The frame 33 is connected to the molybdenum copper base plate 20 by silver-copper solder sintering. The surface of the Kovar shell 21 is nickel plated, and the inner four walls are without nickel layer, which is used for low-temperature welding with the cover plate 22.

[0149] The cover plate 22 is made of 92% Al2O3 black ceramic material. Its outer perimeter is in close contact with the Kovar shell 21. Three square holes with chamfers are opened in the middle. The square holes match the base lead post 23 and the base inner lead 24. The sealing surface 38 of the cover plate 22 is used to fit and seal with the Kovar shell 21. The insulating body 30 ensures the insulation performance.

[0150] The base lead post 23 is made of copper, preferably with an internal steel sleeve, has a T-shaped structure, and is nickel-plated. After passing inspection, the internal thread is fitted with a steel sleeve (9.5mm steel sleeve) and coated with anaerobic adhesive. It includes a base body and a central screw hole 36. The base body spans across the two ends of the two ALN ceramic insulating plates 25, serving as a series connection.

[0151] The base inner lead 24 includes a base body, a bent copper sheet 39, a bent section 40, a diagonal pull part 41, and a flat bottom 42. The lower part adopts four "S"-shaped structures. The core structure is a quadrilateral base + annular groove, which is filled and cured with low-temperature glass glue. The copper strip surface is not electroplated, and the threaded column surface is nickel plated. After passing the inspection, the internal thread is fitted with a steel sleeve (6.0mm steel sleeve) and coated with anaerobic glue.

[0152] The ALN ceramic insulating board 25 has a thermal conductivity of 230 W / m·K, and its surface is provided with a copper-plated area 27, a redundant blank area 28, and a solder resist layer 29. It has a 0.5 mm margin around the edges to prevent short circuits caused by solder return during soldering. The back of the ALN ceramic insulating board 25 is used to bond with the molybdenum copper base plate 20.

[0153] The core assembly 26 includes a Schottky diode chip with an MPS + cutoff ring structure, a gold-plated molybdenum copper sheet, and a high-temperature solder pad. The small trench spacing of the chip is 10um. The chip, the gold-plated molybdenum copper sheet, and the lead wire 24 in the base are sintered together in a eutectic furnace through the high-temperature solder pad.

[0154] The molybdenum-copper base plate 20 of the Kovar housing 21 forms a boss 31. The surface of the Kovar housing 21 is provided with a nickel-plated flat cover 34. The contact area between the frame 33 and the cover plate 22 is a sealing area 35. The bent copper sheet 39 of the lead wire 24 in the base is bent through the bending section 40 and then connected to the flat bottom 42 through the inclined pull part 41. The flat bottom 42 is attached to the core assembly 26.

[0155] Among them, the Kovar shell 21 is milled with a molybdenum copper base plate 21 and a Kovar frame 33. After the frame 33 is nickel plated, it is sintered with the molybdenum copper base plate 20 using silver copper solder. Then, the plane is machined by a milling machine, electroplated, and the inner groove on the frame is milled. The buffer frame 32 is made of TU1 material.

[0156] Among them, cover plate 22: is made of black ceramic, with three square holes with chamfers, a single-sided gap of 0.20mm for electrode fitting, a single-sided gap of 0.10mm for frame fitting, no coating on the surface, and tolerances not specified conform to GB / T1804-m grade;

[0157] Base lead post 23: Made of TU1 copper and machined into a "T" shape, with a tolerance of ±0.10mm not specified. The surface is nickel plated, and the internal thread is fitted with a 9.5mm steel sleeve and coated with anaerobic adhesive.

[0158] 24. Inner lead wire of base: Prepare TU1 oxygen-free copper sheet, process "S" type lead wire, process lead wire post after forming copper sheet, electroplat lead wire post after dimensional inspection, add 6.0mm steel set for assembly, sinter in hydrogen furnace, shape and visual inspection.

[0159] ALN ceramic insulation board 25: It is processed into a structure with copper-clad area 27, redundant blank area 28, and solder mask layer 29. The ALN material thickness is 0.63mm, the copper clad TU1 thickness is 0.30mm, and the edge is 0.5mm around the edges.

[0160] Core assembly 26: adopts MPS + cut-off ring structure chip, small trench spacing 10um, gold-plated molybdenum copper sheet, high temperature solder pad (melting point 296℃), chip, and base inner lead 24 are placed into graphite mold in sequence, and sintered in eutectic furnace according to temperature curve (heating rate 0.85℃ / s~0.95℃ / s, heat preservation zone 270℃±5℃, 200s, reflow zone 340℃±5℃, 150s, vacuum exhaust 200s, water cooling).

[0161] The housing base features a unique reliability design. The base plate is made of high-quality molybdenum copper, offering excellent electrical conductivity and heat dissipation. The housing itself is constructed from 1.3mm thick Kovar metal and milled. The housing and base plate are bonded together at high temperature with silver-copper solder and then precision machined.

[0162] The outer perimeter of the ceramic cover fits tightly with the inner surface of the frame of the base. After applying low-temperature silicone sealant, it is cured in an oven at 130°C for 3 hours to ensure a firm bond and prevent the ceramic cover from being pressed down under vertical pressure.

[0163] The central square hole of the ceramic cap is designed with a chamfer to prevent stress from causing ceramic cracks. It fits tightly with the square copper platform of the housing lead post, is bonded with low-temperature silicone sealant, and cured in an oven at 130°C for 3 hours to prevent lateral movement when installing screws; the square holes on both sides fit tightly with the square copper platform of the lead wire inside the housing, are bonded with low-temperature silicone sealant, and cured in an oven at 130°C for 3 hours to prevent lateral movement when installing screws.

[0164] This lead post features a separate reliability design, uses high-quality copper wire, and has a "T"-shaped structure. It spans across both ends of the two ALN substrates, serving as a series connection.

[0165] Features of the housing lead post: a) Good conductivity. b) Stable "T"-shaped structure with strong overload capacity. The selection of the internal lead wire in the base ensures overload capacity while meeting the requirements of temperature, mechanical, and electrical stress; therefore, the internal lead wire is designed as this "U"-shaped structure.

[0166] The reason why the internal leads of the housing are designed with a horizontal "U" shape is to prevent external stress from damaging the chip. At the same time, the square shape on the pillar fits tightly with the square shape of the ceramic cover of the housing. After being bonded with low-temperature glass glue, it is cured in an oven at 130°C for 3 hours to prevent the internal leads of the housing from moving left and right when the screws are installed.

[0167] For the selection of gold-plated molybdenum-copper sheets, since the coefficient of thermal expansion of molybdenum-copper sheets is 8.5 × 10⁻⁶ / K and that of the ALN ceramic substrate is 4.8 × 10⁻⁶ / K, which are very close, adding a gold-plated molybdenum-copper sheet between the chip and the substrate, and between the "S"-shaped inner lead and the chip, is the optimal choice to reduce the stress on the chip from the ALN ceramic substrate and the "S"-shaped inner lead during soldering. Considering wettability, gold-plated molybdenum-copper sheets are used.

[0168] This invention exhibits excellent temperature resistance: the operating junction temperature can reach 180℃, meeting the requirement of TjM≧175℃. The expansion coefficient of the molybdenum-copper base plate 20 is close to that of silicon single crystal. The combination of the Kovar shell 21 and the ceramic cover plate 22 is resistant to high and low temperature shocks and can withstand temperature cycles from -55℃ to 180℃. It also boasts high thermal conductivity: the use of an ALN ​​ceramic insulating plate 25, with a thermal conductivity 7 times that of traditional AL2O3 ceramic copper-clad laminates, combined with the Mo90Cu10 molybdenum-copper base plate 20, ensures rapid heat conduction and low module shell temperature. Furthermore, it offers high structural reliability: the dual reinforcement system of "structural locking + material bonding" for the internal leads 24 provides high axial mechanical strength, preventing loosening at 180℃ and avoiding additional stress on the chip when external force is applied. The Kovar shell 21 and ceramic cover plate 22 are connected by low-temperature glass glue curing, providing good sealing, resistance to 20g impact vibration, and passing a 96-hour salt spray test. Finally, it demonstrates excellent insulation performance: the insulation resistance of the cover plate 22 is within 100MΩ. The leads and housing withstand voltage up to 1800V DC, and the ALN ceramic insulating board 25 effectively insulates the chip from the housing.

[0169] This invention improves the inner lead wire. To enhance the structural stability and long-term reliability of the lead post under complex working conditions, the lower part adopts four "S"-shaped structures. Its core structure adopts a composite design of quadrilateral base and annular groove, and is filled and cured with low-temperature glass glue to form a dual reinforcement system of "structural locking + material bonding". Ultimately, it achieves a significant improvement in axial mechanical strength, while taking into account insulation, sealing and assembly compatibility.

[0170] Compared to traditional round lead posts, the quadrilateral structure has a clear "planar positioning reference"—the four sides can form a rigid fit with the ceramic cover plate of the device, avoiding positional displacement caused by rotation during installation. At the same time, when subjected to radial external forces, the corner structure of the quadrilateral can disperse stress and reduce the risk of local deformation.

[0171] The groove's "concave-convex structure" allows the low-temperature silicone sealant to form a "mortise and tenon" fit after curing—the sealant can fill the recessed areas of the groove and simultaneously form a multi-dimensional bond with the sidewalls and bottom of the groove.

[0172] When the lead posts are subjected to axial tensile or compressive forces, the adhesive within the trenches not only resists displacement through "adhesive force" but also generates a "reaction force" through "mechanical resistance from the trench sidewalls," preventing the adhesive from peeling off from the substrate surface. This fundamentally solves the problem of traditional "smooth surface bonding" easily detaching under stress. It is also more resistant to high and low temperature shocks; thanks to the bonding effect of low-temperature glass adhesive, it fits tightly with the ceramic cover plate, able to withstand greater lateral and vertical forces. Furthermore, when the module operates at 180°C, the internal leads and lead posts will not loosen. When external forces are applied, no additional stress is generated on the chip, significantly improving the reliability of the module product.

[0173] To address the shortcomings of plastic-encapsulated structures, a ceramic cover was specially designed. This ceramic cover has its outer perimeter in close contact with the metal casing, and three chamfered square holes in the center, which respectively contact the three lead posts of the module. This design both insulates the lead posts from the casing and secures them, preventing external forces from affecting the chips inside the module.

[0174] The original structure consisted of a 92mm × 20mm × 3mm thick T2 copper plate, with an engineering plastic outer shell secured by screws and sealed with potting compound. There was no separate outer shell; therefore, this invention offers enhanced robustness and reliability.

[0175] The shell of this invention is characterized by the following features: the base plate is made of Mo90Cu10, whose coefficient of thermal expansion (7.5×10-6 / ℃) is very close to that of silicon single crystal (2.5×10-6 / ℃), and its hardness is 226.7HB, which is much greater than the hardness of pure copper (35HB); the surrounding shell is made of Kovar metal, which is precision machined and then sintered together with the molybdenum copper base plate using silver-copper solder; the shell of this invention has high strength, strong resistance to high and low temperature impacts, and resistance to mechanical vibration and impact.

[0176] This invention overcomes the above-mentioned shortcomings. It employs a semi-sealed structure. The upper sealing cover is made of high-strength black ceramic, which fits tightly with the perimeter of the Kovar housing and is cured and fixed using low-temperature silicone sealant. Three square holes are designed in the center of the ceramic cover to match the lead posts and inner leads, ensuring that the lead posts and inner leads do not rotate when lateral forces are applied. Annular grooves on the lead posts and inner leads ensure a tight and secure fit between the lead posts and inner leads and the ceramic cover during sealing. Furthermore, when vertical forces are applied, these forces are not applied to the chip assembly.

Claims

1. A method for fabricating a high-power Schottky diode module, characterized in that: Includes the following steps: S1, Schottky diode chip fabricated using MPS+ cutoff ring process; S2, using a matching mold, sinters the chip, molybdenum sheet and internal leads into a component in a eutectic furnace; S3, Install the ALN insulating substrate inside the metal casing; S4, mount the chip assembly on the ALN substrate and connect the lead posts; S5, fix the ceramic cover plate to the housing and lead post; S6 is used for silicone gel potting and curing.

2. The method for fabricating a high-power Schottky diode module according to claim 1, characterized in that: In step S2, the matching mold is a graphite mold; the temperature curve used for eutectic furnace sintering is: 340℃±5℃ in the reflow zone for 150 seconds, and 270℃±5℃ in the heat preservation zone for 200 seconds.

3. The method for fabricating a high-power Schottky diode module according to claim 2, characterized in that: In step S1, the MPS+stop ring process includes the following steps; First, the Schottky diode chip is fabricated. Then, field oxidation is performed; next, the P+ ring is photolithographically etched and etched. Next, P+ ring implantation and push-in; then, photolithography and etching of the stop ring; then, stop ring implantation and push-in; and finally, photolithography and etching of the lead hole. The next step is to form a potential barrier; next, the front metal electrode is formed; next, the Schottky diode chip is thinned and the back side is processed. Next, the metal electrode on the back is formed, and finally, the test dicing is performed.

4. The method for fabricating a high-power Schottky diode module according to claim 3, characterized in that: In step S5, low-temperature glass glue is used for fixing; and the mixture is cured in a 130°C oven for 3 hours. In S4, the following steps are performed: First, process oxygen-free copper sheets of type S-shaped leads and shape the copper sheets; process lead posts, inspect their dimensions, electroplate the lead posts, add steel sleeves to the lead posts, and assemble them; then sinter and shape them in a hydrogen furnace.

5. The method for fabricating a high-power Schottky diode module according to claim 4, characterized in that: During testing, it operates at a junction temperature of 175℃, a reverse voltage of over 150V, and a frequency of over 8000Hz.

6. The method for fabricating a high-power Schottky diode module according to claim 5, characterized in that: High-power Schottky diode modules, including Metal casing, the base plate of the metal casing is made of Mo 90 Cu 10 The material used is Kovar metal for the outer shell; The ceramic cap is on the metal housing. The outer periphery of the ceramic cap contacts the metal housing, and the center has a chamfered square hole that contacts the lead post. The lead post uses a quadrilateral base and an inner lead with an annular groove set on the base; ALN insulating substrate, with matching metal casing; The Schottky diode chip, mounted on an ALN ​​insulating substrate, has an MPS+ cutoff ring structure.

7. The method for fabricating a high-power Schottky diode module according to claim 6, characterized in that: The MPS+ cutoff ring structure has a depletion region established by the PN junction formed by the P-type island when reverse biased, and the inner leads are filled with low-temperature glass glue in the annular trench.

8. The method for fabricating a high-power Schottky diode module according to claim 7, characterized in that: The metal casing uses a Kovar shell (21); The ceramic cap uses a cover plate (22); The lead post adopts a base lead post (23); The inner lead is a base inner lead (24); The ALN insulating substrate uses ALN ceramic insulating board (25).

9. The method for fabricating a high-power Schottky diode module according to claim 8, characterized in that: MPS Schottky diode, including surface layer (1); Below the surface layer (1) are intermediate functional (2) and substrate region (3) in sequence; The surface layer (1) includes an anode metal electrode layer (4) and a silicon dioxide layer (8) arranged sequentially. An oxide layer (9) is provided under the anode metal electrode layer (4); The intermediate function (2) includes an N-epilayer (13); A P-type island (12) and a P+ cutoff ring (11) are provided above the N-epitaxy layer (13). The substrate region (3) includes an N+ substrate (14) and a back metallization layer (15) arranged sequentially.

10. A high-power Schottky diode module, characterized in that: Prepared according to the preparation method described in claim 1.

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