Printed circuit board assembly and electronic device including same

Abstract

Embodiments of the present disclosure provide an electronic device comprising a printed circuit board (PCB) having a plurality of layers for use in radio frequency (RF) processing in a wireless communication system. The electronic device may comprise: a power amplification circuit disposed on the PCB; an RF component disposed on the PCB; and a conductive pattern disposed on the PCB and allowing for transmitting signals from the power amplification circuit to the RF component. The conductive pattern may be configured to perform impedance matching between an output impedance of the power amplification circuit and a load impedance of the RF component. The plurality of layers may include a first layer having a first ground portion, a second layer having a second ground portion, and a third layer having formed thereon the power amplifier circuit, the RF component, and the conductive pattern.

Description

Printed circuit board assembly and electronic device including same

[0001] The present disclosure relates to a printed circuit board assembly and an electronic device including the same.

[0002] Impedance matching can be used to efficiently transmit radio frequency (RF) signals. When the impedance of one RF component differs from the impedance of the other RF component, a reflected wave can occur, resulting in signal distortion and loss. To achieve impedance matching, a circuit can be placed between the two RF components.

[0003] The above information may be provided as background art to aid in understanding the present disclosure. No claim or determination is made as to whether any of the above is applicable as prior art related to the present disclosure.

[0004] In embodiments of the present disclosure, an electronic device is provided. The electronic device may include a printed circuit board (PCB) including a plurality of layers; a power amplifier circuit disposed on the printed circuit board; a conductive pattern disposed on the printed circuit board; and an RF (radio frequency) component disposed on the printed circuit board. The plurality of layers may include an upper layer on which the conductive pattern is formed, a first layer having a first ground portion, and a second layer having a second ground portion between the upper layer and the first layer. An area of ​​the first ground portion may be wider than an area of ​​the second ground portion. The conductive pattern may include a first portion connected to the power amplifier circuit and a second portion connected to the RF component. A line width of the first portion may be wider than a line width of the second portion. The first portion of the conductive pattern may be adjacent to the second ground portion among the first ground portion and the second ground portion, based on a height direction of the PCB. At least a portion of the second portion of the conductive pattern may be adjacent to the first ground portion among the first ground portion and the second ground portion, based on the height direction of the PCB.

[0005] In embodiments of the present disclosure, a printed circuit board (PCB) assembly is provided. The PCB assembly may include a first RF component; a second RF component; a conductive pattern; an upper layer on which the conductive pattern is disposed; a first layer having a first ground portion; and a second layer having a second ground portion between the upper layer and the first layer. An area of ​​the first ground portion may be wider than an area of ​​the second ground portion. The conductive pattern may include a first portion for the first RF component and a second portion for the second RF component. A line width of the first portion may be wider than a line width of the second portion. The first portion of the conductive pattern may be adjacent to the second ground portion among the first ground portion and the second ground portion, based on a height direction of the PCB. At least a portion of the second portion of the conductive pattern may be adjacent to the first ground portion among the first ground portion and the second ground portion, based on the height direction of the PCB.

[0006] In embodiments of the present disclosure, an electronic device is provided, including a printed circuit board (PCB) having a plurality of layers for use in RF (radio frequency) processing in a wireless communication system. The electronic device may include a power amplification circuit disposed on the PCB; a radio frequency (RF) component disposed on the PCB; and a conductive pattern disposed on the PCB for transmitting signals from the power amplification circuit to the RF component. The conductive pattern may be configured to perform impedance matching between an output impedance of the power amplification circuit and a load impedance of the RF component. The plurality of layers may include a first layer having a first ground portion, a second layer having a second ground portion, and a third layer having the power amplification circuit, the RF component, and the conductive pattern formed thereon. The second layer may be disposed between the first layer and the third layer. The conductive pattern may include a first line portion connected to the power amplification circuit and a second line portion connected to the RF component. The line width of the first line portion may be wider than the line width of the second line portion. At least a portion of the first line portion of the conductive pattern may be disposed on the second ground portion of the second layer. At least a portion of the second line portion of the conductive pattern may be disposed on the first ground portion of the first layer without the second ground portion of the second layer. A distance between the second ground portion and at least a portion of the first line portion of the conductive pattern may be shorter than a distance between the first ground portion and at least a portion of the second line portion of the conductive pattern.

[0007] In embodiments of the present disclosure, a printed circuit board (PCB) assembly having a plurality of layers for use in radio frequency (RF) processing in a wireless communication system is provided. The PCB assembly may include a first ground portion disposed in a first layer among the plurality of layers; a second ground portion disposed in a second layer among the plurality of layers; a first RF component disposed in a third layer among the plurality of layers; a second RF component disposed in a third layer among the plurality of layers; and a conductive pattern disposed in the third layer among the plurality of layers and configured to transmit signals from the first RF component to the second RF component. The conductive pattern may be configured to perform impedance matching between an impedance of the first RF component and an impedance of the second RF component. The second layer may be disposed between the first layer and the third layer. The conductive pattern may include a first line portion connected to the first RF component and a second line portion connected to the second RF component. The line width of the first line portion may be wider than the line width of the second line portion. At least a portion of the first line portion of the conductive pattern may be disposed on the second ground portion of the second layer. At least a portion of the second line portion of the conductive pattern may be disposed on the first ground portion of the first layer without the second ground portion of the second layer. A distance between the second ground portion and at least a portion of the first line portion of the conductive pattern may be shorter than a distance between the first ground portion and at least a portion of the second line portion of the conductive pattern.

[0008] Figure 1 shows a wireless communication system.

[0009] Figure 2a illustrates an example of an electronic device including a matching circuit.

[0010] Figure 2b illustrates an example of a printed circuit board (PCB) assembly including a matching circuit.

[0011] Figure 3 is a diagram for explaining the impedance of a conductive pattern.

[0012] Figure 4 shows an example of a matching circuit using a multilayer ground.

[0013] Figures 5a to 5c show examples of matching circuits using multilayer grounds.

[0014] Figure 6 shows another example of a matching circuit using a multilayer ground.

[0015] Figure 7 shows another example of a matching circuit using a multilayer ground.

[0016] Figures 8a and 8b show examples of electrical connections between ground parts using plates.

[0017] Figure 9 shows an example of electrical connection between ground parts using conductive vias.

[0018] Figure 10 shows an example of electrical connection between ground parts using conductive vias.

[0019] The terms used in this disclosure are used only to describe specific embodiments and may not be intended to limit the scope of other embodiments. The singular expression may include plural expressions unless the context clearly indicates otherwise. Terms used herein, including technical or scientific terms, may have the same meaning as commonly understood by those of ordinary skill in the art described in this disclosure. Terms defined in general dictionaries among the terms used in this disclosure may be interpreted as having the same or similar meaning in the context of the relevant technology, and shall not be interpreted in an idealized or overly formal sense unless explicitly defined in this disclosure. In some cases, even if a term is defined in this disclosure, it cannot be interpreted to exclude embodiments of the present disclosure.

[0020] The various embodiments of the present disclosure described below illustrate a hardware-based approach as an example. However, since the various embodiments of the present disclosure include techniques utilizing both hardware and software, the various embodiments of the present disclosure do not exclude a software-based approach.

[0021] In the following description, terms referring to signals (e.g., signal, information, message, signaling), terms referring to data types (e.g., list, set, subset), terms for operational states (e.g., step, operation, procedure), terms referring to data (e.g., packet, user stream, information, bit, symbol, codeword), terms referring to resources (e.g., symbol, slot, subframe, radio frame, subcarrier, resource element (RE), resource block (RB), bandwidth part (BWP), occasion), terms referring to channels, terms referring to network entities, terms referring to components of devices, etc. are examples for convenience of description. Therefore, the present disclosure is not limited to the terms described below, and other terms having equivalent technical meanings may be used.

[0022] Terms referring to parts of electronic devices used in the following description (e.g., insulating plate, substrate, PCB (printed circuit board), FPCB (flexible PCB), module, antenna, antenna element, antenna element, circuit, amplifier circuit, processor, chip, component, device), terms referring to the shape of parts (e.g., opening, structure, structure, support, contact, protrusion), terms referring to connections between structures (e.g., wire, wiring, pattern, feed line, data line, conductive part, conductive part, conductive member, connection part, connection, contact, support, contact structure, conductive member, assembly), terms referring to components of circuits (e.g., PCB, FPCB, signal line, feed line, data line, RF signal line, antenna line, amplifier circuit, RF path, filter, RF module, RF circuit, splitter, divider, coupler, combiner, conductive pattern, matching circuit, matching pattern, impedance matching pattern, The terms "challenging part" and "etc." are provided for convenience of explanation. Therefore, the present disclosure is not limited to the terms described below, and other terms having equivalent technical meanings may be used. In addition, the terms "...part", "...machine", "...object", "...body", etc. used below may mean at least one shape structure or a unit that processes a function.

[0023] In addition, in the present disclosure, expressions such as "more than" or "less than" may be used to determine whether a specific condition is satisfied or fulfilled, but this is merely a description for expressing an example and does not exclude descriptions such as "more than" or "less than." A condition described as "more than" may be replaced with "more than," a condition described as "less than" may be replaced with "less than," and a condition described as "more than and less than" may be replaced with "more than and less than." In addition, hereinafter, "A" to "B" mean at least one of elements from A (including A) to B (including B). hereinafter, "C" and / or "D" mean at least one of "C" or "D," that is, including {"C", "D", "C" and "D"}.

[0024] Although the present disclosure describes various embodiments using terms used in some communication standards (e.g., 3rd Generation Partnership Project (3GPP), European Telecommunications Standards Institute (ETSI), extensible radio access network (xRAN), open-radio access network (O-RAN), etc.), these are merely examples for explanation. The various embodiments of the present disclosure can be easily modified and applied to other communication systems.

[0025] Figure 1 illustrates a wireless communication system. The wireless communication environment of Figure 1 exemplifies a base station (110) and a terminal (120) as some of the nodes utilizing a wireless channel.

[0026] Referring to FIG. 1, a base station (110) is a network infrastructure that provides wireless access to a terminal (120). The base station (110) has coverage based on the distance at which it can transmit a signal. In addition to the base station, the base station (110) may be referred to as an 'access point (AP)', 'eNodeB (eNB)', '5th generation node', '5G NodeB (NB)', 'wireless point', 'transmission / reception point (TRP)', MMU (Massive MIMO (multiple input multiple output) Unit), 'access unit', 'distributed unit (DU)', 'transmission / reception point (TRP)', 'radio unit (RU), remote radio head (RRH)' or other terms having equivalent technical meanings. The base station (110) may transmit a downlink signal or receive an uplink signal.

[0027] The terminal (120) is a device used by a user and performs communication with the base station (110) via a wireless channel. In some cases, the terminal (120) may be operated without the involvement of the user. That is, the terminal (120) is a device that performs machine type communication (MTC) and may not be carried by the user. The terminal (120) may be referred to as a 'user equipment (UE)', a 'mobile station', a 'subscriber station', a 'customer premises equipment (CPE)', a 'remote terminal', a 'wireless terminal', an 'electronic device', a 'vehicle terminal', a 'user device', or other terms having an equivalent technical meaning thereto.

[0028] In a communication system, impedance matching may be used to transfer RF signals from one RF component to another. For example, if a first RF component (e.g., a power amplifier) ​​and a second RF component (e.g., an antenna) are directly connected, and the characteristic impedance at an end of the first RF component is different from the characteristic impedance at an end of the second RF component, an impedance mismatch may occur. Such an impedance mismatch may not only cause loss due to reflected waves, but also distort the signal. To achieve impedance matching between RF components, a circuit for impedance matching (hereinafter, referred to as a matching circuit) may be arranged between the two RF components. In one embodiment, the matching circuit may include a conductive pattern formed on a printed circuit board (PCB). The conductive pattern and the ground of the PCB may be used for the matching circuit. As an electronic device including the above matching circuit, the base station (110) or terminal (120) of FIG. 1 can be used. In addition, in addition to the base station (110) or terminal (120), any electronic device including a PCB can be understood as an electronic device according to embodiments of the present disclosure. For example, the electronic device can be equipment (e.g., (e.g., RU)) that performs some of the functions of the base station (110), separate wireless equipment connected to the base station, or RF equipment used for other communications.

[0029] FIG. 2a illustrates an example of an electronic device (200) (e.g., base station (110), terminal (120), RU, MMU) including a matching circuit.

[0030] Referring to FIG. 2A, an electronic device (200) may include a source (210), a load (220), and a matching circuit (230). One end of the source (210) may have a first impedance. One end of the load (220) may have a second impedance. For example, the source (210) may be an RF transceiver and the load (220) may be an antenna. For example, the source (210) may be a power amplifier circuit and the load (220) may be an antenna. For example, the source (210) may be a power amplifier circuit and the load (220) may be an RF filter. For example, the source (210) may be an RF signal generator and the load (220) may be an amplifier circuit. For example, the source (210) may be a power supply circuit and the load (220) may be a powered device. Assuming that a signal is transmitted from a source (210) to a load (220), an impedance (e.g., the first impedance) at one end (e.g., an output end) of the source (210) may be referred to as an output impedance. A signal from the source (210) may be input to the load (220) through a matching circuit (230). An impedance (e.g., the second impedance) at one end (e.g., an input end) of the load (220) may be referred to as an input impedance. Since the first impedance and the second impedance are different, impedance matching may be required. The impedance matching may be performed to reduce reflection due to an impedance difference between the output end of the source (210) and the input end of the load (220). For the above impedance matching, a matching circuit (230) may be placed between the source (210) and the load (220). The matching circuit (230) may connect the source (210) and the load (220). The matching circuit (230) may be referred to as an impedance matching circuit, an impedance matching network, a matching network circuit, an impedance converter, an impedance conversion circuit, and / or equivalent technical terms in addition to the matching circuit.

[0031] The matching circuit (230) may include one or more components for impedance matching. For example, the matching circuit (230) may include a conductive pattern. The conductive pattern may be formed on one surface of a PCB. The conductive pattern may include one or more microstrip lines. The gap between the ground of the PCB and the conductive pattern may function as a capacitor, and the length of the conductive pattern on one surface of the PCB may function as an inductor. For example, the matching circuit (230) may include one or more elements. The one or more elements may include at least one of an inductor, a capacitor, and / or a resistor.

[0032] FIG. 2B illustrates an example of a printed circuit board (PCB) assembly (250) including a matching circuit. The PCB assembly (250) may represent a set of a PCB substrate and one or more components and / or circuits disposed on the PCB substrate. An electronic device (200) according to embodiments of the present disclosure may include the PCB assembly (250). For example, a base station (e.g., base station (110)) may include a digital unit (DU) for digital signal processing and a radio unit (RU) for RF signal processing. The RU may be configured to receive a digital signal from the DU and convert the digital signal into an RF signal. The RU may include a power amplifier circuit for amplifying the RF signal to transmit the RF signal through an antenna.

[0033] Referring to FIG. 2B, the PCB assembly (250) may include a power amplification circuit (211). For example, the power amplification circuit (211) may include one or more transistors. For example, the power amplification circuit (211) may include a gallium nitride (GaN) transistor. For example, the power amplification circuit (211) may include a lateral double diffused metal-oxide-semiconductor field effect transistor (LDMOS). The power amplification circuit (211) may be referred to as a source (e.g., source (210) of FIG. 2A) for impedance matching. For example, the power amplification circuit (211) may be a multi-stage amplifier including a pre-drive amplifier, a drive amplifier, and / or a final amplifier (or may be referred to as a main amplifier). The higher the peak power of the power amplification circuit (211), the more current flows. To increase the amount of current, the output impedance of the power amplifier circuit (211) can be lowered.

[0034] The PCB assembly (250) may include an RF component (221). For example, the RF component (221) may be an antenna. For example, the RF component (221) may be an RF filter. For example, the RF component (221) may be an RF connector. The RF component (221) may be designed to have a reference impedance. As an example, the reference impedance may be about 50 ohms. As a non-limiting example, the reference impedance may be about 75 ohms. The RF component (221) may be referred to as a load (e.g., load (220) of FIG. 2A) for impedance matching. As the impedance difference between a source (e.g., source (210)) and a load (e.g., load (220)) increases, a reflected wave increases, and thus, loss in the power transmission path may increase. To reduce this loss, a matching circuit (230) for impedance matching may be connected to the output terminal of the power amplification circuit (211).

[0035] The PCB assembly (250) may include a matching circuit (230). The impedance of the power amplifier circuit (211) may be converted through the matching circuit (230). The converted impedance may be converted to a level equivalent to the load impedance of the high RF component (221), so that maximum power transmission may be achieved. According to one embodiment, the matching circuit (230) may include a conductive pattern (231) on a PCB (260). The PCB (260) may represent a substrate on which components of the electronic device (101) are arranged. The PCB (260) may include a ground layer and a dielectric portion (or dielectric layer(s)) arranged on the ground layer. The conductive pattern (231) may be formed as a transmission line used to transmit a signal on a layer corresponding to the dielectric portion. The conductive pattern (231) may include one or more microstrip lines formed on the PCB (260). The one or more microstrip lines may be arranged based on the direction of propagation of the signal.

[0036] The conductive pattern (231) can be used for impedance matching between the power amplification circuit (211) and the RF component (221). The conductive pattern (231) can be used for impedance conversion between the power amplification circuit (211) and the RF component (221). The conductive pattern (231) can be used to convert the output impedance of the power amplification circuit (211) into a value corresponding to the load impedance of the RF component (221) (e.g., a value corresponding to the complex conjugate of the load impedance for maximum power transfer). The characteristic impedances of the microstrip lines of the conductive pattern (231) can be used for impedance conversion. As a non-limiting example, other components besides the conductive pattern (231) can be used as a component of the matching circuit (230) for impedance matching (or impedance conversion). In one embodiment, the matching circuit (230) may include one or more elements (233). The one or more elements (233) may include a resistor, an inductor, and / or a capacitor. Each element of the one or more elements (233) may be disposed within the PCB (260) substrate as a lumped element. As a non-limiting example, the conductive pattern (231) may include an additional line portion (235) in addition to the one or more microstrip lines. In one embodiment, the line portion (235) may correspond to a stub connected to a microstrip line. For example, a stub having one end connected to a microstrip line and the other end open may be configured to provide inductance or capacitance.

[0037] The higher the output of the transistor (e.g., the transistor of the power amplifier circuit (211)) and the lower the operating frequency, the longer the wavelength may be. The transistor may provide an output impedance with a relatively low impedance (e.g., an impedance lower than a reference impedance (e.g., 50 ohms)) for a long wavelength and / or high output. As the output impedance of the transistor decreases, the line width of a line portion (e.g., a portion of the conductive pattern (231)) connected to the transistor may become wider.

[0038] Figure 3 is a diagram for explaining the impedance of a conductive pattern.

[0039] Referring to FIG. 3, a conductive pattern (310) may be placed on a PCB (300). The PCB (300) may include a ground layer (320) and a dielectric portion (330). Layers of the dielectric portion (330) may be stacked on the ground layer (320). The conductive pattern (310) may include microstrip lines. Each microstrip line may be a transmission line and have a characteristic impedance. For example, the characteristic impedance may be a permittivity (ε) of a material constituting the dielectric portion (330). r ), the thickness (340) (h) of the PCB (300), and / or the line width (350) (w) of a portion of the conductive pattern (310). For example, the characteristic impedance may be determined based on the following mathematical equation.

[0040]

[0041]

[0042]

[0043] represents the characteristic impedance in free space.

[0044] Referring to the mathematical formulas described above, in order to configure a matching circuit (e.g., matching circuit (230)) for a power amplification circuit (e.g., power amplification circuit (211) of FIG. 2b), the characteristic impedance of the conductive pattern (310) is determined by the dielectric constant (ε) of the PCB material used. r ) and the thickness (h) of the PCB, and / or the line width (w) of the conductive pattern (310). The dielectric constant (ε) of the material of the PCB (300) r ) and the ground layer (320), the line width of the conductive pattern (310) can be determined according to the required characteristic impedance. Referring to [Mathematical Expression 1] and [Mathematical Expression 2], as the required characteristic impedance is lower, the line width required to provide the characteristic impedance can be wider. As an example, let's assume a transistor in which a carrier amplifier (e.g., a carrier transistor) and a peaking amplifier (e.g., a peaking transistor) are implemented in one package in a Doherty power amplifier structure. The size of the matching circuit may inevitably increase due to the limitation of the line width that can be implemented depending on the gap between the carrier amplifier and the peaking amplifier. In addition, if a material having a high permittivity is used or the thickness is reduced in order to reduce the line width of the characteristic impedance, the line width of the part connected to the reference impedance of the load (e.g., the load (220)) also decreases, so that the output power may be limited. To address / alleviate the aforementioned issues, embodiments of the present disclosure describe a technique for reducing the area of ​​a conductive pattern formed on a substrate through a PCB structure having a multilayer ground. The conductive pattern of the matching circuit (230) is described below with reference to FIGS. 4 to 7 .

[0045] Fig. 4 shows an example of a matching circuit (e.g., matching circuit (230)) using a multi-layer ground.

[0046] Referring to FIG. 4, the matching circuit (230) may include a PCB (400) and a conductive pattern (410). The PCB (400) may include a plurality of layers. For example, the plurality of layers may include a first layer (401), a second layer (402), and a third layer (403). The layers may be stacked based on one direction (e.g., the (+) z-axis direction). The first layer (401), the second layer (402), and the third layer (403) may be stacked in that order. The PCB (400) may have a first surface (e.g., a surface parallel to the xy plane) and a second surface opposite the first surface. The PCB (400) may include a first layer (401) corresponding to the first surface. The first layer (401) may be referred to as a bottom layer from a side located at the bottom of the PCB (400). The PCB (400) may include a third layer (403) corresponding to the second surface. The third layer (403) may be referred to as a top layer in terms of being located at the top of the PCB (400). At least a portion of the first layer (401) may include a ground portion. For example, the first layer (401) may entirely correspond to the ground portion, and the first layer (401) may be referred to as a ground layer. The first layer (401) may have a first ground portion (421). At least a portion of the second layer (402) may include a ground portion. For example, a portion of the second layer (402) may correspond to the ground portion. The second layer (402) may have a second ground portion (422). In one embodiment, the area of ​​the second ground portion (422) of the second layer (402) may be smaller than the area of ​​the first ground portion (421) of the first layer (401). In one embodiment, the second ground portion (422) and the first ground portion (421) may be electrically connected.To provide the same ground potential, the first ground portion (421) and the second ground portion (422) may be electrically connected through a conductive member (not shown) (e.g., a conductive via, an edge plate). The connection between the first ground portion (421) and the second ground portion (422) is described in detail with reference to FIGS. 8, 9A, 9B, and 10.

[0047] A conductive pattern (410) may be formed on one side (e.g., a side facing the (+) z-axis direction) of a PCB (400). For the conductive pattern (410), reference may be made to the description of the conductive pattern (231). For the characteristic impedance of the conductive pattern (410), reference may be made to the design principles of the conductive pattern (310) exemplified by [Mathematical Formula 1] and [Mathematical Formula 2]. The conductive pattern (410) may include a first portion (411), a second portion (412), and a third portion (413). The first portion (411) may include a first end (410a) of the conductive pattern (410). The second portion (412) may include a second end (410b) of the conductive pattern (410). The third portion (413) may be disposed between the first portion (411) and the second portion (412). The conductive pattern (410) may be disposed as a matching circuit (230) between a source (e.g., the source (210) of FIG. 2A, the power amplifier circuit (211) of FIG. 2B) and a load (e.g., the load (220) of FIG. 2A, the RF component (221) of FIG. 2B). The conductive pattern (410) may be used as a path for transmitting signals. The signals may flow from a first end (410a) of the conductive pattern (410) to a second end (410b). The conductive pattern (410) may include transmission lines (e.g., microstrip lines) having various line widths for impedance conversion. The line width of each transmission line may represent the width of the corresponding transmission line. As a non-limiting example, the line width may represent the length of a conductor constituting the transmission line on an axis perpendicular to the direction of signal propagation. The line width may represent the area of ​​a portion of a conductive pattern formed on one surface of a PCB. For example, a first portion (411) may correspond to a transmission line having a first line width (451). For example, a second portion (412) may correspond to a transmission line having a second line width (452). For example, a third portion (413) may correspond to a transmission line having a third line width (453).According to one embodiment, portions of the conductive pattern (410) (e.g., first portion (411), second portion (412), and third portion (413)) may be arranged in an order of decreasing line width based on the direction of signal propagation (e.g., first portion (411), third portion (413), and second portion (412) order).

[0048] The conductive pattern (410) may be used as a component of the matching circuit (230). The matching circuit (230) may include the conductive pattern (410) in which portions having a plurality of characteristic impedances are connected in series. Each of the portions may correspond to a transmission line. In other words, the conductive pattern (410) formed on the upper layer (e.g., the third layer (403)) of the PCB (400) having a plurality of layers may include lines for providing a plurality of characteristic impedances. A first end (410a) of the conductive pattern (410) may be connected to a source (e.g., a power amplifier circuit (211), a transistor). A second end (410b) of the conductive pattern (410) may be connected to a load (e.g., an RF component (221), an RF filter, an antenna). For example, when the output impedance of the transistor is lower than the reference impedance of the load (e.g., 50 ohms, 75 ohms), the characteristic impedance of the conductive pattern (410) may sequentially increase in the direction of signal propagation (e.g., (+) y-axis direction) (as the characteristic impedance increases, the line width decreases). The characteristic impedance may increase in the order of the characteristic impedance of the first portion (411), the characteristic impedance of the third portion (413), and the characteristic impedance of the second portion (412). The characteristic impedance of the first portion (411) may be higher than the characteristic impedance of the second portion (412). Referring to [Mathematical Formula 1] and [Mathematical Formula 2], if the material of the PCB (400) is the same material and the distance between the first portion (411) and the ground is the same or equivalent to the distance between the second portion (412) and the ground, the first line width (451) of the first portion (411) may be wider than the second line width (452) of the second portion (412). The line width of the first portion (411) may be formed relatively wide to provide low characteristic impedance.

[0049] As communication technology advances, a large number of RF components (e.g., filters, lines, antennas, chips) may be required. To mount a large number of components within a limited area of ​​a PCB (400), efficient space utilization may be required. However, a wide line width may limit the arrangement of components on one surface of the PCB (400). To alleviate this problem, the present disclosure describes a technique for providing low characteristic impedance while reducing the line width of a conductive pattern in a specific portion (e.g., a first portion (411)). A method of reducing the substrate thickness of the PCB (400) or using a material having a high permittivity can reduce not only the line width of the first portion (411) (including the first end (410a) of the conductive pattern (410)) where relatively low impedance is required, but also the line width of the second portion (412) (including the second end (410b) of the conductive pattern (410)) where relatively high impedance is required. However, a line width less than a certain width may cause unstable impedance matching in the second portion (412). Therefore, the present disclosure describes a technique for reducing the line width of the first portion (411) while maintaining the matching characteristics in the second portion (412).

[0050] If only a ground layer (e.g., a first ground portion (421) of a first layer (401)) is placed on the PCB (400), the distance between the conductive pattern (410) and the ground can be fixed. Due to the fixed distance, the characteristic impedances of different ends of the conductive pattern (410) (e.g., a first end (410a), a second end (410b)) depend only on the line width. Therefore, as the difference between the impedance at the first end (410a) and the impedance at the second end (410b) increases, the difference between the line width of the first portion (411) and the line width of the second portion (412) can increase. Even if the difference between the impedance at the first end (410a) and the impedance at the second end (410b) is large, in order to relatively reduce the influence of the line width, the PCB (400) of the present disclosure may include ground portions formed across a plurality of layers. In other words, the PCB (400) may include a plurality of layers having ground portions. As the layer on which the ground corresponding to the characteristic impedance is located changes, the line width of the line can be adjusted according to the dielectric constant and thickness of the material of the PCB (400).

[0051] In order to reduce the line width in the first portion (411), a structure for narrowing the distance between the first portion (411) and the ground may be applied. A second layer (402) having a second ground portion (422) may be positioned between the first layer (401) and the third layer (403). The thickness of the PCB (400) (e.g., the third height (443) from the first layer (401) to the upper layer (403)) may be divided into a first height (441) between the first layer (401) and the second layer (402) and a second height (442) between the second layer (402) and the third layer (403). The characteristic impedance of the first portion (411) can be determined based on the second height (442) corresponding to the distance between the first portion (411) and the second ground portion (422), the permittivity (432) of the material between the first portion (411) and the second ground portion (422), and the line width of the first portion (411). The characteristic impedance of the second portion (412) can be divided into the impedance of the portion adjacent to the first ground portion (421) (hereinafter, “one portion”) and the impedance of the portion adjacent to the second ground portion (422) (hereinafter, “remaining portion”). The impedance of the one portion can be determined based on the second height (442), the permittivity (432), and the line width of the second portion (412). The impedance of the residual portion may be determined based on a third height (443) corresponding to the distance between the residual portion of the second portion (412) and the first ground portion (421), a permittivity of the material between the second portion (412) and the first ground portion (421) (e.g., a total permittivity considering both the first permittivity (431) and the second permittivity (432), and a line width of the second portion (412). In FIG. 4, the permittivity (431) and the permittivity (432) are independently illustrated, but the embodiments of the present disclosure are not limited thereto. For example, the PCB (400) may be composed of one material. The permittivity (431) and the permittivity (432) are permittivities of the material and may be the same.

[0052] The distance between the first portion (411) and the ground may correspond to the second height (442) rather than the third height (443). Since the second height (442) is smaller than the third height (443), it can be understood that the line width in the first portion (411) is relatively reduced due to the arrangement of the second ground portion (422). Referring to [Mathematical Formula 1] and [Mathematical Formula 2], by reducing the line width by the distance between the narrowed ground portion (e.g., the second ground portion (422)) and the conductive pattern (410) (e.g., the first portion (411)), an equivalent level of impedance can be provided. According to embodiments of the present disclosure, in order to reduce the deviation of line widths of two ends (e.g., a first end (410a) and a second end (410b)) of a conductive pattern (e.g., a conductive pattern (410)) within one substrate (e.g., a PCB (400)), a second ground portion (422) may be disposed below a first portion (411) (e.g., an area corresponding to the (-) z-axis direction), and a first ground portion (421) may be disposed below at least a portion of the second portion (412) (e.g., an area corresponding to the (-) z-axis direction).

[0053] Although FIG. 4 illustrates an example in which the first ground portion (421) is disposed under a portion of the second portion (412) and the first ground portion (421) is disposed under another portion of the second portion (412), the embodiments of the present disclosure are not limited thereto. As a non-limiting example, only the first ground portion (411) may be disposed under the second portion (412). Although FIG. 4 illustrates that the first ground portion (421) is disposed under the third ground portion (413), the embodiments of the present disclosure are not limited thereto. For example, the second ground portion (422) may be disposed under the third ground portion (413). For example, the first ground portion (421) may be disposed under a portion of the third portion (413), and the second ground portion (422) may be disposed under another portion of the third portion (413).

[0054] FIGS. 5A to 5C illustrate examples of a matching circuit (e.g., a matching circuit (230)) using a multilayer ground. FIG. 5A is a drawing of the conductive pattern (410) of FIG. 4 viewed in one direction (e.g., in the (-) z-axis direction). FIG. 5B illustrates an equivalent circuit of the conductive pattern (410) of FIG. 4. FIG. 5C is a drawing of the conductive pattern (410) of FIG. 4 viewed in another direction (e.g., in the (-) x-axis direction). The same reference numerals may be used for the same description.

[0055] Referring to FIG. 5A, the conductive pattern (410) may include a first portion (411), a second portion (412), and a third portion (413). The first portion (411) may include a first end (410a) of the conductive pattern (410). The second portion (412) may include a second end (410b) of the conductive pattern (410). The third portion (413) may be disposed between the first portion (411) and the second portion (412). The first end (410a) may be connected to a power amplification circuit (211). The second end (410b) may be connected to an RF component (221). The first portion (411) may correspond to a transmission line having a first line width (451). The second portion (412) may correspond to a transmission line having a second line width (452). The third portion (413) may correspond to a transmission line having a third line width (453).

[0056] Referring to Fig. 5b, an LC circuit composed of an inductor and a capacitor may be used as an example of a matching circuit (230). The transmission line may be understood as an inductor. Each portion of the conductive pattern (410) may provide inductance. The transmission line and the ground may be understood as conductors of the capacitor. Capacitance may be provided depending on the distance between the conductors. The size of the capacitance may be proportional to the distance between a portion of the conductive pattern (410) and the ground. For example, a first portion (411) of the conductive pattern (410) may correspond to a first inductor (511a). The first portion (411) and a second ground portion (422) may correspond to a second capacitor (511b). For example, a second portion (412) of the conductive pattern (410) may correspond to a second inductor (512a). The coupling connection between a part of the second portion (412) and the first ground portion (421) and the coupling connection between the remaining part of the second portion (412) and the second ground portion (422) may correspond to the second capacitor (512b). For example, the third portion (413) of the conductive pattern (410) may correspond to the third inductor (513a). The third portion (413) and the second ground portion (422) may correspond to the third capacitor (513b). Based on the LC circuit illustrated in FIG. 5b, a matching circuit between the power amplifier circuit (211) and the RF component (221) may be designed.

[0057] Referring to FIG. 5c, the PCB (400) may include a first layer (401), a second layer (402), and a third layer (403). The layers may be stacked based on one direction (e.g., the (+) z-axis direction). The first layer (401), the second layer (402), and the third layer (403) may be stacked in that order. The first layer (401) may have a first ground portion (421). The second layer (402) may have a second ground portion (422). According to one embodiment, the area of ​​the second ground portion (422) of the second layer (402) may be smaller than the area of ​​the first ground portion (421) of the first layer (401). For example, the area of ​​the first ground portion (421) on the xy plane may be larger than the area of ​​the second ground portion (422), and the height of the first ground portion (421) may be lower than the height of the second ground portion (422). As described through the equivalent circuit of FIG. 5b, the distance between the conductive pattern (410) and the ground may affect the capacitance. Since the conductive pattern (410) is formed on the same layer (e.g., the third layer (403), the upper layer), in order to provide different capacitances through the distance between the conductive pattern (410) and the ground, the potential at the ground must be the same. In other words, the potential of the first ground portion (421) and the potential of the second ground portion (422) may be the same. For the same potential, the first ground portion (421) and the second ground portion (422) may be electrically connected. In one embodiment, the first ground portion (421) and the second ground portion (422) may be electrically connected via a conductive member (590) (e.g., a conductive via, a conductive plate).

[0058] A PCB (e.g., PCB (400)) according to embodiments of the present disclosure may include ground portions arranged in multiple layers. In one embodiment, a line width of a conductive portion (e.g., a first portion (411)) of a conductive pattern (410) may depend on a ground position. By arranging the ground portion in a layer (e.g., a second layer (402)) between a ground layer (e.g., a first layer (401)) and an upper layer (e.g., a third layer (403)) on which the conductive pattern (410) is formed, a relatively small line width can be implemented while providing a required characteristic impedance. For example, assuming that a characteristic impedance is provided with a first line width at a first height corresponding to a distance between conductive portions from a ground, the characteristic impedance may be provided with a second line width at a second height corresponding to a distance between conductive portions from another ground. The second height may be lower than the first height, and the second line width may be narrower than the first line width. As the height from the conductive portion (e.g., the first portion (411) of the conductive pattern (410)) and the ground (e.g., the second ground portion (422)) decreases, the line width of the conductive portion may be implemented to be narrower.

[0059] In one embodiment, the line width of a conductive portion (e.g., the first portion (411)) of the conductive pattern (410) may depend on the permittivity. For example, if the permittivity (432) is greater than the overall permittivity (e.g., the permittivity considering both the first permittivity (431) and the second permittivity (432), the line width required to provide an impedance of the same size may be narrowed due to the high permittivity. For example, assuming that a characteristic impedance is provided by a first permittivity and a first line width between a ground and a conductive portion, the characteristic impedance may be provided by a second permittivity and a second line width between another ground and a conductive portion. The second permittivity may be higher than the first permittivity, and the second line width may be narrower than the first line width. By using a material having a higher permittivity, the line width of the conductive portion may be implemented to be narrower. Through the above-described principle, a small and optimized conductive pattern (410) of a matching circuit (230) for impedance matching can be implemented.

[0060] Although a conductive pattern (410) including line segments having three different line widths is illustrated in FIGS. 4 and 5A to 5C, embodiments of the present disclosure are not limited thereto. For example, the conductive pattern (410) may include line segments having two line widths and / or line segments having four line widths.

[0061] Although FIGS. 4 and 5A to 5C illustrate a structure in which a ground layer is positioned at the bottom of the PCB (400), embodiments of the present disclosure are not limited thereto. For example, the ground layer may correspond to an intermediate layer different from the bottom layer and top layer of the layers of the PCB (400). As a non-limiting example, the ground portion may be formed only in a portion of the layer.

[0062] Although FIGS. 4 and 5A to 5C illustrate a pattern including portions arranged in one direction (e.g., the (+) y-axis direction) on one surface of a PCB (400), embodiments of the present disclosure are not limited thereto. The conductive pattern (410) may include transmission lines having various directions to connect the power amplifier circuit (211) and the RF component (221).

[0063] Figure 6 illustrates another example of a matching circuit utilizing a multi-layer ground. The same reference numbers may be used for the same description.

[0064] Referring to FIG. 6, the conductive pattern (410) may include a first portion (411) and a second portion (412). The first portion (411) may include a first end (410a) of the conductive pattern (410). The second portion (412) may include a second end (410b) of the conductive pattern (410). Unlike FIG. 4, the conductive pattern (410) may include transmission lines (e.g., microstrip lines) having two different line widths. The first portion (411) may correspond to a transmission line having a first line width (451). The second portion (412) may correspond to a transmission line having a second line width (452). The conductive pattern (410) may be positioned as a matching circuit (230) between a source (e.g., the source (210) of FIG. 2a, the power amplifier circuit (211) of FIG. 2b) and a load (e.g., the load (220) of FIG. 2a, the RF component (221) of FIG. 2b). A first end (410a) of the conductive pattern (410) may be connected to the source (e.g., the power amplifier circuit (211), a transistor). A second end (410b) of the conductive pattern (410) may be connected to a load (e.g., the RF component (221), an RF filter, an antenna).

[0065] Fig. 7 illustrates another example of a matching circuit utilizing a multilayer ground μ. The same reference numerals may be used for the same description. Fig. 7 illustrates a PCB (400) having three ground portions, unlike the two ground portions of Fig. 4.

[0066] Referring to FIG. 7, the PCB (400) may include ground portions corresponding to three layers. The PCB (400) may include a plurality of layers. For example, the plurality of layers may include a first layer (401), a second layer (402), a third layer (403), and a fourth layer (404). The layers may be stacked based on one direction (e.g., the (+) z-axis direction). The layers may be stacked in the following order: the first layer (401), the second layer (402), the third layer (403), and the fourth layer (404). The PCB (400) may include a first layer (401) corresponding to the first surface. The PCB (400) may include a fourth layer (404) corresponding to the second surface. The fourth layer (404) may be referred to as a top layer from the side positioned at the top of the PCB (400).

[0067] At least a portion of the first layer (401) may include a first ground portion (421). The first layer (401) may have a first ground portion (421). At least a portion of the second layer (402) may include a second ground portion (422). The second layer (402) may have a second ground portion (422). At least a portion of the third layer (403) may include a third ground portion (423). The third layer (403) may have a first ground portion (423). To provide various capacitances depending on the distance from the ground, the area of ​​the ground portion may become smaller as the height increases. For example, the area of ​​the second ground portion (422) may be smaller than the area of ​​the first ground portion (421). The area of ​​the third ground portion (423) may be smaller than the area of ​​the second ground portion (422). When the matching circuit (230) is viewed in one direction (e.g., in the (-) z-axis direction), the conductive pattern (410) may overlap different ground portions. That is, the ground portion (e.g., the third ground portion (423)) that overlaps the first portion (411) of the conductive pattern (410) and the ground portion (e.g., the first ground portion (421)) that overlaps the second portion (412) may be different. The first portion (411) may form a characteristic impedance with the third ground portion (423), which is the closest ground portion among the plurality of ground portions. At least a portion of the third portion (413) may form a characteristic impedance with the first ground portion (421), which is the closest ground portion among the plurality of ground portions.

[0068] The PCB (400) according to embodiments of the present disclosure may have a structure that provides a multi-layer ground. As a non-limiting example, a structure in which some layers (e.g., the second layer (402) does not include a second ground portion (422) in the laminated structure of the PCB (400) of FIG. 7 may also be understood as an embodiment of the present disclosure.

[0069] Figures 8a and 8b show examples of electrical connections between ground portions (e.g., first ground portion (441), second ground portion (442)) using plates.

[0070] Referring to FIG. 8A, the PCB (400) may include ground portions formed in a plurality of layers. For example, the PCB (400) may include a first ground portion (421) formed in a first layer (401) and a second ground portion (422) formed in a second layer (402). To provide the same ground potential, the first ground portion (421) and the second ground portion (422) may be electrically connected through a conductive plate (800). For example, the conductive plate (800) may represent a plating area formed at an edge of the PCB (400) through edge plating. As an example, the conductive plate (800) may be formed with a plane facing the direction of signal propagation (e.g., xz plane).

[0071] Referring to FIG. 8B, the PCB (400) may include ground portions formed in multiple layers. For example, the PCB (400) may include a first ground portion (421) formed in a first layer (401) and a second ground portion (422) formed in a second layer (402). To provide the same ground potential, the first ground portion (421) and the second ground portion (422) may be electrically connected through a conductive plate (850). For example, the conductive plate (850) may represent a plating area formed at an edge of the PCB (400) through edge plating. As an example, the conductive plate (850) may be formed on one side (e.g., yz plane) along the direction of signal propagation.

[0072] FIG. 9 shows an example of electrical connection between ground portions (e.g., first ground portion (441), second ground portion (442)) using conductive vias.

[0073] Referring to FIG. 9, the PCB (400) may include ground portions formed in a plurality of layers. For example, the PCB (400) may include a first ground portion (421) formed in a first layer (401) and a second ground portion (422) formed in a second layer (402). To provide the same ground potential, the first ground portion (421) and the second ground portion (422) may be electrically connected through at least one conductive via (900). For example, at least one conductive via (900) may be disposed between the first ground portion (421) and the second ground portion (422). As a non-limiting example, at least one conductive via (900) of vias may be arranged in a portion that forms the periphery of the conductive pattern (410) without overlapping with the conductive pattern (410) when viewed in one direction (e.g., the (-) z-axis direction).

[0074] FIG. 10 shows an example of electrical connection between ground portions (e.g., first ground portion (441), second ground portion (442)) using conductive vias.

[0075] Referring to FIG. 10, the PCB (400) may include ground portions formed in a plurality of layers. For example, the PCB (400) may include a first ground portion (421) formed in a first layer (401) and a second ground portion (422) formed in a second layer (402). The PCB (400) may include a plurality of vias. The plurality of vias may include a first set of vias (1041). The first set of vias (1041) may be disposed between the first layer (401) and the second layer (402). For example, the first set of vias (1041) may include vias (1041a) on one side (e.g., a side facing the (+) x-axis direction) and vias (1041b) on one side (e.g., a side facing the (-) x-axis direction). The plurality of vias may include a second set of vias (1042). The second set of vias (1042) may be disposed between the second layer (402) and the third layer (403). For example, the second set of vias (1042) may include vias (1042a) on one side (e.g., a side facing the (+) x-axis direction) and vias (1042b) on one side (e.g., a side facing the (-) x-axis direction). The first ground portion (421) and the second ground portion (422) may be electrically connected through the second set of vias (1042). The plurality of vias may include a third set of vias (1043). The third set of vias may be disposed between the first layer (401) and the third layer (403). For example, the third set of vias (1043) may include vias (1043a) on one side (e.g., the side facing the (+) x-axis direction) and vias (1043b) on one side (e.g., the side facing the (-) x-axis direction). The PCB (400) may include a conductive pattern (410) and ground regions (1030a, 1030b) formed on a top layer (e.g., the third layer (403)).For example, the first ground region (1030a) can provide the same ground potential as the first ground portion (421) and the second ground portion (422) through vias (1042a) and vias (1043a). For example, the second ground region (1030b) can provide the same ground potential as the first ground portion (421) and the second ground portion (422) through vias (1042b) and vias (1043b).

[0076] According to embodiments of the present disclosure, a PCB (e.g., PCB (400)) and a matching circuit (e.g., matching circuit (230)) having a conductive pattern (e.g., conductive pattern (410)) can reduce the difference in line width between a line portion having a high characteristic impedance and a line portion having a low characteristic impedance. The PCB (400) can include ground portions arranged in different layers so that the distance between the line portion having a high characteristic impedance (e.g., second portion (422)) and the ground is different from the distance between the line portion having a low characteristic impedance (e.g., first portion (411)) and the ground. Through this PCB structure, the line width can be made relatively thin, and as the area of ​​the conductive pattern (410) within the PCB (400) is reduced, the size of the matching circuit (230) can be reduced. A relatively large number of components can be arranged within a limited area.

[0077] The effects that can be obtained from the present disclosure are not limited to the effects mentioned above, and other effects that are not mentioned can be clearly understood by a person having ordinary skill in the art to which the present disclosure belongs from the description below.

[0078] In the present disclosure, a rectangular line portion is described as an example to explain the conductive pattern (410), but embodiments of the present disclosure are not limited thereto. Conductive portions having various shapes (e.g., pentagonal, circular) can be understood as a component of the conductive pattern (410). The line width in the present disclosure can represent the width in one direction of the corresponding shape (e.g., a direction perpendicular to the direction in which the corresponding line is traveling).

[0079] In embodiments of the present disclosure, an electronic device is provided. The electronic device may include a printed circuit board (PCB) including a plurality of layers; a power amplifier circuit disposed on the printed circuit board; a conductive pattern disposed on the printed circuit board; and an RF (radio frequency) component disposed on the printed circuit board. The plurality of layers may include an upper layer on which the conductive pattern is formed, a first layer having a first ground portion, and a second layer having a second ground portion between the upper layer and the first layer. An area of ​​the first ground portion may be wider than an area of ​​the second ground portion. The conductive pattern may include a first portion connected to the power amplifier circuit and a second portion connected to the RF component. A line width of the first portion may be wider than a line width of the second portion. The first portion of the conductive pattern may be adjacent to the second ground portion among the first ground portion and the second ground portion, based on a height direction of the PCB. At least a portion of the second portion of the conductive pattern may be adjacent to the first ground portion among the first ground portion and the second ground portion, based on the height direction of the PCB.

[0080] For example, the second ground portion may be disposed between the first portion of the conductive pattern and the first ground portion. The second ground portion may not be disposed between at least a portion of the second portion of the conductive pattern and the first ground portion.

[0081] For example, the conductive pattern may include one or more microstrip lines. An end of the first portion may be connected to the power amplifier circuit, and an end of the second portion may be connected to the RF component. A distance between the second ground portion and the first portion may be shorter than a distance between the first ground portion and the second portion.

[0082] For example, the electronic device may include one or more elements including at least one of a resistor, an inductor, or a capacitor. The one or more elements and the conductive pattern may be configured to convert an output impedance of the power amplification circuit into a load impedance of the RF component.

[0083] For example, the conductive pattern may include a plurality of portions having different line widths. The plurality of portions may be sequentially formed in a direction in which the line widths become narrower from the power amplifier circuit to the RF component. The plurality of portions may include the first portion and the second portion.

[0084] For example, the impedance of the conductive pattern can be determined based on the line width of each portion of the conductive pattern, the distance between the corresponding portion of the conductive pattern and the ground portion closest to the corresponding portion, and the permittivity of the material between the corresponding portion and the ground portion.

[0085] For example, the PCB may include at least one conductive via disposed between the first ground portion and the second ground portion. The first ground portion and the second ground portion may be connected via the at least one conductive via.

[0086] For example, the PCB may include a plate disposed at an edge of the PCB between the first ground portion and the second ground portion. The first ground portion and the second ground portion may be connected through the plate.

[0087] For example, the PCB may include a first substrate portion formed between the first layer and the second layer and a second substrate portion formed between the second layer and the upper layer and having a second material. The permittivity of the first material may be different from the permittivity of the second material.

[0088] For example, the characteristic impedance of the RF component may be higher than the output impedance of the power amplifier circuit. The power amplifier circuit may include a transistor. The RF component may include an RF filter, an antenna, or a connector.

[0089] In embodiments, a printed circuit board (PCB) assembly is provided. The PCB assembly may include a first RF component; a second RF component; a conductive pattern; an upper layer on which the conductive pattern is disposed; a first layer having a first ground portion; and a second layer having a second ground portion between the upper layer and the first layer. An area of ​​the first ground portion may be larger than an area of ​​the second ground portion. The conductive pattern may include a first portion for the first RF component and a second portion for the second RF component. A line width of the first portion may be larger than a line width of the second portion. The first portion of the conductive pattern may be adjacent to the second ground portion among the first ground portion and the second ground portion, based on a height direction of the PCB. At least a portion of the second portion of the conductive pattern may be adjacent to the first ground portion among the first ground portion and the second ground portion, based on a height direction of the PCB.

[0090] For example, the second ground portion may be disposed between the first portion and the first ground portion. The second ground portion may not be disposed between at least a portion of the second portion of the conductive pattern and the first ground portion.

[0091] For example, the conductive pattern may include one or more microstrip lines. An end of the first portion may be connected to the first RF component, and an end of the second portion may be connected to the second RF component. A distance between the second ground portion and the first portion may be shorter than a distance between the first ground portion and the second portion.

[0092] For example, the PCB assembly may include one or more elements including at least one of a resistor, an inductor, or a capacitor. The one or more elements and the conductive pattern may be configured to convert the impedance of the first RF component into the impedance of the second RF component.

[0093] For example, the conductive pattern may include a plurality of portions having different line widths. The plurality of portions may be sequentially formed in a direction in which the line widths become narrower from the first RF component to the second RF component. The plurality of portions may include the first portion and the second portion.

[0094] For example, the impedance of the conductive pattern can be determined based on the line width of each portion of the conductive pattern, the distance between the corresponding portion of the conductive pattern and the ground portion closest to the corresponding portion, and the permittivity of the material between the corresponding portion and the ground portion.

[0095] For example, the PCB may include at least one conductive via disposed between the first ground portion and the second ground portion. The first ground portion and the second ground portion may be connected via the at least one conductive via.

[0096] For example, the PCB may include a plate disposed at an edge of the PCB between the first ground portion and the second ground portion. The first ground portion and the second ground portion may be connected through the plate.

[0097] For example, the PCB may include a first substrate portion formed between the first layer and the second layer and a second substrate portion formed between the second layer and the upper layer and having a second material. The permittivity of the first material may be different from the permittivity of the second material.

[0098] For example, the impedance of the second RF component may be higher than the impedance of the first RF component.

[0099] In embodiments of the present disclosure, an electronic device is provided, including a printed circuit board (PCB) having a plurality of layers for use in RF (radio frequency) processing in a wireless communication system. The electronic device may include a power amplification circuit disposed on the PCB; a radio frequency (RF) component disposed on the PCB; and a conductive pattern disposed on the PCB for transmitting signals from the power amplification circuit to the RF component. The conductive pattern may be configured to perform impedance matching between an output impedance of the power amplification circuit and a load impedance of the RF component. The plurality of layers may include a first layer having a first ground portion, a second layer having a second ground portion, and a third layer having the power amplification circuit, the RF component, and the conductive pattern formed thereon. The second layer may be disposed between the first layer and the third layer. The conductive pattern may include a first line portion connected to the power amplification circuit and a second line portion connected to the RF component. The line width of the first line portion may be wider than the line width of the second line portion. At least a portion of the first line portion of the conductive pattern may be disposed on the second ground portion of the second layer. At least a portion of the second line portion of the conductive pattern may be disposed on the first ground portion of the first layer without the second ground portion of the second layer. A distance between the second ground portion and at least a portion of the first line portion of the conductive pattern may be shorter than a distance between the first ground portion and at least a portion of the second line portion of the conductive pattern.

[0100] For example, the second ground portion may be disposed between the first line portion of the conductive pattern and the first ground portion. The second ground portion may not be disposed between at least a portion of the second line portion of the conductive pattern and the first ground portion.

[0101] For example, the conductive pattern may include microstrip lines including a first microstrip line corresponding to the first line portion and a second microstrip line corresponding to the second line portion. A distance from the second ground portion to the first microstrip line may be shorter than a distance from the first ground portion to the second microstrip line.

[0102] For example, the electronic device may include one or more elements including at least one of a resistor, an inductor, or a capacitor. The one or more elements and the conductive pattern may be used for impedance matching between the power amplification circuit and the RF component.

[0103] For example, the conductive pattern may include a plurality of line portions having different line widths. The plurality of line portions may be sequentially formed in a direction in which the line widths become narrower from the power amplifier circuit to the RF component. The plurality of line portions may include the first line portion and the second line portion.

[0104] For example, the conductive pattern may include a plurality of line portions including the first line portion and the second line portion. The impedance of the corresponding line portion of the conductive pattern may be determined based on the line width of the corresponding line portion of the conductive pattern, the distance between the corresponding line portion of the conductive pattern and the ground portion closest to the corresponding portion, and the permittivity of the material between the corresponding line portion and the ground portion.

[0105] For example, the PCB may include at least one conductive via disposed between the first ground portion and the second ground portion. The first ground portion and the second ground portion may be connected via the at least one conductive via.

[0106] For example, the PCB may include a plate disposed at an edge of the PCB between the first ground portion and the second ground portion. The first ground portion and the second ground portion may be connected through the plate.

[0107] For example, the PCB may include a first substrate portion formed between the first layer and the second layer and a second substrate portion formed between the second layer and the third layer and having a second material. The permittivity of the first material may be different from the permittivity of the second material.

[0108] For example, the characteristic impedance of the RF component may be higher than the output impedance of the power amplifier circuit. The power amplifier circuit may include a transistor. The RF component may include an RF filter, an antenna, or a connector.

[0109] In embodiments of the present disclosure, a printed circuit board (PCB) assembly having a plurality of layers for use in radio frequency (RF) processing in a wireless communication system is provided. The PCB assembly may include a first ground portion disposed in a first layer among the plurality of layers; a second ground portion disposed in a second layer among the plurality of layers; a first RF component disposed in a third layer among the plurality of layers; a second RF component disposed in a third layer among the plurality of layers; and a conductive pattern disposed in the third layer among the plurality of layers and configured to transmit signals from the first RF component to the second RF component. The conductive pattern may be configured to perform impedance matching between an impedance of the first RF component and an impedance of the second RF component. The second layer may be disposed between the first layer and the third layer. The conductive pattern may include a first line portion connected to the first RF component and a second line portion connected to the second RF component. The line width of the first line portion may be wider than the line width of the second line portion. At least a portion of the first line portion of the conductive pattern may be disposed on the second ground portion of the second layer. At least a portion of the second line portion of the conductive pattern may be disposed on the first ground portion of the first layer without the second ground portion of the second layer. A distance between the second ground portion and at least a portion of the first line portion of the conductive pattern may be shorter than a distance between the first ground portion and at least a portion of the second line portion of the conductive pattern.

[0110] For example, the second ground portion may be disposed between the first line portion and the first ground portion of the conductive pattern. The second ground portion may not be disposed between the second line portion and the first ground portion of the conductive pattern.

[0111] For example, the conductive pattern may include microstrip lines including a first microstrip line corresponding to the first line portion and a second microstrip line corresponding to the second line portion. A distance from the second ground portion to the first microstrip line may be shorter than a distance from the first ground portion to the second microstrip line.

[0112] For example, the PCB assembly may include one or more components including at least one of a resistor, an inductor, or a capacitor. The one or more components and the conductive pattern may be used for impedance matching between the first RF component and the second RF component.

[0113] For example, the conductive pattern may include a plurality of line portions having different line widths. The plurality of line portions may be sequentially formed in a direction in which the line widths become narrower from the first RF component to the second RF component. The plurality of line portions may include the first line portion and the second line portion.

[0114] For example, the conductive pattern may include a plurality of line portions including the first line portion and the second line portion. The impedance of the corresponding line portion of the conductive pattern may be determined based on the line width of the corresponding line portion of the conductive pattern, the distance between the corresponding line portion of the conductive pattern and the ground portion closest to the corresponding portion, and the permittivity of the material between the corresponding line portion and the ground portion.

[0115] For example, the PCB may include at least one conductive via disposed between the first ground portion and the second ground portion. The first ground portion and the second ground portion may be connected via the at least one conductive via.

[0116] For example, the PCB may include a plate disposed at an edge of the PCB between the first ground portion and the second ground portion. The first ground portion and the second ground portion may be connected through the plate.

[0117] For example, the PCB may include a first substrate portion formed between the first layer and the second layer and a second substrate portion formed between the second layer and the third layer and having a second material. The permittivity of the first material may be different from the permittivity of the second material.

[0118] For example, the impedance of the second RF component may be higher than the impedance of the first RF component.

[0119] For one or more embodiments, at least one of the components described in one or more of the preceding drawings may be configured to perform one or more operations, techniques, processes, and / or methods as described herein. For example, a processor (e.g., a baseband processor) described herein with respect to one or more of the preceding drawings may be configured to operate according to one or more examples described herein. For another example, circuitry associated with a user equipment (UE), a base station, a network element, and the like, as described above with respect to one or more of the preceding drawings, may be configured to operate according to one or more examples described herein.

[0120] Any of the embodiments described above may be combined with any other embodiment (or combination of embodiments) unless explicitly stated otherwise. The foregoing description of one or more implementations provides examples and descriptions, but is not intended to be exhaustive or limit the scope of the embodiments to the precise forms disclosed. Modifications and variations are possible in light of the above teachings or may be learned from practicing various embodiments.

[0121] The methods according to the embodiments described in the claims or specification of the present disclosure may be implemented in the form of hardware, software, or a combination of hardware and software.

[0122] When implemented in software, a computer-readable storage medium (e.g., a non-transitory computer-readable storage medium) storing one or more programs (software modules) may be provided. The one or more programs stored in the computer-readable storage medium are configured for execution by one or more processors in an electronic device. The one or more programs include instructions that cause the electronic device to execute methods according to embodiments described in the claims or specification of the present disclosure. The one or more programs may be provided as included in a computer program product. The computer program product may be traded between sellers and buyers as a product. The computer program product may be distributed in the form of a device-readable storage medium (e.g., a compact disc read only memory (CD-ROM)) or an application store (e.g., Play Store). ™ ) or directly between two user devices (e.g., smart phones), online distribution (e.g., downloading or uploading). In the case of online distribution, at least a portion of the computer program product may be at least temporarily stored or temporarily created in a machine-readable storage medium, such as the memory of a manufacturer's server, an application store's server, or an intermediary server.

[0123] These programs (software modules, software) may be stored in random access memory, non-volatile memory including flash memory, read only memory (ROM), electrically erasable programmable read only memory (EEPROM), magnetic disc storage devices, compact disc-ROM (CD-ROM), digital versatile discs (DVDs) or other forms of optical storage devices, magnetic cassettes, or may be stored in memories formed by a combination of some or all of these. In addition, each configuration memory may include multiple copies.

[0124] Additionally, the program may be stored on an attachable storage device that is accessible via a communication network, such as the Internet, an intranet, a local area network (LAN), a wide area network (WAN), a storage area network (SAN), or a combination thereof. Such a storage device may be connected to a device implementing an embodiment of the present disclosure via an external port. Additionally, a separate storage device on the communication network may be connected to a device implementing an embodiment of the present disclosure.

[0125] In the specific embodiments of the present disclosure described above, components included in the disclosure are expressed singularly or plurally, depending on the specific embodiment presented. However, the singular or plural expressions are selected to suit the presented situation for convenience of explanation, and the present disclosure is not limited to singular or plural components. Components expressed in plural may be composed of singular elements, or components expressed in singular may be composed of plural elements.

[0126] According to embodiments, one or more of the components or operations of the aforementioned components may be omitted, or one or more other components or operations may be added. Alternatively or additionally, a plurality of components (e.g., modules or programs) may be integrated into a single component. In such a case, the integrated component may perform one or more functions of each of the plurality of components identically or similarly to those performed by the corresponding component among the plurality of components prior to the integration. According to embodiments, the operations performed by a module, program, or other component may be executed sequentially, in parallel, iteratively, or heuristically, or one or more of the operations may be executed in a different order, omitted, or one or more other operations may be added.

[0127] Meanwhile, although the detailed description of the present disclosure has described specific embodiments, it is obvious that various modifications are possible within the scope of the present disclosure.

Claims

1. In an electronic device including a printed circuit board (PCB) having multiple layers for use in RF (radio frequency) processing in a wireless communication system, A power amplifier circuit arranged on the above PCB; RF (radio frequency) components placed on the above PCB; and A conductive pattern is disposed on the PCB and configured to transmit signals from the power amplification circuit to the RF component, wherein the conductive pattern is configured to perform impedance matching between the output impedance of the power amplification circuit and the load impedance of the RF component. The plurality of layers include a first layer having a first ground portion, a second layer having a second ground portion, and a third layer on which the power amplification circuit, the RF component, and the conductive pattern are formed, The second layer is positioned between the first layer and the third layer, The conductive pattern includes a first line portion connected to the power amplification circuit and a second line portion connected to the RF component, The line width of the first line portion is wider than the line width of the second line portion, At least a portion of the first line portion of the conductive pattern is disposed on the second ground portion of the second layer, At least a portion of the second line portion of the conductive pattern is disposed on the first ground portion of the first layer without the second ground portion of the second layer, The distance between at least a portion of the second ground portion and the first line portion of the conductive pattern is shorter than the distance between at least a portion of the first ground portion and the second line portion of the conductive pattern. Electronic devices.

2. In claim 1, The second ground portion is arranged between the first line portion and the first ground portion of the conductive pattern, The second ground portion is not arranged between at least a part of the second line portion of the conductive pattern and the first ground portion. Electronic devices.

3. In claim 1, The conductive pattern includes microstrip lines including a first microstrip line corresponding to the first line portion and a second microstrip line corresponding to the second line portion, The distance from the second ground portion to the first microstrip line is shorter than the distance from the first ground portion to the second microstrip line. Electronic devices.

4. In claim 1, Further comprising one or more elements including at least one of a resistor, an inductor, or a capacitor; The one or more elements and the conductive pattern are used for impedance matching between the power amplification circuit and the RF component. Electronic devices.

5. In claim 1, The above-mentioned challenging pattern includes a plurality of line portions having different line widths, The above plurality of line portions are sequentially formed in a direction in which the line width becomes narrower from the power amplifier circuit to the RF component, The above plurality of line portions include the first line portion and the second line portion, Electronic devices.

6. In claim 1, The above conductive pattern includes the plurality of line portions including the first line portion and the second line portion, The impedance of the corresponding line portion of the conductive pattern is determined based on the line width of the corresponding line portion of the conductive pattern, the distance between the corresponding line portion of the conductive pattern and the ground portion closest to the corresponding portion, and the permittivity of the material between the corresponding line portion and the ground portion. Electronic devices.

7. In claim 1, the PCB includes at least one conductive via disposed between the first ground portion and the second ground portion, The first ground portion and the second ground portion are connected through the at least one conductive via, Electronic devices.

8. In claim 1, The PCB includes a plate disposed at an edge of the PCB between the first ground portion and the second ground portion, The first ground portion and the second ground portion are connected through the plate, Electronic devices.

9. In claim 1, The PCB includes a first substrate portion formed between the first layer and the second layer and a second substrate portion formed between the second layer and the third layer and having a second material. The dielectric constant of the first material is different from the dielectric constant of the second material. Electronic devices.

10. In claim 1, The characteristic impedance of the above RF component is higher than the output impedance of the above power amplifier circuit, The above power amplifier circuit includes a transistor, The above RF component includes an RF filter, antenna, or connector. Electronic devices.

11. In a printed circuit board (PCB) assembly having multiple layers for use in RF (radio frequency) processing in a wireless communication system, A first ground portion arranged in a first layer among the above plurality of layers; A second ground portion arranged in a second layer among the above multiple layers; A first RF component arranged in a third layer among the above multiple layers; A second RF component arranged in a third layer among the plurality of layers; and A conductive pattern is disposed on a third layer among the plurality of layers and is configured to transmit signals from the first RF component to the second RF component, wherein the conductive pattern is configured to perform impedance matching between an impedance of the first RF component and an impedance of the second RF component. The second layer is positioned between the first layer and the third layer, The conductive pattern includes a first line portion connected to the first RF component and a second line portion connected to the second RF component, The line width of the first line portion is wider than the line width of the second line portion, At least a portion of the first line portion of the conductive pattern is disposed on the second ground portion of the second layer, At least a portion of the second line portion of the conductive pattern is disposed on the first ground portion of the first layer without the second ground portion of the second layer, The distance between at least a portion of the second ground portion and the first line portion of the conductive pattern is shorter than the distance between at least a portion of the first ground portion and the second line portion of the conductive pattern. PCB assembly.

12. In claim 11, The second ground portion is arranged between the first line portion and the first ground portion of the conductive pattern, The second ground portion is not arranged between the second line portion of the above conductive pattern and the first ground portion. PCB assembly.

13. In claim 11, The conductive pattern includes microstrip lines including a first microstrip line corresponding to the first line portion and a second microstrip line corresponding to the second line portion, The distance from the second ground portion to the first microstrip line is shorter than the distance from the first ground portion to the second microstrip line. PCB assembly.

14. In claim 11, Further comprising one or more elements including at least one of a resistor, an inductor, or a capacitor; The one or more elements and the conductive pattern are used for impedance matching between the first RF component and the second RF component. PCB assembly.

15. In claim 11, The above-mentioned challenging pattern includes a plurality of line portions having different line widths, The above plurality of line portions are sequentially formed in a direction in which the line width becomes narrower from the first RF component to the second RF component, The above plurality of line portions include the first line portion and the second line portion, PCB assembly.

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